AU616739B2 - Improved solution growth of silicon films - Google Patents

Description

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COMMONWEALTH OF AUSTRALIA Patent Act 1952 616739 COM P L E T E SPEC I FICATION

(ORIGINAL)

Class Int. Class Application Number :PI 7209 and PI 8959 Lodged :11 March 1988 and 23 June 1988 Complete Specification Lodged Accepted Published Priority: Related Art Sr0 Name of Applicant Address of Applicant Actual Inventors: Address for Service UNISEARCH LIMITED 221-227 Anzac Parade, Kensington, New South Wales, Commonwealth of Australia Martin Andrew Green and Stuart Ross Wenham F.B. RICE CO., Patent Attorneys, 28A Montague Street, BALMAIN. 2041.

Complete Specification for the invention entitled: "IMPROVED SOLUTION GROWTH OF SILICON FILMS" The following statement is a full description ef this invention including the best method of performing it known to Us:- 00'9 i4 15 Note that in all orevinl iac.- 2- The present invention relates to the manufacture of thin films of silicon for solar cells and other electronic applications, to the manufacture of thin film silicon solar cells and in particular the invention provides an improved method of manufacturing such cells.

There are obvious advantages in fabricating silicon solar cells in thin film form on a supporting layer as opposed to the thick, self supporting crystalline or polycrystalline wafers which form the basis of present commercial practice.

There is also an increasing interest in depositing silicon of electronic quality over large areas for consumer applications such as liquid crystal displays for 0:0o application as television screens. One technique for such 0. 15 deposition is by first dissolving silicon in a molten metal so that the melt is saturated with silicon andO. then S cooling. Upon cooling, the amount of silicon which can be dissolved in the melt decreases. The excess can be made o0:° to precipitate out at a controlled rate onto a substrate.

0 20 The most commonly used metal for dissolving silicon for subsequent deposition in this way has been tin (Sn).

0 An advantage is that tin is electrically quite inert in silicon, so that the unavoidable incorporation of tin in the deposited silicon layer does not detract from the "o 25 layer's electronic properties. A disadvantage is that quite high temperatures (greater than 900 0 C) are required to dissolve much silicon in tin. The high deposition temperature severely limits the choice of substrate material due to thermal mismatch considerations. A further limitation upon substrate choice as well as upon the choice of processing conditions and cleanliness requirements is provided by the much higher prospects for contamination of the silicon layer by other impurities at high temperatures.

Gold forms a eutectic with silicon and has a unique i -3ability amongst the metals to dissolve large amounts of silicon at low temperatures. The eutectic composition consists of about 18% silicon (atomic basis) with a corresponding eutectic temperature of about 363 0

C.

This means that at any temperature higher than this, a molten solution of silicon in gold can be formed with the silicon content being at least as high as at the eutectic. Although gold is very detrimental to the electronic properties of the silicon layer when incorporated into this layer in even very small quantities, the low deposition temperature means that Sovirtually no gold is incorporated into the lattice eo~o structure of the silicon layer. Similarly, only small oo quantities of other impurities will be incorporated at 15 such low temperatures. This allows relaxed cleanliness ao o requirements for the substrate material and deposition equipment as well as relaxed purity requirements of these and the solutions employed. The low deposition 0 temperatures also reducL thermal mismatch problems between the deposited silicon layer and the substrate.

O A disadvantage of gold is the high solubility of :o0o silicon at the eutectic. The large amounts of silicon required to form a melt at low temperatures gives rise to difficulties in controlling the precipitation rate of 25 silicon from the solution upon cooling. This reduces the crystallographic quality of the deposited film and also gives rise to the possibility of macroscopic gold inclusions in the deposited film.

One broad form of the invention is provided by a solution consisting of silicon dissolved in a solvent for deposition of a thin film silicon coating, the solvent comprising one of, or a mixture or alloy of: a first metal which forms a low temperature eutectic with silicon, and a second metal or mixture of second metals which either have a melting point below the 4temperature desired for deposition or which form a eutectic with said first metal with a eutectic temperature below said temperature desired for deposition.

In another form the present invention consists in a method of coating a material surface with thin film silicon comprising the steps of dissolving silicon in a low melting point metal solvent and subsequently precipitating said dissolved silicon from solution within a deposition temperature range to deposit a layer of silicon onto said material surface, wherein the solvent is a mixture of one of, or a mixture or alloy of, a first metal which forms a low temperature eutectic with silicon, and a second metal or mixture of second metals which DO either have a melting point below the deposition temperature range or which form a eutectic with said first a metal with a eutectic temperature below said temperature o range. Preferably the first metal is gold and the solvent is a mixture of gold and a said second metal.

Examples of suitable metals with a low melting point a at S 20 are Bi, Cd, Ga, Hg, In, Pb, Sn, T1 and Zn. Examples of metals which form a eutectic with gold with a low eutectic temperature are Al, Bi, Cd, Ga, In, Pb, Sb, Sn and T1 and a a mixtures such as low temperature eutectics containing the above metals or metals completely miscible with gold such 25 as Ag, Cu, Ni, Pd and Pt. Other metals may be added to a s~ a the melt for other purposes such as doping the silicon such as for Al, As, Ga or Sb.

The advantage of mixing such metals with gold is that the solubility of silicon in these metals or mixtures is invariably lower than that of silicon in gold at temperatures of interest (provided such temperatures are above the gold-silicon eutectic temperature). When these metals or initial mixtures are mixed with gold, the solubility of silicon in the final mixture at the temperatures of interest will almost invariably be bounded at the higher extreme by its solubility in gold and at the lower extreme by its solubility in the initial mixture.

In practice, it is found that the solubility in gold can be greatly reduced in this manner. For example, the solubility (in atomic percent) we have measured in gold-tin mixtures at 410 0 C decreases from approximately for pure gold to approximately 0.5% and 0.2% as 25% and 30% of tin by weight is added to the gold.

The advantage of this reduced solubility is that growth rates are easier to control resulting in better film quality and reduced inclusions. A further advantage

I

o is that it is possible to extend growth temperatures to lower temperatures than possible with gold alone. For example, a mixture of 20% tin by weight with gold remains molten to temperatures as low as 278 0 C, appreciably o lower than the gold eutectic of 363 0 C. These S0 temperatures represent the lower bounds on the growth temperatures from the respective solutions.

O The silicon films deposited in this way could be used, inter alia, as the active layers of solar cells or as the substrates for transistor fabrication for liquid crystal display television screen. Other uses will undoubtedly be available.

The strong effect of tin upon the solubility of 0° °o 25 silicon in gold suggests a novel variation upon the method S of growth of semiconductor films from molten metal alloy solutions. In the present example, adding tin to a solution of silicon in gold strongly decreases the silicon solubility. If originally saturated with silicon, silicon would precipitate out by this addition. If a solution in gold were saturated with both silicon and tin and placed in contact with a tin rich compound such as pure Sn or AuSn or tin rich alloys of such materials, heating would cause more tin to dissolve in the solution. This would decrease the solubility of silicon causing silicon to -6precipitate out. Hence, solution growth could be obtained in this particular embodiment by heating the solution r.ther than by the established approach of cooling it.

This could have numerous advantages such as in the control of convection currents and of impurity and inclusion incorporation into the film.

Experiments have shown that while pure bismuth and lead have virtually no ability to dissolve silicon, gold added in the region of 5-50% by weight to either of these metals provides an alloy with good control of silicon deposition at below 400 0 C and with the lower gold S. content the alloys can be produced relatively cheaply.

The method can be extended to other molten metal "o b alloy solvents and to other dissolved semiconductors for oo 15 example Sb/Au alloys for the molten alloy and III-V o oo compounds and their alloys as the semiconductor.

In one embodiment the above methods will include the step of incorporating Ge into the solution such that the material deposited onto the supporting layer will be an o, 20 alloy of Si and Ge.

By incorporating Ge into the solutions so that it is incorporated into the deposited film additional advantages arise. The addition of Ge tends to reduce the deposition temperature as well as the bandgap of the SixGel-x oo08 25 alloy which will be deposited. As taught by Green (M.A.

Green, IEEE Trans. Electron Devices, Vol. ED-31, pp.

.0 0 0 681-689, 1984), recombination at cell surfaces becomes more important than recombination in bulk regions as cell thickness decreases. By incorporating more Ge into the bulk regions or part of the bulk region of thin cells than at surfaces, a balance between surface and bulk recombination can be maintained. This will give a performance advantage arising from increased light absorption in the reduced bandwidth bulk regions.

In some embodiments of the invention, an optically 7 transparent seeding layer is used between the supporting layer and the deposited silicon (or SixGEl.x) film.

The purpose of this layer is to establish a good crystalline structure onto which the silicon can be deposited with a similarly good crystalline structure.

This removes the dependency of the crystalline quality of the silicon on the choice of supporting substrate layer.

The seeding layer will typically have a relatively poor crystalline structure at the interface with the supporting layer which will improve as the layer grows away from the supporting layer. By having the layer transparent, the aB, distance required to establish good crystallinity becomes non-critical. Preferred choices for the seeding layer are "o I materials such as ZnS, CaF 2 GaP, A/P and BP onto which aoaa: 15 the epitaxial growth of silicon is possible. These can be .o ao deposited by any one of a variety of known techniques although deposition from metallic solution gives the highest level of consistency with the subsequent deposition of the silicon layer. This layer could also 20 serve to passivate the surface of the silicon film immediately in contact.

In a preferred embodiment of the invention a self-supporting glass sheet is used as a supporting superstrate for the deposition of silicon film. The lower 1 25 the deposition temperature, the wider the range of glass 0o type which can be used. For example, at high temperatures fused silica or vicor could be used. Borosilicate glass would be suitable at lower temperatures. At deposition temperatures below 600 0 C, less expensive soda lime glass U would be used. In present solar cell modules based on self-supporting silicon wafers, low-iron soda lime plate glass of about 3mm thickness generally is used as the structural layer within the module. Lowest cost would occur of the supporting superstrate of the present invention deviated as little as possible from this

K

-8baseline.

Nucleation of crystal growth centres on the glass superstrate could be encouraged by the formation of structure on the side of the superstrate onto which the film or its seeding layer is deposited. Structure could be formed by mechanical processes such as rolling or by chemical or plasma etching. This structure could then encourage preferred orientations in the crystal film. It would also affect the direction of light entering the silicon film through the superstrate. The formation of structure on the superstrate could be used to help trap 00 U weakly absorbed light into the silicon film. An example 0oooo of such a desirable geometrical structure which could be o formed in the superstrate to enhance such effects would be 0 o 15 small pyramids, preferably impressed into the superstrate, S tilted with respect to the original superstrate surface.

0 The less controlled structure which results when glass is chemically etched would also be suitable. Any other 0o,oo method which produces a high density of small pores in the S 20 surface of the surface onto which the films are to be deposited would also be suitable, such as plasma etching.

According to further aspects of the invention, all the cells of the entire module are formed simultaneously on the supporting substrate. Several new techniques have 25 been developed to implement the simultaneous formation of multiple cells. One is the partitioned solution growth method shown in Figure i. In this case the molten solution containing the dissolved silicon is held in a suitable container divided into compartments by thin partitions. These partitions may be fixed with respect to the container or may be able to slide with respect to it to provide more intimate contact with the layer (the workpiace) onto which the solution film is to be deposited. The purpose of the partition is to prevent the solution from wetting the workpiece in the region 9 i immediately underneath or adjacent to the partition. By cooling the molten solution, or by arranging for a temperature gradient from its upper levels held in intimate contact with a source of silicon (and possibly Ge) to the workpiece, silicon will be deposited. If the workpiece is held stationary, the deposition will occur in the regions of the workpiece under the separate chambers.

The deposited layers will reflect the geometry of the chambers in this case. If the workpiece is moving slowly with respect to the solution, stripes as shown in Figure 1 can be formed.

Although t''e partitions represent a mechanical 6 solution as described above to prevent deposition in selected areas, thermal or electrical solutions are also o 15 possible which can achieve the same purpose. For o instance, by holding the partitions at higher temperature than the solution, any solution under the partition would be hotter than the surrounding solution and hence supersaturation with silicon in these regions could be o 0 20 prevented. This would prevent deposition in these regions.

If the workpiece is moving with respect to the o solution, a point source of heat such as provided by a heated needle could be used to give the strip structure to the deposited layer similar to the final result of 25 Figure 1. The heated solution in the vicinity of the 0000 0 needle could be used to dissolve a small region in the deposited film as it passes underneath. If the workpiece is transparent, a laser beam illuminating the solution from underneath the workpiece could provide a convenient source of such localized heat for this purpose. If a strip laser were used, deposition could be prevented along the strip illuminated by the laser as in the case of the heated partition.

The thickness of the deposited layers can be controlled by the temperature of the solution including 10 gradients within it as well as the length of time the solution stays in contact with the workpiece. The doping ive2 in the deposited layer can be controlled by depositing the silicon from a metal solution where the solvent acts as a dopant in silicon, or by dissolving dopants in the solution, or a combination of the above.

As shown later, successive layers of different dopant level or type can be built up aligned or offset with respect to each other to give desirable device structure.

If the workpiece is stationary, a great deal of flexibility is available as to the spatial distribution of o Os 4 os these layers. If the workpiece is moving, as in Figure i, O~S additional techniques are necessary to allow variations in o o deposited film properties in the direction of the workpiece motion. A technique for achieving this would be a oo by cycling the temperatures of the metallic solutions.

When the temperature is highest near the substrate, the solution will no longer be supersaturated with silicon and deposition can be made to stop. When coolest, deposition oO 20 will be strongest. Alternatively, localised heating or cooling of substrate provides the same effect with perhaps o" omore ease due to the lower thermal mass of the substrate relative to the metallic solutions. By either means, patterned structure in the direction of motion can be 25 obtained as illustrated in Figure 2.

The role of temperature gradients from top to bottom O 0 of the molten solution has already been mentioned.

Lateral temperature gradients within the solution can also be used to give patterned structure as in Figure 2.

Using the techniques as described, solar cell structures can be built up using overlying strips of deposited silicon of different dopant concentration, thickness and Ge content. An advantage of the present invention's ability to overlap and offset layers relative to each other is that structures such as those described i1 11 o 9i 9, 9 0 09 9 90 9 99 94 04 9 9 0~ 0 0 0I can be formed without requiring separate masking, photolithography or additional processing steps.

Figure 3 shows one such implementation. The structure in the direction into the page remains the same so the different layers shown take the form of long strips. A schematic of the process by which the layers could be deposited is shown in Figure 4. Shown in Figure 3 are several solar cells each with an n+-p-p+ junction structure as well known in the art. The cells, however, are connected together in a series connection at the areas where contact is made between the n+ and p+ region. Contacts between such heavily doped regions, instead of acting Ps a rectifying junction, act as a low resistance "ohmic" contact. Alternatively, rectifying 15 qualities between the n+ and p+ regions could be destroyed by deliberately damaging the crystallographic quality of those regions. Also incorporated into the cells is an "isolation region" whereby the contact region is isolated from the main body of the cell by the high lateral resistance of the p-type region. The n+ and p+ regions need to be sufficiently highly doped and sufficiently thick to present a small lateral resistance to current flow. This is most challenging for the n+ region since there is a conflicting constraint on its thickness. This is imposed by the fact that it must be sufficiently thin for carriers generated by light near its interface with the superstrate or seeding layer to find their way to its junction before recombining. One approach to reducing the losses involved in this tradeoff is to arrange for a lateral temperature gradient within the molten bath to give a lateral thickness variation or a lateral doping level variation or a combination of the above. The geometry of the bath could also be used to control thickness as subsequently described. The p+ region could be similarly graded as shown, although the benefits would 1_ ~I 12 be smaller in this case. However, there exists other benefits through introducing lateral thickness variations such as by facilitating control of the rear geometry of the cell to allow optimisation of light trapping within the cell.

An alternative or complementary approach would be the use of "semiconductor fingers". A method of forming these, together with the resulting structure is shown in Figure 6. By periodically cycling the temperature of the first bath, highly doped finger regions could be periodically deposited of width similar to the dimensions sof the bath from which the solutions are deposited. These a would serve to reduce the lateral resistance of the n+ o layer of the cell while restricting the deleterious 15 effects of excess doping and thickness to a fraction of o the cell area. Contact between successive cells could be restricted to the areas. This could reduce the area required for the isolation region in some implementations. Although the regions are shown as sharply defined units in Figure 6, the temperature variation in the corresponding bath or substrate could be 1 controlled to smear this region out. In fact, a transition from to n+ properties could be achieved by temperature control in a single bath, eliminating the need 25 for the second bath shown in Figure 6. The non-rectangular shape of the first bath will promote a thickness variation in the final film. It should be noted that the structures described have the potential for not requiring metal contacts. This feature has numerous advantages. These include better durability by eliminating the potential for metal/silicon interactions, the elimination of losses due to shading, and the simplification of processing. However, metal contacts could also be included by deposition onto the supporting layer or deposited film by standard techniques. Solution i 1' -ii 13 growth of metal silicide contacts with an epitaxial relationship to silicon would be a particularly attractive option.

Multiple cells could be stacked on top of each other and series connected as shown in Figure 7. In this case, the germanium content in the lightly doped regions could increase in each successive cell to take advantage of the increasing red content of the light as it passes through the cells. One advantage of such a tandem arrangement of cells is that it reduces 'he lateral current flow in each of the heavily doped regions of the cell. Another improvement could be the incorporation of a bypass diode across each cell as shown in Figure 8.

2 B If the cell protected by the bypass diode is generating less than its designed current output either n due to partial shading of the module in the field or manufacturing defects, the bypass diode becomes forward biased and provides a current path around the cell. This o not only improves the field reliability of the module, it o 20 also improves manufacturing yield. By incorporation of a few extra cells in the module, modules without all cells 1 fully operational would still meet design specifications.

An alternative approach to building up cell structures would be the double junction approach of o 25 Figure 9. In th.s case, the p-type layer would be more highly doped than for the structure of Figure 3. This region forms a junction with the n+ regions immediately above and below it, with these junctions connected in parallel. If carrier lifetimes in the p-region are large so that diffusion lengths are larger than the thickness of this region, the generated current will partition itself between these two junctions in a way which will tend to take possible resistance losses along the top n+ layer into account. If diffusion lengths are shorter than this, a thin heavily doped p+ core could advantageously be used ._1 14 0 00 o 0 0 0 000 0 0ooo 0 9 0 o o 0 0 00 00 0o 9 0 a 0 o oa 00 a 0 0 o o oo00 6 o O 0 00 30 0 0 within the p-region to reduce its lateral resistance. The rear n+ region is deposited in two steps in the structure illustrated in Figure 9 to allow the highest level of control of alignment to the p+ region providing the interconnection between successive cells.

Again, multiple cells can be stacked on each other as shown in Figure 10. In this case, all the cells in the stack are connected in parallel. The advantage of this arrangement is that it makes it easier for the diffusion lengths to be larger than the p-type region thicknesses.

It also means that each layer has to carry less current, reducing lateral resistance loss. A by-pass diode can also be incorporated into the rear of the cell in a manner similar to that previously described.

15 The flexibility of the described invention to produce doped or undoped semi-conductor layers in any desired position relative to one another facilitates the concept of including additional circuitry as an integral part of the panel (module) itself. Configurations of diodes, 20 transistors and resistors, such as in Figure 11, can be incorporated into the structures using the described techniques and methods, providing the potential to regulate the output from each module in a manner whereby the output was completely temperature independent for the 25 range of operating temperatures likely to be experienced by the module in the field. In conjunction with the bypass diodes it would then be feasible to have a module with an output (I-V curve) that would be independent of temperature changes, failures of small numbers of cell and/or shading of regions of the module.

It will be appreciated that the use of the present invention to incorporate additional circuitry as an integral part of the module, although being described in terms of regulating the module output, may be used to form any number of other desired effects or results.

i ri i &1: Note that in all previously described structures, all n-type regions mentioned could be replaced by p-type regions provided p-type regions were simultaneously replaced by n-type. Note also that although the invention has been described specifically in terms of silicon layers including alloys with Ge, the invention is also applicable to other semiconductors and alloys. Similarly, although the specified method for growth of doped semi-conductor layers was by precipitation from molten solution, it will be appreciated that many of the discussed techniques, features and structures are equally applicable to other o methods of film growth or formation.

9 he approaches described in the text acoeomp jivjqgo o Figures 1 to 11 could also be ap -d-tions where 9 O0 15 the silicon is dij*©ve in molten metals and metal alloys o o The approaches described in the text accompanying Figures 1 to 11 could also be applied to solutions where o0°°o the silicon is dissolved in molten metals and metal alloys o 20 other than those based on gold. For example, solutions o 0 based on Al, As, Bi, Cd, Cu, Ga, Hg, In, Ni, Pb, Pd, Pt, Sb, Sn. Tl and Zn or their alloys would also be suitable.

The approaches described in the text accompanying Figures 1 to 11 could also be modified in an obvious way o 0 0 25 to allow the deposition of the patterns required for other ooo applications such as large area displays. Since costs are less critical in this application, a variety of known j techniques such as photolithography could be used in conjunction with low temperature deposition from the novel gold solutions to effect the desired patterns.

It will be recognised by persons skilled in the art that numerous variations and modifications may be made to the invention as described above without departing from the spirit or scope of the invention as broadly described.

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Claims (23)

1. A solution consisting of silicon dissolved in a solvent for deposition of a thin film silicon coating, the solvent comprising: a mixture of gold and a metal or metals which either have a melting point below a predetermined temperature desired for deposition or which form a eutectic with gold with a eutectic temperature below said temperature desired for deposition.

2. A solution as defined in claim 1 wherein said metal /0 or metals is or are selected from Al, Bi, Cd, Ga, Hg, In, Pb, Sb, Sn, Tl, Zn, Ag, Cu, Ni, Pd and Pt.

3. A solution as claimed in claim 1 or 2 wherein said solvent is an alloy selected from the group Au-Sn, Au-Sb, Au-Bi and Au-Pb. /i 4. A solution as defined in any one of the preceding claims wherein the saturated silicon content is at least 1% (atomic) at a temperature less than 450 0 C. A solution as defined in any one of the preceding claims wherein the melting point of the solvent is less o than the melting point of pure gold.

6. A solution as defined in any one of the preceding claims wherein the solvent is a tin-gold alloy with a tin content of between 20 and 30% by weight.

7. A method of coating a material surface with thin film semiconductor material comprising the steps of dissolving semiconductor material in a metal solvent and subsequently precipitating said dissolved semiconductor material from solution within a deposition temperature range, defined between predetermined upper and lower temperatures, to deposit a layer of semiconductor material onto said material surface, wherein the solvent is one of, or a mixture or alloy of, a first metal which forms a low temperature eutectic with semiconductor material and a second metal or a mixture of second metals which either Shave a melting point below the deposition temperature i; :t 17 o 0 Oe o So O t0 ob ao o range and is/are substantially mixable with the first metal or which form a eutectic with said first metal with a eutectic temperature below the deposition temperature range.

8. A method of coating a material surface with thin film semiconductor material being silicon comprising the steps of dissolving silicon in a metal solvent and subsequently precipitating said dissolved silicon from solution within a deposition temperature range, defined between predetermined upper and lower temperatures, to deposit a layer of silicon onto said material surface wherein the solvent is a mixture of gold and a metal or metals which either have a melting point below the deposition temperature range or which form a eutectic with gold with a eutectic temperature below the deposition temperature range.

9. A method of coating a material surface with a thin film semiconductor material as defired in claim 7 or 8 wherein the step of precipitating the semiconductor ao material includes maintaining in the metal solvent a temperature gradient from a region held in intimate contact with a source of the semiconductor material to a region in contact with said material surface where deposition occurs.

10. A method as defined in claim 7 or 8 wherein said step of precipitating said dissolved semiconductor material from solution comprises commencing with a saturated semiconductor material solution at a starting temperature and maintaining the 3 solvent in contact with said material surface while lowering the temperature of the solvent at a controlled rate selected so as to deposit semiconductor material on to said material surface at a desired rate.

11. A method as defined in claim 8, 9 or 10 wherein said S metal or metals is selected from the list Al, Bi, Cd, Ga, S Hg, In, Pb, Sb, Sn, Tl, Zn, Ag, Cu, Ni, Pd and Pt.

12. A method as defined in any one of the claims 8-10 ~o i D 'i L o d. 00 oo r C; i i,- i L II t iaLL i.aiS, neazing wou a i cause more tin to dissolve in the solution. This would decrease the solubility of silicon causing silicon to i"; 18 i Swherein said solvent is an alloy of tin and gold with the Stin content by weight being between 20% and 30% and said step of precipitating said dissolved silicon from solution i commences at a temperature of approximately 400 0 C and with a silicon content of approximately 1-5% (atomic).

13. A method as defined in claim 8 wherein said metal is tin and said step of precipitating dissolved silicon commences at a starting temperature at which both said silicon and tin are in saturated solution in said gold and o said step of precipitating the dissolved silicon includes maintaining said solution in contact with a source of tin and heating said solution from said starting temperature j at a controlled rate so as to precipitate the silicon at a desired rate. o: 14. A method as defined in claim 8 wherein said solvent p0oo is a mixture of gold and bismuth or lead with a content of gold of 5-50% by weight. A method as defined in any one of the claims 8 to 14 wherein germanium is added to the solution in a proportion c2o to produce a thin film silicon germanium alloy coating.

16. A method as defined in any one of the claims 7 to wherein the thin film is deposited on to said material surface after said material surface has undergone a Stexturing process.

17. A method as defined in any one of the claims 7 to 16 wherein the solution is held in molten form in a container Sdivided into a plurality of compartments by thin partitions, said partitions being in contact with said oo material surface so as to prevent wetting of said material esurface by said solution or being heated so as to prevent precipitation of semiconductor material from said solution in the region of said partitions.

18. A method as defined in any one of the claims 7 to 16 wherein the step of precipitating the dissolved semiconductor material from solution coincides with the Safurther step of maintaining said solution in contact with i 18.< A ehda dLndi ayoeo tecam)7t 6' whri h te fpeiittn h isovd|< 19 0 0 000000 4 40 4 0 4l 0040 0000 4000n said material surface, and applying controlled localised heat to selected areas of said solution and/or said material surface so as to form regions of deposited semiconductor material.

19. A method as defined in claim 18 wherein the step of applying localised heat comprises the controlled emission of a LASER and directing its beam to within said solution. A method as defined in claim 19 wherein said LASER is a strip LASER. Ic 21. A. method as defined in any one of the claims 7 to wherein the step of precipitating the dissolved semiconductor material from solution coincides with the further step of maintaining a temperature gradient across the solution in a direction parallel to said material surface so as the depth of said thin film silicon varies in said direction.

22. A method as defined in any one of the claims 18 to 21 wherein the step of precipitating the dissolved semiconductor material from solution coincides with the 7o further step of moving said material surface relative to said solution at a controlled speed.

23. A method as defined in any one of the claims 7 to 22 wherein said material surface is a surface of a glass material and the step of precipitating the semiconductor material occurs at temperatures below 600 0 C.

24. A method as defined in claim 23 wherein said glass material is soda lime glass. A method of coating a material surface with thin film silicon being substantially as described herein with 30 reference to the drawings.

26. A method of coating a material surface with a thin film silicon by a precipitation method utilising a solution as defined in any one of the claims 1 to 6.

27. A thin film silicon coated on a material surface by S any one of the methods defined in claims 7 to 24.

28. A solution for deposition of a thin film silicon 0'/ I_ grI- "C, '1 9-i~Lil 20 coating being substantially as described herein with reference to the drawings.

29. A material coated with a thin film silicon being substantially as described herein with reference to the drawings. A solar cell produced by a method as defined in any one of the claims 7 to 24.

31. A solar cell being substantially as described herein with reference to the drawings. o DATED this 12 day of June 1991 UNISEARCH LIMITED Patent Attorneys for the Applicant: F.B. RICE CO. 0 a 4' 1' (.7 K~