AU523670B2 - Cache memory location selection mechanism - Google Patents

Cache memory location selection mechanism

Info

Publication number
AU523670B2
AU523670B2 AU42245/78A AU4224578A AU523670B2 AU 523670 B2 AU523670 B2 AU 523670B2 AU 42245/78 A AU42245/78 A AU 42245/78A AU 4224578 A AU4224578 A AU 4224578A AU 523670 B2 AU523670 B2 AU 523670B2
Authority
AU
Australia
Prior art keywords
cache memory
memory location
selection mechanism
location selection
cache
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
AU42245/78A
Other versions
AU4224578A (en
Inventor
P. Ryan Charles
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Bull HN Information Systems Inc
Original Assignee
Honeywell Information Systems Italia SpA
Honeywell Information Systems Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Honeywell Information Systems Italia SpA, Honeywell Information Systems Inc filed Critical Honeywell Information Systems Italia SpA
Publication of AU4224578A publication Critical patent/AU4224578A/en
Application granted granted Critical
Publication of AU523670B2 publication Critical patent/AU523670B2/en
Expired legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/12—Replacement control
    • G06F12/121—Replacement control using replacement algorithms
    • G06F12/123—Replacement control using replacement algorithms with age lists, e.g. queue, most recently used [MRU] list or least recently used [LRU] list

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Memory System Of A Hierarchy Structure (AREA)
  • Management, Administration, Business Operations System, And Electronic Commerce (AREA)
  • Information Retrieval, Db Structures And Fs Structures Therefor (AREA)
AU42245/78A 1977-12-08 1978-12-06 Cache memory location selection mechanism Expired AU523670B2 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US85857577A 1977-12-08 1977-12-08
USUS858575 1977-12-08

Publications (2)

Publication Number Publication Date
AU4224578A AU4224578A (en) 1980-06-12
AU523670B2 true AU523670B2 (en) 1982-08-12

Family

ID=25328622

Family Applications (1)

Application Number Title Priority Date Filing Date
AU42245/78A Expired AU523670B2 (en) 1977-12-08 1978-12-06 Cache memory location selection mechanism

Country Status (6)

Country Link
JP (1) JPS5489438A (en)
AU (1) AU523670B2 (en)
CA (1) CA1121515A (en)
DE (1) DE2853165A1 (en)
FR (1) FR2411465B1 (en)
GB (1) GB2009982B (en)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4322795A (en) * 1980-01-24 1982-03-30 Honeywell Information Systems Inc. Cache memory utilizing selective clearing and least recently used updating
JPS60181942A (en) * 1984-02-29 1985-09-17 Fujitsu Ltd Memory control device
DE19543193C1 (en) * 1995-11-20 1997-02-13 Daimler Benz Ag Stem for a passenger car with a support structure
WO2004046933A1 (en) * 2002-11-20 2004-06-03 Fujitsu Limited Memory controller and cache replacement control method
US7673102B2 (en) 2006-05-17 2010-03-02 Qualcomm Incorporated Method and system for maximum residency replacement of cache memory

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE1249926B (en) * 1961-08-08 1967-09-14 Radio Corporation of America New York, NY (V St A) Device for re-addressing faulty memory locations in an arbitrarily accessible main memory in a data processing system
GB1124017A (en) * 1964-12-17 1968-08-14 English Electric Computers Ltd Data storage apparatus
US3840862A (en) * 1973-09-27 1974-10-08 Honeywell Inf Systems Status indicator apparatus for tag directory in associative stores
JPS5090259A (en) * 1973-12-10 1975-07-19

Also Published As

Publication number Publication date
AU4224578A (en) 1980-06-12
DE2853165A1 (en) 1979-06-13
JPS5489438A (en) 1979-07-16
CA1121515A (en) 1982-04-06
GB2009982A (en) 1979-06-20
DE2853165C2 (en) 1989-09-21
FR2411465B1 (en) 1986-05-30
FR2411465A1 (en) 1979-07-06
GB2009982B (en) 1982-03-24

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