AU5087698A - Heat sink-lead frame structure - Google Patents
Heat sink-lead frame structureInfo
- Publication number
- AU5087698A AU5087698A AU50876/98A AU5087698A AU5087698A AU 5087698 A AU5087698 A AU 5087698A AU 50876/98 A AU50876/98 A AU 50876/98A AU 5087698 A AU5087698 A AU 5087698A AU 5087698 A AU5087698 A AU 5087698A
- Authority
- AU
- Australia
- Prior art keywords
- heat sink
- lead frame
- frame structure
- lead
- sink
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Abandoned
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
- H01L23/42—Fillings or auxiliary members in containers or encapsulations selected or arranged to facilitate heating or cooling
- H01L23/433—Auxiliary members in containers characterised by their shape, e.g. pistons
- H01L23/4334—Auxiliary members in encapsulations
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/495—Lead-frames or other flat leads
- H01L23/49568—Lead-frames or other flat leads specifically adapted to facilitate heat dissipation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/42—Wire connectors; Manufacturing methods related thereto
- H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L24/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01039—Yttrium [Y]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
Landscapes
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
- Lead Frames For Integrated Circuits (AREA)
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US74606496A | 1996-11-06 | 1996-11-06 | |
US08746064 | 1996-11-06 | ||
PCT/US1997/019309 WO1998020718A1 (en) | 1996-11-06 | 1997-11-03 | Heat sink-lead frame structure |
Publications (1)
Publication Number | Publication Date |
---|---|
AU5087698A true AU5087698A (en) | 1998-05-29 |
Family
ID=24999337
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
AU50876/98A Abandoned AU5087698A (en) | 1996-11-06 | 1997-11-03 | Heat sink-lead frame structure |
Country Status (2)
Country | Link |
---|---|
AU (1) | AU5087698A (en) |
WO (1) | WO1998020718A1 (en) |
Families Citing this family (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE59402033D1 (en) | 1993-09-30 | 1997-04-17 | Siemens Ag | Miniature two-pole SMT package for semiconductor components and method for its production |
JP2001518692A (en) * | 1997-07-29 | 2001-10-16 | オスラム オプト セミコンダクターズ ゲゼルシャフト ミット ベシュレンクテル ハフツング ウント コンパニー オッフェネ ハンデルスゲゼルシャフト | Photoelectric element |
DE10117889A1 (en) | 2001-04-10 | 2002-10-24 | Osram Opto Semiconductors Gmbh | Leadframe used for a light emitting diode component comprises a chip assembly region, a wire connecting region, external electrical connecting strips, and a support part coupled with a thermal connecting part |
US20080035947A1 (en) * | 2003-12-09 | 2008-02-14 | Weaver Jr Stanton Earl | Surface Mount Light Emitting Chip Package |
JP2007184643A (en) * | 2007-03-28 | 2007-07-19 | Toshiba Electronic Engineering Corp | Optical semiconductor package |
JP5667820B2 (en) * | 2010-09-14 | 2015-02-12 | 東芝電子エンジニアリング株式会社 | Optical semiconductor device |
JP5740458B2 (en) * | 2013-12-02 | 2015-06-24 | 東芝電子エンジニアリング株式会社 | Optical semiconductor package |
US9947612B2 (en) | 2015-12-03 | 2018-04-17 | Stmicroelectronics, Inc. | Semiconductor device with frame having arms and related methods |
Family Cites Families (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5289344A (en) * | 1992-10-08 | 1994-02-22 | Allegro Microsystems Inc. | Integrated-circuit lead-frame package with failure-resistant ground-lead and heat-sink means |
-
1997
- 1997-11-03 WO PCT/US1997/019309 patent/WO1998020718A1/en active Application Filing
- 1997-11-03 AU AU50876/98A patent/AU5087698A/en not_active Abandoned
Also Published As
Publication number | Publication date |
---|---|
WO1998020718A1 (en) | 1998-05-14 |
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