Classifications

• • H—ELECTRICITY
  • H01—ELECTRIC ELEMENTS
  • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
  • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
  • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
  • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
  • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
  • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
  • H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
  • H01L21/304—Mechanical treatment, e.g. grinding, polishing, cutting
• • B—PERFORMING OPERATIONS; TRANSPORTING
  • B24—GRINDING; POLISHING
  • B24B—MACHINES, DEVICES, OR PROCESSES FOR GRINDING OR POLISHING; DRESSING OR CONDITIONING OF ABRADING SURFACES; FEEDING OF GRINDING, POLISHING, OR LAPPING AGENTS
  • B24B37/00—Lapping machines or devices; Accessories
  • B24B37/11—Lapping tools
  • B24B37/20—Lapping pads for working plane surfaces
  • B24B37/205—Lapping pads for working plane surfaces provided with a window for inspecting the surface of the work being lapped

Landscapes

• Engineering & Computer Science (AREA)
• Mechanical Engineering (AREA)
• Physics & Mathematics (AREA)
• Condensed Matter Physics & Semiconductors (AREA)
• General Physics & Mathematics (AREA)
• Manufacturing & Machinery (AREA)
• Computer Hardware Design (AREA)
• Microelectronics & Electronic Packaging (AREA)
• Power Engineering (AREA)
• Finish Polishing, Edge Sharpening, And Grinding By Specific Grinding Devices (AREA)
• Mechanical Treatment Of Semiconductor (AREA)

Applications Claiming Priority (3)

Publications (1)

Family

ID=32677806

Family Applications (1)

Country Status (4)

Families Citing this family (2)

Family Cites Families (4)

• 2003
  • 2003-12-24 AU AU2003285800A patent/AU2003285800A1/en not_active Abandoned
  • 2003-12-24 WO PCT/KR2003/002831 patent/WO2004058453A1/en not_active Application Discontinuation
  • 2003-12-24 KR KR1020030095954A patent/KR100577470B1/en active IP Right Grant
  • 2003-12-29 MY MYPI20035023A patent/MY137723A/en unknown

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