AU2003250808A1 - Coating of an integrated semiconductor circuit, and method for producing said coating - Google Patents

Coating of an integrated semiconductor circuit, and method for producing said coating

Info

Publication number
AU2003250808A1
AU2003250808A1 AU2003250808A AU2003250808A AU2003250808A1 AU 2003250808 A1 AU2003250808 A1 AU 2003250808A1 AU 2003250808 A AU2003250808 A AU 2003250808A AU 2003250808 A AU2003250808 A AU 2003250808A AU 2003250808 A1 AU2003250808 A1 AU 2003250808A1
Authority
AU
Australia
Prior art keywords
coating
producing
semiconductor circuit
integrated semiconductor
integrated
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Abandoned
Application number
AU2003250808A
Other languages
English (en)
Inventor
Oliver Dernovsek
Wolfgang Rossner
Steffen Walter
Berit Wessler
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Siemens AG
Original Assignee
Siemens AG
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Siemens AG filed Critical Siemens AG
Publication of AU2003250808A1 publication Critical patent/AU2003250808A1/en
Abandoned legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/57Protection from inspection, reverse engineering or tampering
    • H01L23/573Protection from inspection, reverse engineering or tampering using passive means
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06KGRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
    • G06K19/00Record carriers for use with machines and with at least a part designed to carry digital markings
    • G06K19/06Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
    • G06K19/067Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
    • G06K19/07Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
    • G06K19/073Special arrangements for circuits, e.g. for protecting identification code in memory
    • G06K19/07309Means for preventing undesired reading or writing from or onto record carriers
    • G06K19/07372Means for preventing undesired reading or writing from or onto record carriers by detecting tampering with the circuit
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02109Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02123Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02225Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/0226Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process
    • H01L21/02282Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process liquid deposition, e.g. spin-coating, sol-gel techniques, spray coating
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/0002Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/095Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00 with a principal constituent of the material being a combination of two or more materials provided in the groups H01L2924/013 - H01L2924/0715
    • H01L2924/097Glass-ceramics, e.g. devitrified glass
    • H01L2924/09701Low temperature co-fired ceramic [LTCC]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/12Passive devices, e.g. 2 terminal devices
    • H01L2924/1204Optical Diode
    • H01L2924/12044OLED

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Security & Cryptography (AREA)
  • General Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Formation Of Insulating Films (AREA)
AU2003250808A 2002-08-09 2003-08-06 Coating of an integrated semiconductor circuit, and method for producing said coating Abandoned AU2003250808A1 (en)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
DE10236605 2002-08-09
DE10236605.5 2002-08-09
PCT/DE2003/002646 WO2004021437A1 (de) 2002-08-09 2003-08-06 Beschichtung einer intergrierten halbleiterschaltung und verfahren zum herstellen der beschichtung

Publications (1)

Publication Number Publication Date
AU2003250808A1 true AU2003250808A1 (en) 2004-03-19

Family

ID=31968955

Family Applications (1)

Application Number Title Priority Date Filing Date
AU2003250808A Abandoned AU2003250808A1 (en) 2002-08-09 2003-08-06 Coating of an integrated semiconductor circuit, and method for producing said coating

Country Status (2)

Country Link
AU (1) AU2003250808A1 (de)
WO (1) WO2004021437A1 (de)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2872610B1 (fr) * 2004-07-02 2007-06-08 Commissariat Energie Atomique Dispositif de securisation de composants

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB1180908A (en) * 1966-11-17 1970-02-11 English Electric Co Ltd Improvements in or relating to processes for Forming an Insulating Coating on Silicon, and to Coated Silicon
US4997795A (en) * 1986-10-02 1991-03-05 General Electric Company Dielectric compositions of devitrified glass containing small amounts of lead oxide and iron oxide
CA2088107A1 (en) * 1992-02-24 1993-08-25 Ronald Howard Baney Silicone infiltrated ceramic nanocomposite coatings
US5399441A (en) * 1994-04-12 1995-03-21 Dow Corning Corporation Method of applying opaque coatings
US5693701A (en) * 1995-10-26 1997-12-02 Dow Corning Corporation Tamper-proof electronic coatings

Also Published As

Publication number Publication date
WO2004021437A1 (de) 2004-03-11

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Legal Events

Date Code Title Description
MK6 Application lapsed section 142(2)(f)/reg. 8.3(3) - pct applic. not entering national phase