AU2002348098A1 - Timing recovery with varaible bandwidth phase locked loop and non-linear control paths - Google Patents
Timing recovery with varaible bandwidth phase locked loop and non-linear control pathsInfo
- Publication number
- AU2002348098A1 AU2002348098A1 AU2002348098A AU2002348098A AU2002348098A1 AU 2002348098 A1 AU2002348098 A1 AU 2002348098A1 AU 2002348098 A AU2002348098 A AU 2002348098A AU 2002348098 A AU2002348098 A AU 2002348098A AU 2002348098 A1 AU2002348098 A1 AU 2002348098A1
- Authority
- AU
- Australia
- Prior art keywords
- varaible
- locked loop
- phase locked
- timing recovery
- linear control
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Abandoned
Links
- 238000011084 recovery Methods 0.000 title 1
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L7/00—Arrangements for synchronising receiver with transmitter
- H04L7/02—Speed or phase control by the received code signals, the signals containing no special synchronisation information
- H04L7/033—Speed or phase control by the received code signals, the signals containing no special synchronisation information using the transitions of the received signal to control the phase of the synchronising-signal-generating means, e.g. using a phase-locked loop
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/08—Details of the phase-locked loop
- H03L7/085—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal
- H03L7/093—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal using special filtering or amplification characteristics in the loop
Landscapes
- Engineering & Computer Science (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
- Synchronisation In Digital Transmission Systems (AREA)
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US333001A | 2001-10-31 | 2001-10-31 | |
US10/003,330 | 2001-10-31 | ||
PCT/US2002/034489 WO2003039063A2 (en) | 2001-10-31 | 2002-10-30 | Timing recovery with varaible bandwidth phase locked loop and non-linear control paths |
Publications (1)
Publication Number | Publication Date |
---|---|
AU2002348098A1 true AU2002348098A1 (en) | 2003-05-12 |
Family
ID=21705307
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
AU2002348098A Abandoned AU2002348098A1 (en) | 2001-10-31 | 2002-10-30 | Timing recovery with varaible bandwidth phase locked loop and non-linear control paths |
Country Status (3)
Country | Link |
---|---|
CN (1) | CN100413245C (en) |
AU (1) | AU2002348098A1 (en) |
WO (1) | WO2003039063A2 (en) |
Families Citing this family (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US7480360B2 (en) * | 2005-05-06 | 2009-01-20 | Intel Corporation | Regulating a timing between a strobe signal and a data signal |
JP4585455B2 (en) * | 2006-01-20 | 2010-11-24 | 富士通セミコンダクター株式会社 | Demodulation circuit and demodulation method |
US8432197B2 (en) * | 2010-08-30 | 2013-04-30 | Maxim Integrated Products, Inc. | Nonlinear and concurrent digital control for a highly digital phase-locked loop |
KR102169591B1 (en) * | 2013-10-18 | 2020-10-23 | 현대모비스 주식회사 | Frequency Modulated Continuous Wave radar system and its operating method |
CN104683056B (en) * | 2014-12-30 | 2018-06-22 | 广东大普通信技术有限公司 | A kind of high compensation method for keeping the adaptive PTP flows of clock and compensation system |
Family Cites Families (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0203208B1 (en) * | 1985-05-23 | 1988-11-23 | Deutsche ITT Industries GmbH | Frequency synthesis circuit for the generation of an analogous signal with a digitally stepwise tunable frequency |
US5493700A (en) * | 1993-10-29 | 1996-02-20 | Motorola | Automatic frequency control apparatus |
US6154510A (en) * | 1999-05-03 | 2000-11-28 | Sicom, Inc. | Symbol timing recovery based on adjusted, phase-selected magnitude values |
-
2002
- 2002-10-30 AU AU2002348098A patent/AU2002348098A1/en not_active Abandoned
- 2002-10-30 WO PCT/US2002/034489 patent/WO2003039063A2/en not_active Application Discontinuation
- 2002-10-30 CN CNB028265300A patent/CN100413245C/en not_active Expired - Fee Related
Also Published As
Publication number | Publication date |
---|---|
CN100413245C (en) | 2008-08-20 |
WO2003039063A3 (en) | 2004-02-12 |
CN1611030A (en) | 2005-04-27 |
WO2003039063A2 (en) | 2003-05-08 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
MK6 | Application lapsed section 142(2)(f)/reg. 8.3(3) - pct applic. not entering national phase |