AU2001263175A1 - Method and apparatus for testing integrated circuit chips that output clocks fortiming - Google Patents

Method and apparatus for testing integrated circuit chips that output clocks fortiming

Info

Publication number
AU2001263175A1
AU2001263175A1 AU2001263175A AU6317501A AU2001263175A1 AU 2001263175 A1 AU2001263175 A1 AU 2001263175A1 AU 2001263175 A AU2001263175 A AU 2001263175A AU 6317501 A AU6317501 A AU 6317501A AU 2001263175 A1 AU2001263175 A1 AU 2001263175A1
Authority
AU
Australia
Prior art keywords
fortiming
integrated circuit
circuit chips
testing integrated
output clocks
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Abandoned
Application number
AU2001263175A
Inventor
George Conner
Peter Reichert
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Teradyne Inc
Original Assignee
Teradyne Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Teradyne Inc filed Critical Teradyne Inc
Publication of AU2001263175A1 publication Critical patent/AU2001263175A1/en
Abandoned legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317Testing of digital circuits
    • G01R31/3181Functional testing
    • G01R31/319Tester hardware, i.e. output processing circuits
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317Testing of digital circuits
    • G01R31/3181Functional testing
    • G01R31/319Tester hardware, i.e. output processing circuits
    • G01R31/31917Stimuli generation or application of test patterns to the device under test [DUT]
    • G01R31/31924Voltage or current aspects, e.g. driver, receiver
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317Testing of digital circuits
    • G01R31/3181Functional testing
    • G01R31/319Tester hardware, i.e. output processing circuits
    • G01R31/31903Tester hardware, i.e. output processing circuits tester configuration
    • G01R31/31905Interface with the device under test [DUT], e.g. arrangements between the test head and the DUT, mechanical aspects, fixture
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317Testing of digital circuits
    • G01R31/3181Functional testing
    • G01R31/319Tester hardware, i.e. output processing circuits
    • G01R31/3193Tester hardware, i.e. output processing circuits with comparison between actual response and known fault free response
    • G01R31/31937Timing aspects, e.g. measuring propagation delay

Landscapes

  • Engineering & Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Tests Of Electronic Circuits (AREA)
AU2001263175A 2000-05-19 2001-05-16 Method and apparatus for testing integrated circuit chips that output clocks fortiming Abandoned AU2001263175A1 (en)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US09/577,255 US6486693B1 (en) 2000-05-19 2000-05-19 Method and apparatus for testing integrated circuit chips that output clocks for timing
US09577255 2000-05-19
PCT/US2001/015782 WO2001090768A2 (en) 2000-05-19 2001-05-16 Method and apparatus for testing source synchronous integrated circuits

Publications (1)

Publication Number Publication Date
AU2001263175A1 true AU2001263175A1 (en) 2001-12-03

Family

ID=24307927

Family Applications (1)

Application Number Title Priority Date Filing Date
AU2001263175A Abandoned AU2001263175A1 (en) 2000-05-19 2001-05-16 Method and apparatus for testing integrated circuit chips that output clocks fortiming

Country Status (8)

Country Link
US (1) US6486693B1 (en)
EP (1) EP1290460B1 (en)
JP (1) JP4955891B2 (en)
KR (3) KR100787409B1 (en)
AU (1) AU2001263175A1 (en)
MY (1) MY118113A (en)
TW (1) TW504579B (en)
WO (1) WO2001090768A2 (en)

Families Citing this family (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4782271B2 (en) * 2000-07-06 2011-09-28 株式会社アドバンテスト Semiconductor device testing method and semiconductor device testing equipment
US6857089B2 (en) * 2001-05-09 2005-02-15 Teradyne, Inc. Differential receiver architecture
US6747469B2 (en) * 2001-11-08 2004-06-08 Koninklijke Philips Electronics N.V. Preconditioning integrated circuit for integrated circuit testing
US7375542B2 (en) * 2004-06-30 2008-05-20 Teradyne, Inc. Automated test equipment with DIB mounted three dimensional tester electronics bricks
US8149901B2 (en) * 2005-05-27 2012-04-03 Verigy (Singapore) Pte. Ltd. Channel switching circuit
EP2365349A1 (en) * 2010-02-19 2011-09-14 Salland Engineering International BV A test system for testing integrated circuits and an additional tester therefore
US10970612B2 (en) * 2018-10-22 2021-04-06 Fiteq, Inc. Interactive core for electronic cards
TWI770523B (en) * 2020-06-04 2022-07-11 大陸商北京集創北方科技股份有限公司 IC test circuit board combination and IC test system
US11747396B2 (en) * 2020-07-30 2023-09-05 Openlight Photonics, Inc. Optical interconnections for hybrid testing using automated testing equipment

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4792932A (en) * 1987-01-16 1988-12-20 Teradyne, Inc. Time measurement in automatic test equipment
US5058087A (en) 1987-05-29 1991-10-15 Siemens Aktiengesellschaft Process for determining the electrical duration of signal paths
JP3181736B2 (en) 1992-12-25 2001-07-03 三菱電機株式会社 IC function test apparatus and test method
JPH08185724A (en) * 1994-12-28 1996-07-16 Junkosha Co Ltd Low-speed coaxial cable
US5794175A (en) * 1997-09-09 1998-08-11 Teradyne, Inc. Low cost, highly parallel memory tester
JP4201878B2 (en) * 1998-05-07 2008-12-24 株式会社ルネサステクノロジ Semiconductor device and test board
DE19922907B4 (en) * 1998-05-19 2006-08-10 Advantest Corp. Calibration method for calibrating an output time of a test signal, calibration method for calibrating a time shift, and semiconductor tester
JP3569154B2 (en) * 1998-05-19 2004-09-22 株式会社アドバンテスト Semiconductor device test apparatus and calibration method thereof

Also Published As

Publication number Publication date
KR100787409B1 (en) 2007-12-21
KR100813871B1 (en) 2008-03-17
EP1290460A2 (en) 2003-03-12
WO2001090768A2 (en) 2001-11-29
KR20070070245A (en) 2007-07-03
WO2001090768A3 (en) 2002-05-16
MY118113A (en) 2004-08-30
US6486693B1 (en) 2002-11-26
KR20030014233A (en) 2003-02-15
KR20070067237A (en) 2007-06-27
JP4955891B2 (en) 2012-06-20
TW504579B (en) 2002-10-01
JP2003534553A (en) 2003-11-18
EP1290460B1 (en) 2004-10-06
KR100813872B1 (en) 2008-03-17

Similar Documents

Publication Publication Date Title
AU2001268872A1 (en) Method and apparatus for testing high performance circuits
AU6429201A (en) Method and apparatus for edge connection between elements of an integrated circuit
AU1121801A (en) Method and apparatus for testing circuits with multiple clocks
AU2002353481A1 (en) Method and apparatus for measuring stress in semiconductor wafers
AU2001239890A1 (en) Automated method and system for selecting and procuring electronic components used in circuit and chip designs
AU2002357655A1 (en) Method and apparatus for an asynchronous pulse logic circuit
AU2001250908A1 (en) Integrated circuit and method for signal decryption
AU2001289124A1 (en) A testing device for semiconductor components and a method of using the device
IL181995A (en) Method and circuit for providing interface signals between integrated circuits
AU2003297666A1 (en) Circuit and method for testing high speed data circuits
AU2002339624A1 (en) Preconditioning integrated circuit for integrated circuit testing
AU2003225792A1 (en) Integrated circuit device and method therefor
AU2001293574A1 (en) System and method for testing integrated circuit devices
AU2001272733A1 (en) Apparatus and method for electrical testing of electrical circuits
AU2003302525A1 (en) Circuit pattern inspection device and circuit pattern inspection method
HK1044628A1 (en) Method and apparatus for mounting semiconductor chips
AU2002330002A1 (en) Methods and apparatus for testing electronic circuits
AU2001263175A1 (en) Method and apparatus for testing integrated circuit chips that output clocks fortiming
AU2001259609A1 (en) Method and apparatus for sorting semiconductor devices
AU2000272892A1 (en) Electronic circuit and method for testing a line
SG101949A1 (en) Method and apparatus for testing an integrated circuit
AU2003221838A1 (en) Method and apparatus for routing an integrated circuit
AU2001279297A1 (en) Method and apparatus for evaluating integrated circuit packages having three dimensional features
AU2002218092A1 (en) Vddq integrated circuit testing system and method
AU2002310382A1 (en) Method and apparatus for a clock circuit