AU2001259277A1 - Improving des hardware throughput for short operations - Google Patents

Improving des hardware throughput for short operations

Info

Publication number
AU2001259277A1
AU2001259277A1 AU2001259277A AU5927701A AU2001259277A1 AU 2001259277 A1 AU2001259277 A1 AU 2001259277A1 AU 2001259277 A AU2001259277 A AU 2001259277A AU 5927701 A AU5927701 A AU 5927701A AU 2001259277 A1 AU2001259277 A1 AU 2001259277A1
Authority
AU
Australia
Prior art keywords
des
operations
engine
key
bytes
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Abandoned
Application number
AU2001259277A
Other languages
English (en)
Inventor
Mark Lindemann
Sean William Smith
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
International Business Machines Corp
Original Assignee
International Business Machines Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by International Business Machines Corp filed Critical International Business Machines Corp
Publication of AU2001259277A1 publication Critical patent/AU2001259277A1/en
Abandoned legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L9/00—Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols
    • H04L9/06—Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols the encryption apparatus using shift registers or memories for block-wise or stream coding, e.g. DES systems or RC4; Hash functions; Pseudorandom sequence generators
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L9/00—Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols
    • H04L9/06—Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols the encryption apparatus using shift registers or memories for block-wise or stream coding, e.g. DES systems or RC4; Hash functions; Pseudorandom sequence generators
    • H04L9/0618—Block ciphers, i.e. encrypting groups of characters of a plain text message using fixed encryption transformation
    • H04L9/0625—Block ciphers, i.e. encrypting groups of characters of a plain text message using fixed encryption transformation with splitting of the data block into left and right halves, e.g. Feistel based algorithms, DES, FEAL, IDEA or KASUMI
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09C—CIPHERING OR DECIPHERING APPARATUS FOR CRYPTOGRAPHIC OR OTHER PURPOSES INVOLVING THE NEED FOR SECRECY
    • G09C1/00—Apparatus or methods whereby a given sequence of signs, e.g. an intelligible text, is transformed into an unintelligible sequence of signs by transposing the signs or groups of signs or by replacing them by others according to a predetermined system
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L2209/00—Additional information or applications relating to cryptographic mechanisms or cryptographic arrangements for secret or secure communication H04L9/00
    • H04L2209/12—Details relating to cryptographic hardware or logic circuitry

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Security & Cryptography (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Storage Device Security (AREA)
  • Optical Communication System (AREA)
  • Pressure Welding/Diffusion-Bonding (AREA)
  • Vehicle Body Suspensions (AREA)
  • Bipolar Transistors (AREA)
  • Amplifiers (AREA)
  • Time-Division Multiplex Systems (AREA)
  • Exchange Systems With Centralized Control (AREA)
  • Use Of Switch Circuits For Exchanges And Methods Of Control Of Multiplex Exchanges (AREA)
AU2001259277A 2000-05-01 2001-04-30 Improving des hardware throughput for short operations Abandoned AU2001259277A1 (en)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US20100200P 2000-05-01 2000-05-01
US60201002 2000-05-01
PCT/US2001/013927 WO2001084769A1 (fr) 2000-05-01 2001-04-30 Amelioration du debit de traitement d'un materiel des pour des operations courtes

Publications (1)

Publication Number Publication Date
AU2001259277A1 true AU2001259277A1 (en) 2001-11-12

Family

ID=22744069

Family Applications (1)

Application Number Title Priority Date Filing Date
AU2001259277A Abandoned AU2001259277A1 (en) 2000-05-01 2001-04-30 Improving des hardware throughput for short operations

Country Status (10)

Country Link
US (3) US7362863B2 (fr)
EP (1) EP1297652B1 (fr)
JP (1) JP4443088B2 (fr)
KR (1) KR20030062232A (fr)
CN (1) CN1306748C (fr)
AT (1) ATE318032T1 (fr)
AU (1) AU2001259277A1 (fr)
DE (1) DE60117255T2 (fr)
IL (2) IL152595A0 (fr)
WO (1) WO2001084769A1 (fr)

Families Citing this family (21)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6970451B1 (en) * 1999-10-12 2005-11-29 At&T Corp. Smart routers-simple optics: network architecture for IP over WDM
US7103180B1 (en) * 2001-10-25 2006-09-05 Hewlett-Packard Development Company, L.P. Method of implementing the data encryption standard with reduced computation
FR2834361B1 (fr) * 2001-12-28 2004-02-27 Bull Sa Module de securisation de donnees par chiffrement/dechiffrement et/ou signature/verification de signature
US7900055B2 (en) 2003-04-18 2011-03-01 Via Technologies, Inc. Microprocessor apparatus and method for employing configurable block cipher cryptographic algorithms
US7502943B2 (en) 2003-04-18 2009-03-10 Via Technologies, Inc. Microprocessor apparatus and method for providing configurable cryptographic block cipher round results
US7536560B2 (en) 2003-04-18 2009-05-19 Via Technologies, Inc. Microprocessor apparatus and method for providing configurable cryptographic key size
US7321910B2 (en) 2003-04-18 2008-01-22 Ip-First, Llc Microprocessor apparatus and method for performing block cipher cryptographic functions
US7529368B2 (en) 2003-04-18 2009-05-05 Via Technologies, Inc. Apparatus and method for performing transparent output feedback mode cryptographic functions
US7529367B2 (en) 2003-04-18 2009-05-05 Via Technologies, Inc. Apparatus and method for performing transparent cipher feedback mode cryptographic functions
US7925891B2 (en) 2003-04-18 2011-04-12 Via Technologies, Inc. Apparatus and method for employing cryptographic functions to generate a message digest
US7392400B2 (en) 2003-04-18 2008-06-24 Via Technologies, Inc. Microprocessor apparatus and method for optimizing block cipher cryptographic functions
US7539876B2 (en) * 2003-04-18 2009-05-26 Via Technologies, Inc. Apparatus and method for generating a cryptographic key schedule in a microprocessor
US7844053B2 (en) 2003-04-18 2010-11-30 Ip-First, Llc Microprocessor apparatus and method for performing block cipher cryptographic functions
US7519833B2 (en) 2003-04-18 2009-04-14 Via Technologies, Inc. Microprocessor apparatus and method for enabling configurable data block size in a cryptographic engine
US7542566B2 (en) 2003-04-18 2009-06-02 Ip-First, Llc Apparatus and method for performing transparent cipher block chaining mode cryptographic functions
US7532722B2 (en) 2003-04-18 2009-05-12 Ip-First, Llc Apparatus and method for performing transparent block cipher cryptographic functions
KR100585135B1 (ko) * 2004-02-28 2006-06-01 삼성전자주식회사 불법 복제 방지 기능을 갖는 ａｅｓ 엔진 장치 및 이의암호화/복호화 방법
KR100696061B1 (ko) * 2004-09-14 2007-03-15 쿠쿠전자주식회사 현미발아방법
JP4779657B2 (ja) * 2006-01-11 2011-09-28 ソニー株式会社 イベント方向検出装置およびその方法
CN101051904B (zh) * 2007-05-17 2010-05-19 成都金山互动娱乐科技有限公司 一种保护网络应用程序使用账号密码进行登录的方法
CN101431405B (zh) * 2008-11-17 2011-09-14 暨南大学 Des加密方法及其硬件电路实现方法

Family Cites Families (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4731843A (en) * 1985-12-30 1988-03-15 Paradyne Corporation Method and device of increasing the execution speed of cipher feedback mode of the DES by an arbitrary multiplier
US4964164A (en) * 1989-08-07 1990-10-16 Algorithmic Research, Ltd. RSA computation method for efficient batch processing
JPH06197146A (ja) 1992-12-25 1994-07-15 Hitachi Ltd 通信制御システムにおける制御パラメータ設定方式およびデータリンクの設定方式
NL9400428A (nl) * 1994-03-18 1995-11-01 Nederland Ptt Inrichting voor het cryptografisch bewerken van datapakketten, alsmede werkwijze voor het genereren van cryptografische bewerkingsdata.
GB2288519A (en) * 1994-04-05 1995-10-18 Ibm Data encryption
US5559889A (en) 1995-03-31 1996-09-24 International Business Machines Corporation System and methods for data encryption using public key cryptography
US5953418A (en) * 1995-06-14 1999-09-14 David Hall Providing selective data broadcast receiver addressability
JP3502200B2 (ja) * 1995-08-30 2004-03-02 株式会社日立製作所 暗号通信システム
CA2182254C (fr) 1996-07-29 2000-02-15 Weidong Kou Format de fichier generique pour multiplicite d'exigences de securite
US5850443A (en) * 1996-08-15 1998-12-15 Entrust Technologies, Ltd. Key management system for mixed-trust environments
US5818939A (en) * 1996-12-18 1998-10-06 Intel Corporation Optimized security functionality in an electronic system
AUPO799197A0 (en) * 1997-07-15 1997-08-07 Silverbrook Research Pty Ltd Image processing method and apparatus (ART01)
EP1075676B1 (fr) * 1998-05-01 2002-12-11 Powerquest Corporation Manipulation de partitions virtuelles et reelles de dispositif de mise en memoire informatique
JPH11344925A (ja) 1998-05-29 1999-12-14 Nec Corp 部分的暗号化装置及びコンピュータ可読記録媒体
US6438678B1 (en) * 1998-06-15 2002-08-20 Cisco Technology, Inc. Apparatus and method for operating on data in a data communications system
US6393565B1 (en) * 1998-08-03 2002-05-21 Entrust Technologies Limited Data management system and method for a limited capacity cryptographic storage unit
US6636242B2 (en) * 1999-08-31 2003-10-21 Accenture Llp View configurer in a presentation services patterns environment

Also Published As

Publication number Publication date
CN1306748C (zh) 2007-03-21
IL152595A0 (en) 2003-06-24
ATE318032T1 (de) 2006-03-15
CN1502185A (zh) 2004-06-02
EP1297652A1 (fr) 2003-04-02
KR20030062232A (ko) 2003-07-23
US7362863B2 (en) 2008-04-22
US20040028232A1 (en) 2004-02-12
DE60117255D1 (de) 2006-04-20
EP1297652A4 (fr) 2003-08-20
JP4443088B2 (ja) 2010-03-31
IL152595A (en) 2010-12-30
US7831040B2 (en) 2010-11-09
EP1297652B1 (fr) 2006-02-15
JP2003532915A (ja) 2003-11-05
US20080192926A1 (en) 2008-08-14
DE60117255T2 (de) 2006-10-05
WO2001084769A1 (fr) 2001-11-08
US8374343B2 (en) 2013-02-12
US20090034719A1 (en) 2009-02-05

Similar Documents

Publication Publication Date Title
US7831040B2 (en) DES hardware throughput for short operations
US7043017B2 (en) Key stream cipher device
US7336783B2 (en) Cryptographic systems and methods supporting multiple modes
US8379841B2 (en) Method and system for high throughput blockwise independent encryption/decryption
US9600421B2 (en) Systems and methods for low-latency encrypted storage
JP4684550B2 (ja) 多数の動作モードを支援する暗号化装置
US7552344B2 (en) Hardware-based encryption/decryption employing dual ported key storage
US12010209B2 (en) Memory-efficient hardware cryptographic engine
KR20090085685A (ko) 암호화 동작을 지원하기 위한 복수의 레지스터를 갖는 데이터-이동 제어기
US11429751B2 (en) Method and apparatus for encrypting and decrypting data on an integrated circuit
US20070180228A1 (en) Dynamic loading of hardware security modules
CN115516454B (zh) 硬件安全模块和***
KR20070017411A (ko) 암호화 동작을 지원하기 위한 복수의 레지스터를 갖는데이터-이동 제어기