ATE532288T1 - Takt- und datenwiederherstellungsverfahren und - vorrichtung - Google Patents

Takt- und datenwiederherstellungsverfahren und - vorrichtung

Info

Publication number
ATE532288T1
ATE532288T1 AT04717377T AT04717377T ATE532288T1 AT E532288 T1 ATE532288 T1 AT E532288T1 AT 04717377 T AT04717377 T AT 04717377T AT 04717377 T AT04717377 T AT 04717377T AT E532288 T1 ATE532288 T1 AT E532288T1
Authority
AT
Austria
Prior art keywords
clock
sequence
recovery method
data recovery
time
Prior art date
Application number
AT04717377T
Other languages
English (en)
Inventor
Daniel Allen
Original Assignee
Timelab Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Timelab Corp filed Critical Timelab Corp
Application granted granted Critical
Publication of ATE532288T1 publication Critical patent/ATE532288T1/de

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08—Details of the phase-locked loop
    • H03L7/085—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal
    • H03L7/087—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal using at least two phase detectors or a frequency and phase detector in the loop
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08—Details of the phase-locked loop
    • H03L7/085—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal
    • H03L7/091—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal the phase or frequency detector using a sampling device
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08—Details of the phase-locked loop
    • H03L7/085—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal
    • H03L7/093—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal using special filtering or amplification characteristics in the loop
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00—Arrangements for synchronising receiver with transmitter
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00—Arrangements for synchronising receiver with transmitter
    • H04L7/02—Speed or phase control by the received code signals, the signals containing no special synchronisation information
    • H04L7/033—Speed or phase control by the received code signals, the signals containing no special synchronisation information using the transitions of the received signal to control the phase of the synchronising-signal-generating means, e.g. using a phase-locked loop
    • H04L7/0331—Speed or phase control by the received code signals, the signals containing no special synchronisation information using the transitions of the received signal to control the phase of the synchronising-signal-generating means, e.g. using a phase-locked loop with a digital phase-locked loop [PLL] processing binary samples, e.g. add/subtract logic for correction of receiver clock
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00—Arrangements for synchronising receiver with transmitter
    • H04L7/02—Speed or phase control by the received code signals, the signals containing no special synchronisation information
    • H04L7/033—Speed or phase control by the received code signals, the signals containing no special synchronisation information using the transitions of the received signal to control the phase of the synchronising-signal-generating means, e.g. using a phase-locked loop
    • H04L7/0337—Selecting between two or more discretely delayed clocks or selecting between two or more discretely delayed received code signals
    • H04L7/0338—Selecting between two or more discretely delayed clocks or selecting between two or more discretely delayed received code signals the correction of the phase error being performed by a feed forward loop
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L2207/00—Indexing scheme relating to automatic control of frequency or phase and to synchronisation
    • H03L2207/50—All digital phase-locked loop
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00—Arrangements for synchronising receiver with transmitter
    • H04L7/0008—Synchronisation information channels, e.g. clock distribution lines
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00—Arrangements for synchronising receiver with transmitter
    • H04L7/02—Speed or phase control by the received code signals, the signals containing no special synchronisation information
    • H04L7/033—Speed or phase control by the received code signals, the signals containing no special synchronisation information using the transitions of the received signal to control the phase of the synchronising-signal-generating means, e.g. using a phase-locked loop
    • H04L7/0337—Selecting between two or more discretely delayed clocks or selecting between two or more discretely delayed received code signals

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)
  • Information Transfer Systems (AREA)
  • Communication Control (AREA)
  • Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
AT04717377T 2003-03-04 2004-03-04 Takt- und datenwiederherstellungsverfahren und - vorrichtung ATE532288T1 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US45179903P 2003-03-04 2003-03-04
PCT/US2004/006510 WO2004079911A2 (en) 2003-03-04 2004-03-04 Clock and data recovery method and apparatus

Publications (1)

Publication Number Publication Date
ATE532288T1 true ATE532288T1 (de) 2011-11-15

Family

ID=32962638

Family Applications (1)

Application Number Title Priority Date Filing Date
AT04717377T ATE532288T1 (de) 2003-03-04 2004-03-04 Takt- und datenwiederherstellungsverfahren und - vorrichtung

Country Status (8)

Country Link
US (1) US7613263B2 (de)
EP (1) EP1599963B1 (de)
JP (1) JP2006520169A (de)
KR (1) KR101107849B1 (de)
CN (1) CN1802810B (de)
AT (1) ATE532288T1 (de)
CA (1) CA2518071A1 (de)
WO (1) WO2004079911A2 (de)

Families Citing this family (19)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7613263B2 (en) 2003-03-04 2009-11-03 Altera Corporation Clock and data recovery method and apparatus
US7246018B1 (en) 2003-12-22 2007-07-17 Marvell International Ltd. Interpolator testing circuit
US7339995B2 (en) * 2003-12-31 2008-03-04 Intel Corporation Receiver symbol alignment for a serial point to point link
TWI370622B (en) * 2004-02-09 2012-08-11 Altera Corp Method, device and serializer-deserializer system for serial transfer of bits and method and deserializer for recovering bits at a destination
US7339853B2 (en) * 2005-12-02 2008-03-04 Agilent Technologies, Inc. Time stamping events for fractions of a clock cycle
US7577221B2 (en) * 2006-03-01 2009-08-18 Alcatel-Lucent Usa Inc. Receiver scheme for synchronous digital transmission
US7937232B1 (en) * 2006-07-06 2011-05-03 Pivotal Systems Corporation Data timestamp management
US8098692B2 (en) * 2006-08-29 2012-01-17 Koninklijke Philips Electronics N.V. Method and apparatus for high speed LVDS communication
US9755818B2 (en) * 2013-10-03 2017-09-05 Qualcomm Incorporated Method to enhance MIPI D-PHY link rate with minimal PHY changes and no protocol changes
US9277515B2 (en) * 2013-11-04 2016-03-01 Samsung Electronics Co., Ltd Precise time tagging of events over an imprecise link
US9426082B2 (en) * 2014-01-03 2016-08-23 Qualcomm Incorporated Low-voltage differential signaling or 2-wire differential link with symbol transition clocking
CN105337591B (zh) * 2014-05-26 2017-12-22 无锡华润矽科微电子有限公司 基于usb设备实现时钟恢复的电路结构及方法
TWI542155B (zh) * 2014-07-02 2016-07-11 瑞昱半導體股份有限公司 時脈產生器、通訊裝置與循序時脈閘控電路
CN105281743B (zh) * 2014-07-04 2018-09-04 瑞昱半导体股份有限公司 时钟信号产生器、通信装置与循序时钟信号门控电路
US9485080B1 (en) 2015-09-01 2016-11-01 Qualcomm Incorporated Multiphase clock data recovery circuit calibration
EP3510738B1 (de) * 2016-09-08 2021-08-25 Lattice Semiconductor Corporation Taktrückgewinnung und datenwiederherstellung für programmierbare logische vorrichtungen
CN107547188B (zh) * 2017-08-02 2020-04-24 北京东土军悦科技有限公司 一种时钟恢复方法及装置
CN110389976B (zh) * 2018-04-13 2022-04-12 北京京东乾石科技有限公司 一种多接口数据的调度方法和装置
US11906585B2 (en) * 2021-12-16 2024-02-20 Samsung Electronics Co., Ltd. Methods and systems for performing built-in-self-test operations without a dedicated clock source

Family Cites Families (44)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS51118924A (en) 1975-04-11 1976-10-19 Matsushita Electric Ind Co Ltd Ink jet recorder
US4196451A (en) 1976-05-21 1980-04-01 Xerox Corporation Electronic halftone generator
US4361895A (en) * 1980-07-28 1982-11-30 Ontel Corporation Manchester decoder
US4592072B1 (en) * 1982-05-07 1994-02-15 Digital Equipment Corporation Decoder for self-clocking serial data communications
US4595992A (en) 1982-06-07 1986-06-17 Eaton Corporation Encoding and decoding device for narrow bandwidth coherent signals
US4542420A (en) * 1984-01-24 1985-09-17 Honeywell Inc. Manchester decoder
DE3481472D1 (de) 1984-12-21 1990-04-05 Ibm Digitale phasenregelschleife.
US4837677A (en) * 1985-06-14 1989-06-06 International Business Machines Corporation Multiple port service expansion adapter for a communications controller
US5555092A (en) 1987-12-15 1996-09-10 Mscl Method and apparatus for correcting horizontal, vertical and framing errors in motion picture film transfer
GB8717173D0 (en) 1987-07-21 1987-08-26 Logic Replacement Technology L Time measurement apparatus
US5043596A (en) 1988-09-14 1991-08-27 Hitachi, Ltd. Clock signal supplying device having a phase compensation circuit
US5087829A (en) 1988-12-07 1992-02-11 Hitachi, Ltd. High speed clock distribution system
US5040195A (en) * 1988-12-20 1991-08-13 Sanyo Electric Co., Ltd. Synchronization recovery circuit for recovering word synchronization
GB8924202D0 (en) 1989-10-27 1989-12-13 Ncr Co Digital phase lock loop decoder
US4998109A (en) 1989-12-13 1991-03-05 Lechevalier Robert E Analog to digital conversion device by charge integration using delay-line time measurement
US5109283A (en) 1990-03-02 1992-04-28 Xerographic Laser Images Corporation Raster scanning engine driver which independently locates engine drive signal transistors within each cell area
US5199008A (en) 1990-03-14 1993-03-30 Southwest Research Institute Device for digitally measuring intervals of time
US5166959A (en) 1991-12-19 1992-11-24 Hewlett-Packard Company Picosecond event timer
US5204678A (en) 1992-02-10 1993-04-20 Tektronix, Inc. Dual-ranked time-interval conversion circuit
US5552733A (en) 1993-01-19 1996-09-03 Credence Systems Corporation Precise and agile timing signal generator based on a retriggered oscillator
US5469466A (en) * 1994-01-18 1995-11-21 Hewlett-Packard Company System for highly repeatable clock parameter recovery from data modulated signals
US5450136A (en) * 1994-05-13 1995-09-12 The United States Of America As Represented By The Secretary Of The Navy Decoder circuit for generating a system clock signal phase locked to a range tone signal
GB2296142B (en) 1994-12-16 1998-03-18 Plessey Semiconductors Ltd Circuit arrangement for measuring a time interval
JP3712135B2 (ja) 1995-01-20 2005-11-02 ソニー株式会社 情報記録装置、情報再生装置、および情報記録媒体
GB2322265B (en) * 1995-03-16 1999-09-29 Texas Instruments Ltd Nibble packetiser architecture
US5537069A (en) 1995-03-30 1996-07-16 Intel Corporation Apparatus and method for selecting a tap range in a digital delay line
AT406091B (de) 1995-09-18 2000-02-25 Lem Norma Gmbh Verfahren zur reparatur- und wiederholungsprüfung von elektrischen geräten sowie vorrichtung zur durchführung des verfahrens
US5761254A (en) * 1996-01-31 1998-06-02 Advanced Micro Devices, Inc. Digital architecture for recovering NRZ/NRZI data
US5793709A (en) * 1996-04-19 1998-08-11 Xli Corporation Free loop interval timer and modulator
US5903522A (en) 1996-04-19 1999-05-11 Oak Technology, Inc. Free loop interval timer and modulator
US6025745A (en) 1997-06-24 2000-02-15 Digital Equipment Corporation Auto-calibrating digital delay circuit
US6025754A (en) * 1997-11-03 2000-02-15 Harris Corporation Envelope modulated amplifier bias control and method
US6046822A (en) 1998-01-09 2000-04-04 Eastman Kodak Company Ink jet printing apparatus and method for improved accuracy of ink droplet placement
ATE484054T1 (de) 1998-02-27 2010-10-15 Doug Carson & Associates Inc Individuelle einstellung von grube- und landübergangsstellen in einem optischen laufwerksmastervorgang
US6195768B1 (en) * 1998-12-16 2001-02-27 Samuel I. Green System and method for monitoring high speed data bus
WO2000057416A1 (en) 1999-03-23 2000-09-28 Koninklijke Philips Electronics N.V. Information carrier, device for encoding, method for encoding, device for decoding and method for decoding
US6680970B1 (en) * 2000-05-23 2004-01-20 Hewlett-Packard Development Company, L.P. Statistical methods and systems for data rate detection for multi-speed embedded clock serial receivers
US6377094B1 (en) * 2002-03-25 2002-04-23 Oak Technology, Inc. Arbitrary waveform synthesizer using a free-running ring oscillator
KR100803469B1 (ko) 2000-10-27 2008-02-14 마츠시타 덴끼 산교 가부시키가이샤 광디스크, 기록장치 및 기록방법, 재생장치 및 재생방법
US6993695B2 (en) * 2001-06-06 2006-01-31 Agilent Technologies, Inc. Method and apparatus for testing digital devices using transition timestamps
US6888905B1 (en) * 2001-12-20 2005-05-03 Microtune (San Diego), Inc. Low deviation index demodulation scheme
WO2004015743A2 (en) 2002-08-08 2004-02-19 Timelab Corporation Clock distributor circuit for maintaining a phase relationship between remote operating nodes and a reference clock on a chip
CN102306209B (zh) 2003-02-25 2013-12-04 阿尔特拉公司 时钟树调谐填补单元和填补单元调谐方法
US7613263B2 (en) 2003-03-04 2009-11-03 Altera Corporation Clock and data recovery method and apparatus

Also Published As

Publication number Publication date
EP1599963A2 (de) 2005-11-30
CN1802810B (zh) 2010-09-22
JP2006520169A (ja) 2006-08-31
KR101107849B1 (ko) 2012-01-31
US7613263B2 (en) 2009-11-03
US20040264612A1 (en) 2004-12-30
WO2004079911A2 (en) 2004-09-16
KR20050122204A (ko) 2005-12-28
EP1599963B1 (de) 2011-11-02
WO2004079911A3 (en) 2005-04-28
CA2518071A1 (en) 2004-09-16
EP1599963A4 (de) 2006-05-31
CN1802810A (zh) 2006-07-12

Similar Documents

Publication Publication Date Title
ATE532288T1 (de) Takt- und datenwiederherstellungsverfahren und - vorrichtung
JP2008525761A5 (de)
WO2007072255A3 (en) A device for and a method of processing an input data stream comprising a sequence of input frames
TW200515391A (en) Method and apparatus for extracting the ATIP data
ATE505846T1 (de) Musterabhängiger phasendetektor zur taktwiedergewinnung
ATE484790T1 (de) Verfahren und vorrichtung zum erzeugen von zufallsdaten
TW200703017A (en) Method and apparatus for synchronizing multimedia data stream
TW200715795A (en) Apparatus and method for recovering clock and data
TW200625902A (en) Message synchronization over a stochastic network
MY164456A (en) Apparatus for generating and interpreting a data stream with segments having specified entry points
ATE484132T1 (de) Vorrichtung und verfahren zum synchronisierten senden der fünf sinne mit a/v-daten
EP2533204A3 (de) Gerät und Verfahren zur Videoinformationsdecodierung
DE502008003449D1 (de) Verfahren und vorrichtung zur taktrückgewinnung
WO2007148290A3 (en) Generating fingerprints of information signals
MX2013007031A (es) Metodo para procesar una secuencia de cuadros de video codificados.
DE60324255D1 (de) Wegungsvektormerkmalen
TWI315845B (en) Power management apparatus, systems, and methods
MY151545A (en) Signal reception apparatus, systems and methods
DE602004028747D1 (de) Verfahren zum zählen von objekten in einer überwachten umgebung und vorrichtung dafür
ATE410852T1 (de) Datenverarbeitungsvorrichtung mit taktrückgewinnung aus unterschiedlichen quellen
WO2008030235A3 (en) Ammonia recovery process
MX2009001825A (es) Metodo y aparato para transferir datos digitales entre circuitos.
TW200701718A (en) Method and apparatus for correcting symbol timing
TW200615737A (en) Apparatus and method for generating a clock signal
CN102946293A (zh) 一种基于ds编码的并行接收方法及其装置