ATE521903T1 - Integrierte schaltung mit selbstprüfungsfunktion zur validierung der funktionsfähigkeit externer schnittstellen - Google Patents
Integrierte schaltung mit selbstprüfungsfunktion zur validierung der funktionsfähigkeit externer schnittstellenInfo
- Publication number
- ATE521903T1 ATE521903T1 AT08770869T AT08770869T ATE521903T1 AT E521903 T1 ATE521903 T1 AT E521903T1 AT 08770869 T AT08770869 T AT 08770869T AT 08770869 T AT08770869 T AT 08770869T AT E521903 T1 ATE521903 T1 AT E521903T1
- Authority
- AT
- Austria
- Prior art keywords
- integrated circuit
- external
- functionality
- interfaces
- external interfaces
- Prior art date
Links
Classifications
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/317—Testing of digital circuits
- G01R31/3181—Functional testing
- G01R31/3187—Built-in tests
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/302—Contactless testing
- G01R31/305—Contactless testing using electron beams
- G01R31/307—Contactless testing using electron beams of integrated circuits
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/22—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing
- G06F11/26—Functional testing
- G06F11/27—Built-in tests
Landscapes
- Engineering & Computer Science (AREA)
- General Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Theoretical Computer Science (AREA)
- Computer Hardware Design (AREA)
- Quality & Reliability (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Tests Of Electronic Circuits (AREA)
- Semiconductor Integrated Circuits (AREA)
- Test And Diagnosis Of Digital Computers (AREA)
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US11/842,396 US8484524B2 (en) | 2007-08-21 | 2007-08-21 | Integrated circuit with self-test feature for validating functionality of external interfaces |
US94393507P | 2007-09-10 | 2007-09-10 | |
PCT/US2008/066744 WO2008157246A1 (en) | 2007-06-14 | 2008-06-12 | Integrated circuit with self-test feature for validating functionality of external interfaces |
Publications (1)
Publication Number | Publication Date |
---|---|
ATE521903T1 true ATE521903T1 (de) | 2011-09-15 |
Family
ID=39734919
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
AT08770869T ATE521903T1 (de) | 2007-08-21 | 2008-06-12 | Integrierte schaltung mit selbstprüfungsfunktion zur validierung der funktionsfähigkeit externer schnittstellen |
Country Status (8)
Country | Link |
---|---|
US (1) | US8484524B2 (de) |
EP (1) | EP2158495B1 (de) |
JP (1) | JP2010537156A (de) |
KR (2) | KR101265116B1 (de) |
CN (1) | CN101680932B (de) |
AT (1) | ATE521903T1 (de) |
TW (1) | TW200909829A (de) |
WO (1) | WO2008157246A1 (de) |
Families Citing this family (21)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US9004355B2 (en) * | 2005-09-29 | 2015-04-14 | Cardfree Inc | Secure system and method to pay for a service provided at a reservation |
US8622292B2 (en) * | 2005-09-29 | 2014-01-07 | Jeffrey Bart Katz | Reservation-based preauthorization payment system |
US20090089003A1 (en) * | 2007-09-28 | 2009-04-02 | Inventec Corporation | Accessory-testing device and method therefor |
US8220718B2 (en) * | 2008-09-15 | 2012-07-17 | Vasco Data Security, Inc. | Method for post-manufacturing data transfer to and from a sealed device |
JP2011075460A (ja) * | 2009-09-30 | 2011-04-14 | Toshiba Corp | 半導体集積回路 |
US20120324302A1 (en) * | 2011-06-17 | 2012-12-20 | Qualcomm Incorporated | Integrated circuit for testing using a high-speed input/output interface |
US8933715B2 (en) * | 2012-04-08 | 2015-01-13 | Elm Technology Corporation | Configurable vertical integration |
US9542347B2 (en) | 2013-03-16 | 2017-01-10 | Intel Corporation | Host interface crossbar for sensor hub |
US9430414B2 (en) | 2013-03-16 | 2016-08-30 | Intel Corporation | Bus independent platform for sensor hub peripherals to provide coalescing of multiple reports |
CN104678279A (zh) * | 2013-11-29 | 2015-06-03 | 英业达科技有限公司 | 使用测试向量测试连接插槽的***及其方法 |
US10379926B2 (en) * | 2014-08-05 | 2019-08-13 | Macronix International Co., Ltd. | Method and device for monitoring data error status in a memory |
US11403170B2 (en) * | 2014-08-05 | 2022-08-02 | Macronix International Co., Ltd. | Method and device for monitoring data error status in a memory |
KR102377362B1 (ko) * | 2015-07-08 | 2022-03-23 | 삼성전자주식회사 | 보조 테스트 장치, 그것을 포함하는 테스트 보드 및 그것의 테스트 방법 |
US10657092B2 (en) * | 2016-06-30 | 2020-05-19 | Intel Corporation | Innovative high speed serial controller testing |
US10521363B2 (en) * | 2016-11-23 | 2019-12-31 | Nuvoton Technology Corporation | Fully-digital multiple pin value detector apparatus and sampling methods useful in conjunction therewith |
US20210055954A1 (en) * | 2018-02-02 | 2021-02-25 | Dover Microsystems, Inc. | Systems and methods for post cache interlocking |
CN112256512B (zh) * | 2020-10-27 | 2024-05-07 | 重庆航天工业有限公司 | 一种基于glink总线的验证及测试通用*** |
US20220237297A1 (en) * | 2021-01-27 | 2022-07-28 | Advanced Micro Devices, Inc. | Secure coprocessor enforced system firmware feature enablement |
WO2023078573A1 (en) * | 2021-11-08 | 2023-05-11 | Advantest Corporation | Automated test equipment, device under test, test setup methods using a measurement request |
WO2023078571A1 (en) * | 2021-11-08 | 2023-05-11 | Advantest Corporation | Automated test equipment, device under test, test setup methods using an acknowledge signaling |
KR20230168801A (ko) | 2022-06-08 | 2023-12-15 | 와이아이케이 주식회사 | 반도체 테스트 장치 |
Family Cites Families (17)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0425955A (ja) * | 1990-05-22 | 1992-01-29 | Nec Corp | バスインタフェース診断装置 |
US5537536A (en) * | 1994-06-21 | 1996-07-16 | Intel Corporation | Apparatus and method for debugging electronic components through an in-circuit emulator |
US5574733A (en) * | 1995-07-25 | 1996-11-12 | Intel Corporation | Scan-based built-in self test (BIST) with automatic reseeding of pattern generator |
JP3274332B2 (ja) | 1995-11-29 | 2002-04-15 | 株式会社東芝 | コントローラ・大容量メモリ混載型半導体集積回路装置およびそのテスト方法およびその使用方法、並びに半導体集積回路装置およびそのテスト方法 |
JPH09223081A (ja) | 1996-02-16 | 1997-08-26 | Fujitsu Ltd | 外部装置インタフェース検証システム |
US5909593A (en) * | 1996-12-09 | 1999-06-01 | International Business Machines Corporation | System for assigning snoop levels to snooper modules and selectively invoking snooper modules having specified relation to a selected snoop level for hardware detection |
JPH10221410A (ja) | 1997-02-07 | 1998-08-21 | Mitsubishi Electric Corp | Lsiの自動論理検証方式 |
US5991898A (en) | 1997-03-10 | 1999-11-23 | Mentor Graphics Corporation | Arithmetic built-in self test of multiple scan-based integrated circuits |
DE19917884C1 (de) * | 1999-04-20 | 2000-11-16 | Siemens Ag | Schaltung mit eingebautem Selbsttest |
US7036064B1 (en) | 2000-11-13 | 2006-04-25 | Omar Kebichi | Synchronization point across different memory BIST controllers |
US20020183054A1 (en) * | 2001-04-09 | 2002-12-05 | Yoram Rimoni | Mobile system testing architecture |
US7418642B2 (en) | 2001-07-30 | 2008-08-26 | Marvell International Technology Ltd. | Built-in-self-test using embedded memory and processor in an application specific integrated circuit |
JP2007527110A (ja) * | 2003-07-09 | 2007-09-20 | コーニンクレッカ フィリップス エレクトロニクス エヌ ヴィ | オンボード特徴化ユニットを有するic |
TWI266065B (en) | 2005-05-18 | 2006-11-11 | Via Tech Inc | Chip capable of testing itself and testing method thereof |
JP4599266B2 (ja) | 2005-09-27 | 2010-12-15 | 株式会社東芝 | シミュレーション装置及びシミュレーション方法 |
US8032745B2 (en) * | 2005-12-20 | 2011-10-04 | International Business Machines Corporation | Authentication of I2C bus transactions |
US7519886B2 (en) * | 2006-01-05 | 2009-04-14 | International Business Machines Corporation | Apparatus and method for integrated functional built-in self test for an ASIC |
-
2007
- 2007-08-21 US US11/842,396 patent/US8484524B2/en not_active Expired - Fee Related
-
2008
- 2008-06-12 EP EP08770869A patent/EP2158495B1/de not_active Not-in-force
- 2008-06-12 WO PCT/US2008/066744 patent/WO2008157246A1/en active Application Filing
- 2008-06-12 AT AT08770869T patent/ATE521903T1/de not_active IP Right Cessation
- 2008-06-12 JP JP2010512354A patent/JP2010537156A/ja active Pending
- 2008-06-12 KR KR1020107000661A patent/KR101265116B1/ko not_active IP Right Cessation
- 2008-06-12 CN CN2008800199234A patent/CN101680932B/zh not_active Expired - Fee Related
- 2008-06-12 KR KR1020137005441A patent/KR20130040259A/ko not_active Application Discontinuation
- 2008-06-13 TW TW097122316A patent/TW200909829A/zh unknown
Also Published As
Publication number | Publication date |
---|---|
KR101265116B1 (ko) | 2013-05-16 |
EP2158495B1 (de) | 2011-08-24 |
CN101680932B (zh) | 2013-11-20 |
WO2008157246A8 (en) | 2010-04-15 |
EP2158495A1 (de) | 2010-03-03 |
CN101680932A (zh) | 2010-03-24 |
KR20100027214A (ko) | 2010-03-10 |
TW200909829A (en) | 2009-03-01 |
JP2010537156A (ja) | 2010-12-02 |
US20090055695A1 (en) | 2009-02-26 |
KR20130040259A (ko) | 2013-04-23 |
WO2008157246A1 (en) | 2008-12-24 |
US8484524B2 (en) | 2013-07-09 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
RER | Ceased as to paragraph 5 lit. 3 law introducing patent treaties |