ATE485597T1 - Integrierte schaltungen auf einem wafer und verfahren zur herstellung integrierter schaltungen - Google Patents

Integrierte schaltungen auf einem wafer und verfahren zur herstellung integrierter schaltungen

Info

Publication number
ATE485597T1
ATE485597T1 AT08789258T AT08789258T ATE485597T1 AT E485597 T1 ATE485597 T1 AT E485597T1 AT 08789258 T AT08789258 T AT 08789258T AT 08789258 T AT08789258 T AT 08789258T AT E485597 T1 ATE485597 T1 AT E485597T1
Authority
AT
Austria
Prior art keywords
integrated circuits
wafer
producing
pick
circuits
Prior art date
Application number
AT08789258T
Other languages
English (en)
Inventor
Heimo Scheucher
Original Assignee
Nxp Bv
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nxp Bv filed Critical Nxp Bv
Application granted granted Critical
Publication of ATE485597T1 publication Critical patent/ATE485597T1/de

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/544Marks applied to semiconductor devices or parts, e.g. registration marks, alignment structures, wafer maps
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L22/00Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
    • H01L22/30Structural arrangements specially adapted for testing or measuring during manufacture or treatment, or specially adapted for reliability measurements
    • H01L22/34Circuits for electrically characterising or monitoring manufacturing processes, e. g. whole test die, wafers filled with test structures, on-board-devices incorporated on each die, process control monitors or pad structures thereof, devices in scribe line
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/562Protection against mechanical damage
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/58Structural electrical arrangements for semiconductor devices not otherwise provided for, e.g. in combination with batteries
    • H01L23/585Structural electrical arrangements for semiconductor devices not otherwise provided for, e.g. in combination with batteries comprising conductive layers or plates or strips or rods or rings
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2223/00Details relating to semiconductor or other solid state devices covered by the group H01L23/00
    • H01L2223/544Marks applied to semiconductor devices or parts
    • H01L2223/54426Marks applied to semiconductor devices or parts for alignment
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2223/00Details relating to semiconductor or other solid state devices covered by the group H01L23/00
    • H01L2223/544Marks applied to semiconductor devices or parts
    • H01L2223/54473Marks applied to semiconductor devices or parts for use after dicing
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2223/00Details relating to semiconductor or other solid state devices covered by the group H01L23/00
    • H01L2223/544Marks applied to semiconductor devices or parts
    • H01L2223/54473Marks applied to semiconductor devices or parts for use after dicing
    • H01L2223/5448Located on chip prior to dicing and remaining on chip after dicing
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/0002Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • General Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Automation & Control Theory (AREA)
  • Testing Or Measuring Of Semiconductors Or The Like (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Design And Manufacture Of Integrated Circuits (AREA)
  • Exposure And Positioning Against Photoresist Photosensitive Materials (AREA)
AT08789258T 2007-07-12 2008-07-10 Integrierte schaltungen auf einem wafer und verfahren zur herstellung integrierter schaltungen ATE485597T1 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
EP07112371 2007-07-12
PCT/IB2008/052778 WO2009007929A2 (en) 2007-07-12 2008-07-10 Integrated circuits on a wafer and methods for manufacturing integrated circuits

Publications (1)

Publication Number Publication Date
ATE485597T1 true ATE485597T1 (de) 2010-11-15

Family

ID=40229191

Family Applications (1)

Application Number Title Priority Date Filing Date
AT08789258T ATE485597T1 (de) 2007-07-12 2008-07-10 Integrierte schaltungen auf einem wafer und verfahren zur herstellung integrierter schaltungen

Country Status (6)

Country Link
US (1) US9620456B2 (de)
EP (1) EP2168156B1 (de)
CN (1) CN101689541B (de)
AT (1) ATE485597T1 (de)
DE (1) DE602008003128D1 (de)
WO (1) WO2009007929A2 (de)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2009007932A2 (en) * 2007-07-12 2009-01-15 Nxp B.V. Integrated circuits on a wafer and method of producing integrated circuits
CN102428087B (zh) 2009-04-16 2015-06-17 卡洛斯三世国家癌症研究中心基金会 用作激酶抑制剂的咪唑并吡嗪类化合物
US9798228B2 (en) * 2015-09-29 2017-10-24 Nxp B.V. Maximizing potential good die per wafer, PGDW
US10942444B2 (en) * 2019-05-01 2021-03-09 Nxp Usa, Inc. Optical control modules for integrated circuit device patterning and reticles and methods including the same
CN110271723A (zh) * 2019-07-04 2019-09-24 宁波市鄞州特尔斐电子有限公司 一种集成电路撕膜机的自动撕膜装置

Family Cites Families (27)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3696352B2 (ja) * 1996-12-17 2005-09-14 三菱電機株式会社 ライフタイム評価用teg
US6133582A (en) * 1998-05-14 2000-10-17 Lightspeed Semiconductor Corporation Methods and apparatuses for binning partially completed integrated circuits based upon test results
JP3758366B2 (ja) * 1998-05-20 2006-03-22 富士通株式会社 半導体装置
US6713955B1 (en) * 1998-11-20 2004-03-30 Agilent Technologies, Inc. Organic light emitting device having a current self-limiting structure
JP4299420B2 (ja) * 1999-11-09 2009-07-22 川崎マイクロエレクトロニクス株式会社 逐次露光方法
JP4271939B2 (ja) 2001-02-27 2009-06-03 エヌエックスピー ビー ヴィ プロセス制御モジュールを有する半導体ウェハ
JP3711341B2 (ja) * 2001-04-27 2005-11-02 沖電気工業株式会社 半導体装置
JP3872319B2 (ja) * 2001-08-21 2007-01-24 沖電気工業株式会社 半導体装置及びその製造方法
EP1563537B1 (de) 2002-11-08 2008-04-09 Nxp B.V. Integrierte Schaltung mit mindestens einem Kontakthöcker
WO2005064679A1 (en) * 2003-12-23 2005-07-14 Koninklijke Philips Electronics N.V. Wafer with optical control modules in ic fields
KR20060117974A (ko) 2003-12-23 2006-11-17 코닌클리즈케 필립스 일렉트로닉스 엔.브이. 다이싱 경로에 광 제어 모듈을 구비한 웨이퍼
JP2007517392A (ja) 2003-12-23 2007-06-28 コーニンクレッカ フィリップス エレクトロニクス エヌ ヴィ 露光領域において光学制御モジュールを有するウエハ
US7193296B2 (en) * 2004-01-26 2007-03-20 Yamaha Corporation Semiconductor substrate
EP1754256B1 (de) 2004-05-28 2012-01-11 Nxp B.V. Chip mit zwei gruppen von chipkontakten
WO2005117115A1 (en) 2004-05-28 2005-12-08 Koninklijke Philips Electronics N.V. Chips with useful lines and dummy lines
US7239163B1 (en) * 2004-06-23 2007-07-03 Ridgetop Group, Inc. Die-level process monitor and method
JP2006030318A (ja) * 2004-07-12 2006-02-02 Sanyo Electric Co Ltd 表示装置
US7223673B2 (en) * 2004-07-15 2007-05-29 Taiwan Semiconductor Manufacturing Company, Ltd. Method of manufacturing semiconductor device with crack prevention ring
JP2006038987A (ja) * 2004-07-23 2006-02-09 Seiko Epson Corp 表示装置、表示装置の製造方法、電子機器
WO2006013508A2 (en) 2004-07-26 2006-02-09 Koninklijke Philips Electronics N.V. Wafer with improved conductive loops in the dicing lines
KR20070045359A (ko) 2004-08-31 2007-05-02 코닌클리즈케 필립스 일렉트로닉스 엔.브이. 적어도 하나의 테스트 컨택트 구조를 포함하는 칩과 이를포함한 웨이퍼
FR2884045A1 (fr) * 2005-03-29 2006-10-06 St Microelectronics Sa Identification d'un circuit integre de reference pour equipement de prise et pose
US8653202B2 (en) * 2005-06-06 2014-02-18 Toray Industries, Inc. Adhesive composition for semiconductor, semiconductor device making use of the same and process for producing semiconductor device
US7295642B2 (en) * 2005-06-30 2007-11-13 Teradyne, Inc. Jitter compensation and generation in testing communication devices
JP2007067372A (ja) * 2005-08-03 2007-03-15 Matsushita Electric Ind Co Ltd 半導体装置
EP2127473B1 (de) * 2007-01-22 2015-08-26 Panasonic Intellectual Property Management Co., Ltd. Blattheizelement
US20080290340A1 (en) * 2007-05-23 2008-11-27 Texas Instruments Incorporated Method for fabricating a semiconductor device having embedded interconnect structures to improve die corner robustness

Also Published As

Publication number Publication date
EP2168156A2 (de) 2010-03-31
DE602008003128D1 (de) 2010-12-02
EP2168156B1 (de) 2010-10-20
WO2009007929A3 (en) 2009-04-02
US9620456B2 (en) 2017-04-11
CN101689541A (zh) 2010-03-31
CN101689541B (zh) 2012-01-25
WO2009007929A2 (en) 2009-01-15
US20100140748A1 (en) 2010-06-10

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