WO2024129107A1

WO2024129107A1 - Envelope tracking methods and apparatus

Info

Publication number: WO2024129107A1
Application number: PCT/US2022/053264
Authority: WO
Inventors: Mykhaylo Teplechuk
Original assignee: Zeku, Inc.
Priority date: 2022-12-16
Filing date: 2022-12-16
Publication date: 2024-06-20

Abstract

A radio frequency (RF) power amplifier of a transmitter is provided with a power supply having a voltage magnitude that is dependent, at least in part, on the envelope of the signal to be transmitted. This envelope tracking approach generates a plurality of voltage levels which are coupled to an analog multiplexer, the output of which is coupled to the power supply inputs of a linear amplifier and a DC-DC converter. The analog multiplexer selects one of the generated plurality of voltage levels based, at least in part, on the intended amplitude of the transmit signal. The DC-DC converter output is coupled to the power supply terminal of the RF power amplifier, and the linear amplifier output is AC coupled to the power supply terminal of the RF power amplifier. The linear amplifier may be configured for unity gain, and receive an analog envelope signal at one of its inputs.

Description

ENVELOPE TRACKING METHODS AND APPARATUS

BACKGROUND

[0001] The present disclosure relates to wireless communication systems, and more particularly relates to reducing power consumption, improving battery life, system efficiency, and linearity through the use of envelope tracking while concurrently achieving a desired linearity in power amplifier performance.

[0002] Advances in semiconductor manufacturing technologies, together with advances in computer-aided design tools, have led to the design and production of integrated circuits having vast amounts of memory and computational resources thereon. This has led to correspondingly large increases in the functionality and complexity of integrated circuits, including in the field of wireless communications in general, and in particular consumer electronics products for wireless communication. In turn, the increased utility and functionality of consumer electronics wireless communication products, enabled by improvements in underlying technologies, has, at least in part, driven consumer demand for higher data rates and longer battery life. One area of development for higher data rates and longer battery life has been improvements to power amplifier efficiency.

[0003] One of the general approaches to improving power amplifier efficiency is referred to as envelope tracking.

SUMMARY

[0004] Various embodiments in accordance with the present disclosure provide a radio-frequency (RF) power amplifier with a power supply having a voltage magnitude that is dependent, at least in part, on the envelope of the signal to be transmitted. This envelope tracking approach generates a plurality of voltage levels which are coupled to an analog multiplexer, the output of which is coupled to the power supply inputs of a linear amplifier and a DC-DC converter. The analog multiplexer selects one of the generated plurality of voltage levels based, at least in part, on the intended amplitude of the transmit signal. In the typical case, the intended amplitude is the amplitude after a digital predistortion algorithm has been performed, and the pre-distorted digital transmit data has been converted to analog form. The DC-DC converter output is coupled to the power supply terminal of the RF power amplifier, and the linear amplifier output is capacitively coupled (i.e., AC-coupled) to the power supply terminal of the RF power amplifier. The linear amplifier may be configured for unity gain, and receive an analog envelope signal at one of its inputs. It will be appreciated that the linear amplifier may alternatively be configured in a non-unity gain configuration, or configured as a multiple-gain cascade of gain blocks. For example, an input gain block followed by an output gain block. Those skilled in the art and having the benefit of the present disclosure will understand that various implementation-dependent timing constraints need to be met. For example, the analog envelope signal should arrive at the linear amplifier long enough in advance of the analog transmit signal’s arrival at the RF power amplifier to allow for propagation delay, phase delay, group delay, and so on. In this way, the RF power amplifier is said to be synchronized in time with the envelope signal on its supply voltage, which is driven by the change to the linear amplifier’s output, itself responsive to the analog envelope signal. It is noted that not only does the PA input signal need to be synchronized in time with the envelope signal, but both rails of the PA power supply need to be synchronized in time with each other, as well as with the analog envelope signal. Those skilled in the art and having the benefit of this disclosure will recognize that being “synchronized in time” means that the signals and power rails referred to have a known and systematically defined timing relationship to each other, and changes in these signals and power supplies may occur at different points in time but within the known timing relationship.

[0005] According to one aspect of the present disclosure, a power supply for a power amplifier, includes a first DC-DC converter having a plurality of voltage supply output terminals, an envelope multi-level controller having a plurality of level-selector-signal output terminals, and an analog envelope signal output terminal, a level -selector having a plurality of voltage supply input terminals, a plurality of level-selector-signal input terminals, and a selected-voltage-level output terminal, a linear amplifier having a first input terminal, a second input terminal, a first power-supply terminal, a second powersupply terminal, and an output terminal, a capacitor having a first terminal and a second terminal, a second DC-DC converter having a control input terminal, a first power-supply terminal, a second power-supply terminal, and an output terminal, a power amplifier having an input terminal, an output terminal, a first power-supply terminal coupled to the second terminal of the capacitor (i.e., the node to which the output terminal of the second DC-DC converter is coupled), and a second power-supply input terminal, wherein each one of the voltage supply output terminals of the first DC-DC converter are coupled to a corresponding one of the voltage supply input terminals of the level-selector, wherein the selected-voltage-level output terminal is coupled to the first power-supply input terminal of the linear amplifier and to the first power-supply input terminal of the second DC-DC converter, and wherein the first terminal of the capacitor is coupled to the output terminal of the linear amplifier, and the second terminal of the capacitor is coupled to the output terminal of the second DC-DC converter.

[0006] According to another aspect of the present disclosure, a power supply for a power amplifier, includes a first DC-DC converter having a plurality of voltage supply output terminals, an envelope multi-level controller having a plurality of level-selectorsignal output terminals, and an analog envelope signal output terminal, a first levelselector having a plurality of first voltage supply input terminals, a plurality of first levelselector-signal input terminals, and a first selected-voltage-level output terminal, a second level-selector having a plurality of second voltage supply input terminals, a plurality of second level-selector-signal input terminals, and a second selected-voltage-level output terminal, a linear amplifier having a first input terminal, a second input terminal, a first power-supply terminal, a second power-supply terminal, and an output terminal, a capacitor having a first terminal and a second terminal, a second DC-DC converter having a control signal input terminal, a first power-supply terminal, a second power-supply terminal, and an output terminal; and a power amplifier having an input terminal, an output terminal, and a first power-supply terminal coupled to the second terminal of the capacitor, and a second power-supply terminal, wherein each one of the voltage supply output terminals of the first DC-DC converter is coupled to a corresponding one of the voltage supply input terminals of the first level-selector, wherein each one of the voltage supply output terminals of the first DC-DC converter is coupled to a corresponding one of the voltage supply input terminals of the second level-selector, wherein the first selected- voltage-level output terminal is coupled to the first power-supply terminal of the linear amplifier and to the first power-supply terminal of the second DC-DC converter, and wherein the first terminal of the capacitor is coupled to the output terminal of the linear amplifier, and the second terminal of the capacitor is coupled to the output terminal of the second DC-DC converter.

[0007] According to another aspect of the present disclosure, a front end of an RF transceiver, includes a receive path configured to receive an analog RF input signal, and further configured to generate a digital baseband receive signal, a transmit path, including a power amplifier, the transmit path configured to receive a digital baseband transmit signal, generate a digitally pre-distorted baseband transmit signal, generate an analog version of the digitally pre-distorted baseband transmit signal, and amplify the analog version of the digitally pre-distorted baseband transmit signal, wherein the power amplifier has an input terminal, an output terminal, a first power-supply terminal and a second power supply terminal, and an envelope tracking path, the envelope tracking path includes a first DC-DC converter having a plurality of voltage supply output terminals, an envelope multi-level controller having a plurality of level-selector control output terminals, and an envelope signal output terminal, a first level -selector having a plurality of first voltage supply input terminals, a plurality of first level-selector control input terminals, and a first selected-voltage-level output terminal, a linear amplifier having a first input terminal, a second input terminal, a first power-supply terminal, a second power-supply terminal, and an output terminal, a capacitor having a first terminal and a second terminal, a second DC-DC converter having a control input terminal, a first power-supply terminal, a second power-supply terminal, and an output terminal, wherein each one of the voltage supply output terminals of the first DC-DC converter is coupled to a corresponding one of the voltage supply input terminals of the first level-selector, wherein the first selected-voltage-level output terminal is coupled to the first powersupply terminal of the linear amplifier and to the first power-supply terminal of the second DC-DC converter, wherein the first terminal of the capacitor is coupled to the output terminal of the linear amplifier, and the second terminal of the capacitor is coupled to the output terminal of the second DC-DC converter; and wherein the second terminal of the capacitor is further coupled to the first power-supply terminal of the power amplifier.

[0008] These illustrative embodiments are mentioned not to limit or define the present disclosure, but to provide examples to aid understanding thereof. Additional embodiments are discussed in the Detailed Description, and further description is provided there.

BRIEF DESCRIPTION OF THE DRAWINGS

[0009] The accompanying drawings, which are incorporated herein and form a part of the specification, illustrate embodiments of the present disclosure and, together with the description, further serve to explain the principles of the present disclosure and to enable a person skilled in the pertinent art to make and use the present disclosure.

[0010] FIG. l is a system diagram of an example wireless communication network. [0011] FIG. 2 is a high-level block diagram of an illustrative example of a transceiver front end.

[0012] FIG. 3 A is a high-level schematic diagram illustrating a multi-level envelope tracking architecture in accordance with the present disclosure.

[0013] FIG. 3B is a high-level schematic diagram illustrating an alternative multilevel envelope tracking architecture in accordance with the present disclosure.

[0014] FIG. 3C is a high-level schematic diagram illustrating another alternative multi-level envelope tracking architecture in accordance with the present disclosure.

[0015] FIG. 4A is a high-level schematic block diagram illustrating a floating multilevel envelope tracking architecture in accordance with the present disclosure.

[0016] FIG. 4B is a high-level schematic block diagram illustrating an alternative embodiment of the floating multi-level envelope tracking architecture in accordance with the present disclosure.

[0017] FIG. 4C is a high-level schematic block diagram illustrating another alternative embodiment of the floating multi-level envelope tracking architecture in accordance with the present disclosure

[0018] FIG. 4D is a high-level schematic block diagram illustrating yet another alternative embodiment of the floating multi-level envelope tracking architecture in accordance with the present disclosure.

[0019] FIG. 4E is a waveform diagram showing the general relationship between FVDD, Envelope Tracking, and FVSS.

[0020] Embodiments of the present disclosure will be described with reference to the accompanying drawings.

DETAILED DESCRIPTION

[0021] Many electronic products including, but not limited to, wireless communication devices, are powered by one or more power supplies, typically including batteries. Some of these wireless communication devices may contain several transmitters. And, because envelope tracking may also be used for reducing power consumption in base station transmitters, various embodiments in accordance with the present invention may be applicable to base station transmitters, as well as other applications where energy efficiency needs to be considered.

[0022] Various embodiments of the present disclosure help improve the linearity of RF power amplifier performance while reducing the amount of power needed to achieve this linearity.

[0023] In wireless communication devices, an RF power amplifier (PA) is used to drive a transmit signal, such as a modulated carrier, onto an antenna for transmission. It is desirable for a PA to have linear characteristics, i.e., a linear relationship of amplitude and phase between the transmit signal at the PA input and the transmit signal at the PA output. In many real-world PA implementations, the PA performs in a nominally linear or mildly nonlinear manner over a first portion of its operating range, but does not maintain a linear relationship between its input and output over the entirety of its operating range. This may be the case for systems in which the transmit signal is at least partially modulated by amplitude. In some wireless communication devices, the linearity of the PA decreases when the amplitude of the PA input signal increases (although this relationship between PA linearity and input amplitude itself is not necessarily linear).

[0024] The range over which the PA performs linearly may depend on the magnitude of the PA’s voltage supply relative to the magnitude of the modulated transmit signal at the input of the PA. Consequently, various approaches to improving PA linearity for amplitude modulated transmit signals include increasing the power supply voltage to the PA. However, the increased power supply voltage to the PA results in wasted power consumption when the amplitude of the PA input (i.e., the transmit signal before the PA stage) allows linear operation of the PA with a lower power supply voltage.

[0025] Because so many wireless communication products are battery powered, it is desirable to reduce wasted power consumption and thereby extend battery life. One general approach to solving this problem is to make the magnitude of the PA power supply voltage track the magnitude of transmit signal that is input to the PA. In other words, the power supply voltage provided to the PA is increased or decreased in accordance with the increased or decreased magnitude of the transmit signal that is input to the PA. In this way, the PA power supply voltage may be reduced when the transmit signal provided to the PA is less than an amount that would otherwise require an increased power supply voltage to maintain the linearity of the PA. This general approach may be referred to as “envelope tracking.” [0026] As mentioned above, the general approach of envelope tracking provides a variable power supply voltage to the PA of a transmitter. Without envelope tracking a fixed power supply voltage is provided to the PA. A characteristic of the PA is that power amplifier efficiency is variable with the magnitude of the input signal, which typically peaks at a certain output power. Below and above this peak, the power amplifier efficiency drops substantially. And, as the power amplifier efficiency drops, unnecessary power loss increases. However, providing a variable power supply voltage in accordance with envelope tracking provides a trajectory for preserving maximum efficiency.

[0027] Various embodiments in accordance with the present disclosure relate to the field of multi-level envelope tracking systems. Envelope tracking (ET) is a way to provide power to a linear RF power amplifier in, for example, a modern wireless communication product. That is, to provide voltages and currents to the PA that are related, at least in part, to the amplitude of the transmit signal at the input of the PA such that the desired linearity of the PA is achieved while concurrently reducing the amount of energy wasted as compared to prior wireless communication systems.

[0028] As described in greater below, various embodiments of the present disclosure may provide a power supply voltage to an RF power amplifier that is a combination of a DC component and/or an AC component.

[0029] Although specific configurations and arrangements are discussed, it should be understood that this is done for illustrative purposes only. A person skilled in the pertinent art and having the benefit of the present disclosure will recognize that other configurations and arrangements can be used without departing from the spirit and scope of the present disclosure. It will be apparent to a person skilled in the pertinent art that the present disclosure can also be employed in a variety of other applications that benefit from linear performance of RF power amplifiers and from a reduction of wasted power.

[0030] It is noted that references in the specification to “one embodiment,” “an embodiment,” “an example embodiment,” “an illustrative embodiment,” “some embodiments,” “certain embodiments,” etc., indicate that the embodiment described may include a particular feature, structure, or characteristic, but every embodiment may not necessarily include the particular feature, structure, or characteristic. Moreover, such phrases do not necessarily refer to the same embodiment. Further, when a particular feature, structure, or characteristic is described in connection with an embodiment, it would be within the knowledge of a person skilled in the pertinent art to effect such feature, structure, or characteristic in connection with other embodiments whether or not explicitly described.

[0031] In general, terminology may be understood at least in part from usage in context. For example, the term “one or more” as used herein, depending at least in part upon context, may be used to describe any feature, structure, or characteristic in a singular sense or may be used to describe combinations of features, structures or characteristics in a plural sense. Similarly, terms, such as “a,” “an,” or “the,” again, may be understood to convey a singular usage or to convey a plural usage, depending at least in part upon context. In addition, the term “based on” may be understood as not necessarily intended to convey an exclusive set of factors and may, instead, allow for existence of additional factors not necessarily expressly described, again, depending at least in part on context.

[0032] Aspects of the present disclosure will now be described with reference to various apparatus and methods. These apparatus and methods will be described in the following detailed description and illustrated in the accompanying drawings by various blocks, modules, units, components, circuits, steps, operations, processes, algorithms, etc. (collectively referred to as “elements”). These elements may be implemented using electronic hardware, firmware, computer software, or any combination thereof. Whether such elements are implemented as hardware, firmware, or software depends upon the particular application, and the design and cost constraints imposed on the overall system.

[0033] Various acronyms are used in the present disclosure. For convenience, the acronyms commonly used herein are listed below, and in some instances further include explanations.

[0034] CMOS refers to Complementary Metal Oxide Semiconductor. More generally, CMOS refers to circuits that include both p-channel and n-channel field effect transistors. In this field, a semiconductor manufacturing process that produces both p- channel and n-channel transistors, is sometimes referred to as a CMOS process.

[0035] DSP refers to Digital Signal Processor. Generally, a digital signal processor is a specialized type of microprocessor designed to perform digital signal processing algorithms more quickly and more power efficiently than a general purpose microprocessor is capable of performing the same digital signal processing algorithms. [0036] As used herein, “terminal” refers to a connection point, or to a node. When two or more terminals are connected, a single node is formed. When two or more nodes are coupled, there may be one or more elements disposed between those two or more nodes. Being “connected” is a subset of being coupled.

[0037] An illustrative example of a modern wireless communication network 100 is shown in FIG. 1. Wireless communication network 100 of FIG. 1 shows a plurality of different consumer electronic products that are each configured to wirelessly communicate. It is noted that wireless communication network 100 is not limited to the number of devices illustrated and may have more or fewer such devices. In this illustrative example, the various devices are each equipped with the hardware resources needed to transmit data to, and receive data from, at least a wireless access point. Thus each of these devices may be said to have a wireless transceiver. Further, it can be seen in FIG. 1 that a number of the illustrated devices are mobile devices, such as but not limited to, mobile phones, smart phones, personal digital assistants, laptop computers, and the like. It will be understood that mobile devices are typically battery powered, and therefore it is desirable to extend battery life by reducing or eliminating wasted power consumption in these devices.

[0038] Still referring to FIG. 1, illustrative wireless communication network 100 includes a first wireless access point 102 wirelessly coupled to a desktop computer 104, a hand-held mobile device 106, a first smart phone 108, a cellular phone 110, a laptop computer 112, a home network 114, a second smart phone 116, a personal digital assistant 118, and a second wireless access point 120.

[0039] Various embodiments of the present disclosure may be implemented in, for example, but not limited to, a transceiver front end of a wireless communication product. To provide context for a description of the problems with previous circuits, and the advantages of solutions in accordance with the present disclosure, a generalized description of a transceiver front end is provided below.

[0040] FIG. 2 is a high-level block diagram of an illustrative example of a transceiver front end 200 that includes envelope tracking. Transceiver front end 200 typically includes a transmit (TX) path 202, which itself includes a digital predistortion (DPD) block 204, coupled to a digital -to-analog converter (DAC) 206, and a power amplifier (PA) 208. DPD block 204 is coupled to receive a digital baseband transmit signal, predistort the received digital baseband transmit signal to compensate for predetermined amplitude-modulation-to-amplitude modulation (AM-AM) or amplitude-modulation-to- phase-modulation (AM-PM) non-linearities in PA performance, and is configured to provide the predistorted digital baseband signal as an output. DAC 206 is coupled to receive the predistorted digital baseband transmit signal from DPD block 204, and configured to convert the predistorted digital baseband transmit signal to an analog representation of the predistorted baseband transmit signal. PA 208 is coupled to receive the analog representation of the predistorted baseband transmit signal and amplify it. PA 208 is also coupled to a power supply generated by an envelope tracking path 214 (described below). In this illustrative example of a transceiver front end, PA 208 is further coupled to an antenna interface that, in turn, is coupled to an antenna 212.

[0041] Still referring to FIG. 2, envelope tracking path 214 includes an envelope signal conditioner/shaper/generator block 216 coupled to receive the digital baseband transmit signal, and configured to provide an envelope signal as an output. Envelope tracking path 214 further includes an envelope tracking power supply 218 that is coupled to receive the envelope signal from envelope signal generator block 216, and coupled to receive power from, for example, a battery or any other suitable external power supply such as, but not limited to, a boost converter. Envelope tracking power supply 218 is configured to provide, as an output, a voltage having a magnitude that is controlled by the envelope signal input thereto.

[0042] Still referring to FIG. 2, a receive path 220 includes a low noise amplifier (LNA) 222 coupled to receive input from antenna interface 210, an analog-to-digital converter (ADC) 224 coupled to receive input from low noise amplifier 222, and a digital receiver block 226 coupled to receive input from ADC 224, and configured to provide a digital baseband received signal.

[0043] FIG. 3 A is a high-level schematic diagram of an embodiment 300A that illustrates a multi-level envelope tracking architecture in accordance with the present disclosure. In this embodiment, an envelope-tracking power supply for an RF power amplifier is configured to provide a DC component from a multiple-fixed-level DC-DC converter, and an AC component from a linear amplifier, as the power supply to the RF power amplifier. It is noted that the level selector can switch with the full required or specified bandwidth of the ET signal. In this embodiment, both the DC component and the AC component may be based, at least in part, on the analog envelope of the transmit signal. That is, (a) the supply voltage of the DC-DC converter may be selected from one or more available DC levels based on the envelope control signal of the analog transmit signal, which in turn affects the magnitude of the DC component; and (b) the AC component is the analog envelope capacitively coupled (i.e., AC-coupled) from the output of the linear amplifier onto the RF power amplifier’s power supply input terminal VCC PA). While the illustrative embodiment of this architecture shown in FIG. 3 A uses both a linear amplifier and a DC-DC converter to provide a power supply to an RF power amplifier, alternative embodiments can be implemented using the DC-DC converter without the linear amplifier (see FIG. 3B) or the linear amplifier without the DC-DC converter (see FIG. 3C). Additional details of the architecture are provided below.

[0044] Referring to Fig. 3 A, a battery terminal 302 is shown coupled to a step-down DC-DC converter 304 that has a plurality of voltage supply output terminals. A levelselector 306 has a plurality of voltage supply input terminals. Each voltage supply output terminal of DC-DC converter 304 is coupled to a corresponding voltage supply input terminal of level-selector 306. The connections between the voltage supply output terminals of DC-DC converter 304 and the voltage supply input terminals of level-selector 306 are labelled VI through Vn. The actual number, “n,” of supply voltage output terminal/supply voltage input terminal pairs is a matter of design choice for any particular implementation and can be made by those skilled in the art based on the specifics of that particular implementation including, but not limited to, cost, performance parameters of other circuit components such as but not limited to a linear amplifier and an RF power amplifier, power budget, available space, reliability, and so on. VI through Vn represent the voltages/levels generated by DC-DC converter 304 and received by level-selector 306. It is noted that, in some embodiments, the magnitude of the voltage levels at the voltage supply output terminals of DC-DC converter 304 may be different from each other by nominally equal increments, while in other embodiments may be different from each other by non-equal increments, or combinations of equal and non-equal increments. It is noted that both DC-DC converter and level-selector 306 may be implemented as a single block.

[0045] The voltage supply output terminals of DC-DC converter 304 each provide a voltage wherein each of VI through Vn is less than or equal to Vbat. Battery terminal 302 is labelled “Vbat,” which refers to the voltage provided to the DC-DC converter 304. A battery is not shown in FIG. 3, but it will be appreciated that this is the physical pathway for providing a power supply voltage (i.e., Vbat or any other suitable externally available supply such as, but not limited to, a boost converter or buck-boost supply connected to the battery) to DC-DC converter 304. The operation of this circuit is not dependent upon whether the source of Vbat is a battery, or any other suitable type of DC power supply (including, but not limited to, a buck/boost converter).

[0046] It is noted that although in this illustrative embodiment, each of VI through Vn is less than or equal to the input voltage (i.e., Vbat), it is possible to modify or replace the circuitry of DC-DC converter 304, to include the circuitry for a boost-buck DC-DC converter. In this way, it is possible for at least one of VI through Vn to be greater than Vbat.

[0047] Still referring to FIG. 3 A, level-selector 306 is an analog multiplexer. Levelselector 306 receives a plurality of DC voltage levels (VI - Vn) from DC-DC converter 304 and passes a selected one of those voltages to an output terminal referred to herein as the selected-voltage-level output terminal. The selection of the one voltage to be passed from a voltage supply input terminal of level-selector 306 to the selected-voltage-level output terminal of level-selector 306 is based on a level-selector-signal generated by an envelope multi-level controller 308 and provided to level-selector 306. The level-selectorsignal is an N-bit wide digital signal (where N is an integer greater than or equal to 1) that, in some embodiments, is decoded by level-selector 306 to determine which one of the voltage levels VI - Vn is selected and passed to the selected-voltage-level output terminal of level-selector 306. In some alternative embodiments, the N-bit wide level-selectorsignal is not encoded, but instead the number of bits N is the same as the number of voltage levels VI - Vn, only one of the N-bits is allowed to be asserted at a time, and the N-bit wide level-selector-signal directly specifies which voltage level is selected to be passed to the selected-voltage-level output terminal of level-selector 306. Level -selector 306 may be thought of as a high-power DC-to-AC converter and or as a Power Digital-to- Analog converter, or simply a Power DAC. It is noted that a DC-DC converter may be a single block as illustrated here, or may be arranged as a number of blocks, or subpartitioned into a number of sub-blocks. For example, this DC-DC converter 304 can be for the same purpose separated into a cascade or cascode of different blocks that create output levels by integer or fractional division ratio of input voltage Vbat. For example, Vbat/2, Vbat/3, Vbat*2/3, Vbat/4, and so on.

[0048] In this architecture, voltage levels VI - Vn, are pre-generated and then selected by way of level-selector 306, rather than having DC-DC converter directly respond to envelope multi-level controller 308 in terms of selecting a voltage level to generate. This pre-generated voltage level and analog multiplexor arrangement of the illustrated embodiment provides a faster response, high bandwidth, and reduces or eliminates performance issues with envelope fast slew rates when switching between voltage levels.

[0049] In the illustrative embodiment of FIG. 3 A, envelope multi-level controller 308 is a block of circuitry that generates both digital and analog outputs. It will be understood that envelope multi-level controller 308 may be represented by any number of blocks, or partitioned into different arrangements of sub-blocks, and still be within the scope of the present disclosure. Generating the N-bit wide digital level-selector-signal may be achieved by any suitable digital logic technology including, but not limited to, logic gates, a microcontroller, a field programmable gate array, and so on.

[0050] Still referring to FIG. 3 A, a linear amplifier 310, a DC-DC converter 312, and a capacitor 314, are configured to generate the positive supply rail for an RF power amplifier 316. in this illustrative embodiment, the positive floating supply rail (labelled FVDD in the figure) for linear amplifier 310 and DC-DC converter 312 is supplied by the selected-voltage-level output terminal of level-selector 306. The DC voltage output of DC-DC converter 312 is coupled to RF power amplifier 316, and further coupled to a second terminal of capacitor 314. The output of linear amplifier 310 is coupled to a first terminal of capacitor 314. A first input terminal of linear amplifier 310 is coupled to receive an analog envelope signal from envelope multi-level controller 308. In this way, DC-DC converter 312 provides a DC component of the power supply for RF power amplifier 316; and linear amplifier 310 is capacitively coupled (i.e., AC-coupled) to provide an AC component of the power supply for RF power amplifier 316. It is noted that in this arrangement the DC-DC converter may have the further advantage of providing an AC component in addition to a DC component. This may be achieved by making the DC-DC converter process the signal at a faster rate. In this way, the DC-DC converter changes to a DC-AC converter, and the linear amplifier, which remains the same, provides the remainder of the linear AC power required by the power amplifier. In some embodiments, DC-DC converter 312 may be controlled by sensing AC (e.g., zero-cross current from the output of linear amplifier 310 or any other appropriate feedback or feedforward control system). The AC component is based, at least in part, on the magnitude of the analog envelope signal received by linear amplifier 310 from envelope multi-level controller 308.

[0051] Still referring to Fig. 3 A, in some embodiments, DC-DC converter 312 may be configured to receive an M-bit wide digital control signal (where M is an integer greater than or equal to 1) that specifies how much to step down the output voltage relative to its positive supply rail. This fast-switching M-bit wide digital control signal is provided to a control input terminal(s) of DC-DC converter 312 by envelope multi-level controller 308.

[0052] In the context of the foregoing paragraph, the term “fast-switching” is meant to indicate that the entire bandwidth (or partial bandwidth) of the envelope tracking signal is being processed by a fast-switching DC-DC converter (and its functional load is changed to become DC-AC. In other words, this DC-DC/AC converter is meant to operate over the entire required envelope signal bandwidth. Normally, a DC-DC converter operates at a limited, or restricted, switching frequency (e.g., <1 MHz to 10 MHz), which is due to a required connection to a higher input voltage such as provided by a battery (e.g., ~5V). However, this switching frequency limitation does not exist in embodiments of the architecture in accordance with the present disclosure. With reference to the embodiment of Fig. 4A, since the supplies are floating with the signal, they can be made small, for example about 500mV or IV, and in this condition, switching losses limiting a DC-DC converter are reduced thereby improving efficiency. Thus, the DC-DC converter may be used at a higher switching frequency (e.g., >100 MHz).

Advantageously, because power supply voltage is reduced by architectures in accordance with the present disclosure, the DC-DC converter need not be implemented with transistors designed to withstand higher voltages (e.g., power switching devices), but instead may be implemented with faster transistors, which are sometimes referred to as “logic” devices or “core” devices. Implementations using these faster transistors may result in further improved efficiency and/or increased operating frequency.

[0053] In some alternative embodiments, the information in the N-bit wide levelselector-signal is enough to specify to DC-DC converter 312 how much to step down the output voltage relative to its positive supply rail. In this case, the control input terminal(s) of DC-DC converter 312 may be coupled to the N-bit wide level -selector signal, and it is unnecessary to additionally generate the M-bit wide control signal.

[0054] As shown in Fig. 3 A, the output terminal of RF power amplifier 316 is coupled to an antenna 318. [0055] Referring to FIG. 3B, an alternative embodiment 300B of the architecture in accordance with the present disclosure is shown. Alternative embodiment 300B is similar to embodiment 300A, except that (1) linear amplifier 310 and capacitor 314 are not used; and (2) DC-DC converter 312 has been replaced with a fast step-down DC-AC power converter 312B.

[0056] Referring to FIG. 3C, another alternative embodiment 300C of the architecture in accordance with the present disclosure is shown. Alternative embodiment 300C is similar to embodiment 300A, except that DC-DC converter 312 and capacitor 314 are not used.

[0057] FIG. 4A is a high-level schematic block diagram illustrating a floating multilevel envelope tracking architecture in accordance with the present disclosure. The illustrative embodiment 400A of FIG. 4A is similar to the illustrative embodiment of FIG. 3 A, but introduces additional circuitry to provide greater control over the operation of the power supply for an RF power amplifier in the transmit path of a wireless communication device, as well as higher performance.

[0058] Referring to FIG. 4A, a battery terminal 402 is shown coupled to a step-down DC-DC converter 404 that has a plurality of voltage supply output terminals. A first levelselector 406A has a plurality of voltage supply input terminals. Each voltage supply output terminal of DC-DC converter 404 is coupled to a corresponding voltage supply input terminal of first level-selector 406A. Similarly, a second level-selector 406B has a plurality of voltage supply input terminals. Each voltage supply output terminal of DC- DC converter 404 is coupled to a corresponding voltage supply input terminal of second level-selector 406B.

[0059] The connections between the voltage supply output terminals of DC-DC converter 404 and the voltage supply input terminals of first level-selector 406A and second level-selector 406B are labelled VI through Vn. The actual number, “n,” of supply voltage output terminal/ supply voltage input terminal pairs is a matter of design choice for any particular implementation and can be made by those skilled in the art based on the specifics of that particular implementation including, but not limited to, cost, performance parameters of other circuit components such as but not limited to a linear amplifier and an RF power amplifier, power budget, available space, reliability, and so on. VI through Vn represent the voltages generated by DC-DC converter 404 and received in parallel by level-selector 406A and level-selector 406B. It is noted that, in some embodiments, the magnitude of the voltage levels at the voltage supply output terminals of DC-DC converter 404 may be different from each other by nominally equal increments, while in other embodiments may be different from each other by non-equal increments, or combinations of equal and non-equal increments.

[0060] The voltage supply output terminals of DC-DC converter 404 each provide a voltage wherein each of VI through Vn is less than or equal to Vbat. Battery terminal 402 is labelled “Vbat,” which refers to the input voltage provided to DC-DC converter 404. A battery is not shown in FIG. 4A, but it will be appreciated that this is the physical pathway for providing a power supply voltage (i.e., Vbat) to DC-DC converter 404. The operation of this circuit is not dependent upon whether the input source of Vbat is a battery, or any other type of DC power supply. Same considerations as in Figs. 3A - 3C for buck/boost or buck-boost supplies.

[0061] It is noted that although in this illustrative embodiment each of VI through Vn is less than or equal to Vbat, it is possible to modify or replace the circuitry of DC-DC converter 404, to include the circuitry for a boost-buck DC-DC converter. In this way, it is possible for at least one of VI through Vn to be greater than Vbat.

[0062] Still referring to FIG. 4A, first level-selector 406A is an analog multiplexer, and second level-selector 406B is an analog multiplexer. First level-selector 406A receives a plurality of DC voltage levels (VI - Vn) from DC-DC converter 404 and passes a selected one of those voltages to an output terminal referred to herein as the first selected-voltage-level output terminal. The selection of the one voltage to be passed from a voltage supply input terminal of first level-selector 406A to the selected-voltage-level output terminal of first level-selector 406A is based on a level-selector-signal generated by an envelope multi-level controller 408 and provided to first level-selector 406A.

Similarly, second level-selector 406B receives a plurality of DC voltage levels (VI - Vn) from DC-DC converter 404 and passes a selected one of those voltages to an output terminal referred to herein as the second selected-voltage-level output terminal. The selection of the one voltage to be passed from a voltage supply input terminal of second level-selector 406B to the selected-voltage-level output terminal of second level-selector 406B is based on the level-selector-signal generated by the envelope multi-level controller 408 and provided to second level-selector 406B. [0063] The level-selector-signal is an N-bit wide digital signal (where N is an integer greater than or equal to 1) that, in some embodiments, is decoded by first level-selector 406A to determine which one of the voltage levels VI - Vn is selected and passed to the selected-voltage-level output terminal of first level -selector 406A. Similarly, the N-bit level-selector-signal is decoded by second level-selector 406B to determine which one of the voltage levels VI - Vn is selected and passed to the selected-voltage-level output terminal of selected level -selector 406B.

[0064] In some alternative embodiments, the N-bit wide level-selector-signal is not encoded, but instead the number of bits N is the same as the number of voltage levels VI - Vn, by design only one of the N-bits is allowed to be asserted at a time, and the N-bit wide level-selector-signal directly specifies which voltage level is selected to be passed to the selected-voltage-level output terminal of first level -selector 406A. Likewise, the N-bit wide level-selector-signal directly specifies which voltage level is selected to be passed to the selected-voltage-level output terminal of second level-selector 406B.

[0065] In this architecture example, voltage levels VI - Vn, are pre-generated and then selected by way of first and second level-selectors 406A, and 406B rather than having DC-DC converter directly respond to envelope multi-level controller 408 in terms of selecting a voltage level to generate. This pre-generated voltage level and analog multiplexer arrangement of the illustrated embodiment provides a faster response and reduces or eliminates performance issues with slew rates when switching between voltage levels.

[0066] Still referring to FIG. 4A, a linear amplifier 410, a DC-DC converter 412, and a capacitor 414, are configured to generate the positive supply rail for an RF power amplifier 416. The positive supply rail (labelled as FVDD in the figure) for linear amplifier 410 and DC-DC converter 412 is supplied by the selected-voltage-level output terminal of first level-selector 406A. Similarly, the “negative” supply rail (labelled as FVSS in the figure) for linear amplifier 410 and DC-DC converter 412 is supplied by the selected-voltage-level output terminal of second level -selector 406B. In this example, FVSS is not necessarily a negative voltage, but rather it is offset by a predetermined amount from FVDD. In other words, FVSS can be a positive voltage, but negative with respect to FVDD.

[0067] First and second level -selectors 406A and 406B may be operated to select different voltage levels for FVDD and FVSS. In this way, the power supply voltage across linear amplifier 410, and the power supply voltage across second DC-DC converter 412 can be controlled, and can be “floated” above the ground node (see FIG. 4E). It is noted that in alternative applications (not necessarily envelope tracking applications), this technique can be applied to negative supplies as well.

[0068] The DC voltage output of DC-DC converter 412 is coupled to the positive supply rail of RF power amplifier 416, and further coupled to a second terminal of capacitor 414. DC-DC converter 412 is implemented to operate at high speed, i.e., to switch at a high frequency. Implementing DC-DC converter 412 to operate at high speed may include using an output inductor with very low DC resistance and/or a low value of inductance. Alternatively, a switched capacitor DC-DC converter may be used. The output of linear amplifier 410 is coupled to a first terminal of capacitor 414. A first input terminal of linear amplifier 410 is coupled to receive an analog envelope signal from envelope multi-level controller 408. In this way, DC-DC converter 412 provides a DC component of the power supply for RF power amplifier 416; and linear amplifier 410 is capacitively coupled (i.e., AC-coupled) to provide an AC component of the power supply for RF power amplifier 416. The AC component is based, at least in part, on the magnitude of the analog envelope signal received by linear amplifier 410 from envelope multi-level controller 408.

[0069] In some alternative embodiments, DC-DC converter 412 may be a fastswitching DC-AC converter, which operates by modulating output current with the help of fast switches, and can be controlled by a digital envelope signal. Depending on the number of voltage levels available via FVDD, DC-AC converter may be designed with a small output inductor (i.e., an output inductor having a low value of inductance), or designed to be inductorless. It is similar to the embodiment shown in Fig. 3B where only DC-DC is used. This alternative arrangement is one example of how this architecture allows fast-switching DC-DC. Alternative embodiments may use a switched capacitor DC-DC converter.

[0070] Still referring to FIG. 4A, in some embodiments DC-DC converter 412 may be configured to receive an M-bit wide digital control signal (where M is an integer greater than or equal to 1) that specifies how much to step down the output voltage relative to its positive supply rail. This M-bit wide digital control signal (labelled ET Ctrl in the figure) is provided to a control input terminal(s) of DC-DC converter 412 by envelope multi-level controller 408.

[0071] In some alternative embodiments, the information in the N-bit wide levelselector-signal is enough to specify to DC-DC converter 412 how much to step down the output voltage relative to its positive supply rail. In this case, the control input terminal(s) of DC-DC converter 412 may be coupled to the N-bit wide level -selector signal, and it is unnecessary to additionally generate the M-bit wide control signal.

[0072] As shown in Fig. 4A the output terminal of RF power amplifier 416 is coupled to antenna 418.

[0073] FIG. 4B is a high-level schematic block diagram illustrating an alternative embodiment of the floating multi-level envelope tracking architecture in accordance with the present disclosure. The illustrative embodiment 400B of FIG. 4B is similar to the illustrative embodiment of FIG. 4 A, but does not use linear amplifier 410, or capacitor 414, and DC-DC converter 412 of FIG. 4A is replaced by DC-AC converter 412B. That is, as shown in FIG. 4B, RF power amplifier 416 is coupled to an output terminal of DC- AC converter 412B, and in operation receives its power supply therefrom. DC-AC converter 412B may be either an inductive type or a switched capacitor type. In other words, unlike the embodiment shown in FIG. 4A, this alternative implementation does not use a linear amplifier and capacitor in generating the positive supply rail voltage for RF power amplifier 416.

[0074] FIG. 4C is a high-level schematic block diagram illustrating another alternative embodiment of the floating multi-level envelope tracking architecture in accordance with the present disclosure. The illustrative embodiment 400C of FIG. 4C is similar to the illustrative embodiment of FIG. 4A, but does not use DC-DC converter 412, or capacitor 414. That is, as shown in FIG. 4C, RF power amplifier 416 is coupled to an output terminal of linear amplifier 410, and in operation receives its power supply therefrom. In other words, unlike the embodiment shown in FIG. 4A, this alternative implementation does not use a DC-DC converter and capacitor in generating the positive supply rail voltage for RF power amplifier 416.

[0075] FIG. 4D is a high-level schematic block diagram illustrating yet another alternative embodiment of the floating multi-level envelope tracking architecture in accordance with the present disclosure. The illustrative embodiment 400D of FIG. 4D is similar to the illustrative embodiment of FIG. 4A, but level-selector 406A is replaced by level-selector 406A-1, level-selector 406B is replaced by level-selector 406B-1, and linear amplifier 410 and DC-DC converter 412 are coupled to different level -selector output terminals, thus allowing the power supply rails of linear amplifier 410 and DC-DC converter 412 to be different from each other

[0076] Still referring to FIG. 4D, level-selector 406A-1 has two output terminals rather than one, and each of those two output terminals provides a voltage level that may be the same as, or different than, the other one of its two output terminals. Likewise, level-selector 406B-1 has two output terminals rather than one, and each of those two output terminals provides a voltage level that may be the same as, or different than, the other one of its two output terminals. In other words, unlike the embodiment shown in FIG. 4A, this alternative embodiment provides a first pair of voltages (FVDD 1 and FVSS l) to the power supply rails of DC-DC converter 412; and a second pair of voltages (FVDD 2 and FVSS 2) to the power supply rails of linear amplifier 410. To achieve this, level-selectors 406A-1 and 406B-1 each contain the circuitry of two analog multiplexers so that each of level-selectors 406A-1 and 406B-1 may provide two independently selected voltage levels as outputs. In various embodiments, each of level -selectors 406A-1 and 406B-1 may be arranged to decode the N-bit wide level-select-signal differently for each of their respective voltage level selections. In various other embodiments, the value of N may be increased so that a wider control signal makes decoding for selection of the voltage levels easier. Alternatively, level-selectors 406A-1 and 406B-1 are each separately coupled to envelope multi-level floating control 408 so as to individually receive a corresponding level-select-signal. That is, rather than sharing an N-bit wide level-select-signal, level -selectors 406A-1 and 406B-1 each receive their own unique level-select-signal.

[0077] Still referring to FIG. 4D, it will be recognized by those skilled in the art that the level-selectors 406A-1 and 406B-1 described herein as having the circuitry of two analog multiplexers may each alternatively be schematically represented as two separate analog multiplexers.

Some Illustrative Embodiments

[0078] Various embodiments, in accordance with the present disclosure, include circuitry to provide power supply voltages to a power amplifier. Typical applications of embodiments in accordance with the present disclosure are providing power supply voltages to an RF power amplifier in an RF transmitter. In accordance with the present disclosure, these power supply voltages provide a greater voltage to the power amplifier when the analog envelope of a transmit signal indicates that increasing the voltage to the power amplifier will provide acceptable linearity for the power amplifier, and provide a lesser voltage to the power amplifier when the analog envelope of a transmit signal indicates that acceptable linearity of the power amplifier can be obtained with a lower power supply voltage and correspondingly lower power consumption. In other words, delivering acceptable power amplifier linearity while using, as near as practically possible, only the power supply level nominally necessary to achieve this performance.

[0079] In one illustrative embodiment, a power supply for a power amplifier, includes a first DC-DC converter having a plurality of voltage supply output terminals. The first DC-DC converter is a step-down converter, which includes circuitry for providing multiple output voltage levels concurrently. An envelope multi-level controller has a plurality of level-selector-signal output terminals, and an analog envelope signal output terminal. The envelope multi-level controller includes circuits configured to generate a multi-bit level-selector-signal and to provide that multi -bit level-selector-signal on its level-selector output terminals. The envelope multi-level controller further includes circuits configured to provide an analog envelope signal at the analog envelope signal output terminal. In some embodiments, the multi -bit level-selector-signal is encoded, while in other embodiments the multi-bit level-selector-signal is not encoded. A levelselector has a plurality of voltage supply input terminals, a plurality of level-selectorsignal input terminals, and a selected-voltage-level output terminal. That is, the voltage supply input terminals of the level-selector are coupled respectively to the voltage supply output terminals of the first DC-DC converter, the level-selector-signal input terminals of the level-selector are coupled respectively to the level-selector output terminals of the envelope multi-level controller. A linear amplifier having a first input terminal, a second input terminal, a first power-supply terminal, a second power-supply terminal, and an output terminal is also included in this illustrative embodiment, which further includes a capacitor having a first terminal and a second terminal, a second DC-DC converter having a control input terminal, a first power-supply terminal, a second power-supply terminal, and an output terminal. Still further, this illustrative embodiment includes a power amplifier having an input terminal, an output terminal, a first power-supply terminal, and a second power-supply input terminal, wherein the first power supply terminal of the power amplifier is coupled to the output terminal of the second DC-DC converter. The output terminal of the second DC-DC converter is further coupled to the second terminal of the capacitor. As indicated above, each one of the voltage supply output terminals of the first DC-DC converter is coupled to a corresponding one of the voltage supply input terminals of the level-selector. And the selected-voltage-level output terminal of the level-selector is coupled to the first power-supply input terminal of the linear amplifier and to the first power-supply terminal of the second DC-DC converter, and the first terminal of the capacitor is coupled to the output terminal of the linear amplifier.

[0080] In some embodiments, the first input terminal of the linear amplifier is coupled to the analog envelope signal output terminal of the envelope multi-level controller; and the second input terminal of the linear amplifier is coupled to the second terminal of the capacitor.

[0081] In some embodiments, the second power-supply terminal of the linear amplifier is coupled to a ground node, and the second power-supply terminal of the second DC-DC converter is coupled to a ground node.

[0082] In some embodiments, the power amplifier is an RF power amplifier.

[0083] Some embodiments, further include a battery coupled to the first DC-DC converter. And may include an antenna coupled to the output terminal of the power amplifier.

[0084] In some embodiments, a level-selector-signal, at the level-selector-signal output terminals, is a digital signal that is N-bits wide.

[0085] In some embodiments, the level-selector-signal is encoded, and the levelselector is configured to generate a decoded level-selector-signal to select one of the plurality of voltage supply input terminals for providing a voltage to the selected-voltage- level output terminal.

[0086] In some embodiments, a level-selector-signal, at the level-selector-signal output terminals, is N bits wide, and N is equal to or greater than the number of voltage supply input terminals of the level-selector, and the level -selector is configured to select, one of the plurality of voltage supply input terminals for providing a voltage to the selected-voltage-level output terminal.

[0087] In some embodiments, the linear amplifier is configured for unity gain, and in other embodiments the linear amplifier is configured for non-unity gain (i.e., providing gain for an input signal or attenuating the input signal).

[0088] In another illustrative embodiment, a power supply for a power amplifier, includes a first DC-DC converter having a plurality of voltage supply output terminals, and an envelope multi-level controller having a plurality of level -selector- signal output terminals, and an analog envelope signal output terminal. In this illustrative embodiment, the first DC-DC converter is a step-down converter, and further includes circuitry for concurrently providing multiple output voltages via its plurality of voltage supply output terminals. This illustrative further includes a first level-selector having a plurality of first voltage supply input terminals, a plurality of first level-selector-signal input terminals, and a first selected-voltage-level output terminal; a second level-selector having a plurality of second voltage supply input terminals, a plurality of second level-selectorsignal input terminals, and a second selected-voltage-level output terminal. In this embodiment, the first level-selector is an analog multiplexer, and second level-selector is also an analog multiplexer. As analog multiplexers, the first and second level -selectors are each coupled to receive a plurality of voltage levels from the first DC-DC converter, and configured to route a selected one of those voltage levels to their respective selected- voltage-level output terminals based on their respective level select signal. This illustrative embodiment further includes a linear amplifier having a first input terminal, a second input terminal, a first power-supply terminal, a second power-supply terminal, and an output terminal; a capacitor having a first terminal and a second terminal; a second DC-DC converter having a control signal input terminal, a first power-supply terminal, a second power-supply terminal, and an output terminal; and a power amplifier having an input terminal, an output terminal, and a first power-supply terminal coupled to the second terminal of the capacitor, and a second power-supply terminal. Each one of the voltage supply output terminals of the first DC-DC converter is coupled to a corresponding one of the voltage supply input terminals of both the first level-selector and the second level-selector. The first selected-voltage-level output terminal is coupled to the first power-supply terminal of the linear amplifier and to the first power-supply terminal of the second DC-DC converter, and the first terminal of the capacitor is coupled to the output terminal of the linear amplifier, and the second terminal of the capacitor is coupled to the output terminal of the second DC-DC converter. In this way, the DC output of the second DC-DC converter is connected to the first power-supply terminal of the power amplifier, and the analog output of the linear amplifier is capacitively coupled

(i.e., AC-coupled) to the first power-supply terminal of the power amplifier.

[0089] In some embodiments, the second power-supply terminal of the linear amplifier is coupled to the second selected-voltage-level output terminal, and the second power-supply terminal of the second DC-DC converter is coupled to the second selected- voltage-level output terminal.

[0090] In some embodiments, the first input terminal of the linear amplifier is coupled to the analog envelope signal output terminal of the envelope multi-level controller; and the second input terminal of the linear amplifier is coupled to the second terminal of the capacitor.

[0091] In some embodiments, the power amplifier is an RF power amplifier, the level-selector-signal is a digital signal that is N-bits wide, and the N-bit wide levelselector-signal is encoded, and the first level-selector is configured to generate a decoded level-selector-signal to select one of the plurality of first voltage supply input terminals for providing a voltage to the first selected-voltage-level output terminal, and wherein the second level-selector is configured to generate a decoded level-selector-signal to select one of the plurality of second voltage supply input terminals for providing a voltage to the second selected-voltage-level output terminal.

[0092] In some embodiments, the level-selector-signal is a digital signal that is N-bits wide, the number of bits in the N-bit wide level-selector-signal is equal to or greater than the number of voltage supply input terminals of the first level -selector, and the second level-selector is configured to select one of the plurality of second voltage supply input terminals for providing a voltage to the second selected-voltage-level output terminal.

[0093] In a further illustrative embodiment, a front end of an RF transceiver, includes a receive path configured to receive an analog RF input signal, and further configured to generate a digital baseband receive signal; a transmit path, including a power amplifier, the transmit path configured to receive a digital baseband transmit signal, generate a digitally pre-distorted baseband transmit signal, generate an analog version of the digitally pre-distorted baseband transmit signal, and amplify the analog version of the digitally pre-distorted baseband transmit signal, wherein the power amplifier has an input terminal, an output terminal, a first power-supply terminal and a second power supply terminal; and an envelope tracking path. In this illustrative embodiment, the envelope tracking path includes a first DC-DC converter having a plurality of voltage supply output terminals; an envelope multi-level controller having a plurality of level-selector control output terminals, and an envelope signal output terminal; a first level -selector having a plurality of first voltage supply input terminals, a plurality of first level -selector control input terminals, and a first selected-voltage-level output terminal; a linear amplifier having a first input terminal, a second input terminal, a first power-supply terminal, a second power-supply terminal, and an output terminal; a capacitor having a first terminal and a second terminal; and a second DC-DC converter having a control input terminal, a first power-supply terminal, a second power-supply terminal, and an output terminal. In this illustrative embodiment, each one of the voltage supply output terminals of the first DC-DC converter is coupled to a corresponding one of the voltage supply input terminals of the first level-selector; the first selected-voltage-level output terminal is coupled to the first power-supply terminal of the linear amplifier and to the first power-supply terminal of the second DC-DC converter; the first terminal of the capacitor is coupled to the output terminal of the linear amplifier, and the second terminal of the capacitor is coupled to the output terminal of the second DC-DC converter; and the second terminal of the capacitor is further coupled to the first power-supply terminal of the power amplifier.

[0094] In some embodiments, the illustrative transceiver having a power supply in accordance with the present disclosure further includes an antenna interface coupled to an input terminal of a low-noise amplifier in the receive path, and further coupled to the output terminal of the power amplifier of the transmit path.

[0095] In some embodiments, the illustrative transceiver having a power supply in accordance with the present disclosure further includes an antenna coupled to the antenna interface.

[0096] In some embodiments, the illustrative transceiver having a power supply in accordance with the present disclosure further includes a second voltage level -selector having a plurality of second voltage supply input terminals, a plurality of second levelselector control input terminals, and a second selected-voltage-level output terminal, and the second voltage supply input terminals are each coupled to a corresponding one of the voltage supply output terminals of the first DC-DC converter.

[0097] In some embodiments of the illustrative transceiver having a power supply in accordance with the present disclosure, the second selected-voltage-level output terminal is coupled to the second power-supply terminal of the linear amplifier and to the second power-supply terminal of the second DC-DC converter.

[0098] In any of the above illustrative embodiments, the power amplifier may be an RF power amplifier.

[0099] It will be appreciated that some embodiments in accordance with the present disclosure may be implemented as one or more integrated circuits. Such integrated circuits may be, but are not limited to, CMOS integrated circuits. Likewise, such integrated circuits may be constructed on any suitable substrate including, but not limited to Si, GaN, SiC or any other suitable material. In some embodiments, a printed circuit board (PCB) may be used as a substrate for various discrete and/or integrated circuit components.

[0100] The foregoing description of the specific embodiments will so reveal the general nature of the present disclosure that others can, by applying knowledge within the skill of the art, readily modify and/or adapt for various applications such specific embodiments, without undue experimentation, and without departing from the general concept of the present disclosure. Therefore, such adaptations and modifications are intended to be within the meaning and range of equivalents of the disclosed embodiments, based on the teaching and guidance presented herein. It is to be understood that the phraseology or terminology herein is for the purpose of description and not of limitation, such that the terminology or phraseology of the present specification is to be interpreted by the skilled artisan in light of its teachings and guidance.

[0101] Embodiments of the present disclosure have been described above with the aid of functional building blocks illustrating the implementation of specified functions and relationships thereof. The boundaries of these functional building blocks have been arbitrarily defined herein for the convenience of the description. Alternate boundaries can be defined so long as the specified functions and relationships thereof are appropriately performed.

[0102] The Summary and Abstract sections may set forth one or more but not all embodiments of the present disclosure as contemplated by the inventor(s), and thus, are not intended to limit the present disclosure and the subjoined claims in any way.

[0103] Various functional blocks, modules, and steps are disclosed above. The particular arrangements provided are illustrative and without limitation. Accordingly, the functional blocks, modules, and steps may be re-ordered or combined in different ways than in the examples provided above. Likewise, certain embodiments include only a subset of the functional blocks, modules, and steps, and any such subset is permitted.

[0104] The breadth and scope of the present disclosure should not be limited by any of the above-described illustrative embodiments, but should be defined only in accordance with the subjoined claims and their equivalents.

Claims

WHAT IS CLAIMED IS:

1. A power supply for a power amplifier, comprising: a first DC-DC converter having a plurality of voltage supply output terminals; an envelope multi-level controller having a plurality of level-selector-signal output terminals, and an analog envelope signal output terminal; a level-selector having a plurality of voltage supply input terminals, a plurality of level-selector-signal input terminals, and a selected-voltage-level output terminal; a linear amplifier having a first input terminal, a second input terminal, a first powersupply terminal, a second power-supply terminal, and an output terminal; a capacitor having a first terminal and a second terminal; a second DC-DC converter having a control input terminal, a first power-supply terminal, a second power-supply terminal, and an output terminal; and a power amplifier having an input terminal, an output terminal, a first power-supply terminal coupled to the second terminal of the capacitor, and a second power-supply input terminal; wherein each one of the voltage supply output terminals of the first DC-DC converter is coupled to a corresponding one of the voltage supply input terminals of the level -selector; wherein the selected-voltage-level output terminal is coupled to the first power-supply input terminal of the linear amplifier and to the first power-supply input terminal of the second DC-DC converter; wherein the first terminal of the capacitor is coupled to the output terminal of the linear amplifier, and the second terminal of the capacitor is coupled to the output terminal of the second DC-DC converter.

2. The power supply of claim 1, wherein the first input terminal of the linear amplifier is coupled to the analog envelope signal output terminal of the envelope multi-level controller; and the second input terminal of the linear amplifier is coupled to the second terminal of the capacitor.

3. The power supply of claim 1, wherein the second power-supply terminal of the linear amplifier is coupled to a ground node, and the second power-supply terminal of the second DC-DC converter is coupled to a ground node.

4. The power supply of claim 1, wherein the power amplifier is an RF power amplifier.

5. The power supply of claim 1, further comprising: a battery coupled to the first DC-DC converter; and an antenna coupled to the output terminal of the power amplifier.

6. The power supply of claim 1, wherein a level-selector-signal, at the level-selectorsignal output terminals, is a digital signal that is N-bits wide.

7. The power supply of claim 6, wherein the level-selector-signal is encoded, and the level-selector is configured to generate a decoded level-selector-signal to select one of the plurality of voltage supply input terminals for providing a voltage to the selected-voltage- level output terminal.

8. The power supply of claim 1, wherein a level-selector-signal, at the level-selectorsignal output terminals, is N bits wide, and N is equal to or greater than the number of voltage supply input terminals of the level-selector, and the level -selector is configured to select one of the plurality of voltage supply input terminals for providing a voltage to the selected- voltage-level output terminal.

9. The power supply of claim 1, wherein the linear amplifier is configured for unity gain.

10. The power supply of claim 1, wherein the linear amplifier is configured for non-unity gain.

11. A power supply for a power amplifier, comprising: a first DC-DC converter having a plurality of voltage supply output terminals; an envelope multi-level controller having a plurality of level-selector-signal output terminals, and an analog envelope signal output terminal; a first level-selector having a plurality of first voltage supply input terminals, a plurality of first level-selector-signal input terminals, and a first selected-voltage-level output terminal; a second level-selector having a plurality of second voltage supply input terminals, a plurality of second level-selector-signal input terminals, and a second selected-voltage-level output terminal; a linear amplifier having a first input terminal, a second input terminal, a first powersupply terminal, a second power-supply terminal, and an output terminal; a capacitor having a first terminal and a second terminal; a second DC-DC converter having a control signal input terminal, a first powersupply terminal, a second power-supply terminal, and an output terminal; and a power amplifier having an input terminal, an output terminal, and a first powersupply terminal coupled to the second terminal of the capacitor, and a second power-supply terminal; wherein each one of the voltage supply output terminals of the first DC-DC converter is coupled to a corresponding one of the voltage supply input terminals of the first levelselector, wherein each one of the voltage supply output terminals of the first DC-DC converter is coupled to a corresponding one of the voltage supply input terminals of the second levelselector, wherein the first selected-voltage-level output terminal is coupled to the first powersupply terminal of the linear amplifier and to the first power-supply terminal of the second DC-DC converter, and wherein the first terminal of the capacitor is coupled to the output terminal of the linear amplifier, and the second terminal of the capacitor is coupled to the output terminal of the second DC-DC converter.

12. The power supply of claim 11, wherein the second power-supply terminal of the linear amplifier is coupled to the second selected-voltage-level output terminal, and the second power-supply terminal of the second DC-DC converter is coupled to the second selected-voltage-level output terminal.

13. The power supply of claim 12, wherein the first input terminal of the linear amplifier is coupled to the analog envelope signal output terminal of the envelope multi-level controller; and the second input terminal of the linear amplifier is coupled to the second terminal of the capacitor.

14. The power supply of claim 12, wherein the power amplifier is an RF power amplifier, the level-selector-signal is a digital signal that is N-bits wide, and the N-bit wide level- selector-signal is encoded, and the first level-selector is configured to generate a decoded level-selector-signal to select one of the plurality of first voltage supply input terminals for providing a voltage to the first selected-voltage-level output terminal, and wherein the second level-selector is configured to generate a decoded level-selector-signal to select one of the plurality of second voltage supply input terminals for providing a voltage to the second selected-voltage-level output terminal.

15. The power supply of claim 12, wherein the level-selector-signal is a digital signal that is N-bits wide, the number of bits in the N-bit wide level-selector-signal is equal to or greater than the number of voltage supply input terminals of the first level-selector, and the second level-selector is configured to select one of the plurality of second voltage supply input terminals for providing a voltage to the second selected-voltage-level output terminal.

16. A front end of an RF transceiver, comprising: a receive path configured to receive an analog RF input signal, and further configured to generate a digital baseband receive signal; a transmit path, including a power amplifier, the transmit path configured to receive a digital baseband transmit signal, generate a digitally pre-distorted baseband transmit signal, generate an analog version of the digitally pre-distorted baseband transmit signal, and amplify the analog version of the digitally pre-distorted baseband transmit signal, wherein the power amplifier has an input terminal, an output terminal, a first power-supply terminal and a second power supply terminal; and an envelope tracking path, the envelope tracking path comprising: a first DC-DC converter having a plurality of voltage supply output terminals; an envelope multi-level controller having a plurality of level-selector control output terminals, and an envelope signal output terminal; a first level-selector having a plurality of first voltage supply input terminals, a plurality of first level -selector control input terminals, and a first selected-voltage-level output terminal; a linear amplifier having a first input terminal, a second input terminal, a first power-supply terminal, a second power-supply terminal, and an output terminal; a capacitor having a first terminal and a second terminal; a second DC-DC converter having a control input terminal, a first power-supply terminal, a second power-supply terminal, and an output terminal; wherein each one of the voltage supply output terminals of the first DC-DC converter is coupled to a corresponding one of the voltage supply input terminals of the first level-selector; wherein the first selected-voltage-level output terminal is coupled to the first power-supply terminal of the linear amplifier and to the first power-supply terminal of the second DC-DC converter; wherein the first terminal of the capacitor is coupled to the output terminal of the linear amplifier, and the second terminal of the capacitor is coupled to the output terminal of the second DC-DC converter; and wherein the second terminal of the capacitor is further coupled to the first powersupply terminal of the power amplifier.

17. The front end of claim 16, further comprising an antenna interface coupled to an input terminal of a low-noise amplifier in the receive path, and further coupled to the output terminal of the power amplifier of the transmit path.

18. The front end of claim 17, wherein the power amplifier is an RF power amplifier, and further comprising an antenna coupled to the antenna interface.

19. The front end of claim 16, further comprising: a second voltage level-selector having a plurality of second voltage supply input terminals, a plurality of second level-selector control input terminals, and a second selected-voltage-level output terminal; wherein the second voltage supply input terminals are each coupled to a corresponding one of the voltage supply output terminals of the first DC-DC converter.

20. The front end of claim 19, wherein the second selected-voltage-level output terminal is coupled to the second power-supply terminal of the linear amplifier and to the second power-supply terminal of the second DC-DC converter.