WO2024125579A1 - Dimmable driving circuit - Google Patents

Abstract

The present application discloses a dimmable driving circuit, comprising: a preceding-stage converter, which is coupled with an external power supply and outputs a first voltage; a dimming driving module, which is coupled with both the preceding-stage converter and an external load, receives the first voltage, outputs a second voltage, and drives the external load to work; a first detection circuit, which is coupled with the preceding-stage coupler, receives the first voltage, and outputs a first detection signal representing the first voltage; a second detection circuit, which is coupled with the dimming driving module, receives the second voltage, and outputs a second detection signal representing the second voltage; and a main control module, which receives the first detection signal and the second detection signal, outputs an adjustment signal, and sends the adjustment signal to the preceding-stage converter, wherein the preceding-stage converter adjusts the numerical value of the first voltage, the ratio of the second voltage to the first voltage being maintained at a preset value. The dimmable driving circuit of the present application can reduce pause in a dimming process.

Description

可调光驱动电路Dimmable driver circuit

本申请要求于2022年12月16日提交中国专利局、申请号为202211627429.4、申请名称为“可调光驱动电路”的中国专利申请的优先权，以及2022年12月16日提交中国专利局、申请号为202223397258.9、申请名称为“可调光驱动电路”的中国专利申请的优先权，其全部内容通过引用结合在本申请中。This application claims the priority of the Chinese patent application filed with the Chinese Patent Office on December 16, 2022, with application number 202211627429.4 and application name “Dimmable Light Driving Circuit”, as well as the priority of the Chinese patent application filed with the Chinese Patent Office on December 16, 2022, with application number 202223397258.9 and application name “Dimmable Light Driving Circuit”, the entire contents of which are incorporated by reference in this application.

技术领域Technical Field

本申请涉及集成电路设计技术领域，具体涉及一种可调光驱动电路。The present application relates to the technical field of integrated circuit design, and in particular to a dimmable light driving circuit.

背景技术Background technique

近两年智能照明的发展迅速兴起，其间，调光功能尤其受到追捧。现在，一款优秀的智能照明会要求其调光驱动电路拥有丝滑般的调光效果，这样在整体的视觉效果上会更舒适，更符合人眼对光学的要求；即调光效果要求在任何一个亮度和调光过程中不抖动，因为光的抖动会给人一种危险的感觉。PWM斩波调光是一种性价比非常高的调光驱动方案，在调光深度上可以实现千分之一甚至万分之一更深的调光深度，进而满足各种调光需求。In the past two years, the development of smart lighting has risen rapidly, and the dimming function has been particularly popular. Now, an excellent smart lighting will require its dimming drive circuit to have a silky dimming effect, so that the overall visual effect will be more comfortable and more in line with the human eye's optical requirements; that is, the dimming effect requires no jitter at any brightness and dimming process, because light jitter will give people a sense of danger. PWM chopping dimming is a very cost-effective dimming drive solution, which can achieve a dimming depth of one thousandth or even one ten-thousandth deeper in dimming depth, thereby meeting various dimming needs.

技术问题technical problem

但如果前后两个PWM调光信号的变化正好落在电感的放电时段，此时实际上电感的电流不会增大，灯的亮度也不会变化。请参见图1所示，下图中，前一PWM调光信号的有效高电平持续到a位置，后一PWM调光信号的有效高电平持续到b位置，即前后两个PWM调光信号的有效高电平的长度从a位置变化到b位置，有效高电平的长度增长了，理论上灯的亮度会变更亮一点；但因为这两个PWM调光信号的变化正好落在电感的放电时段，如上图中虚线时段所示(电感的工作频率由另外决定)，此时实际上电感的电流(也是流经灯珠的电流)不会增大，所以灯珠的亮度不会变化。如此，则要等到后面的PWM调光信号的有效高电平落在电感的充电时段时，此时电感的电流则直接按后面的PWM调光信号对应的电流进行工作，即电流直接跳跃增大，灯珠的亮度也 直接跳跃变得更亮，此则为调光中的顿挫(抖动)；如果连续多个PWM调光信号的变化落在电感的放电时段，这种顿挫则是更明显。However, if the change of the two PWM dimming signals just happens to fall in the discharge period of the inductor, the current of the inductor will not increase and the brightness of the lamp will not change. Please refer to Figure 1. In the figure below, the effective high level of the previous PWM dimming signal continues to position a, and the effective high level of the next PWM dimming signal continues to position b, that is, the length of the effective high level of the two PWM dimming signals changes from position a to position b, and the length of the effective high level increases. In theory, the brightness of the lamp will become brighter; but because the change of these two PWM dimming signals just happens to fall in the discharge period of the inductor, as shown in the dotted period in the above figure (the working frequency of the inductor is determined by another), the current of the inductor (also the current flowing through the lamp bead) will not increase, so the brightness of the lamp bead will not change. In this case, it is necessary to wait until the effective high level of the next PWM dimming signal falls in the charging period of the inductor. At this time, the current of the inductor directly works according to the current corresponding to the next PWM dimming signal, that is, the current directly jumps and increases, and the brightness of the lamp bead also increases. The direct jump to become brighter is called the stutter (jitter) in dimming. If the changes of multiple consecutive PWM dimming signals fall during the discharge period of the inductor, the stutter will be more obvious.

对此，一个直接对应的解决方案就是检测判断PWM调光信号的有效高电平时间以及电感的充电时段和放电时段，让PWM调光信号的有效高电平时间尽量落在电感的充电时段，但很显然，这个方案的具体落实是异乎寻常的难。In this regard, a direct corresponding solution is to detect and determine the effective high-level time of the PWM dimming signal and the charging and discharging periods of the inductor, so that the effective high-level time of the PWM dimming signal falls as much as possible during the charging period of the inductor. However, it is obvious that the specific implementation of this solution is extremely difficult.

技术解决方案Technical Solutions

本申请实施例提供一种可调光驱动电路，用于解决调光过程的顿挫问题。The embodiment of the present application provides a dimmable driving circuit for solving the problem of setbacks in the dimming process.

本申请实施例提供一种可调光驱动电路，包括：The present application provides a dimmable driving circuit, including:

前级变换器，与外部电源耦接，输出第一电压；A front-stage converter is coupled to an external power source and outputs a first voltage;

调光驱动模块，与所述前级变换器和外部负载均耦接，接收所述第一电压，输出第二电压，驱动所述外部负载工作；A dimming driving module is coupled to the front-stage converter and the external load, receives the first voltage, outputs a second voltage, and drives the external load to operate;

第一检测电路，与所述前级变换器耦接，接收所述第一电压，输出表征所述第一电压的第一检测信号；A first detection circuit is coupled to the front-stage converter, receives the first voltage, and outputs a first detection signal representing the first voltage;

第二检测电路，与所述调光驱动模块耦接，接收所述第二电压，输出表征所述第二电压的第二检测信号；A second detection circuit is coupled to the dimming driving module, receives the second voltage, and outputs a second detection signal representing the second voltage;

主控制模块，与所述第一检测电路、所述第二检测电路、所述前级变换器均耦接，接收所述第一检测信号、所述第二检测信号，输出调节信号，发送给所述前级变换器，所述前级变换器调节所述第一电压的数值，所述第二电压与所述第一电压的比值维持在预设值。The main control module is coupled to the first detection circuit, the second detection circuit, and the pre-stage converter, receives the first detection signal and the second detection signal, outputs an adjustment signal, and sends it to the pre-stage converter. The pre-stage converter adjusts the value of the first voltage, and the ratio of the second voltage to the first voltage is maintained at a preset value.

在一些实施例中，所述可调光驱动电路还包括电压基准和反馈环路，所述电压基准和反馈环路与所述主控制模块、所述前级变换器均耦接，接收所述主控制模块输出的所述调节信号，产生反馈信号，发送给所述前级变换器，所述前级变换器根据所述反馈信号调节所述第一电压的数值。In some embodiments, the dimmable driving circuit also includes a voltage reference and a feedback loop, which are coupled to the main control module and the pre-stage converter, receive the adjustment signal output by the main control module, generate a feedback signal, and send it to the pre-stage converter, and the pre-stage converter adjusts the value of the first voltage according to the feedback signal.

在一些实施例中，所述主控制模块包括主控制芯片，所述主控制芯片具有第一引脚为电源引脚，耦接工作电源；所述主控制芯片具有第二引脚为第一检测引脚，与所述第一检测电路耦接，接收所述第一检测电路输出的所述第一检测信号；所述主控制芯片具有第三引脚为第二检测引脚，与所述第二检测电路耦接，接收所述第二检测电路输出的所述第二检测信号；所述主控制芯片具有第三引脚为调节信号输出引脚，输出所述调节信号；所述主控制芯片具有第八 引脚为接地引脚，与信号地耦接。In some embodiments, the main control module includes a main control chip, the main control chip has a first pin as a power pin, coupled to the working power supply; the main control chip has a second pin as a first detection pin, coupled to the first detection circuit, receiving the first detection signal output by the first detection circuit; the main control chip has a third pin as a second detection pin, coupled to the second detection circuit, receiving the second detection signal output by the second detection circuit; the main control chip has a third pin as an adjustment signal output pin, outputting the adjustment signal; the main control chip has an eighth The pin is a ground pin and is coupled to the signal ground.

在一些实施例中，所述主控制芯片具有第七引脚为调光信号输出引脚，与所述调光驱动模块耦接，输出调光信号给所述调光驱动模块。In some embodiments, the main control chip has a seventh pin as a dimming signal output pin, which is coupled to the dimming driving module and outputs a dimming signal to the dimming driving module.

在一些实施例中，所述主控制芯片的第一引脚经由电压转换芯片与所述前级变换器耦接。In some embodiments, the first pin of the main control chip is coupled to the front-stage converter via a voltage conversion chip.

在一些实施例中，所述调光驱动模块包括调光芯片，所述调光芯片具有第二引脚为调光信号输入引脚，并经由第二电阻与信号地耦接；所述调光芯片具有第三引脚为电源引脚，经由第一电容与信号地耦接，并经由第一电阻与所述前级变换器耦接，接收所述第一电压；所述调光芯片具有第五引脚为驱动引脚，经由第二电感与所述外部负载耦接，并经由第一二极管与所述前级变换器耦接，所述第一二极管的阳极与所述第一电压耦接，所述第一二极管的阴极与所述调光芯片的第五引脚耦接；所述调光芯片具有第七引脚为接地引脚，与信号地耦接。In some embodiments, the dimming driving module includes a dimming chip, the dimming chip has a second pin as a dimming signal input pin, and is coupled to the signal ground via a second resistor; the dimming chip has a third pin as a power pin, which is coupled to the signal ground via a first capacitor, and is coupled to the front-stage converter via a first resistor to receive the first voltage; the dimming chip has a fifth pin as a driving pin, which is coupled to the external load via a second inductor, and is coupled to the front-stage converter via a first diode, the anode of the first diode is coupled to the first voltage, and the cathode of the first diode is coupled to the fifth pin of the dimming chip; the dimming chip has a seventh pin as a ground pin, which is coupled to the signal ground.

在一些实施例中，所述调光驱动模块为PWM斩波调光驱动电路，所述调光信号为PWM信号。In some embodiments, the dimming driving module is a PWM chopping dimming driving circuit, and the dimming signal is a PWM signal.

在一些实施例中，所述第一检测电路包括串联的第九电阻、第十一电阻，所述第九电阻的自由端与所述前级变换器耦接，接收所述第一电压，所述第十一电阻的自由端与信号地耦接，所述第九电阻、所述第十一电阻的耦接点输出所述第一检测信号；所述第二检测电路包括串联的第四电阻、第十电阻，所述第四电阻的自由端与所述调光驱动模块耦接，接收所述第二电压，所述第十电阻的自由端与信号地耦接，所述第四电阻、所述第十电阻的耦接点输出所述第二检测信号。In some embodiments, the first detection circuit includes a ninth resistor and an eleventh resistor connected in series, the free end of the ninth resistor is coupled to the pre-stage converter to receive the first voltage, the free end of the eleventh resistor is coupled to the signal ground, and the coupling point between the ninth resistor and the eleventh resistor outputs the first detection signal; the second detection circuit includes a fourth resistor and a tenth resistor connected in series, the free end of the fourth resistor is coupled to the dimming drive module to receive the second voltage, the free end of the tenth resistor is coupled to the signal ground, and the coupling point between the fourth resistor and the tenth resistor outputs the second detection signal.

在一些实施例中，所述电压基准和反馈环路包括基准电压芯片和光耦，所述基准电压芯片具有第三引脚为接地引脚，与信号地耦接；所述基准电压芯片具有第二引脚为电源引脚，经由串联的第十六电阻、第十七电阻与所述前级变换器耦接，接收所述第一电压；所述基准电压芯片具有第一引脚为调节引脚，经由第二十三电阻与所述主控制模块耦接，接收所述调节信号，所述基准电压芯片的第一引脚还经由第二十电阻与信号地耦接，还经由第十八电阻与所述前级变换器耦接，还经由串联的第八电容、第二十一电阻与所述基准电压芯片的第二引脚耦接；所述光耦具有第一引脚、第二引脚，并联于所述第十七电阻的 两端，所述光耦具有第三引脚与电源地耦接，所述光耦具有第四引脚，与所述前级变换器耦接，输出所述反馈信号，发送给所述前级变换器。In some embodiments, the voltage reference and feedback loop includes a reference voltage chip and an optocoupler, wherein the reference voltage chip has a third pin as a ground pin, coupled to a signal ground; the reference voltage chip has a second pin as a power pin, coupled to the pre-stage converter via a sixteenth resistor and a seventeenth resistor connected in series, and receives the first voltage; the reference voltage chip has a first pin as an adjustment pin, coupled to the main control module via a twenty-third resistor, and receives the adjustment signal, the first pin of the reference voltage chip is also coupled to the signal ground via a twentieth resistor, is also coupled to the pre-stage converter via an eighteenth resistor, and is also coupled to the second pin of the reference voltage chip via an eighth capacitor and a twenty-first resistor connected in series; the optocoupler has a first pin and a second pin, which are connected in parallel to the seventeenth resistor. The optocoupler has a third pin coupled to the power ground, and the optocoupler has a fourth pin coupled to the front-stage converter to output the feedback signal and send it to the front-stage converter.

在一些实施例中，所述前级变换器包括辅控制芯片、功率管和变压器，所述辅控制芯片具有第八引脚为反馈引脚，与所述电压基准和反馈环路耦接，接收所述电压基准和反馈环路提供的反馈信号，所述辅控制芯片的第八引脚还经由第三电容与电源地耦接；所述辅控制芯片具有第二引脚为电源引脚，经由串联的第六电阻、第三二极管与所述变压器耦接，还经由第三电解电容与电源地耦接；所述辅控制芯片具有第七引脚为接地引脚，与电源地耦接；所述辅控制芯片具有第五引脚为控制引脚，经由所述功率管与所述变压器耦接。In some embodiments, the front-stage converter includes an auxiliary control chip, a power tube and a transformer. The auxiliary control chip has an eighth pin as a feedback pin, which is coupled to the voltage reference and the feedback loop, and receives the feedback signal provided by the voltage reference and the feedback loop. The eighth pin of the auxiliary control chip is also coupled to the power ground via a third capacitor; the auxiliary control chip has a second pin as a power pin, which is coupled to the transformer via a sixth resistor and a third diode connected in series, and is also coupled to the power ground via a third electrolytic capacitor; the auxiliary control chip has a seventh pin as a ground pin, which is coupled to the power ground; the auxiliary control chip has a fifth pin as a control pin, which is coupled to the transformer via the power tube.

在一些实施例中，所述前级变换器还包括整流桥，所述整流桥的输入端与所述外部电源耦接，所述整流桥的输出端的两端之间并联有第一电解电容，再与所述变压器耦接。In some embodiments, the front-stage converter further includes a rectifier bridge, an input end of the rectifier bridge is coupled to the external power supply, and a first electrolytic capacitor is connected in parallel between two ends of an output end of the rectifier bridge, which is then coupled to the transformer.

在一些实施例中，所述变压器具有第一引脚和第三引脚，所述变压器的第一引脚与第三引脚之间构成所述变压器的初级绕组，所述变压器的第一引脚与所述整流桥的输出端的第一端耦接，所述整流桥的输出端的第二端与电源地耦接，所述变压器的第三引脚与所述功率管的漏极耦接。In some embodiments, the transformer has a first pin and a third pin, the first pin and the third pin of the transformer constitute the primary winding of the transformer, the first pin of the transformer is coupled to the first end of the output end of the rectifier bridge, the second end of the output end of the rectifier bridge is coupled to the power ground, and the third pin of the transformer is coupled to the drain of the power tube.

在一些实施例中，所述变压器还具有第五引脚、第六引脚，所述变压器的第五引脚与第六引脚之间构成所述变压器的辅助绕组，所述变压器的第五引脚与电源地耦接，所述变压器的第六引脚经由串联的所述第三二极管、所述第六电阻与所述辅控制芯片的第二引脚耦接。In some embodiments, the transformer further has a fifth pin and a sixth pin, the fifth pin and the sixth pin of the transformer constitute an auxiliary winding of the transformer, the fifth pin of the transformer is coupled to the power ground, and the sixth pin of the transformer is coupled to the second pin of the auxiliary control chip via the third diode and the sixth resistor connected in series.

在一些实施例中，所述变压器还具有第九引脚、第十引脚，所述变压器的第九引脚与第十引脚之间构成所述变压器的次级绕组，所述变压器的第九引脚与第十引脚之间串联有第四二极管和第四电解电容，且所述变压器的第十引脚与信号地耦接，所述第四二极管与所述第四电解电容的耦接点输出所述第一电压。In some embodiments, the transformer further has a ninth pin and a tenth pin, the ninth pin and the tenth pin of the transformer constitute a secondary winding of the transformer, a fourth diode and a fourth electrolytic capacitor are connected in series between the ninth pin and the tenth pin of the transformer, and the tenth pin of the transformer is coupled to the signal ground, and the coupling point between the fourth diode and the fourth electrolytic capacitor outputs the first voltage.

在一些实施例中，所述辅控制芯片还具有第六引脚为采样引脚，经由第四电容与电源地耦接，并经由第十二电阻与电源地耦接，并与所述功率管的源极耦接。In some embodiments, the auxiliary control chip further has a sixth pin as a sampling pin, which is coupled to the power ground via a fourth capacitor, coupled to the power ground via a twelfth resistor, and coupled to the source of the power tube.

有益效果 Beneficial Effects

本申请实施例的可调光驱动电路，获取前级变换器输出的第一电压(亦即调光驱动模块的输入电压)、调光驱动模块输出的第二电压(亦即调光驱动模块的输出电压，亦即负载电压)，根据不同的负载电压(比如不同的外部负载时，亦即第二电压)以及第二电压与第一电压的比值的预设值(调光驱动模块的占空比的最高值)，调节前级变换器输出的第一电压的数值，使第二电压与第一电压的比值维持在预设值，从而减少了调光驱动模块中电感的放电时段，也就可以尽量避免调光信号的变化落在电感的放电时段的机率，从而减少了调光过程中的顿挫，提升了用户的使用体验。The dimmable driving circuit of the embodiment of the present application obtains a first voltage output by a front-stage converter (i.e., an input voltage of a dimming driving module) and a second voltage output by the dimming driving module (i.e., an output voltage of the dimming driving module, i.e., a load voltage), and adjusts the value of the first voltage output by the front-stage converter according to different load voltages (e.g., different external loads, i.e., the second voltage) and a preset value of the ratio of the second voltage to the first voltage (the maximum value of the duty cycle of the dimming driving module), so that the ratio of the second voltage to the first voltage is maintained at a preset value, thereby reducing the discharge period of the inductor in the dimming driving module, and thus minimizing the probability that the change of the dimming signal falls within the discharge period of the inductor, thereby reducing the setbacks in the dimming process and improving the user experience.

附图说明BRIEF DESCRIPTION OF THE DRAWINGS

下面将对实施例描述中所需要使用的附图作简单地介绍，显而易见地，下面描述中的附图仅仅是本申请实施例的一些实施例，对于本领域技术人员来讲，在不付出创造性劳动的前提下，还可以根据这些附图获得其他的附图。The following is a brief introduction to the drawings required for use in the description of the embodiments. Obviously, the drawings described below are only some embodiments of the embodiments of the present application. For those skilled in the art, other drawings can be obtained based on these drawings without paying any creative work.

图1为通常可调光驱动电路中电感的电流和调光信号的波形示意图；FIG1 is a schematic diagram showing waveforms of an inductor current and a dimming signal in a conventional dimmable driving circuit;

图2为本申请实施例提供的可调光驱动电路中电感的电流的波形示意图；FIG2 is a schematic diagram of a waveform of a current in an inductor in a dimmable light driving circuit provided in an embodiment of the present application;

图3为本申请实施例提供的可调光驱动电路的结构示意图。FIG. 3 is a schematic diagram of the structure of the dimmable light driving circuit provided in an embodiment of the present application.

本申请的实施方式Embodiments of the present application

下面将对本申请实施例中的技术方案进行清楚、完整地描述，显然，所描述的实施例仅仅是本申请一部分实施例，而不是全部的实施例。基于本申请中的实施例，本领域技术人员在没有作出创造性劳动前提下所获得的所有其它实施例，都属于本申请保护的范围。The technical solutions in the embodiments of the present application are described clearly and completely below. Obviously, the described embodiments are only part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by those skilled in the art without creative work are within the scope of protection of the present application.

本申请的技术方案提供一种可调光驱动电路，以下进行详细说明。需要说明的是，以下实施例的描述顺序不作为对本申请实施例优选顺序的限定。且在以下实施例中，对各个实施例的描述都各有侧重，某个实施例中没有详述的部分，可以参见其它实施例的相关描述。The technical solution of the present application provides a dimmable driving circuit, which is described in detail below. It should be noted that the description order of the following embodiments does not limit the preferred order of the embodiments of the present application. In the following embodiments, the description of each embodiment has its own emphasis. For parts that are not described in detail in a certain embodiment, please refer to the relevant description of other embodiments.

本申请提出，如果尽量提高PWM斩波调光电路的占空比，例如极端理想状态100％，即提高PWM斩波调光电路的输出电压与输入电压的比值，如此则可以尽量减少电感的放电时段，请参见图2虚线时段所示，这样也就可以比较容易的尽量避免PWM调光信号的变化落在电感的放电时段，从而减少调光的顿挫。 The present application proposes that if the duty cycle of the PWM chopper dimming circuit is increased as much as possible, for example, 100% in the extreme ideal state, that is, the ratio of the output voltage to the input voltage of the PWM chopper dimming circuit is increased, the discharge period of the inductor can be minimized as much as possible, as shown in the dotted period in Figure 2. In this way, it is also relatively easy to avoid the change of the PWM dimming signal falling within the discharge period of the inductor, thereby reducing the dimming jerks.

请参阅图3所示，本申请第一实施方式提供一种可调光驱动电路，包括：Referring to FIG. 3 , a first embodiment of the present application provides a dimmable driving circuit, including:

前级变换器10，与外部电源耦接，输出第一电压V1；The front-stage converter 10 is coupled to an external power source and outputs a first voltage V1;

调光驱动模块20，与前级变换器10和外部负载70均耦接，接收第一电压V1，输出第二电压V2，驱动外部负载70工作；The dimming driving module 20 is coupled to the front-stage converter 10 and the external load 70, receives the first voltage V1, outputs the second voltage V2, and drives the external load 70 to work;

第一检测电路30，与前级变换器10耦接，接收第一电压V1，输出表征第一电压V1的第一检测信号ADC_V1；The first detection circuit 30 is coupled to the previous converter 10, receives the first voltage V1, and outputs a first detection signal ADC_V1 representing the first voltage V1;

第二检测电路40，与调光驱动模块20耦接，接收第二电压V2，输出表征第二电压V2的第二检测信号ADC_V2；The second detection circuit 40 is coupled to the dimming driving module 20, receives the second voltage V2, and outputs a second detection signal ADC_V2 representing the second voltage V2;

主控制模块50，与第一检测电路30、第二检测电路40、前级变换器10均耦接，接收第一检测信号ADC_V1、第二检测信号ADC_V2，输出调节信号DAC_ADJ，发送给前级变换器10，前级变换器10调节第一电压V1的数值，第二电压V2与第一电压V1的比值维持在预设值。The main control module 50 is coupled to the first detection circuit 30, the second detection circuit 40, and the pre-stage converter 10, receives the first detection signal ADC_V1 and the second detection signal ADC_V2, outputs the adjustment signal DAC_ADJ, and sends it to the pre-stage converter 10. The pre-stage converter 10 adjusts the value of the first voltage V1, and the ratio of the second voltage V2 to the first voltage V1 is maintained at a preset value.

其中，第一电压V1提供给调光驱动模块20，亦可以称为调光驱动模块20的输入电压。第二电压V2从调光驱动模块20输出，亦可以称为调光驱动模块20的输出电压，施加到外部负载70上，亦可以称为负载电压。在一些实施例中，外部负载70为LED灯珠，多个或多组LED灯珠串联和/或并联均可；第二电压V2施加到LED灯珠的负极，LED灯珠的正极则耦接到第一电压V1。第二电压V2与第一电压V1的比值，亦可以称为调光驱动模块20的占空比D。一般而言，一个调光驱动模块20的占空比D的最高值，在设计时根据调光驱动模块20的各种参数要求以及后面的测试验证，即可以明确下来，而此明确下来的占空比D的最高值即作为预设值，保存在调光驱动模块20。例如，在一具体实施例中，占空比D的最高值可以是94％，或者是95％。一般而言，占空比D大于80％，尤其是大于90％，较好。本申请通过检测负载电压(第二电压V2，耦接不同的外部负载70时负载电压则不同)，去调节第一电压V1(调光驱动模块20的输入电压)，让第二电压V2与第一电压V1的比值维持在预设值，即较高的占空比D，例如94％或95％，如此本申请可调光驱动电路无论耦接什么样的外部负载70，调光驱动模块20中电感的放电时段都会尽可能的少，从而尽量的避免调光信号的变化落在电感的放电时段，进而减少了调光的顿挫，给用户以较佳的使用体验。Among them, the first voltage V1 is provided to the dimming driver module 20, which can also be called the input voltage of the dimming driver module 20. The second voltage V2 is output from the dimming driver module 20, which can also be called the output voltage of the dimming driver module 20, and is applied to the external load 70, which can also be called the load voltage. In some embodiments, the external load 70 is an LED lamp bead, and multiple or multiple groups of LED lamp beads can be connected in series and/or in parallel; the second voltage V2 is applied to the negative electrode of the LED lamp bead, and the positive electrode of the LED lamp bead is coupled to the first voltage V1. The ratio of the second voltage V2 to the first voltage V1 can also be called the duty cycle D of the dimming driver module 20. Generally speaking, the maximum value of the duty cycle D of a dimming driver module 20 can be determined during the design according to the various parameter requirements of the dimming driver module 20 and the subsequent test verification, and the maximum value of the duty cycle D determined is used as a preset value and saved in the dimming driver module 20. For example, in a specific embodiment, the maximum value of the duty cycle D can be 94% or 95%. Generally speaking, the duty cycle D is greater than 80%, especially greater than 90%, which is better. The present application adjusts the first voltage V1 (the input voltage of the dimming driver module 20) by detecting the load voltage (the second voltage V2, which is different when coupled to different external loads 70), so that the ratio of the second voltage V2 to the first voltage V1 is maintained at a preset value, that is, a higher duty cycle D, such as 94% or 95%. In this way, no matter what kind of external load 70 is coupled to the dimmable driving circuit of the present application, the discharge period of the inductor in the dimming driver module 20 will be as short as possible, thereby avoiding the change of the dimming signal falling in the discharge period of the inductor as much as possible, thereby reducing the frustration of dimming and giving users a better user experience.

在一些实施例中，主控制模块50包括主控制芯片U5，主控制芯片U5具 有第一引脚为电源引脚，耦接工作电源；主控制芯片U5具有第二引脚为第一检测引脚CS/PA7，与第一检测电路30耦接，接收第一检测电路30输出的第一检测信号ADC_V1；主控制芯片U5具有第三引脚为第二检测引脚TKS/PA6，与第二检测电路40耦接，接收第二检测电路40输出的第二检测信号ADC_V2；主控制芯片U5具有第三引脚为调节信号输出引脚RSTB/PA5，输出调节信号DAC_ADJ；主控制芯片U5具有第八引脚为接地引脚，与信号地SGND耦接。如前，主控制模块50保存有第二电压V2与第一电压V1的比值的预设值，即调光驱动模块20的占空比D的最高值；再加上获取到的第一检测信号ADC_V1实际上表征第一电压V1的实际值，获取到的第二检测信号ADC_V2实际上表征第二电压V2的实际值，如此经过判断比较计算，即可输出一调节信号DAC_ADJ，以表征第一电压V1可以达到的理想值。例如，在一具体实施例中，第一电压V1的当前实际值为24V，但结合第二电压V2以及占空比D的最高值(预设值)进行比较计算，得到第一电压V1的理想值应为22V较好，如此输出的调节信号DAC_ADJ则表征此22V。In some embodiments, the main control module 50 includes a main control chip U5. The first pin is a power pin, coupled to the working power supply; the main control chip U5 has a second pin as a first detection pin CS/PA7, coupled to the first detection circuit 30, and receives the first detection signal ADC_V1 output by the first detection circuit 30; the main control chip U5 has a third pin as a second detection pin TKS/PA6, coupled to the second detection circuit 40, and receives the second detection signal ADC_V2 output by the second detection circuit 40; the main control chip U5 has a third pin as an adjustment signal output pin RSTB/PA5, outputting the adjustment signal DAC_ADJ; the main control chip U5 has an eighth pin as a ground pin, coupled to the signal ground SGND. As before, the main control module 50 stores a preset value of the ratio of the second voltage V2 to the first voltage V1, that is, the maximum value of the duty cycle D of the dimming driving module 20; plus the first detection signal ADC_V1 obtained actually represents the actual value of the first voltage V1, and the second detection signal ADC_V2 obtained actually represents the actual value of the second voltage V2, so after judgment, comparison and calculation, an adjustment signal DAC_ADJ can be output to represent the ideal value that the first voltage V1 can reach. For example, in a specific embodiment, the current actual value of the first voltage V1 is 24V, but by comparing and calculating with the second voltage V2 and the maximum value (preset value) of the duty cycle D, it is obtained that the ideal value of the first voltage V1 should be 22V, so the output adjustment signal DAC_ADJ represents this 22V.

在一些实施例中，调节信号DAC_ADJ为模拟信号。此模拟信号并不能直接控制前级变换器10改变输出的第一电压V1。所以，在一些实施例中，可调光驱动电路还包括电压基准和反馈环路60，电压基准和反馈环路60与主控制模块50、前级变换器10均耦接，接收主控制模块50输出的调节信号DAC_ADJ，产生反馈信号FB，发送给前级变换器10，前级变换器10根据反馈信号FB调节第一电压V1的数值。调节信号DAC_ADJ经过电压基准和反馈环路60的转换，产生反馈信号FB，发送给前级变换器10，前级变换器10即可根据反馈信号FB调节第一电压V1的数值。In some embodiments, the adjustment signal DAC_ADJ is an analog signal. This analog signal cannot directly control the pre-stage converter 10 to change the output first voltage V1. Therefore, in some embodiments, the dimmable light driving circuit also includes a voltage reference and a feedback loop 60, and the voltage reference and the feedback loop 60 are coupled to the main control module 50 and the pre-stage converter 10, receive the adjustment signal DAC_ADJ output by the main control module 50, generate a feedback signal FB, and send it to the pre-stage converter 10, and the pre-stage converter 10 adjusts the value of the first voltage V1 according to the feedback signal FB. The adjustment signal DAC_ADJ is converted by the voltage reference and the feedback loop 60 to generate a feedback signal FB, which is sent to the pre-stage converter 10, and the pre-stage converter 10 can adjust the value of the first voltage V1 according to the feedback signal FB.

在一些实施例中，电压基准和反馈环路60包括基准电压芯片U2和光耦U3，基准电压芯片U2具有第三引脚为接地引脚，与信号地SGND耦接；基准电压芯片U2具有第二引脚为电源引脚，经由串联的第十六电阻R16、第十七电阻R17与前级变换器10耦接，接收第一电压V1；基准电压芯片U2具有第一引脚为调节引脚，经由第二十三电阻R23与主控制模块50耦接，接收调节信号DAC_ADJ，基准电压芯片U2的第一引脚还经由第二十电阻R20与信号地SGND耦接，还经由第十八电阻R18与前级变换器10耦接，还经由串联的第八电容C8、第二十一电阻R21与基准电压芯片U2的第二引脚耦接；光耦 U3具有第一引脚、第二引脚，并联于第十七电阻R17的两端，光耦具有第三引脚与电源地PGND耦接，光耦U3具有第四引脚，与前级变换器10耦接，输出反馈信号FB，发送给前级变换器10。在一具体实施例中，基准电压芯片U2的型号为TL431M。作为模拟信号的调节信号DAC_ADJ，经由电压基准和反馈环路60的转换，产生反馈信号FB，即可用于控制前级变换器10改变输出的第一电压V1。In some embodiments, the voltage reference and feedback loop 60 includes a reference voltage chip U2 and an optical coupler U3. The reference voltage chip U2 has a third pin as a ground pin, coupled to the signal ground SGND; the reference voltage chip U2 has a second pin as a power pin, coupled to the front-stage converter 10 via a sixteenth resistor R16 and a seventeenth resistor R17 connected in series, and receives a first voltage V1; the reference voltage chip U2 has a first pin as an adjustment pin, coupled to the main control module 50 via a twenty-third resistor R23, and receives an adjustment signal DAC_ADJ. The first pin of the reference voltage chip U2 is also coupled to the signal ground SGND via a twentieth resistor R20, and is also coupled to the front-stage converter 10 via an eighteenth resistor R18, and is also coupled to the second pin of the reference voltage chip U2 via an eighth capacitor C8 and a twenty-first resistor R21 connected in series; the optical coupler U3 has a first pin and a second pin, which are connected in parallel to the two ends of the seventeenth resistor R17, the optocoupler has a third pin coupled to the power ground PGND, and the optocoupler U3 has a fourth pin coupled to the pre-stage converter 10, outputs a feedback signal FB, and sends it to the pre-stage converter 10. In a specific embodiment, the model of the reference voltage chip U2 is TL431M. The adjustment signal DAC_ADJ as an analog signal is converted through the voltage reference and the feedback loop 60 to generate a feedback signal FB, which can be used to control the pre-stage converter 10 to change the output first voltage V1.

在一些实施例中，前级变换器10包括辅控制芯片U1、功率管Q1和变压器T1，辅控制芯片U1具有第八引脚为反馈引脚，与电压基准和反馈环路60耦接，接收电压基准和反馈环路60提供的反馈信号FB，辅控制芯片U1的第八引脚还经由第三电容C3与电源地PGND耦接；辅控制芯片U1具有第二引脚为电源引脚，经由串联的第六电阻D6、第三二极管D3与变压器T1耦接，还经由第三电解电容EC3与电源地PGND耦接；辅控制芯片U1具有第七引脚为接地引脚，与电源地PGND耦接；辅控制芯片U1具有第五引脚为控制引脚，经由功率管Q1与变压器T1耦接。在一具体实施例中，所辅控制芯片U1的型号为HFC0100HS。根据反馈信号FB的不同，可以调节输出的第一电压V1的数值。In some embodiments, the front-stage converter 10 includes an auxiliary control chip U1, a power tube Q1 and a transformer T1. The auxiliary control chip U1 has an eighth pin as a feedback pin, coupled to the voltage reference and feedback loop 60, and receives the feedback signal FB provided by the voltage reference and feedback loop 60. The eighth pin of the auxiliary control chip U1 is also coupled to the power ground PGND via the third capacitor C3; the auxiliary control chip U1 has a second pin as a power pin, coupled to the transformer T1 via the sixth resistor D6 and the third diode D3 connected in series, and also coupled to the power ground PGND via the third electrolytic capacitor EC3; the auxiliary control chip U1 has a seventh pin as a ground pin, coupled to the power ground PGND; the auxiliary control chip U1 has a fifth pin as a control pin, coupled to the transformer T1 via the power tube Q1. In a specific embodiment, the model of the auxiliary control chip U1 is HFC0100HS. According to the different feedback signals FB, the value of the output first voltage V1 can be adjusted.

更具体的，在一些实施例中，前级变换器10还包括整流桥DB1，整流桥DB1的输入端与外部电源耦接，在一具体实施例中，外部电源为交流电，整流桥DB1的输入端的两端分别通过火线L和零线N与交流电耦接。整流桥DB1的输出端的两端之间并联有第一电解电容EC1，再与变压器T1耦接。变压器T1具有第一引脚、第三引脚、第五引脚、第六引脚、第九引脚、第十引脚，变压器T1的第一引脚与第三引脚之间构成变压器T1的初级绕组，变压器T1的第九引脚与第十引脚之间构成变压器T1的次级绕组，变压器T1的第五引脚与第六引脚之间构成变压器T1的辅助绕组。变压器T1的第一引脚与整流桥DB1的输出端的第一端耦接，整流桥DB1的输出端的第二端与电源地PGND耦接，变压器T1的第三引脚与功率管Q1的漏极耦接。变压器T1的第九引脚与第十引脚之间串联有第四二极管D4和第四电解电容EC4，且变压器T1的第十引脚与信号地SGND耦接，第四二极管D4与第四电解电容EC4的耦接点输出第一电压V1。变压器T1的第五引脚与电源地PGND耦接，变压器T1的第六引脚经由串联的第三二极管D3、第六电阻D6与辅控制芯片U1的第二引脚耦接。 辅控制芯片U1还具有第一引脚为谷底检测引脚，经由第七电阻R7与变压器T1的第六引脚耦接，并经由第五电容C5与电源地PGND耦接。辅控制芯片U1还具有第四引脚为电压电源引脚HV，经由第五电阻R5与整流桥DB1的输出端的第一端耦接。辅控制芯片U1还具有第六引脚为采样引脚CS，经由第四电容C4与电源地PGND耦接，并经由第十二电阻R12与电源地PGND耦接，并与功率管Q1的源极耦接。辅控制芯片U1的第五引脚与功率管Q1的栅极耦接。如此，前级变换器10可以更加完整、安全的工作，根据反馈信号FB的不同，调节输出的第一电压V1的数值，并且能够进行电路的各种采样、检测，使电路安全、稳定的工作。More specifically, in some embodiments, the front-stage converter 10 further includes a rectifier bridge DB1, the input end of the rectifier bridge DB1 is coupled to an external power supply, in a specific embodiment, the external power supply is an alternating current, and the two ends of the input end of the rectifier bridge DB1 are respectively coupled to the alternating current through a live wire L and a neutral wire N. A first electrolytic capacitor EC1 is connected in parallel between the two ends of the output end of the rectifier bridge DB1, and then coupled to the transformer T1. The transformer T1 has a first pin, a third pin, a fifth pin, a sixth pin, a ninth pin, and a tenth pin. The first pin and the third pin of the transformer T1 form a primary winding of the transformer T1, the ninth pin and the tenth pin of the transformer T1 form a secondary winding of the transformer T1, and the fifth pin and the sixth pin of the transformer T1 form an auxiliary winding of the transformer T1. The first pin of the transformer T1 is coupled to the first end of the output end of the rectifier bridge DB1, the second end of the output end of the rectifier bridge DB1 is coupled to the power ground PGND, and the third pin of the transformer T1 is coupled to the drain of the power tube Q1. A fourth diode D4 and a fourth electrolytic capacitor EC4 are connected in series between the ninth pin and the tenth pin of the transformer T1, and the tenth pin of the transformer T1 is coupled to the signal ground SGND, and the coupling point between the fourth diode D4 and the fourth electrolytic capacitor EC4 outputs the first voltage V1. The fifth pin of the transformer T1 is coupled to the power ground PGND, and the sixth pin of the transformer T1 is coupled to the second pin of the auxiliary control chip U1 via the third diode D3 and the sixth resistor D6 connected in series. The auxiliary control chip U1 also has a first pin as a valley detection pin, which is coupled to the sixth pin of the transformer T1 via the seventh resistor R7, and coupled to the power ground PGND via the fifth capacitor C5. The auxiliary control chip U1 also has a fourth pin as a voltage power pin HV, which is coupled to the first end of the output end of the rectifier bridge DB1 via the fifth resistor R5. The auxiliary control chip U1 also has a sixth pin as a sampling pin CS, which is coupled to the power ground PGND via the fourth capacitor C4, and coupled to the power ground PGND via the twelfth resistor R12, and coupled to the source of the power tube Q1. The fifth pin of the auxiliary control chip U1 is coupled to the gate of the power tube Q1. In this way, the front-stage converter 10 can work more completely and safely, adjust the value of the output first voltage V1 according to the different feedback signals FB, and can perform various sampling and detection of the circuit, so that the circuit can work safely and stably.

在一些实施例中，调光驱动模块20包括调光芯片U6，调光芯片U6具有第二引脚为调光信号输入引脚，并经由第二电阻R2与信号地SGND耦接；调光芯片U6具有第三引脚为电源引脚，经由第一电容C1与信号地SGND耦接，并经由第一电阻R1与前级变换器10耦接，接收第一电压V1；调光芯片U6具有第五引脚为驱动引脚，经由第二电感T2与外部负载70耦接，并经由第一二极管D1与前级变换器10耦接，第一二极管D1的阳极与第一电压V1耦接，第一二极管D1的阴极与调光芯片U6的第五引脚耦接；调光芯片U6具有第七引脚为接地引脚，与信号地SGND耦接。而调光信号，系由主控制模块50提供。主控制芯片U5具有第七引脚为调光信号输出引脚，与调光驱动模块20耦接，输出调光信号给调光驱动模块20。亦即，调光芯片U6的第二引脚与主控制芯片U5的第七引脚耦接，接收主控制芯片U5的第七引脚输出的调光信号。在一些实施例中，调光信号为PWM信号，亦即调光驱动模块20为PWM斩波调光驱动电路。更具体的，调光芯片U6具有第八引脚为接地引脚，与调光芯片U6的第七引脚耦接；调光芯片U6具有第六引脚也为驱动引脚，与调光芯片U6的第五引脚耦接；调光芯片U6具有第一引脚也为稳压引脚LD，与调光芯片U6的第三引脚耦接。In some embodiments, the dimming driver module 20 includes a dimming chip U6, the dimming chip U6 has a second pin as a dimming signal input pin, and is coupled to the signal ground SGND via a second resistor R2; the dimming chip U6 has a third pin as a power pin, coupled to the signal ground SGND via a first capacitor C1, and coupled to the front-stage converter 10 via a first resistor R1, and receives a first voltage V1; the dimming chip U6 has a fifth pin as a driving pin, coupled to an external load 70 via a second inductor T2, and coupled to the front-stage converter 10 via a first diode D1, the anode of the first diode D1 is coupled to the first voltage V1, and the cathode of the first diode D1 is coupled to the fifth pin of the dimming chip U6; the dimming chip U6 has a seventh pin as a ground pin, coupled to the signal ground SGND. The dimming signal is provided by the main control module 50. The main control chip U5 has a seventh pin as a dimming signal output pin, coupled to the dimming driver module 20, and outputs the dimming signal to the dimming driver module 20. That is, the second pin of the dimming chip U6 is coupled to the seventh pin of the main control chip U5, and receives the dimming signal output by the seventh pin of the main control chip U5. In some embodiments, the dimming signal is a PWM signal, that is, the dimming driver module 20 is a PWM chopping dimming driver circuit. More specifically, the dimming chip U6 has an eighth pin as a ground pin, coupled to the seventh pin of the dimming chip U6; the dimming chip U6 has a sixth pin which is also a drive pin, coupled to the fifth pin of the dimming chip U6; the dimming chip U6 has a first pin which is also a voltage regulator pin LD, coupled to the third pin of the dimming chip U6.

在一些实施例中，第一检测电路30包括串联的第九电阻R9、第十一电阻R11，第九电阻R9的自由端与前级变换器10耦接，接收第一电压V1，第十一电阻R11的自由端与信号地SGND耦接，第九电阻R9、第十一电阻R11的耦接点输出第一检测信号ADC_V1。第二检测电路40包括串联的第四电阻R4、第十电阻R10，第四电阻R4的自由端与调光驱动模块20耦接，接收第二电压 V2，第十电阻R10的自由端与信号地SGND耦接，第四电阻R4、第十电阻R10的耦接点输出第二检测信号ADC_V2。In some embodiments, the first detection circuit 30 includes a ninth resistor R9 and an eleventh resistor R11 connected in series, the free end of the ninth resistor R9 is coupled to the pre-stage converter 10 to receive the first voltage V1, the free end of the eleventh resistor R11 is coupled to the signal ground SGND, and the coupling point of the ninth resistor R9 and the eleventh resistor R11 outputs the first detection signal ADC_V1. The second detection circuit 40 includes a fourth resistor R4 and a tenth resistor R10 connected in series, the free end of the fourth resistor R4 is coupled to the dimming driving module 20 to receive the second voltage V2, a free end of the tenth resistor R10 is coupled to the signal ground SGND, and a coupling point between the fourth resistor R4 and the tenth resistor R10 outputs a second detection signal ADC_V2.

最后需要补充说明的是，主控制芯片U5的第一引脚经由电压转换芯片U4与前级变换器10耦接，将前级变换器10输出的第一电压V1转换为主控制芯片U5所需要的工作电压。例如，第一电压V1为24V，主控制芯片U5所需要的工作电压为5V，则通过电压转换芯片U4转换完成。Finally, it should be noted that the first pin of the main control chip U5 is coupled to the front-stage converter 10 via the voltage conversion chip U4, and the first voltage V1 output by the front-stage converter 10 is converted into the working voltage required by the main control chip U5. For example, if the first voltage V1 is 24V and the working voltage required by the main control chip U5 is 5V, the conversion is completed through the voltage conversion chip U4.

本申请的技术方案具有以下有益效果：The technical solution of this application has the following beneficial effects:

本申请可调光驱动电路，获取前级变换器输出的第一电压(亦即调光驱动模块的输入电压)、调光驱动模块输出的第二电压(亦即调光驱动模块的输出电压，亦即负载电压)，根据不同的负载电压(比如不同的外部负载时，亦即第二电压)以及第二电压与第一电压的比值的预设值(调光驱动模块的占空比的最高值)，调节前级变换器输出的第一电压的数值，使第二电压与第一电压的比值维持在预设值，从而减少了调光驱动模块中电感的放电时段，也就可以尽量避免调光信号的变化落在电感的放电时段的机率，从而减少了调光过程中的顿挫，提升了用户的使用体验。The dimming drive circuit of the present application obtains a first voltage output by a front-stage converter (i.e., the input voltage of a dimming drive module) and a second voltage output by the dimming drive module (i.e., the output voltage of the dimming drive module, i.e., the load voltage). According to different load voltages (e.g., different external loads, i.e., the second voltage) and a preset value of the ratio of the second voltage to the first voltage (the maximum value of the duty cycle of the dimming drive module), the value of the first voltage output by the front-stage converter is adjusted so that the ratio of the second voltage to the first voltage is maintained at a preset value, thereby reducing the discharge period of the inductor in the dimming drive module, and minimizing the probability that the change of the dimming signal falls within the discharge period of the inductor, thereby reducing the setbacks in the dimming process and improving the user experience.

以上所述，仅为本申请的具体实施方式，但本申请的保护范围并不局限于此，任何熟悉本技术领域的技术人员在本申请揭露的技术范围内，可轻易想到变化或替换，都应涵盖在本申请的保护范围之内。因此，本申请的保护范围应以所述权利要求的保护范围为准。此外，说明书中应用了具体个例对本申请的原理及实施方式进行了阐述，以上实施例的说明只是用于帮助理解本申请的方法及其核心思想，本说明书内容不应理解为对本申请的限制。 The above is only a specific implementation of the present application, but the protection scope of the present application is not limited thereto. Any technician familiar with the technical field can easily think of changes or replacements within the technical scope disclosed in the present application, which should be included in the protection scope of the present application. Therefore, the protection scope of the present application shall be based on the protection scope of the claims. In addition, the specification uses specific examples to illustrate the principles and implementation methods of the present application. The description of the above embodiments is only used to help understand the method and its core idea of the present application. The content of this specification should not be understood as a limitation on the present application.

Claims (15)

1. 一种可调光驱动电路，包括：A dimmable driving circuit, comprising:

   前级变换器(10)，与外部电源耦接，输出第一电压(V1)；A front-stage converter (10) is coupled to an external power source and outputs a first voltage (V1);

   调光驱动模块(20)，与所述前级变换器(10)和外部负载(70)均耦接，接收所述第一电压(V1)，输出第二电压(V2)，驱动所述外部负载(70)工作；A dimming driving module (20) is coupled to the front-stage converter (10) and the external load (70), receives the first voltage (V1), outputs a second voltage (V2), and drives the external load (70) to operate;

   第一检测电路(30)，与所述前级变换器(10)耦接，接收所述第一电压(V1)，输出表征所述第一电压(V1)的第一检测信号(ADC_V1)；A first detection circuit (30) coupled to the front-stage converter (10), receiving the first voltage (V1), and outputting a first detection signal (ADC_V1) representing the first voltage (V1);

   第二检测电路(40)，与所述调光驱动模块(20)耦接，接收所述第二电压(V2)，输出表征所述第二电压(V2)的第二检测信号(ADC_V2)；A second detection circuit (40), coupled to the dimming driving module (20), receives the second voltage (V2), and outputs a second detection signal (ADC_V2) representing the second voltage (V2);

   主控制模块(50)，与所述第一检测电路(30)、所述第二检测电路(40)、所述前级变换器(10)均耦接，接收所述第一检测信号(ADC_V1)、所述第二检测信号(ADC_V2)，输出调节信号(DAC_ADJ)，发送给所述前级变换器(10)，所述前级变换器(10)调节所述第一电压(V1)的数值，所述第二电压(V2)与所述第一电压(V1)的比值维持在预设值。A main control module (50) is coupled to the first detection circuit (30), the second detection circuit (40), and the front-stage converter (10), receives the first detection signal (ADC_V1) and the second detection signal (ADC_V2), outputs an adjustment signal (DAC_ADJ), and sends it to the front-stage converter (10), wherein the front-stage converter (10) adjusts the value of the first voltage (V1), and the ratio of the second voltage (V2) to the first voltage (V1) is maintained at a preset value.
2. 根据权利要求1所述的可调光驱动电路，其中，所述可调光驱动电路还包括电压基准和反馈环路(60)，所述电压基准和反馈环路(60)与所述主控制模块(50)、所述前级变换器(10)均耦接，接收所述主控制模块(50)输出的所述调节信号(DAC_ADJ)，产生反馈信号(FB)，发送给所述前级变换器(10)，所述前级变换器(10)根据所述反馈信号(FB)调节所述第一电压(V1)的数值。The dimmable driving circuit according to claim 1, wherein the dimmable driving circuit further comprises a voltage reference and a feedback loop (60), wherein the voltage reference and the feedback loop (60) are coupled to the main control module (50) and the front-stage converter (10), receive the adjustment signal (DAC_ADJ) output by the main control module (50), generate a feedback signal (FB), and send it to the front-stage converter (10), wherein the front-stage converter (10) adjusts the value of the first voltage (V1) according to the feedback signal (FB).
3. 根据权利要求1所述的可调光驱动电路，其中，所述主控制模块(50)包括主控制芯片(U5)，所述主控制芯片(U5)具有第一引脚为电源引脚，耦接工作电源；所述主控制芯片(U5)具有第二引脚为第一检测引脚(CS/PA7)，与所述第一检测电路(30)耦接，接收所述第一检测电路(30)输出的所述第一检测信号(ADC_V1)；所述主控制芯片(U5)具有第三引脚为第二检测引脚(TKS/PA6)，与所述第二检测电路(40)耦接，接收所述第二检测电路(40)输出的所述第二检测信号(ADC_V2)；所述主控制芯片(U5)具有第三引脚为调节信号输出引脚(RSTB/PA5)，输出所述调节信号(DAC_ADJ)；所述主控制芯片(U5)具有第八引脚为接地引脚，与信号地(SGND)耦接。 The dimmable driving circuit according to claim 1, wherein the main control module (50) comprises a main control chip (U5), the main control chip (U5) having a first pin as a power pin, coupled to a working power supply; the main control chip (U5) having a second pin as a first detection pin (CS/PA7), coupled to the first detection circuit (30), receiving the first detection signal (ADC_V1) output by the first detection circuit (30); the main control chip (U5) having a third pin as a second detection pin (TKS/PA6), coupled to the second detection circuit (40), receiving the second detection signal (ADC_V2) output by the second detection circuit (40); the main control chip (U5) having a third pin as an adjustment signal output pin (RSTB/PA5), outputting the adjustment signal (DAC_ADJ); the main control chip (U5) having an eighth pin as a ground pin, coupled to a signal ground (SGND).
4. 根据权利要求3所述的可调光驱动电路，其中，所述主控制芯片(U5)具有第七引脚为调光信号输出引脚，与所述调光驱动模块(20)耦接，输出调光信号给所述调光驱动模块(20)。The dimmable driving circuit according to claim 3, wherein the main control chip (U5) has a seventh pin as a dimming signal output pin, which is coupled to the dimming driving module (20) and outputs a dimming signal to the dimming driving module (20).
5. 根据权利要求3所述的可调光驱动电路，其中，所述主控制芯片(U5)的第一引脚经由电压转换芯片(U4)与所述前级变换器(10)耦接。The dimmable driving circuit according to claim 3, wherein the first pin of the main control chip (U5) is coupled to the front-stage converter (10) via a voltage conversion chip (U4).
6. 根据权利要求4所述的可调光驱动电路，其中，所述调光驱动模块(20)包括调光芯片(U6)，所述调光芯片(U6)具有第二引脚为调光信号输入引脚，并经由第二电阻(R2)与信号地(SGND)耦接；所述调光芯片(U6)具有第三引脚为电源引脚，经由第一电容(C1)与信号地(SGND)耦接，并经由第一电阻(R1)与所述前级变换器(10)耦接，接收所述第一电压(V1)；所述调光芯片(U6)具有第五引脚为驱动引脚，经由第二电感(T2)与所述外部负载(70)耦接，并经由第一二极管(D1)与所述前级变换器(10)耦接，所述第一二极管(D1)的阳极与所述第一电压(V1)耦接，所述第一二极管(D1)的阴极与所述调光芯片(U6)的第五引脚耦接；所述调光芯片(U6)具有第七引脚为接地引脚，与信号地(SGND)耦接。The dimmable driving circuit according to claim 4, wherein the dimming driving module (20) comprises a dimming chip (U6), the dimming chip (U6) having a second pin as a dimming signal input pin, and coupled to a signal ground (SGND) via a second resistor (R2); the dimming chip (U6) having a third pin as a power pin, coupled to a signal ground (SGND) via a first capacitor (C1), and coupled to the front-stage converter (10) via a first resistor (R1), to receive the first voltage (V1); the dimming chip (U6) having a fifth pin as a driving pin, coupled to the external load (70) via a second inductor (T2), and coupled to the front-stage converter (10) via a first diode (D1), an anode of the first diode (D1) coupled to the first voltage (V1), and a cathode of the first diode (D1) coupled to the fifth pin of the dimming chip (U6); the dimming chip (U6) having a seventh pin as a ground pin, coupled to the signal ground (SGND).
7. 根据权利要求6所述的可调光驱动电路，其中，所述调光驱动模块(20)为PWM斩波调光驱动电路，所述调光信号为PWM信号。The dimmable driving circuit according to claim 6, wherein the dimming driving module (20) is a PWM chopping dimming driving circuit, and the dimming signal is a PWM signal.
8. 根据权利要求1所述的可调光驱动电路，其中，所述第一检测电路(30)包括串联的第九电阻(R9)、第十一电阻(R11)，所述第九电阻(R9)的自由端与所述前级变换器(10)耦接，接收所述第一电压(V1)，所述第十一电阻(R11)的自由端与信号地(SGND)耦接，所述第九电阻(R9)、所述第十一电阻(R11)的耦接点输出所述第一检测信号(ADC_V1)；所述第二检测电路(40)包括串联的第四电阻(R4)、第十电阻(R10)，所述第四电阻(R4)的自由端与所述调光驱动模块(20)耦接，接收所述第二电压(V2)，所述第十电阻(R10)的自由端与信号地(SGND)耦接，所述第四电阻(R4)、所述第十电阻(R10)的耦接点输出所述第二检测信号(ADC_V2)。The dimmable driving circuit according to claim 1, wherein the first detection circuit (30) comprises a ninth resistor (R9) and an eleventh resistor (R11) connected in series, the free end of the ninth resistor (R9) is coupled to the front-stage converter (10) to receive the first voltage (V1), the free end of the eleventh resistor (R11) is coupled to a signal ground (SGND), and the coupling point between the ninth resistor (R9) and the eleventh resistor (R11) outputs the first detection signal (ADC_V1); the second detection circuit (40) comprises a fourth resistor (R4) and a tenth resistor (R10) connected in series, the free end of the fourth resistor (R4) is coupled to the dimming driving module (20) to receive the second voltage (V2), the free end of the tenth resistor (R10) is coupled to the signal ground (SGND), and the coupling point between the fourth resistor (R4) and the tenth resistor (R10) outputs the second detection signal (ADC_V2).
9. 根据权利要求2所述的可调光驱动电路，其中，所述电压基准和反馈环路(60)包括基准电压芯片(U2)和光耦(U3)，所述基准电压芯片(U2)具有第三引脚为接地引脚，与信号地(SGND)耦接；所述基准电压芯片(U2)具有第二引脚为电源引脚，经由串联的第十六电阻(R16)、第十七电阻(R17) 与所述前级变换器(10)耦接，接收所述第一电压(V1)；所述基准电压芯片(U2)具有第一引脚为调节引脚，经由第二十三电阻(R23)与所述主控制模块(50)耦接，接收所述调节信号(DAC_ADJ)，所述基准电压芯片(U2)的第一引脚还经由第二十电阻(R20)与信号地(SGND)耦接，还经由第十八电阻(R18)与所述前级变换器(10)耦接，还经由串联的第八电容(C8)、第二十一电阻(R21)与所述基准电压芯片(U2)的第二引脚耦接；所述光耦(U3)具有第一引脚、第二引脚，并联于所述第十七电阻(R17)的两端，所述光耦(U3)具有第三引脚与电源地(PGND)耦接，所述光耦(U3)具有第四引脚，与所述前级变换器(10)耦接，输出所述反馈信号(FB)，发送给所述前级变换器(10)。The dimmable driving circuit according to claim 2, wherein the voltage reference and feedback loop (60) comprises a reference voltage chip (U2) and an optical coupler (U3), the reference voltage chip (U2) having a third pin as a ground pin coupled to a signal ground (SGND); the reference voltage chip (U2) having a second pin as a power pin, connected in series via a sixteenth resistor (R16) and a seventeenth resistor (R17) The reference voltage chip (U2) is coupled to the front-stage converter (10) to receive the first voltage (V1); the reference voltage chip (U2) has a first pin as an adjustment pin, which is coupled to the main control module (50) via a twenty-third resistor (R23) to receive the adjustment signal (DAC_ADJ); the first pin of the reference voltage chip (U2) is also coupled to the signal ground (SGND) via a twentieth resistor (R20), is also coupled to the front-stage converter (10) via an eighteenth resistor (R18), and is also coupled to the second pin of the reference voltage chip (U2) via an eighth capacitor (C8) and a twenty-first resistor (R21) connected in series; the optical coupler (U3) has a first pin and a second pin, which are connected in parallel to the two ends of the seventeenth resistor (R17); the optical coupler (U3) has a third pin coupled to the power ground (PGND); the optical coupler (U3) has a fourth pin, which is coupled to the front-stage converter (10) to output the feedback signal (FB) and send it to the front-stage converter (10).
10. 根据权利要求9所述的可调光驱动电路，其中，所述前级变换器(10)包括辅控制芯片(U1)、功率管(Q1)和变压器(T1)，所述辅控制芯片(U1)具有第八引脚为反馈引脚，与所述电压基准和反馈环路(60)耦接，接收所述电压基准和反馈环路(60)提供的反馈信号(FB)，所述辅控制芯片(U1)的第八引脚还经由第三电容(C3)与电源地(PGND)耦接；所述辅控制芯片(U1)具有第二引脚为电源引脚，经由串联的第六电阻(D6)、第三二极管(D3)与所述变压器(T1)耦接，还经由第三电解电容(EC3)与电源地(PGND)耦接；所述辅控制芯片(U1)具有第七引脚为接地引脚，与电源地(PGND)耦接；所述辅控制芯片(U1)具有第五引脚为控制引脚，经由所述功率管(Q1)与所述变压器(T1)耦接。According to the dimmable driving circuit of claim 9, wherein the front-stage converter (10) comprises an auxiliary control chip (U1), a power tube (Q1) and a transformer (T1), the auxiliary control chip (U1) having an eighth pin as a feedback pin, coupled to the voltage reference and feedback loop (60), receiving a feedback signal (FB) provided by the voltage reference and feedback loop (60), and the eighth pin of the auxiliary control chip (U1) is also coupled to a power ground (PGND) via a third capacitor (C3); the auxiliary control chip (U1) having a second pin as a power pin, coupled to the transformer (T1) via a sixth resistor (D6) and a third diode (D3) connected in series, and also coupled to the power ground (PGND) via a third electrolytic capacitor (EC3); the auxiliary control chip (U1) having a seventh pin as a ground pin, coupled to the power ground (PGND); the auxiliary control chip (U1) having a fifth pin as a control pin, coupled to the transformer (T1) via the power tube (Q1).
11. 根据权利要求10所述的可调光驱动电路，其中，所述前级变换器(10)还包括整流桥(DB1)，所述整流桥(DB1)的输入端与所述外部电源耦接，所述整流桥(DB1)的输出端的两端之间并联有第一电解电容(EC1)，再与所述变压器(T1)耦接。According to the dimmable driving circuit of claim 10, the front-stage converter (10) further comprises a rectifier bridge (DB1), the input end of the rectifier bridge (DB1) is coupled to the external power supply, and a first electrolytic capacitor (EC1) is connected in parallel between the two ends of the output end of the rectifier bridge (DB1), and is further coupled to the transformer (T1).
12. 根据权利要求11所述的可调光驱动电路，其中，所述变压器(T1)具有第一引脚和第三引脚，所述变压器(T1)的第一引脚与第三引脚之间构成所述变压器(T1)的初级绕组，所述变压器(T1)的第一引脚与所述整流桥(DB1)的输出端的第一端耦接，所述整流桥(DB1)的输出端的第二端与电源地(PGND)耦接，所述变压器(T1)的第三引脚与所述功率管(Q1)的漏极耦接。The dimmable driving circuit according to claim 11, wherein the transformer (T1) has a first pin and a third pin, the first pin and the third pin of the transformer (T1) constitute a primary winding of the transformer (T1), the first pin of the transformer (T1) is coupled to a first end of the output end of the rectifier bridge (DB1), the second end of the output end of the rectifier bridge (DB1) is coupled to a power ground (PGND), and the third pin of the transformer (T1) is coupled to the drain of the power tube (Q1).
13. 根据权利要求11所述的可调光驱动电路，其中，所述变压器(T1)还 具有第五引脚、第六引脚，所述变压器(T1)的第五引脚与第六引脚之间构成所述变压器(T1)的辅助绕组，所述变压器(T1)的第五引脚与电源地(PGND)耦接，所述变压器(T1)的第六引脚经由串联的所述第三二极管(D3)、所述第六电阻(D6)与所述辅控制芯片(U1)的第二引脚耦接。The dimmable driving circuit according to claim 11, wherein the transformer (T1) further The transformer (T1) has a fifth pin and a sixth pin, wherein the fifth pin and the sixth pin of the transformer (T1) form an auxiliary winding of the transformer (T1), the fifth pin of the transformer (T1) is coupled to a power ground (PGND), and the sixth pin of the transformer (T1) is coupled to the second pin of the auxiliary control chip (U1) via the third diode (D3) and the sixth resistor (D6) connected in series.
14. 根据权利要求11所述的可调光驱动电路，其中，所述变压器(T1)还具有第九引脚、第十引脚，所述变压器(T1)的第九引脚与第十引脚之间构成所述变压器(T1)的次级绕组，所述变压器(T1)的第九引脚与第十引脚之间串联有第四二极管(D4)和第四电解电容(EC4)，且所述变压器(T1)的第十引脚与信号地(SGND)耦接，所述第四二极管(D4)与所述第四电解电容(EC4)的耦接点输出所述第一电压(V1)。The dimmable driving circuit according to claim 11, wherein the transformer (T1) further has a ninth pin and a tenth pin, the ninth pin and the tenth pin of the transformer (T1) constitute a secondary winding of the transformer (T1), a fourth diode (D4) and a fourth electrolytic capacitor (EC4) are connected in series between the ninth pin and the tenth pin of the transformer (T1), and the tenth pin of the transformer (T1) is coupled to a signal ground (SGND), and a coupling point between the fourth diode (D4) and the fourth electrolytic capacitor (EC4) outputs the first voltage (V1).
15. 根据权利要求11所述的可调光驱动电路，其中，所述辅控制芯片(U1)还具有第六引脚为采样引脚(CS)，经由第四电容(C4)与电源地(PGND)耦接，并经由第十二电阻(R12)与电源地(PGND)耦接，并与所述功率管(Q1)的源极耦接。 The dimmable driving circuit according to claim 11, wherein the auxiliary control chip (U1) further has a sixth pin as a sampling pin (CS), which is coupled to a power ground (PGND) via a fourth capacitor (C4), coupled to a power ground (PGND) via a twelfth resistor (R12), and coupled to a source of the power tube (Q1).