WO2024125234A1 - 低噪声放大器及射频接收模组 - Google Patents

低噪声放大器及射频接收模组 Download PDF

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WO2024125234A1
WO2024125234A1 PCT/CN2023/132992 CN2023132992W WO2024125234A1 WO 2024125234 A1 WO2024125234 A1 WO 2024125234A1 CN 2023132992 W CN2023132992 W CN 2023132992W WO 2024125234 A1 WO2024125234 A1 WO 2024125234A1
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mos transistor
inductor
capacitor
stage
drain
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PCT/CN2023/132992
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English (en)
French (fr)
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曾珣
郭嘉帅
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深圳飞骧科技股份有限公司
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Publication of WO2024125234A1 publication Critical patent/WO2024125234A1/zh

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    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D30/00—Reducing energy consumption in communication networks
    • Y02D30/70—Reducing energy consumption in communication networks in wireless communication networks

Definitions

  • the present invention relates to the field of signal processing technology, and in particular to a low noise amplifier and a radio frequency receiving module.
  • the 802.11 protocol group is a standard developed by the Institute of Electrical and Electronics Engineers (IEEE) for wireless local area networks, and 802.11ax (Wi-Fi 6) is the latest revised version of this standard. Compared with the previous generation 802.11ac protocol, the 802.11ax protocol solves the problem of multi-user concurrent performance and has further improved the speed, while supporting 2.4GHz and 5GHz frequency bands.
  • IEEE Institute of Electrical and Electronics Engineers
  • the receiver RF front end must also meet the requirements of broadband operation.
  • the low noise amplifier Low Noise Amplifier, LNA
  • LNA Low Noise Amplifier
  • the purpose of the present invention is to provide a new low noise amplifier to solve the existing low noise Acoustic amplifiers are easily affected by changes in ambient temperature, frequency, signal source, and load, which can lead to mismatch problems.
  • the present invention provides a low noise amplifier, which comprises a signal input terminal, an input matching circuit, an amplifying circuit, an output matching circuit and a signal output terminal electrically connected in sequence;
  • the input matching circuit is used to achieve impedance matching between the signal input terminal and the low noise amplifier;
  • the input matching circuit includes a first capacitor, a transformer and a first negative feedback inductor;
  • the first end of the first capacitor is connected to the signal input end
  • the transformer comprises a primary coil inductor, a secondary coil inductor coupled with the primary coil inductor, and a coupling coefficient formed by coupling between the primary coil inductor and the secondary coil inductor; a first end of the primary coil inductor is connected to a second end of the first capacitor, a second end of the primary coil inductor is grounded, a first end of the secondary coil inductor is connected to an input end of the amplifier circuit, and a second end of the secondary coil inductor is connected to a first power supply bias voltage; a first end of the first negative feedback inductor is connected to the amplifier circuit, and a second end of the first negative feedback inductor is grounded;
  • the amplifier circuit is used to amplify the power of the signal output by the input matching circuit and output it;
  • the output matching circuit is connected between the output end of the amplifier circuit and the signal output end, and is used to achieve impedance matching between the low noise amplifier and the signal output end.
  • the input matching circuit further includes a leakage inductor connected in series between the second end of the first capacitor and the first end of the primary coil inductor.
  • the amplifier circuit includes a first-stage amplifier circuit, a second-stage amplifier circuit, and an inter-stage matching circuit connecting the first-stage amplifier circuit and the second-stage amplifier circuit; the inter-stage matching circuit is used to achieve impedance matching between the first-stage amplifier circuit and the second-stage amplifier circuit;
  • the first end of the secondary coil inductor and the first end of the first negative feedback inductor are respectively connected to the first stage amplifier circuit, and the output matching circuit is connected to the second stage amplifier circuit. Road connection.
  • the first-stage amplifier circuit includes a first MOS transistor and a second MOS transistor, and forms a common-source and common-gate structure;
  • the gate of the first MOS transistor is connected to the first end of the secondary coil inductor as the input end of the amplifier circuit, and the source of the first MOS transistor is connected to the first end of the first negative feedback inductor;
  • the source of the second MOS transistor is connected to the drain of the first MOS transistor, the gate of the second MOS transistor is connected to a second power supply bias voltage, and the drain of the second MOS transistor is connected to the first power supply voltage;
  • the inter-stage matching circuit is connected to the drain of the second MOS transistor.
  • the inter-stage matching circuit includes a first drain inductor, an inter-stage coupling capacitor and a second negative feedback inductor;
  • the drain of the second MOS transistor is connected to the first power supply voltage after being connected in series with the first drain inductor;
  • a first end of the inter-stage coupling capacitor is connected to a drain of the second MOS transistor
  • the first end of the second negative feedback inductor and the second end of the inter-stage coupling capacitor are respectively connected to the second-stage amplifier circuit, and the second end of the second negative feedback inductor is grounded.
  • the second-stage amplifier circuit includes a third MOS transistor and a fourth MOS transistor, and forms a common-source and common-gate structure;
  • the gate of the third MOS transistor is connected to the second end of the inter-stage coupling capacitor, and the source of the third MOS transistor is connected to the first end of the second negative feedback inductor;
  • the source of the fourth MOS transistor is connected to the drain of the third MOS transistor, the gate of the fourth MOS transistor is connected to the third power supply bias voltage, and the drain of the fourth MOS transistor is connected to the second power supply voltage;
  • the output matching circuit is connected to the drain of the fourth MOS transistor.
  • the output matching circuit includes a second drain inductor, a second capacitor, a third capacitor and a fourth capacitor;
  • the drain of the fourth MOS transistor is connected to the the second power supply voltage
  • a first end of the second capacitor is connected to the drain of the fourth MOS transistor, and a second end of the second capacitor is connected to the signal output end;
  • the first end of the third capacitor is connected to the first end of the second capacitor, and the second end of the third capacitor is grounded;
  • the first end of the fourth capacitor is connected to the second end of the second capacitor, and the second end of the fourth capacitor is grounded.
  • the output matching circuit further includes a resistor connected in series between the second drain inductor and the second power supply voltage.
  • the present invention provides a radio frequency receiving module, wherein the radio frequency receiving module comprises the low noise amplifier as described above.
  • the low-noise amplifier of the present invention is equivalent to providing a high-order matching network by designing the coupling coefficient formed by the primary coil inductance, the secondary coil inductance and the primary coil inductance and the secondary coil inductance of the transformer, in conjunction with the first capacitor.
  • the matching network of a single-stage inductor and a capacitor it has a higher degree of freedom and provides more poles, and thus has a higher bandwidth, improves the broadband input matching effect, and avoids the mismatch of the low-noise amplifier due to changes in factors such as ambient temperature, frequency, signal source and load.
  • FIG1 is a circuit diagram of a low noise amplifier according to an embodiment of the present invention.
  • FIG2 is a circuit diagram of a low noise amplifier provided by an embodiment of the present invention.
  • FIG3 is a diagram showing S-parameter simulation results of a low noise amplifier provided by an embodiment of the present invention.
  • FIG. 4 is a diagram showing a noise figure simulation result of a low noise amplifier provided by an embodiment of the present invention.
  • 100 low noise amplifier; 1, input matching circuit; 11, transformer; 2, amplifier circuit; 21, first amplifier stage circuit; 22, inter-stage matching circuit; 23, second amplifier circuit; 3, output matching circuit.
  • An embodiment of the present invention provides a low noise amplifier 100, which includes a signal input terminal IN, an input matching circuit 1, an amplifying circuit 2, an output matching circuit 3 and a signal output terminal OUT which are electrically connected in sequence as shown in FIG. 1 and FIG. 2 .
  • the input matching circuit 1 is used to achieve impedance matching between the signal input terminal IN and the low noise amplifier 100, and transmit the radio frequency signal to the amplifier circuit 2; the amplifier circuit 2 is used to amplify the power of the signal output by the input matching circuit 1 and output it; the output matching circuit 3 is used to achieve impedance matching between the low noise amplifier 100 and the signal output terminal OUT.
  • the output matching circuit 3 is connected between the output terminal of the amplifier circuit 2 and the signal output terminal OUT.
  • the input matching circuit 1 includes a first capacitor C 1 , a transformer 11 and a first negative feedback inductor L S1 .
  • the first end of the first capacitor C1 is connected to the signal input end IN.
  • the transformer 11 includes a primary coil inductance L 2 , a secondary coil inductance L 3 coupled with the primary coil inductance L 2 , and a coupling coefficient k 1 formed by coupling between the primary coil inductance L 2 and the secondary coil inductance L 3 ; a first end of the primary coil inductance L 2 is connected to a second end of the first capacitor C 1 , a second end of the primary coil inductance L 2 is grounded, and a first end of the secondary coil inductance L 3 is connected to an amplifier circuit 2, the second end of the secondary coil inductor L3 is connected to the first power supply bias voltage V G1 ; the first end of the first negative feedback inductor L S1 is connected to the amplifier circuit 2, and the first end of the first negative feedback inductor L S1 is grounded.
  • the input matching circuit 1 further includes a leakage inductor L g connected in series between the second end of the first capacitor C 1 and the first end of the primary coil inductor L 2 .
  • the amplifier circuit 2 includes a first-stage amplifier circuit 21, a second-stage amplifier circuit 23, and an inter-stage matching circuit 22 connecting the first-stage amplifier circuit 21 and the second-stage amplifier circuit 23; the inter-stage matching circuit 22 is used to achieve impedance matching between the first-stage amplifier circuit 21 and the second-stage amplifier circuit 23.
  • the first end of the secondary coil inductor L3 and the first end of the first negative feedback inductor L S1 are respectively connected to the first stage amplifier circuit 21 , and the output matching circuit 3 is connected to the second stage amplifier circuit 23 .
  • the first stage amplifier circuit 21 includes a first MOS transistor M1 and a second MOS transistor M2 , and forms a common source and common gate structure.
  • the gate of the first MOS transistor M1 is connected to the first end of the secondary coil inductor L3 as the input end of the amplifier circuit 2, and the source of the first MOS transistor M1 is connected to the first end of the first negative feedback inductor LS1 .
  • the source of the second MOS transistor M2 is connected to the drain of the first MOS transistor M1 , the gate of the second MOS transistor M2 is connected to the second power bias voltage V G2 , and the drain of the second MOS transistor M2 is connected to the first power voltage V D1 .
  • the inter-stage matching circuit 22 is connected to the drain of the second MOS transistor M2 .
  • the inter-stage matching circuit 22 includes a first drain inductor L d1 , an inter-stage coupling capacitor C 2 , and a second negative feedback inductor L S2 .
  • the drain of the second MOS transistor M2 is connected to the first power supply voltage VD1 via the first drain inductor Ld1 in series; that is, the first end of the first drain inductor Ld1 is connected to the drain of the second MOS transistor M2 , and the second end of the first drain inductor Ld1 is connected to the first power supply voltage VD1 .
  • a first end of the inter-stage coupling capacitor C2 is connected to the drain of the second MOS transistor M2 .
  • the first end of the second negative feedback inductor LS2 and the second end of the interstage coupling capacitor C2 are respectively connected To the second amplifier stage circuit 23, a second end of the second negative feedback inductor LS2 is grounded.
  • the second stage amplifier circuit 23 includes a third MOS transistor M3 and a fourth MOS transistor M4 , and forms a common source and common gate structure.
  • the gate of the third MOS transistor M3 is connected to the second end of the inter-stage coupling capacitor C2 , and the source of the third MOS transistor M3 is connected to the first end of the second negative feedback inductor LS2 .
  • a source of the fourth MOS transistor M4 is connected to a drain of the third MOS transistor M3 , a gate of the fourth MOS transistor M4 is connected to a third power bias voltage V G3 , and a drain of the fourth MOS transistor M4 is connected to a second power voltage V D2 .
  • the output matching circuit 3 is connected to the drain of the fourth MOS transistor M4 ; that is, the drain of the fourth MOS transistor M4 also serves as the output end of the amplifier circuit 2.
  • the output matching circuit 3 includes a second drain inductor L d2 , a second capacitor C 4 , a third capacitor C 3 and a fourth capacitor C 5 .
  • the drain of the fourth MOS transistor M4 is connected to the second power supply voltage V D2 via the second drain inductor L d2 in series; that is, the first end of the second drain inductor L d2 is connected to the drain of the fourth MOS transistor M4 , and the second end of the second drain inductor L d2 is connected to the second power supply voltage V D2 .
  • a first terminal of the second capacitor C4 is connected to the drain of the fourth MOS transistor M4 , and a second terminal of the second capacitor C4 is connected to the signal output terminal OUT.
  • a first end of the third capacitor C3 is connected to a first end of the second capacitor C4 , and a second end of the third capacitor C3 is grounded.
  • a first end of the fourth capacitor C5 is connected to the second end of the second capacitor C4 , and a second end of the fourth capacitor C5 is grounded.
  • the output matching circuit 3 further includes a resistor R1 connected in series between the second drain inductor Ld2 and the second power supply voltage VD2 ; that is, a first end of the resistor R1 is connected to a second end of the second drain inductor Ld2 , and a second end of the resistor R1 is connected to the second power supply voltage VD2 .
  • connection between two devices should be understood as “electrical connection” or “electrical connection”.
  • the low noise amplifier 100 of the present invention uses the primary coil inductance L 2 of the transformer 11 (on-chip transformer), the secondary coil inductance L 3 and the primary coil inductance L 4 to reduce the inductance of the primary coil.
  • the design of the coupling coefficient k1 between the inductor L2 and the secondary coil inductor L3 , in conjunction with the first capacitor C1 and the quality factor, is equivalent to providing a high-order matching network.
  • the matching network LC matching network
  • it has better freedom and provides more poles, thus having a better bandwidth, improving the broadband input matching effect, and avoiding the mismatch of the low-noise amplifier 100 due to changes in factors such as ambient temperature, frequency, signal source and load.
  • the low-noise amplifier 100 can also achieve good matching within the 5-7 GHz frequency band.
  • a leakage inductor L g is inserted at its input end to assist the design, that is, a leakage inductor L g is added to the first end of the primary coil inductor L 2.
  • the leakage inductor L g can adjust the inductance value and coupling coefficient k 1 of the primary coil inductor L 2 of the transformer 11 without affecting the inductance value of the secondary coil inductor L 3 of the transformer 11, thereby simplifying the optimization design and iteration process of the transformer 11.
  • the first-stage amplifier circuit 21 and the second amplifier circuit 2 both adopt a common-source and common-gate structure, which can effectively reduce the influence of the Miller effect (Miller effect) and limited output impedance of the first MOS transistor M1 to the fourth MOS transistor M4 on the performance of the low-noise amplifier 100, and provide good reverse isolation performance, reduce the leakage of the local oscillation signal, and at the same time make the low-noise amplifier 100 a unidirectional optimized amplifier structure, which can greatly simplify the design process and avoid the problem of its poor stability.
  • the first stage amplifier circuit 21 and the second amplifier circuit 2 respectively introduce a first negative feedback inductor L S1 and a second negative feedback inductor L S2 into the source of the common source tube of the two, so that the noise factor, small signal gain, input matching circuit 1, inter-stage matching circuit 22 and stability of the low noise amplifier 100 can be optimized by adjusting the specific parameters of the first negative feedback inductor L S1 and the second negative feedback inductor L S2 .
  • the second-stage amplifier circuit 23 can make the gain curve of the small signal smoother by introducing the resistor R 1 at the drain of the common-gate tube, so as to improve the in-band gain flatness.
  • the output matching circuit 3 can achieve broadband output matching by adopting a pi-type matching network, thereby extending the bandwidth of the low noise amplifier 100 .
  • FIG3 is a diagram of the S parameter (scattering parameter) simulation result of the low noise amplifier 100 provided in the present embodiment, in which S12 is the reverse transmission coefficient, that is, isolation, S21 is the forward transmission coefficient, that is, gain, S11 is the input reflection coefficient, that is, input return loss, and S22 is the output reflection coefficient, that is, output return loss;
  • FIG4 is a diagram of the noise factor simulation result of the low noise amplifier 100 provided in the present embodiment, in which NF is the noise factor; thus, FIG3 and FIG4 show that the low noise amplifier 100 is well matched in the 5-7 GHz frequency band, and the input return loss and the output return loss are both greater than 10 dB, providing a higher gain, the highest gain can reach 19.41 dB, the gain curve in the frequency band changes very gently, and the gain flatness is 1.1 dB. In addition, a lower noise factor is also provided, and the noise factor is only between 1.43 and 1.67 dB, both less than 2 dB.
  • the present invention also provides an embodiment of a radio frequency receiving module, which includes the low noise amplifier 100 in the above embodiment.
  • the RF receiving module in this embodiment includes the low noise amplifier 100 in the above embodiment, it can also achieve the technical effect achieved by the low noise amplifier 100 in the above embodiment, which will not be described in detail here.

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Abstract

本发明提供了一种低噪声放大器及射频接收模组，其中，所述低噪声放大器包括依次电连接的信号输入端、输入匹配电路、放大电路、输出匹配电路以及信号输出端；所述输入匹配电路包括第一电容、变压器以及第一负反馈电感；所述变压器包括初级线圈电感、次级线圈电感以及所述初级线圈电感和所述次级线圈电感形成耦合的耦合系数。本发明中的低噪声放大器可以提升宽带的输入匹配效果，以避免低噪声放大器由于环境温度、频率、信号源及负载等因素的变化而导致失配的现象。

Description

低噪声放大器及射频接收模组 【技术领域】
本发明涉及信号处理技术领域，尤其涉及一种低噪声放大器及射频接收模组。
【背景技术】
随着无线通信用户数目及网络数据业务的海量增长，人们对无线通信网络的传输速率和数据吞吐率有着越来越高的需求。
802.11协议组是国际电工电子工程学会(IEEE)为无线局域网络制定的标准，而802.11ax(即Wi-Fi 6)是这个标准的最新修订版本，与上一代802.11ac协议相比，802.11ax协议解决了多用户并发性能的问题，在速率上也有了更进一步的提升，同时支持2.4GHz和5GHz频段。
针对上述技术指标，接收机射频的前端也需满足宽带工作的需求，而作为接收机射频前端的第一个放大模块，低噪声放大器(Low Noise Amplifier,LNA)需要将天线所接收到的微小信号进行放大，其噪声系数会直接影响整个接收机的灵敏度，对接收机性能有着重要影响。
传统的低噪声放大器往往采用多个窄带低噪声放大器并联的结构，并通过开关来进行切换，但开关的插损会随频率的升高而增大，导致低噪声放大器的噪声系数的恶化，同时多个窄带低噪声放大器相并联的结构也会大幅度增加电路面积和功耗，导致低噪声放大器容易受到环境温度、频率、信号源以及负载等因素的变化而出现失配的现象。
【发明内容】
本发明的目的在于提供一种新的低噪声放大器，以解决现有低噪 声放大器容易受到环境温度、频率、信号源以及负载等因素的变化而导致失配的问题。
第一方面，本发明提供了一种低噪声放大器，其包括依次电连接的信号输入端、输入匹配电路、放大电路、输出匹配电路以及信号输出端；
所述输入匹配电路用于实现所述信号输入端与所述低噪声放大器的阻抗匹配；所述输入匹配电路包括第一电容、变压器以及第一负反馈电感；
所述第一电容的第一端与所述信号输入端连接；
所述变压器包括初级线圈电感、与所述初级线圈电感形成耦合的次级线圈电感以及所述初级线圈电感和所述次级线圈电感形成耦合的耦合系数；所述初级线圈电感的第一端与所述第一电容的第二端连接，所述初级线圈电感的第二端接地，所述次级线圈电感的第一端连接至所述放大电路的输入端，所述次级线圈电感的第二端连接至第一电源偏置电压；所述第一负反馈电感的第一端连接至所述放大电路，所述第一负反馈电感的第二端接地；
所述放大电路用于将所述输入匹配电路输出的信号进行功率放大并输出；
所述输出匹配电路连接至所述放大电路的输出端与所述信号输出端之间，用于实现所述低噪声放大器与所述信号输出端的阻抗匹配。
更优的，所述输入匹配电路还包括串联至所述第一电容的第二端与所述初级线圈电感的第一端之间的泄露电感。
更优的，所述放大电路包括第一级放大电路、第二级放大电路以及连接所述第一级放大电路和第二级放大电路的级间匹配电路；所述级间匹配电路用于实现所述第一级放大电路与所述第二级放大电路的阻抗匹配；
所述次级线圈电感的第一端和所述第一负反馈电感的第一端分别连接至所述第一级放大电路，所述输出匹配电路与所述第二级放大电 路连接。
更优的，所述第一级放大电路包括第一MOS晶体管以及第二MOS晶体管，并形成共源同栅结构；
所述第一MOS晶体管的栅极作为所述放大电路的输入端与所述次级线圈电感的第一端连接，所述第一MOS晶体管的源极与所述第一负反馈电感的第一端连接；
所述第二MOS晶体管的源极与所述第一MOS晶体管的漏极连接，所述第二MOS晶体管的栅极连接至第二电源偏置电压，所述第二MOS晶体管的漏极连接至第一电源电压；
所述级间匹配电路与所述第二MOS晶体管的漏极连接。
更优的，所述级间匹配电路包括第一漏极电感、级间耦合电容以及第二负反馈电感；
所述第二MOS晶体管的漏极经串联所述第一漏极电感后连接至所述第一电源电压；
所述级间耦合电容的第一端与所述第二MOS晶体管的漏极连接；
所述第二负反馈电感的第一端和所述级间耦合电容的第二端分别连接至所述第二级放大电路，所述第二负反馈电感的第二端接地。
更优的，所述第二级放大电路包括第三MOS晶体管以及第四MOS晶体管，并形成共源同栅结构；
所述第三MOS晶体管的栅极与所述级间耦合电容的第二端连接，所述第三MOS晶体管的源极与所述第二负反馈电感的第一端连接；
所述第四MOS晶体管的源极与所述第三MOS晶体管的漏极连接，所述第四MOS晶体管的栅极连接至第三电源偏置电压，所述第四MOS晶体管的漏极连接至第二电源电压；
所述输出匹配电路与所述第四MOS晶体管的漏极连接。
更优的，所述输出匹配电路包括第二漏极电感、第二电容、第三电容以及第四电容；
所述第四MOS晶体管的漏极经串联所述第二漏极电感后连接至所 述第二电源电压；
所述第二电容的第一端与所述第四MOS晶体管的漏极连接，所述第二电容的第二端连接至所述信号输出端；
所述第三电容的第一端与所述第二电容的第一端连接，所述第三电容的第二端接地；
所述第四电容的第一端与所述第二电容的第二端连接，所述第四电容的第二端接地。
更优的，所述输出匹配电路还包括串联至所述第二漏极电感与所述第二电源电压之间的电阻。
第二方面，本发明提供了一种射频接收模组，所述射频接收模组包括如上所述的低噪声放大器。
与现有技术相比，本发明的低噪声放大器通过变压器的初级线圈电感、次级线圈电感以及初级线圈电感和次级线圈电感形成耦合的耦合系数的设计，配合第一电容，等效于提供了一个高阶的匹配网络，与单级电感配合电容的匹配网络相比拥有更高的自由度，提供了更多的极点，因此具有了更高的带宽，提升了宽带的输入匹配效果，避免了低噪声放大器由于环境温度、频率、信号源以及负载等因素的变化而导致失配的现象。
【附图说明】
为了更清楚地说明本发明实施例中的技术方案，下面将对实施例描述中所需要使用的附图作简单地介绍，显而易见地，下面描述中的附图仅仅是本发明的一些实施例，对于本领域普通技术人员来讲，在不付出创造性劳动的前提下，还可以根据这些附图获得其它的附图，其中：
图1为本发明实施例提供的一种低噪声放大器的电路整体框选图；
图2为本发明实施例提供的一种低噪声放大器的电路部分框选图；
图3为本发明实施例提供的一种低噪声放大器的S参数仿真结果图；
图4为本发明实施例提供的一种低噪声放大器的噪声系数仿真结果图。
其中，100、低噪声放大器；1、输入匹配电路；11、变压器；2、放大电路；21、第一放大级电路；22、级间匹配电路；23、第二级放大电路；3、输出匹配电路。
【具体实施方式】
下面将结合本发明实施例中的附图，对本发明实施例中的技术方案进行清楚、完整地描述，显然，所描述的实施例仅是本发明的一部分实施例，而不是全部的实施例。基于本发明中的实施例，本领域普通技术人员在没有做出创造性劳动前提下所获得的所有其它实施例，都属于本发明保护的范围。
本发明实施例提供了一种低噪声放大器100，结合图1和图2所示，其包括依次电连接的信号输入端IN、输入匹配电路1、放大电路2、输出匹配电路3以及信号输出端OUT。
其中，输入匹配电路1用于实现信号输入端IN与低噪声放大器100的阻抗匹配，并向放大电路2传输射频信号；放大电路2用于将输入匹配电路1输出的信号进行功率放大并输出；输出匹配电路3用于实现低噪声放大器100与信号输出端OUT的阻抗匹配。输出匹配电路3连接至放大电路2的输出端信号输出端OUT之间。
具体地，输入匹配电路1包括第一电容C1、变压器11以及第一负反馈电感LS1。
其中，第一电容C1的第一端与信号输入端IN连接。
变压器11包括初级线圈电感L2、与初级线圈电感L2形成耦合的次级线圈电感L3以及初级线圈电感L2和次级线圈电感L3形成耦合的耦合系数k1；初级线圈电感L2的第一端与第一电容C1的第二端连接，初级线圈电感L2的第二端接地，次级线圈电感L3的第一端连接至放大电路 2的输入端，次级线圈电感L3的第二端连接至第一电源偏置电压VG1；第一负反馈电感LS1的第一端连接至放大电路2，第一负反馈电感LS1的第一端接地。
本实施例中，输入匹配电路1还包括串联至第一电容C1的第二端与初级线圈电感L2的第一端之间的泄露电感Lg。
具体地，放大电路2包括第一级放大电路21、第二级放大电路23以及连接第一级放大电路21和第二级放大电路23的级间匹配电路22；级间匹配电路22用于实现第一级放大电路21与第二级放大电路23的阻抗匹配。
其中，次级线圈电感L3的第一端和第一负反馈电感LS1的第一端分别连接至第一级放大电路21，输出匹配电路3与第二级放大电路23连接。
本实施例中，第一级放大电路21包括第一MOS晶体管M1以及第二MOS晶体管M2，并形成共源同栅结构。
第一MOS晶体管M1的栅极作为放大电路2的输入端与次级线圈电感L3的第一端连接，第一MOS晶体管M1的源极与第一负反馈电感LS1的第一端连接。
第二MOS晶体管M2的源极与第一MOS晶体管M1的漏极连接，第二MOS晶体管M2的栅极连接至第二电源偏置电压VG2，第二MOS晶体管M2的漏极连接至第一电源电压VD1。
级间匹配电路22与第二MOS晶体管M2的漏极连接。
本实施例中，级间匹配电路22包括第一漏极电感Ld1、级间耦合电容C2以及第二负反馈电感LS2。
第二MOS晶体管M2的漏极经串联第一漏极电感Ld1后连接至第一电源电压VD1；即第一漏极电感Ld1的第一端与第二MOS晶体管M2的漏极连接，第一漏极电感Ld1的第二端连接至第一电源电压VD1。
级间耦合电容C2的第一端与第二MOS晶体管M2的漏极连接。
第二负反馈电感LS2的第一端和级间耦合电容C2的第二端分别连接 至第二放大级电路23，第二负反馈电感LS2的第二端接地。
本实施例中，第二级放大电路23包括第三MOS晶体管M3以及第四MOS晶体管M4，并形成共源同栅结构。
第三MOS晶体管M3的栅极与级间耦合电容C2的第二端连接，第三MOS晶体管M3的源极与第二负反馈电感LS2的第一端连接。
第四MOS晶体管M4的源极与第三MOS晶体管M3的漏极连接，第四MOS晶体管M4的栅极连接至第三电源偏置电压VG3，第四MOS晶体管M4的漏极连接至第二电源电压VD2。
输出匹配电路3与第四MOS晶体管M4的漏极连接；即第四MOS晶体管M4的漏极还作为放大电路2的输出端。
具体地，输出匹配电路3包括第二漏极电感Ld2、第二电容C4、第三电容C3以及第四电容C5。
第四MOS晶体管M4的漏极经串联第二漏极电感Ld2后连接至第二电源电压VD2；即第二漏极电感Ld2的第一端与第四MOS晶体管M4的漏极连接，第二漏极电感Ld2的第二端连接至第二电源电压VD2。
第二电容C4的第一端与第四MOS晶体管M4的漏极连接，第二电容C4的第二端连接至信号输出端OUT。
第三电容C3的第一端与第二电容C4的第一端连接，第三电容C3的第二端接地。
第四电容C5的第一端与第二电容C4的第二端连接，第四电容C5的第二端接地。
本实施例中，输出匹配电路3还包括串联至第二漏极电感Ld2与第二电源电压VD2之间的电阻R1；即电阻R1的第一端与第二漏极电感Ld2的第二端连接，电阻R1的第二端连接至第二电源电压VD2。
本实施例中两个器件之间的“连接”应当理解为“电连接”或“电性连接”。
与现有技术相比，本发明的低噪声放大器100通过变压器11(片上变压器)的初级线圈电感L2、次级线圈电感L3以及存在初级线圈电 感L2和次级线圈电感L3之间的耦合系数k1的设计，配合第一电容C1和品质因素，等效于提供了一个高阶的匹配网络，与单级电感配合电容的匹配网络(LC匹配网络)相比拥有了更好的自由度，提供了更多的极点，因此具有了更好的带宽，提升了宽带的输入匹配效果，避免了低噪声放大器100由于环境温度、频率、信号源以及负载等因素的变化而导致失配的现象，同时该低噪声放大器100还可以实现5-7GHz频带内的良好匹配。
变压器11的优化设计过程中，很难在不影响变压器11其它参数的情况下对变压器11的某一项参数进行单独调节，所以变压器11的优化设计过程较为复杂，往往需要进行多次迭代，而为了简化设计步骤，减少迭代次数，选择在其输入端***泄露电感Lg来辅助设计，即在初级线圈电感L2的第一端增设泄露电感Lg，这样泄露电感Lg便可以在不影响变压器11的次级线圈电感L3的感值的情况下，调节变压器11的初级线圈电感L2的感值和耦合系数k1，从而简化变压器11的优化设计和迭代过程。
第一级放大电路21和第二放大电路2通过均采用共源共栅(共源同栅)的结构，可以有效减少第一MOS晶体管M1至第四MOS晶体管M4的Miller效应(米勒效应)和有限输出阻抗对低噪声放大器100性能的影响，并提供良好的反向隔离性能，减弱本地振荡信号的泄露，同时使低噪声放大器100成为一个单向优化放大器结构，可以在很大程度上简化设计过程，并避免其稳定性不佳的问题。
第一级放大电路21和第二放大电路2通过在两者的共源管源极分别引入第一负反馈电感LS1和第二负反馈电感LS2，从而可以通过调整第一负反馈电感LS1和第二负反馈电感LS2的具体参数优化低噪声放大器100的噪声系数、小信号增益、输入匹配电路1、级间匹配电路22以及稳定性的效果。
第二级放大电路23通过在共栅管漏极引入电阻R1，可以使小信号的增益曲线更加平滑，以改善带内增益平坦度。
输出匹配电路3通过采用pi型匹配网络，从而可以实现宽带的输出匹配，扩展低噪声放大器100的带宽。
图3为本实施例提供的低噪声放大器100的S参数(散射参数)仿真结果图，图中S12为反向传输系数，也就是隔离，S21为正向传输系数，也就是增益，S11为输入反射系数，也就是输入回波损耗，S22为输出反射系数，也就是输出回波损耗；图4为本实施例提供的低噪声放大器100的噪声系数仿真结果图，图中NF为噪声系数；从而图3和图4可以得出该低噪声放大器100在5-7GHz频带内的良好匹配，且输入回波耗损和输出回波耗损均大于10dB，提供了较高的增益，最高的增益可达19.41dB，频带内的增益曲线变化十分平缓，增益平坦度为1.1dB，此外，还提供了较低的噪声系数，噪声系数只处于1.43-1.67dB，均小于2dB。
另外，本发明还提供了一种射频接收模组的实施例，该射频接收模组包括上述实施例中的低噪声放大器100。
由于本实施例中的射频接收模组包括了上述实施例中的低噪声放大器100，因此其也能达到上述实施例中低噪声放大器100所达到的技术效果，在此不作赘述。
以上所述的仅是本发明的实施方式，在此应当指出，对于本领域的普通技术人员来说，在不脱离本发明创造构思的前提下，还可以做出改进，但这些均属于本发明的保护范围。

Claims (9)

  1. 一种低噪声放大器，包括依次电连接的信号输入端、输入匹配电路、放大电路、输出匹配电路以及信号输出端；所述输入匹配电路用于实现所述信号输入端与所述低噪声放大器的阻抗匹配；其特征在于，所述输入匹配电路包括第一电容、变压器以及第一负反馈电感；
    所述第一电容的第一端与所述信号输入端连接；
    所述变压器包括初级线圈电感、与所述初级线圈电感形成耦合的次级线圈电感以及所述初级线圈电感和所述次级线圈电感形成耦合的耦合系数；所述初级线圈电感的第一端与所述第一电容的第二端连接，所述初级线圈电感的第二端接地，所述次级线圈电感的第一端连接至所述放大电路的输入端，所述次级线圈电感的第二端连接至第一电源偏置电压；所述第一负反馈电感的第一端连接至所述放大电路，所述第一负反馈电感的第二端接地；
    所述放大电路用于将所述输入匹配电路输出的信号进行功率放大并输出；
    所述输出匹配电路连接至所述放大电路的输出端与所述信号输出端之间，用于实现所述低噪声放大器与所述信号输出端的阻抗匹配。
  2. 如权利要求1所述的低噪声放大器，其特征在于，所述输入匹配电路还包括串联至所述第一电容的第二端与所述初级线圈电感的第一端之间的泄露电感。
  3. 如权利要求1所述的低噪声放大器，其特征在于，所述放大电路包括第一级放大电路、第二级放大电路以及连接所述第一级放大电路和第二级放大电路的级间匹配电路；所述级间匹配电路用于实现所述第一级放大电路与所述第二级放大电路的阻抗匹配；
    所述次级线圈电感的第一端和所述第一负反馈电感的第一端分别连接至所述第一级放大电路，所述输出匹配电路与所述第二级放大电路连接。
  4. 如权利要求3所述的低噪声放大器，其特征在于，所述第一级 放大电路包括第一MOS晶体管以及第二MOS晶体管，并形成共源同栅结构；
    所述第一MOS晶体管的栅极作为所述放大电路的输入端与所述次级线圈电感的第一端连接，所述第一MOS晶体管的源极与所述第一负反馈电感的第一端连接；
    所述第二MOS晶体管的源极与所述第一MOS晶体管的漏极连接，所述第二MOS晶体管的栅极连接至第二电源偏置电压，所述第二MOS晶体管的漏极连接至第一电源电压；
    所述级间匹配电路与所述第二MOS晶体管的漏极连接。
  5. 如权利要求4所述的低噪声放大器，其特征在于，所述级间匹配电路包括第一漏极电感、级间耦合电容以及第二负反馈电感；
    所述第二MOS晶体管的漏极经串联所述第一漏极电感后连接至所述第一电源电压；
    所述级间耦合电容的第一端与所述第二MOS晶体管的漏极连接；
    所述第二负反馈电感的第一端和所述级间耦合电容的第二端分别连接至所述第二级放大电路，所述第二负反馈电感的第二端接地。
  6. 如权利要求5所述的低噪声放大器，其特征在于，所述第二级放大电路包括第三MOS晶体管以及第四MOS晶体管，并形成共源同栅结构；
    所述第三MOS晶体管的栅极与所述级间耦合电容的第二端连接，所述第三MOS晶体管的源极与所述第二负反馈电感的第一端连接；
    所述第四MOS晶体管的源极与所述第三MOS晶体管的漏极连接，所述第四MOS晶体管的栅极连接至第三电源偏置电压，所述第四MOS晶体管的漏极连接至第二电源电压；
    所述输出匹配电路与所述第四MOS晶体管的漏极连接。
  7. 如权利要求6所述的低噪声放大器，其特征在于，所述输出匹配电路包括第二漏极电感、第二电容、第三电容以及第四电容；
    所述第四MOS晶体管的漏极经串联所述第二漏极电感后连接至所 述第二电源电压；
    所述第二电容的第一端与所述第四MOS晶体管的漏极连接，所述第二电容的第二端连接至所述信号输出端；
    所述第三电容的第一端与所述第二电容的第一端连接，所述第三电容的第二端接地；
    所述第四电容的第一端与所述第二电容的第二端连接，所述第四电容的第二端接地。
  8. 如权利要求7所述的低噪声放大器，其特征在于，所述输出匹配电路还包括串联至所述第二漏极电感的第二端与所述第二电源电压之间的电阻。
  9. 一种射频接收模块，其特征在于，所述射频接收模块包括如权利要求1至8任意一项所述的低噪声放大器。
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CN112653397A (zh) * 2020-12-11 2021-04-13 电子科技大学 一种宽带跨导增强型低噪声放大器
CN115765642A (zh) * 2022-12-14 2023-03-07 深圳飞骧科技股份有限公司 低噪声放大器及射频接收模组

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CN112653397A (zh) * 2020-12-11 2021-04-13 电子科技大学 一种宽带跨导增强型低噪声放大器
CN115765642A (zh) * 2022-12-14 2023-03-07 深圳飞骧科技股份有限公司 低噪声放大器及射频接收模组

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