WO2024119764A1 - 一种任务调度方法、装置及电子设备和存储介质 - Google Patents

一种任务调度方法、装置及电子设备和存储介质 Download PDF

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WO2024119764A1
WO2024119764A1 PCT/CN2023/101218 CN2023101218W WO2024119764A1 WO 2024119764 A1 WO2024119764 A1 WO 2024119764A1 CN 2023101218 W CN2023101218 W CN 2023101218W WO 2024119764 A1 WO2024119764 A1 WO 2024119764A1
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task
target
function
switching
switched
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PCT/CN2023/101218
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English (en)
French (fr)
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秦文政
钟戟
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苏州元脑智能科技有限公司
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    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46—Multiprogramming arrangements
    • G06F9/48—Program initiating; Program switching, e.g. by interrupt
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46—Multiprogramming arrangements
    • G06F9/50—Allocation of resources, e.g. of the central processing unit [CPU]
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D10/00—Energy efficient computing, e.g. low power processors, power management or thermal management

Definitions

  • the present application relates to the field of computer technology, and more specifically, to a task scheduling method, device, electronic device, and a non-volatile computer-readable storage medium.
  • SSD Solid State Disk
  • NAND NAND flash memory, computer flash memory device
  • Firmware runs in the controller to control resources, schedule user data storage, maintain NAND devices and other operations.
  • SSDs provide extremely high concurrency, such as 1.6 million reads and writes per second. These reads and writes are not completed sequentially, and the next one is not processed after one is completed. If each task is executed sequentially, such high performance cannot be achieved. Inside the SSD, these commands are executed concurrently, that is, before one command is completed, another command begins to execute. Generally speaking, with current technology, up to thousands to tens of thousands of read and write operations can be executed at the same time.
  • Each command involves steps such as command message parsing, mapping table lookup, NAND operation, error and exception handling, data transmission, and completion status return.
  • Different commands have different operation steps. Since there are thousands to tens of thousands of commands operating at the same time, there are not thousands to tens of thousands of computing units inside the SSD, but computing resources are used through scheduling.
  • n CPUs Central Processing Units
  • these n CPUs need to be scheduled to serve multiple tasks, that is, let this CPU do task 1 for a while, and task 2 for a while. That is, time-division reuse of this CPU, or this group of resources, when one of these multiple tasks reaches a completion state, the resources are released, and it is possible to add services for a new task.
  • the firmware development process has fully considered the characteristics of the hardware and programmed these characteristics into the internal structure of the firmware, if a different hardware structure is changed, these characteristics will become obstacles to the new version of the firmware and need to be redesigned. In addition, the development efficiency is low. If the firmware developer not only needs to consider the functional logic of the firmware, but also needs to develop some operating system functions, such as task scheduling, resource management, etc., then the personal ability and workload of the firmware developer will be negatively affected. Therefore, in the absence of an operating system, developing a firmware that includes some operating system functions is not a good solution.
  • the purpose of the present application is to provide a task scheduling method, device, electronic device and non-volatile computer-readable storage medium, which improve the task switching efficiency and meet the high concurrency requirements of SSD.
  • the present application provides a task scheduling method in some embodiments, which is applied to an operating system of a solid state drive, and the method includes:
  • the parameters of the task switching function include the dependent object at the time of task switching and the parameters corresponding to the dependent object;
  • a switching task is selected from all tasks waiting to be switched, and a process function corresponding to the switching task is called using the target CPU core to switch the target CPU core to the switching task for execution.
  • creating a corresponding target process for a target task includes:
  • the task parameters at least include a function corresponding to the target task and parameters corresponding to the function;
  • a corresponding target process is created for the target task based on the task parameters of the target task, and resources are allocated to the target process; wherein the resources include a task identifier, a stack space, and a register address.
  • allocating resources to a target process includes:
  • allocating resources to a target process includes:
  • a minimum subspace that is larger than the stack space required by the target process is allocated to the target process as a target subspace.
  • using the target CPU core to call the process function corresponding to the switching task to switch the target CPU core to after the switching task is executed also includes:
  • selecting a switching task from among all tasks waiting to be switched includes:
  • the task waiting to be switched with the highest priority is selected as the switching task.
  • the attributes include, in descending order of first priority, any one or a combination of displayed task switching, host read, host write, host management command, background read, background write, background management command, metadata management, algorithm, and statistical information.
  • selecting a task waiting to be switched with the highest first priority as the switching task includes:
  • the second priority of all the tasks waiting to be switched is determined according to the dependent objects of all the tasks waiting to be switched when the tasks are switched;
  • a task with a second highest priority waiting to be switched is selected from among a plurality of tasks with a first highest priority waiting to be switched as a switching task.
  • dependent objects include completion messages, lock resource releases, NAND read and write commands, DMA flow commands to the host side, DMA flow commands to the device side, lock resource acquisition commands, timers, and algorithm modules in order of the second priority from high to low.
  • it also includes:
  • the second priority of the target task is increased to a preset level.
  • selecting a switching task from among all tasks waiting to be switched includes:
  • the task that has been waiting to be switched the longest is selected as the switching task.
  • it also includes:
  • the target task needs to communicate with other tasks by using shared memory variables.
  • determining whether the process corresponding to the other task is deployed in the target CPU core includes:
  • resource lock mutual exclusion is used to implement the communication between the target task and other tasks.
  • it also includes:
  • the context information of the target task is deleted and the stack space of the target task is released.
  • the process function includes a resource encapsulation function, which includes any one or a combination of several of the following functions: selecting an input/output command function, a data transmission function, a resource locking function, a NAND operation function, and a function of sending a completion message to the host.
  • a resource encapsulation function which includes any one or a combination of several of the following functions: selecting an input/output command function, a data transmission function, a resource locking function, a NAND operation function, and a function of sending a completion message to the host.
  • the process function includes the system call function
  • the system call function includes any one or a combination of several of the following functions: memory application function, memory release function, encryption algorithm function, compression algorithm function, RAID operation function, memory search function, memory sorting function, and management interface input and output function function.
  • it also includes:
  • the present application further provides a task scheduling device in some embodiments, which is applied to an operating system of a solid state drive, and the device includes:
  • a creation module is used to create a target task and create a corresponding target process for the target task
  • a selection module is used to select an idle target CPU core for a target task and deploy the target process in the target CPU core;
  • An execution module used to call a process function in a target process using a target CPU core to execute a target task
  • a calling module used to call a task switching function of a target task during the execution of the target task; wherein the parameters of the task switching function include a dependent object at the time of task switching and parameters corresponding to the dependent object;
  • the switching module is used to select a switching task from all tasks waiting to be switched, and use the target CPU core to call the process function corresponding to the switching task to switch the target CPU core to the switching task for execution.
  • an electronic device including:
  • the processor is used to implement the steps of the above-mentioned task scheduling method when executing a computer program.
  • the present application further provides a non-volatile computer-readable storage medium in some embodiments.
  • a computer program is stored on the non-volatile computer-readable storage medium, and when the computer program is executed by the processor, the steps of the task scheduling method described above are implemented.
  • a task scheduling method includes: creating a target task and creating a corresponding target process for the target task; selecting an idle target CPU core for the target task, and deploying the target process in the target CPU core; using the target CPU core to call the process function in the target process to execute the target task; in the process of executing the target task, calling the task switching function of the target task; wherein the parameters of the task switching function include the dependent object at the time of task switching and the parameters corresponding to the dependent object; selecting a switching task from all tasks waiting to be switched, and using the target CPU core to call the process function corresponding to the switching task to switch the target CPU core to the switching task for execution.
  • the operating system provides a task switching function for the user. Compared with the interrupt method used in the prior art to switch tasks, in some embodiments of the present application, the task switching efficiency is improved and the high concurrency requirements of the SSD are met.
  • a task scheduling device, an electronic device, and a non-volatile computer-readable storage medium are also disclosed, which can also achieve the above technical effects.
  • FIG1 is a flow chart of a task scheduling method provided by the present application in some embodiments.
  • FIG2 is a flow chart of another task scheduling method provided by the present application in some embodiments.
  • FIG3 is a structural diagram of a task scheduling device provided in some embodiments of the present application.
  • FIG4 is a structural diagram of an electronic device provided in some embodiments of the present application.
  • FIG5 is a structural diagram of a non-volatile computer-readable storage medium provided in some embodiments of the present application.
  • the present application discloses a task scheduling method in some embodiments, which can improve the efficiency of task switching and meet the high concurrency requirements of SSD.
  • FIG. 1 is a flowchart of a task scheduling method provided in some embodiments of the present application, as shown in FIG. 1 , the method includes:
  • S101 Create a target task and create a corresponding target process for the target task
  • a professional operating system SSD_OS is provided for the SSD.
  • the operating system exposes the CreateTask() interface for creating tasks to the application.
  • the developer will assign a task to each read and write request. For the developer, all the work in this task is synchronous call. The developer does not need to make the task into a callback function to wait for switching. The switching process is implemented by SSD_OS, and the developer does not need to perceive this process.
  • other work can also be encapsulated in a task, such as timer tasks, system management tasks, etc.
  • Creating a corresponding target process for a target task creating a corresponding target process for a target task, including: determining task parameters of the target task; wherein the task parameters at least include a function corresponding to the target task and parameters corresponding to the function; creating a corresponding target process for the target task based on the task parameters of the target task, and allocating resources to the target process; wherein the resources include a task identifier, stack space, and a register address.
  • the task When creating a task, it contains the parameters related to the task, including at least: the function instance corresponding to the task (i.e., the process function) and the parameters related to this function.
  • the task parameters of this task such as creating a task related to reading, pass the corresponding reading function (developed by the firmware developer) to the CreateTask() process.
  • the user can create a reading task and pass the received Host read command message as a parameter to this task.
  • the task can start executing immediately, or wait for a task start function to be called later to trigger the task to start executing.
  • a task start function When the internal resources of SSD_OS are insufficient, creating task may also fail, and the firmware application should try to apply for the task again after a period of time.
  • SSD_OS allocates runtime resources to the task, including the following elements (called task context): task ID (TaskID for short) and stack space (Stack).
  • the number of TaskIDs can be limited. For example, in the V1.0 version of SSD_OS, only 1000 IDs can be supported, while V2.0 can support 2000 IDs.
  • the same version of SSD_OS is bound to the hardware. If a certain SSD controller manufacturer has more hardware resources, it can have more Task IDs. There is a maximum limit on the number of TaskIDs.
  • the number of all IDs is determined according to the version number. The allocated IDs cannot be allocated again before they are recycled. If there is no taskID to allocate, the task creation fails.
  • stack space it is used to store the relevant information of this task.
  • the user needs a temporary memory space to store the command message of the host computer (such as NVMe command packet), as well as the local variables required by the user when performing algorithm or process operations (such as for loops, variables for the number of loops).
  • command message such as NVMe command packet
  • local variables required by the user when performing algorithm or process operations such as for loops, variables for the number of loops.
  • a stack space of a preset size is allocated to the target process.
  • a sufficiently large default space value can also be directly allocated to each task, so as to avoid memory copying and no longer require the user to explicitly check whether it is out of bounds, thereby reducing the number of system calls.
  • each task is allocated a fixed-size stack, such as 128K Bytes. If SSD_OS is deployed again to support 2000 concurrent tasks, a 256M Bytes stack is required.
  • all stack spaces are divided into multiple subspaces of different sizes; the smallest subspace that is larger than the stack space required by the target process is allocated to the target process as the target subspace.
  • SSD_OS assigns a stack space of a default length to the task (the default length is set when SSD_OS is deployed).
  • a stack space check function is provided in SSD_OS, and the project developer explicitly calls this function to check the available stack space. When checking, the developer passes in the required stack size size_to_use.
  • SSD_OS When the remaining stack space is less than size_to_use, SSD_OS will reallocate a larger memory space, and move the user's current stack content to the new space, and modify the program's stack pointer at the same time, so as to ensure that the developer's program will not cross the stack space.
  • the stack space is divided into 8K, 16K, 32K, 64K, 128K, ... multiple sizes, each size is a pre-set number, such as 8K has 2000, 16K has 1000, and 128K has 300.
  • the firmware calls the stack space check function again, it finds that the current stack space is close to the top, so it reallocates a larger stack space, copies the data to this space, modifies the stack pointer, and then runs again.
  • SSD_OS allocates a stack space, copies the parameters to the stack space, configures the stack register address, configures other registers corresponding to the environment (related to the hardware environment in which SSD_OS runs), and then calls the process function to start execution. Therefore, starting a task is a synchronous process.
  • S102 Select an idle target CPU core for the target task, and deploy the target process in the target CPU core;
  • SSD_OS will select an idle CPU core according to the task scheduling policy. The core submits the task. If all cores are busy, SSD_OS will wait until a process function releases the CPU. Therefore, the process of starting the task is blocking, and it will only continue to execute after success.
  • S104 In the process of executing the target task, calling the task switching function of the target task; wherein the parameters of the task switching function include the dependent object at the time of task switching and the parameters corresponding to the dependent object;
  • S105 Select a switching task from among all tasks waiting to be switched, and use the target CPU core to call a process function corresponding to the switching task, so as to switch the target CPU core to the switching task for execution.
  • SSD_OS does not involve an underlying task scheduler, and does not perform multi-task scheduling by dividing time slices, but instead implements task switching through an innovative algorithm.
  • the structure of the firmware can be similar to the following form (pseudo code 1):
  • SSDs Unlike conventional operating systems, SSDs have limited internal computing resources, so they do not use interrupts to switch tasks. Generally, when an event occurs (such as a high-priority task request, a time slice interrupt, an IO request, etc.), the operating system will enter the task switching judgment process, exit the current task, and select a new task to switch in. In some embodiments, considering that SSDs do not require such a flexible operating system, developers will evaluate the time consumption of each time period by themselves, and the software can explicitly switch tasks, so another switching solution is selected.
  • an event such as a high-priority task request, a time slice interrupt, an IO request, etc.
  • the process function When the process function starts to execute, it starts to process business logic such as IO commands, management commands, and background commands. Since there are multiple hardware acceleration units in the SSD system, the process function will request the hardware acceleration unit to work after a certain step. At this time, the process function does not need to wait for the hardware acceleration unit to complete its work and can process another task. Therefore, applications based on SSD_OS require users to actively call the task switching function (taskSwitch function) to switch tasks.
  • taskSwitch function task switching function
  • taskSwitch contains two sets of parameters: the dependent object and the related information of the object. For example, a task may want to sleep for 10 seconds when processing a certain node, so taskSwitch switches to other processes, hoping to let the dependent object sleep for 10 seconds. The timer generates a signal after 10 seconds to switch back. This parameter can be written as (Timer, 10second). Or for example, a task may be configured with a DMA (Direct Memory Access) task, allowing the DMA module to move 10M Bytes of data (from address A to address B). After configuring the DMA-related parameters (this DMA parameter is assumed to be called DMA parameter X), the task waits for the DMA transfer to be completed, at which time the CPU can be used to calculate other tasks. In this way, the parameters of taskSwitch can be written as (DMA, (DMA parameter X, DMA transfer completed)).
  • DMA Direct Memory Access
  • SSD_OS When entering the task switching function, SSD_OS will select a function to enter based on the current status of all processes waiting to be switched (Pending Task). It should be noted that the next CreateTask function is also one of the Pending Tasks. Because the next createTask function is a code that has not yet been run, the scheduling algorithm will select the next createTask process only after evaluating that the tasks that have already started execution do not need to be called.
  • TaskSwitch is transparent to developers, that is, developers do not need to care about how tasks are switched, which is the job handled by SSD_OS.
  • taskSwitch algorithm createTask function will record the context of each task inside SSD_OS. After taskSwitch, what needs to be done is to select a task from these contexts for recovery call. The initiator of taskSwitch calls taskSwith with the original intention of transferring CPU resources to other processes. Therefore, in the context of this process, the state will be recorded as IDLE, and the conditions for waking up this task will be recorded (that is, the two sets of parameters of createTask mentioned above). Therefore, after entering taskSwitch, it is necessary to check whether the conditions of all candidate tasks are met. If any candidate task does not meet the wake-up conditions, the program continues to execute backwards and the subsequent statements can be executed. If only one candidate task can be executed, execute this task. If there are multiple tasks that are in a wake-up state, they are selected according to the algorithm.
  • selecting a switching task from among all tasks waiting to be switched includes: determining a first priority of all tasks waiting to be switched according to attributes of all tasks waiting to be switched; and selecting a task waiting to be switched with the highest first priority as the switching task.
  • scheduling is performed according to task priorities, and a first priority is set for each task according to the attributes of the task.
  • the attributes include any one or a combination of several of displayed task switching, host reading, host writing, host management commands, background reading, background writing, background management commands, metadata management, algorithms, and statistical information in descending order of the first priority.
  • Host read Read commands sent by the host, with a priority of 2.
  • Host write Write commands sent by the host, with a priority of 3.
  • Host management commands Management commands sent by the host, with a priority of 4.
  • Background read Reading generated by the firmware internal management, such as the read command of the Garbage Collection, with a priority of 5.
  • Background write Firmware internal management The priority is 6.
  • Background management commands The calculation process generated by the task scheduling inside the firmware, such as the block timer refresh, with a priority of 7.
  • Metadata management The metadata save operation, with a priority of 8.
  • Algorithm The algorithm operation performed inside the firmware, such as data structure sorting optimization, with a priority of 9.
  • Statistics The operation of internal statistics, with a priority of 0.
  • the task waiting to be switched with the highest first priority level is selected as the switching task, including: if there are multiple tasks waiting to be switched with the highest first priority level, the second priority level of all the tasks waiting to be switched is determined according to the dependent objects of all the tasks waiting to be switched when the tasks are switched; and the task waiting to be switched with the highest second priority level is selected as the switching task among the multiple tasks waiting to be switched with the highest first priority level.
  • dependent objects include completion messages, lock resource releases, NAND read and write commands, DMA flow commands to the host side, DMA flow commands to the device side, lock resource acquisition commands, timers, and algorithm modules in order of the second priority from high to low.
  • Completion message The hardware module that sends completion message to the host. As long as this module is called, the host side will consider the command completed. Therefore, this module has the highest priority, which is 1.
  • Lock resource release The process of releasing mutex resources. Only after the release can other tasks obtain resources again. Therefore, the priority is higher, which is 2.
  • NAND read and write commands Commands with NAND and Flash channels, with a priority of 3.
  • DMA commands to the host side Data is sent to the host, which helps to complete the command, with a priority of 4.
  • Lock resource acquisition command Get lock resources, with a priority of 6. Timer: If the timer expires, it will wake up.
  • the priority of the timer is higher because the firmware will not use the timer as a means of precise control on the critical path.
  • the priority is 7.
  • Algorithm module Encryption, compression and other algorithms are not commonly used and will be executed in the background, so they are not on the critical path.
  • the priority is 8.
  • it also includes: if the timer end time of the target task exceeds the preset value, the second priority of the target task is increased to a preset level.
  • the timer module should be awakened if the preset time has been reached. However, since the priority of the timer is low, if multiple tasks need to be awakened at the same time, its priority is low, so the weight of the timer is adjusted. If a task is scheduled and it is found that the timer has timed out, its priority is appropriately increased. In some embodiments, the priority can be increased by one level for every 10% of the time that the timer is overdue.
  • selecting a switching task from among all tasks waiting to be switched includes: determining the time for all tasks waiting to be switched to complete corresponding dependent objects; and selecting the task waiting to be switched with the longest time as the switching task.
  • dedicated hardware or a separate CPU is used to monitor the completion time of each task dependency and, once completed, immediately record the completion time of the project.
  • the timeout of each task is updated. Time, select the task with the longest timeout to switch.
  • the target CPU core is used to call the process function corresponding to the switching task to switch the target CPU core to after the switching task is executed, and it also includes: detecting whether the dependent object corresponding to the target task is completed. If completed, the target task is used as a task waiting to be switched.
  • the CPU program pointer (PC)
  • the stack space address is created when createTask. If the stack space is insufficient, the firmware will explicitly reset the stack address.
  • the PC will also be recorded in the Context. After switching out, the PC before switching is recorded. When switching back in the future, the PC will be reassigned to the CPU to resume the process.
  • it further includes: when the target task is completed, the context information of the target task is deleted, and the stack space of the target task is released.
  • the context information of the target task is deleted
  • the stack space of the target task is released.
  • this function is called closeTask().
  • the present application realizes task switching without developing a compiler in some embodiments.
  • a priority strategy for process switching is proposed. If a hardware module or an independent CPU can accelerate the switching process, it is more practical and can be used even without such an independent module.
  • a task switching function is provided to the user in the operating system. Compared with the prior art which uses interrupts to perform task switching, the present application improves the task switching efficiency in some embodiments and meets the high concurrency requirements of the SSD.
  • it also includes: when the target task needs to communicate with other tasks, determine whether the processes corresponding to the other tasks are deployed in the target CPU core; if so, use shared memory variables to achieve the communication between the target task and other tasks; if not, use resource lock mutual exclusion to achieve the communication between the target task and other tasks.
  • the process function includes a resource encapsulation function
  • the resource encapsulation function includes any one or a combination of several of the following functions: selecting an input/output command function, a data transmission function, a resource locking function, a NAND operation function, and a function of sending a completion message to the host.
  • the hardware in the system in addition to providing process scheduling, it is also necessary to encapsulate the hardware in the system to be friendly to software development, so that the same software can be modified less in different hardware environments.
  • the following encapsulation interface is defined, and when a call is needed, it is possible to avoid directly operating the hardware and only need to call the system function.
  • Select IO command selectIO().
  • the host sends an IO request (including read/write/Trim, etc.) to the SSD device, the host encapsulates the command in a register message and sends it to the SSD.
  • the SSD firmware perceives the message and selects an IO command.
  • Different controller hardware may perceive and select messages in different ways, so SSD_OS encapsulates this operation so that different hardware can use a unified interface.
  • the hardware puts all IO requests into a register pool, and selectIO() selects from this pool in a round-robin manner.
  • the command is completed immediately with a return message indicating that there is no new IO request at this time. If there is an IO command, it is returned to the firmware.
  • DMA data transfer DMA(), with two parameters, src and dst, which represent the output address and input address of DMA respectively.
  • Data transfer is a common internal operation of SSD.
  • Common transfer addresses include host and local memory.
  • the memory is divided into high-speed memory (such as SRAM) and low-speed memory (DDR), and there may also be persistent memory (MRAM, PCM, etc.).
  • MRAM persistent memory
  • Transferring between different addresses represents different meanings. For example, transferring local memory to the host side means that the user needs to read the data in the SSD, and the data is sent to the host. Transferring local high-speed memory to low-speed memory may indicate cache management and internal data optimization. Encapsulation is performed based on their commonalities.
  • Resource locking Lock(), with one parameter, the Lock resource number. After calling this function, a lock will be requested and the task will be switched until the lock resource is acquired, and then the current process will be switched back. In a system with multiple instances, there will inevitably be resource competition risks. Therefore, locking is required.
  • the hardware may support many physical locks. In such a hardware system, these locks can be encapsulated. Some hardware systems support a limited number of physical locks. In such a system, a lock resource is needed for overall mutual exclusion, and then independent resources are accessed. It is also possible to implement lock requests for multiple resources.
  • NAND operations include:
  • Read NAND readNAND(), with two sets of parameters, NAND address, and read-related parameters, including the read capacity and the location where the read data is moved;
  • Send a completion message to the host sendCpl().
  • a completion message can be sent to the host.
  • This process is generally implemented by operating hardware and can be encapsulated. The specific operation depends on the hardware system deployed by SSD_OS. On a controller, it is implemented by configuring registers for the hardware, and the hardware then fills in specific messages in the completion message queue of the host.
  • the process function includes a system call function
  • the system call function includes any one or a combination of several of the following functions: a memory application function, a memory release function, an encryption algorithm function, a compression algorithm function, a RAID operation function, a memory search function, a memory sorting function, and a management interface input and output function function.
  • SSD_OS can encapsulate these algorithms into system calls to save developers the development workload of implementing this process again.
  • memAlloc() Applying and releasing memory: memAlloc(), memFree(), apply for memory from system resources. It takes two parameters, the type of memory (high-speed memory, low-speed, non-volatile memory), and the size of the memory. The return value is the memory address. If it fails, it returns a special value, such as -1.
  • Encryption/compression algorithm encrypt(), compress().
  • Some hardware provides encryption/compression modules. If not, it can be implemented by software. Considering the different application requirements of different SSDs, some SSD_OS users may not need compression/encryption requirements. This part can be tailored when SSD_OS is deployed. It has two parameters, Src memory address and DST memory address. For encryption functions, encryption algorithms will also be provided, including key parameters.
  • RAID operation RAID5(), RAID6().
  • Enterprise-level SSDs generally have RAID functions.
  • the RAID operation is encapsulated with two sets of parameters, the Src address and the DST address. Since RAID performs bit calculations on multiple addresses to generate check values, the Src address may be multiple different addresses, that is, the number of parameters is variable.
  • the DST address is an output address for RAID5 operations and two output addresses for RAID6 (there are two different bit algorithms to generate two sets of check data).
  • searchInRam() searches for a data pattern in memory. This function is used in some algorithm calculations. It has two sets of parameters: the address search range (including the starting address and length, the granularity of the variable), and the search pattern (including the mask and comparison value). For example, the following search behavior can be performed: searchInRam((0x01000000, 0x1000, 4), (0xFFF0000, 0x1234)). It means that the memory address starting from 0x100000000, the search length is 0x1000, and each memory is searched as 4 bytes. If in this memory, each The data of the address is XORed with 0xFFF0000. If the result of the XOR is 0x1234, this address is returned as the search result.
  • sortInRam() sorts a certain memory area. This function is used in some algorithm calculations. It has two sets of parameters: the sorting address range (including the starting address and length, the granularity of the variable field), and the sorting comparison method (greater than, less than). After calling this function, the memory area is sorted from small to large (if the sorting method parameter is less than), and the sorted result overwrites the original memory address.
  • Management interface input and output functions uart_input(), uart_output(), spi_input(), spi_output().
  • management interface such as the SPI interface.
  • developers often communicate with the firmware through the low-speed serial port.
  • This function has a set of parameters, that is, the input or output content. Of course, it also has the initialization operation of the management interface, which will not be repeated here.
  • SSD_OS will also provide a unified user interface, serviceRoutine(), through which developers can query or inject commands. This function is used during the development process and is turned off when the product is released.
  • the implementation method can be: provide a special system function in the system to implement the role of the on-duty process. After this function is enabled, it waits to receive the uart_input instruction. In the input instruction, the operation instruction word and the parameters of the instruction are encapsulated.
  • the instruction word can contain the following content:
  • command word viewRam
  • command parameters memory address, length.
  • command word insertRoutine
  • command parameter task name
  • the present application further discloses a firmware design based on an SSD operating system in some embodiments.
  • the present application provides a flowchart of another task scheduling method in some embodiments, as shown in FIG. 2 , including:
  • S202 Controlling the start of the on-duty process; wherein the on-duty process is used to receive an injection command to the solid state drive;
  • S203 starting a control management process; wherein the management process is used to receive a management command for the solid state drive;
  • the SSD_OS is initialized, the stack is allocated, the hardware interface is initialized, etc. This is transparent to the SSD Firmware developer, and the developer does not need to understand this software process.
  • the SSD Firmware opens the on-call process, which is the user interface mentioned above.
  • the SSD firmware opens the processing process for management commands, and each management command opens a process.
  • the SSD Firmware enters a while loop, receiving each IO command, and each IO command Corresponds to a process.
  • requestHandler is responsible for processing IO commands.
  • an IO may be a read, write, Trim or other IO command. Read and write are described here to demonstrate how to implement firmware on SSD_OS.
  • Lock (OneIO.LBA, OneIO.Length) //Lock the LBA and address of the current read command.
  • taskSwitch() will be automatically called in the lock function, and this function will not be returned until the lock is acquired;
  • PBA lookupTable (oneIO. LBA) //According to the LBA address, look up the table and get the physical address, referred to as PBA. This function needs to be implemented by the user, not a routine packaged by the OS.
  • buffer memAlloc() //Before reading data from NAND, apply for a memory address to store the data
  • Lock (OneIO.LBA, OneIO.Length) //Lock the LBA and address of the current write command.
  • taskSwitch() will be automatically called in the lock function, and this line will not be returned until the lock is acquired.
  • buffer memAlloc() //Before writing NAND data, apply for a memory address to store the data
  • PBA AllocNANDAddr (oneIO.LBA) // According to the internal data structure and address allocation logic of the firmware, select a free address to store this data. This is the logic that the firmware developer needs to implement, and will not be described here.
  • firmware developer only needs to consider the business logic and does not need to care about the underlying information of process switching and resources, which is convenient for Developers developing firmware can reduce the complexity of development, reduce development costs and expenses, and improve development efficiency.
  • firmware can also adapt to different hardware architectures, so that a set of firmware can adapt to hardware from different manufacturers.
  • it can provide a reference for hardware design, so that hardware and software can cooperate more effectively. If the hardware can provide a high-performance process scheduler, it can be effectively connected with SSD_OS to provide higher SSD performance.
  • a task scheduling device provided in some embodiments of the present application is introduced below.
  • the task scheduling device described below and the task scheduling method described above can be referenced to each other.
  • FIG. 3 a structural diagram of a task scheduling device provided in some embodiments of the present application, as shown in FIG. 3 , includes:
  • a creation module 301 is used to create a target task and create a corresponding target process for the target task;
  • a selection module 302 is used to select an idle target CPU core for a target task and deploy the target process in the target CPU core;
  • An execution module 303 is used to call a process function in a target process using a target CPU core to execute a target task;
  • the calling module 304 is used to call the task switching function of the target task during the execution of the target task; wherein the parameters of the task switching function include the dependent object and the parameters corresponding to the dependent object during the task switching;
  • the switching module 305 is used to select a switching task from all tasks waiting to be switched, and use the target CPU core to call a process function corresponding to the switching task to switch the target CPU core to execute the switching task.
  • a task switching function is provided for the user in the operating system. Compared with the prior art which uses interrupts to perform task switching, in some embodiments of the present application, the task switching efficiency is improved and the high concurrency requirements of the SSD are met.
  • the creation module 301 includes:
  • a first determining unit configured to determine task parameters of a target task; wherein the task parameters at least include a function corresponding to the target task and a parameter corresponding to the function;
  • a creation unit used for creating a corresponding target process for a target task based on task parameters of the target task
  • the allocation unit is used to allocate resources to the target process; wherein the resources include task identification, stack space, and register address.
  • the allocation unit is used to allocate a stack space of a preset size to the target process.
  • the allocation unit is used to: divide all stack spaces into multiple Subspaces of the same size; the smallest subspace that is larger than the stack space required by the target process is allocated to the target process as the target subspace.
  • the following further includes:
  • the detection module is used to detect whether the dependent object corresponding to the target task is completed. If completed, the target task is used as a task waiting to be switched.
  • the switching module 305 includes:
  • a second determining unit configured to determine the first priority of all the tasks waiting to be switched according to the attributes of all the tasks waiting to be switched;
  • a selection unit used for selecting a task waiting to be switched with the highest first priority as a switching task
  • the switching unit is used to use the target CPU core to call the process function corresponding to the switching task to switch the target CPU core to execute the switching task.
  • the attributes include any one or a combination of any one of displayed task switching, host read, host write, host management commands, background read, background write, background management commands, metadata management, algorithms, and statistical information in order of first priority from high to low.
  • the selection unit is used to: if there are multiple tasks waiting to be switched with the highest first priority, determine the second priority of all tasks waiting to be switched according to the dependent objects of all tasks waiting to be switched when the tasks are switched; and select the task waiting to be switched with the highest second priority among the multiple tasks waiting to be switched with the highest first priority as the switching task.
  • dependent objects include completion messages, lock resource releases, NAND read and write commands, DMA flow commands to the host side, DMA flow commands to the device side, lock resource acquisition commands, timers, and algorithm modules in order of the second priority from high to low.
  • the following further includes:
  • the improving module is used to improve the second priority level of the target task by a preset level if the timer end time of the target task exceeds a preset value.
  • the switching module 305 is used to: determine the time for all tasks waiting to be switched to complete the corresponding dependent objects; select the task waiting to be switched with the longest time as the switching task; and use the target CPU core to call the process function corresponding to the switching task to switch the target CPU core to the switching task execution.
  • the following further includes:
  • the communication module is used to determine whether the processes corresponding to other tasks are deployed in the target CPU core when the target task needs to communicate with other tasks; if so, the target task uses shared memory variables to communicate with other tasks. If not, the target task needs to communicate with other tasks by using resource lock mutual exclusion.
  • the following further includes:
  • the deletion module is used to delete the context information of the target task and release the stack space of the target task when the target task is completed.
  • the process function includes a resource encapsulation function
  • the resource encapsulation function includes any one or a combination of several of the following functions: selecting an input/output command function, a data transmission function, a resource locking function, a NAND operation function, and a function of sending a completion message to the host.
  • the process function includes a system call function
  • the system call function includes any one or a combination of several of the following functions: a memory application function, a memory release function, an encryption algorithm function, a compression algorithm function, a RAID operation function, a memory search function, a memory sorting function, and a management interface input and output function function.
  • the following further includes:
  • Initialization module used to initialize the operating system, allocate stack, and initialize hardware interface
  • a first control module is used to control the start of the on-duty process; wherein the on-duty process is used to receive an injection command to the solid state drive;
  • a second control module is used to control the startup of a management process; wherein the management process is used to receive management commands for the solid state drive;
  • the receiving module is used to receive the task creation command.
  • FIG4 is a structural diagram of an electronic device provided in some embodiments of the present application. As shown in FIG4, the electronic device includes:
  • Communication interface 1 capable of exchanging information with other devices such as network devices;
  • the processor 2 is connected to the communication interface 1 to realize information exchange with other devices and is used to execute the task scheduling method provided by one or more technical solutions when running a computer program.
  • the computer program is stored in the memory 3.
  • bus system 4 is used to realize the connection and communication between these components.
  • bus system 4 also includes a power bus, a control bus and a status signal bus.
  • various buses are marked as the bus system 4 in FIG. 4.
  • the memory 3 in some embodiments of the present application is used to store various types of data to support the operation of the electronic device. Examples of such data include: any computer program used to operate on the electronic device.
  • the memory 3 can be a volatile memory or a non-volatile memory, and can also include both volatile and non-volatile memories.
  • the non-volatile memory can be a read-only memory (ROM), a programmable read-only memory (PROM), an erasable programmable read-only memory (EPROM), an electrically erasable programmable read-only memory (EEPROM), a magnetic random access memory (FRAM), a flash memory, a magnetic surface memory, an optical disc, or a compact disc read-only memory (CD-ROM); the magnetic surface memory can be a disk memory or a tape memory.
  • the volatile memory can be a random access memory (RAM), which is used as an external cache.
  • RAM random access memory
  • SRAM static random access memory
  • SSRAM synchronous static random access memory
  • DRAM dynamic random access memory
  • SDRAM synchronous dynamic random access memory
  • DDRSDRAM double data rate synchronous dynamic random access memory
  • ESDRAM enhanced synchronous dynamic random access memory
  • SLDRAM synchronous link dynamic random access memory
  • DRRAM direct memory bus random access memory
  • the method disclosed in some embodiments of the present application can be applied to the processor 2 or implemented by the processor 2.
  • the processor 2 may be an integrated circuit chip with signal processing capabilities. In the implementation process, each step of the above method can be completed by the hardware integrated logic circuit in the processor 2 or the instruction in the form of software.
  • the above processor 2 can be a general-purpose processor, a DSP, or other programmable logic devices, discrete gates or transistor logic devices, discrete hardware components, etc.
  • the processor 2 can implement or execute the methods, steps and logic block diagrams disclosed in some embodiments of the present application.
  • the general-purpose processor can be a microprocessor or any conventional processor, etc.
  • the decoding processor In combination with the steps of the method disclosed in some embodiments of the present application, it can be directly embodied as a hardware decoding processor to execute, or it can be executed by a combination of hardware and software modules in the decoding processor.
  • the software module can be located in a storage medium, which is located in the memory 3.
  • the processor 2 reads the program in the memory 3 and completes the steps of the above method in combination with its hardware.
  • a non-volatile computer-readable storage medium is also provided. As shown in FIG. 5 , the non-volatile computer-readable storage medium 50 stores a computer program 510. When the computer program 510 is executed by a processor, the steps of the above task scheduling method are implemented.
  • the integrated unit of the present application can also be stored in a computer-readable storage medium.
  • the technical solution of the embodiment of the present application can essentially or in other words, the part that contributes to the prior art can be embodied in the form of a software product, which is stored in a storage medium and includes a number of instructions for an electronic device (which can be a personal computer, server, network device, etc.) to execute all or part of the methods of each embodiment of the present application.
  • the aforementioned storage medium includes: various media that can store program codes, such as mobile storage devices, ROM, RAM, magnetic disks or optical disks.

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Abstract

本申请公开了一种任务调度方法、装置及电子设备和存储介质，涉及计算机技术领域，该方法包括：创建目标任务，并为目标任务创建对应的目标进程；为目标任务选择空闲的目标CPU核心，并将目标进程部署于目标CPU核心中；利用目标CPU核心调用目标进程中的进程函数以执行目标任务；在执行目标任务的过程中，调用目标任务的任务切换函数；任务切换函数的参数包括在任务切换时的依赖对象和依赖对象对应的参数；在所有等待切换的任务中选择切换任务，利用目标CPU核心调用切换任务对应的进程函数以将目标CPU核心切换至切换任务执行。本申请在操作***中为用户提供了一个任务切换函数，提高了任务切换效率，满足了SSD高并发的需求。

Description

一种任务调度方法、装置及电子设备和存储介质
相关申请的交叉引用
本申请要求于2022年12月06日提交中国专利局，申请号为202211554104.8，申请名称为“一种任务调度方法、装置及电子设备和存储介质”的中国专利申请的优先权，其全部内容通过引用结合在本申请中。
技术领域
本申请涉及计算机技术领域，更具体地说，涉及一种任务调度方法、装置及一种电子设备和一种非易失性计算机可读存储介质。
背景技术
SSD(Solid State Disk，固态硬盘)具有高性能，低功耗的优势，是一种用来存储用户数据的设备。固态硬盘由控制器，存储介质NAND(NAND flash memory，计算机闪存设备)等模块组成。控制器中运行Firmware(固件)进行资源的控制，对用户数据存储调度，维护NAND设备等操作。
固态硬盘提供了极高的并发度，如一秒钟提供1.6百万次读写。这些读写并不是顺序完成的，不是完成一个之后再处理下一个。如果是顺序执行每一个任务，就无法达到这么高的性能了。在固态硬盘内部，这些命令是并发执行的，即一个命令还未完成，另外一个命令也开始执行了。一般来说，在当前的技术下，可以高达几千到几万个读写操作同时在执行。
每一个命令都面临着命令报文解析，查找映射表，操作NAND，错误和异常处理，数据传输，返回完成状态等步骤。命令不同，操作的步骤也不一定完全一样。由于有几千到几万个命令同时在操作，SSD内部并没有几千到几万个运算单元，而是将运算资源通过调度进行使用的。
一般来说，如果需要同时操作多个任务，而计算资源是有限的，假如说有n个CPU(Central Processing Unit，中央处理器)，若干内存。那么需要这n个CPU进行任务调度，来服务于多个任务，也就是说，让这个CPU一会儿做任务1，一会儿做任务2。即分时复用这个CPU，或者说这一组资源，当这多个任务中的某一个任务达到完成状态，则释放出资源，又有可能增加服务于一个新的任务。
在目前的已有技术下，是没有固态硬盘的专用操作***的。操作***至少要提供任务调 度，资源管理，***调用的功能。一般的操作***不是为了如此高的并发度设计的，如果用操作***内的每个进程服务于一个任务，那么就会有成千上万个进程。操作***虽然名义上可以有这么多进程，但是在这种场景下进程的切换调度效率非常低，无法满足SSD的需求。因此在SSD Firmware开发中，需要开发者自己考虑任务如何调度，如何切换的细节。因此带来了如下的问题：一种firmware的构架仅适用于一种硬件体系结构，由于firmware的开发过程已经充分考虑了硬件的特性，将这些特性编程进入了firmware内部结构，如果换了一种硬件结构，则这些特性会成为新的版本firmware的障碍，需要重新设计。另外，开发效率低，如果firmware的开发者不仅需要考虑firmware的功能逻辑，还要开发一部分操作***的功能，如任务调度，资源管理等，那么对firmware的开发者的个人能力，以及工作量都带来负面影响。因此在没有操作***的方案下，开发一个包含一部分操作***功能的firmware，不是一个很好的方案。
发明内容
本申请的目的在于提供一种任务调度方法、装置及一种电子设备和一种非易失性计算机可读存储介质，提高了任务切换效率，满足了SSD高并发的需求。
为实现上述目的，本申请在一些实施例中提供了一种任务调度方法，应用于固态硬盘的操作***，方法包括：
创建目标任务，并为目标任务创建对应的目标进程；
为目标任务选择空闲的目标CPU核心，并将目标进程部署于目标CPU核心中；
利用目标CPU核心调用目标进程中的进程函数，以执行目标任务；
在执行目标任务的过程中，调用目标任务的任务切换函数；其中，任务切换函数的参数包括在任务切换时的依赖对象和依赖对象对应的参数；
在所有等待切换的任务中选择切换任务，利用目标CPU核心调用切换任务对应的进程函数，以将目标CPU核心切换至切换任务执行。
在一些实施例中，为目标任务创建对应的目标进程，包括：
确定目标任务的任务参数；其中，任务参数至少包括目标任务对应的函数和函数对应的参数；
基于目标任务的任务参数为目标任务创建对应的目标进程，并为目标进程分配资源；其中，资源包括任务标识、栈空间、寄存器地址。
在一些实施例中，为目标进程分配资源，包括：
为目标进程分配预设大小的栈空间。
在一些实施例中，为目标进程分配资源，包括：
将所有栈空间划分为多个不同大小的子空间；
将大于目标进程需要的栈空间的大小的最小的子空间作为目标子空间分配至目标进程。
在一些实施例中，利用目标CPU核心调用切换任务对应的进程函数，以将目标CPU核心切换至切换任务执行之后，还包括：
检测目标任务对应的依赖对象是否完成，若完成，则将目标任务作为等待切换的任务。
在一些实施例中，在所有等待切换的任务中选择切换任务，包括：
根据所有等待切换的任务的属性确定所有等待切换的任务的第一优先级；
选择第一优先级最高的等待切换的任务作为切换任务。
在一些实施例中，属性按照第一优先级由高至低包括显示的任务切换、主机读取、主机写入、主机管理命令、后台读取、后台写入、后台管理命令、元数据管理、算法、统计信息中任一项或任几项的组合。
在一些实施例中，选择第一优先级最高的等待切换的任务作为切换任务，包括：
若存在多个第一优先级最高的等待切换的任务，则根据所有等待切换的任务在任务切换时的依赖对象确定所有等待切换的任务的第二优先级；
在多个第一优先级最高的等待切换的任务中选择第二优先级最高的等待切换的任务作为切换任务。
在一些实施例中，依赖对象按照第二优先级由高至低包括完成消息、锁资源释放、NAND读写命令、DMA流向主机端的命令、DMA流向设备端的命令、锁资源获取命令、定时器、算法模块。
在一些实施例中，还包括：
若目标任务的定时器结束时间超过预设值，则将目标任务的第二优先级提高预设级别。
在一些实施例中，在所有等待切换的任务中选择切换任务，包括：
确定所有等待切换的任务完成对应的依赖对象的时间；
选择时间最长的等待切换的任务作为切换任务。
在一些实施例中，还包括：
当目标任务需要与其他任务通信时，判断其他任务对应的进程是否部署于目标CPU核心中；
若是，则采用共享内存变量的方式实现目标任务需要与其他任务的通信。
在一些实施例中，判断其他任务对应的进程是否部署于目标CPU核心中，包括：
若其他任务对应的进程部署于其他CPU核心中，则采用资源锁互斥的方式实现目标任务需要与其他任务的通信。
在一些实施例中，还包括：
当目标任务完成时，删除目标任务的上下文信息，并释放目标任务的栈空间。
在一些实施例中，进程函数包括资源封装函数，资源封装函数包括选取输入/输出命令函数、数据传输函数、资源加锁函数、NAND操作函数、向主机发送完成消息函数中任一项或任几项的组合。
其中，进程函数包括***调用函数，***调用函数包括申请内存函数、释放内存函数、加密算法函数、压缩算法函数、RAID操作函数、内存搜索函数、内存排序函数、管理接口输入输出功能函数中任一项或任几项的组合。
在一些实施例中，还包括：
初始化操作***，分配堆栈，初始化硬件接口；
控制值守进程启动；其中，值守进程用于接收对固态硬盘的注入命令；
控制管理进程启动；其中，管理进程用于接收对固态硬盘的管理命令；
接收任务创建命令。
为实现上述目的，本申请在一些实施例中还提供了一种任务调度装置，应用于固态硬盘的操作***，装置包括：
创建模块，用于创建目标任务，并为目标任务创建对应的目标进程；
选择模块，用于为目标任务选择空闲的目标CPU核心，并将目标进程部署于目标CPU核心中；
执行模块，用于利用目标CPU核心调用目标进程中的进程函数，以执行目标任务；
调用模块，用于在执行目标任务的过程中，调用目标任务的任务切换函数；其中，任务切换函数的参数包括在任务切换时的依赖对象和依赖对象对应的参数；
切换模块，用于在所有等待切换的任务中选择切换任务，利用目标CPU核心调用切换任务对应的进程函数，以将目标CPU核心切换至切换任务执行。
为实现上述目的，本申请在一些实施例中还提供了一种电子设备，包括：
存储器，用于存储计算机程序；
处理器，用于执行计算机程序时实现如上述任务调度方法的步骤。
为实现上述目的，本申请在一些实施例中还提供了一种非易失性计算机可读存储介质， 非易失性计算机可读存储介质上存储有计算机程序，计算机程序被处理器执行时实现如上述任务调度方法的步骤。
通过以上方案可知，本申请在一些实施例中提供的一种任务调度方法，包括：创建目标任务，并为目标任务创建对应的目标进程；为目标任务选择空闲的目标CPU核心，并将目标进程部署于目标CPU核心中；利用目标CPU核心调用目标进程中的进程函数，以执行目标任务；在执行目标任务的过程中，调用目标任务的任务切换函数；其中，任务切换函数的参数包括在任务切换时的依赖对象和依赖对象对应的参数；在所有等待切换的任务中选择切换任务，利用目标CPU核心调用切换任务对应的进程函数，以将目标CPU核心切换至切换任务执行。
本申请在一些实施例中，操作***中为用户提供了一个任务切换函数，相比于现有技术中采用中断的方式进行任务切换，本申请在一些实施例中，提高了任务切换效率，满足了SSD高并发的需求。本申请在一些实施例中还公开了一种任务调度装置及一种电子设备和一种非易失性计算机可读存储介质，同样能实现上述技术效果。
应当理解的是，以上的一般描述和后文的细节描述仅是示例性的，并不能限制本申请。
附图说明
为了更清楚地说明本申请实施例或现有技术中的技术方案，下面将对本申请在一些实施例或现有技术描述中所需要使用的附图作简单地介绍，显而易见地，下面描述中的附图仅仅是本申请的一些实施例，对于本领域普通技术人员来讲，在不付出创造性劳动的前提下，还可以根据这些附图获得其他的附图。附图是用来提供对本公开的进一步理解，并且构成说明书的一部分，与下面的具体实施方式一起用于解释本公开，但并不构成对本公开的限制。在附图中：
图1为本申请在一些实施例中提供的一种任务调度方法的流程图；
图2为本申请在一些实施例中提供的另一种任务调度方法的流程图；
图3为本申请在一些实施例中提供的一种任务调度装置的结构图；
图4为本申请在一些实施例中提供的一种电子设备的结构图；
图5为本申请在一些实施例中提供的一种非易失性计算机可读存储介质的结构图。
具体实施方式
下面将结合附图，对本申请在一些实施例中的技术方案进行清楚、完整地描述。显然， 所描述的实施例仅仅是本申请一部分实施例，而不是全部的实施例。基于本申请中的实施例，本领域普通技术人员在没有作出创造性劳动前提下所获得的所有其他实施例，都属于本申请保护的范围。另外，在本申请在一些实施例中，“第一”、“第二”等是用于区别类似的对象，而不必用于描述特定的顺序或先后次序。
本申请在一些实施例中公开了一种任务调度方法，可以提高任务切换效率，满足了SSD高并发的需求。
参见图1，为本申请在一些实施例中提供的一种任务调度方法的流程图，如图1所示，包括：
S101：创建目标任务，并为目标任务创建对应的目标进程；
在一些实施例中，为SSD提供专业的操作***SSD_OS，操作***暴露给应用程序创建任务的接口CreateTask()，开发者对每个读写请求会分配一个任务。对开发者来说，这个任务里面的工作全都是同步调用，不需开发者自己将任务做成回调函数等待切换，切换过程是SSD_OS实现的，开发者可以不感知这个过程。除了读写请求之外，其他的工作也可以封装在一个任务中，如定时器任务、***管理任务等。
为目标任务创建对应的目标进程，为目标任务创建对应的目标进程，包括：确定目标任务的任务参数；其中，任务参数至少包括目标任务对应的函数和函数对应的参数；基于目标任务的任务参数为目标任务创建对应的目标进程，并为目标进程分配资源；其中，资源包括任务标识、栈空间、寄存器地址。
创建任务时，包含与任务相关的参数，其中至少包括：任务对应的函数实例(也即进程函数)、与这个函数相关的参数。这个任务的任务参数，如创建读取相关的任务，则将读取对应的函数(由firmware开发者开发)传递给CreateTask()过程。用户可以创建一个读取任务，同时将收到的Host读取指令报文作为参数传给这个任务。
在调用创建任务时，任务可以立即开始执行，也可以等待稍后调用一个任务启动函数触发这个任务开始执行。当SSD_OS的内部资源不足时，创建任务也可以失败，则firmware应用程序应当过一段时间重新尝试申请任务。
当应用程序调用CreateTask时，SSD_OS内部给这个任务分配运行时资源。包括如下要素(称为任务上下文，即context)：任务ID(简称TaskID)、栈空间(Stack)。
操作***底层用于识别任务的标识符。对于一个SSD_OS的版本来说，这个TaskID可以是有限数量的。比如在V1.0版本的SSD_OS，可以仅支持1000个ID，V2.0可以支持2000个ID。不 同版本的SSD_OS是和硬件绑定的，如果某个SSD控制器厂商的硬件资源较多，则可以有更多的Task ID。TaskID是有最大数量限制的，在SSD_OS初始化时根据版本号确定所有的ID数量，已分配出去的ID在回收之前，不可以再次分配。如果没有taskID可以分配，则创建任务失败。
对于栈空间，用于保存这个任务的相关信息的内存空间。比如一个读取任务，用户需要一个临时内存空间保存上位机的命令报文(比如NVMe命令包)，以及用户在进行算法或者流程操作时需要的本地变量(比如进行for循环，用于循环次数的变量)。SSD_OS初始化时分配一段内存空间内作为栈空间(在SSD_OS的设计中不关心是DDR还是SRAM，开发者在部署SSD_OS的时候自行根据需求选择)。
在一些实施例中，为目标进程分配预设大小的栈空间。在内存较大的硬件环境中，也可以直接给每个任务分配足够大的默认空间值，这样避免内存拷贝，同时不再让用户显式的检查是否越界，减少***调用次数。举例说明，每个任务都给分配固定大小的栈，如128K Bytes，那么如果SSD_OS再部署的时候，要支持2000个并发任务，则需要256M Bytes的栈。
在一些实施例中，将所有栈空间划分为多个不同大小的子空间；将大于目标进程需要的栈空间的大小的最小的子空间作为目标子空间分配至目标进程。当分配任务时，SSD_OS给这个任务分配一个默认长度的栈空间(默认长度由部署SSD_OS的时候设定)。在SSD_OS中提供一个栈空间检查函数，项目开发者显式的调用这个函数对可用栈空间进行检查，检查时，开发者传入需要的栈大小size_to_use。当剩余栈空间小于size_to_use时，SSD_OS将重新分配一个更大的内存空间，并且将用户当前的栈内容搬运到新的空间，同时修改程序的栈指针，以此保障开发者的程序不会越界到栈空间之外。举例说明，栈空间分为8K、16K、32K、64K、128K、…多种大小，每种大小是预先设定的数量，比如8K的有2000个，16K的有1000个，128K的有300个。当创建任务时，默认分配给最小的一种栈空间，从栈空间的空闲列表中选择一个分配出来。当firmware再调用栈空间检查函数时，发现当前已经接近栈空间的顶端，则重新分配一个较大的栈空间，将数据拷贝到这个空间，修改栈指针之后重新运行。
当启动任务时，可以在CreateTask的时候启动，也可以另外调用函数进行启动，SSD_OS分配一个栈空间，将参数复制到栈空间，配置好栈寄存器地址，配置好环境对应的其它寄存器(与SSD_OS运行的硬件环境相关)，然后调用进程函数开始执行，因此启动任务是一个同步过程。
S102：为目标任务选择空闲的目标CPU核心，并将目标进程部署于目标CPU核心中；
在一些实施例中，如果***有多个CPU核心，SSD_OS将根据任务调度策略选择一个空闲 核心提交任务。如果所有的核心都在忙，则SSD_OS会等待某个进程函数释放CPU为止。因此这个启动任务的过程是阻塞式的，只有成功了才会继续往后执行。
S103：利用目标CPU核心调用目标进程中的进程函数，以执行目标任务；
S104：在执行目标任务的过程中，调用目标任务的任务切换函数；其中，任务切换函数的参数包括在任务切换时的依赖对象和依赖对象对应的参数；
S105：在所有等待切换的任务中选择切换任务，利用目标CPU核心调用切换任务对应的进程函数，以将目标CPU核心切换至切换任务执行。
在一些实施例中，SSD_OS并没有涉及底层的一个任务调度器，并没有通过划分时间片来进行多任务调度，而是通过一个创新算法来实现的任务切换。
为了描述方便，举一个例子，firmware的结构可以类似于如下形式(伪代码1)：
不同于常规的操作***，SSD内部计算资源有限，因此没有用中断的方式切换任务。一般操作***会在事件发生时(比如高优先级任务请求、时间片中断、IO请求等)，进入任务切换的判断过程，从当前的任务退出，选择新的任务进行切入。在一些实施例中，考虑到SSD并不需要这样灵活的操作***，开发者会自己评估每个时间段的耗时，软件可以显式的进行任务切换，因此选择另外一种切换的方案。
当进程函数开始执行之后，开始处理IO命令，管理命令，后台命令等业务逻辑。由于固态硬盘***存在多个硬件加速单元，进程函数进行到某个步骤之后，将会请求硬件加速单元进行工作。这个时候进程函数是不必要等待硬件加速单元工作完成的，可以处理另外一个任务。因此在SSD_OS基础上的应用程序，要求用户主动调用任务切换函数(taskSwitch函数)进行任务切换。
taskSwitch包含两组参数：依赖对象、以及这个对象的相关信息。举例来说，一个任务可能在处理到某个节点时，希望sleep10秒钟，因此taskSwitch切换到其他进程，希望让定 时器在10秒钟之后产生信号，以便切换回来。这个参数可以写作(Timer，10second)。或者举例来说，一个任务可能配置了DMA(Direct Memory Access，直接内存访问)任务，让DMA模块搬运10M Bytes数据(从A地址搬运到B地址)，配置完DMA相关的参数之后(这个DMA参数假设称为DMA参数X)，这个任务就等待DMA搬运完成，此时可以让出CPU计算其他的Task，这样taskSwitch的参数可以写作(DMA,(DMA参数X,DMA搬运完成))。
当进入任务切换函数后，SSD_OS将根据所有等待切换的进程(Pending Task)的现场状况，选择一个函数进入。需要注意的是，下一个CreateTask函数也是Pending Task之一，因为下一个createTask函数是尚未运行到的代码，所以调度算法会在评估已开始执行的任务都不需要被调用之后，才会选择下一个createTask的进程。
taskSwitch对开发者来说是透明的，即开发者不需要关心任务是怎么切换的，这是SSD_OS处理的工作。
taskSwitch算法：createTask函数会在SSD_OS内部记录每个Task的Context，当taskSwitch之后，需要做的事情就是在这些Context中选择一个Task进行恢复调用。taskSwitch的发起者，调用taskSwith的本意就是将CPU资源让渡出来，给其他进程使用，所以在这个进程的Context中，会记录下来状态为IDLE，并且记录这个task被唤醒的条件(即前述的createTask的两组参数)，所以在进入taskSwitch之后，需要查看所有候选任务的条件是否满足。如果任何一个候选任务都不具备唤醒条件，则程序继续向后执行，可以执行后面的语句。如果仅有一个候选任务可以执行，则执行此任务。如果有多个任务均处于可唤醒的状态，则根据算法进行选择。
在一些实施例中，在所有等待切换的任务中选择切换任务，包括：根据所有等待切换的任务的属性确定所有等待切换的任务的第一优先级；选择第一优先级最高的等待切换的任务作为切换任务。
在一些实施例中，根据任务优先级进行调度，根据任务的属性对每个任务设定一个第一优先级。在一些实施例中，属性按照第一优先级由高至低包括显示的任务切换、主机读取、主机写入、主机管理命令、后台读取、后台写入、后台管理命令、元数据管理、算法、统计信息中任一项或任几项的组合。
显示的任务切换：当一个任务主动切换到另外一个任务，这种优先级最高，优先级为1。主机读取：主机发来的读取命令，优先级为2。主机写入：主机发来的写入命令，优先级为3。主机管理命令：主机发送的管理命令，优先级为4。后台读取：firmware内部进行管理产生的读取，如进行Garbage Collection的读取命令，优先级为5。后台写入：Firmware内 部进行管理产生的写入命令，优先级为6。后台管理命令：firmware内部进行任务调度等产生的计算过程，例如进行Block定时刷新，优先级为7。元数据管理：元数据的保存操作，优先级为8。算法：firmware内部进行的算法操作，例如数据结构排序优化等，优先级为9。统计信息：进行内部统计的操作，优先级为0。
在同一优先级内有多个任务时，则根据依赖对象进行排序。也即，选择第一优先级最高的等待切换的任务作为切换任务，包括：若存在多个第一优先级最高的等待切换的任务，则根据所有等待切换的任务在任务切换时的依赖对象确定所有等待切换的任务的第二优先级；在多个第一优先级最高的等待切换的任务中选择第二优先级最高的等待切换的任务作为切换任务。
在一些实施例中，依赖对象按照第二优先级由高至低包括完成消息、锁资源释放、NAND读写命令、DMA流向主机端的命令、DMA流向设备端的命令、锁资源获取命令、定时器、算法模块。
完成消息：给主机发送完成消息的硬件模块，只要调用此模块，主机端即认为命令完成，因此这个模块的优先级最高，优先级为1。锁资源释放：对互斥量资源的释放过程，释放之后其他任务才能再次获取资源，因此优先级较高，优先级为2。NAND读写命令：与NAND、Flash端通道的命令，优先级为3。DMA流向主机端的命令：数据发往主机，有助于命令完成，优先级为4。DMA流向设备端的命令：常规操作，优先级为5。锁资源获取命令：获取锁资源，优先级为6。定时器：定时器如果到时间了，则唤醒，定时器的优先级较高，因为firmware不会在关键路径上使用定时器作为精确控制的手段，优先级为7。算法模块：加密、压缩等算法，是不常用的，会放在后台执行，因此不在关键路径上，优先级为8。其他模块，优先级为9。
在一些实施例中，还包括：若目标任务的定时器结束时间超过预设值，则将目标任务的第二优先级提高预设级别。需要注意的是定时器模块，如果已经到预设时间，则应该唤醒。但是由于定时器的优先级较低，则如果出现多个任务同时需要唤醒，它的优先级较低，因此对定时器的权重进行调整，如果调度到某个任务，发现这个定时器已经超时，则适度提升其优先级。在一些实施例中，可以每超时10％的时间，优先级提高一档。
在一些实施例中，在所有等待切换的任务中选择切换任务，包括：确定所有等待切换的任务完成对应的依赖对象的时间；选择时间最长的等待切换的任务作为切换任务。
在一些实施例中，采用专用硬件或者一个独立的CPU，监控每个任务依赖条件的完成时间，一旦完成，立即记下来这个项目的完成时间。当需要进行调度时，更新每个任务的超时 时间，选择超时时间最长的任务进行切换。此方案较为简单，但计算量较大，主要在于如果***内没有专用硬件记录依赖项的结束时间，需要一个独立的CPU专门做这件事情。因此SSD_OS更适合于有任务调度硬件的控制器。
综上，如果当前没有需要切入的任务，则继续执行后面的代码，一般来说是createTask或者Idle。
进一步的，利用目标CPU核心调用切换任务对应的进程函数，以将目标CPU核心切换至切换任务执行之后，还包括：检测目标任务对应的依赖对象是否完成，若完成，则将目标任务作为等待切换的任务。
在一些实施例中，当从一个任务切换出去时，需要记录其运行时的信息，主要是CPU的程序指针(PC)以及栈空间地址，栈空间是在createTask时创建的，如果栈空间不足，firmware将显式的重新设置栈地址。PC也将记录在Context中，当切换出去之后，记录下来切换之前的PC，当将来切换回来，再重新将PC赋值给CPU，恢复这个进程。
在上述实施例的基础上，在一些实施例中，还包括：当目标任务完成时，删除目标任务的上下文信息，并释放目标任务的栈空间。在一些实施例中，当一个任务到达完成时，需要通知SSD_OS删除其相关的信息，即上下文。为描述方便，这个函数称为closeTask()。当firmware调用closeTask()时，SSD_OS释放掉这个任务相关的上下文，释放掉这个任务的栈空间。然后调用一次taskSwitch()。此时的任务调度将不具有参数，因为它不会被切换进来。
可见，本申请在一些实施例中实现了在不用开发编译器的前提下进行任务切换。其次提出了进程切换的优先级策略，如果硬件模块或者一个独立的CPU可以加速这种切换过程，更具有实用性，即使没有这样的独立模块也可以使用。
在一些实施例中，在操作***中为用户提供了一个任务切换函数，相比于现有技术中采用中断的方式进行任务切换，本申请在一些实施例中提高了任务切换效率，满足了SSD高并发的需求。
在上述实施例的基础上，在一些实施例中，还包括：当目标任务需要与其他任务通信时，判断其他任务对应的进程是否部署于目标CPU核心中；若是，则采用共享内存变量的方式实现目标任务需要与其他任务的通信；若否，则采用资源锁互斥的方式实现目标任务需要与其他任务的通信。
当一个任务向另外一个任务通信时，分为两种场景：如果两个任务均在同一个物理CPU 上，那么只需要共享内存变量即可，实际上这两个任务是分时段占用CPU的，并不会真正抢占资源；如果两个任务不在一个CPU上，则需要调用硬件***提供的互斥方法进行数据保护。
在上述实施例的基础上，在一些实施例中，进程函数包括资源封装函数，资源封装函数包括选取输入/输出命令函数、数据传输函数、资源加锁函数、NAND操作函数、向主机发送完成消息函数中任一项或任几项的组合。
作为操作***，除了提供进程调度之外，还需要对***内的硬件进行封装，以便对软件开发友好，这样同样的软件在不同的硬件环境下的改动较小。在一些实施例中，定义了如下的封装接口，当需要调用时可以避免直接操作硬件，只需要调用***函数即可。
选取IO命令：selectIO()，当主机发送IO请求(包括读/写/Trim等)给SSD设备时，主机将命令封装在寄存器消息中发送给SSD，SSD的firmware感知到消息，并且选择一个IO命令。不同的控制器硬件感知消息和选择消息的方式可能有所不同，因此SSD_OS对这个操作进行封装，使得不同的硬件可以使用统一接口。在一种实现中，硬件会将所有的IO请求放到一个寄存器池中，selectIO()会在这个池中根据round-robin的方式进行选择。当没有IO命令时，这个命令立即完成，并且带有返回消息说明此时没有新的IO请求。如果有IO命令，则返回给firmware。
DMA数据传输：DMA()，带有两个参数，src和dst，分别表示DMA的输出地址和输入地址。数据传输是常用SSD内部操作。常见的传输地址包括主机和本地内存。而内存又分为高速内存(例如SRAM)和低速内存(DDR)，此外可能还有持久性内存(MRAM，PCM等)。不同的地址之间搬运代表不同的含义，如本地内存搬运到主机端，表示用户需要读取SSD中的数据，且数据发给了主机。本地高速内存搬运到低速内存，可能表示缓存管理和内部数据优化。根据其共性，进行封装。
资源加锁：Lock()，带有一个参数，Lock资源号。调用此函数之后，会申请锁，并且进行任务切换，直到获取锁资源，才会切换回来当前进程。在多个实例的***内不可避免地会有资源竞争冒险。因此需要加锁。硬件可能可以支持很多个物理锁，在这样的硬件***中，可以将这些锁封装起来。有的硬件***支持的物理锁的数量有限，在这样的***中，需要用一个锁资源进行整体互斥，然后再对独立的资源进行访问，也可以实现多个资源的加锁请求。
NAND操作包括：
初始化NAND：initNand()；
读取NAND：readNAND()，带有两组参数，NAND地址，以及读取相关参数，包括读取的容量大小，读取的数据搬运到的位置；
写入NAND，writeNAND()，同上，带有两组参数，NAND地址和写入参数；
擦除NAND，eraseNAND()，带有一组参数，NAND地址。
向主机发送完成消息：sendCpl()，当数据传输给主机，传输过程中没有发生错误，则可以给主机发送完成消息。这个过程一般会操作硬件来实现，可以封装起来。具体的操作会根据SSD_OS部署的硬件***相关，在一种控制器上，是通过给硬件配置寄存器，硬件再向主机的完成消息队列中填写特定的报文来实现的。
在上述实施例的基础上，在一些实施例中，进程函数包括***调用函数，***调用函数包括申请内存函数、释放内存函数、加密算法函数、压缩算法函数、RAID操作函数、内存搜索函数、内存排序函数、管理接口输入输出功能函数中任一项或任几项的组合。
在SSD的实现中，一般还会有一些通用的计算或者通用的处理过程，如某些算法是所有SSD都会用到的，因此SSD_OS可以将这些算法封装成***调用，以节省开发者再次实现此过程的开发工作量。
申请以及释放内存：memAlloc()、memFree()，从***资源中申请内存。带有两个参数，内存的类型(高速内存，低速，非易失内存)，以及内存的大小。返回值为内存地址。如果失败，则返回特殊值，如-1。
加密/压缩算法：encrypt()、compress()，有的硬件提供加密/压缩的模块，如果不提供则可以由软件实现。考虑到不同的SSD应用需求不同，有的SSD_OS的使用者可能不会用到压缩/加密的需求，这一部分可以在SSD_OS部署的时候进行裁剪。带有两个参数，Src内存地址和DST内存地址。对于加密功能，还将提供加密的算法，包括秘钥的参数。
RAID操作：RAID5()、RAID6()，企业级SSD一般带有RAID功能。将RAID操作进行封装带有两组参数，Src地址和DST地址。由于RAID是将多个地址进行bit计算，生成校验值，因此Src地址可能是多个不同的地址，即参数的数量是可变化的。DST地址对于RAID5操作是一个输出地址，对于RAID6是两个输出地址(有两个不同的bit算法，生成两组校验数据)。
内存搜索：searchInRam()，在内存中搜索某个数据pattern，在某些算法计算中会用到此功能。带有两组参数：地址搜索的范围(包括开始地址和长度，变量的颗粒度)，搜索的Pattern(包括掩码和比较值)。比如可以有如下的搜索行为，searchInRam((0x01000000，0x1000，4)，(0xFFF0000，0x1234))。表示从0x100000000开始的内存地址，搜索0x1000长度，每个内存按照4个字节进行搜索。如果在这个内存中，每个 地址的数据与0xFFF0000进行异或，如果异或的结果为0x1234，则将这个地址作为搜索的结果，进行返回。
内存排序：sortInRam()，对某个内存区域进行排序，在某些算法计算中会用到此功能。带有两组参数：排序的地址范围(包括开始地址和长度，变量字段的颗粒度)，以及排序的比较方法(大于，小于)。调用此函数之后，将内存的区域进行从小到大排序(如果排序方法参数为小于)，排序之后的结果覆盖原来的内存地址。
管理接口输入输出功能：uart_input()、uart_output()、spi_input()、spi_output()，SSD内部会有一些传感器，一般通过管理接口进行交互，如SPI接口。在开发过程中，开发者往往也会通过低速串口与Firmware进行通信。次函数带有一组参数，即输入或者输出的内容。当然与之同时的也会带有管理接口的初始化操作，不再赘述。
SSD_OS还将提供统一的用户界面，serviceRoutine()，开发者可以通过这个用户界面查询或者注入命令。这个功能在开发过程中使用，在产品发布时进行关闭。在一些实施例中，实现方法可以是：在***中提供一个特殊的***函数，实现值守进程的作用。这个函数使能后，即等待接受uart_input指令。在input指令中，封装了操作指令字和指令的参数。指令字可以包含如下内容：
查看内存，指令字：viewRam，指令参数：内存地址，长度。值守进程收到此命令之后，即会将对应地址的内容取出，并且通过uart_output传给开发者。
注入命令，指令字：insertRoutine，指令参数：任务名称。值守进程收到此命令之后，回到用createTask()，产生一个新的进程。进程的内容是传进来的任务名称。
本申请在一些实施例中还公开了一种任基于SSD操作***的Firmware设计，参见图2，本申请在一些实施例中提供的另一种任务调度方法的流程图，如图2所示，包括：
S201：初始化操作***，分配堆栈，初始化硬件接口；
S202：控制值守进程启动；其中，值守进程用于接收对固态硬盘的注入命令；
S203：控制管理进程启动；其中，管理进程用于接收对固态硬盘的管理命令；
S204：接收任务创建命令。
在一些实施例中，***上电之后，进行SSD_OS的初始化，分配堆栈，初始化硬件接口等，这个对SSD Firmware开发者来说是透明的，开发者不需要了解此软件过程。SSD Firmware打开值守进程，即前文的用户界面。SSD firmware打开管理命令的处理进程，每一种管理命令打开一个进程。SSD Firmware进入while循环，接收每一个IO命令，每个IO命令 对应一个进程。
综上，可以用如下(伪代码2)来表示：
需要描述requestHandler内部的实现方式：requestHandler负责处理IO命令，在一种实现方法中，一个IO有可能是读取，写入，Trim或者其他IO命令，在此处对读取和写入进行描述，以证明如何在SSD_OS上实现firmware。
对于读取服务例程，可以用如下方式设计：
def readRoutine(oneIO)：
Lock(OneIO。LBA，OneIO。Length)//对当前读取命令的LBA和地址加锁。在lock函数内会自动调用taskSwitch()，直到获取锁之后才会回到这行函数；
PBA＝lookupTable(oneIO。LBA)//根据LBA地址，查找表，获得物理地址，简称为PBA，这个函数需要用户自己实现，不是OS封装好的例程
buffer＝memAlloc()//从NAND读取数据之前，申请一个内存地址，存放此数据
readNand((PBA)，(buffer))//读取数据
DMA(buffer，OneIO。hostAddr)//将读取到的数据发送给主机端
sendCpl(OneIO)//将这个消息完成
unLock(OneIO。LBA，OneIO。Length)//释放对资源的锁
memFree(buffer)
closeTask()//关闭此进程
对于写入服务例程，可以按照如下方式设计：
def writeRoutine(oneIO)：
Lock(OneIO。LBA，OneIO。Length)//对当前写入命令的LBA和地址加锁。在lock函数内会自动调用taskSwitch()，直到获取锁之后才会回到这行韩束
buffer＝memAlloc()//写入NAND数据之前，申请一个内存地址，存放此数据
DMA(OneIO。hostAddr，buffer)//将数据从主机侧存放到buffer里面
PBA＝AllocNANDAddr(oneIO。LBA)//根据firmware的内部数据结构和地址分配逻辑，选择一个空闲地址，用于存放这笔数据。这是firmware开发者自己需要实现的逻辑，在此不进行描述。
writeNand((PBA)，(buffer))//读取数据
sendCpl(OneIO)//将这个消息完成
unLock(OneIO。LBA，OneIO。Length)//释放对资源的锁
memFree(buffer)//释放前面申请的buffer
closeTask()//关闭此进程
以上为读写关键路径的一种实现方法的范例，用以说明firmware开发者在这种SSD_OS上，可以完全使用同步过程进行开发，而不需要考虑进程切换，自己定义状态机等工作，能够极大地减轻开发的复杂度。
由此可见，本申请在一些实施例中提出了一种SSD的专用操作***，在这种操作***的基础上，firmware开发者只需要考虑业务逻辑，不用关心进程切换和资源的底层信息，便于 开发者开发firmware，能够减轻开发者的开发复杂度，降低开发成本和费用，提高了开发效率。同时，也可以适配不同的硬件体系结构，使得一套firmare可以适配不同厂商的硬件。在一些实施例中，能够给硬件设计提供参考，使得硬件和软件更有效地配合，硬件如果能够提供一个高性能的进程调度器，则可以与SSD_OS有效地衔接，能够提供更高的SSD性能。
下面对本申请在一些实施例中提供的一种任务调度装置进行介绍，下文描述的一种任务调度装置与上文描述的一种任务调度方法可以相互参照。
参见图3，本申请在一些实施例中提供的一种任务调度装置的结构图，如图3所示，包括：
创建模块301，用于创建目标任务，并为目标任务创建对应的目标进程；
选择模块302，用于为目标任务选择空闲的目标CPU核心，并将目标进程部署于目标CPU核心中；
执行模块303，用于利用目标CPU核心调用目标进程中的进程函数，以执行目标任务；
调用模块304，用于在执行目标任务的过程中，调用目标任务的任务切换函数；其中，任务切换函数的参数包括在任务切换时的依赖对象和依赖对象对应的参数；
切换模块305，用于在所有等待切换的任务中选择切换任务，利用目标CPU核心调用切换任务对应的进程函数，以将目标CPU核心切换至切换任务执行。
本申请在一些实施例中，在操作***中为用户提供了一个任务切换函数，相比于现有技术中采用中断的方式进行任务切换，本申请在一些实施例中提高了任务切换效率，满足了SSD高并发的需求。
在上述实施例的基础上，在一些实施例中，创建模块301包括：
第一确定单元，用于确定目标任务的任务参数；其中，任务参数至少包括目标任务对应的函数和函数对应的参数；
创建单元，用于基于目标任务的任务参数为目标任务创建对应的目标进程；
分配单元，用于为目标进程分配资源；其中，资源包括任务标识、栈空间、寄存器地址。
在上述实施例的基础上，在一些实施例中，分配单元用于：为目标进程分配预设大小的栈空间。
在上述实施例的基础上，在一些实施例中，分配单元用于：将所有栈空间划分为多个不 同大小的子空间；将大于目标进程需要的栈空间的大小的最小的子空间作为目标子空间分配至目标进程。
在上述实施例的基础上，在一些实施例中，还包括：
检测模块，用于检测目标任务对应的依赖对象是否完成，若完成，则将目标任务作为等待切换的任务。
在上述实施例的基础上，在一些实施例中，切换模块305包括：
第二确定单元，用于根据所有等待切换的任务的属性确定所有等待切换的任务的第一优先级；
选择单元，用于选择第一优先级最高的等待切换的任务作为切换任务；
切换单元，用于利用目标CPU核心调用切换任务对应的进程函数，以将目标CPU核心切换至切换任务执行。
在上述实施例的基础上，在一些实施例中，属性按照第一优先级由高至低包括显示的任务切换、主机读取、主机写入、主机管理命令、后台读取、后台写入、后台管理命令、元数据管理、算法、统计信息中任一项或任几项的组合。
在上述实施例的基础上，在一些实施例中，选择单元用于：若存在多个第一优先级最高的等待切换的任务，则根据所有等待切换的任务在任务切换时的依赖对象确定所有等待切换的任务的第二优先级；在多个第一优先级最高的等待切换的任务中选择第二优先级最高的等待切换的任务作为切换任务。
在上述实施例的基础上，在一些实施例中，依赖对象按照第二优先级由高至低包括完成消息、锁资源释放、NAND读写命令、DMA流向主机端的命令、DMA流向设备端的命令、锁资源获取命令、定时器、算法模块。
在上述实施例的基础上，在一些实施例中，还包括：
提高模块，用于若目标任务的定时器结束时间超过预设值，则将目标任务的第二优先级提高预设级别。
在上述实施例的基础上，在一些实施例中，切换模块305用于：确定所有等待切换的任务完成对应的依赖对象的时间；选择时间最长的等待切换的任务作为切换任务；利用目标CPU核心调用切换任务对应的进程函数，以将目标CPU核心切换至切换任务执行。
在上述实施例的基础上，在一些实施例中，还包括：
通信模块，用于当目标任务需要与其他任务通信时，判断其他任务对应的进程是否部署于目标CPU核心中；若是，则采用共享内存变量的方式实现目标任务需要与其他任务的通 信；若否，则采用资源锁互斥的方式实现目标任务需要与其他任务的通信。
在上述实施例的基础上，在一些实施例中，还包括：
删除模块，用于当目标任务完成时，删除目标任务的上下文信息，并释放目标任务的栈空间。
在上述实施例的基础上，在一些实施例中，进程函数包括资源封装函数，资源封装函数包括选取输入/输出命令函数、数据传输函数、资源加锁函数、NAND操作函数、向主机发送完成消息函数中任一项或任几项的组合。
在上述实施例的基础上，在一些实施例中，进程函数包括***调用函数，***调用函数包括申请内存函数、释放内存函数、加密算法函数、压缩算法函数、RAID操作函数、内存搜索函数、内存排序函数、管理接口输入输出功能函数中任一项或任几项的组合。
在上述实施例的基础上，在一些实施例中，还包括：
初始化模块，用于初始化操作***，分配堆栈，初始化硬件接口；
第一控制模块，用于控制值守进程启动；其中，值守进程用于接收对固态硬盘的注入命令；
第二控制模块，用于控制管理进程启动；其中，管理进程用于接收对固态硬盘的管理命令；
接收模块，用于接收任务创建命令。
关于上述实施例中的装置，其中各个模块执行操作的方式已经在有关该方法的实施例中进行了详细描述，此处将不做详细阐述说明。
基于上述程序模块的硬件实现，且为了实现上述方法，本申请在一些实施例中还提供了一种电子设备，图4为本申请在一些实施例中提供的一种电子设备的结构图，如图4所示，电子设备包括：
通信接口1，能够与其它设备比如网络设备等进行信息交互；
处理器2，与通信接口1连接，以实现与其它设备进行信息交互，用于运行计算机程序时，执行上述一个或多个技术方案提供的任务调度方法。而计算机程序存储在存储器3上。
当然，实际应用时，电子设备中的各个组件通过总线***4耦合在一起。可理解，总线***4用于实现这些组件之间的连接通信。总线***4除包括数据总线之外，还包括电源总线、控制总线和状态信号总线。但是为了清楚说明起见，在图4中将各种总线都标为总线***4。
本申请在一些实施例中的存储器3用于存储各种类型的数据以支持电子设备的操作。这些数据的示例包括：用于在电子设备上操作的任何计算机程序。
可以理解，存储器3可以是易失性存储器或非易失性存储器，也可包括易失性和非易失性存储器两者。其中，非易失性存储器可以是只读存储器(ROM，Read Only Memory)、可编程只读存储器(PROM，Programmable Read-Only Memory)、可擦除可编程只读存储器(EPROM，Erasable Programmable Read-Only Memory)、电可擦除可编程只读存储器(EEPROM，Electrically Erasable Programmable Read-Only Memory)、磁性随机存取存储器(FRAM，ferromagnetic random access memory)、快闪存储器(Flash Memory)、磁表面存储器、光盘、或只读光盘(CD-ROM，Compact Disc Read-Only Memory)；磁表面存储器可以是磁盘存储器或磁带存储器。易失性存储器可以是随机存取存储器(RAM，Random Access Memory)，其用作外部高速缓存。通过示例性但不是限制性说明，许多形式的RAM可用，例如静态随机存取存储器(SRAM，Static Random Access Memory)、同步静态随机存取存储器(SSRAM，Synchronous Static Random Access Memory)、动态随机存取存储器(DRAM，Dynamic Random Access Memory)、同步动态随机存取存储器(SDRAM，Synchronous Dynamic Random Access Memory)、双倍数据速率同步动态随机存取存储器(DDRSDRAM，Double Data Rate Synchronous Dynamic Random Access Memory)、增强型同步动态随机存取存储器(ESDRAM，Enhanced Synchronous Dynamic Random Access Memory)、同步连接动态随机存取存储器(SLDRAM，SyncLink Dynamic Random Access Memory)、直接内存总线随机存取存储器(DRRAM，Direct Rambus Random Access Memory)。本申请在一些实施例中描述的存储器3旨在包括但不限于这些和任意其它适合类型的存储器。
上述本申请在一些实施例中所揭示的方法可以应用于处理器2中，或者由处理器2实现。处理器2可能是一种集成电路芯片，具有信号的处理能力。在实现过程中，上述方法的各步骤可以通过处理器2中的硬件的集成逻辑电路或者软件形式的指令完成。上述的处理器2可以是通用处理器、DSP，或者其他可编程逻辑器件、分立门或者晶体管逻辑器件、分立硬件组件等。处理器2可以实现或者执行本申请在一些实施例中的公开的各方法、步骤及逻辑框图。通用处理器可以是微处理器或者任何常规的处理器等。结合本申请在一些实施例中所公开的方法的步骤，可以直接体现为硬件译码处理器执行完成，或者用译码处理器中的硬件及软件模块组合执行完成。软件模块可以位于存储介质中，该存储介质位于存储器3，处理器2读取存储器3中的程序，结合其硬件完成前述方法的步骤。
处理器2执行程序时实现本申请在一些实施例中的各个方法中的相应流程，为了简洁，在此不再赘述。
在本申请的一些实施例中，还提供了一种非易失性计算机可读存储介质，如图5所示，该非易失性计算机可读存储介质50上存储有计算机程序510，计算机程序510被处理器执行时实现如上的任务调度方法的步骤。
本领域普通技术人员可以理解：实现上述方法实施例的全部或部分步骤可以通过程序指令相关的硬件来完成，前述的程序可以存储于一计算机可读取存储介质中，该程序在执行时，执行包括上述方法实施例的步骤；而前述的存储介质包括：移动存储设备、ROM、RAM、磁碟或者光盘等各种可以存储程序代码的介质。
或者，本申请上述集成的单元如果以软件功能模块的形式实现并作为独立的产品销售或使用时，也可以存储在一个计算机可读取存储介质中。基于这样的理解，本申请实施例的技术方案本质上或者说对现有技术做出贡献的部分可以以软件产品的形式体现出来，该计算机软件产品存储在一个存储介质中，包括若干指令用以使得一台电子设备(可以是个人计算机、服务器、网络设备等)执行本申请各个实施例方法的全部或部分。而前述的存储介质包括：移动存储设备、ROM、RAM、磁碟或者光盘等各种可以存储程序代码的介质。
以上，仅为本申请在一些实施中的实施方式，但本申请的保护范围并不局限于此，任何熟悉本技术领域的技术人员在本申请揭露的技术范围内，可轻易想到变化或替换，都应涵盖在本申请的保护范围之内。因此，本申请的保护范围应以权利要求的保护范围为准。

Claims (20)

  1. 一种任务调度方法，其特征在于，应用于固态硬盘的操作***，所述方法包括：
    创建目标任务，并为所述目标任务创建对应的目标进程；
    为所述目标任务选择空闲的目标中央处理器CPU核心，并将所述目标进程部署于所述目标CPU核心中；
    利用所述目标CPU核心调用所述目标进程中的进程函数，以执行所述目标任务；
    在执行所述目标任务的过程中，调用所述目标任务的任务切换函数；其中，所述任务切换函数的参数包括在任务切换时的依赖对象和所述依赖对象对应的参数；
    在所有等待切换的任务中选择切换任务，利用所述目标CPU核心调用所述切换任务对应的进程函数，以将所述目标CPU核心切换至所述切换任务执行。
  2. 根据权利要求1所述任务调度方法，其特征在于，为所述目标任务创建对应的目标进程，包括：
    确定所述目标任务的任务参数；其中，所述任务参数至少包括所述目标任务对应的函数和所述函数对应的参数；
    基于所述目标任务的任务参数为所述目标任务创建对应的目标进程，并为所述目标进程分配资源；其中，所述资源包括任务标识、栈空间、寄存器地址。
  3. 根据权利要求2所述任务调度方法，其特征在于，为所述目标进程分配资源，包括：
    为所述目标进程分配预设大小的栈空间。
  4. 根据权利要求2所述任务调度方法，其特征在于，为所述目标进程分配资源，包括：
    将所有栈空间划分为多个不同大小的子空间；
    将大于所述目标进程需要的栈空间的大小的最小的子空间作为目标子空间分配至所述目标进程。
  5. 根据权利要求1所述任务调度方法，其特征在于，所述利用所述目标CPU核心调用所述切换任务对应的进程函数，以将所述目标CPU核心切换至所述切换任务执行之后，还包括：
    检测所述目标任务对应的依赖对象是否完成，若完成，则将所述目标任务作为等待切换的任务。
  6. 根据权利要求1所述任务调度方法，其特征在于，所述在所有等待切换的任务中选择切换任务，包括：
    根据所有所述等待切换的任务的属性确定所有所述等待切换的任务的第一优先级；
    选择所述第一优先级最高的等待切换的任务作为切换任务。
  7. 根据权利要求6所述任务调度方法，其特征在于，所述属性按照所述第一优先级由高至低包括显示的任务切换、主机读取、主机写入、主机管理命令、后台读取、后台写入、后台管理命令、元数据管理、算法、统计信息中任一项或任几项的组合。
  8. 根据权利要求6所述任务调度方法，其特征在于，所述选择所述第一优先级最高的等待切换的任务作为切换任务，包括：
    若存在多个所述第一优先级最高的等待切换的任务，则根据所有所述等待切换的任务在任务切换时的依赖对象确定所有所述等待切换的任务的第二优先级；
    在多个所述第一优先级最高的等待切换的任务中选择所述第二优先级最高的等待切换的任务作为切换任务。
  9. 根据权利要求8所述任务调度方法，其特征在于，所述依赖对象按照所述第二优先级由高至低包括完成消息、锁资源释放、计算机闪存设备NAND读写命令、直接内存访问DMA流向主机端的命令、DMA流向设备端的命令、锁资源获取命令、定时器、算法模块。
  10. 根据权利要求8所述任务调度方法，其特征在于，还包括：
    若目标任务的定时器结束时间超过预设值，则将所述目标任务的第二优先级提高预设级别。
  11. 根据权利要求1所述任务调度方法，其特征在于，所述在所有等待切换的任务中选择切换任务，包括：
    确定所有所述等待切换的任务完成对应的依赖对象的时间；
    选择所述时间最长的等待切换的任务作为切换任务。
  12. 根据权利要求1所述任务调度方法，其特征在于，还包括：
    当所述目标任务需要与其他任务通信时，判断所述其他任务对应的进程是否部署于所述目标CPU核心中；
    若是，则采用共享内存变量的方式实现所述目标任务需要与所述其他任务的通信。
  13. 根据权利要求12所述任务调度方法，其特征在于，所述判断所述其他任务对应的进程是否部署于所述目标CPU核心中之后，还包括：
    若所述其他任务对应的进程部署于其他CPU核心中，则采用资源锁互斥的方式实现所述目标任务需要与所述其他任务的通信。
  14. 根据权利要求1所述任务调度方法，其特征在于，还包括：
    当所述目标任务完成时，删除所述目标任务的上下文信息，并释放所述目标任务的栈空间。
  15. 根据权利要求1所述任务调度方法，其特征在于，所述进程函数包括资源封装函数，所述资源封装函数包括选取输入/输出命令函数、数据传输函数、资源加锁函数、NAND操作函数、向主机发送完成消息函数中任一项或任几项的组合。
  16. 根据权利要求1所述任务调度方法，其特征在于，所述进程函数包括***调用函数，所述***调用函数包括申请内存函数、释放内存函数、加密算法函数、压缩算法函数、RAID操作函数、内存搜索函数、内存排序函数、管理接口输入输出功能函数中任一项或任几项的组合。
  17. 根据权利要求1所述任务调度方法，其特征在于，还包括：
    初始化操作***，分配堆栈，初始化硬件接口；
    控制值守进程启动；其中，所述值守进程用于接收对所述固态硬盘的注入命令；
    控制管理进程启动；其中，所述管理进程用于接收对所述固态硬盘的管理命令；
    接收任务创建命令。
  18. 一种任务调度装置，其特征在于，应用于固态硬盘的操作***，所述装置包括：
    创建模块，用于创建目标任务，并为所述目标任务创建对应的目标进程；
    选择模块，用于为所述目标任务选择空闲的目标CPU核心，并将所述目标进程部署于所述目标CPU核心中；
    执行模块，用于利用所述目标CPU核心调用所述目标进程中的进程函数，以执行所述目标任务；
    调用模块，用于在执行所述目标任务的过程中，调用所述目标任务的任务切换函数；其中，所述任务切换函数的参数包括在任务切换时的依赖对象和所述依赖对象对应的参数；
    切换模块，用于在所有等待切换的任务中选择切换任务，利用所述目标CPU核心调用所述切换任务对应的进程函数，以将所述目标CPU核心切换至所述切换任务执行。
  19. 一种电子设备，其特征在于，包括：
    存储器，用于存储计算机程序；
    处理器，用于执行所述计算机程序时实现如权利要求1至17任一项所述任务调度方法的步骤。
  20. 一种非易失性计算机可读存储介质，其特征在于，所述非易失性计算机可读存 储介质上存储有计算机程序，所述计算机程序被处理器执行时实现如权利要求1至17任一项所述任务调度方法的步骤。
PCT/CN2023/101218 2022-12-06 2023-06-20 一种任务调度方法、装置及电子设备和存储介质 WO2024119764A1 (zh)

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