WO2024115240A1 - Circuit de commande d'un processus de décharge d'un condensateur de grille, procédé de fonctionnement d'un réseau de courant continu haute tension - Google Patents

Circuit de commande d'un processus de décharge d'un condensateur de grille, procédé de fonctionnement d'un réseau de courant continu haute tension Download PDF

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Publication number
WO2024115240A1
WO2024115240A1 PCT/EP2023/082770 EP2023082770W WO2024115240A1 WO 2024115240 A1 WO2024115240 A1 WO 2024115240A1 EP 2023082770 W EP2023082770 W EP 2023082770W WO 2024115240 A1 WO2024115240 A1 WO 2024115240A1
Authority
WO
WIPO (PCT)
Prior art keywords
semiconductor switch
gate
circuit
terminal
control circuit
Prior art date
Application number
PCT/EP2023/082770
Other languages
German (de)
English (en)
Inventor
Stephan Bolz
Reinhard FRUTH
Original Assignee
Vitesco Technologies GmbH
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Vitesco Technologies GmbH filed Critical Vitesco Technologies GmbH
Publication of WO2024115240A1 publication Critical patent/WO2024115240A1/fr

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Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
    • H03K17/16—Modifications for eliminating interference voltages or currents
    • H03K17/161—Modifications for eliminating interference voltages or currents in field-effect transistor switches
    • H03K17/162—Modifications for eliminating interference voltages or currents in field-effect transistor switches without feedback from the output circuit to the control circuit
    • H03K17/163—Soft switching
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K2217/00—Indexing scheme related to electronic switching or gating, i.e. not by contact-making or -breaking covered by H03K17/00
    • H03K2217/0072—Low side switches, i.e. the lower potential [DC] or neutral wire [AC] being directly connected to the switch and not via the load

Definitions

  • Control circuit for controlling a discharge process of a gate capacitance, method for operating a high-voltage direct current network
  • the present invention relates to a control circuit for controlling a discharge process of a gate capacitance of a semiconductor switch, for example a semiconductor switch used as an electronic fuse for interrupting a circuit, in particular in a high-voltage direct current network, specifically an on-board network of an electrically driven vehicle.
  • the invention also relates to a circuit device for interrupting a circuit, in particular a high-voltage direct current network, specifically an on-board network of an electrically driven vehicle, with a control circuit.
  • the invention also relates to a high-voltage direct current network, specifically an on-board network of an electrically driven vehicle, with a circuit device.
  • the invention also relates to a method for operating a high-voltage direct current network.
  • the invention relates to a computer program product for carrying out the method.
  • Fast-switching semiconductor switches which are particularly designed as MOSFETs or have one or more MOSFETs, are used in various fields. For example, they can be used as electronic fuses for high-voltage circuits and can quickly interrupt the circuit in the event of a defect.
  • the vehicle battery supplies not only the drive motor but also various other power consumers, such as an air conditioning compressor and/or the vehicle's power steering, via the high-voltage direct current network.
  • Live cables can be up to several meters long. There is a risk that a short circuit in the area of one of the consumers could Operation of the entire vehicle is hindered. It is therefore known to use a semiconductor switch, for example a MOSFET, as an electronic fuse in order to be able to quickly interrupt the circuit in the event of a short circuit or another problem. If the supply in a high-voltage direct current network, i.e. in a network with operating voltages of, for example, several 100 V, is to be quickly disconnected, the reaction time of the electronic fuse is largely determined by the switch-off time of the MOSFET.
  • a semiconductor switch for example a MOSFET
  • a control circuit for controlling a discharge process of a gate capacitance of a first semiconductor switch T6, comprising at least one circuit arrangement for generating a gate control signal in order to switch the first semiconductor switch T6 into blocking mode, and a second semiconductor switch T4, the gate terminal of which can be controlled with the gate control signal (in particular indirectly, i.e. with a control signal derived from this gate control signal) and the source terminal of which is electrically connected to a reference potential of the control circuit and the drain terminal of which is connected to a second terminal of a capacitor C3, wherein here and in the following the term "connected” is understood to mean "electrically connected”.
  • the control circuit further comprises a third semiconductor switch T5, the drain terminal of which is connected to a gate terminal of the first semiconductor switch and whose source terminal is connected to a first terminal of the capacitor C3.
  • the common reference potential of the control circuit can, for example, be the ground potential of the control circuit.
  • the circuit therefore comprises a second semiconductor switch T4 which can be controlled by the gate control signal and switches to an on state when controlled by the gate control signal.
  • the circuit also comprises a capacitor C3 which generates a negative discharge pulse for a third (downstream) semiconductor switch T5 when the second semiconductor switch T4 switches on, so that the third semiconductor switch T5 also switches on and thus controls the gate of the first semiconductor switch T6 and initiates the discharge process of the gate capacitance of this first semiconductor switch T6.
  • the invention makes it possible to significantly reduce the delay time when switching off the first semiconductor switch T6, for example from approximately 180 ns to approximately 75 ns. This is achieved by using the electrical circuit to decouple or treat different processes when switching off the semiconductor switch separately, in particular the discharge of the gate capacitances to reduce the delay time and the charging of the drain-gate capacitance to control the drain-source voltage edge. Until now, a rapid discharge of the gate capacitances was firmly linked to the rate of rise of the drain-source voltage of the semiconductor switch, which was not allowed to be too high and thus already specified a certain switch-off delay.
  • control circuit makes it possible to optimize the delay time and the steepness of the voltage edge largely independently of each other.
  • control circuit further comprises a gate resistor Rg connected upstream of the gate terminal of the first semiconductor switch (and in particular parallel to the third semiconductor switch).
  • the gate resistor Rg is electrically connected between the drain terminal of the second semiconductor switch T4 or the second terminal of the capacitor C3 on the one hand and the gate terminal of the first semiconductor switch T6 or the drain terminal of the third semiconductor switch T5 on the other hand.
  • the gate capacitances of the first semiconductor switch can be further discharged via the gate resistor Rg when the third semiconductor switch has switched off and the gate of the first semiconductor switch has been separated from the first terminal of the capacitor. This occurs when the gate capacitances of the first semiconductor switch and the capacitor have been discharged to such an extent that the voltage at the first terminal of the capacitor has risen to such an extent that the switching threshold of the third semiconductor switch is reached. This then switches off and separates the gate of the first semiconductor switch from the first terminal of the capacitor, so that no more current flows through this path. Instead, from this point on, the gate resistor Rg takes over the discharge of the gate capacitances.
  • the gate resistance Rg is chosen to be relatively high-resistance, for example the gate resistance of Rg is at least 20 ohms, for example about 30 ohms, the rate of rise of the drain-source voltage of the first semiconductor switch can be controlled such that it remains below values at which the first semiconductor switch could be destroyed.
  • the gate resistor Rg is designed as a variable resistor that can be controlled via a control/regulation circuit.
  • a control/regulation system can be provided that controls or regulates the gate resistor Rg in such a way that the discharge of the gate capacitance takes place as quickly as possible, while at the same time the rate of rise of the Drain-source voltage of the first semiconductor switch remains in a range that excludes destruction of the semiconductor switch.
  • the gate resistor Rg can, for example, comprise a linearly operable semiconductor switch which functions as a voltage-controlled resistor, albeit with a non-linear characteristic.
  • control circuit further comprises a further resistor which is electrically connected between the first terminal of the capacitor or the source terminal of the third semiconductor switch on the one hand and to the reference potential of the control circuit on the other hand.
  • This further resistor serves as a charging/discharging resistor of the capacitor. The capacitor is initially charged via this resistor when the first semiconductor switch is switched off.
  • the control circuit further comprises a current mirror for providing an amplified signal from the gate control signal, which is electrically connected between the circuit arrangement for generating a gate control signal and the gate terminal of the second semiconductor switch or is electrically connected on the signal input side to the signal output of the circuit arrangement and on the signal output side to the gate terminal of the second semiconductor switch.
  • the current mirror can cause the gate control signal, which jumps as a logic signal from 0 V to 5 V, for example, during the switch-off process and initiates the discharge of the gate capacitance, to be converted into a current flow from a 15 V supply voltage and thus amplified.
  • the first, the second and/or the third semiconductor switch can in particular be designed as MOSFETs (“metal oxide semiconductor field effect transistors”).
  • a circuit device for interrupting an electric circuit in particular a high-voltage direct voltage network with two or more network branches, especially an on-board network of an electrically powered vehicle with two or more on-board network branches.
  • the circuit device has at least one first semiconductor switch T6 for interrupting the circuit, in particular between two network branches of the high-voltage direct current network or between two on-board network branches of the vehicle on-board network, as well as the previously described control circuit for controlling the discharge process of the gate capacitance of the first semiconductor switch.
  • the circuit device can in particular be part of a high-voltage direct current network, in particular an on-board network of an electrically powered motor vehicle.
  • a high-voltage direct current network is provided, in particular an on-board network of an electrically powered motor vehicle.
  • the network has at least two network branches (or on-board network branches) and at least one circuit that electrically connects the two network branches to one another.
  • the network also has at least one previously mentioned circuit device, the first semiconductor switch T6 or the load current path of which is electrically connected in the circuit.
  • the circuit device is designed to establish a current flow through the circuit and thus between the two network branches by controlled switching on of the first semiconductor switch and to interrupt the current flow through the circuit by controlled switching off of the first semiconductor switch.
  • a method for operating a high-voltage direct current network described above, in particular an on-board network of an electrically powered motor vehicle, which has the aforementioned circuit device.
  • the circuit of the high-voltage direct current network is interrupted in the event of critical operating conditions, for example a short circuit, in the high-voltage direct current network by means of the at least one first semiconductor switch of the circuit device or by a controlled switching off of the first semiconductor switch.
  • a gate control signal for controlling the second semiconductor switch T4 By generating a gate control signal for controlling the second semiconductor switch T4, a discharge process of the gate capacitance of the first semiconductor switch T6 is initiated and controlled.
  • the third semiconductor switch T5 is switched off when a threshold value is reached by the voltage (or the voltage potential in relation to the reference potential of the control circuit or to the ground potential) at the first terminal of the capacitor C3 and the gate capacitance of the first semiconductor switch is subsequently further discharged in a controlled manner via the resistor Rg.
  • a computer program product comprising instructions which, when the program is executed by a computer, cause the computer to carry out the method described above.
  • the computer can in particular be a control unit of an electrically powered vehicle.
  • a computer program product which has or creates instructions which, when the program is executed by a computer or a comparable device, cause the computer or a comparable device to carry out the method described above using the
  • Figure 1 shows schematically elements of an electrical system of an electrically powered vehicle
  • Figure 2 shows a control circuit for controlling a discharge process of a gate capacitance of a semiconductor switch according to an embodiment of the invention.
  • Figure 1 shows schematically elements of a high-voltage direct current network or a high-voltage on-board network 1 of an electrically powered vehicle, for example a hybrid vehicle or a purely electrically powered vehicle.
  • the on-board network 1 comprises at least one electric drive motor 2, which is fed from a vehicle battery 4. Several electric drive motors can also be provided.
  • further electrical consumers 3 can be provided, of which only one is shown schematically in Figure 1, for example an air conditioning compressor of the vehicle or a power steering system, which are shown in Figure 1 as an element of the on-board network 1 because they are also fed from the vehicle battery 4.
  • the on-board network 1 further comprises a safety system 5 with main switches 6 for disconnecting the battery 4 and a control circuit 7 with at least one first semiconductor switch for disconnecting the other electrical consumers.
  • the on-board network 1 further comprises a voltage converter 8 designed as an inverter, which provides an alternating current or three-phase current for the drive motor 2 from the direct current supplied by the vehicle battery 4.
  • the on-board network 1 can comprise further elements which are not shown in Figure 1 for the sake of clarity.
  • the safety system 5 of the on-board network 1 comprises lines 9 for supplying the drive motor 2 as well as lines 10 for supplying other electrical consumers 3.
  • the lines 9 and 10 are part of the high-voltage direct current network of the on-board network 1 and connect various on-board network branches to some of the above-mentioned different on-board network components such as the drive motor 2, the vehicle battery 4, and the other consumers 3.
  • the lines 10 for supplying the electrical consumers 3 can have a
  • a short circuit in the lines 10 is therefore significantly greater than the probability of a short circuit in the lines 9, which are, for example, only 0.5-1 m long and are also specially protected.
  • a fuse element in the form of a circuit arrangement with a control circuit 7 and a first semiconductor switch T6 is provided in the circuit formed by the lines 10, which or whose load current path is electrically connected in one of the lines 10.
  • the first semiconductor switch T6 is switched on under the control of the circuit arrangement or its control circuit 7 and thus enables a free flow of current through the lines 10 and thus between the on-board network branches of the on-board network 1, which electrically connect the lines 10 to one another. In the event of a defect or short circuit in the lines
  • the first semiconductor switch T6 is switched off under the control of the circuit arrangement or its control circuit 7 and thus the flow of current through the lines 10 and thus between the on-board network branches of the on-board network 1 is interrupted.
  • Figure 2 shows the control circuit 7 for interrupting a circuit according to an embodiment of the invention, which has at least one first semiconductor switch
  • Figure 2 shows the first semiconductor switch 11, which in the embodiment shown is formed by one or two MOSFETs and has a source terminal 21, a drain terminal 22 and a gate terminal 20. It allows a rapid interruption of the lines 10 if critical voltages or currents occur.
  • Such a control circuit 7 can be provided for each individual consumer 3 or alternatively for several or all consumers 3 together.
  • Semiconductor switch 11 switches quickly.
  • the chain of effects of the The electronic fuse formed by the semiconductor switch 11 consists of detecting the current value, which may require 10 ns, for example, detecting the overcurrent condition, which may require a further 20 ns, storing the fault conditions in hardware, which may require 10 ns, switching the control signal for the semiconductor switch 11, which may require 20 ns, for example, and switching off the semiconductor switch 11, which may require 180 ns, for example.
  • a significant part of the total reaction time of the electronic fuse is therefore based on the switch-off time of the semiconductor switch 11.
  • the control circuit 7 By means of the control circuit 7, a significant reduction, for example halving, of this switch-off time is possible.
  • the delay time when switching off the semiconductor switch 11 is essentially determined by the discharge process of the gate capacitances, which can be accelerated by means of the control circuit 7.
  • the control circuit 7 has several parts, the function of which is explained in more detail below. These include in particular a circuit arrangement 12 for generating a gate control signal when the first semiconductor switch 11 switches to a blocking mode.
  • control circuit 7 comprises a current mirror 23 with capacitive current increase, which comprises the semiconductor switches T2, T3 as well as the capacitors C1, C2 and optionally further elements such as the resistors R1, R2, R3, R4.
  • control circuit 7 has a second semiconductor switch T4, which is also designed as a MOSFET and has a gate terminal 13, a source terminal 14 and a drain terminal 16.
  • control circuit 7 comprises a capacitor C3 with a first terminal 15 and a second terminal 17 for generating a negative discharge pulse.
  • the gate terminal 13 of the second semiconductor switch T4 is connected to the gate control signal amplified by means of the current mirror 23.
  • the source connection 14 of the second semiconductor switch T4 is electrically connected to a common reference potential of the control circuit 7.
  • the drain connection 16 of the second semiconductor switch T4 is electrically connected to the second connection 17 of the capacitor C3 via connection nodes V2 and V4.
  • the common reference potential of the control circuit 7 can be the ground potential of the control circuit 7 or the circuit device.
  • the control circuit 7 further comprises a third semiconductor switch T5 with a source terminal 19, a drain terminal 18 and a gate terminal 24 for decoupling the negative charging pulse.
  • the drain terminal 18 of the third semiconductor switch T5 is electrically connected to the gate terminal 20 of the first semiconductor switch 11 via a connection node V7 and the source terminal 19 of the third semiconductor switch T5 is electrically connected to the first terminal 15 of the capacitor C3 via a further connection node V5.
  • the gate terminal 24 of the third semiconductor switch T5 is electrically connected to a common reference potential of the control circuit 7, to which the source terminal 21 of the first semiconductor switch 11 is also electrically connected.
  • the common reference potential of the control circuit 7 can in particular be the ground potential of the control circuit 7.
  • control circuit 7 has a gate resistor Rg connected upstream of the gate terminal 20 of the first semiconductor switch 11 in parallel with the third semiconductor switch T5 or its load current path for controlling the voltage switch-off edge, which is thus electrically connected between the two connection nodes V4 and V7.
  • the drain terminal 18 of the third semiconductor switch T5 is electrically connected via the connection node V7 to the gate resistor Rg and further via the gate resistor Rg to the second terminal 17 of the capacitor C3 and the connection node V2.
  • drain terminal 16 of the second semiconductor switch T4 is connected to the drain terminal 16 of the second semiconductor switch T4
  • Connection node V2 which is connected via resistor R5 to a Current/voltage source 25 is electrically connected.
  • the connection nodes V3, V6, V8, V10 and V11 are at the common reference potential or the reference potential of the control circuit 7.
  • the connection node V4 is connected to the connection node V2 and to the gate resistor Rg and the second terminal 17 of the capacitor C3, the connection node V5 to the first terminal 15 of the capacitor C3, to the source terminal 19 of the third semiconductor switch T5 and to the resistor R6.
  • the resistor R6 is electrically connected between the connection nodes V6 and V5.
  • connection node V7 is electrically connected to the gate resistor Rg and to the drain connection 18 of the third semiconductor switch T5 as well as to the connection node V9.
  • the connection node V8 is electrically connected to the gate connection 24 of the third semiconductor switch T5, which is thus connected to the common reference potential or the reference potential of the control circuit 7.
  • the connection node V10 is connected to the source connection 21 of the first semiconductor switch 11, which is thus also connected to the common reference potential or the reference potential of the control circuit 7.
  • the drain connection 22 of the first semiconductor switch 11 is connected to the connection node V12, which in turn is connected to the connection node V13.
  • a capacitor C4 is electrically connected between the connection nodes V11 and V13 and thus parallel to the first semiconductor switch 11.
  • the connection nodes V11 and V13 correspond to voltage taps of the vehicle battery 4.
  • the circuit arrangement 12 provides a logic signal that jumps from 0 V to 5 V and thus initiates the switch-off process of the semiconductor switch 11.
  • the gate control signal allows a current of approximately 10 mA to flow through the semiconductor switch T2 of the current mirror 23, with an initial increase due to the charging process of the capacitor C1.
  • the current mirror T2, T3 converts this into a current flow from the 15 V current/voltage source 25.
  • the resistors R1 and R3 serve to compensate for the tolerances of the two semiconductor switches T2, T3.
  • the current from the semiconductor switch T3 is briefly increased further by the capacitor C2 in order to quickly charge the gate capacitance of the semiconductor switch T4.
  • the current mirror 23 thus provides an amplified gate control signal at the connection node V1 and the gate terminal 13 of the second semiconductor switch T4 connected to it.
  • T3 The current flow from T3 turns on T4 and its drain voltage drops to approximately 0 V.
  • the potential of the second terminal 17 of the capacitor C3 connected to it now also drops to 0 V.
  • the potential of the first terminal 15 of C3 drops to approximately -15 V.
  • the potential of the third semiconductor switch T5 connected to it also drops to approximately -15 V.
  • the gate-source voltage of T5 is now approximately 15 V, whereupon T5 turns on.
  • the gate terminal 20 of the first semiconductor switch 11 is connected to the first terminal 15 of C3 and the gate voltage drops from 15 V to approximately -15 V.
  • the gate capacitances of the first semiconductor switch 11 are now discharged, while C3 is also discharged at the same time. As long as T4 is switched off, C3 is recharged via R5 and R6.
  • This process is a first sub-step of the switch-off process of the first semiconductor switch 11 while the channel of the MOSFET is still saturated.
  • the second sub-step namely the switch-off of the channel, follows as follows:
  • the resistor Rg takes over the control of the gate signal, ie the discharge of the gate capacitance of the first semiconductor switch 11, and thus controls the second sub-step of the discharge process.
  • the first Semiconductor switch 11 operates in linear mode and the drain-source voltage is in the range of the Miller plateau.
  • the first semiconductor switch 11 operates as an integrator.
  • Rg is selected to be high-impedance and is 30 ohms in the embodiment shown. Rg can thus control the rate of rise of the drain-source voltage of the first semiconductor switch 11 and limit it to a value at which the first semiconductor switch 11 is not damaged.
  • the capacitor C4 connected in parallel to the first semiconductor switch 11 supports and linearizes the voltage curve.

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Abstract

L'invention concerne un circuit de commande (7) pour commander un processus de décharge d'un condensateur de grille d'un premier commutateur à semi-conducteur (11 ou T6), comprenant au moins : - un agencement de circuit (12) pour générer un signal de commande de grille afin de faire passer le premier commutateur à semi-conducteur (11 ou T6) en mode coupure ; - un deuxième commutateur à semi-conducteur (T4) dont l'électrode de grille (13) peut être commandée par le signal de commande de grille, dont l'électrode de source (14) est connectée à un potentiel de référence du circuit de commande (7) et dont l'électrode de drain (16) est connectée à une seconde borne (17) d'un condensateur (C3) ; - un troisième commutateur à semi-conducteur (T5) dont l'électrode de drain (18) est connectée à une électrode de grille (20) du premier commutateur à semi-conducteur (11 ou T6) et dont l'électrode de source (19) est connectée à une première borne (15) du condensateur (C3). L'invention concerne également : un dispositif de circuit pour interrompre un circuit électrique, notamment un réseau à courant continu haute tension, comprenant ledit circuit de commande ; un réseau à courant continu haute tension comprenant ledit dispositif de circuit ; un procédé de fonctionnement dudit réseau à courant continu haute tension ; et un produit programme d'ordinateur pour l'exécution de ce procédé.
PCT/EP2023/082770 2022-12-01 2023-11-23 Circuit de commande d'un processus de décharge d'un condensateur de grille, procédé de fonctionnement d'un réseau de courant continu haute tension WO2024115240A1 (fr)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
DE102022212925.3 2022-12-01
DE102022212925.3A DE102022212925A1 (de) 2022-12-01 2022-12-01 Steuerschaltung zur Steuerung eines Entladevorgangs einer Gate-Kapazität, Verfahren zum Betreiben eines Hochvolt-Gleichspannungsnetzes

Publications (1)

Publication Number Publication Date
WO2024115240A1 true WO2024115240A1 (fr) 2024-06-06

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PCT/EP2023/082770 WO2024115240A1 (fr) 2022-12-01 2023-11-23 Circuit de commande d'un processus de décharge d'un condensateur de grille, procédé de fonctionnement d'un réseau de courant continu haute tension

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WO (1) WO2024115240A1 (fr)

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0542460A1 (fr) * 1991-11-07 1993-05-19 Fuji Electric Co. Ltd. Circuit de commande d'inversion de polarisation pour un élément de commutation à commande en tension
JP2003158868A (ja) * 2001-11-16 2003-05-30 Nissan Motor Co Ltd パワー半導体駆動回路

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE102004013599A1 (de) 2004-03-19 2005-10-06 Robert Bosch Gmbh Ansteuerschaltung zum Ansteuern einer leistungselektronischen Schaltung sowie Verfahren hierzu

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0542460A1 (fr) * 1991-11-07 1993-05-19 Fuji Electric Co. Ltd. Circuit de commande d'inversion de polarisation pour un élément de commutation à commande en tension
JP2003158868A (ja) * 2001-11-16 2003-05-30 Nissan Motor Co Ltd パワー半導体駆動回路

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