WO2024098726A1 - Trimming circuit, and chip and electronic device - Google Patents

Trimming circuit, and chip and electronic device Download PDF

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Publication number
WO2024098726A1
WO2024098726A1 PCT/CN2023/096795 CN2023096795W WO2024098726A1 WO 2024098726 A1 WO2024098726 A1 WO 2024098726A1 CN 2023096795 W CN2023096795 W CN 2023096795W WO 2024098726 A1 WO2024098726 A1 WO 2024098726A1
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WIPO (PCT)
Prior art keywords
circuit
coupled
resistor
adjustment circuit
switch
Prior art date
Application number
PCT/CN2023/096795
Other languages
French (fr)
Chinese (zh)
Inventor
钟樾
吕小康
Original Assignee
华为技术有限公司
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Publication of WO2024098726A1 publication Critical patent/WO2024098726A1/en

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Classifications

    • G—PHYSICS
    • G05—CONTROLLING; REGULATING
    • G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
    • G05F1/00—Automatic systems in which deviations of an electric quantity from one or more predetermined values are detected at the output of the system and fed back to a device within the system to restore the detected quantity to its predetermined value or values, i.e. retroactive systems
    • G05F1/10—Regulating voltage or current
    • G05F1/46—Regulating voltage or current wherein the variable actually regulated by the final control device is dc
    • G05F1/56—Regulating voltage or current wherein the variable actually regulated by the final control device is dc using semiconductor devices in series with the load as final control devices

Definitions

  • the present application relates to the technical field of integrated circuit testing, and in particular to a trimming circuit, a chip and an electronic device.
  • the accuracy of the reference voltage directly affects the accuracy of integrated circuit data acquisition. Therefore, it is necessary to design a trimming circuit to trim the reference voltage so that the reference voltage is closer to the preset reference voltage. Generally, the higher the trimming accuracy, the larger the chip area occupied by the trimming circuit, which increases the chip manufacturing cost.
  • the embodiment of the present application provides a trimming circuit, a chip and an electronic device.
  • the trimming circuit occupies a small area, which reduces the cost of chip manufacturing.
  • a trimming circuit comprising: An operational amplifier, a first adjustment circuit, a resistor network, and a second adjustment circuit.
  • the in-phase input terminal of the operational amplifier is coupled to the voltage terminal, and the output terminal is coupled to the first adjustment circuit.
  • the operational amplifier transmits the voltage level of the voltage terminal to the first adjustment circuit by means of negative feedback.
  • the output terminal of the first adjustment circuit is also coupled to the first terminal of the resistor network.
  • the first adjustment circuit includes a plurality of basic units connected in series.
  • the basic unit includes M first resistors, N second resistors, M-1 first switches and N second switches.
  • M is an integer greater than 1.
  • N parallel resistor branches are coupled between the input terminal and the output terminal of the basic unit.
  • Each resistor branch in the N resistor branches includes a second switch and a second resistor coupled in series.
  • the second terminal of the resistor network is also coupled to the input terminal of the second adjustment circuit.
  • the resistor network includes a plurality of reference voltage output terminals, and the plurality of reference voltage output terminals are used to output reference voltages of different values.
  • the output terminal of the second adjustment circuit is also coupled to the reference ground voltage terminal. The first adjustment circuit and the second adjustment circuit are used to adjust the total resistance value of the resistor network.
  • This circuit device controls the connection mode of the resistors inside the basic unit through the switches inside the basic unit, thereby forming a variety of different circuit structures, and the total resistance range of the resistor network will also change accordingly.
  • the circuit device achieves higher adjustable accuracy with fewer resistors, thereby reducing the circuit area cost and circuit power consumption.
  • the first adjustment circuit and the second adjustment circuit work together to adjust the total resistance of the entire resistor network, and then adjust the output value of each reference voltage, so that after the circuit is adjusted, even if each reference voltage increases or decreases an offset voltage value, the voltage difference between each adjacent reference voltage remains unchanged.
  • the basic unit further includes a third switch coupled between an input terminal and an output terminal of the basic unit.
  • the resistance values of the first resistor and the second resistor are equal.
  • the first adjustment circuit and the second adjustment circuit have the same structure.
  • the first adjustment circuit and the second adjustment circuit not only have the same circuit structure, but also have complementary resistance values in the circuits. Specifically, the total resistance value of the first adjustment circuit and the second adjustment circuit must maintain a constant value. When the resistance value of the first adjustment circuit increases by a certain amount, the resistance value of the second adjustment circuit needs to be reduced by the same amount. After adjustment, each reference voltage value between the first adjustment circuit and the second adjustment circuit can be shifted by an offset voltage as desired, while the relative voltage difference of each reference voltage remains unchanged.
  • an embodiment of the present application further provides a chip, including a trimming circuit and a power supply circuit; the trimming circuit and the power supply circuit are coupled.
  • an embodiment of the present application further provides an electronic device, including a trimming circuit and a circuit board; the trimming circuit and the circuit board are coupled.
  • FIG1 is a schematic diagram of the structure of an electronic device provided in an embodiment of the present application.
  • FIG2 is a schematic diagram of the structure of a chip provided in an embodiment of the present application.
  • FIG3 is a schematic diagram of a module of a trimming circuit provided in an embodiment of the present application.
  • FIG4 is a schematic diagram of an adjustment circuit structure provided in an embodiment of the present application.
  • FIG5A is a schematic diagram of another trimming circuit structure provided in an embodiment of the present application.
  • FIG5B is a schematic diagram of another adjustment circuit structure provided in an embodiment of the present application.
  • FIG6 is a schematic diagram of another trimming circuit structure provided in an embodiment of the present application.
  • FIG7 is a schematic diagram of a trimming circuit module provided in an embodiment of the present application.
  • FIG8 is a schematic diagram of another adjustment circuit structure provided in an embodiment of the present application.
  • FIG9 is a schematic diagram of a basic unit of an adjustment circuit provided in an embodiment of the present application.
  • FIG10 is a schematic diagram of all examples of adjusting the total resistance of a circuit provided in an embodiment of the present application.
  • FIG. 11 is a schematic diagram showing all examples of switch control of the adjustment circuit provided in the embodiments of the present application.
  • directional terms such as “up”, “down”, “left” and “right” may be defined including but not limited to the orientation relative to the schematic placement of the components in the drawings. It should be understood that these directional terms may be relative concepts, which are used for relative description and clarification, and may change accordingly according to changes in the orientation of the components in the drawings.
  • connection should be understood in a broad sense.
  • connection can be a fixed connection or a detachable connection.
  • coupled may refer to a direct electrical connection or an indirect electrical connection through an intermediate medium.
  • contacting may refer to a direct electrical connection or an indirect electrical connection through an intermediate medium.
  • a and/or B may represent: A exists alone, A and B exist at the same time, and B exists alone, where A and B may be singular or plural.
  • the character “/” generally indicates that the associated objects are in an "or” relationship.
  • Coupled is used to indicate that two or more components are in direct physical or electrical contact.
  • the term “coupled” may also refer to two or more components that are not in direct contact with each other but still cooperate or interact with each other.
  • the embodiments disclosed herein are not necessarily limited to the contents of this document.
  • the embodiment of the present application provides an electronic device.
  • the electronic device may be, for example, a consumer electronic product, a home electronic product, a vehicle-mounted electronic product, a financial terminal product, a communication electronic product, etc.
  • consumer electronic products include mobile phones, tablet computers, laptop computers, e-readers, personal computers, personal digital assistants, drones, virtual reality terminal devices, augmented reality terminal devices, etc.
  • Home electronic products include smart door locks, televisions, remote controls, refrigerators, soymilk machines, sweeping robots, etc.
  • Vehicle-mounted electronic products include vehicle-mounted navigation systems, vehicle-mounted high-density digital video discs, etc.
  • Financial terminal products include ATMs, self-service terminals, etc.
  • Communication electronic products include communication equipment such as servers, storage devices, radars, and base stations.
  • the electronic device 100 includes a processor 110 , a communication transceiver module 120 , a power management chip 130 , and a charging management module 140 .
  • the structure illustrated in the embodiment of the present application does not constitute a specific limitation on the electronic device 100.
  • the electronic device 100 may include more or fewer components than shown in the figure, or combine some components, or split some components, or arrange the components differently.
  • the components shown in the figure may be implemented by hardware, software, or a combination of software and hardware.
  • the processor 110 may include one or more processing units, for example, the processor 110 may include an application processor, a modem processor, a graphics processor, an image signal processor, a controller, a video codec, a digital signal processor, a baseband processor, a neural network processor, etc. Among them, different processing units may be independent devices or integrated into one or more processors.
  • the controller may generate an operation control signal according to the instruction operation code and the timing signal to complete the control of fetching and executing instructions.
  • the processor 110 may also be provided with a memory for storing instructions and data.
  • the memory in the processor 110 is a cache memory.
  • the memory may store instructions or data that the processor 110 has just used or cyclically used. If the processor 110 needs to use the instruction or data again, it may be directly called from the memory. This avoids repeated access, reduces the waiting time of the processor 110, and thus improves the efficiency of the system.
  • the processor 110 may include one or more interfaces.
  • the interfaces may include an inter-integrated circuit (I2C) interface, an inter-integrated circuit sound (I2S) interface, a pulse code modulation (PCM) interface, a universal asynchronous receiver/transmitter (URT) interface, a 12-bit RF ...
  • I2C inter-integrated circuit
  • I2S inter-integrated circuit sound
  • PCM pulse code modulation
  • UAT universal asynchronous receiver/transmitter
  • UART universal asynchronous receiver/transmitter
  • MIPI mobile industry processor interface
  • GPIO general-purpose input/output
  • SIM subscriber identity module
  • USB universal serial bus
  • the communication transceiver module 120 can be used for processing the protocol stack, or for amplifying, filtering, and other processing of analog radio frequency signals, or for realizing the above functions simultaneously.
  • the power management chip 130 can be used to supply power to other module components, and can also be used to monitor parameters such as battery capacity, battery cycle number, battery health status (leakage, impedance), etc.
  • the charging management module 140 is used to receive charging input from a charger, where the charger can be a wireless charger or a wired charger.
  • FIG2 it is a schematic diagram of the structure of an exemplary power management chip 130 provided in an embodiment of the present application.
  • the power management chip 130 includes a microprocessor 1301, a memory 1302, and a trimming circuit 1303.
  • the memory 1302 and the trimming circuit 1303 are both coupled to the microprocessor 1301.
  • the microprocessor 1301 is used to control the data flow of the chip and can execute program instructions.
  • the memory 1302 includes an on-chip buffer or register group for storing related information data, as well as data waiting to be processed or already processed.
  • the trimming circuit 1303 is used to adjust the reference voltage value to a target desired preset reference voltage value.
  • an exemplary trimming circuit 1303 provided in an embodiment of the present application is , the trimming circuit 1303 includes an operational amplifier 301, a resistor network 302, a first adjustment circuit 303 and a second adjustment circuit 304.
  • the non-inverting input terminal of the operational amplifier 301 is coupled to the voltage terminal, the inverting input terminal is coupled to the output terminal of the operational amplifier, and the output terminal of the operational amplifier 301 is coupled to the input terminal of the first adjustment circuit 303.
  • the operational amplifier transmits the signal at the voltage terminal to the first adjustment circuit 303 through negative feedback, so as to drive the resistor network 302, the first adjustment circuit 303 and the second adjustment circuit 304.
  • An output terminal of the first adjustment circuit 303 is coupled to a first terminal of the resistor network 302 .
  • the second end of the resistor network 302 is coupled to the input end of the second adjustment circuit 304 .
  • the resistor network 302 includes a plurality of reference voltage output ports, and the plurality of reference voltage output ports are used to output reference voltages of different values.
  • An output terminal of the second adjustment circuit 304 is coupled to the reference ground voltage terminal.
  • the first adjustment circuit 303 and the second adjustment circuit 304 are used to adjust the total resistance of the resistor network 302 .
  • the circuit designer can obtain the voltage value of reference voltage 1 from A in the resistor network 302, and obtain the voltage value of reference voltage n from B in the resistor network 302.
  • the first adjustment circuit 303 and the second adjustment circuit 304 are used to maintain the total resistance of the entire resistor network 302 in series constant, that is, when the total resistance of the first adjustment circuit 303 increases by a certain resistance value, the second adjustment circuit 304 needs to reduce the resistance value by the same certain amount, so as to keep the voltage difference between the reference voltages constant.
  • the first adjustment circuit 303 and the second adjustment circuit 304 are core modules of the adjustment circuit. Therefore, the structural design of the adjustment circuit is the focus of the embodiments of the present application.
  • the design of the first adjustment circuit is shown in FIG4.
  • the circuit structure includes multiple resistors R and multiple switches, such as switch S0 , switch S1 , switch S2 to switch Sn in FIG4.
  • Switch S0 , switch S1 to switch Sn respectively control the conduction and disconnection of their respective branches.
  • switch S0 is coupled in parallel with resistor R, and by controlling the opening and closing of switch S0 , the total resistance value of the entire adjustment circuit achieves a change of plus or minus R.
  • switch S1 is coupled in parallel with two parallel resistors R, and switch S1 controls the total resistance value of the entire adjustment circuit to achieve a change of plus or minus R/2.
  • switch Sn controls the total resistance value of the adjustment circuit to achieve a change of plus or minus R/2 ⁇ n.
  • the trimming circuit shown in FIG5A includes two amplifiers and two adjustment circuits.
  • the adjustment circuit 501 is coupled to the non-inverting input terminal of the operational amplifier, and is used to adjust the reference voltage 1 in the resistor network.
  • the adjustment circuit 502 is coupled to the inverting input terminal of the operational amplifier, and is used to adjust the reference voltage n in the resistor network.
  • the internal structure of the adjustment circuit is shown in FIG5B, and each unit resistor is coupled in parallel with a switch. By closing and opening the switch, it is determined whether the resistor connected in parallel is short-circuited. The number of resistors connected to the adjustment circuit is controlled by the switch to achieve a change in the resistance value of the internal resistor of the adjustment circuit, thereby affecting the reference voltage value output by the trimming circuit.
  • the trimming circuit shown in FIG. 6 includes an operational amplifier The amplifier 601, the first adjustment network 603, the second adjustment network 604, and the third adjustment network 605.
  • the first adjustment network 603 includes a plurality of switches and a plurality of resistors connected in series and parallel with the switches. By controlling the closing and opening of the internal switches of the first adjustment network 603, some resistors in the first adjustment network 603 are short-circuited or open-circuited, so as to achieve fine adjustment of the total resistance value of the first adjustment network 603 and the second adjustment network 604.
  • the second adjustment network 604 selects a feedback voltage from a node of a series of resistor strings. By controlling the switches of the third adjustment network 605, some resistors of the third adjustment network 605 are short-circuited or open-circuited, so as to achieve fine adjustment of the total resistance value of the third adjustment network 605, thereby controlling the gain of the entire amplifier.
  • the reference voltage of the entire adjustment circuit can be fine-tuned.
  • the embodiment of the present application provides a resistor complementary trimming circuit solution, which is used to fine-tune the reference voltage value in the circuit to make it closer to the target desired preset voltage value and ensure that the total resistance of the entire circuit remains constant.
  • the technical solution provided by the embodiment of the present application uses fewer resistors, which can significantly reduce the total area of the circuit design and has higher adjustable accuracy.
  • the trimming circuit is suitable for the power management chip 130 in the above-mentioned electronic device 100.
  • the architecture diagram of the trimming circuit is shown in FIG. 7 , where the trimming circuit includes an operational amplifier 701 , a resistor network 702 , a first adjustment circuit 703 , and a second adjustment circuit 704 .
  • the non-inverting input terminal of the operational amplifier 701 is coupled to the voltage terminal.
  • the inverting input terminal is coupled to the output terminal of the operational amplifier 701, and the output terminal of the operational amplifier 701 is also coupled to the input terminal of the first adjustment circuit 704.
  • the operational amplifier 701 transmits the 1.2V signal at the voltage terminal to the first adjustment circuit 704 by means of negative feedback.
  • the resistor network 702 is coupled to the input terminal of the second adjustment circuit 703 .
  • the resistor network 702 includes a plurality of unit resistors connected in series. The node of each unit resistor serves as an output terminal of a reference voltage for outputting reference voltages of different values.
  • the input end of the first adjustment circuit 703 is coupled to the output end of the operational amplifier 701, and the output end of the first adjustment circuit 703 is coupled to the resistor network 702.
  • the first adjustment circuit 703 includes a plurality of basic units connected in series.
  • the basic unit includes M first resistors, N second resistors, M-1 first switches, and N second switches. M is an integer greater than 1, and N is an integer greater than 1.
  • the basic unit also includes a third switch, which is coupled between the input end and the output end of the basic unit.
  • FIG. 8 it is a schematic diagram of the structure of an exemplary adjustment circuit provided in an embodiment of the present application, wherein the adjustment circuit comprises two basic units connected in series. Obviously, in actual industrial applications, the number of basic units is not limited to two.
  • each basic unit includes 6 first resistors, 6 second resistors, 5 first switches and 6 second switches.
  • the number of resistors and switches in each basic unit is not limited to the above-mentioned cases.
  • the six first resistors shown in FIG9 are respectively a first resistor R1, a first resistor R2, a first resistor R3, a first resistor R4, and a first resistor R5.
  • the six second resistors are respectively a second resistor R7, a second resistor R8, a second resistor R9, a second resistor R10, a second resistor R11, and a second resistor R12.
  • the six first switches are respectively a first switch M1, a first switch M2, a first switch M3, a first switch M4, a first switch M5, and a first switch M6.
  • the six second switches are respectively a second switch M7, a second switch M8, a second switch M9, a second switch M10, a second switch M11, and a second switch M12.
  • the first ends of the five first switches M1 to M5 shown in FIG9 are all coupled to the input end A of the basic unit, and the second ends are respectively coupled between adjacent first resistors.
  • the first end of the first switch M1 is coupled to the input end A of the basic unit, and the second end of the first switch M1 is coupled to the node between the first resistor R1 and the first resistor R2.
  • the first end of the first switch M2 is coupled to the input end A, and the second end of the first switch M2 is coupled to the node between the first resistor R2 and the first resistor R3.
  • the first ends of the first switch M3, the first switch M4, and the first switch M5 are all coupled to the input end A
  • the second end of the first switch M3 is coupled to the node between the first resistor R3 and the first resistor R4
  • the second end of the first switch M4 is coupled to the node between the first resistor R4 and the first resistor R5
  • the second end of the first switch M5 is coupled to the node between the first resistor R5 and the first resistor R6.
  • the first end of the first switch M6 is coupled to the input end A of the basic unit
  • the second end of the first switch M6 is coupled to the output end B of the basic unit.
  • the six second resistors and the six second switches are coupled in series between the input terminal A and the output terminal B of the basic unit.
  • the first end of the second resistor R7 is coupled to the input terminal A of the basic unit
  • the second end of the second resistor R7 is coupled in series with the first end of the second switch M7
  • the second end of the second switch M7 is coupled to the output terminal B of the basic unit.
  • the second end of R8 is coupled in series with the first end of the second switch M8, the first end of the second resistor R8 is coupled to the input end A of the basic unit, and the second end of the second switch M8 is coupled to the output end B of the basic unit.
  • the second resistor R9 is coupled in series with the second switch M9 between the input end A and the output end B of the basic unit
  • the second resistor R10 is coupled in series with the second switch M10 between the input end A and the output end B of the basic unit
  • the second resistor R11 is coupled in series with the second switch M11 between the input end A and the output end B of the basic unit
  • the second resistor R12 is coupled in series with the second switch M12 between the input end A and the output end B of the basic unit.
  • the connection mode of these resistors in series and parallel is changed to form a variety of different circuit structures, and the total resistance range of the entire basic unit is also changed accordingly.
  • the change of the total resistance in module one can be achieved.
  • the change of the total resistance of module two is achieved.
  • the total resistance of module one is then connected in parallel with the total resistance of module two as the total resistance of the basic unit.
  • the first switches M1-M5 are closed in sequence to achieve a total resistance of 1/2R, 2/3R, 3/4R, 4/5R, 5/6R, and 6/7R in sequence.
  • the number of parallel resistors is changed by controlling the second switches M7-M12, and the total resistance of the basic unit is 1/2R, 1/3R, 1/4R, 1/5R, 1/6R, and 1/7R in sequence.
  • the resistance values of the first resistors R1-R6 and the second resistors R7-R12 are substantially equal, which not only improves the area utilization of the chip in terms of process, but also makes the total resistance value of the basic unit change regularly under the control of the first switches M1-M6 and the second switches M7-M12, which is easy to control.
  • the first adjustment circuit 703 and the second adjustment circuit 704 have the same structure and complementary resistance values.
  • the second adjustment circuit 704 is coupled to the reference ground terminal, and the first adjustment circuit 703 and the second adjustment circuit 704 are used together to adjust the total resistance value of the entire adjustment circuit, and the resistance values of the corresponding positions of the two are complementary, that is, the sum of the resistance values of the corresponding structures at the same position is 2R, where R is the unit resistance value.
  • the basic unit includes different numbers of unit resistors N, and different series-parallel networks can be obtained, and the resistance range that can be generated will also change accordingly.
  • N any positive integer
  • n any positive integer satisfying n ⁇ N.
  • FIG10 is a schematic diagram of all possible situations for adjusting the total resistance of the circuit in the above scheme.
  • the first horizontal row is all possible resistance values generated by connecting modules 803 and 804 in parallel, which are used as the horizontal coordinate of the table
  • the first vertical column is all possible resistance values generated by connecting modules 801 and 802 in parallel, which are used as the vertical coordinate of the table.
  • the corresponding values in the table are: the final resistance value obtained by connecting the horizontal coordinate resistance value of the point in series with the vertical coordinate resistance value.
  • the generated value range is from 0.2 to 2, and is densely distributed at the central symmetrical point 1, and sparsely distributed at both ends. This distribution characteristic will remain unchanged by changing the N value of the basic unit. In practical applications, we often do not need such a large range of values, and the sparseness at both ends is not conducive to adjustment by fine-tuning resistors.
  • the non-repetitive resistance values that meet the value range are highlighted, and the order of size is: 0.45R, 0.47R, 0.5R, 0.53R, 0.58R, 0.64R, 0.66R, 0.7R, 0.75R, 0.8R, 0.81R, 0.83R, 0.87R, 0.89R,0.92R,0.94R,0.95R,0.97R,R,1.03R,1.05R,1.06R,1.08R,1.11R,1.13R,1.17R,1.19R,1.2R,1.25R,1.3R,1.33R,1.36R,1.42R,1.47R,1.5R,1.52R,1.55R, 37 in total.
  • the total number of steps is usually selected as a multiple of 2.
  • RT is the total resistance value of the basic unit
  • M1-M19 corresponds to the on-off status of each control switch under this resistance value. 1 represents that the switch is in the closed state
  • 0 represents that the switch is in the open state
  • X represents that the switch can be closed or opened. If you want to get a resistor with a specific RT value, you can find the switch state corresponding to the RT value from the table, and toggle the switch according to the switch state, so as to quickly debug and adjust the resistance value of the circuit.

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Abstract

A trimming circuit (1303), comprising: an operational amplifier (701), a first adjustment circuit (703), a resistance network (702) and a second adjustment circuit (704). The trimming circuit (1303) is used for performing fine tuning and correction on a reference voltage value in the circuit, such that the reference voltage value is closer to a preset voltage value expected by a target; it is ensured that the total resistance value of the whole circuit remains constant, and a small number of resistors are used; and the total area for a circuit design can be significantly reduced, and the adjustable precision is higher.

Description

一种修调电路、芯片及电子设备Adjustment circuit, chip and electronic device 技术领域Technical Field
本申请涉及集成电路测试技术领域，尤其涉及一种修调电路、芯片及电子设备。The present application relates to the technical field of integrated circuit testing, and in particular to a trimming circuit, a chip and an electronic device.
背景技术Background technique
随着集成电路高性能指标的要求越来越高，芯片设计面临高精度的要求日趋明显，尤其是针对高速高精度的数模转换器、高精度的基准源电路等。通常在芯片内部，需要产生恒定的基准电压，为内部的数字电路、模拟电路提供精确稳定的参考电压值。但是在生产过程中，由于基准电压的失调、温漂、工艺偏差等不确定因素，芯片的基准电压的精度往往较预设值有偏差。As the requirements for high performance indicators of integrated circuits become higher and higher, the requirements for high precision in chip design are becoming increasingly obvious, especially for high-speed and high-precision digital-to-analog converters, high-precision reference source circuits, etc. Usually, a constant reference voltage needs to be generated inside the chip to provide an accurate and stable reference voltage value for the internal digital circuits and analog circuits. However, during the production process, due to uncertain factors such as reference voltage offset, temperature drift, and process deviation, the accuracy of the chip's reference voltage often deviates from the preset value.
这些偏差将导致整体电路功能的失败，基准电压的精度直接影响集成电路数据采集的准确性。因此，需要设计修调电路对基准电压进行修调，使得基准电压更接近于预设的基准参考电压。通常，修调的精准度越高，修调电路所占用的芯片面积越大，这就造成了芯片制造成本的增加。These deviations will lead to the failure of the overall circuit function. The accuracy of the reference voltage directly affects the accuracy of integrated circuit data acquisition. Therefore, it is necessary to design a trimming circuit to trim the reference voltage so that the reference voltage is closer to the preset reference voltage. Generally, the higher the trimming accuracy, the larger the chip area occupied by the trimming circuit, which increases the chip manufacturing cost.
发明内容Summary of the invention
本申请实施例提供一种修调电路、芯片及电子设备，，该修调电路所占用的面积较小，减少了芯片制造的成本The embodiment of the present application provides a trimming circuit, a chip and an electronic device. The trimming circuit occupies a small area, which reduces the cost of chip manufacturing.
为达到上述目的，本申请采用如下技术方案：In order to achieve the above objectives, this application adopts the following technical solutions:
本申请实施例的第一方面，提供一种修调电路，该电路包括：运 算放大器，第一调整电路，电阻网络，第二调整电路。In a first aspect of an embodiment of the present application, a trimming circuit is provided, the circuit comprising: An operational amplifier, a first adjustment circuit, a resistor network, and a second adjustment circuit.
运算放大器的同相输入端与电压端耦接，输出端与第一调整电路耦接，运算放大器通过负反馈的方式，将电压端的电平传输至第一调整电路；第一调整电路的输出端还与电阻网络的第一端耦接，第一调整电路包括多个串联的基本单元，该基本单元内部包括M个第一电阻、N个第二电阻、M-1个第一开关以及N个第二开关，M为大于1的整数，M个第一电阻中每相邻的第一电阻之间均有一个节点，并且每个节点与电路块的输入端之间均耦接一个第一开关。基本单元的输入端与输出端之间耦接N个并联的电阻支路，N个电阻支路中的每条电阻支路均包括串联耦接的第二开关和第二电阻。电阻网络的第二端还与第二调整电路的输入端耦接，该电阻网络包括多个参考电压输出端，多个参考电压输出端用于输出不同数值的参考电压。第二调整电路的输出端还与参考地电压端耦接，第一调整电路和第二调整电路用于调整电阻网络的总阻值。The in-phase input terminal of the operational amplifier is coupled to the voltage terminal, and the output terminal is coupled to the first adjustment circuit. The operational amplifier transmits the voltage level of the voltage terminal to the first adjustment circuit by means of negative feedback. The output terminal of the first adjustment circuit is also coupled to the first terminal of the resistor network. The first adjustment circuit includes a plurality of basic units connected in series. The basic unit includes M first resistors, N second resistors, M-1 first switches and N second switches. M is an integer greater than 1. There is a node between each adjacent first resistor in the M first resistors, and a first switch is coupled between each node and the input terminal of the circuit block. N parallel resistor branches are coupled between the input terminal and the output terminal of the basic unit. Each resistor branch in the N resistor branches includes a second switch and a second resistor coupled in series. The second terminal of the resistor network is also coupled to the input terminal of the second adjustment circuit. The resistor network includes a plurality of reference voltage output terminals, and the plurality of reference voltage output terminals are used to output reference voltages of different values. The output terminal of the second adjustment circuit is also coupled to the reference ground voltage terminal. The first adjustment circuit and the second adjustment circuit are used to adjust the total resistance value of the resistor network.
此电路装置通过基本单元内部的开关，来控制基本单元内部电阻的连接方式，从而组成各种各样不同的电路结构，该电阻网络的总阻值范围也将相应的变化。该电路装置通过这种开关拓扑结构，用更少的电阻数量实现更高的可调精度，从而降低电路面积成本，减少电路功耗。第一调整电路和第二调整电路二者共同作用，调节整个电阻网络的总阻值，进而调节各个参考电压的输出值，使得电路经过修调之后，即使每个参考电压增加或减少一个失调电压值时，各个相邻参考电压之间的电压差依旧保持不变。 This circuit device controls the connection mode of the resistors inside the basic unit through the switches inside the basic unit, thereby forming a variety of different circuit structures, and the total resistance range of the resistor network will also change accordingly. Through this switch topology, the circuit device achieves higher adjustable accuracy with fewer resistors, thereby reducing the circuit area cost and circuit power consumption. The first adjustment circuit and the second adjustment circuit work together to adjust the total resistance of the entire resistor network, and then adjust the output value of each reference voltage, so that after the circuit is adjusted, even if each reference voltage increases or decreases an offset voltage value, the voltage difference between each adjacent reference voltage remains unchanged.
在一个可能的设计中，基本单元还包括第三开关，第三开关耦接于基本单元的输入端和输出端之间。In a possible design, the basic unit further includes a third switch coupled between an input terminal and an output terminal of the basic unit.
在一个可能的设计中，第一电阻和第二电阻的阻值相等。In a possible design, the resistance values of the first resistor and the second resistor are equal.
在一个可能的设计中，第一调整电路与第二调整电路结构相同。In a possible design, the first adjustment circuit and the second adjustment circuit have the same structure.
此外，第一调整电路与第二调整电路不仅电路结构相同，电路中的阻值还要互补。具体来说，第一调整电路和第二调整电路的总阻值必须维持一个定值，当第一调整电路的阻值增加一个定量的阻值时，第二调整电路需要减少同等定量的阻值。修调之后，第一调整电路和第二调整电路之间的每个参考电压值都可如愿平移一个失调电压，而每个参考电压的相对电压差则保持不变。In addition, the first adjustment circuit and the second adjustment circuit not only have the same circuit structure, but also have complementary resistance values in the circuits. Specifically, the total resistance value of the first adjustment circuit and the second adjustment circuit must maintain a constant value. When the resistance value of the first adjustment circuit increases by a certain amount, the resistance value of the second adjustment circuit needs to be reduced by the same amount. After adjustment, each reference voltage value between the first adjustment circuit and the second adjustment circuit can be shifted by an offset voltage as desired, while the relative voltage difference of each reference voltage remains unchanged.
另一方面，本申请实施例还提供了一种芯片，包括修调电路和电源电路；修调电路和电源电路耦接。On the other hand, an embodiment of the present application further provides a chip, including a trimming circuit and a power supply circuit; the trimming circuit and the power supply circuit are coupled.
另一方面，本申请实施例还提供了一种电子设备，包括修调电路和电路板；修调电路和电路板耦接。On the other hand, an embodiment of the present application further provides an electronic device, including a trimming circuit and a circuit board; the trimming circuit and the circuit board are coupled.
附图说明BRIEF DESCRIPTION OF THE DRAWINGS
图1为本申请实施例提供的一种电子设备的结构示意图；FIG1 is a schematic diagram of the structure of an electronic device provided in an embodiment of the present application;
图2为本申请实施例提供的一种芯片的结构示意图；FIG2 is a schematic diagram of the structure of a chip provided in an embodiment of the present application;
图3为本申请实施例提供的一种修调电路的模块示意图；FIG3 is a schematic diagram of a module of a trimming circuit provided in an embodiment of the present application;
图4为本申请实施例提供的一种调整电路结构示意图；FIG4 is a schematic diagram of an adjustment circuit structure provided in an embodiment of the present application;
图5A为本申请实施例提供的另一种修调电路结构示意图；FIG5A is a schematic diagram of another trimming circuit structure provided in an embodiment of the present application;
图5B为本申请实施例提供的另一种调整电路结构示意图；FIG5B is a schematic diagram of another adjustment circuit structure provided in an embodiment of the present application;
图6为本申请实施例提供的再一种修调电路结构示意图； FIG6 is a schematic diagram of another trimming circuit structure provided in an embodiment of the present application;
图7为本申请实施例提供的一种修调电路模块示意图；FIG7 is a schematic diagram of a trimming circuit module provided in an embodiment of the present application;
图8为本申请实施例提供的再一种调整电路结构示意图；FIG8 is a schematic diagram of another adjustment circuit structure provided in an embodiment of the present application;
图9为本申请实施例提供的一种调整电路基本单元示意图；FIG9 is a schematic diagram of a basic unit of an adjustment circuit provided in an embodiment of the present application;
图10为本申请实施例提供的调整电路总阻值的所有示例示意图；FIG10 is a schematic diagram of all examples of adjusting the total resistance of a circuit provided in an embodiment of the present application;
图11为本申请实施例提供的调整电路开关控制的所有示例示意图。FIG. 11 is a schematic diagram showing all examples of switch control of the adjustment circuit provided in the embodiments of the present application.
具体实施方式Detailed ways
下面将结合本申请实施例中的附图，对本申请实施例中的技术方案进行描述，显然，所描述的实施例仅仅是本申请一部分实施例，而不是全部的实施例。The technical solutions in the embodiments of the present application will be described below in conjunction with the drawings in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, rather than all of the embodiments.
以下，术语“第二”、“第一”等仅用于描述方便，而不能理解为指示或暗示相对重要性或者隐含指明所指示的技术特征的数量。由此，限定有“第二”、“第一”等的特征可以明示或者隐含地包括一个或者更多个该特征。在本申请的描述中，除非另有说明，“多个”的含义是两个或两个以上。In the following, the terms "second", "first", etc. are used only for convenience of description and are not to be understood as indicating or implying relative importance or implicitly indicating the number of the indicated technical features. Thus, a feature defined as "second", "first", etc. may explicitly or implicitly include one or more of the feature. In the description of this application, unless otherwise specified, "plurality" means two or more.
此外，本申请实施例中，“上”、“下”、“左”、“右”等方位术语可以包括但不限于相对附图中的部件示意置放的方位来定义的，应当理解到，这些方向性术语可以是相对的概念，它们用于相对于的描述和澄清，其可以根据附图中部件附图所放置的方位的变化而相应地发生变化。In addition, in the embodiments of the present application, directional terms such as "up", "down", "left" and "right" may be defined including but not limited to the orientation relative to the schematic placement of the components in the drawings. It should be understood that these directional terms may be relative concepts, which are used for relative description and clarification, and may change accordingly according to changes in the orientation of the components in the drawings.
在本申请实施例中，除非另有明确的规定和限定，术语“连接”应做广义理解，例如，“连接”可以是固定连接，也可以是可拆卸连 接，或成一体；可以是直接相连，也可以通过中间媒介间接相连。此外，术语“相耦接”可以是直接的电性连接，也可以通过中间媒介间接的电性连接。术语“接触”可以是直接接触，也可以是通过中间媒介间接的接触。In the embodiments of the present application, unless otherwise clearly specified or limited, the term "connection" should be understood in a broad sense. For example, "connection" can be a fixed connection or a detachable connection. The term "coupled" may refer to a direct electrical connection or an indirect electrical connection through an intermediate medium. The term "contacting" may refer to a direct electrical connection or an indirect electrical connection through an intermediate medium.
本申请实施例中，“和/或”，描述关联对象的关联关系，表示可以存在三种关系，例如，A和/或B，可以表示：单独存在A，同时存在A和B，单独存在B的情况，其中A，B可以是单数或者复数。字符“/”一般表示前后关联对象是一种“或”的关系。In the embodiments of the present application, "and/or" describes the association relationship of the associated objects, indicating that there may be three relationships. For example, A and/or B may represent: A exists alone, A and B exist at the same time, and B exists alone, where A and B may be singular or plural. The character "/" generally indicates that the associated objects are in an "or" relationship.
在描述一些实施例时，使用术语“耦接”以表明两个或者两个以上部件有直接物理接触或者电接触。然而，术语“耦接”也可能指的是两个或者两个以上部件彼此间并无直接接触，但仍彼此协作或者相互作用。这里所公开的实施例并不必然限制于本文内容。When describing some embodiments, the term "coupled" is used to indicate that two or more components are in direct physical or electrical contact. However, the term "coupled" may also refer to two or more components that are not in direct contact with each other but still cooperate or interact with each other. The embodiments disclosed herein are not necessarily limited to the contents of this document.
本申请实施例提供了一种电子设备。该电子设备例如可以是消费类电子产品、家居式电子产品、车载式电子产品、金融终端产品、通信电子产品等。其中，消费类电子产品如为手机、平板电脑、笔记本电脑、电子阅读器、个人计算机、个人数字助理、无人机、虚拟现实终端设备、增强现实终端设备等。家居式电子产品如智能门锁、电视、遥控器、冰箱、豆浆机、扫地机器人等。车载式电子产品如车载导航仪、车载高密度数字视频光盘等。金融终端产品如为自动取款机、自助办理业务的终端等。通信类电子产品如服务器、存储器、雷达、基站等通信设备。The embodiment of the present application provides an electronic device. The electronic device may be, for example, a consumer electronic product, a home electronic product, a vehicle-mounted electronic product, a financial terminal product, a communication electronic product, etc. Among them, consumer electronic products include mobile phones, tablet computers, laptop computers, e-readers, personal computers, personal digital assistants, drones, virtual reality terminal devices, augmented reality terminal devices, etc. Home electronic products include smart door locks, televisions, remote controls, refrigerators, soymilk machines, sweeping robots, etc. Vehicle-mounted electronic products include vehicle-mounted navigation systems, vehicle-mounted high-density digital video discs, etc. Financial terminal products include ATMs, self-service terminals, etc. Communication electronic products include communication equipment such as servers, storage devices, radars, and base stations.
如图1所示，为本申请实施例提供的一种示例性的电子设备的结 构示意图。该电子设备100包括处理器110，通信收发模块120，电源管理芯片130，充电管理模块140。As shown in FIG1 , an exemplary electronic device structure provided in an embodiment of the present application is shown in FIG. The electronic device 100 includes a processor 110 , a communication transceiver module 120 , a power management chip 130 , and a charging management module 140 .
可以理解的是，本申请实施例示意的结构并不构成对电子设备100的具体限定。在本申请另一些实施例中，电子设备100可以包括比图示更多或更少的部件，或组合某些部件，或拆分某些部件，或不同的部件布置。图示的部件可以是硬件实现，可以是软件实现，或者软件硬件组合的方式实现。It is to be understood that the structure illustrated in the embodiment of the present application does not constitute a specific limitation on the electronic device 100. In other embodiments of the present application, the electronic device 100 may include more or fewer components than shown in the figure, or combine some components, or split some components, or arrange the components differently. The components shown in the figure may be implemented by hardware, software, or a combination of software and hardware.
处理器110可以包括一个或多个处理单元，例如：处理器110可以包括应用处理器，调制解调处理器，图形处理器，图像信号处理器，控制器，视频编解码器，数字信号处理器，基带处理器，神经网络处理器等。其中，不同的处理单元可以是独立的器件，也可以是集成在一个或者多个处理器中。控制器可以根据指令操作码和时序信号，产生操作控制信号，完成取指令和执行指令的控制。The processor 110 may include one or more processing units, for example, the processor 110 may include an application processor, a modem processor, a graphics processor, an image signal processor, a controller, a video codec, a digital signal processor, a baseband processor, a neural network processor, etc. Among them, different processing units may be independent devices or integrated into one or more processors. The controller may generate an operation control signal according to the instruction operation code and the timing signal to complete the control of fetching and executing instructions.
处理器110中还可以设置存储器，用于存储指令和数据。在一些实施例中，处理器110中的存储器为高速缓冲存储器。该存储器可以保存处理器110刚用过或循环使用的指令或数据。如果处理器110需要再次使用该指令或数据，可从所述存储器中直接调用。避免了重复存取，减少了处理器110的等待时间，因而提高了***的效率。The processor 110 may also be provided with a memory for storing instructions and data. In some embodiments, the memory in the processor 110 is a cache memory. The memory may store instructions or data that the processor 110 has just used or cyclically used. If the processor 110 needs to use the instruction or data again, it may be directly called from the memory. This avoids repeated access, reduces the waiting time of the processor 110, and thus improves the efficiency of the system.
在一些实施例中，处理器110可以包括一个或多个接口。接口可以包括集成电路(inter-integrated circuit，I2C)接口，集成电路内置音频(inter-integrated circuit sound，I2S)接口，脉冲编码调制(pulse code modulation，PCM)接口，通用异步收发传输 器(universal asynchronous receiver/transmitter，UART)接口，移动产业处理器接口(mobile industry processor interface，MIPI)，通用输入输出(general-purpose input/output，GPIO)接口，用户标识模块(subscriber identity module，SIM)接口，和/或通用串行总线(universal serial bus，USB)接口等。In some embodiments, the processor 110 may include one or more interfaces. The interfaces may include an inter-integrated circuit (I2C) interface, an inter-integrated circuit sound (I2S) interface, a pulse code modulation (PCM) interface, a universal asynchronous receiver/transmitter (URT) interface, a 12-bit RF ... A universal asynchronous receiver/transmitter (UART) interface, a mobile industry processor interface (MIPI), a general-purpose input/output (GPIO) interface, a subscriber identity module (SIM) interface, and/or a universal serial bus (USB) interface, etc.
通信收发模块120可以用于协议栈的处理，或对模拟射频信号进行放大、滤波等处理，或同时实现上述功能。The communication transceiver module 120 can be used for processing the protocol stack, or for amplifying, filtering, and other processing of analog radio frequency signals, or for realizing the above functions simultaneously.
电源管理芯片130可以用于对其他模块部件进行供电，还可以用于监测电池容量，电池循环次数，电池健康状态(漏电，阻抗)等参数。The power management chip 130 can be used to supply power to other module components, and can also be used to monitor parameters such as battery capacity, battery cycle number, battery health status (leakage, impedance), etc.
充电管理模块140用于从充电器接收充电输入。其中，充电器可以是无线充电器，也可以是有线充电器。The charging management module 140 is used to receive charging input from a charger, where the charger can be a wireless charger or a wired charger.
如图2所示，为本申请实施例提供的一种示例性的电源管理芯片130的结构示意图，电源管理芯片130包括微处理器1301、存储器1302以及修调电路1303。存储器1302、修调电路1303均与微处理器1301耦接。As shown in FIG2 , it is a schematic diagram of the structure of an exemplary power management chip 130 provided in an embodiment of the present application. The power management chip 130 includes a microprocessor 1301, a memory 1302, and a trimming circuit 1303. The memory 1302 and the trimming circuit 1303 are both coupled to the microprocessor 1301.
微处理器1301用于控制芯片的数据流，能够运行程序指令。The microprocessor 1301 is used to control the data flow of the chip and can execute program instructions.
存储器1302包括片内缓冲器或寄存器组，用于存储相关的信息数据，以及等待处理或者已经处理的数据。The memory 1302 includes an on-chip buffer or register group for storing related information data, as well as data waiting to be processed or already processed.
修调电路1303用于将参考电压值调节到目标期望的预设参考电压值。The trimming circuit 1303 is used to adjust the reference voltage value to a target desired preset reference voltage value.
如图3所示，为本申请实施例提供的一种示例性的修调电路1303 的结构示意图，该修调电路1303包括运算放大器301、电阻网络302、第一调整电路303和第二调整电路304。As shown in FIG. 3 , an exemplary trimming circuit 1303 provided in an embodiment of the present application is , the trimming circuit 1303 includes an operational amplifier 301, a resistor network 302, a first adjustment circuit 303 and a second adjustment circuit 304.
运算放大器301的同相输入端与电压端耦接，反相输入端与运算放大器的输出端耦接，运算放大器301的输出端与第一调整电路303的输入端耦接。运算放大器通过负反馈的方式，将电压端的信号传输至第一调整电路303，用于驱动电阻网络302、第一调整电路303和第二调整电路304。The non-inverting input terminal of the operational amplifier 301 is coupled to the voltage terminal, the inverting input terminal is coupled to the output terminal of the operational amplifier, and the output terminal of the operational amplifier 301 is coupled to the input terminal of the first adjustment circuit 303. The operational amplifier transmits the signal at the voltage terminal to the first adjustment circuit 303 through negative feedback, so as to drive the resistor network 302, the first adjustment circuit 303 and the second adjustment circuit 304.
第一调整电路303的输出端与电阻网络302的第一端耦接。An output terminal of the first adjustment circuit 303 is coupled to a first terminal of the resistor network 302 .
电阻网络302的第二端与第二调整电路304的输入端耦接，电阻网络302包括多个参考电压的输出端口，多个参考电压的输出端口用于输出不同数值的参考电压。The second end of the resistor network 302 is coupled to the input end of the second adjustment circuit 304 . The resistor network 302 includes a plurality of reference voltage output ports, and the plurality of reference voltage output ports are used to output reference voltages of different values.
第二调整电路304的输出端与参考地电压端耦接，第一调整电路303和第二调整电路304用于调整电阻网络302的总阻值。An output terminal of the second adjustment circuit 304 is coupled to the reference ground voltage terminal. The first adjustment circuit 303 and the second adjustment circuit 304 are used to adjust the total resistance of the resistor network 302 .
电路设计者可以从电阻网络302中的A处取得参考电压1的电压值，从电阻网络302中的B处取得参考电压n的电压值。第一调整电路303、第二调整电路304用于维持整个电阻网络302的串联总阻值恒定，即当第一调整电路303的总阻值增加一个定量的阻值时，第二调整电路304需要减少同等定量的阻值，从而保持各个参考电压间的电压差恒定。The circuit designer can obtain the voltage value of reference voltage 1 from A in the resistor network 302, and obtain the voltage value of reference voltage n from B in the resistor network 302. The first adjustment circuit 303 and the second adjustment circuit 304 are used to maintain the total resistance of the entire resistor network 302 in series constant, that is, when the total resistance of the first adjustment circuit 303 increases by a certain resistance value, the second adjustment circuit 304 needs to reduce the resistance value by the same certain amount, so as to keep the voltage difference between the reference voltages constant.
其中，第一调整电路303和第二调整电路304是修调电路的核心模块，因此关于调整电路的结构设计，是本申请实施例所要阐述的重点所在。 The first adjustment circuit 303 and the second adjustment circuit 304 are core modules of the adjustment circuit. Therefore, the structural design of the adjustment circuit is the focus of the embodiments of the present application.
在一些实施例中，关于第一调整电路的设计如图4所示。该电路结构包括多个电阻R和多个开关，例如图4中的开关S0、开关S1、开关S2至开关Sn。开关S0、开关S1至开关Sn分别控制各自支路的导通与断开。其中，开关S0与电阻R并联耦接，通过控制开关S0的断开与闭合，整个调整电路的电阻总阻值实现加减R的变化量。以此类推，开关S1与两个并联的电阻R进行并联耦接，开关S1控制着整个调整电路的电阻总阻值实现加减R/2的变化量。同理，开关Sn控制调整电路的电阻总阻值实现加减R/2^n的变化量。通过增大或者减少调整电路的电阻总阻值，实现调整电路输出的电压幅值往上或往下微调。In some embodiments, the design of the first adjustment circuit is shown in FIG4. The circuit structure includes multiple resistors R and multiple switches, such as switch S0 , switch S1 , switch S2 to switch Sn in FIG4. Switch S0 , switch S1 to switch Sn respectively control the conduction and disconnection of their respective branches. Among them, switch S0 is coupled in parallel with resistor R, and by controlling the opening and closing of switch S0 , the total resistance value of the entire adjustment circuit achieves a change of plus or minus R. Similarly, switch S1 is coupled in parallel with two parallel resistors R, and switch S1 controls the total resistance value of the entire adjustment circuit to achieve a change of plus or minus R/2. Similarly, switch Sn controls the total resistance value of the adjustment circuit to achieve a change of plus or minus R/2^n. By increasing or decreasing the total resistance value of the adjustment circuit, the voltage amplitude output by the adjustment circuit is fine-tuned upward or downward.
但是，该调整电路的多个开关会对电路中的总电阻值有所影响。However, the multiple switches of the adjustment circuit will have some influence on the total resistance value in the circuit.
在另一些实施例中，如图5A所示的修调电路，该修调电路包含两个放大器和两个调整电路。调整电路501耦接到运算放大器的同相输入端，用于调整电阻网络中的参考电压1。调整电路502耦接到运算放大器的反相输入端，用于调整电阻网络中的参考电压n。调整电路的内部结构如图5B所示，每一个单位电阻均与一个开关并联耦接。通过开关的闭合与断开，决定与之并联的电阻是否短路。通过开关来控制接入调整电路的电阻数量，实现调整电路内部电阻阻值的变化，进而影响修调电路输出的参考电压值。In other embodiments, the trimming circuit shown in FIG5A includes two amplifiers and two adjustment circuits. The adjustment circuit 501 is coupled to the non-inverting input terminal of the operational amplifier, and is used to adjust the reference voltage 1 in the resistor network. The adjustment circuit 502 is coupled to the inverting input terminal of the operational amplifier, and is used to adjust the reference voltage n in the resistor network. The internal structure of the adjustment circuit is shown in FIG5B, and each unit resistor is coupled in parallel with a switch. By closing and opening the switch, it is determined whether the resistor connected in parallel is short-circuited. The number of resistors connected to the adjustment circuit is controlled by the switch to achieve a change in the resistance value of the internal resistor of the adjustment circuit, thereby affecting the reference voltage value output by the trimming circuit.
此方案由于采用了两个运算放大器去调整输出电压，所以会产生更多的功耗，且调整电路的内部结构所需要的电阻数量较多，因而增加了电路的成本面积。Since this solution uses two operational amplifiers to adjust the output voltage, it will generate more power consumption, and the number of resistors required to adjust the internal structure of the circuit is large, thereby increasing the cost and area of the circuit.
在另一些实施例中，如图6所示的修调电路，该电路包括运算放 大器601、第一调整网络603、第二调整网络604、第三调整网络605。第一调整网络603包括多个开关、以及多个与开关串并联的电阻。通过控制第一调整网络603内部开关的闭合断开，对第一调整网络603中的部分电阻进行短路或断路，实现对第一调整网络603和第二调整网络604总阻值的微调。第二调整网络604从一系列电阻串的节点处选择反馈电压。通过控制第三调整网络605的开关，对第三调整网络605的部分电阻进行短路或断路，实现对第三调整网络605总电阻值的微调，进而控制整个放大器的增益。In some other embodiments, the trimming circuit shown in FIG. 6 includes an operational amplifier The amplifier 601, the first adjustment network 603, the second adjustment network 604, and the third adjustment network 605. The first adjustment network 603 includes a plurality of switches and a plurality of resistors connected in series and parallel with the switches. By controlling the closing and opening of the internal switches of the first adjustment network 603, some resistors in the first adjustment network 603 are short-circuited or open-circuited, so as to achieve fine adjustment of the total resistance value of the first adjustment network 603 and the second adjustment network 604. The second adjustment network 604 selects a feedback voltage from a node of a series of resistor strings. By controlling the switches of the third adjustment network 605, some resistors of the third adjustment network 605 are short-circuited or open-circuited, so as to achieve fine adjustment of the total resistance value of the third adjustment network 605, thereby controlling the gain of the entire amplifier.
通过控制开关对三个调整网络的协同调试，实现对整个修调电路的参考电压进行微调。By controlling the switches to coordinately debug the three adjustment networks, the reference voltage of the entire adjustment circuit can be fine-tuned.
但是因为此方案没有电阻互补的连接方式，所以在微调电阻的过程中，整个修调电路的总电阻值将发生改变，从而导致整个修调电路***发生整体的电压漂移，影响原电路的正常功能。However, because this solution does not have a resistor complementary connection method, the total resistance value of the entire trimming circuit will change during the process of fine-tuning the resistance, causing the entire trimming circuit system to have an overall voltage drift, affecting the normal function of the original circuit.
基于此，本申请的实施例提供了一种电阻互补的修调电路方案，用于对电路中的参考电压值进行微调修正，使其更加接近于目标期望的预设电压值，并保证整个电路的总阻值维持恒定，比起相关技术方案，本申请实施例提供的技术方案使用的电阻数量更少，可以显著降低电路设计的总面积，并且可调精度更高。该修调电路适用于上述电子设备100中的电源管理芯片130。Based on this, the embodiment of the present application provides a resistor complementary trimming circuit solution, which is used to fine-tune the reference voltage value in the circuit to make it closer to the target desired preset voltage value and ensure that the total resistance of the entire circuit remains constant. Compared with the related technical solutions, the technical solution provided by the embodiment of the present application uses fewer resistors, which can significantly reduce the total area of the circuit design and has higher adjustable accuracy. The trimming circuit is suitable for the power management chip 130 in the above-mentioned electronic device 100.
示例的，如图7所示的修调电路的架构图，该修调电路包括运算放大器701、电阻网络702、第一调整电路703、第二调整电路704。For example, the architecture diagram of the trimming circuit is shown in FIG. 7 , where the trimming circuit includes an operational amplifier 701 , a resistor network 702 , a first adjustment circuit 703 , and a second adjustment circuit 704 .
运算放大器701的同相输入端与电压端耦接，运算放大器701的 反相输入端与运算放大器701的输出端耦接,运算放大器701的输出端还与第一调整电路704的输入端耦接。运算放大器701通过负反馈的方式，将电压端的1.2V信号传输至第一调整电路704。The non-inverting input terminal of the operational amplifier 701 is coupled to the voltage terminal. The inverting input terminal is coupled to the output terminal of the operational amplifier 701, and the output terminal of the operational amplifier 701 is also coupled to the input terminal of the first adjustment circuit 704. The operational amplifier 701 transmits the 1.2V signal at the voltage terminal to the first adjustment circuit 704 by means of negative feedback.
电阻网络702与第二调整电路703的输入端耦接，电阻网络702内部包括多个串联的单位电阻，每一个单位电阻的节点作为参考电压的输出端，用于输出不同数值的参考电压。The resistor network 702 is coupled to the input terminal of the second adjustment circuit 703 . The resistor network 702 includes a plurality of unit resistors connected in series. The node of each unit resistor serves as an output terminal of a reference voltage for outputting reference voltages of different values.
第一调整电路703的输入端与运算放大器701的输出端耦接，第一调整电路703的输出端与电阻网络702耦接。且第一调整电路703包括多个串联的基本单元。基本单元包括M个第一电阻、N个第二电阻、M-1个第一开关以及N个第二开关。M为大于1的整数，N为大于1的整数。M个第一电阻中相邻的第一电阻之间均有一个节点，每个节点均与电路块的输入端之间耦接一个第一开关；N个第二电阻中每一个第二电阻均与N个第二开关中的每一个第二开关对应串联耦接于基本单元的输入端与输出端之间；。此外，基本单元还包括第三开关，第三开关耦接于基本单元的输入端和输出端之间。The input end of the first adjustment circuit 703 is coupled to the output end of the operational amplifier 701, and the output end of the first adjustment circuit 703 is coupled to the resistor network 702. The first adjustment circuit 703 includes a plurality of basic units connected in series. The basic unit includes M first resistors, N second resistors, M-1 first switches, and N second switches. M is an integer greater than 1, and N is an integer greater than 1. There is a node between adjacent first resistors in the M first resistors, and each node is coupled to a first switch between the input end of the circuit block; each second resistor in the N second resistors is coupled in series with each second switch in the N second switches between the input end and the output end of the basic unit;. In addition, the basic unit also includes a third switch, which is coupled between the input end and the output end of the basic unit.
如图8所示，为本申请实施例提供的一种示例性的调整电路的结构示意图，所述调整电路包含2个串联的基本单元。显然，在实际工业应用中，基本单元的数量不限于2个。As shown in Fig. 8, it is a schematic diagram of the structure of an exemplary adjustment circuit provided in an embodiment of the present application, wherein the adjustment circuit comprises two basic units connected in series. Obviously, in actual industrial applications, the number of basic units is not limited to two.
如图9所示，为本申请实施例提供的一种示例性的基本单元结构示意图，所述每个基本单元包括6个第一电阻、6个第二电阻、5个第一开关和6个第二开关。在实际工业应用中，每个基本单元的电阻数量和开关数量不仅仅局限于上述所列举的情况。 As shown in Figure 9, an exemplary basic unit structure diagram provided in an embodiment of the present application is provided, wherein each basic unit includes 6 first resistors, 6 second resistors, 5 first switches and 6 second switches. In actual industrial applications, the number of resistors and switches in each basic unit is not limited to the above-mentioned cases.
图9所示的6个第一电阻分别为第一电阻R1、第一电阻R2、第一电阻R3、第一电阻R4、第一电阻R5。6个第二电阻分别第二电阻R7、第二电阻R8、第二电阻R9、第二电阻R10、第二电阻R11、第二电阻R12。6个第一开关分别为第一开关M1、第一开关M2、第一开关M3、第一开关M4、第一开关M5、第一开关M6。以及6个第二开关分别为第二开关M7、第二开关M8、第二开关M9、第二开关M10、第二开关M11、第二开关M12。The six first resistors shown in FIG9 are respectively a first resistor R1, a first resistor R2, a first resistor R3, a first resistor R4, and a first resistor R5. The six second resistors are respectively a second resistor R7, a second resistor R8, a second resistor R9, a second resistor R10, a second resistor R11, and a second resistor R12. The six first switches are respectively a first switch M1, a first switch M2, a first switch M3, a first switch M4, a first switch M5, and a first switch M6. And the six second switches are respectively a second switch M7, a second switch M8, a second switch M9, a second switch M10, a second switch M11, and a second switch M12.
图9所示的5个第一开关M1至M5的第一端全都与基本单元的输入端A耦接，第二端分别耦接于相邻的第一电阻之间。如第一开关M1的第一端耦接于基本单元的输入端A，第一开关M1的第二端耦接于第一电阻R1和第一电阻R2之间的节点，同理，第一开关M2的第一端耦接于输入端A，第一开关M2的第二端耦接于第一电阻R2和第一电阻R3之间的节点，以此类推，第一开关M3、第一开关M4、第一开关M5的第一端均耦接于输入端A，第一开关M3的第二端耦接于第一电阻R3和第一电阻R4之间的节点，第一开关M4的第二端耦接于第一电阻R4和第一电阻R5之间的节点，第一开关M5的第二端耦接于第一电阻R5和第一电阻R6之间的节点。第一开关M6的第一端耦接于基本单元的输入端A，第一开关M6的第二端耦接于基本单元的输出端B。6个第二电阻与6个第二开关对应串联耦接于基本单元的输入端A与输出端B之间。第二电阻R7的第一端耦接于基本单元的输入端A，第二电阻R7的第二端与第二开关M7的第一端串联耦接，第二开关M7的第二端耦接于基本单元的输出端B。同理，第二电阻 R8的第二端与第二开关M8的第一端串联耦接，第二电阻R8的第一端与基本单元的输入端A耦接，第二开关M8的第二端与基本单元的输出端B耦接。以此类推，第二电阻R9与第二开关M9串联耦接于基本单元的输入端A与输出端B之间，第二电阻R10与第二开关M10串联耦接于基本单元的输入端A与输出端B之间，第二电阻R11与第二开关M11串联耦接于基本单元的输入端A与输出端B之间，第二电阻R12与第二开关M12串联耦接于基本单元的输入端A与输出端B之间。The first ends of the five first switches M1 to M5 shown in FIG9 are all coupled to the input end A of the basic unit, and the second ends are respectively coupled between adjacent first resistors. For example, the first end of the first switch M1 is coupled to the input end A of the basic unit, and the second end of the first switch M1 is coupled to the node between the first resistor R1 and the first resistor R2. Similarly, the first end of the first switch M2 is coupled to the input end A, and the second end of the first switch M2 is coupled to the node between the first resistor R2 and the first resistor R3. By analogy, the first ends of the first switch M3, the first switch M4, and the first switch M5 are all coupled to the input end A, the second end of the first switch M3 is coupled to the node between the first resistor R3 and the first resistor R4, the second end of the first switch M4 is coupled to the node between the first resistor R4 and the first resistor R5, and the second end of the first switch M5 is coupled to the node between the first resistor R5 and the first resistor R6. The first end of the first switch M6 is coupled to the input end A of the basic unit, and the second end of the first switch M6 is coupled to the output end B of the basic unit. The six second resistors and the six second switches are coupled in series between the input terminal A and the output terminal B of the basic unit. The first end of the second resistor R7 is coupled to the input terminal A of the basic unit, the second end of the second resistor R7 is coupled in series with the first end of the second switch M7, and the second end of the second switch M7 is coupled to the output terminal B of the basic unit. The second end of R8 is coupled in series with the first end of the second switch M8, the first end of the second resistor R8 is coupled to the input end A of the basic unit, and the second end of the second switch M8 is coupled to the output end B of the basic unit. Similarly, the second resistor R9 is coupled in series with the second switch M9 between the input end A and the output end B of the basic unit, the second resistor R10 is coupled in series with the second switch M10 between the input end A and the output end B of the basic unit, the second resistor R11 is coupled in series with the second switch M11 between the input end A and the output end B of the basic unit, and the second resistor R12 is coupled in series with the second switch M12 between the input end A and the output end B of the basic unit.
通过控制第一开关M1-M6和第二开关M7-M12的通断，改变这些电阻串并联的连接方式，从而组成各种各样不同的电路结构，整个基本单元的总阻值范围也随之进行相应的变化。示例的，通过控制第一开关M1-M5的通断，可以实现模块一中总阻值的变化。同理，通过控制第二开关M7-M12的通断，实现模块二的总阻值的变化。模块一的总阻值再与模块二的总阻值并联，作为基本单元的总阻值。By controlling the on and off of the first switch M1-M6 and the second switch M7-M12, the connection mode of these resistors in series and parallel is changed to form a variety of different circuit structures, and the total resistance range of the entire basic unit is also changed accordingly. For example, by controlling the on and off of the first switch M1-M5, the change of the total resistance in module one can be achieved. Similarly, by controlling the on and off of the second switch M7-M12, the change of the total resistance of module two is achieved. The total resistance of module one is then connected in parallel with the total resistance of module two as the total resistance of the basic unit.
示例的，当第二开关M7闭合，其他第二开关均断开时，通过依次闭合第一开关M1-M5，实现基本单元总阻值依次为1/2R,2/3R,3/4R,4/5R,5/6R,6/7R的阻值。当第一开关M5闭合，其他第一开关均断开时，通过控制第二开关M7-M12来改变并联的电阻数量，基本单元依次产生的总阻值为1/2R,1/3R,1/4R,1/5R,1/6R,1/7R。For example, when the second switch M7 is closed and the other second switches are open, the first switches M1-M5 are closed in sequence to achieve a total resistance of 1/2R, 2/3R, 3/4R, 4/5R, 5/6R, and 6/7R in sequence. When the first switch M5 is closed and the other first switches are open, the number of parallel resistors is changed by controlling the second switches M7-M12, and the total resistance of the basic unit is 1/2R, 1/3R, 1/4R, 1/5R, 1/6R, and 1/7R in sequence.
示例的，第一电阻R1-R6和第二电阻R7-R12的阻值大致相等，不仅在工艺上可以提高芯片的面积利用率，并且在第一开关M1-M6和第二开关M7-M12的控制下，使得基本单元的总阻值有规律的变化，便于控制。 For example, the resistance values of the first resistors R1-R6 and the second resistors R7-R12 are substantially equal, which not only improves the area utilization of the chip in terms of process, but also makes the total resistance value of the basic unit change regularly under the control of the first switches M1-M6 and the second switches M7-M12, which is easy to control.
示例的，第一调整电路703与第二调整电路704结构相同，阻值互补。第二调整电路704与参考地端耦接，第一调整电路703和第二调整电路704共同用于调整整个修调电路的总阻值，二者对应位置的阻值互补，即对应相同位置结构的电阻值之和为2R，其中R为单位电阻阻值。For example, the first adjustment circuit 703 and the second adjustment circuit 704 have the same structure and complementary resistance values. The second adjustment circuit 704 is coupled to the reference ground terminal, and the first adjustment circuit 703 and the second adjustment circuit 704 are used together to adjust the total resistance value of the entire adjustment circuit, and the resistance values of the corresponding positions of the two are complementary, that is, the sum of the resistance values of the corresponding structures at the same position is 2R, where R is the unit resistance value.
在实际工业生产中，基本单元中包括不同数量的单位电阻数N，可以获得不同的串并联网络，其可产生的阻值范围也将相应变化。推广本理论，使用2*N个单位电阻，便可以产生n/(n+1)*R和1/(n+1)*R中的任意阻值，其中N为任意正整数，而n是满足n≤N的任意正整数。In actual industrial production, the basic unit includes different numbers of unit resistors N, and different series-parallel networks can be obtained, and the resistance range that can be generated will also change accordingly. Extending this theory, using 2*N unit resistors, any resistance value between n/(n+1)*R and 1/(n+1)*R can be generated, where N is any positive integer, and n is any positive integer satisfying n≤N.
图10为上述方案中，调整电路总阻值的所有可能情况示意图。第一横排为模块803和模块804并联产生的所有阻值可能，作为表格的横坐标，第一纵列为模块801和模块802并联产生的所有阻值可能，作为表格的纵坐标。而表格中对应的数值便是：该点的横坐标电阻值与纵坐标电阻值对应串联而得到的最终阻值。由图可见，此产生值范围从0.2到2，并且在中心对称点1处分布紧密，在两端分布稀疏，改变基本单元的N值，此分布特性将保持不变。在实际应用中，我们往往不需要这样大的取值范围，且两端稀疏，并不利于通过微调电阻进行修调。FIG10 is a schematic diagram of all possible situations for adjusting the total resistance of the circuit in the above scheme. The first horizontal row is all possible resistance values generated by connecting modules 803 and 804 in parallel, which are used as the horizontal coordinate of the table, and the first vertical column is all possible resistance values generated by connecting modules 801 and 802 in parallel, which are used as the vertical coordinate of the table. The corresponding values in the table are: the final resistance value obtained by connecting the horizontal coordinate resistance value of the point in series with the vertical coordinate resistance value. As can be seen from the figure, the generated value range is from 0.2 to 2, and is densely distributed at the central symmetrical point 1, and sparsely distributed at both ends. This distribution characteristic will remain unchanged by changing the N value of the basic unit. In practical applications, we often do not need such a large range of values, and the sparseness at both ends is not conducive to adjustment by fine-tuning resistors.
因此，在图10所产生的阻值中，符合取值范围的非重复阻值被重点标出，按照大小排序依次可为：0.45R,0.47R,0.5R,0.53R,0.58R,0.64R,0.66R,0.7R,0.75R,0.8R,0.81R,0.83R,0.87R, 0.89R,0.92R,0.94R,0.95R,0.97R,R,1.03R,1.05R,1.06R,1.08R,1.11R,1.13R,1.17R,1.19R,1.2R,1.25R,1.3R,1.33R,1.36R,1.42R,1.47R,1.5R,1.52R,1.55R,共37种。Therefore, in the resistance values generated in Figure 10, the non-repetitive resistance values that meet the value range are highlighted, and the order of size is: 0.45R, 0.47R, 0.5R, 0.53R, 0.58R, 0.64R, 0.66R, 0.7R, 0.75R, 0.8R, 0.81R, 0.83R, 0.87R, 0.89R,0.92R,0.94R,0.95R,0.97R,R,1.03R,1.05R,1.06R,1.08R,1.11R,1.13R,1.17R,1.19R,1.2R,1.25R,1.3R,1.33R,1.36R,1.42R,1.47R,1.5R,1.52R,1.55R, 37 in total.
在实际应用中，通常不会使用上述所有阻值，这是基于下述几个考虑：In practical applications, not all of the above resistance values are usually used. This is based on the following considerations:
1、调节调整电阻时通常希望调节是线性化的，即最优步长与最差步长的差距尽量缩小，这样可以通过二分法调到需要的阻值，不用历遍每一个调整的阻值，从而减少调修需要的时间。1. When adjusting the resistor, it is usually hoped that the adjustment is linear, that is, the difference between the optimal step length and the worst step length is minimized as much as possible, so that the required resistance value can be adjusted by binary search without going through every adjusted resistance value, thereby reducing the time required for adjustment.
2、为了提高每一位数字控制信号的使用率，通常选取步长总数为2的倍数。2. In order to increase the utilization rate of each bit of digital control signal, the total number of steps is usually selected as a multiple of 2.
在本申请实施例中，由于最接近37的2次幂数为32，因此，我们可以选取其中的32个电阻取值，构成下述图11所示开关控制图。RT为基本单元的总电阻值，M1-M19对应为该阻值下，各个控制开关的通断情况。1代表该开关为闭合状态，0代表该开关为断开状态，X代表该开关的状态可闭合可断开。若想要得到某个特定的RT值的电阻，可以从表中找到该RT值对应的开关状态，根据开关状态拨动开关，从而快速调试调整电路的阻值。In the embodiment of the present application, since the power of 2 closest to 37 is 32, we can select 32 of the resistance values to form the switch control diagram shown in Figure 11 below. RT is the total resistance value of the basic unit, and M1-M19 corresponds to the on-off status of each control switch under this resistance value. 1 represents that the switch is in the closed state, 0 represents that the switch is in the open state, and X represents that the switch can be closed or opened. If you want to get a resistor with a specific RT value, you can find the switch state corresponding to the RT value from the table, and toggle the switch according to the switch state, so as to quickly debug and adjust the resistance value of the circuit.
以上所述，仅为本申请的具体实施方式，但本申请的保护范围并不局限于此，任何在本申请揭露的技术范围内的变化或替换，都应涵盖在本申请的保护范围之内。因此，本申请的保护范围应以所述权利要求的保护范围为准。 The above is only a specific implementation of the present application, but the protection scope of the present application is not limited thereto. Any changes or substitutions within the technical scope disclosed in the present application should be included in the protection scope of the present application. Therefore, the protection scope of the present application should be based on the protection scope of the claims.

Claims (6)

  1. 一种修调电路，其特征在于，所述电路包括：A trimming circuit, characterized in that the circuit comprises:
    运算放大器，所述运算放大器的同相输入端与带隙基准电压端耦接，所述运算放大器的反相输入端与所述运算放大器的输出端耦接，所述运算放大器的输出端还与第一调整电路的输入端耦接，所述运算放大器通过负反馈的方式，将所述带隙基准电压端的电平传输至所述第一调整电路；An operational amplifier, wherein a non-inverting input terminal of the operational amplifier is coupled to a bandgap reference voltage terminal, an inverting input terminal of the operational amplifier is coupled to an output terminal of the operational amplifier, and the output terminal of the operational amplifier is also coupled to an input terminal of a first adjustment circuit, and the operational amplifier transmits the level of the bandgap reference voltage terminal to the first adjustment circuit by means of negative feedback;
    所述第一调整电路的输出端与电阻网络的第一端耦接，所述第一调整电路包括多个基本单元，所述多个基本单元串联，所述多个基本单元中的每一个基本单元包括M个第一电阻、N个第二电阻、M-1个第一开关以及N个第二开关，M为大于1的整数，N为大于1的整数，所述M个第一电阻中每相邻的第一电阻之间均有一个节点，所述每个节点与所述基本单元的输入端之间均耦接一个所述第一开关；所述基本单元的输入端与输出端之间耦接N个并联的电阻支路，所述N个电阻支路中的每条电阻支路均包括串联耦接的所述第二开关和所述第二电阻。The output end of the first adjustment circuit is coupled to the first end of the resistor network. The first adjustment circuit includes a plurality of basic units, and the plurality of basic units are connected in series. Each of the plurality of basic units includes M first resistors, N second resistors, M-1 first switches and N second switches, where M is an integer greater than 1, and N is an integer greater than 1. There is a node between each adjacent first resistor among the M first resistors, and a first switch is coupled between each node and the input end of the basic unit; N parallel resistor branches are coupled between the input end and the output end of the basic unit, and each of the N resistor branches includes the second switch and the second resistor coupled in series.
    所述电阻网络的第二端与第二调整电路的输入端耦接，所述电阻网络包括多个参考电压输出端，所述多个参考电压输出端用于输出不同数值的参考电压；The second end of the resistor network is coupled to the input end of the second adjustment circuit, and the resistor network includes a plurality of reference voltage output ends, and the plurality of reference voltage output ends are used to output reference voltages of different values;
    所述第二调整电路与参考地电压端耦接，所述第一调整电路和所述第二调整电路用于调整所述电阻网络的总阻值。The second adjustment circuit is coupled to a reference ground voltage terminal, and the first adjustment circuit and the second adjustment circuit are used to adjust a total resistance value of the resistor network.
  2. 如权利要求1所述的修调电路，其特征在于，所述基本单元还 包括第三开关，所述第三开关耦接于所述基本单元的输入端和输出端之间。The trimming circuit according to claim 1, characterized in that the basic unit further A third switch is included, and the third switch is coupled between the input terminal and the output terminal of the basic unit.
  3. 如权利要求1至2任一项所述的修调电路，其特征在于，所述第一电阻和所述第二电阻的阻值相等。The trimming circuit according to any one of claims 1 to 2, characterized in that the resistance values of the first resistor and the second resistor are equal.
  4. 如权利要求1至3任一项所述的修调电路，其特征在于，所述第一调整电路与所述第二调整电路结构相同。The trimming circuit according to any one of claims 1 to 3, characterized in that the first trimming circuit and the second trimming circuit have the same structure.
  5. 一种芯片，其特征在于，包括权利要求1至4任一项所述的修调电路，电源电路；所述修调电路和所述电源电路耦接。A chip, characterized in that it comprises the trimming circuit and a power supply circuit as described in any one of claims 1 to 4; the trimming circuit and the power supply circuit are coupled.
  6. 一种电子设备，其特征在于，所述电子设备包括权利要求1至4任一项所述的修调电路和电路板；所述修调电路和所述电路板耦接。 An electronic device, characterized in that the electronic device comprises the trimming circuit and the circuit board according to any one of claims 1 to 4; the trimming circuit and the circuit board are coupled.
PCT/CN2023/096795 2022-11-10 2023-05-29 Trimming circuit, and chip and electronic device WO2024098726A1 (en)

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CN114814556A (en) * 2022-06-28 2022-07-29 苏州贝克微电子股份有限公司 Efficient integrated circuit chip trimming test circuit and test method
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Publication number Priority date Publication date Assignee Title
JP2007219856A (en) * 2006-02-16 2007-08-30 Toshiba Corp Constant voltage power source circuit
JP2009037372A (en) * 2007-08-01 2009-02-19 Fuji Electric Device Technology Co Ltd Constant current circuit and constant voltage circuit
CN105912059A (en) * 2016-05-23 2016-08-31 深圳创维－Rgb电子有限公司 Reference voltage regulating circuit and system of integrated circuit
CN208351358U (en) * 2018-05-11 2019-01-08 佛山华芯微特科技有限公司 A kind of precision voltage reference trims circuit
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CN115061525A (en) * 2022-07-12 2022-09-16 上海川土微电子有限公司 High-precision voltage correction circuit

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