WO2024082887A1 - Signal transceiving device, self-interference cancellation method, and computer readable storage medium - Google Patents

Signal transceiving device, self-interference cancellation method, and computer readable storage medium Download PDF

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Publication number
WO2024082887A1
WO2024082887A1 PCT/CN2023/118853 CN2023118853W WO2024082887A1 WO 2024082887 A1 WO2024082887 A1 WO 2024082887A1 CN 2023118853 W CN2023118853 W CN 2023118853W WO 2024082887 A1 WO2024082887 A1 WO 2024082887A1
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WIPO (PCT)
Prior art keywords
signal
analog
branch
transmitting
digital
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PCT/CN2023/118853
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French (fr)
Chinese (zh)
Inventor
张青青
王珊
段亚娟
王大鹏
张兴民
Original Assignee
中兴通讯股份有限公司
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Publication of WO2024082887A1 publication Critical patent/WO2024082887A1/en

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Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04B—TRANSMISSION
    • H04B1/00—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
    • H04B1/38—Transceivers, i.e. devices in which transmitter and receiver form a structural unit and in which at least one part is used for functions of transmitting and receiving
    • H04B1/40—Circuits
    • H04B1/50—Circuits using different frequencies for the two directions of communication
    • H04B1/52—Hybrid arrangements, i.e. arrangements for transition from single-path two-direction transmission to single-direction transmission on each of two paths or vice versa
    • H04B1/525—Hybrid arrangements, i.e. arrangements for transition from single-path two-direction transmission to single-direction transmission on each of two paths or vice versa with means for reducing leakage of transmitter signal into the receiver

Definitions

  • the present disclosure relates to the field of communication technology, and in particular to a signal transceiver device, a self-interference cancellation method, and a computer-readable storage medium.
  • the same-frequency simultaneous full-duplex technology refers to the wireless communication equipment realizing the transmission of signals in two directions on the same physical channel, that is, the transmitter and receiver of the wireless communication equipment use the same time and frequency resources to realize the reception and transmission of signals at the same time using the same frequency.
  • an embodiment of the present disclosure provides a signal transceiver device.
  • the signal transceiver device includes: one or more transmitting branches, the transmitting branches are used to process digital baseband signals and output analog transmitting signals; one or more receiving branches, the receiving branches are used to receive analog receiving signals; a reference signal generating circuit is coupled to the one or more transmitting branches and the one or more receiving branches respectively, the reference signal generating circuit is used to obtain the digital baseband signals of each transmitting branch, and couple to obtain the analog transmitting signals of the target transmitting branches in the one or more transmitting branches; based on the analog transmitting signals of the target transmitting branches and the digital baseband signals of each transmitting branch, a reference signal is obtained; the reference signal is output to the target receiving branch, and the reference signal is used to eliminate the interference of one or more transmitting branches to the target receiving branch.
  • the embodiment of the present disclosure provides a self-interference cancellation method.
  • the self-interference cancellation method includes: obtaining a digital baseband signal of each transmitting branch in one or more transmitting branches, and an analog transmitting signal of a target transmitting branch in one or more transmitting branches; obtaining a reference signal based on the analog transmitting signal and the digital baseband signal of each transmitting branch; and performing interference cancellation processing on the digital receiving signal of the target receiving branch in one or more receiving branches based on the reference signal to obtain a digital receiving signal after the interference cancellation processing.
  • an embodiment of the present disclosure provides a self-interference cancellation device.
  • the self-interference cancellation device includes: an acquisition unit and a processing unit; the acquisition unit is used to acquire the digital baseband signal of each transmission branch in at least one transmission branch, and the analog transmission signal of the target transmission branch in at least one transmission branch.
  • the processing unit is used to obtain a reference signal based on the analog transmission signal and the digital baseband signal of each transmission branch.
  • the processing unit is also used to perform interference cancellation processing on the digital reception signal of the target reception branch in one or more reception branches based on the reference signal to obtain the digital reception signal after the interference cancellation processing.
  • an embodiment of the present disclosure provides a computer-readable storage medium, which includes computer instructions; when the computer instructions are executed on a signal transceiver, the signal transceiver performs any self-interference cancellation method according to the further aspect.
  • an embodiment of the present disclosure provides a computer program product, which includes computer program instructions, and when the computer program instructions are executed by a processor, the self-interference cancellation method described in any of the above embodiments is implemented.
  • FIG1 is a schematic diagram of the structure of a signal transceiver system according to some embodiments.
  • FIG2 is a schematic structural diagram of a signal transceiver according to some embodiments.
  • FIG3 is a schematic structural diagram of another signal transceiver according to some embodiments.
  • FIG4 is a schematic structural diagram of another signal transceiver according to some embodiments.
  • FIG5 is a schematic structural diagram of another signal transceiver according to some embodiments.
  • FIG6 is a schematic structural diagram of another signal transceiver according to some embodiments.
  • FIG7 is a schematic flow chart of a self-interference cancellation method according to some embodiments.
  • FIG8 is a schematic structural diagram of a self-interference cancellation device according to some embodiments.
  • FIG9 is a schematic structural diagram of yet another self-interference cancellation device according to some embodiments.
  • first and second are used for descriptive purposes only and are not to be understood as indicating or implying relative importance or implicitly indicating the number of the indicated technical features.
  • a feature defined as “first” or “second” may explicitly or implicitly include one or more of the features.
  • module may refer to a portion of or include an application specific integrated circuit (ASIC); an electronic circuit; a combinational logic circuit; a field programmable gate array (FPGA); a processor (shared, dedicated, or grouped) that executes code; other suitable hardware components that provide the described functionality; or a combination of some or all of the above, such as in a system on a chip.
  • ASIC application specific integrated circuit
  • FPGA field programmable gate array
  • module may include a memory (shared, dedicated, or grouped) that stores code executed by a processor.
  • the same-frequency simultaneous full-duplex technology refers to the wireless communication equipment realizing the transmission of signals in two directions on the same physical channel, that is, the transmitter and receiver of the wireless communication equipment use the same time and frequency resources to realize the reception and transmission of signals at the same time using the same frequency.
  • a signal transceiver device including:
  • At least one transmitting branch for processing a digital baseband signal and outputting an analog transmitting signal
  • at least one receiving branch for receiving an analog receiving signal
  • a reference signal generating circuit respectively coupled to at least one transmitting branch and at least one receiving branch.
  • the reference signal generating circuit is used to obtain the digital baseband signal of each transmitting branch, and to couple to obtain the analog transmitting signal of a target transmitting branch in at least one transmitting branch.
  • a reference signal can be obtained based on the analog transmitting signal of the target transmitting branch and the digital baseband signals of each transmitting branch, and the reference signal is output to the target receiving branch.
  • the reference signal is used to eliminate the interference of at least one transmitting branch to the target receiving branch.
  • the reference signal generation circuit can obtain the channel characteristics of each transmission branch based on the analog transmission signal of each transmission branch.
  • the reference signal generation circuit can determine the transmission self-interference generated by the digital baseband signal of each transmission branch in at least one transmission branch when passing through the transmission branch based on the channel characteristics of each transmission branch, so as to obtain the reference signal with the analog transmission signal of the target transmission branch and the digital baseband signal of each transmission branch.
  • the reference signal generation circuit can output the reference signal to the target receiving branch to eliminate the background noise interference and nonlinear interference of at least one transmission branch to the target receiving branch, thereby improving the accuracy of the signal receiving and transmitting device in the same frequency simultaneous full-duplex working mode.
  • the signal transceiver device is suitable for a signal transceiver system.
  • FIG1 shows a structure of the signal transceiver system. As shown in FIG1 , the signal transceiver system includes: a signal transceiver device 101 and an electronic device 102. The signal transceiver device 101 is connected to the electronic device 102 for communication.
  • the signal transceiver 101 may also be connected to multiple electronic devices 102.
  • FIG1 takes the signal transceiver 101 connected to one electronic device 102 as an example for illustration.
  • the electronic device 102 is used to send an uplink signal to the signal transceiver 101, and to receive a downlink signal sent by the signal transceiver 101. Accordingly, the signal transceiver 101 is used to send a downlink signal to the electronic device 102, and to receive an uplink signal sent by the electronic device 102.
  • the signal transceiver system provided by the embodiments of the present disclosure can be applied to to-B scenarios under the fifth generation mobile communication technology (5th Generation Mobile Communication Technology, 5G) network, can also be applied to sixth generation mobile communication technology (6th Generation Mobile Communication Technology, 6G) scenarios, and can also be applied to other scenarios, which are not limited by the embodiments of the present disclosure.
  • 5G Fifth Generation Mobile Communication Technology
  • 6G sixth generation mobile communication technology
  • the electronic device 102 may be a terminal, a server, or other types of electronic devices, which is not limited in the embodiments of the present disclosure.
  • the electronic device 102 can be a user equipment (UE), a mobile phone, a tablet computer, a desktop computer, a laptop computer, a handheld computer, a notebook computer, an ultra-mobile personal computer (UMPC), a netbook, a cellular phone, a personal digital assistant (PDA), an augmented reality (AR)/virtual reality (VR) device, etc., which can install and use the content community application (Content Community Application).
  • UE user equipment
  • UMPC ultra-mobile personal computer
  • PDA personal digital assistant
  • AR augmented reality
  • VR virtual reality
  • the electronic device 102 can perform human-computer interaction with the user through one or more methods such as a keyboard, a touchpad, a touch screen, a remote controller, voice interaction, or a handwriting device.
  • the electronic device 102 may be a single server, or may be a server cluster composed of multiple servers. In some embodiments, the server cluster may also be a distributed cluster. The present disclosure does not limit the implementation of the server.
  • the signal transceiver device 101 may be a base station or a functional module in a base station.
  • the signal transceiver device 101 may be a receiver in a base station, or may be other types of signal transceiver devices, which are not covered in the embodiments of the present disclosure. To be limited.
  • the signal transceiver 101 When the signal transceiver 101 is a base station, the signal transceiver 101 may be a wireless communication base station or base station controller, etc.
  • the base station may be a base station under various network standards, and the embodiment of the present disclosure does not impose any limitation on this.
  • FIG2 is a schematic diagram of the structure of a signal transceiver device according to some embodiments.
  • the signal transceiver device includes: at least one transmitting branch 201 (FIG2 takes four transmitting branches as an example for explanation), at least one receiving branch 203 (FIG2 takes two receiving branches as an example for explanation), and a reference signal generating circuit 202.
  • the transmitting branch 201 is used to process the digital baseband signal and output an analog transmission signal. At least one transmitting branch 201 for transmitting the signal is deployed on the signal transceiver. At least one transmitting branch 201 can output an analog transmission signal in the transmission channel. After acquiring the digital baseband signal to be transmitted, the transmitting branch 201 can process the digital baseband signal to be transmitted through a digital-to-analog converter (DAC) and various frequency band processing modules (such as an intermediate frequency processing module, a radio frequency processing module, etc.), thereby obtaining an analog transmission signal, and outputting the analog transmission signal through a transmitting antenna.
  • DAC digital-to-analog converter
  • the receiving branch 203 is used to receive an analog receiving signal. At least one receiving branch 203 for receiving a signal is disposed on the signal transceiver. At least one receiving branch 203 can receive an analog receiving signal in a receiving channel. After receiving the analog receiving signal, the receiving branch 203 can process the received analog receiving signal through an analog to digital converter (ADC) and various processing modules (such as a sub-band filter, a radio frequency processing module, etc.), thereby obtaining a processed analog receiving signal, so as to eliminate the nonlinear interference signal in the processed analog receiving signal according to the reference signal.
  • ADC analog to digital converter
  • various processing modules such as a sub-band filter, a radio frequency processing module, etc.
  • the transmitting channel and receiving channel are in full-duplex mode during operation, with both transmitting and receiving turned on at the same time.
  • the reference signal generating circuit 202 is coupled to at least one transmitting branch 201 and at least one receiving branch 203 respectively.
  • the reference signal generating circuit 202 is used to obtain the digital baseband signal of each transmitting branch 201, and to couple to obtain the analog transmitting signal of the target transmitting branch in at least one transmitting branch 201; to obtain the reference signal based on the analog transmitting signal of the target transmitting branch and the digital baseband signal of each transmitting branch 201; and to output the reference signal to the target receiving branch, and the reference signal is used to eliminate the interference (including nonlinear interference and background noise interference) of at least one transmitting branch 201 to the target receiving branch.
  • the reference signal generating circuit 202 when the reference signal generating circuit 202 obtains the digital baseband signal of each transmitting branch in at least one transmitting branch 201, it can obtain the digital baseband signal of each transmitting branch in at least one transmitting branch 201 through a programmable array logic chip (Field Programmable Gate Array, FPGA).
  • a programmable array logic chip Field Programmable Gate Array, FPGA
  • FPGA is a programmable logic chip.
  • the operation and maintenance personnel can set the sampling points of the digital baseband signal in the chip.
  • the FPGA can directly collect the digital baseband signals of each transmission branch in at least one transmission branch in the digital domain based on the set sampling points.
  • a coupler may be disposed between the reference signal generating circuit and each transmitting branch in at least one transmitting branch 201.
  • the coupler may couple the analog transmitting signal in each transmitting branch 201 to the reference signal generating circuit 202.
  • the reference signal generating circuit 202 may couple the analog transmitting signal of each transmitting branch 201 from the output end of each transmitting branch 201.
  • the reference signal generating circuit 202 includes: a switch 301 , a self-interference extraction module 302 , and a reference signal generating module 303 .
  • the switch 301 is coupled to the output end of each transmitting branch in at least one transmitting branch 201.
  • the switch 301 is used to select a target transmitting branch and couple the analog transmitting signal of the target transmitting branch to the reference signal generating circuit 202.
  • the switch 301 may include a first drive circuit and a second drive circuit.
  • the first driving circuit receives the first control signal (VCTL1), and receives the second control signal (VCTL2) through the second driving circuit. Then, the switch 301 can control the conduction and shutdown between each coupler and the reference signal generating circuit in a time-sharing and polling manner according to the control signal level relationship between VCTL1 and VCTL2.
  • the switching switch 301 can turn on the link between the reference signal generating circuit 202 and the coupler deployed on the third transmitting branch, turn off the link between the reference signal generating circuit 202 and the coupler deployed on the first transmitting branch, turn off the link between the reference signal generating circuit 202 and the coupler deployed on the second transmitting branch, and turn off the link between the reference signal generating circuit 202 and the coupler deployed on the fourth transmitting branch.
  • the channel characteristics of the transmission channels corresponding to each transmission branch 201 may be different. Therefore, by controlling the on and off of each coupler and the reference signal generating circuit 202 in a time-sharing and polling manner, the channel characteristics of each transmission channel can be obtained respectively.
  • the switch 301 may be connected to the FPGA through a first driving circuit and a second driving circuit.
  • the FPGA may send VCTL1 and VCTL2 to the switch 301 through the first driving circuit and the second driving circuit.
  • the instruction received by the FPGA may be a sampling instruction, and the sampling instruction may be generated in response to a user operation.
  • the preset signal transceiver device includes four transmitting branches 201, and the switch 301 is a single-pole four-throw switch.
  • the switching switch 301 is used to: turn on the link between the reference signal generating circuit 202 and the coupler deployed on the first transmitting branch, turn off the link between the reference signal generating circuit 202 and the coupler deployed on the second transmitting branch, turn off the link between the reference signal generating circuit 202 and the coupler deployed on the third transmitting branch, and turn off the link between the reference signal generating circuit 202 and the coupler deployed on the fourth transmitting branch.
  • the switching switch 301 is used to: turn on the link between the reference signal generating circuit 202 and the coupler deployed on the second transmitting branch, turn off the link between the reference signal generating circuit 202 and the coupler deployed on the first transmitting branch, turn off the link between the reference signal generating circuit 202 and the coupler deployed on the third transmitting branch, and turn off the link between the reference signal generating circuit 202 and the coupler deployed on the fourth transmitting branch.
  • the switching switch 301 is used to: turn on the link between the reference signal generating circuit 202 and the coupler deployed on the third transmitting branch, turn off the link between the reference signal generating circuit 202 and the coupler deployed on the first transmitting branch, turn off the link between the reference signal generating circuit 202 and the coupler deployed on the second transmitting branch, and turn off the link between the reference signal generating circuit 202 and the coupler deployed on the fourth transmitting branch.
  • the switching switch 301 is used to: turn on the link between the reference signal generating circuit 202 and the coupler deployed on the fourth transmitting branch, turn off the link between the reference signal generating circuit 202 and the coupler deployed on the first transmitting branch, turn off the link between the reference signal generating circuit 202 and the coupler deployed on the second transmitting branch, and turn off the link between the reference signal generating circuit 202 and the coupler deployed on the third transmitting branch.
  • the switch 301 can select the target transmission branch by receiving VCTL1 and VCTL2 sent by the FPGA, and couple the analog transmission signal of the target transmission branch to the reference signal generating circuit 202 .
  • the reference signal generation circuit After coupling the analog transmission signal of the target transmission branch from the output end of the target transmission branch, the reference signal generation circuit It is also used to obtain a transmitted self-interference digital signal based on an analog transmitted signal of a target transmitting branch.
  • the switching switch 301 is coupled to the output end of each transmitting branch in at least one transmitting branch 201 and the self-interference extraction module 302 respectively.
  • the switching switch 301 is used to select the target transmitting branch and couple the analog transmission signal of the target transmitting branch to the self-interference extraction module 302.
  • the self-interference extraction module 302 is used to receive the analog transmission signal of the target transmission branch, process the analog transmission signal of the target transmission branch, and output a transmission self-interference digital signal.
  • the self-interference extraction module 302 includes: a first sub-band filter 302 - 1 , a first RF processing module 302 - 2 , and a first analog-to-digital conversion module 302 - 3 .
  • the first sub-band filter 302-1 is coupled to the switch 301.
  • the first sub-band filter 302-1 is used to receive the analog transmit signal of the target transmit branch, filter the analog transmit signal of the target transmit branch, and output the filtered analog transmit signal.
  • the first subband filter 302-1 in the self-interference extraction module 302 can filter the analog transmission signal of the target transmission branch, thereby outputting the filtered analog transmission signal.
  • the coupler deployed on the target transmission branch may first suppress a portion of the signal strength of the analog transmission signal of the target transmission branch when coupling the analog transmission signal of the target transmission branch to the switch 301. Then, the first subband filter 302-1 may filter the analog transmission signal coupled by the coupler to the switch 301, thereby outputting the filtered analog transmission signal.
  • the coupling degree range of the coupler may be [15dB, 30dB], and the signal strength suppression interval of the first sub-band filter 302-1 may be [25dB, 30dB].
  • Decibel (dB) is the signal strength, that is, the unit of signal strength is dBm.
  • dB is the ratio between two quantities, indicating the relative size between the two quantities, while dBm is a value indicating the absolute size of power.
  • the first RF processing module 302-2 is coupled to the first sub-band filter 302-1.
  • the first RF processing module 302-2 is used to receive the analog transmit signal after filtering, perform RF processing on the analog transmit signal after filtering, and output the analog transmit signal after RF processing.
  • the first analog-to-digital conversion module 302-3 is coupled to the first RF processing module 302-2 and is used to receive the analog transmit signal after RF processing, perform analog-to-digital conversion on the analog transmit signal after RF processing, and output a transmit self-interference digital signal.
  • the reference signal generation module 303 is coupled to the input end of each transmitting branch 201 in at least one transmitting branch 201, at least one receiving branch 203 and the self-interference extraction module 302 respectively, and the reference signal generation module 303 is used to obtain the transmitted self-interference digital signal and the digital baseband signal of each transmitting branch 201; obtain a reference signal based on the transmitted self-interference digital signal and the digital baseband signal of each transmitting branch 201; and output the reference signal to the target receiving branch.
  • the reference signal generation module 303 is used to obtain a reference signal based on the transmitted self-interference digital signal and the digital baseband signal of each transmitting branch 201; output the reference signal to the target receiving branch, including: performing gain adjustment and delay adjustment on the digital baseband signal of each transmitting branch 201, and obtaining the reference signal of each transmitting branch 201.
  • Processed digital baseband signal; based on the transmitted self-interference digital signal and the processed digital baseband signal of each transmitting branch 201, a reference signal is obtained.
  • the reference signal generation module 303 can respectively perform processing including gain adjustment and delay adjustment on the digital baseband signals of each transmitting branch 201, thereby obtaining digital baseband signals with similar channel characteristics, that is, the processed digital baseband signals of each transmitting branch.
  • the digital baseband signal with similar channel characteristics refers to the digital baseband signal processed by gain adjustment and delay adjustment, and has similar channel characteristics to the digital baseband signals of each transmission branch 201 .
  • gain adjustment refers to adjusting the amplitude of the digital baseband signal
  • delay adjustment refers to adjusting the delay of the digital baseband signal
  • the reference signal generating circuit 202 since the reference signal generating circuit 202 eliminates the nonlinear interference of at least one transmitting branch 201 to the target receiving branch based on the reference signal, in order to ensure that the amplitude and delay of the digital baseband signals of each transmitting branch 201 are similar to or the same as the amplitude and delay of the interference signal received by the target receiving branch, the reference signal generating module 303 can obtain the amplitude and delay of the interference signal received by the target receiving branch, and based on the amplitude and delay, perform processing including gain adjustment and delay adjustment on the digital baseband signals of each transmitting branch 201, thereby obtaining digital baseband signals with similar channel characteristics.
  • the preset signal transceiver device includes four transmitting branches 201, and the digital baseband signals of the four transmitting branches 201 are respectively: h 1 (n), h 2 (n), h 3 (n) and h 4 (n).
  • the amplitude of the interference signal received by the preset target receiving branch is G, and the delay is t
  • the reference signal generation module 303 processes the digital baseband signals of the four transmitting branches 201 respectively, including gain adjustment and delay adjustment, to obtain the processed digital baseband signals of the four transmitting branches 201, and these processed digital baseband signals are respectively: G 1 h 1 (nt 1 ), G 2 h 2 (nt 2 ), G 3 h 3 (nt 3 ) and G 4 h 4 (nt 4 ).
  • n represents a sampling point.
  • the difference between G 1 and G is less than the preset amplitude threshold, the difference between G 2 and G is less than the preset amplitude threshold, the difference between G 3 and G is less than the preset amplitude threshold, and the difference between G 4 and G is less than the preset amplitude threshold. That is to say, the values of G1 , G2 , G3 , and G4 are all close to or the same as G.
  • the difference between t1 and t is less than the preset delay threshold
  • the difference between t2 and t is less than the preset delay threshold
  • the difference between t3 and t is less than the preset delay threshold
  • the difference between t4 and t is less than the preset delay threshold.
  • the values of t1 , t2 , t3 , and t4 are all close to t or the same as t.
  • the reference signal calculated based on the processed digital baseband signals of the four transmitting branches 201 can be used to cancel the interference with the transmitted self-interference signal to obtain a signal close to the background noise of the target receiving branch, thereby eliminating the nonlinear interference of at least one transmitting branch 201 on the target receiving branch.
  • the reference signal generation module 303 can sum the processed digital baseband signals of each transmitting branch 201, and then convolve the summed value with the transmitted self-interference digital signal to obtain a reference signal.
  • r′(n) is the reference signal
  • r(n) is the transmitted self-interference digital signal
  • the reference signal generating module 303 outputs the reference signal to the target receiving branch.
  • the reference signal generation module 303 can output the reference signal to the target receiving branch so that the target The receiving branch performs interference cancellation processing on the digital receiving signal based on the reference signal, and outputs the digital receiving signal after the interference cancellation processing. Therefore, the link dynamics of the reference signal generating circuit provided in the embodiment of the present disclosure needs to be consistent with the link dynamics of the target receiving branch, or the link dynamics of the reference signal generating circuit is less than the link dynamics of the target receiving branch.
  • the link dynamics of the reference signal generation circuit and the link dynamics of the target reception branch satisfy the following formula.
  • the transmitting branch 201 includes: a digital-to-analog conversion module 304 , an intermediate frequency processing module 305 , and a third radio frequency processing module 306 .
  • the digital-to-analog conversion module 304 is used to perform digital-to-analog conversion on the digital baseband signal of the transmitting branch 201 and output an analog baseband signal.
  • the intermediate frequency processing module 305 is coupled to the digital-to-analog conversion module 304.
  • the intermediate frequency processing module 305 is used to receive an analog baseband signal, perform up-conversion processing on the analog baseband signal, and output an analog intermediate frequency signal.
  • the third RF processing module 306 is coupled to the IF processing module 305.
  • the third RF processing module 306 is used to receive an analog IF signal, perform RF processing on the analog IF signal, and output an analog transmit signal.
  • the receiving branch 203 includes: a second sub-band filter 307 , a second RF processing module 308 , a second analog-to-digital conversion module 309 and a digital cancellation module 310 .
  • the second sub-band filter 307 is used to filter the analog reception signal received by the receiving branch 203 and output the filtered analog reception signal.
  • the second RF processing module 308 is coupled to the second sub-band filter 307.
  • the second RF processing module 308 is used to receive the analog received signal after filtering, perform RF processing on the analog received signal after filtering, and output the analog received signal after RF processing.
  • the second analog-to-digital conversion module 309 is coupled to the second RF processing module 308.
  • the second analog-to-digital conversion module 309 is used to receive the analog received signal after RF processing, perform analog-to-digital conversion on the analog received signal after RF processing, and output a digital received signal.
  • the digital cancellation module 310 is coupled to the second analog-to-digital conversion module 309 and the reference signal generation module 303.
  • the digital cancellation module 310 is used to receive a reference signal, and based on the reference signal, perform interference cancellation processing on the digital received signal, and output the digital received signal after the interference cancellation processing.
  • the receiving branch 203 further includes an uplink demodulation module 311 .
  • the uplink demodulation module 311 can perform uplink demodulation on the digital received signal after the interference cancellation processing, so as to obtain a noise floor close to the target receiving branch itself.
  • the digital received signal after the interference cancellation processing is close to the noise floor of the target receiving branch itself.
  • the signal transceiver device can achieve self-interference cancellation of transceiver in the full-duplex mode where the transceiver and the receiver are turned on at the same time, thereby realizing the anti-interference of the signal transceiver device.
  • the preset reference signal is r′(n)
  • the digital received signal r 1 ′′(n) after the interference cancellation processing can be uplink demodulated to obtain a noise floor r 0 (n) close to the target receiving branch itself.
  • the digital received signal r 1 ′′(n) after the interference cancellation processing is close to the noise floor r 0 (n) of the target receiving branch itself.
  • the signal transceiver device can achieve the self-interference cancellation of transmission and reception in the full-duplex mode where transmission and reception are turned on at the same time, thereby achieving the anti-interference of the signal transceiver device. Disturbance.
  • an automatic gain control (AGC) module may be deployed in the signal transceiver.
  • the AGC module may automatically adjust the signal strength of the analog reception signal when it is determined that the signal strength of the received analog reception signal is greater than a first preset signal strength threshold, or less than a second preset signal strength threshold.
  • the second sub-band filter 307 needs to filter the signal strength of the analog received signal received by the receiving branch 203 to a preset signal strength range.
  • the minimum value of the preset signal strength range is greater than the second preset signal strength threshold; the maximum value of the preset signal strength range is less than the first preset signal strength threshold.
  • the signal transceiver device further includes at least one receiving antenna and at least one transmitting antenna, and the distance between the receiving antenna and the transmitting antenna is within a preset distance range.
  • At least one transmitting antenna is coupled to at least one transmitting branch in a one-to-one correspondence
  • at least one receiving antenna is coupled to at least one receiving branch in a one-to-one correspondence.
  • the receiving branch 203 when the receiving branch 203 receives the analog receiving signal, since the transmitting antenna of the transmitting branch 201 and the receiving antenna of the receiving branch have a certain spatial distance, based on this spatial distance, the signal strength of the analog transmitting signal transmitted by the transmitting antenna of the transmitting branch 201 will be attenuated to a certain extent in this spatial distance.
  • the signal transceiver device can combine the attenuation of signal strength in spatial distance and the second sub-band filter 307 to filter the analog reception signal received by the receiving branch 203 to ensure that the automatic gain control module does not automatically adjust the signal strength of the analog reception signal.
  • the signal strength of the analog transmission signal transmitted by the transmission branch 201 is generally 25dBm to 40dBm.
  • the distance between the receiving antenna and the transmitting antenna of the signal transceiver device can be adjusted to a preset distance range so that the spatial isolation between the receiving antenna and the transmitting antenna is 45dB to 55dB, and the filtering suppression degree of the second sub-band filter 307 is set to 25dB to 30dB.
  • the signal strength of the analog transmitted signal transmitted by the transmitting branch 201 is 25dBm
  • the spatial isolation degree formed by the distance between the receiving antenna and the transmitting antenna is 45dB
  • the filtering suppression degree of the second sub-band filter 307 is 25dB
  • the signal strength of the analog received signal after filtering output by the subband filter is -45dBm, which just ensures that the automatic gain control module does not automatically adjust the signal strength of the analog received signal, thereby avoiding the reduction in the accuracy of interference cancellation when the receiving branch 203 performs interference cancellation processing on the interference signal in the analog received signal.
  • FIG4 is a schematic diagram of the structure of another signal transceiver according to some embodiments.
  • the signal transceiver may include: a reference signal generating circuit, a transmitting branch and a receiving branch.
  • the relevant introduction of the reference signal generating circuit, the transmitting branch and the receiving branch can be referred to above, and the embodiments of the present disclosure are not repeated here.
  • the working process of the signal transceiver shown in FIG4 performing self-interference cancellation is introduced below.
  • the reference signal generating circuit can send a level signal to the two driving circuits of the switching switch 301 through the FPGA, thereby controlling the output of the transmitting branch.
  • the end and the first sub-band filter 302-1 are in a conducting state.
  • the reference signal generation circuit can obtain the analog transmission signal of the transmission branch through the coupler, and obtain the digital baseband signal of the transmission branch through the sampling point pre-set in the digital domain by the FPGA.
  • the coupling degree range of the coupler can be [15dB, 30dB].
  • the reference signal generating circuit may obtain a transmitted self-interference digital signal based on the analog transmitted signal of the transmitting branch, and obtain a reference signal using the transmitted self-interference digital signal and the digital baseband signals of each transmitting branch.
  • the reference signal generation module 303 in the reference signal generation circuit can perform processing including gain adjustment and delay adjustment on the digital baseband signal of the transmission branch to obtain the processed digital baseband signal of the transmission branch.
  • the first subband filter 302-1 in the reference signal generation circuit can receive the analog transmit signal of the transmit branch, filter the analog transmit signal of the transmit branch, and output the filtered analog transmit signal to the first RF processing module 302-2.
  • the first RF processing module 302-2 can perform RF processing on the filtered analog transmit signal, and output the RF-processed analog transmit signal to the first analog-to-digital conversion module 302-3.
  • the first analog-to-digital conversion module 302-3 performs analog-to-digital conversion on the RF-processed analog transmit signal, and outputs a transmitted self-interference digital signal.
  • the reference signal generation module 303 in the reference signal generation circuit may also obtain a reference signal based on the transmitted self-interference digital signal and the processed digital baseband signal of the transmitting branch, and output the reference signal to the receiving branch.
  • the receiving branch After receiving the analog reception signal, the receiving branch can perform radio frequency processing, filtering processing, and digital-to-analog conversion processing on the analog reception signal to obtain a processed analog reception signal. Furthermore, the receiving branch can perform self-interference cancellation based on the received reference signal and the processed analog reception signal, and output a digital reception signal after interference cancellation processing, thereby eliminating the nonlinear interference of the transmitting branch to the receiving branch.
  • the second subband filter 307 in the receiving branch may filter the analog received signal received by the receiving branch, and output the filtered analog received signal to the second RF processing module 308.
  • the second RF processing module 308 may perform RF processing on the filtered analog received signal, and output the RF-processed analog received signal to the second analog-to-digital conversion module 309.
  • the second analog-to-digital conversion module 309 may perform analog-to-digital conversion on the RF-processed analog received signal, and output the digital received signal to the digital cancellation module 310.
  • the digital cancellation module 310 may perform interference cancellation processing on the digital received signal based on the reference signal, and output the interference-cancelled digital received signal.
  • FIG5 is a schematic diagram of the structure of another signal transceiver according to some embodiments.
  • the signal transceiver may be a 4-transmit 4-receive anti-interference receiver.
  • the signal transceiver may include: a reference signal generation circuit, four transmitting branches and four receiving branches.
  • the relevant introduction of the reference signal generation circuit, the transmitting branch and the receiving branch can be referred to above and will not be repeated here.
  • the working process of the signal transceiver shown in FIG5 for self-interference cancellation is introduced below.
  • the reference signal generating circuit can send different level signals to the two driving circuits of the switching switch 301 through the FPGA in a time-sharing manner, thereby controlling the output end of any transmitting branch to be in a time-sharing and conductive state with the first sub-band filter 302-1.
  • the switch 301 can control the output end of the first transmission branch and the first sub-band filter 302-1 to be in a conducting state.
  • the output end of the second transmission branch, the output end of the third transmission branch, the output end of the fourth transmission branch and the first sub-band filter 302-1 are all in a closed state.
  • the reference signal generating circuit can obtain the analog transmission signal of the first transmission branch through the coupler. And through the sampling points pre-set in the digital domain by FPGA, the digital baseband signals of the four transmitting branches are obtained.
  • the reference signal generating circuit can obtain a transmitted self-interference digital signal based on the analog transmit signal of the first transmit branch, obtain a reference signal with the transmitted self-interference digital signal and the digital baseband signals of each transmit branch, and output the reference signal to the first receiving branch.
  • the first receiving branch After receiving the analog received signal, the first receiving branch can perform radio frequency processing, filtering and digital-to-analog conversion on the analog received signal, thereby obtaining a processed analog received signal. Furthermore, the first receiving branch can perform self-interference cancellation based on the received reference signal and the processed analog received signal, and output a digital received signal after interference cancellation, thereby eliminating the nonlinear interference of the four transmitting branches on the first receiving branch.
  • the switching switch 301 can control the output end of the second transmitting branch and the first sub-band filter 302-1 to be in a conducting state.
  • the output end of the first transmitting branch, the output end of the third transmitting branch, the output end of the fourth transmitting branch and the first sub-band filter 302-1 are all in a closed state.
  • the reference signal generating circuit can obtain the analog transmit signal of the second transmit branch through the coupler, and obtain the digital baseband signals of the four transmit branches through the sampling points pre-set in the digital domain by the FPGA.
  • the reference signal generating circuit can obtain a transmitted self-interference digital signal based on the analog transmit signal of the second transmit branch, obtain a reference signal with the transmitted self-interference digital signal and the digital baseband signals of each transmit branch, and output the reference signal to the second receiving branch.
  • the second reception branch After receiving the analog reception signal, the second reception branch can perform radio frequency processing, filtering processing, and digital-to-analog conversion processing on the analog reception signal, thereby obtaining a processed analog reception signal. Furthermore, the second reception branch can perform self-interference cancellation based on the received reference signal and the processed analog reception signal, and output a digital reception signal after interference cancellation processing, thereby eliminating the nonlinear interference of the four transmission branches on the second reception branch.
  • the switching switch 301 can control the output end of the third transmitting branch and the first sub-band filter 302-1 to be in a conducting state.
  • the output end of the first transmitting branch, the output end of the second transmitting branch, the output end of the fourth transmitting branch and the first sub-band filter 302-1 are all in a closed state.
  • the reference signal generating circuit can obtain the analog transmit signal of the third transmit branch through the coupler, and obtain the digital baseband signals of the four transmit branches through the sampling points pre-set in the digital domain by the FPGA.
  • the reference signal generating circuit can obtain a transmitted self-interference digital signal based on the analog transmit signal of the third transmit branch, obtain a reference signal with the transmitted self-interference digital signal and the digital baseband signals of each transmit branch, and output the reference signal to the third receiving branch.
  • the third receiving branch After receiving the analog received signal, the third receiving branch can perform radio frequency processing, filtering processing, and digital-to-analog conversion processing on the analog received signal, thereby obtaining a processed analog received signal. Furthermore, the third receiving branch can perform self-interference cancellation based on the received reference signal and the processed analog received signal, and output a digital received signal after interference cancellation processing, thereby eliminating the nonlinear interference of the four transmitting branches on the third receiving branch.
  • the switching switch 301 can control the output end of the fourth transmitting branch and the first sub-band filter 302-1 to be in a conducting state.
  • the output end of the first transmitting branch, the output end of the second transmitting branch, the output end of the third transmitting branch and the first sub-band filter 302-1 are all in a closed state.
  • the reference signal generating circuit can obtain the analog transmit signal of the fourth transmit branch through the coupler, and obtain the digital baseband signals of the four transmit branches through the sampling points pre-set in the digital domain by the FPGA.
  • the reference signal generating circuit can obtain a transmitted self-interference digital signal based on the analog transmit signal of the fourth transmit branch, obtain a reference signal with the transmitted self-interference digital signal and the digital baseband signals of each transmit branch, and output the reference signal to the fourth receiving branch.
  • the fourth receiving branch After receiving the analog received signal, the fourth receiving branch can perform radio frequency processing, filtering processing, and digital-to-analog conversion processing on the analog received signal, thereby obtaining a processed analog received signal. Further, the fourth receiving branch can perform self-interference cancellation based on the received reference signal and the processed analog received signal, and output a digital received signal after interference cancellation processing, thereby eliminating the nonlinear interference of the four transmitting branches on the fourth receiving branch.
  • FIG6 is a schematic diagram of the structure of another signal transceiver according to some embodiments.
  • the signal transceiver may include: a reference signal generation circuit, four transmission branches and one receiving branch.
  • the relevant introduction of the reference signal generation circuit, the transmission branch and the receiving branch can be referred to above, and will not be repeated here.
  • the reference signal generating circuit can send different level signals to the two driving circuits of the switching switch 301 through the FPGA in a time-sharing manner, thereby controlling the output end of any transmitting branch to be in a time-sharing and on state with the first sub-band filter 302-1.
  • the switch 301 can control the output end of the first transmission branch and the first sub-band filter 302-1 to be in a conducting state.
  • the output end of the second transmission branch, the output end of the third transmission branch, the output end of the fourth transmission branch and the first sub-band filter 302-1 are all in a closed state.
  • the reference signal generating circuit can obtain the analog transmit signal of the first transmit branch through the coupler, and obtain the digital baseband signals of the four transmit branches through the sampling points pre-set in the digital domain by the FPGA.
  • the reference signal generating circuit can obtain a transmitted self-interference digital signal based on the analog transmit signal of the first transmit branch, obtain a reference signal with the transmitted self-interference digital signal and the digital baseband signals of each transmit branch, and output the reference signal to the receiving branch.
  • the receiving branch After receiving the analog reception signal, the receiving branch can perform radio frequency processing, filtering processing, and digital-to-analog conversion processing on the analog reception signal to obtain a processed analog reception signal. Furthermore, the receiving branch can perform self-interference cancellation based on the received reference signal and the processed analog reception signal, and output a digital reception signal after interference cancellation processing, thereby eliminating the nonlinear interference of the four transmitting branches on the receiving branch.
  • the switching switch 301 can control the output end of the second transmitting branch and the first sub-band filter 302-1 to be in a conducting state.
  • the output end of the first transmitting branch, the output end of the third transmitting branch, the output end of the fourth transmitting branch and the first sub-band filter 302-1 are all in a closed state.
  • the reference signal generating circuit can obtain the analog transmit signal of the second transmit branch through the coupler, and obtain the digital baseband signals of the four transmit branches through the sampling points pre-set in the digital domain by the FPGA.
  • the reference signal generating circuit can obtain a transmitted self-interference digital signal based on the analog transmit signal of the second transmit branch, obtain a reference signal with the transmitted self-interference digital signal and the digital baseband signals of each transmit branch, and output the reference signal to the receiving branch.
  • the receiving branch After receiving the analog reception signal, the receiving branch can perform radio frequency processing, filtering and The digital-to-analog conversion process is performed to obtain a processed analog receiving signal. Furthermore, the receiving branch can perform self-interference cancellation according to the received reference signal and the processed analog receiving signal, and output a digital receiving signal after interference cancellation processing, thereby eliminating the nonlinear interference of the four transmitting branches to the receiving branch.
  • the switching switch 301 can control the output end of the third transmitting branch and the first sub-band filter 302-1 to be in a conducting state.
  • the output end of the first transmitting branch, the output end of the second transmitting branch, the output end of the fourth transmitting branch and the first sub-band filter 302-1 are all in a closed state.
  • the reference signal generating circuit can obtain the analog transmit signal of the third transmit branch through the coupler, and obtain the digital baseband signals of the four transmit branches through the sampling points pre-set in the digital domain by the FPGA.
  • the reference signal generating circuit can obtain a transmitted self-interference digital signal based on the analog transmit signal of the third transmit branch, obtain a reference signal with the transmitted self-interference digital signal and the digital baseband signals of each transmit branch, and output the reference signal to the receiving branch.
  • the receiving branch After receiving the analog received signal, the receiving branch can perform radio frequency processing, filtering processing, and digital-to-analog conversion processing on the analog received signal to obtain a processed analog received signal. Furthermore, the receiving branch can perform self-interference cancellation based on the received reference signal and the processed analog received signal, and output a digital received signal after interference cancellation processing, thereby eliminating the nonlinear interference and background noise interference of the four transmitting branches on the receiving branch.
  • the switch 301 can control the output end of the fourth transmission branch and the first sub-band filter 302-1 to be in a conducting state.
  • the output end of the first transmission branch, the output end of the second transmission branch, the output end of the third transmission branch and the first sub-band filter 302-1 are all in a closed state.
  • the reference signal generation circuit can obtain the analog transmission signal of the fourth transmission branch through the coupler, and obtain the digital baseband signals of the four transmission branches through the sampling points pre-set in the digital domain by the FPGA.
  • the reference signal generating circuit can obtain a transmitted self-interference digital signal based on the analog transmit signal of the fourth transmit branch, obtain a reference signal with the transmitted self-interference digital signal and the digital baseband signals of each transmit branch, and output the reference signal to the receiving branch.
  • the receiving branch After receiving the analog reception signal, the receiving branch can perform radio frequency processing, filtering processing, and digital-to-analog conversion processing on the analog reception signal to obtain a processed analog reception signal. Furthermore, the receiving branch can perform self-interference cancellation based on the received reference signal and the processed analog reception signal, and output a digital reception signal after interference cancellation processing, thereby eliminating the nonlinear interference of the four transmitting branches on the receiving branch.
  • the embodiment of the present disclosure also provides a self-interference cancellation method.
  • the self-interference cancellation method can be applied to any one of the signal transceiver devices in Figures 2 to 6.
  • the self-interference cancellation method includes the following steps.
  • a signal transceiver device obtains a digital baseband signal of each transmitting branch in one or more transmitting branches, and an analog transmitting signal of a target transmitting branch in one or more transmitting branches.
  • the signal transceiver device can obtain the digital baseband signal of each transmitting branch in at least one transmitting branch based on the FPGA, and obtain the analog transmission signal of the target transmitting branch in at least one transmitting branch based on the coupler coupling.
  • the signal transceiver obtains a reference signal based on the analog transmit signal and the digital baseband signals of each transmit branch.
  • the method for obtaining a reference signal by a signal transceiver based on an analog transmit signal and a digital baseband signal of each transmit branch includes: the signal transceiver generates a transmitted self-interference digital signal based on the analog transmit signal of the target transmit branch. Then, the signal transceiver generates a reference signal based on the transmitted self-interference digital signal and the digital baseband signal of each transmit branch.
  • a method for a signal transceiver to generate a transmitted self-interference digital signal based on an analog transmit signal of a target transmit branch includes: filtering the analog transmit signal of the target transmit branch to obtain a filtered analog transmit signal; performing radio frequency processing on the filtered analog transmit signal to obtain a radio frequency processed analog transmit signal; and performing analog-to-digital conversion on the radio frequency processed analog transmit signal to obtain a transmitted self-interference digital signal.
  • a method for a signal transceiver to generate a reference signal based on a transmitted self-interference digital signal and a digital baseband signal of each transmitting branch includes: the signal transceiver performs processing including gain adjustment and delay adjustment on the digital baseband signal of each transmitting branch to obtain a processed digital baseband signal of each transmitting branch; and a reference signal is generated based on the transmitted self-interference digital signal and the processed digital baseband signal of each transmitting branch.
  • the signal transceiver performs interference cancellation processing on a digital received signal of a target receiving branch in one or more receiving branches based on the reference signal to obtain a digital received signal after the interference cancellation processing.
  • the signal transceiver device can perform interference cancellation processing on the digital receiving signal of the target receiving branch in at least one receiving branch based on the digital cancellation module in the receiving branch and based on the reference signal to obtain a digital receiving signal after interference cancellation processing.
  • the self-interference cancellation device includes hardware structures and/or software modules corresponding to the execution of each function.
  • the present disclosure can be implemented in the form of hardware or a combination of hardware and computer software. Whether a function is executed in the form of hardware or computer software driving hardware depends on the specific application and design constraints of the technical solution. Professional and technical personnel can use different methods to implement the described functions for each specific application, but such implementation should not be considered to be beyond the scope of the present disclosure.
  • the disclosed embodiment can divide the self-interference cancellation device into functional modules according to the above method embodiment.
  • each functional module can be divided corresponding to each function, or two or more functions can be integrated into one functional module.
  • the above integrated module can be implemented in the form of hardware or software. It should be noted that the division of modules in the disclosed embodiment is schematic and is only a logical function division. There may be other division methods in actual implementation. The following is an example of dividing each functional module corresponding to each function.
  • FIG8 is a schematic diagram of the structure of a self-interference cancellation device according to some embodiments.
  • the self-interference cancellation device can execute the self-interference cancellation method provided by the above method embodiment.
  • FIG8 is a self-interference cancellation device according to some embodiments, which is used to execute the self-interference cancellation method shown in FIG7.
  • the self-interference cancellation device includes: an acquisition unit 801 and a processing unit 802.
  • the acquisition unit 801 is used to acquire the digital baseband signal of each of the one or more transmission branches and the analog transmission signal of the target transmission branch of at least one transmission branch. For example, in conjunction with FIG7 , the acquisition unit 801 is used to execute S701.
  • the processing unit 802 is configured to obtain a reference signal based on the analog transmission signal and the digital baseband signal of each transmission branch. For example, in conjunction with FIG7 , the processing unit 802 is configured to execute S702.
  • the processing unit 802 is further configured to perform interference cancellation processing on the digital received signal of the target receiving branch in one or more receiving branches based on the reference signal to obtain a digital received signal after the interference cancellation processing. 802 is used to execute S703.
  • the processing unit 802 is configured to:
  • a reference signal is generated based on the transmitted self-interference digital signal and the digital baseband signals of each transmit branch.
  • the processing unit 802 is configured to:
  • a reference signal is generated based on the transmitted self-interference digital signal and the processed digital baseband signals of each transmit branch.
  • the processing unit 802 is configured to:
  • the analog transmission signal after RF processing is subjected to analog-to-digital conversion processing to obtain a transmission self-interference digital signal.
  • the embodiment of the present disclosure provides another structure of the self-interference cancellation device involved in the above-mentioned embodiment.
  • the self-interference cancellation device 900 includes: a processor 902 and a bus 904.
  • the self-interference cancellation device may also include a memory 901.
  • the self-interference cancellation device may also include a communication interface 903.
  • the processor 902 may be a processor that implements or executes various exemplary logic blocks, modules, and circuits described in conjunction with the embodiments of the present disclosure.
  • the processor 902 may be a central processing unit, a general-purpose processor, a digital signal processor, an application-specific integrated circuit, a field programmable gate array, or other programmable logic devices, transistor logic devices, hardware components, or any combination thereof.
  • the processor 902 may be a processor that implements or executes various exemplary logic blocks, modules, and circuits described in conjunction with the embodiments of the present disclosure.
  • the processor 902 may also be a combination that implements computing functions, such as a combination of one or more microprocessors, a combination of a DSP and a microprocessor, and the like.
  • the communication interface 903 is used to connect with other devices through a communication network.
  • the communication network can be Ethernet, wireless access network, wireless local area network (WLAN), etc.
  • the memory 901 may be a read-only memory (ROM) or other types of static storage devices that can store static information and instructions, a random access memory (RAM) or other types of dynamic storage devices that can store information and instructions, or an electrically erasable programmable read-only memory (EEPROM), a disk storage medium or other magnetic storage device, or any other medium that can be used to carry or store the desired program code in the form of instructions or data structures and can be accessed by a computer, but is not limited to these.
  • ROM read-only memory
  • RAM random access memory
  • EEPROM electrically erasable programmable read-only memory
  • disk storage medium or other magnetic storage device or any other medium that can be used to carry or store the desired program code in the form of instructions or data structures and can be accessed by a computer, but is not limited to these.
  • the memory 901 may exist independently of the processor 902, and the memory 901 may also be connected to the processor 902 via a bus 904 for storing instructions or program codes.
  • the processor 902 calls and executes the instructions or program codes stored in the memory 901, the self-interference cancellation method provided in the embodiment of the present disclosure can be implemented.
  • the memory 901 may also be integrated with the processor 902 .
  • the bus 904 may be an Extended Industry Standard Architecture (EISA) bus, etc.
  • EISA Extended Industry Standard Architecture
  • the bus 904 may be divided into an address bus, a data bus, a control bus, etc.
  • FIG9 only uses one thick line, but does not mean that there is only one bus or one type of bus.
  • Some embodiments of the present disclosure provide a computer-readable storage medium (eg, a non-transitory computer-readable storage medium),
  • the computer-readable storage medium stores computer program instructions.
  • the computer program instructions When the computer program instructions are executed on a computer, the computer executes the self-interference cancellation method as described in any of the above embodiments.
  • the above-mentioned computer-readable storage media may include, but are not limited to: magnetic storage devices (e.g., hard disks, floppy disks or magnetic tapes, etc.), optical disks (e.g., Compact Disks (CDs), Digital Versatile Disks (DVDs), etc.), smart cards and flash memory devices (e.g., Erasable Programmable Read-Only Memory (EPROMs), cards, sticks or key drives, etc.).
  • the various computer-readable storage media described in the present disclosure may represent one or more devices and/or other machine-readable storage media for storing information.
  • the term "machine-readable storage medium" may include, but is not limited to, wireless channels and various other media capable of storing, containing and/or carrying instructions and/or data.
  • An embodiment of the present disclosure provides a computer program product comprising instructions.
  • the computer program product When the computer program product is run on a computer, the computer is enabled to execute the self-interference cancellation method described in any one of the above embodiments.

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Abstract

Provided are a signal transceiving device, a self-interference cancellation method, and a computer readable storage medium. The signal transceiving device comprises: one or more transmitting branches for processing a digital baseband signal and outputting an analog transmitting signal; one or more receiving branches for receiving an analog receiving signal; and a reference signal generation circuit respectively coupled to the one or more transmitting branches and the one or more receiving branches, the reference signal generation circuit being used for acquiring the digital baseband signal of each transmitting branch and coupling from an output end of a target transmitting branch to obtain an analog transmitting signal of the target transmitting branch; obtaining a reference signal on the basis of the analog transmitting signal of the target transmitting branch and the digital baseband signal of each transmitting branch; and outputting the reference signal to a target receiving branch, wherein the reference signal is used for eliminating the interference of the one or more transmitting branches on the target receiving branch.

Description

信号收发装置、自干扰抵消方法以及计算机可读存储介质Signal transceiver, self-interference cancellation method, and computer-readable storage medium
本公开要求于2022年10月17日提交的、申请号为202211266837.1的中国专利申请的优先权，其全部内容通过引用结合在本申请中。This disclosure claims priority to Chinese patent application No. 202211266837.1, filed on October 17, 2022, the entire contents of which are incorporated by reference into this application.
技术领域Technical Field
本公开涉及通信技术领域，尤其涉及一种信号收发装置、自干扰抵消方法以及计算机可读存储介质。The present disclosure relates to the field of communication technology, and in particular to a signal transceiver device, a self-interference cancellation method, and a computer-readable storage medium.
背景技术Background technique
同频同时全双工技术是指无线通信设备在同一个物理信道上实现两个方向信号的传输，即无线通信设备的发送机和接收机使用相同的时间和频率资源，实现在相同的时间使用相同的频率来接收和发送信号。The same-frequency simultaneous full-duplex technology refers to the wireless communication equipment realizing the transmission of signals in two directions on the same physical channel, that is, the transmitter and receiver of the wireless communication equipment use the same time and frequency resources to realize the reception and transmission of signals at the same time using the same frequency.
发明内容Summary of the invention
一方面，本公开实施例提供一种信号收发装置。该信号收发装置包括：一个或多个发射支路，发射支路用于对数字基带信号进行处理，输出模拟发射信号；一个或多个接收支路，接收支路用于接收模拟接收信号；参考信号生成电路与一个或多个发射支路、一个或多个接收支路分别耦接，参考信号生成电路用于获取各个发射支路的数字基带信号，以及耦合得到一个或多个发射支路中目标发射支路的模拟发射信号；基于目标发射支路的模拟发射信号以及各个发射支路的数字基带信号，得到参考信号；将参考信号输出至目标接收支路，参考信号用于消除一个或多个发射支路对目标接收支路的干扰。On the one hand, an embodiment of the present disclosure provides a signal transceiver device. The signal transceiver device includes: one or more transmitting branches, the transmitting branches are used to process digital baseband signals and output analog transmitting signals; one or more receiving branches, the receiving branches are used to receive analog receiving signals; a reference signal generating circuit is coupled to the one or more transmitting branches and the one or more receiving branches respectively, the reference signal generating circuit is used to obtain the digital baseband signals of each transmitting branch, and couple to obtain the analog transmitting signals of the target transmitting branches in the one or more transmitting branches; based on the analog transmitting signals of the target transmitting branches and the digital baseband signals of each transmitting branch, a reference signal is obtained; the reference signal is output to the target receiving branch, and the reference signal is used to eliminate the interference of one or more transmitting branches to the target receiving branch.
再一方面，本公开实施例提供一种自干扰抵消方法。该自干扰抵消方法包括：获取一个或多个发射支路中各个发射支路的数字基带信号，以及一个或多个发射支路中目标发射支路的模拟发射信号；基于模拟发射信号以及各个发射支路的数字基带信号，得到参考信号；基于参考信号，对一个或多个接收支路中的目标接收支路的数字接收信号进行干扰抵消处理，得到干扰抵消处理后的数字接收信号。On the other hand, the embodiment of the present disclosure provides a self-interference cancellation method. The self-interference cancellation method includes: obtaining a digital baseband signal of each transmitting branch in one or more transmitting branches, and an analog transmitting signal of a target transmitting branch in one or more transmitting branches; obtaining a reference signal based on the analog transmitting signal and the digital baseband signal of each transmitting branch; and performing interference cancellation processing on the digital receiving signal of the target receiving branch in one or more receiving branches based on the reference signal to obtain a digital receiving signal after the interference cancellation processing.
又一方面，本公开实施例提供一种自干扰抵消装置。该自干扰抵消装置包括：获取单元和处理单元；获取单元，用于获取至少一个发射支路中各个发射支路的数字基带信号，以及至少一个发射支路中目标发射支路的模拟发射信号。处理单元，用于基于模拟发射信号以及各个发射支路的数字基带信号，得到参考信号。处理单元，还用于基于参考信号，对一个或多个接收支路中的目标接收支路的数字接收信号进行干扰抵消处理，得到干扰抵消处理后的数字接收信号。On the other hand, an embodiment of the present disclosure provides a self-interference cancellation device. The self-interference cancellation device includes: an acquisition unit and a processing unit; the acquisition unit is used to acquire the digital baseband signal of each transmission branch in at least one transmission branch, and the analog transmission signal of the target transmission branch in at least one transmission branch. The processing unit is used to obtain a reference signal based on the analog transmission signal and the digital baseband signal of each transmission branch. The processing unit is also used to perform interference cancellation processing on the digital reception signal of the target reception branch in one or more reception branches based on the reference signal to obtain the digital reception signal after the interference cancellation processing.
又一方面，本公开实施例提供一种计算机可读存储介质。该计算机可读存储介质包括计算机指令；当计算机指令在信号收发装置上运行时，使得信号收发装置执行如再一方面任一项的自干扰抵消方法。In another aspect, an embodiment of the present disclosure provides a computer-readable storage medium, which includes computer instructions; when the computer instructions are executed on a signal transceiver, the signal transceiver performs any self-interference cancellation method according to the further aspect.
又一方面，本公开实施例提供一种计算机程序产品。该计算机程序产品包括计算机程序指令，该计算机程序指令被处理器执行时实现上述任一实施例所述的自干扰抵消方法。In another aspect, an embodiment of the present disclosure provides a computer program product, which includes computer program instructions, and when the computer program instructions are executed by a processor, the self-interference cancellation method described in any of the above embodiments is implemented.
附图说明BRIEF DESCRIPTION OF THE DRAWINGS
为了更清楚地说明本申请中的技术方案，下面将对本申请一些实施例中所需要使用的附图作简单地介绍，显而易见地，下面描述中的附图仅仅是本申请的一些实施例的附图，对于本领 域普通技术人员来讲，还可以根据这些附图获得其他的附图。In order to more clearly illustrate the technical solution in the present application, the following briefly introduces the drawings required to be used in some embodiments of the present application. Obviously, the drawings described below are only drawings of some embodiments of the present application. For those skilled in the art, other drawings can be obtained based on these drawings.
图1为根据一些实施例的一种信号收发***的结构示意图；FIG1 is a schematic diagram of the structure of a signal transceiver system according to some embodiments;
图2为根据一些实施例的一种信号收发装置的结构示意图；FIG2 is a schematic structural diagram of a signal transceiver according to some embodiments;
图3为根据一些实施例的又一种信号收发装置的结构示意图；FIG3 is a schematic structural diagram of another signal transceiver according to some embodiments;
图4为根据一些实施例的又一种信号收发装置的结构示意图；FIG4 is a schematic structural diagram of another signal transceiver according to some embodiments;
图5为根据一些实施例的又一种信号收发装置的结构示意图；FIG5 is a schematic structural diagram of another signal transceiver according to some embodiments;
图6为根据一些实施例的又一种信号收发装置的结构示意图；FIG6 is a schematic structural diagram of another signal transceiver according to some embodiments;
图7为根据一些实施例的一种自干扰抵消方法的流程示意图；FIG7 is a schematic flow chart of a self-interference cancellation method according to some embodiments;
图8为根据一些实施例的一种自干扰抵消装置的结构示意图；FIG8 is a schematic structural diagram of a self-interference cancellation device according to some embodiments;
图9为根据一些实施例的又一种自干扰抵消装置的结构示意图。FIG9 is a schematic structural diagram of yet another self-interference cancellation device according to some embodiments.
具体实施方式Detailed ways
为使本领域的技术人员更好地理解本公开实施例的技术方案，下面将结合本公开中的附图，对本公开中的技术方案进行清楚、完整地描述，显然，所描述的实施例仅是本公开一部分实施例，而不是全部的实施例。基于本公开中的实施例，本领域普通技术人员在没有做出创造性劳动前提下所获得的所有其他实施例，都属于本公开保护的范围。In order to enable those skilled in the art to better understand the technical solutions of the embodiments of the present disclosure, the technical solutions of the present disclosure will be clearly and completely described below in conjunction with the drawings in the present disclosure. Obviously, the described embodiments are only part of the embodiments of the present disclosure, not all of the embodiments. Based on the embodiments in the present disclosure, all other embodiments obtained by ordinary technicians in the field without creative work are within the scope of protection of the present disclosure.
需要说明的是，在本公开中，“示例性地”或者“例如”等词用于表示例子、例证或说明。本公开中被描述为“示例性地”或者“例如”的任何实施例或设计方案不应被解释为比其它实施例或设计方案更优选或更具优势。确切而言，使用“示例性地”或者“例如”等词旨在以详细方式呈现相关概念。It should be noted that, in the present disclosure, words such as "exemplarily" or "for example" are used to indicate examples, illustrations or descriptions. Any embodiment or design described as "exemplarily" or "for example" in the present disclosure should not be interpreted as being more preferred or more advantageous than other embodiments or designs. Specifically, the use of words such as "exemplarily" or "for example" is intended to present related concepts in a detailed manner.
以下，术语“第一”、“第二”仅用于描述目的，而不能理解为指示或暗示相对重要性或者隐含指明所指示的技术特征的数量。由此，限定有“第一”、“第二”的特征可以明示或者隐含地包括一个或者更多个该特征。In the following, the terms "first" and "second" are used for descriptive purposes only and are not to be understood as indicating or implying relative importance or implicitly indicating the number of the indicated technical features. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of the features.
在本公开的描述中，除非另有说明，“/”表示“或”的意思，例如，A/B可以表示A或B。本文中的“和/或”仅仅是一种描述关联对象的关联关系，表示可以存在三种关系，例如，A和/或B，可以表示：仅A，仅B，以及A和B。此外，“至少一个”是指一个或多个，“多个”是指两个或两个以上。In the description of the present disclosure, unless otherwise specified, "/" means "or", for example, A/B can mean A or B. "And/or" in this article is only a way to describe the association relationship of associated objects, indicating that there can be three relationships, for example, A and/or B can mean: only A, only B, and A and B. In addition, "at least one" means one or more, and "a plurality" means two or more.
如本文使用的，术语“模块(module)”可以指以下器件的一部分或包含以下器件：专用集成电路(ASIC)；电子电路；组合逻辑电路；现场可编程门阵列(FPGA)；执行代码的处理器(共享、专用或成组)；提供描述的功能的其他合适的硬件部件；或上述器件的一些或全部的组合，诸如在片上***中。术语“模块”可以包含存储由处理器执行的代码的存储器(共享、专用或成组)。As used herein, the term "module" may refer to a portion of or include an application specific integrated circuit (ASIC); an electronic circuit; a combinational logic circuit; a field programmable gate array (FPGA); a processor (shared, dedicated, or grouped) that executes code; other suitable hardware components that provide the described functionality; or a combination of some or all of the above, such as in a system on a chip. The term "module" may include a memory (shared, dedicated, or grouped) that stores code executed by a processor.
同频同时全双工技术是指无线通信设备在同一个物理信道上实现两个方向信号的传输，即无线通信设备的发送机和接收机使用相同的时间和频率资源，实现在相同的时间使用相同的频率来接收和发送信号。The same-frequency simultaneous full-duplex technology refers to the wireless communication equipment realizing the transmission of signals in two directions on the same physical channel, that is, the transmitter and receiver of the wireless communication equipment use the same time and frequency resources to realize the reception and transmission of signals at the same time using the same frequency.
然而，无线通信设备的发送机和接收机同时同频工作时，会使发送机产生的发送信号进入接收机的接收通道，形成自干扰信号，从而严重影响接收机对信号的接收。因此，如何消除同频同时全双工工作模式下的自干扰信号，是目前亟需解决的技术问题。However, when the transmitter and receiver of a wireless communication device work at the same frequency at the same time, the transmission signal generated by the transmitter will enter the receiving channel of the receiver, forming a self-interference signal, which will seriously affect the receiver's reception of the signal. Therefore, how to eliminate the self-interference signal in the full-duplex working mode at the same frequency is a technical problem that needs to be solved urgently.
针对上述技术问题，本公开实施例提供了一种信号收发装置，包括： In view of the above technical problems, the present disclosure provides a signal transceiver device, including:
用于对数字基带信号进行处理、输出模拟发射信号的至少一个发射支路，用于接收模拟接收信号的至少一个接收支路，以及与至少一个发射支路、至少一个接收支路分别耦接的参考信号生成电路。参考信号生成电路用于获取各个发射支路的数字基带信号，以及耦合得到至少一个发射支路中目标发射支路的模拟发射信号。进一步地，可以基于目标发射支路的模拟发射信号以及各个发射支路的数字基带信号，得到参考信号，并将参考信号输出至目标接收支路。参考信号用于消除至少一个发射支路对目标接收支路的干扰。At least one transmitting branch for processing a digital baseband signal and outputting an analog transmitting signal, at least one receiving branch for receiving an analog receiving signal, and a reference signal generating circuit respectively coupled to at least one transmitting branch and at least one receiving branch. The reference signal generating circuit is used to obtain the digital baseband signal of each transmitting branch, and to couple to obtain the analog transmitting signal of a target transmitting branch in at least one transmitting branch. Furthermore, a reference signal can be obtained based on the analog transmitting signal of the target transmitting branch and the digital baseband signals of each transmitting branch, and the reference signal is output to the target receiving branch. The reference signal is used to eliminate the interference of at least one transmitting branch to the target receiving branch.
由上可知，参考信号生成电路可以基于每个发射支路的模拟发射信号，得到每个发射支路的信道特性。这样，参考信号生成电路可以基于每个发射支路的信道特性，确定至少一个发射支路中各个发射支路的数字基带信号在通过发射支路时产生的发射自干扰，从而以目标发射支路的模拟发射信号以及各个发射支路的数字基带信号，得到参考信号。进一步地，参考信号生成电路可以将参考信号输出至目标接收支路，以消除至少一个发射支路对目标接收支路的底噪干扰和非线性干扰，提高了信号收发装置在同频同时全双工工作模式下接收信号的准确度。As can be seen from the above, the reference signal generation circuit can obtain the channel characteristics of each transmission branch based on the analog transmission signal of each transmission branch. In this way, the reference signal generation circuit can determine the transmission self-interference generated by the digital baseband signal of each transmission branch in at least one transmission branch when passing through the transmission branch based on the channel characteristics of each transmission branch, so as to obtain the reference signal with the analog transmission signal of the target transmission branch and the digital baseband signal of each transmission branch. Furthermore, the reference signal generation circuit can output the reference signal to the target receiving branch to eliminate the background noise interference and nonlinear interference of at least one transmission branch to the target receiving branch, thereby improving the accuracy of the signal receiving and transmitting device in the same frequency simultaneous full-duplex working mode.
该信号收发装置适用于信号收发***。图1示出了该信号收发***的一种结构。如图1所示，该信号收发***包括：信号收发装置101和电子设备102。信号收发装置101与电子设备102通信连接。The signal transceiver device is suitable for a signal transceiver system. FIG1 shows a structure of the signal transceiver system. As shown in FIG1 , the signal transceiver system includes: a signal transceiver device 101 and an electronic device 102. The signal transceiver device 101 is connected to the electronic device 102 for communication.
在实际应用中，信号收发装置101还可以连接多个电子设备102。图1以信号收发装置101连接一个电子设备102为例进行说明。In practical applications, the signal transceiver 101 may also be connected to multiple electronic devices 102. FIG1 takes the signal transceiver 101 connected to one electronic device 102 as an example for illustration.
电子设备102用于向信号收发装置101发送上行信号，以及用于接收信号收发装置101发送的下行信号。相应地，信号收发装置101用于向电子设备102发送下行信号，以及用于接收电子设备102发送的上行信号。The electronic device 102 is used to send an uplink signal to the signal transceiver 101, and to receive a downlink signal sent by the signal transceiver 101. Accordingly, the signal transceiver 101 is used to send a downlink signal to the electronic device 102, and to receive an uplink signal sent by the electronic device 102.
在一些实施例中，本公开实施例提供的信号收发***可以应用于第五代移动通信技术(5th Generation Mobile Communication Technology，5G)网络下的to-B场景，也可以应用于第六代移动通信技术(6th Generation Mobile Communication Technology，6G)场景，还可以应用于其他场景，本公开实施例对此不作限定。In some embodiments, the signal transceiver system provided by the embodiments of the present disclosure can be applied to to-B scenarios under the fifth generation mobile communication technology (5th Generation Mobile Communication Technology, 5G) network, can also be applied to sixth generation mobile communication technology (6th Generation Mobile Communication Technology, 6G) scenarios, and can also be applied to other scenarios, which are not limited by the embodiments of the present disclosure.
在一些实施例中，电子设备102可以是终端，也可以是服务器，还可以是其他类型的电子设备，本公开实施例对此不作限定。In some embodiments, the electronic device 102 may be a terminal, a server, or other types of electronic devices, which is not limited in the embodiments of the present disclosure.
当电子设备102为终端时，电子设备102可以是用户设备(User Equipment，UE)、手机、平板电脑、桌面型计算机、膝上型计算机、手持计算机、笔记本电脑、超级移动个人计算机(Ultra-Mobile Personal Computer，UMPC)、上网本，以及蜂窝电话、个人数字助理(Personal Digital Assistant，PDA)、增强现实(Augmented Reality，AR)/虚拟现实(Virtual Reality，VR)设备等可以安装并使用内容社区应用(Content Community Application)的设备，本公开实施例对该终端的形态不作特殊限制。电子设备102可以通过键盘、触摸板、触摸屏、遥控器、语音交互或手写设备等一种或多种方式与用户进行人机交互。When the electronic device 102 is a terminal, the electronic device 102 can be a user equipment (UE), a mobile phone, a tablet computer, a desktop computer, a laptop computer, a handheld computer, a notebook computer, an ultra-mobile personal computer (UMPC), a netbook, a cellular phone, a personal digital assistant (PDA), an augmented reality (AR)/virtual reality (VR) device, etc., which can install and use the content community application (Content Community Application). The embodiment of the present disclosure does not impose any special restrictions on the form of the terminal. The electronic device 102 can perform human-computer interaction with the user through one or more methods such as a keyboard, a touchpad, a touch screen, a remote controller, voice interaction, or a handwriting device.
当电子设备102为服务器时，电子设备102可以是单独的一个服务器，或者，也可以是由多个服务器构成的服务器集群。在一些实施例中，服务器集群还可以是分布式集群。本公开对服务器的实现方式也不作限制。When the electronic device 102 is a server, the electronic device 102 may be a single server, or may be a server cluster composed of multiple servers. In some embodiments, the server cluster may also be a distributed cluster. The present disclosure does not limit the implementation of the server.
在一些实施例中，信号收发装置101可以是基站或者基站中的功能模块。例如，信号收发装置101可以为基站中的接收机等，也可以是其他类型的信号收发装置，本公开实施例对此不 作限定。In some embodiments, the signal transceiver device 101 may be a base station or a functional module in a base station. For example, the signal transceiver device 101 may be a receiver in a base station, or may be other types of signal transceiver devices, which are not covered in the embodiments of the present disclosure. To be limited.
当信号收发装置101为基站时，信号收发装置101可以是无线通信的基站或基站控制器等。在本公开实施例中，基站可以是各种网络制式下的基站，本公开实施例对此不作任何限制。When the signal transceiver 101 is a base station, the signal transceiver 101 may be a wireless communication base station or base station controller, etc. In the embodiment of the present disclosure, the base station may be a base station under various network standards, and the embodiment of the present disclosure does not impose any limitation on this.
图2为根据一些实施例的一种信号收发装置的结构示意图。如图2所示，信号收发装置包括：至少一个发射支路201(图2以4个发射支路为例进行说明)、至少一个接收支路203(图2以2个接收支路为例进行说明)以及参考信号生成电路202。FIG2 is a schematic diagram of the structure of a signal transceiver device according to some embodiments. As shown in FIG2 , the signal transceiver device includes: at least one transmitting branch 201 (FIG2 takes four transmitting branches as an example for explanation), at least one receiving branch 203 (FIG2 takes two receiving branches as an example for explanation), and a reference signal generating circuit 202.
发射支路201用于对数字基带信号进行处理，输出模拟发射信号。信号收发装置上部署有用于发射信号的至少一个发射支路201。至少一个发射支路201可以在发射通道中输出模拟发射信号。发射支路201在获取到待发送的数字基带信号后，可以通过数模转换器(Digital To Analog Converter，DAC)以及各种频段处理模块(例如中频处理模块、射频处理模块等)，对待发送的数字基带信号进行处理，从而得到模拟发射信号，并通过发射天线输出模拟发射信号。The transmitting branch 201 is used to process the digital baseband signal and output an analog transmission signal. At least one transmitting branch 201 for transmitting the signal is deployed on the signal transceiver. At least one transmitting branch 201 can output an analog transmission signal in the transmission channel. After acquiring the digital baseband signal to be transmitted, the transmitting branch 201 can process the digital baseband signal to be transmitted through a digital-to-analog converter (DAC) and various frequency band processing modules (such as an intermediate frequency processing module, a radio frequency processing module, etc.), thereby obtaining an analog transmission signal, and outputting the analog transmission signal through a transmitting antenna.
接收支路203用于接收模拟接收信号。信号收发装置上部署有用于接收信号的至少一个接收支路203。至少一个接收支路203可以在接收通道中接收模拟接收信号。接收支路203在接收到模拟接收信号后，可以通过模数转换器(Analog to Digital Converter，ADC)以及各种处理模块(例如子带滤波器、射频处理模块等)，对接收到的模拟接收信号进行处理，从而得到处理后的模拟接收信号，以便于根据参考信号消除处理后的模拟接收信号中的非线性干扰信号。The receiving branch 203 is used to receive an analog receiving signal. At least one receiving branch 203 for receiving a signal is disposed on the signal transceiver. At least one receiving branch 203 can receive an analog receiving signal in a receiving channel. After receiving the analog receiving signal, the receiving branch 203 can process the received analog receiving signal through an analog to digital converter (ADC) and various processing modules (such as a sub-band filter, a radio frequency processing module, etc.), thereby obtaining a processed analog receiving signal, so as to eliminate the nonlinear interference signal in the processed analog receiving signal according to the reference signal.
发射通道和接收通道在工作中是全双工模式，收发同时打开。The transmitting channel and receiving channel are in full-duplex mode during operation, with both transmitting and receiving turned on at the same time.
参考信号生成电路202与至少一个发射支路201、至少一个接收支路203分别耦接。The reference signal generating circuit 202 is coupled to at least one transmitting branch 201 and at least one receiving branch 203 respectively.
参考信号生成电路202用于获取各个发射支路201的数字基带信号，以及耦合得到至少一个发射支路201中目标发射支路的模拟发射信号；基于目标发射支路的模拟发射信号以及各个发射支路201的数字基带信号，得到参考信号；将参考信号输出至目标接收支路，参考信号用于消除至少一个发射支路201对目标接收支路的干扰(包括非线性干扰和底噪干扰)。The reference signal generating circuit 202 is used to obtain the digital baseband signal of each transmitting branch 201, and to couple to obtain the analog transmitting signal of the target transmitting branch in at least one transmitting branch 201; to obtain the reference signal based on the analog transmitting signal of the target transmitting branch and the digital baseband signal of each transmitting branch 201; and to output the reference signal to the target receiving branch, and the reference signal is used to eliminate the interference (including nonlinear interference and background noise interference) of at least one transmitting branch 201 to the target receiving branch.
在一些实施例中，如图2和图3所示，参考信号生成电路202在获取至少一个发射支路201中的各个发射支路的数字基带信号时，可以通过可编程阵列逻辑芯片(Field Programmable Gate Array，FPGA)获取至少一个发射支路201中的各个发射支路的数字基带信号。In some embodiments, as shown in Figures 2 and 3, when the reference signal generating circuit 202 obtains the digital baseband signal of each transmitting branch in at least one transmitting branch 201, it can obtain the digital baseband signal of each transmitting branch in at least one transmitting branch 201 through a programmable array logic chip (Field Programmable Gate Array, FPGA).
FPGA是一种可编程逻辑芯片。运维人员可以在芯片中设置数字基带信号的采样点。这样，FPGA可以基于设置好的采样点，在数字域中直接采集至少一个发射支路中各个发射支路的数字基带信号。FPGA is a programmable logic chip. The operation and maintenance personnel can set the sampling points of the digital baseband signal in the chip. In this way, the FPGA can directly collect the digital baseband signals of each transmission branch in at least one transmission branch in the digital domain based on the set sampling points.
在一些实施例中，如图2和图3所示，参考信号生成电路与至少一个发射支路201中的每个发射支路之间可以部署耦合器。该耦合器可以将每个发射支路201中的模拟发射信号耦合到参考信号生成电路202中。相应地，参考信号生成电路202可以从每个发射支路201的输出端耦合得到每个发射支路201的模拟发射信号。In some embodiments, as shown in FIG2 and FIG3, a coupler may be disposed between the reference signal generating circuit and each transmitting branch in at least one transmitting branch 201. The coupler may couple the analog transmitting signal in each transmitting branch 201 to the reference signal generating circuit 202. Accordingly, the reference signal generating circuit 202 may couple the analog transmitting signal of each transmitting branch 201 from the output end of each transmitting branch 201.
在一些实施例中，如图2和图3所示，参考信号生成电路202包括：切换开关301、自干扰提取模块302以及参考信号生成模块303。In some embodiments, as shown in FIG. 2 and FIG. 3 , the reference signal generating circuit 202 includes: a switch 301 , a self-interference extraction module 302 , and a reference signal generating module 303 .
(1)切换开关301(1) Switch 301
切换开关301与至少一个发射支路201中各个发射支路的输出端耦接。切换开关301用于选中目标发射支路，并将目标发射支路的模拟发射信号耦合至参考信号生成电路202。The switch 301 is coupled to the output end of each transmitting branch in at least one transmitting branch 201. The switch 301 is used to select a target transmitting branch and couple the analog transmitting signal of the target transmitting branch to the reference signal generating circuit 202.
示例性地，切换开关301可以包括第一驱动电路和第二驱动电路。切换开关301可以通过 第一驱动电路接收第一控制信号(VCTL1)，以及通过第二驱动电路接收第二控制信号(VCTL2)。然后，切换开关301可以根据VCTL1与VCTL2之间的控制信号电平关系，分时、轮询控制每个耦合器与参考信号生成电路的之间的导通与关闭。Exemplarily, the switch 301 may include a first drive circuit and a second drive circuit. The first driving circuit receives the first control signal (VCTL1), and receives the second control signal (VCTL2) through the second driving circuit. Then, the switch 301 can control the conduction and shutdown between each coupler and the reference signal generating circuit in a time-sharing and polling manner according to the control signal level relationship between VCTL1 and VCTL2.
例如，当VCTL1与VCTL2之间的控制信号电平关系为0:1时，切换开关301可以导通参考信号生成电路202与第三发射支路上部署的耦合器之间链路、关闭参考信号生成电路202与第一发射支路上部署的耦合器之间链路、关闭参考信号生成电路202与第二发射支路上部署的耦合器之间链路、关闭参考信号生成电路202与第四发射支路上部署的耦合器之间链路。For example, when the control signal level relationship between VCTL1 and VCTL2 is 0:1, the switching switch 301 can turn on the link between the reference signal generating circuit 202 and the coupler deployed on the third transmitting branch, turn off the link between the reference signal generating circuit 202 and the coupler deployed on the first transmitting branch, turn off the link between the reference signal generating circuit 202 and the coupler deployed on the second transmitting branch, and turn off the link between the reference signal generating circuit 202 and the coupler deployed on the fourth transmitting branch.
在实际应用中，每个发射支路201对应的发射信道中的信道特性可能不同。因此，通过分时、轮询控制每个耦合器与参考信号生成电路202的之间的导通与关闭，可以分别获取到每个发射信道中的信道特性。In practical applications, the channel characteristics of the transmission channels corresponding to each transmission branch 201 may be different. Therefore, by controlling the on and off of each coupler and the reference signal generating circuit 202 in a time-sharing and polling manner, the channel characteristics of each transmission channel can be obtained respectively.
在一些实施例中，切换开关301可以通过第一驱动电路和第二驱动电路与FPGA连接。FPGA可以响应于接收到的指令，通过第一驱动电路和第二驱动电路向切换开关301发送VCTL1和VCTL2。In some embodiments, the switch 301 may be connected to the FPGA through a first driving circuit and a second driving circuit. In response to the received instruction, the FPGA may send VCTL1 and VCTL2 to the switch 301 through the first driving circuit and the second driving circuit.
上述FPGA接收到的指令可以是采样指令，该采样指令可以是响应于用户操作生成的。The instruction received by the FPGA may be a sampling instruction, and the sampling instruction may be generated in response to a user operation.
示例性地，预设信号收发装置中包括4个发射支路201，则切换开关301为单刀四掷开关。Exemplarily, the preset signal transceiver device includes four transmitting branches 201, and the switch 301 is a single-pole four-throw switch.
当第一驱动电路接收到的VCTL1为低电平信号(可以用“0”表示)且第二驱动电路接收到的VCTL2为低电平信号时，即VCTL1：VCTL2为0:0时，切换开关301用于：导通参考信号生成电路202与第一发射支路上部署的耦合器之间链路、关闭参考信号生成电路202与第二发射支路上部署的耦合器之间链路、关闭参考信号生成电路202与第三发射支路上部署的耦合器之间链路、关闭参考信号生成电路202与第四发射支路上部署的耦合器之间链路。When the VCTL1 received by the first driving circuit is a low-level signal (which can be represented by "0") and the VCTL2 received by the second driving circuit is a low-level signal, that is, VCTL1:VCTL2 is 0:0, the switching switch 301 is used to: turn on the link between the reference signal generating circuit 202 and the coupler deployed on the first transmitting branch, turn off the link between the reference signal generating circuit 202 and the coupler deployed on the second transmitting branch, turn off the link between the reference signal generating circuit 202 and the coupler deployed on the third transmitting branch, and turn off the link between the reference signal generating circuit 202 and the coupler deployed on the fourth transmitting branch.
当第一驱动电路接收到的VCTL1为高电平信号(可以用“1”表示)且第二驱动电路接收到的VCTL2为低电平信号时，即VCTL1：VCTL2为1:0时，切换开关301用于：导通参考信号生成电路202与第二发射支路上部署的耦合器之间链路、关闭参考信号生成电路202与第一发射支路上部署的耦合器之间链路、关闭参考信号生成电路202与第三发射支路上部署的耦合器之间链路、关闭参考信号生成电路202与第四发射支路上部署的耦合器之间链路。When the VCTL1 received by the first driving circuit is a high-level signal (which can be represented by "1") and the VCTL2 received by the second driving circuit is a low-level signal, that is, when VCTL1:VCTL2 is 1:0, the switching switch 301 is used to: turn on the link between the reference signal generating circuit 202 and the coupler deployed on the second transmitting branch, turn off the link between the reference signal generating circuit 202 and the coupler deployed on the first transmitting branch, turn off the link between the reference signal generating circuit 202 and the coupler deployed on the third transmitting branch, and turn off the link between the reference signal generating circuit 202 and the coupler deployed on the fourth transmitting branch.
当第一驱动电路接收到的VCTL1为低电平信号且第二驱动电路接收到的VCTL2为高电平信号时，即VCTL1：VCTL2为0:1时，切换开关301用于：导通参考信号生成电路202与第三发射支路上部署的耦合器之间链路、关闭参考信号生成电路202与第一发射支路上部署的耦合器之间链路、关闭参考信号生成电路202与第二发射支路上部署的耦合器之间链路、关闭参考信号生成电路202与第四发射支路上部署的耦合器之间链路。When the VCTL1 received by the first driving circuit is a low-level signal and the VCTL2 received by the second driving circuit is a high-level signal, that is, when VCTL1:VCTL2 is 0:1, the switching switch 301 is used to: turn on the link between the reference signal generating circuit 202 and the coupler deployed on the third transmitting branch, turn off the link between the reference signal generating circuit 202 and the coupler deployed on the first transmitting branch, turn off the link between the reference signal generating circuit 202 and the coupler deployed on the second transmitting branch, and turn off the link between the reference signal generating circuit 202 and the coupler deployed on the fourth transmitting branch.
当第一驱动电路接收到的VCTL1为高电平信号且第二驱动电路接收到的VCTL2为高电平信号时，即VCTL1：VCTL2为1:1时，切换开关301用于：导通参考信号生成电路202与第四发射支路上部署的耦合器之间链路、关闭参考信号生成电路202与第一发射支路上部署的耦合器之间链路、关闭参考信号生成电路202与第二发射支路上部署的耦合器之间链路、关闭参考信号生成电路202与第三发射支路上部署的耦合器之间链路。When the VCTL1 received by the first driving circuit is a high-level signal and the VCTL2 received by the second driving circuit is a high-level signal, that is, when VCTL1:VCTL2 is 1:1, the switching switch 301 is used to: turn on the link between the reference signal generating circuit 202 and the coupler deployed on the fourth transmitting branch, turn off the link between the reference signal generating circuit 202 and the coupler deployed on the first transmitting branch, turn off the link between the reference signal generating circuit 202 and the coupler deployed on the second transmitting branch, and turn off the link between the reference signal generating circuit 202 and the coupler deployed on the third transmitting branch.
这样，切换开关301可以通过接收FPGA发送的VCTL1和VCTL2，选中目标发射支路，并将目标发射支路的模拟发射信号耦合至参考信号生成电路202。In this way, the switch 301 can select the target transmission branch by receiving VCTL1 and VCTL2 sent by the FPGA, and couple the analog transmission signal of the target transmission branch to the reference signal generating circuit 202 .
在从目标发射支路的输出端耦合得到目标发射支路的模拟发射信号后，参考信号生成电路 还用于基于目标发射支路的模拟发射信号，得到发射自干扰数字信号。After coupling the analog transmission signal of the target transmission branch from the output end of the target transmission branch, the reference signal generation circuit It is also used to obtain a transmitted self-interference digital signal based on an analog transmitted signal of a target transmitting branch.
(2)自干扰提取模块302(2) Self-interference extraction module 302
切换开关301，与至少一个发射支路201中各个发射支路的输出端、以及自干扰提取模块302分别耦接，切换开关301用于选中目标发射支路，并将目标发射支路的模拟发射信号耦合至自干扰提取模块302。The switching switch 301 is coupled to the output end of each transmitting branch in at least one transmitting branch 201 and the self-interference extraction module 302 respectively. The switching switch 301 is used to select the target transmitting branch and couple the analog transmission signal of the target transmitting branch to the self-interference extraction module 302.
自干扰提取模块302用于接收目标发射支路的模拟发射信号，以及对目标发射支路的模拟发射信号进行处理，输出发射自干扰数字信号。The self-interference extraction module 302 is used to receive the analog transmission signal of the target transmission branch, process the analog transmission signal of the target transmission branch, and output a transmission self-interference digital signal.
在一些实施例中，如图2和图3所示，自干扰提取模块302包括：第一子带滤波器302-1、第一射频处理模块302-2和第一模数转换模块302-3。In some embodiments, as shown in FIG. 2 and FIG. 3 , the self-interference extraction module 302 includes: a first sub-band filter 302 - 1 , a first RF processing module 302 - 2 , and a first analog-to-digital conversion module 302 - 3 .
第一子带滤波器302-1与切换开关301耦接。第一子带滤波器302-1用于接收目标发射支路的模拟发射信号，并对目标发射支路的模拟发射信号进行滤波处理，输出滤波处理后的模拟发射信号。The first sub-band filter 302-1 is coupled to the switch 301. The first sub-band filter 302-1 is used to receive the analog transmit signal of the target transmit branch, filter the analog transmit signal of the target transmit branch, and output the filtered analog transmit signal.
例如，切换开关301选中目标发射支路，并将目标发射支路的模拟发射信号耦合至自干扰提取模块302后，为了防止目标发射支路的模拟发射信号的信号强度过大或者过小而导致模拟发射信号失真，自干扰提取模块302中的第一子带滤波器302-1可以对目标发射支路的模拟发射信号进行滤波处理，从而输出滤波处理后的模拟发射信号。For example, after the switching switch 301 selects the target transmission branch and couples the analog transmission signal of the target transmission branch to the self-interference extraction module 302, in order to prevent the signal strength of the analog transmission signal of the target transmission branch from being too large or too small to cause distortion of the analog transmission signal, the first subband filter 302-1 in the self-interference extraction module 302 can filter the analog transmission signal of the target transmission branch, thereby outputting the filtered analog transmission signal.
在实际应用中，目标发射支路上部署的耦合器在将目标发射支路的模拟发射信号耦合至切换开关301时，可以先抑制目标发射支路的模拟发射信号中的一部分信号强度。接着，第一子带滤波器302-1可以对耦合器耦合至切换开关301的模拟发射信号进行滤波处理，从而输出滤波处理后的模拟发射信号。In practical applications, the coupler deployed on the target transmission branch may first suppress a portion of the signal strength of the analog transmission signal of the target transmission branch when coupling the analog transmission signal of the target transmission branch to the switch 301. Then, the first subband filter 302-1 may filter the analog transmission signal coupled by the coupler to the switch 301, thereby outputting the filtered analog transmission signal.
在一些实施例中，耦合器的耦合度范围可以是[15dB，30dB]，第一子带滤波器302-1的信号强度抑制区间可以是[25dB，30dB]。分贝(dB)为信号强度，即信号强度的单位为dBm。也就是说，dB是两个量之间的比值，表示两个量间的相对大小，而dBm则是表示功率绝对大小的值。In some embodiments, the coupling degree range of the coupler may be [15dB, 30dB], and the signal strength suppression interval of the first sub-band filter 302-1 may be [25dB, 30dB]. Decibel (dB) is the signal strength, that is, the unit of signal strength is dBm. In other words, dB is the ratio between two quantities, indicating the relative size between the two quantities, while dBm is a value indicating the absolute size of power.
第一射频处理模块302-2与第一子带滤波器302-1耦接。第一射频处理模块302-2用于接收滤波处理后的模拟发射信号，并对滤波处理后的模拟发射信号进行射频处理，输出射频处理后的模拟发射信号。The first RF processing module 302-2 is coupled to the first sub-band filter 302-1. The first RF processing module 302-2 is used to receive the analog transmit signal after filtering, perform RF processing on the analog transmit signal after filtering, and output the analog transmit signal after RF processing.
第一模数转换模块302-3与第一射频处理模块302-2耦接。第一模数转换模块302-3用于接收射频处理后的模拟发射信号，并对射频处理后的模拟发射信号进行模数转换处理，输出发射自干扰数字信号。The first analog-to-digital conversion module 302-3 is coupled to the first RF processing module 302-2 and is used to receive the analog transmit signal after RF processing, perform analog-to-digital conversion on the analog transmit signal after RF processing, and output a transmit self-interference digital signal.
(3)参考信号生成模块303(3) Reference signal generation module 303
参考信号生成模块303与至少一个发射支路201中各个发射支路201的输入端、至少一个接收支路203和自干扰提取模块302分别耦接，参考信号生成模块303用于获取发射自干扰数字信号以及各个发射支路201的数字基带信号；基于发射自干扰数字信号以及各个发射支路201的数字基带信号，得到参考信号；将参考信号输出至目标接收支路。The reference signal generation module 303 is coupled to the input end of each transmitting branch 201 in at least one transmitting branch 201, at least one receiving branch 203 and the self-interference extraction module 302 respectively, and the reference signal generation module 303 is used to obtain the transmitted self-interference digital signal and the digital baseband signal of each transmitting branch 201; obtain a reference signal based on the transmitted self-interference digital signal and the digital baseband signal of each transmitting branch 201; and output the reference signal to the target receiving branch.
在一些实施例中，参考信号生成模块303，用于基于发射自干扰数字信号以及各个发射支路201的数字基带信号，得到参考信号；将参考信号输出至目标接收支路，包括：分别对各个发射支路201的数字基带信号进行包括增益调整和时延调整的处理，得到各个发射支路201的 处理后的数字基带信号；基于发射自干扰数字信号和各个发射支路201的处理后的数字基带信号，得到参考信号。In some embodiments, the reference signal generation module 303 is used to obtain a reference signal based on the transmitted self-interference digital signal and the digital baseband signal of each transmitting branch 201; output the reference signal to the target receiving branch, including: performing gain adjustment and delay adjustment on the digital baseband signal of each transmitting branch 201, and obtaining the reference signal of each transmitting branch 201. Processed digital baseband signal; based on the transmitted self-interference digital signal and the processed digital baseband signal of each transmitting branch 201, a reference signal is obtained.
进一步地，在获取到各个发射支路201的数字基带信号后，由于各个发射支路201的信道特性存在差异，因此，参考信号生成模块303可以分别对各个发射支路201的数字基带信号进行包括增益调整和时延调整的处理，从而得到信道特性接近的数字基带信号，即各个发射支路的处理后的数字基带信号。Furthermore, after acquiring the digital baseband signals of each transmitting branch 201, since the channel characteristics of each transmitting branch 201 are different, the reference signal generation module 303 can respectively perform processing including gain adjustment and delay adjustment on the digital baseband signals of each transmitting branch 201, thereby obtaining digital baseband signals with similar channel characteristics, that is, the processed digital baseband signals of each transmitting branch.
信道特性接近的数字基带信号是指经增益调整和时延调整的处理后的数字基带信号，与各个发射支路201的数字基带信号的信道特性相似。The digital baseband signal with similar channel characteristics refers to the digital baseband signal processed by gain adjustment and delay adjustment, and has similar channel characteristics to the digital baseband signals of each transmission branch 201 .
在一些实施例中，增益调整是指对数字基带信号的幅度进行调整，时延调整是指对数字基带信号的时延进行调整。In some embodiments, gain adjustment refers to adjusting the amplitude of the digital baseband signal, and delay adjustment refers to adjusting the delay of the digital baseband signal.
在一些实施例中，由于参考信号生成电路202是基于参考信号消除至少一个发射支路201对目标接收支路的非线性干扰的，因此，为了保证各个发射支路201的数字基带信号的幅度与时延，与目标接收支路接收到的干扰信号的幅度与时延相似或相同，参考信号生成模块303可以获取目标接收支路接收到的干扰信号的幅度与时延，并基于该幅度与时延，分别对各个发射支路201的数字基带信号进行包括增益调整和时延调整的处理，从而得到信道特性接近的数字基带信号。In some embodiments, since the reference signal generating circuit 202 eliminates the nonlinear interference of at least one transmitting branch 201 to the target receiving branch based on the reference signal, in order to ensure that the amplitude and delay of the digital baseband signals of each transmitting branch 201 are similar to or the same as the amplitude and delay of the interference signal received by the target receiving branch, the reference signal generating module 303 can obtain the amplitude and delay of the interference signal received by the target receiving branch, and based on the amplitude and delay, perform processing including gain adjustment and delay adjustment on the digital baseband signals of each transmitting branch 201, thereby obtaining digital baseband signals with similar channel characteristics.
示例性地，预设信号收发装置中包括4个发射支路201，则4个发射支路201的数字基带信号分别为：h1(n)、h2(n)、h3(n)和h4(n)。预设目标接收支路接收到的干扰信号的幅度为G，时延为t，则参考信号生成模块303分别对4个发射支路201的数字基带信号进行包括增益调整和时延调整的处理，得到4个发射支路201的处理后的数字基带信号，这些处理后的数字基带信号分别为：G1h1(n-t1)、G2h2(n-t2)、G3h3(n-t3)和G4h4(n-t4)。n表示采样点。G1和G的差值小于预设幅度阈值，G2和G的差值小于预设幅度阈值，G3和G的差值小于预设幅度阈值，G4和G的差值小于预设幅度阈值。也就是说，G1、G2、G3、G4的数值都接近G或者和G相同。Exemplarily, the preset signal transceiver device includes four transmitting branches 201, and the digital baseband signals of the four transmitting branches 201 are respectively: h 1 (n), h 2 (n), h 3 (n) and h 4 (n). The amplitude of the interference signal received by the preset target receiving branch is G, and the delay is t, then the reference signal generation module 303 processes the digital baseband signals of the four transmitting branches 201 respectively, including gain adjustment and delay adjustment, to obtain the processed digital baseband signals of the four transmitting branches 201, and these processed digital baseband signals are respectively: G 1 h 1 (nt 1 ), G 2 h 2 (nt 2 ), G 3 h 3 (nt 3 ) and G 4 h 4 (nt 4 ). n represents a sampling point. The difference between G 1 and G is less than the preset amplitude threshold, the difference between G 2 and G is less than the preset amplitude threshold, the difference between G 3 and G is less than the preset amplitude threshold, and the difference between G 4 and G is less than the preset amplitude threshold. That is to say, the values of G1 , G2 , G3 , and G4 are all close to or the same as G.
相应地，t1和t的差值小于预设时延阈值，t2和t的差值小于预设时延阈值，t3和t的差值小于预设时延阈值，t4和t的差值小于预设时延阈值。也就是说，t1、t2、t3、t4的数值都接近t或者和t相同。Correspondingly, the difference between t1 and t is less than the preset delay threshold, the difference between t2 and t is less than the preset delay threshold, the difference between t3 and t is less than the preset delay threshold, and the difference between t4 and t is less than the preset delay threshold. In other words, the values of t1 , t2 , t3 , and t4 are all close to t or the same as t.
这样，根据4个发射支路201的处理后的数字基带信号计算出的参考信号，可以与发射自干扰信号进行干扰抵消，得到接近目标接收支路的底噪的信号，从而消除至少一个发射支路201对目标接收支路的非线性干扰。In this way, the reference signal calculated based on the processed digital baseband signals of the four transmitting branches 201 can be used to cancel the interference with the transmitted self-interference signal to obtain a signal close to the background noise of the target receiving branch, thereby eliminating the nonlinear interference of at least one transmitting branch 201 on the target receiving branch.
在一些实施例中，在获取各个发射支路201的处理后的数字基带信号后，参考信号生成模块303可以对各个发射支路201的处理后的数字基带信号求和，然后将求和后的数值与发射自干扰数字信号进行卷积，从而得到参考信号。In some embodiments, after obtaining the processed digital baseband signals of each transmitting branch 201, the reference signal generation module 303 can sum the processed digital baseband signals of each transmitting branch 201, and then convolve the summed value with the transmitted self-interference digital signal to obtain a reference signal.
结合上述示例，参考信号满足以下公式。
r′(n)＝(G1h1(n-t1)+G2h2(n-t2)+G3h3(n-t3)+G4h4(n-t4))×r(n)。In combination with the above example, the reference signal satisfies the following formula.
r'(n) = ( G1h1 ( nt1 ) + G2h2 ( nt2 ) + G3h3 ( nt3 ) + G4h4 ( nt4 )) × r(n).
在上述公式中，r′(n)为参考信号，r(n)为发射自干扰数字信号。In the above formula, r′(n) is the reference signal, and r(n) is the transmitted self-interference digital signal.
参考信号生成模块303将参考信号输出至目标接收支路。The reference signal generating module 303 outputs the reference signal to the target receiving branch.
需要说明的是，参考信号生成模块303可以将参考信号输出至目标接收支路，以使得目标 接收支路基于参考信号对数字接收信号进行干扰抵消处理，输出干扰抵消处理后的数字接收信号。因此，本公开实施例提供的参考信号生成电路的链路动态需要与目标接收支路的链路动态一致，或者，参考信号生成电路的链路动态小于目标接收支路的链路动态。It should be noted that the reference signal generation module 303 can output the reference signal to the target receiving branch so that the target The receiving branch performs interference cancellation processing on the digital receiving signal based on the reference signal, and outputs the digital receiving signal after the interference cancellation processing. Therefore, the link dynamics of the reference signal generating circuit provided in the embodiment of the present disclosure needs to be consistent with the link dynamics of the target receiving branch, or the link dynamics of the reference signal generating circuit is less than the link dynamics of the target receiving branch.
在这种情况下，参考信号生成电路的链路动态和目标接收支路的链路动态满足以下公式。In this case, the link dynamics of the reference signal generation circuit and the link dynamics of the target reception branch satisfy the following formula.
(参考信号生成电路的信道增益+噪声系数NF)≤(目标接收支路的通道增益+噪声系数NF)。上述链路动态用于表示参考信号生成电路的信道特性。(Channel gain of the reference signal generating circuit + noise factor NF)≤(Channel gain of the target receiving branch + noise factor NF). The above link dynamics are used to represent the channel characteristics of the reference signal generating circuit.
在一些实施例中，如图2和图3所示，发射支路201包括：数模转换模块304、中频处理模块305和第三射频处理模块306。In some embodiments, as shown in FIG. 2 and FIG. 3 , the transmitting branch 201 includes: a digital-to-analog conversion module 304 , an intermediate frequency processing module 305 , and a third radio frequency processing module 306 .
数模转换模块304用于对发射支路201的数字基带信号进行数模转换，输出模拟基带信号。The digital-to-analog conversion module 304 is used to perform digital-to-analog conversion on the digital baseband signal of the transmitting branch 201 and output an analog baseband signal.
中频处理模块305与数模转换模块304耦接。中频处理模块305用于接收模拟基带信号，并对模拟基带信号进行上变频处理，输出模拟中频信号。The intermediate frequency processing module 305 is coupled to the digital-to-analog conversion module 304. The intermediate frequency processing module 305 is used to receive an analog baseband signal, perform up-conversion processing on the analog baseband signal, and output an analog intermediate frequency signal.
第三射频处理模块306与中频处理模块305耦接。第三射频处理模块306用于接收模拟中频信号，并对模拟中频信号进行射频处理，输出模拟发射信号。The third RF processing module 306 is coupled to the IF processing module 305. The third RF processing module 306 is used to receive an analog IF signal, perform RF processing on the analog IF signal, and output an analog transmit signal.
在一些实施例中，如图2和图3所示，接收支路203包括：第二子带滤波器307、第二射频处理模块308、第二模数转换模块309和数字抵消模块310。In some embodiments, as shown in FIG. 2 and FIG. 3 , the receiving branch 203 includes: a second sub-band filter 307 , a second RF processing module 308 , a second analog-to-digital conversion module 309 and a digital cancellation module 310 .
第二子带滤波器307用于对接收支路203接收到的模拟接收信号进行滤波处理，输出滤波处理后的模拟接收信号。The second sub-band filter 307 is used to filter the analog reception signal received by the receiving branch 203 and output the filtered analog reception signal.
第二射频处理模块308与第二子带滤波器307耦接。第二射频处理模块308用于接收滤波处理后的模拟接收信号，并对滤波处理后的模拟接收信号进行射频处理，输出射频处理后的模拟接收信号。The second RF processing module 308 is coupled to the second sub-band filter 307. The second RF processing module 308 is used to receive the analog received signal after filtering, perform RF processing on the analog received signal after filtering, and output the analog received signal after RF processing.
第二模数转换模块309与第二射频处理模块308耦接。第二模数转换模块309用于接收射频处理后的模拟接收信号，并对射频处理后的模拟接收信号进行模数转换，输出数字接收信号。The second analog-to-digital conversion module 309 is coupled to the second RF processing module 308. The second analog-to-digital conversion module 309 is used to receive the analog received signal after RF processing, perform analog-to-digital conversion on the analog received signal after RF processing, and output a digital received signal.
数字抵消模块310，与第二模数转换模块309、参考信号生成模块303分别耦接。数字抵消模块310用于接收参考信号，并基于参考信号，对数字接收信号进行干扰抵消处理，输出干扰抵消处理后的数字接收信号。The digital cancellation module 310 is coupled to the second analog-to-digital conversion module 309 and the reference signal generation module 303. The digital cancellation module 310 is used to receive a reference signal, and based on the reference signal, perform interference cancellation processing on the digital received signal, and output the digital received signal after the interference cancellation processing.
在一些实施例中，如图2和图3所示，接收支路203还包括上行解调模块311。In some embodiments, as shown in FIG. 2 and FIG. 3 , the receiving branch 203 further includes an uplink demodulation module 311 .
在确定干扰抵消处理后的数字接收信号后，上行解调模块311可以对干扰抵消处理后的数字接收信号进行上行解调，从而得到接近目标接收支路自身的底噪。也就是说，干扰抵消处理后的数字接收信号接近目标接收支路自身的底噪。在这种情况下，信号收发装置可以在收发同时打开的全双工模式下，实现了收发自干扰抵消，进而实现了信号收发装置的抗干扰。After determining the digital received signal after the interference cancellation processing, the uplink demodulation module 311 can perform uplink demodulation on the digital received signal after the interference cancellation processing, so as to obtain a noise floor close to the target receiving branch itself. In other words, the digital received signal after the interference cancellation processing is close to the noise floor of the target receiving branch itself. In this case, the signal transceiver device can achieve self-interference cancellation of transceiver in the full-duplex mode where the transceiver and the receiver are turned on at the same time, thereby realizing the anti-interference of the signal transceiver device.
示例性地，预设参考信号为r′(n)，第二模数转换模块309输出的数字接收信号为r1(n)，则干扰抵消处理后的数字接收信号r1″(n)满足以下公式。
r1″(n)＝r′(n)+r1(n)。Exemplarily, the preset reference signal is r′(n), and the digital received signal output by the second analog-to-digital conversion module 309 is r 1 (n). Then, the digital received signal r 1 ″(n) after the interference cancellation process satisfies the following formula.
r 1 ″(n)=r′(n)+r 1 (n).
在确定干扰抵消处理后的数字接收信号r1″(n)后，可以对干扰抵消处理后的数字接收信号r1″(n)进行上行解调，从而得到接近目标接收支路自身的底噪r0(n)。也就是说，干扰抵消处理后的数字接收信号r1″(n)接近目标接收支路自身的底噪r0(n)。在这种情况下，信号收发装置可以在收发同时打开的全双工模式下，实现了收发自干扰抵消，进而实现了信号收发装置的抗干 扰。After determining the digital received signal r 1 ″(n) after the interference cancellation processing, the digital received signal r 1 ″(n) after the interference cancellation processing can be uplink demodulated to obtain a noise floor r 0 (n) close to the target receiving branch itself. In other words, the digital received signal r 1 ″(n) after the interference cancellation processing is close to the noise floor r 0 (n) of the target receiving branch itself. In this case, the signal transceiver device can achieve the self-interference cancellation of transmission and reception in the full-duplex mode where transmission and reception are turned on at the same time, thereby achieving the anti-interference of the signal transceiver device. Disturbance.
在实际应用中，信号收发装置中可以部署有自动增益控制(Automatic Gain Control，AGC)模块。自动增益控制模块可以在确定接收到的模拟接收信号的信号强度大于第一预设信号强度阈值时，或者小于第二预设信号强度阈值时，对模拟接收信号的信号强度自动调整。In practical applications, an automatic gain control (AGC) module may be deployed in the signal transceiver. The AGC module may automatically adjust the signal strength of the analog reception signal when it is determined that the signal strength of the received analog reception signal is greater than a first preset signal strength threshold, or less than a second preset signal strength threshold.
但是，当自动增益控制模块对模拟接收信号的信号强度进行自动调整时，可能导致接收支路203对模拟接收信号中的干扰信号进行干扰抵消处理时，干扰抵消的准确度降低。因此，为了保证自动增益控制模块不对模拟接收信号的信号强度进行自动调整，第二子带滤波器307需要将接收支路203接收到的模拟接收信号的信号强度滤波到预设信号强度范围。该预设信号强度范围的最小值大于第二预设信号强度阈值；该预设信号强度范围的最大值小于第一预设信号强度阈值。However, when the automatic gain control module automatically adjusts the signal strength of the analog received signal, the accuracy of interference cancellation may be reduced when the receiving branch 203 performs interference cancellation processing on the interference signal in the analog received signal. Therefore, in order to ensure that the automatic gain control module does not automatically adjust the signal strength of the analog received signal, the second sub-band filter 307 needs to filter the signal strength of the analog received signal received by the receiving branch 203 to a preset signal strength range. The minimum value of the preset signal strength range is greater than the second preset signal strength threshold; the maximum value of the preset signal strength range is less than the first preset signal strength threshold.
在一些实施例中，如图2和图3所示，信号收发装置还包括至少一个接收天线和至少一个发射天线，接收天线与发射天线之间的距离处于预设距离范围内。In some embodiments, as shown in FIG. 2 and FIG. 3 , the signal transceiver device further includes at least one receiving antenna and at least one transmitting antenna, and the distance between the receiving antenna and the transmitting antenna is within a preset distance range.
至少一个发射天线与至少一个发射支路一一对应耦接，至少一个接收天线与至少一个接收支路一一对应耦接。At least one transmitting antenna is coupled to at least one transmitting branch in a one-to-one correspondence, and at least one receiving antenna is coupled to at least one receiving branch in a one-to-one correspondence.
也就是说，接收支路203在接收模拟接收信号时，由于发射支路201的发射天线与接收支路的接收天线具备一定的空间距离，因此，基于这个空间距离，发射支路201的发射天线发射的模拟发射信号的信号强度会在这个空间距离中有一定程度的衰减。That is to say, when the receiving branch 203 receives the analog receiving signal, since the transmitting antenna of the transmitting branch 201 and the receiving antenna of the receiving branch have a certain spatial distance, based on this spatial distance, the signal strength of the analog transmitting signal transmitted by the transmitting antenna of the transmitting branch 201 will be attenuated to a certain extent in this spatial distance.
在这种情况下，信号收发装置可以结合空间距离中信号强度的衰减，以及第二子带滤波器307对接收支路203接收到的模拟接收信号进行滤波处理，保证自动增益控制模块不对模拟接收信号的信号强度进行自动调整。In this case, the signal transceiver device can combine the attenuation of signal strength in spatial distance and the second sub-band filter 307 to filter the analog reception signal received by the receiving branch 203 to ensure that the automatic gain control module does not automatically adjust the signal strength of the analog reception signal.
示例性地，发射支路201发射的模拟发射信号的信号强度通常为25dBm至40dBm。在这种情况下，可以将信号收发装置的接收天线与发射天线之间的距离调整到预设距离范围内，以使得接收天线与发射天线之间的空间隔离度为45dB至55dB，并将第二子带滤波器307的滤波抑制度设定为25dB至30dB。Exemplarily, the signal strength of the analog transmission signal transmitted by the transmission branch 201 is generally 25dBm to 40dBm. In this case, the distance between the receiving antenna and the transmitting antenna of the signal transceiver device can be adjusted to a preset distance range so that the spatial isolation between the receiving antenna and the transmitting antenna is 45dB to 55dB, and the filtering suppression degree of the second sub-band filter 307 is set to 25dB to 30dB.
而接收支路203的链路增益通常为33dB，因此，自动增益控制模块对模拟接收信号的信号强度不进行自动调整的最大均值电平为：-12dBm-33dB＝-45dBm。在这种情况下，当发射支路201发射的模拟发射信号的信号强度为25dBm时，通过接收天线与发射天线之间的距离形成的空间隔离度45dB，以及第二子带滤波器307的滤波抑制度25dB，接收支路203接收到的模拟接收信号的信号强度为25-45-25＝-45dBm。The link gain of the receiving branch 203 is usually 33dB, so the maximum mean level of the signal strength of the analog received signal that the automatic gain control module does not automatically adjust is: -12dBm-33dB = -45dBm. In this case, when the signal strength of the analog transmitted signal transmitted by the transmitting branch 201 is 25dBm, the spatial isolation degree formed by the distance between the receiving antenna and the transmitting antenna is 45dB, and the filtering suppression degree of the second sub-band filter 307 is 25dB, the signal strength of the analog received signal received by the receiving branch 203 is 25-45-25 = -45dBm.
这样，子带滤波器输出的滤波处理后的模拟接收信号的信号强度为-45dBm，刚好保证自动增益控制模块对模拟接收信号的信号强度不进行自动调整，避免了接收支路203对模拟接收信号中的干扰信号进行干扰抵消处理时，干扰抵消的准确度降低。In this way, the signal strength of the analog received signal after filtering output by the subband filter is -45dBm, which just ensures that the automatic gain control module does not automatically adjust the signal strength of the analog received signal, thereby avoiding the reduction in the accuracy of interference cancellation when the receiving branch 203 performs interference cancellation processing on the interference signal in the analog received signal.
作为一种示例，图4为根据一些实施例的又一种信号收发装置的结构示意图。如图4所示，信号收发装置可以包括：参考信号生成电路、一个发射支路和一个接收支路。参考信号生成电路、发射支路和接收支路的相关介绍可以参考上文，本公开实施例在此不予赘述。示例性地，以下对图4所示的信号收发装置进行自干扰抵消的工作过程进行介绍。As an example, FIG4 is a schematic diagram of the structure of another signal transceiver according to some embodiments. As shown in FIG4, the signal transceiver may include: a reference signal generating circuit, a transmitting branch and a receiving branch. The relevant introduction of the reference signal generating circuit, the transmitting branch and the receiving branch can be referred to above, and the embodiments of the present disclosure are not repeated here. Exemplarily, the working process of the signal transceiver shown in FIG4 performing self-interference cancellation is introduced below.
在发射支路、接收支路和参考信号生成电路均为正常打开运行的状态时，参考信号生成电路可以通过FPGA向切换开关301的两个驱动电路发送电平信号，从而控制发射支路的输出 端与第一子带滤波器302-1为导通状态。When the transmitting branch, the receiving branch and the reference signal generating circuit are all in a normal open state, the reference signal generating circuit can send a level signal to the two driving circuits of the switching switch 301 through the FPGA, thereby controlling the output of the transmitting branch. The end and the first sub-band filter 302-1 are in a conducting state.
接着，参考信号生成电路可以通过耦合器获取发射支路的模拟发射信号，以及通过FPGA预先在数字域设置的采样点，获取发射支路的数字基带信号。示例性地，耦合器的耦合度范围可以是[15dB，30dB]。Next, the reference signal generation circuit can obtain the analog transmission signal of the transmission branch through the coupler, and obtain the digital baseband signal of the transmission branch through the sampling point pre-set in the digital domain by the FPGA. Exemplarily, the coupling degree range of the coupler can be [15dB, 30dB].
接着，参考信号生成电路可以基于发射支路的模拟发射信号，得到发射自干扰数字信号，并以发射自干扰数字信号以及各个发射支路的数字基带信号，得到参考信号。Next, the reference signal generating circuit may obtain a transmitted self-interference digital signal based on the analog transmitted signal of the transmitting branch, and obtain a reference signal using the transmitted self-interference digital signal and the digital baseband signals of each transmitting branch.
参考信号生成电路中的参考信号生成模块303可以对发射支路的数字基带信号进行包括增益调整和时延调整的处理，得到发射支路的处理后的数字基带信号。The reference signal generation module 303 in the reference signal generation circuit can perform processing including gain adjustment and delay adjustment on the digital baseband signal of the transmission branch to obtain the processed digital baseband signal of the transmission branch.
相应地，参考信号生成电路中的第一子带滤波器302-1可以接收发射支路的模拟发射信号，并对发射支路的模拟发射信号进行滤波处理，向第一射频处理模块302-2输出滤波处理后的模拟发射信号。第一射频处理模块302-2可以对滤波处理后的模拟发射信号进行射频处理，向第一模数转换模块302-3输出射频处理后的模拟发射信号。第一模数转换模块302-3对射频处理后的模拟发射信号进行模数转换处理，输出发射自干扰数字信号。Accordingly, the first subband filter 302-1 in the reference signal generation circuit can receive the analog transmit signal of the transmit branch, filter the analog transmit signal of the transmit branch, and output the filtered analog transmit signal to the first RF processing module 302-2. The first RF processing module 302-2 can perform RF processing on the filtered analog transmit signal, and output the RF-processed analog transmit signal to the first analog-to-digital conversion module 302-3. The first analog-to-digital conversion module 302-3 performs analog-to-digital conversion on the RF-processed analog transmit signal, and outputs a transmitted self-interference digital signal.
参考信号生成电路中的参考信号生成模块303还可以基于发射自干扰数字信号和发射支路的处理后的数字基带信号，得到参考信号，并将参考信号输出至接收支路。The reference signal generation module 303 in the reference signal generation circuit may also obtain a reference signal based on the transmitted self-interference digital signal and the processed digital baseband signal of the transmitting branch, and output the reference signal to the receiving branch.
接收支路可以在接收模拟接收信号后，可以对模拟接收信号进行射频处理、滤波处理以及数模转换处理，从而得到处理后的模拟接收信号。进一步地，接收支路可以根据接收到的参考信号和处理后的模拟接收信号进行自干扰抵消，输出干扰抵消处理后的数字接收信号，从而消除发射支路对接收支路的非线性干扰。After receiving the analog reception signal, the receiving branch can perform radio frequency processing, filtering processing, and digital-to-analog conversion processing on the analog reception signal to obtain a processed analog reception signal. Furthermore, the receiving branch can perform self-interference cancellation based on the received reference signal and the processed analog reception signal, and output a digital reception signal after interference cancellation processing, thereby eliminating the nonlinear interference of the transmitting branch to the receiving branch.
在一些实施例中，接收支路中的第二子带滤波器307可以对接收支路接收到的模拟接收信号进行滤波处理，并向第二射频处理模块308输出滤波处理后的模拟接收信号。第二射频处理模块308可以对滤波处理后的模拟接收信号进行射频处理，并向第二模数转换模块309输出射频处理后的模拟接收信号。第二模数转换模块309可以对射频处理后的模拟接收信号进行模数转换，并向数字抵消模块310输出数字接收信号。数字抵消模块310可以基于参考信号，对数字接收信号进行干扰抵消处理，输出干扰抵消处理后的数字接收信号。In some embodiments, the second subband filter 307 in the receiving branch may filter the analog received signal received by the receiving branch, and output the filtered analog received signal to the second RF processing module 308. The second RF processing module 308 may perform RF processing on the filtered analog received signal, and output the RF-processed analog received signal to the second analog-to-digital conversion module 309. The second analog-to-digital conversion module 309 may perform analog-to-digital conversion on the RF-processed analog received signal, and output the digital received signal to the digital cancellation module 310. The digital cancellation module 310 may perform interference cancellation processing on the digital received signal based on the reference signal, and output the interference-cancelled digital received signal.
作为一种示例，图5为根据一些实施例的又一种信号收发装置的结构示意图。该信号收发装置可以是4发4收抗干扰接收机。如图5所示，信号收发装置中可以包括：参考信号生成电路、四个发射支路和四个接收支路。参考信号生成电路、发射支路和接收支路的相关介绍可以参考上文，在此不予赘述。示例性地，以下对图5所示的信号收发装置进行自干扰抵消的工作过程进行介绍。As an example, FIG5 is a schematic diagram of the structure of another signal transceiver according to some embodiments. The signal transceiver may be a 4-transmit 4-receive anti-interference receiver. As shown in FIG5, the signal transceiver may include: a reference signal generation circuit, four transmitting branches and four receiving branches. The relevant introduction of the reference signal generation circuit, the transmitting branch and the receiving branch can be referred to above and will not be repeated here. Exemplarily, the working process of the signal transceiver shown in FIG5 for self-interference cancellation is introduced below.
在发射支路、接收支路和参考信号生成电路均为正常打开运行的状态时，参考信号生成电路可以通过FPGA，分时向切换开关301的两个驱动电路发送不同的电平信号，从而控制任意一个发射支路的输出端分时与第一子带滤波器302-1为导通状态。When the transmitting branch, the receiving branch and the reference signal generating circuit are all in a normally open and operating state, the reference signal generating circuit can send different level signals to the two driving circuits of the switching switch 301 through the FPGA in a time-sharing manner, thereby controlling the output end of any transmitting branch to be in a time-sharing and conductive state with the first sub-band filter 302-1.
当参考信号生成电路在第一时刻通过FPGA向切换开关301的第一驱动电路发送的是低电平信号，向第二驱动电路发送的是低电平信号时，切换开关301可以控制第一发射支路的输出端与第一子带滤波器302-1为导通状态。相应地，第二发射支路的输出端、第三发射支路的输出端、第四发射支路的输出端与第一子带滤波器302-1均为关闭状态。When the reference signal generation circuit sends a low level signal to the first drive circuit of the switch 301 through the FPGA at the first moment and sends a low level signal to the second drive circuit, the switch 301 can control the output end of the first transmission branch and the first sub-band filter 302-1 to be in a conducting state. Correspondingly, the output end of the second transmission branch, the output end of the third transmission branch, the output end of the fourth transmission branch and the first sub-band filter 302-1 are all in a closed state.
在这种情况下，参考信号生成电路可以通过耦合器获取第一发射支路的模拟发射信号，以 及通过FPGA预先在数字域设置的采样点，获取4个发射支路的数字基带信号。In this case, the reference signal generating circuit can obtain the analog transmission signal of the first transmission branch through the coupler. And through the sampling points pre-set in the digital domain by FPGA, the digital baseband signals of the four transmitting branches are obtained.
接着，参考信号生成电路可以基于第一发射支路的模拟发射信号，得到发射自干扰数字信号，并以发射自干扰数字信号以及各个发射支路的数字基带信号，得到参考信号，并向第一接收支路输出参考信号。Next, the reference signal generating circuit can obtain a transmitted self-interference digital signal based on the analog transmit signal of the first transmit branch, obtain a reference signal with the transmitted self-interference digital signal and the digital baseband signals of each transmit branch, and output the reference signal to the first receiving branch.
第一接收支路可以在接收模拟接收信号后，可以对模拟接收信号进行射频处理滤波处理以及数模转换处理，从而得到处理后的模拟接收信号。进一步地，第一接收支路可以根据接收到的参考信号和处理后的模拟接收信号进行自干扰抵消，输出干扰抵消处理后的数字接收信号，从而消除4个发射支路对第一接收支路的非线性干扰。After receiving the analog received signal, the first receiving branch can perform radio frequency processing, filtering and digital-to-analog conversion on the analog received signal, thereby obtaining a processed analog received signal. Furthermore, the first receiving branch can perform self-interference cancellation based on the received reference signal and the processed analog received signal, and output a digital received signal after interference cancellation, thereby eliminating the nonlinear interference of the four transmitting branches on the first receiving branch.
当参考信号生成电路在第二时刻通过FPGA向切换开关301的第一驱动电路发送的是高电平信号，向第二驱动电路发送的是低电平信号时，切换开关301可以控制第二发射支路的输出端与第一子带滤波器302-1为导通状态。相应地，第一发射支路的输出端、第三发射支路的输出端、第四发射支路的输出端与第一子带滤波器302-1均为关闭状态。When the reference signal generating circuit sends a high level signal to the first driving circuit of the switching switch 301 through the FPGA at the second moment and sends a low level signal to the second driving circuit, the switching switch 301 can control the output end of the second transmitting branch and the first sub-band filter 302-1 to be in a conducting state. Correspondingly, the output end of the first transmitting branch, the output end of the third transmitting branch, the output end of the fourth transmitting branch and the first sub-band filter 302-1 are all in a closed state.
在这种情况下，参考信号生成电路可以通过耦合器获取第二发射支路的模拟发射信号，以及通过FPGA预先在数字域设置的采样点，获取4个发射支路的数字基带信号。In this case, the reference signal generating circuit can obtain the analog transmit signal of the second transmit branch through the coupler, and obtain the digital baseband signals of the four transmit branches through the sampling points pre-set in the digital domain by the FPGA.
接着，参考信号生成电路可以基于第二发射支路的模拟发射信号，得到发射自干扰数字信号，并以发射自干扰数字信号以及各个发射支路的数字基带信号，得到参考信号，并向第二接收支路输出参考信号。Next, the reference signal generating circuit can obtain a transmitted self-interference digital signal based on the analog transmit signal of the second transmit branch, obtain a reference signal with the transmitted self-interference digital signal and the digital baseband signals of each transmit branch, and output the reference signal to the second receiving branch.
第二接收支路可以在接收模拟接收信号后，可以对模拟接收信号进行射频处理、滤波处理以及数模转换处理，从而得到处理后的模拟接收信号。进一步地，第二接收支路可以根据接收到的参考信号和处理后的模拟接收信号进行自干扰抵消，输出干扰抵消处理后的数字接收信号，从而消除4个发射支路对第二接收支路的非线性干扰。After receiving the analog reception signal, the second reception branch can perform radio frequency processing, filtering processing, and digital-to-analog conversion processing on the analog reception signal, thereby obtaining a processed analog reception signal. Furthermore, the second reception branch can perform self-interference cancellation based on the received reference signal and the processed analog reception signal, and output a digital reception signal after interference cancellation processing, thereby eliminating the nonlinear interference of the four transmission branches on the second reception branch.
当参考信号生成电路在第三时刻通过FPGA向切换开关301的第一驱动电路发送的是低电平信号，向第二驱动电路发送的是高电平信号时，切换开关301可以控制第三发射支路的输出端与第一子带滤波器302-1为导通状态。相应地，第一发射支路的输出端、第二发射支路的输出端、第四发射支路的输出端与第一子带滤波器302-1均为关闭状态。When the reference signal generating circuit sends a low level signal to the first driving circuit of the switching switch 301 through the FPGA at the third moment, and sends a high level signal to the second driving circuit, the switching switch 301 can control the output end of the third transmitting branch and the first sub-band filter 302-1 to be in a conducting state. Correspondingly, the output end of the first transmitting branch, the output end of the second transmitting branch, the output end of the fourth transmitting branch and the first sub-band filter 302-1 are all in a closed state.
在这种情况下，参考信号生成电路可以通过耦合器获取第三发射支路的模拟发射信号，以及通过FPGA预先在数字域设置的采样点，获取4个发射支路的数字基带信号。In this case, the reference signal generating circuit can obtain the analog transmit signal of the third transmit branch through the coupler, and obtain the digital baseband signals of the four transmit branches through the sampling points pre-set in the digital domain by the FPGA.
接着，参考信号生成电路可以基于第三发射支路的模拟发射信号，得到发射自干扰数字信号，并以发射自干扰数字信号以及各个发射支路的数字基带信号，得到参考信号，并向第三接收支路输出参考信号。Next, the reference signal generating circuit can obtain a transmitted self-interference digital signal based on the analog transmit signal of the third transmit branch, obtain a reference signal with the transmitted self-interference digital signal and the digital baseband signals of each transmit branch, and output the reference signal to the third receiving branch.
第三接收支路可以在接收模拟接收信号后，可以对模拟接收信号进行射频处理、滤波处理以及数模转换处理，从而得到处理后的模拟接收信号。进一步地，第三接收支路可以根据接收到的参考信号和处理后的模拟接收信号进行自干扰抵消，输出干扰抵消处理后的数字接收信号，从而消除4个发射支路对第三接收支路的非线性干扰。After receiving the analog received signal, the third receiving branch can perform radio frequency processing, filtering processing, and digital-to-analog conversion processing on the analog received signal, thereby obtaining a processed analog received signal. Furthermore, the third receiving branch can perform self-interference cancellation based on the received reference signal and the processed analog received signal, and output a digital received signal after interference cancellation processing, thereby eliminating the nonlinear interference of the four transmitting branches on the third receiving branch.
当参考信号生成电路在第四时刻通过FPGA向切换开关301的第一驱动电路发送的是高电平信号，向第二驱动电路发送的是高电平信号时，切换开关301可以控制第四发射支路的输出端与第一子带滤波器302-1为导通状态。相应地，第一发射支路的输出端、第二发射支路的输出端、第三发射支路的输出端与第一子带滤波器302-1均为关闭状态。 When the reference signal generating circuit sends a high level signal to the first driving circuit of the switching switch 301 through the FPGA at the fourth moment and sends a high level signal to the second driving circuit, the switching switch 301 can control the output end of the fourth transmitting branch and the first sub-band filter 302-1 to be in a conducting state. Correspondingly, the output end of the first transmitting branch, the output end of the second transmitting branch, the output end of the third transmitting branch and the first sub-band filter 302-1 are all in a closed state.
在这种情况下，参考信号生成电路可以通过耦合器获取第四发射支路的模拟发射信号，以及通过FPGA预先在数字域设置的采样点，获取4个发射支路的数字基带信号。In this case, the reference signal generating circuit can obtain the analog transmit signal of the fourth transmit branch through the coupler, and obtain the digital baseband signals of the four transmit branches through the sampling points pre-set in the digital domain by the FPGA.
接着，参考信号生成电路可以基于第四发射支路的模拟发射信号，得到发射自干扰数字信号，并以发射自干扰数字信号以及各个发射支路的数字基带信号，得到参考信号，并向第四接收支路输出参考信号。Next, the reference signal generating circuit can obtain a transmitted self-interference digital signal based on the analog transmit signal of the fourth transmit branch, obtain a reference signal with the transmitted self-interference digital signal and the digital baseband signals of each transmit branch, and output the reference signal to the fourth receiving branch.
第四接收支路可以在接收模拟接收信号后，可以对模拟接收信号进行射频处理、滤波处理以及数模转换处理，从而得到处理后的模拟接收信号。进一步地，第四接收支路可以根据接收到的参考信号和处理后的模拟接收信号进行自干扰抵消，输出干扰抵消处理后的数字接收信号，从而消除4个发射支路对第四接收支路的非线性干扰。After receiving the analog received signal, the fourth receiving branch can perform radio frequency processing, filtering processing, and digital-to-analog conversion processing on the analog received signal, thereby obtaining a processed analog received signal. Further, the fourth receiving branch can perform self-interference cancellation based on the received reference signal and the processed analog received signal, and output a digital received signal after interference cancellation processing, thereby eliminating the nonlinear interference of the four transmitting branches on the fourth receiving branch.
在一些实施例中，图6为根据一些实施例的又一种信号收发装置的结构示意图。如图6所示，信号收发装置可以包括：参考信号生成电路、4个发射支路和1个接收支路。参考信号生成电路、发射支路和接收支路的相关介绍可以参考上文，在此不再赘述。In some embodiments, FIG6 is a schematic diagram of the structure of another signal transceiver according to some embodiments. As shown in FIG6, the signal transceiver may include: a reference signal generation circuit, four transmission branches and one receiving branch. The relevant introduction of the reference signal generation circuit, the transmission branch and the receiving branch can be referred to above, and will not be repeated here.
在发射支路、接收支路和参考信号生成电路均为正常打开运行的状态时，参考信号生成电路可以通过FPGA分时向切换开关301的两个驱动电路发送不同的电平信号，从而控制任意一个发射支路的输出端分时与第一子带滤波器302-1为导通状态。When the transmitting branch, receiving branch and reference signal generating circuit are all in a normally open and operating state, the reference signal generating circuit can send different level signals to the two driving circuits of the switching switch 301 through the FPGA in a time-sharing manner, thereby controlling the output end of any transmitting branch to be in a time-sharing and on state with the first sub-band filter 302-1.
当参考信号生成电路在第一时刻通过FPGA向切换开关301的第一驱动电路发送的是低电平信号，向第二驱动电路发送的是低电平信号时，切换开关301可以控制第一发射支路的输出端与第一子带滤波器302-1为导通状态。相应地，第二发射支路的输出端、第三发射支路的输出端、第四发射支路的输出端与第一子带滤波器302-1均为关闭状态。When the reference signal generation circuit sends a low level signal to the first drive circuit of the switch 301 through the FPGA at the first moment and sends a low level signal to the second drive circuit, the switch 301 can control the output end of the first transmission branch and the first sub-band filter 302-1 to be in a conducting state. Correspondingly, the output end of the second transmission branch, the output end of the third transmission branch, the output end of the fourth transmission branch and the first sub-band filter 302-1 are all in a closed state.
在这种情况下，参考信号生成电路可以通过耦合器获取第一发射支路的模拟发射信号，以及通过FPGA预先在数字域设置的采样点，获取4个发射支路的数字基带信号。In this case, the reference signal generating circuit can obtain the analog transmit signal of the first transmit branch through the coupler, and obtain the digital baseband signals of the four transmit branches through the sampling points pre-set in the digital domain by the FPGA.
接着，参考信号生成电路可以基于第一发射支路的模拟发射信号，得到发射自干扰数字信号，并以发射自干扰数字信号以及各个发射支路的数字基带信号，得到参考信号，并向接收支路输出参考信号。Next, the reference signal generating circuit can obtain a transmitted self-interference digital signal based on the analog transmit signal of the first transmit branch, obtain a reference signal with the transmitted self-interference digital signal and the digital baseband signals of each transmit branch, and output the reference signal to the receiving branch.
接收支路可以在接收模拟接收信号后，可以对模拟接收信号进行射频处理、滤波处理以及数模转换处理，从而得到处理后的模拟接收信号。进一步地，接收支路可以根据接收到的参考信号和处理后的模拟接收信号进行自干扰抵消，输出干扰抵消处理后的数字接收信号，从而消除4个发射支路对接收支路的非线性干扰。After receiving the analog reception signal, the receiving branch can perform radio frequency processing, filtering processing, and digital-to-analog conversion processing on the analog reception signal to obtain a processed analog reception signal. Furthermore, the receiving branch can perform self-interference cancellation based on the received reference signal and the processed analog reception signal, and output a digital reception signal after interference cancellation processing, thereby eliminating the nonlinear interference of the four transmitting branches on the receiving branch.
当参考信号生成电路在第二时刻通过FPGA向切换开关301的第一驱动电路发送的是高电平信号，向第二驱动电路发送的是低电平信号时，切换开关301可以控制第二发射支路的输出端与第一子带滤波器302-1为导通状态。相应地，第一发射支路的输出端、第三发射支路的输出端、第四发射支路的输出端与第一子带滤波器302-1均为关闭状态。When the reference signal generating circuit sends a high level signal to the first driving circuit of the switching switch 301 through the FPGA at the second moment and sends a low level signal to the second driving circuit, the switching switch 301 can control the output end of the second transmitting branch and the first sub-band filter 302-1 to be in a conducting state. Correspondingly, the output end of the first transmitting branch, the output end of the third transmitting branch, the output end of the fourth transmitting branch and the first sub-band filter 302-1 are all in a closed state.
在这种情况下，参考信号生成电路可以通过耦合器获取第二发射支路的模拟发射信号，以及通过FPGA预先在数字域设置的采样点，获取4个发射支路的数字基带信号。In this case, the reference signal generating circuit can obtain the analog transmit signal of the second transmit branch through the coupler, and obtain the digital baseband signals of the four transmit branches through the sampling points pre-set in the digital domain by the FPGA.
接着，参考信号生成电路可以基于第二发射支路的模拟发射信号，得到发射自干扰数字信号，并以发射自干扰数字信号以及各个发射支路的数字基带信号，得到参考信号，并向接收支路输出参考信号。Next, the reference signal generating circuit can obtain a transmitted self-interference digital signal based on the analog transmit signal of the second transmit branch, obtain a reference signal with the transmitted self-interference digital signal and the digital baseband signals of each transmit branch, and output the reference signal to the receiving branch.
接收支路可以在接收模拟接收信号后，可以对模拟接收信号进行射频处理、滤波处理以及 数模转换处理，从而得到处理后的模拟接收信号。进一步地，接收支路可以根据接收到的参考信号和处理后的模拟接收信号进行自干扰抵消，输出干扰抵消处理后的数字接收信号，从而消除4个发射支路对接收支路的非线性干扰。After receiving the analog reception signal, the receiving branch can perform radio frequency processing, filtering and The digital-to-analog conversion process is performed to obtain a processed analog receiving signal. Furthermore, the receiving branch can perform self-interference cancellation according to the received reference signal and the processed analog receiving signal, and output a digital receiving signal after interference cancellation processing, thereby eliminating the nonlinear interference of the four transmitting branches to the receiving branch.
当参考信号生成电路在第三时刻通过FPGA向切换开关301的第一驱动电路发送的是低电平信号，向第二驱动电路发送的是高电平信号时，切换开关301可以控制第三发射支路的输出端与第一子带滤波器302-1为导通状态。相应地，第一发射支路的输出端、第二发射支路的输出端、第四发射支路的输出端与第一子带滤波器302-1均为关闭状态。When the reference signal generating circuit sends a low level signal to the first driving circuit of the switching switch 301 through the FPGA at the third moment, and sends a high level signal to the second driving circuit, the switching switch 301 can control the output end of the third transmitting branch and the first sub-band filter 302-1 to be in a conducting state. Correspondingly, the output end of the first transmitting branch, the output end of the second transmitting branch, the output end of the fourth transmitting branch and the first sub-band filter 302-1 are all in a closed state.
在这种情况下，参考信号生成电路可以通过耦合器获取第三发射支路的模拟发射信号，以及通过FPGA预先在数字域设置的采样点，获取4个发射支路的数字基带信号。In this case, the reference signal generating circuit can obtain the analog transmit signal of the third transmit branch through the coupler, and obtain the digital baseband signals of the four transmit branches through the sampling points pre-set in the digital domain by the FPGA.
接着，参考信号生成电路可以基于第三发射支路的模拟发射信号，得到发射自干扰数字信号，并以发射自干扰数字信号以及各个发射支路的数字基带信号，得到参考信号，并向接收支路输出参考信号。Next, the reference signal generating circuit can obtain a transmitted self-interference digital signal based on the analog transmit signal of the third transmit branch, obtain a reference signal with the transmitted self-interference digital signal and the digital baseband signals of each transmit branch, and output the reference signal to the receiving branch.
接收支路可以在接收模拟接收信号后，可以对模拟接收信号进行射频处理、滤波处理以及数模转换处理，从而得到处理后的模拟接收信号。进一步地，接收支路可以根据接收到的参考信号和处理后的模拟接收信号进行自干扰抵消，输出干扰抵消处理后的数字接收信号，从而消除4个发射支路对接收支路的非线性干扰和底噪干扰。After receiving the analog received signal, the receiving branch can perform radio frequency processing, filtering processing, and digital-to-analog conversion processing on the analog received signal to obtain a processed analog received signal. Furthermore, the receiving branch can perform self-interference cancellation based on the received reference signal and the processed analog received signal, and output a digital received signal after interference cancellation processing, thereby eliminating the nonlinear interference and background noise interference of the four transmitting branches on the receiving branch.
当参考信号生成电路在第四时刻通过FPGA向切换开关301的第一驱动电路发送的是高电平信号，向第二驱动电路发送的是高电平信号时，切换开关301可以控制第四发射支路的输出端与第一子带滤波器302-1为导通状态。相应地，第一发射支路的输出端、第二发射支路的输出端、第三发射支路的输出端与第一子带滤波器302-1均为关闭状态。在这种情况下，参考信号生成电路可以通过耦合器获取第四发射支路的模拟发射信号，以及通过FPGA预先在数字域设置的采样点，获取4个发射支路的数字基带信号。When the reference signal generation circuit sends a high-level signal to the first drive circuit of the switch 301 through the FPGA at the fourth moment and sends a high-level signal to the second drive circuit, the switch 301 can control the output end of the fourth transmission branch and the first sub-band filter 302-1 to be in a conducting state. Correspondingly, the output end of the first transmission branch, the output end of the second transmission branch, the output end of the third transmission branch and the first sub-band filter 302-1 are all in a closed state. In this case, the reference signal generation circuit can obtain the analog transmission signal of the fourth transmission branch through the coupler, and obtain the digital baseband signals of the four transmission branches through the sampling points pre-set in the digital domain by the FPGA.
接着，参考信号生成电路可以基于第四发射支路的模拟发射信号，得到发射自干扰数字信号，并以发射自干扰数字信号以及各个发射支路的数字基带信号，得到参考信号，并向接收支路输出参考信号。Next, the reference signal generating circuit can obtain a transmitted self-interference digital signal based on the analog transmit signal of the fourth transmit branch, obtain a reference signal with the transmitted self-interference digital signal and the digital baseband signals of each transmit branch, and output the reference signal to the receiving branch.
接收支路可以在接收模拟接收信号后，可以对模拟接收信号进行射频处理、滤波处理以及数模转换处理，从而得到处理后的模拟接收信号。进一步地，接收支路可以根据接收到的参考信号和处理后的模拟接收信号进行自干扰抵消，输出干扰抵消处理后的数字接收信号，从而消除4个发射支路对接收支路的非线性干扰。After receiving the analog reception signal, the receiving branch can perform radio frequency processing, filtering processing, and digital-to-analog conversion processing on the analog reception signal to obtain a processed analog reception signal. Furthermore, the receiving branch can perform self-interference cancellation based on the received reference signal and the processed analog reception signal, and output a digital reception signal after interference cancellation processing, thereby eliminating the nonlinear interference of the four transmitting branches on the receiving branch.
可以看出，上述主要从装置结构的角度对本公开实施例提供的方案进行了介绍。本公开实施例还提供一种自干扰抵消方法。该自干扰抵消方法可以应用于图2至图6中任意一个信号收发装置。It can be seen that the above mainly introduces the solution provided by the embodiment of the present disclosure from the perspective of device structure. The embodiment of the present disclosure also provides a self-interference cancellation method. The self-interference cancellation method can be applied to any one of the signal transceiver devices in Figures 2 to 6.
如图7所示，该自干扰抵消方法包括以下步骤。As shown in FIG7 , the self-interference cancellation method includes the following steps.
S701、信号收发装置获取一个或多个发射支路中各个发射支路的数字基带信号，以及一个或多个发射支路中目标发射支路的模拟发射信号。S701. A signal transceiver device obtains a digital baseband signal of each transmitting branch in one or more transmitting branches, and an analog transmitting signal of a target transmitting branch in one or more transmitting branches.
在一些实施例中，结合图3，信号收发装置可以基于FPGA获取至少一个发射支路中各个发射支路的数字基带信号，以及基于耦合器耦合得到至少一个发射支路中目标发射支路的模拟发射信号。 In some embodiments, in combination with Figure 3, the signal transceiver device can obtain the digital baseband signal of each transmitting branch in at least one transmitting branch based on the FPGA, and obtain the analog transmission signal of the target transmitting branch in at least one transmitting branch based on the coupler coupling.
S702、信号收发装置基于模拟发射信号以及各个发射支路的数字基带信号，得到参考信号。S702: The signal transceiver obtains a reference signal based on the analog transmit signal and the digital baseband signals of each transmit branch.
在一些实施例中，信号收发装置基于模拟发射信号以及各个发射支路的数字基带信号，得到参考信号的方法包括：信号收发装置基于目标发射支路的模拟发射信号，生成发射自干扰数字信号。然后，信号收发装置基于发射自干扰数字信号以及各个发射支路的数字基带信号，生成参考信号。In some embodiments, the method for obtaining a reference signal by a signal transceiver based on an analog transmit signal and a digital baseband signal of each transmit branch includes: the signal transceiver generates a transmitted self-interference digital signal based on the analog transmit signal of the target transmit branch. Then, the signal transceiver generates a reference signal based on the transmitted self-interference digital signal and the digital baseband signal of each transmit branch.
在一些实施例中，信号收发装置基于目标发射支路的模拟发射信号，生成发射自干扰数字信号的方法包括：对目标发射支路的模拟发射信号进行滤波处理，得到滤波处理后的模拟发射信号；对滤波处理后的模拟发射信号进行射频处理，得到射频处理后的模拟发射信号；对射频处理后的模拟发射信号进行模数转换处理，得到发射自干扰数字信号。In some embodiments, a method for a signal transceiver to generate a transmitted self-interference digital signal based on an analog transmit signal of a target transmit branch includes: filtering the analog transmit signal of the target transmit branch to obtain a filtered analog transmit signal; performing radio frequency processing on the filtered analog transmit signal to obtain a radio frequency processed analog transmit signal; and performing analog-to-digital conversion on the radio frequency processed analog transmit signal to obtain a transmitted self-interference digital signal.
在一些实施例中，信号收发装置基于发射自干扰数字信号以及各个发射支路的数字基带信号，生成参考信号的方法包括：信号收发装置分别对各个发射支路的数字基带信号进行包括增益调整和时延调整的处理，得到各个发射支路的处理后的数字基带信号；基于发射自干扰数字信号和各个发射支路的处理后的数字基带信号，生成参考信号。In some embodiments, a method for a signal transceiver to generate a reference signal based on a transmitted self-interference digital signal and a digital baseband signal of each transmitting branch includes: the signal transceiver performs processing including gain adjustment and delay adjustment on the digital baseband signal of each transmitting branch to obtain a processed digital baseband signal of each transmitting branch; and a reference signal is generated based on the transmitted self-interference digital signal and the processed digital baseband signal of each transmitting branch.
S703、信号收发装置基于参考信号，对一个或多个接收支路中的目标接收支路的数字接收信号进行干扰抵消处理，得到干扰抵消处理后的数字接收信号。S703: The signal transceiver performs interference cancellation processing on a digital received signal of a target receiving branch in one or more receiving branches based on the reference signal to obtain a digital received signal after the interference cancellation processing.
在一些实施例中，结合图3，信号收发装置可以基于接收支路中的数字抵消模块并基于参考信号，对至少一个接收支路中的目标接收支路的数字接收信号进行干扰抵消处理，得到干扰抵消处理后的数字接收信号。In some embodiments, in combination with Figure 3, the signal transceiver device can perform interference cancellation processing on the digital receiving signal of the target receiving branch in at least one receiving branch based on the digital cancellation module in the receiving branch and based on the reference signal to obtain a digital receiving signal after interference cancellation processing.
可以理解的是，自干扰抵消装置为了实现上述功能，自干扰抵消装置包含了执行各个功能相应的硬件结构和/或软件模块。本领域技术人员应该很容易意识到，结合本公开实施例描述的各示例的算法步骤，本公开能够以硬件或硬件和计算机软件的结合形式来实现。某个功能究竟以硬件还是计算机软件驱动硬件的方式来执行，取决于技术方案的特定应用和设计约束条件。专业技术人员可以对每个特定的应用来使用不同方法来实现所描述的功能，但是这种实现不应认为超出本公开的范围。It is understandable that in order to realize the above functions, the self-interference cancellation device includes hardware structures and/or software modules corresponding to the execution of each function. Those skilled in the art should easily realize that, in combination with the algorithm steps of each example described in the embodiments of the present disclosure, the present disclosure can be implemented in the form of hardware or a combination of hardware and computer software. Whether a function is executed in the form of hardware or computer software driving hardware depends on the specific application and design constraints of the technical solution. Professional and technical personnel can use different methods to implement the described functions for each specific application, but such implementation should not be considered to be beyond the scope of the present disclosure.
本公开实施例可以根据上述方法实施例对自干扰抵消装置进行功能模块的划分。例如，可以对应每一个功能划分每一个功能模块，也可以将两个或两个以上的功能集成在一个功能模块中。上述集成的模块既可以采用硬件的形式实现，也可以采用软件的形式实现。需要说明的是，本公开实施例中对模块的划分是示意性的，仅仅为一种逻辑功能划分，实际实现时可以有另外的划分方式。下面以采用对应每一个功能划分每一个功能模块为例进行说明。The disclosed embodiment can divide the self-interference cancellation device into functional modules according to the above method embodiment. For example, each functional module can be divided corresponding to each function, or two or more functions can be integrated into one functional module. The above integrated module can be implemented in the form of hardware or software. It should be noted that the division of modules in the disclosed embodiment is schematic and is only a logical function division. There may be other division methods in actual implementation. The following is an example of dividing each functional module corresponding to each function.
图8为根据一些实施例的一种自干扰抵消装置的结构示意图。自干扰抵消装置可以执行上述方法实施例提供的自干扰抵消方法。图8为根据一些实施例的一种自干扰抵消装置，用于执行图7所示的自干扰抵消方法。该自干扰抵消装置包括：获取单元801和处理单元802。FIG8 is a schematic diagram of the structure of a self-interference cancellation device according to some embodiments. The self-interference cancellation device can execute the self-interference cancellation method provided by the above method embodiment. FIG8 is a self-interference cancellation device according to some embodiments, which is used to execute the self-interference cancellation method shown in FIG7. The self-interference cancellation device includes: an acquisition unit 801 and a processing unit 802.
获取单元801，用于获取一个或多个发射支路中各个发射支路的数字基带信号，以及至少一个发射支路中目标发射支路的模拟发射信号。例如，结合图7，获取单元801用于执行S701。The acquisition unit 801 is used to acquire the digital baseband signal of each of the one or more transmission branches and the analog transmission signal of the target transmission branch of at least one transmission branch. For example, in conjunction with FIG7 , the acquisition unit 801 is used to execute S701.
处理单元802，用于基于模拟发射信号以及各个发射支路的数字基带信号，得到参考信号。例如，结合图7，处理单元802用于执行S702。The processing unit 802 is configured to obtain a reference signal based on the analog transmission signal and the digital baseband signal of each transmission branch. For example, in conjunction with FIG7 , the processing unit 802 is configured to execute S702.
处理单元802，还用于基于参考信号，对一个或多个接收支路中的目标接收支路的数字接收信号进行干扰抵消处理，得到干扰抵消处理后的数字接收信号。例如，结合图7，处理单元 802用于执行S703。The processing unit 802 is further configured to perform interference cancellation processing on the digital received signal of the target receiving branch in one or more receiving branches based on the reference signal to obtain a digital received signal after the interference cancellation processing. 802 is used to execute S703.
在一些实施例中，处理单元802，用于：In some embodiments, the processing unit 802 is configured to:
基于目标发射支路的模拟发射信号，生成发射自干扰数字信号；generating a transmitting self-interference digital signal based on an analog transmitting signal of a target transmitting branch;
基于发射自干扰数字信号以及各个发射支路的数字基带信号，生成参考信号。A reference signal is generated based on the transmitted self-interference digital signal and the digital baseband signals of each transmit branch.
在一些实施例中，处理单元802，用于：In some embodiments, the processing unit 802 is configured to:
分别对各个发射支路的数字基带信号进行包括增益调整和时延调整的处理，得到各个发射支路的处理后的数字基带信号；Performing processing including gain adjustment and delay adjustment on the digital baseband signal of each transmitting branch respectively to obtain the processed digital baseband signal of each transmitting branch;
基于发射自干扰数字信号和各个发射支路的处理后的数字基带信号，生成参考信号。A reference signal is generated based on the transmitted self-interference digital signal and the processed digital baseband signals of each transmit branch.
在一些实施例中，处理单元802，用于：In some embodiments, the processing unit 802 is configured to:
对目标发射支路的模拟发射信号进行滤波处理，得到滤波处理后的模拟发射信号；Performing filtering processing on the analog transmission signal of the target transmission branch to obtain the analog transmission signal after filtering processing;
对滤波处理后的模拟发射信号进行射频处理，得到射频处理后的模拟发射信号；Performing radio frequency processing on the analog transmission signal after the filtering process to obtain the analog transmission signal after the radio frequency processing;
对射频处理后的模拟发射信号进行模数转换处理，得到发射自干扰数字信号。The analog transmission signal after RF processing is subjected to analog-to-digital conversion processing to obtain a transmission self-interference digital signal.
在采用硬件的形式实现上述集成的模块的功能的情况下，本公开实施例提供了上述实施例中所涉及的自干扰抵消装置的另一种结构。如图9所示，该自干扰抵消装置900包括：处理器902和总线904。在一些实施例中，该自干扰抵消装置还可以包括存储器901。在一些实施例中，该自干扰抵消装置还可以包括通信接口903。In the case of implementing the functions of the above-mentioned integrated modules in the form of hardware, the embodiment of the present disclosure provides another structure of the self-interference cancellation device involved in the above-mentioned embodiment. As shown in FIG9 , the self-interference cancellation device 900 includes: a processor 902 and a bus 904. In some embodiments, the self-interference cancellation device may also include a memory 901. In some embodiments, the self-interference cancellation device may also include a communication interface 903.
处理器902，可以是实现或执行结合本公开实施例所描述的各种示例性的逻辑方框，模块和电路。该处理器902可以是中央处理器，通用处理器，数字信号处理器，专用集成电路，现场可编程门阵列或者其他可编程逻辑器件、晶体管逻辑器件、硬件部件或者其任意组合。处理器902可以实现或执行结合本公开实施例所描述的各种示例性的逻辑方框，模块和电路。处理器902也可以是实现计算功能的组合，例如包含一个或多个微处理器组合，DSP和微处理器的组合等。The processor 902 may be a processor that implements or executes various exemplary logic blocks, modules, and circuits described in conjunction with the embodiments of the present disclosure. The processor 902 may be a central processing unit, a general-purpose processor, a digital signal processor, an application-specific integrated circuit, a field programmable gate array, or other programmable logic devices, transistor logic devices, hardware components, or any combination thereof. The processor 902 may be a processor that implements or executes various exemplary logic blocks, modules, and circuits described in conjunction with the embodiments of the present disclosure. The processor 902 may also be a combination that implements computing functions, such as a combination of one or more microprocessors, a combination of a DSP and a microprocessor, and the like.
通信接口903，用于与其他设备通过通信网络连接。该通信网络可以是以太网，无线接入网，无线局域网(Wireless Local Area Networks，WLAN)等。The communication interface 903 is used to connect with other devices through a communication network. The communication network can be Ethernet, wireless access network, wireless local area network (WLAN), etc.
存储器901，可以是只读存储器(Read-Only Memory，ROM)或可存储静态信息和指令的其他类型的静态存储设备，随机存取存储器(Random Access Memory，RAM)或者可存储信息和指令的其他类型的动态存储设备，也可以是电可擦可编程只读存储器(Electrically Erasable Programmable Read-Only Memory，EEPROM)、磁盘存储介质或者其他磁存储设备、或者能够用于携带或存储具有指令或数据结构形式的期望的程序代码并能够由计算机存取的任何其他介质，但不限于此。The memory 901 may be a read-only memory (ROM) or other types of static storage devices that can store static information and instructions, a random access memory (RAM) or other types of dynamic storage devices that can store information and instructions, or an electrically erasable programmable read-only memory (EEPROM), a disk storage medium or other magnetic storage device, or any other medium that can be used to carry or store the desired program code in the form of instructions or data structures and can be accessed by a computer, but is not limited to these.
作为一种示例，存储器901可以独立于处理器902存在，存储器901也可以通过总线904与处理器902相连接，用于存储指令或者程序代码。处理器902调用并执行存储器901中存储的指令或程序代码时，能够实现本公开实施例提供的自干扰抵消方法。As an example, the memory 901 may exist independently of the processor 902, and the memory 901 may also be connected to the processor 902 via a bus 904 for storing instructions or program codes. When the processor 902 calls and executes the instructions or program codes stored in the memory 901, the self-interference cancellation method provided in the embodiment of the present disclosure can be implemented.
作为另一种示例，存储器901也可以和处理器902集成在一起。As another example, the memory 901 may also be integrated with the processor 902 .
总线904，可以是扩展工业标准结构(Extended Industry Standard Architecture，EISA)总线等。总线904可以分为地址总线、数据总线、控制总线等。为便于表示，图9中仅用一条粗线表示，但并不表示仅有一根总线或一种类型的总线。The bus 904 may be an Extended Industry Standard Architecture (EISA) bus, etc. The bus 904 may be divided into an address bus, a data bus, a control bus, etc. For ease of representation, FIG9 only uses one thick line, but does not mean that there is only one bus or one type of bus.
本公开的一些实施例提供了一种计算机可读存储介质(例如，非暂态计算机可读存储介质)， 该计算机可读存储介质中存储有计算机程序指令，计算机程序指令在计算机上运行时，使得计算机执行如上述实施例中任一实施例所述的自干扰抵消方法。Some embodiments of the present disclosure provide a computer-readable storage medium (eg, a non-transitory computer-readable storage medium), The computer-readable storage medium stores computer program instructions. When the computer program instructions are executed on a computer, the computer executes the self-interference cancellation method as described in any of the above embodiments.
示例性地，上述计算机可读存储介质可以包括，但不限于：磁存储器件(例如，硬盘、软盘或磁带等)，光盘(例如，压缩盘(Compact Disk，CD)、数字通用盘(Digital Versatile Disk，DVD)等)，智能卡和闪存器件(例如，可擦写可编程只读存储器(Erasable Programmable Read-Only Memory，EPROM)、卡、棒或钥匙驱动器等)。本公开描述的各种计算机可读存储介质可代表用于存储信息的一个或多个设备和/或其它机器可读存储介质。术语“机器可读存储介质”可包括但不限于，无线信道和能够存储、包含和/或承载指令和/或数据的各种其它介质。Exemplarily, the above-mentioned computer-readable storage media may include, but are not limited to: magnetic storage devices (e.g., hard disks, floppy disks or magnetic tapes, etc.), optical disks (e.g., Compact Disks (CDs), Digital Versatile Disks (DVDs), etc.), smart cards and flash memory devices (e.g., Erasable Programmable Read-Only Memory (EPROMs), cards, sticks or key drives, etc.). The various computer-readable storage media described in the present disclosure may represent one or more devices and/or other machine-readable storage media for storing information. The term "machine-readable storage medium" may include, but is not limited to, wireless channels and various other media capable of storing, containing and/or carrying instructions and/or data.
本公开实施例提供一种包含指令的计算机程序产品，当该计算机程序产品在计算机上运行时，使得该计算机执行上述实施例中任一实施例所述的自干扰抵消方法。An embodiment of the present disclosure provides a computer program product comprising instructions. When the computer program product is run on a computer, the computer is enabled to execute the self-interference cancellation method described in any one of the above embodiments.
以上所述，仅为本公开的具体实施方式，但本公开的保护范围并不局限于此，任何在本公开揭露的技术范围内的变化或替换，都应涵盖在本公开的保护范围之内。因此，本公开的保护范围应该以权利要求的保护范围为准。 The above is only a specific implementation of the present disclosure, but the protection scope of the present disclosure is not limited thereto. Any changes or substitutions within the technical scope disclosed in the present disclosure should be included in the protection scope of the present disclosure. Therefore, the protection scope of the present disclosure should be based on the protection scope of the claims.

Claims (13)

  1. 一种信号收发装置，包括：A signal transceiver device, comprising:
    一个或多个发射支路，所述一个或多个发射支路用于对数字基带信号进行处理，输出模拟发射信号；One or more transmitting branches, the one or more transmitting branches are used to process the digital baseband signal and output an analog transmitting signal;
    一个或多个接收支路，所述一个或多个接收支路用于接收模拟接收信号；One or more receiving branches, the one or more receiving branches are used to receive analog receiving signals;
    参考信号生成电路，与所述一个或多个发射支路、所述一个或多个接收支路分别耦接，所述参考信号生成电路用于获取各个发射支路的数字基带信号，以及耦合得到所述一个或多个发射支路中目标发射支路的模拟发射信号；基于所述目标发射支路的模拟发射信号以及所述各个发射支路的数字基带信号，得到参考信号；将所述参考信号输出至目标接收支路，所述参考信号用于消除所述一个或多个发射支路对所述目标接收支路的干扰。A reference signal generating circuit is coupled to the one or more transmitting branches and the one or more receiving branches respectively, and the reference signal generating circuit is used to obtain the digital baseband signal of each transmitting branch, and to couple to obtain the analog transmitting signal of the target transmitting branch among the one or more transmitting branches; obtain a reference signal based on the analog transmitting signal of the target transmitting branch and the digital baseband signal of each transmitting branch; output the reference signal to the target receiving branch, and the reference signal is used to eliminate the interference of the one or more transmitting branches to the target receiving branch.
  2. 根据权利要求1所述的信号收发装置，其中，所述目标发射支路为所述一个或多个发射支路中的任意一个发射支路，所述目标接收支路为所述一个或多个接收支路中与所述目标发射支路对应的接收支路；The signal transceiver device according to claim 1, wherein the target transmitting branch is any one of the one or more transmitting branches, and the target receiving branch is a receiving branch of the one or more receiving branches corresponding to the target transmitting branch;
    所述参考信号生成电路，用于基于所述目标发射支路的模拟发射信号，得到发射自干扰数字信号；以所述发射自干扰数字信号以及所述各个发射支路的数字基带信号，得到所述参考信号。The reference signal generating circuit is used to obtain a transmitted self-interference digital signal based on the analog transmit signal of the target transmit branch; and obtain the reference signal using the transmitted self-interference digital signal and the digital baseband signals of each transmit branch.
  3. 根据权利要求2所述的信号收发装置，其中，所述参考信号生成电路包括：切换开关、自干扰提取模块以及参考信号生成模块；The signal transceiver device according to claim 2, wherein the reference signal generation circuit comprises: a switching switch, a self-interference extraction module and a reference signal generation module;
    所述切换开关，与所述一个或多个发射支路中各个发射支路的输出端、所述自干扰提取模块分别耦接，所述切换开关用于选中所述目标发射支路，并将所述目标发射支路的模拟发射信号耦合至所述自干扰提取模块；The switching switch is coupled to the output end of each of the one or more transmitting branches and the self-interference extraction module respectively, and the switching switch is used to select the target transmitting branch and couple the analog transmission signal of the target transmitting branch to the self-interference extraction module;
    所述自干扰提取模块用于接收所述目标发射支路的模拟发射信号；对所述目标发射支路的模拟发射信号进行处理，输出发射自干扰数字信号；The self-interference extraction module is used to receive the analog transmission signal of the target transmission branch; process the analog transmission signal of the target transmission branch, and output a transmission self-interference digital signal;
    所述参考信号生成模块，与所述一个或多个发射支路中各个发射支路的输入端、所述一个或多个接收支路、所述自干扰提取模块分别耦接，所述参考信号生成模块用于获取所述发射自干扰数字信号以及各个发射支路的数字基带信号；基于所述发射自干扰数字信号以及各个发射支路的数字基带信号，得到所述参考信号；将所述参考信号输出至所述目标接收支路。The reference signal generation module is respectively coupled to the input end of each transmitting branch in the one or more transmitting branches, the one or more receiving branches, and the self-interference extraction module. The reference signal generation module is used to obtain the transmitted self-interference digital signal and the digital baseband signal of each transmitting branch; obtain the reference signal based on the transmitted self-interference digital signal and the digital baseband signal of each transmitting branch; and output the reference signal to the target receiving branch.
  4. 根据权利要求3所述的信号收发装置，其中，所述参考信号生成模块用于：The signal transceiver device according to claim 3, wherein the reference signal generation module is used to:
    获取所述发射自干扰数字信号以及各个发射支路的数字基带信号；Acquire the transmitted self-interference digital signal and the digital baseband signal of each transmitting branch;
    分别对各个发射支路的数字基带信号进行包括增益调整和时延调整的处理，得到各个发射支路的处理后的数字基带信号；Performing processing including gain adjustment and delay adjustment on the digital baseband signal of each transmitting branch respectively to obtain the processed digital baseband signal of each transmitting branch;
    基于所述发射自干扰数字信号和各个发射支路的处理后的数字基带信号，得到所述参考信号；Obtaining the reference signal based on the transmitted self-interference digital signal and the processed digital baseband signals of each transmitting branch;
    将所述参考信号输出至所述目标接收支路。The reference signal is output to the target receiving branch.
  5. 根据权利要求3所述的信号收发装置，其中，所述自干扰提取模块包括：The signal transceiver device according to claim 3, wherein the self-interference extraction module comprises:
    第一子带滤波器，与所述切换开关耦接，所述第一子带滤波器用于接收所述目标发射支路的模拟发射信号；对所述目标发射支路的模拟发射信号进行滤波处理，输出滤波处理后的模拟发射信号；A first sub-band filter is coupled to the switch, and the first sub-band filter is used to receive the analog transmission signal of the target transmission branch; filter the analog transmission signal of the target transmission branch, and output the analog transmission signal after filtering;
    第一射频处理模块，与所述第一子带滤波器耦接，所述第一射频处理模块用于接收所述滤波处理后的模拟发射信号；对所述滤波处理后的模拟发射信号进行射频处理，输出射 频处理后的模拟发射信号；The first RF processing module is coupled to the first sub-band filter, and the first RF processing module is used to receive the analog transmission signal after the filtering process; perform RF processing on the analog transmission signal after the filtering process, and output a RF signal. Analog transmission signal after frequency processing;
    第一模数转换模块，与所述第一射频处理模块耦接，所述第一模数转换模块用于接收所述射频处理后的模拟发射信号；对所述射频处理后的模拟发射信号进行模数转换处理，输出所述发射自干扰数字信号。The first analog-to-digital conversion module is coupled to the first RF processing module, and is used to receive the analog transmit signal after the RF processing; perform analog-to-digital conversion on the analog transmit signal after the RF processing, and output the transmitted self-interference digital signal.
  6. 根据权利要求3至5任一项所述的信号收发装置，其中，所述接收支路包括：The signal transceiver device according to any one of claims 3 to 5, wherein the receiving branch comprises:
    第二子带滤波器，所述第二子带滤波器用于对所述接收支路接收到的模拟接收信号进行滤波处理，输出滤波处理后的模拟接收信号；a second sub-band filter, the second sub-band filter being used to filter the analog reception signal received by the reception branch and output the analog reception signal after the filtering process;
    第二射频处理模块，与所述第二子带滤波器耦接，所述第二射频处理模块用于接收所述滤波处理后的模拟接收信号；对所述滤波处理后的模拟接收信号进行射频处理，输出射频处理后的模拟接收信号；A second RF processing module is coupled to the second sub-band filter, and the second RF processing module is used to receive the analog received signal after the filtering process; perform RF processing on the analog received signal after the filtering process, and output the analog received signal after the RF processing;
    第二模数转换模块，与所述第二射频处理模块耦接，所述第二模数转换模块用于接收所述射频处理后的模拟接收信号；对所述射频处理后的模拟接收信号进行模数转换，输出数字接收信号；A second analog-to-digital conversion module is coupled to the second RF processing module, and the second analog-to-digital conversion module is used to receive the analog received signal after the RF processing; perform analog-to-digital conversion on the analog received signal after the RF processing, and output a digital received signal;
    数字抵消模块，与所述第二模数转换模块、所述参考信号生成模块分别耦接，所述数字抵消模块用于接收所述参考信号；基于所述参考信号，对所述数字接收信号进行干扰抵消处理，输出干扰抵消处理后的数字接收信号。A digital cancellation module is coupled to the second analog-to-digital conversion module and the reference signal generation module respectively, and is used to receive the reference signal; based on the reference signal, perform interference cancellation processing on the digital received signal, and output the digital received signal after the interference cancellation processing.
  7. 根据权利要求1至5任一项所述的信号收发装置，其中，所述发射支路包括：The signal transceiver device according to any one of claims 1 to 5, wherein the transmitting branch comprises:
    数模转换模块，所述数模转换模块用于对所述发射支路的数字基带信号进行数模转换，输出模拟基带信号；A digital-to-analog conversion module, the digital-to-analog conversion module is used to perform digital-to-analog conversion on the digital baseband signal of the transmitting branch and output an analog baseband signal;
    中频处理模块，与所述数模转换模块耦接，所述中频处理模块用于接收所述模拟基带信号；对所述模拟基带信号进行上变频处理，输出模拟中频信号；An intermediate frequency processing module is coupled to the digital-to-analog conversion module, and is used to receive the analog baseband signal; perform up-conversion processing on the analog baseband signal, and output an analog intermediate frequency signal;
    第三射频处理模块，与所述中频处理模块耦接，所述第三射频处理模块用于接收所述模拟中频信号；对所述模拟中频信号进行射频处理，输出模拟发射信号。The third RF processing module is coupled to the intermediate frequency processing module, and is used to receive the analog intermediate frequency signal; perform RF processing on the analog intermediate frequency signal, and output an analog transmission signal.
  8. 根据权利要求1至5任一项所述的信号收发装置，还包括一个或多个接收天线和一个或多个发射天线，所述接收天线与所述发射天线之间的距离处于预设距离范围内。The signal transceiver device according to any one of claims 1 to 5, further comprising one or more receiving antennas and one or more transmitting antennas, and the distance between the receiving antenna and the transmitting antenna is within a preset distance range.
  9. 一种自干扰抵消方法，包括：A self-interference cancellation method, comprising:
    获取一个或多个发射支路中各个发射支路的数字基带信号，以及所述一个或多个发射支路中目标发射支路的模拟发射信号；Acquire a digital baseband signal of each of the one or more transmitting branches, and an analog transmitting signal of a target transmitting branch of the one or more transmitting branches;
    基于所述模拟发射信号以及所述各个发射支路的数字基带信号，得到参考信号；基于所述参考信号，对一个或多个接收支路中的目标接收支路的数字接收信号进行干扰抵消处理，得到干扰抵消处理后的数字接收信号。A reference signal is obtained based on the analog transmit signal and the digital baseband signals of each transmit branch; based on the reference signal, interference cancellation processing is performed on the digital receive signal of the target receive branch in one or more receive branches to obtain a digital receive signal after interference cancellation processing.
  10. 根据权利要求9所述的方法，其中，所述基于所述模拟发射信号以及所述各个发射支路的数字基带信号，得到参考信号，包括：The method according to claim 9, wherein obtaining a reference signal based on the analog transmit signal and the digital baseband signals of each transmit branch comprises:
    基于所述目标发射支路的模拟发射信号，生成发射自干扰数字信号；Generating a transmission self-interference digital signal based on the analog transmission signal of the target transmission branch;
    基于所述发射自干扰数字信号以及所述各个发射支路的数字基带信号，生成所述参考信号。The reference signal is generated based on the transmitted self-interference digital signal and the digital baseband signals of each transmitting branch.
  11. 根据权利要求10所述的方法，其中，所述基于所述发射自干扰数字信号以及所述各个发射支路的数字基带信号，生成所述参考信号，包括：The method according to claim 10, wherein the generating the reference signal based on the transmitted self-interference digital signal and the digital baseband signals of each transmitting branch comprises:
    分别对各个发射支路的数字基带信号进行包括增益调整和时延调整的处理，得到各个发射支路的处理后的数字基带信号； Performing processing including gain adjustment and delay adjustment on the digital baseband signal of each transmitting branch respectively to obtain the processed digital baseband signal of each transmitting branch;
    基于所述发射自干扰数字信号和各个发射支路的处理后的数字基带信号，生成所述参考信号。The reference signal is generated based on the transmitted self-interference digital signal and the processed digital baseband signals of each transmission branch.
  12. 根据权利要求9或10所述的方法，其中，所述基于所述目标发射支路的模拟发射信号，生成发射自干扰数字信号，包括：The method according to claim 9 or 10, wherein the step of generating a transmitted self-interference digital signal based on the analog transmit signal of the target transmit branch comprises:
    对所述目标发射支路的模拟发射信号进行滤波处理，得到滤波处理后的模拟发射信号；Filtering the analog transmission signal of the target transmission branch to obtain a filtered analog transmission signal;
    对所述滤波处理后的模拟发射信号进行射频处理，得到射频处理后的模拟发射信号；Performing radio frequency processing on the analog transmission signal after the filtering process to obtain the analog transmission signal after the radio frequency processing;
    对所述射频处理后的模拟发射信号进行模数转换处理，得到所述发射自干扰数字信号。Perform analog-to-digital conversion on the analog transmit signal after the RF processing to obtain the transmit self-interference digital signal.
  13. 一种计算机可读存储介质，其中，所述计算机可读存储介质包括计算机指令；A computer-readable storage medium, wherein the computer-readable storage medium includes computer instructions;
    其中，当所述计算机指令在信号收发装置上运行时，使得所述信号收发装置执行如权利要求9至12任一项所述的自干扰抵消方法。 Wherein, when the computer instructions are executed on a signal transceiver, the signal transceiver executes the self-interference cancellation method as claimed in any one of claims 9 to 12.
PCT/CN2023/118853 2022-10-17 2023-09-14 Signal transceiving device, self-interference cancellation method, and computer readable storage medium WO2024082887A1 (en)

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