WO2024070245A1 - Surface-treated copper foil, copper-clad laminate plate, and printed wiring board - Google Patents

Surface-treated copper foil, copper-clad laminate plate, and printed wiring board Download PDF

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Publication number
WO2024070245A1
WO2024070245A1 PCT/JP2023/028811 JP2023028811W WO2024070245A1 WO 2024070245 A1 WO2024070245 A1 WO 2024070245A1 JP 2023028811 W JP2023028811 W JP 2023028811W WO 2024070245 A1 WO2024070245 A1 WO 2024070245A1
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Prior art keywords
copper foil
treatment layer
layer
treated copper
treated
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PCT/JP2023/028811
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French (fr)
Japanese (ja)
Inventor
啓介 楠木
友一 岩崎
俊行 古村
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Jx金属株式会社
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Publication of WO2024070245A1 publication Critical patent/WO2024070245A1/en

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    • CCHEMISTRY; METALLURGY
    • C25ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
    • C25DPROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
    • C25D3/00Electroplating: Baths therefor
    • C25D3/02Electroplating: Baths therefor from solutions
    • C25D3/38Electroplating: Baths therefor from solutions of copper
    • CCHEMISTRY; METALLURGY
    • C25ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
    • C25DPROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
    • C25D5/00Electroplating characterised by the process; Pretreatment or after-treatment of workpieces
    • C25D5/10Electroplating with more than one layer of the same or of different metals
    • C25D5/12Electroplating with more than one layer of the same or of different metals at least one layer being of nickel or chromium
    • CCHEMISTRY; METALLURGY
    • C25ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
    • C25DPROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
    • C25D5/00Electroplating characterised by the process; Pretreatment or after-treatment of workpieces
    • C25D5/10Electroplating with more than one layer of the same or of different metals
    • C25D5/12Electroplating with more than one layer of the same or of different metals at least one layer being of nickel or chromium
    • C25D5/14Electroplating with more than one layer of the same or of different metals at least one layer being of nickel or chromium two or more layers being of nickel or chromium, e.g. duplex or triplex layers
    • CCHEMISTRY; METALLURGY
    • C25ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
    • C25DPROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
    • C25D5/00Electroplating characterised by the process; Pretreatment or after-treatment of workpieces
    • C25D5/16Electroplating with layers of varying thickness
    • CCHEMISTRY; METALLURGY
    • C25ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
    • C25DPROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
    • C25D7/00Electroplating characterised by the article coated
    • C25D7/06Wires; Strips; Foils
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/03Use of materials for the substrate

Definitions

  • This disclosure relates to surface-treated copper foil, copper-clad laminates, and printed wiring boards.
  • Copper-clad laminates are widely used in a variety of applications, including flexible printed wiring boards.
  • Flexible printed wiring boards are manufactured by etching the copper foil of a copper-clad laminate to form a circuit pattern (also called a "conductor pattern"), and then mounting electronic components on the circuit pattern by connecting them with solder.
  • the causes of signal power loss (transmission loss) in electronic circuits can be roughly divided into two categories.
  • the first is conductor loss, i.e., loss due to copper foil.
  • the second is dielectric loss, i.e., loss due to resin substrate.
  • conductor loss i.e., loss due to copper foil.
  • dielectric loss i.e., loss due to resin substrate.
  • current has the property of flowing on the surface of a conductor (i.e., the skin effect). Therefore, if the copper foil surface is rough, the current will flow along a complex path. Therefore, in order to reduce the conductor loss of high-frequency signals, it is desirable to reduce the surface roughness of the copper foil.
  • the dielectric loss depends on the type of resin substrate. For this reason, in circuit boards through which high-frequency signals flow, it is desirable to use a resin substrate made of a low-dielectric material (e.g., liquid crystal polymer, low-dielectric polyimide). The dielectric loss is also affected by the adhesive used to bond the copper foil and the resin substrate. For this reason, it is desirable to bond the copper foil and the resin substrate without using an adhesive.
  • a resin substrate made of a low-dielectric material (e.g., liquid crystal polymer, low-dielectric polyimide).
  • the dielectric loss is also affected by the adhesive used to bond the copper foil and the resin substrate. For this reason, it is desirable to bond the copper foil and the resin substrate without using an adhesive.
  • Patent Document 1 proposes a method of providing a roughening treatment layer made of roughening particles on the copper foil and forming a silane coupling treatment layer on the outermost layer.
  • the adhesion between the copper foil and the resin substrate can be improved by the anchor effect of the roughening particles, but the skin effect can increase the conductor loss. For this reason, it is desirable to reduce the amount of roughening particles electrodeposited on the copper foil surface. On the other hand, if the amount of roughening particles electrodeposited on the copper foil surface is reduced, the anchoring effect of the roughening particles is reduced. As a result, sufficient adhesion between the copper foil and the resin substrate is not obtained.
  • silane coupling treatment layer has the effect of improving the adhesion between the copper foil and the resin substrate, depending on the type of the silane coupling treatment layer, the effect of improving the adhesion may not be sufficient.
  • circuit patterns are generally mounted by soldering on the circuit patterns formed by etching the copper foil of copper-clad laminates, but as the pitch of circuit patterns becomes finer, it is becoming more difficult to ensure reliable bonding with electronic components.
  • circuit patterns can melt during soldering, and solder heat resistance may not be sufficient.
  • the present invention has been made to solve the above-mentioned problems, and aims to provide a surface-treated copper foil that has improved adhesion to a resin substrate, particularly a resin substrate suitable for high-frequency applications, and is capable of forming a circuit pattern having excellent solder heat resistance.
  • Another object of the present invention is to provide a copper-clad laminate capable of forming a circuit pattern having excellent adhesion between a resin substrate, particularly a resin substrate suitable for high frequency applications, and a surface-treated copper foil and excellent solder heat resistance.
  • an object of the present invention is to provide a printed wiring board having a circuit pattern with excellent solder heat resistance and excellent adhesion between a resin substrate, particularly a resin substrate suitable for high frequency applications, and the circuit pattern.
  • the present inventors have conducted extensive research into surface-treated copper foils in order to solve the above problems, and as a result have found that the substantial volume Vmp of the peaks of the surface treatment layer is related to the complexity of the shape of the surface treatment layer (particularly the roughening particles in the roughening treatment layer), and that by controlling the substantial volume Vmp of the peaks of the surface treatment layer within a predetermined range, the anchor effect of the surface treatment layer can be enhanced, and the adhesion between the surface-treated copper foil and the resin substrate can be improved.
  • the inventors also discovered that the amount of Zn deposited in the surface treatment layer is related to the solder heat resistance of the circuit pattern formed from the surface-treated copper foil, and that by controlling the amount of Zn deposited within a predetermined range, the solder heat resistance of the circuit pattern can be improved.
  • the embodiments of the present invention have been completed based on these findings.
  • an embodiment of the present invention relates to a surface-treated copper foil having a copper foil and a surface treatment layer formed on at least one surface of the copper foil, the surface treatment layer having a substantial volume Vmp of a peak portion of 0.010 to 0.080 ⁇ m3 / ⁇ m2 and a Zn coating amount of 10 to 250 ⁇ g/ dm2 .
  • an embodiment of the present invention relates to a copper-clad laminate comprising the above-mentioned surface-treated copper foil and a resin base material adhered to the surface treatment layer of the surface-treated copper foil. Furthermore, in another aspect, an embodiment of the present invention relates to a printed wiring board having a circuit pattern formed by etching the surface-treated copper foil of the copper-clad laminate.
  • a surface-treated copper foil can be provided which has improved adhesion to a resin substrate, particularly a resin substrate suitable for high frequency applications, and which is capable of forming a circuit pattern having excellent solder heat resistance.
  • a copper-clad laminate can be provided which has excellent adhesion between a resin substrate, particularly a resin substrate suitable for high frequency applications, and a surface-treated copper foil, and which is capable of forming a circuit pattern having excellent solder heat resistance.
  • a printed wiring board can be provided that has a circuit pattern with excellent solder heat resistance and has excellent adhesion between a resin substrate, particularly a resin substrate suitable for high frequency applications, and the circuit pattern.
  • FIG. 1 is a graph showing a typical load curve of a surface treatment layer.
  • FIG. 1 is a cross-sectional view showing a schematic diagram of a surface-treated copper foil having a roughened layer on one side thereof, which is an example of an embodiment of the present invention.
  • the surface-treated copper foil according to the embodiment of the present invention has a copper foil and a surface treatment layer formed on at least one surface of the copper foil, and the surface treatment layer has a peak volume Vmp of 0.010 to 0.080 ⁇ m 3 / ⁇ m 2 and a Zn coating weight of 10 to 250 ⁇ g/dm 2 . According to the above-mentioned configuration, it is possible to realize a surface-treated copper foil which has improved adhesion to a resin substrate, particularly a resin substrate suitable for high frequency applications, and which is capable of forming a circuit pattern having excellent solder heat resistance.
  • the surface treatment layer may be formed on only one side of the copper foil, or on both sides of the copper foil.
  • the types of the surface treatment layer may be the same or different.
  • the types of surface treatment layers formed on both sides of the copper foil are different, for example, a surface treatment layer including a roughening layer is formed on one side of the copper foil, and a surface treatment layer not including a roughening layer is formed on the other side of the copper foil.
  • the surface shape of the surface treatment layer can be specified using a surface texture parameter, which is obtained by measuring the surface shape and analyzing a load curve calculated from the measurement data in accordance with ISO 25178-2:2012.
  • the area coverage ratio is a ratio obtained by dividing an area corresponding to a cross section of a three-dimensional object to be measured when the object is cut at a plane of a certain height by the area of the measurement field.
  • the object to be measured is assumed to be a copper foil or a surface treatment layer of a surface-treated copper foil.
  • the load curve is a curve that represents the load areal ratio at each height.
  • the height near the load areal ratio of 0% represents the height of the highest part of the object to be measured.
  • the height near the load areal ratio of 100% represents the height of the lowest part of the object to be measured.
  • FIG. 1 is a graph showing a typical load curve of a surface treatment layer.
  • the load curve can be used to express the volume of the solid part and the volume of the void part of the surface treatment layer.
  • the volume of the solid part corresponds to the volume of the part occupied by the substance of the measurement object in the measurement field of view.
  • the volume of the void part corresponds to the volume occupied by the space between the solid parts in the measurement field of view.
  • the load curve is divided into a valley portion, a core portion, and a peak portion, with the boundaries being the positions of the load areal ratios of 10% and 80%.
  • Vvv means the volume of the space in the valley of the surface treatment layer
  • Vvc means the volume of the space in the core of the surface treatment layer
  • Vmp means the volume of the substance in the peak of the surface treatment layer
  • Vmc means the volume of the substance in the core of the surface treatment layer.
  • Sk means the level difference of the core of the surface treatment layer (the difference between the upper limit level and the lower limit level of the core)
  • Spk means the average height of the peak of the surface treatment layer
  • Svk means the average depth of the valley of the surface treatment layer.
  • the peaks are the high parts of the object
  • the valleys are the low parts
  • the cores are the parts of the object that are not the peaks or valleys, that is, the parts that are close to the average height.
  • the volume Vmp of the peaks of the surface treatment layer (hereinafter, sometimes simply referred to as "Vmp") is related to the complexity of the shape of the surface treatment layer.
  • the volume Vmp is related to the complexity of the shape of the roughening particles that constitute the roughening layer.
  • the Vmp of the surface treatment layer is specified to be 0.010 to 0.080 ⁇ m 3 / ⁇ m 2. If the Vmp is within this range, the anchor effect of the surface treatment layer can be enhanced, and the adhesion between the surface-treated copper foil and the resin substrate is improved.
  • the Vmp of the surface treatment layer is 0.010 ⁇ m 3 / ⁇ m 2 or more, the complexity of the surface treatment layer is improved and the desired anchor effect can be obtained. If the Vmp of the surface treatment layer is 0.080 ⁇ m 3 / ⁇ m 2 or less, the transmission loss can be reduced. From the viewpoint of stably enhancing the anchor effect of the surface treatment layer, the Vmp of the surface treatment layer is preferably 0.020 to 0.060 ⁇ m 3 / ⁇ m 2 , and more preferably 0.026 to 0.038 ⁇ m 3 / ⁇ m 2 .
  • the surface treatment layer has a Zn coating weight of 10 to 250 ⁇ g/ dm2 .
  • the Zn coating weight of the surface treatment layer is preferably 30 to 220 ⁇ g/ dm2 , more preferably 50 to 220 ⁇ g/ dm2 , and even more preferably 82 to 200 ⁇ g/ dm2 .
  • the amount of Zn attached in the surface treatment layer can be measured by dissolving the surface treatment layer in 20% by mass nitric acid and performing quantitative analysis by atomic absorption spectrometry using an atomic absorption spectrophotometer (AA240FS, manufactured by VARIAN).
  • AA240FS atomic absorption spectrophotometer
  • the type of the surface treatment layer is not particularly limited as long as it satisfies the above conditions of the surface shape and Zn coating amount, and various surface treatment layers known in the art can be used.
  • the surface treatment layer include a roughening treatment layer, a chemical resistance treatment layer, a heat resistance treatment layer, a chromate treatment layer, a silane coupling treatment layer, etc. These layers may be used alone or in combination of two or more.
  • the surface treatment layer preferably contains a roughening treatment layer from the viewpoint of adhesion to the resin substrate.
  • the surface treatment layer contains one or more layers selected from the group consisting of a chemical resistance treatment layer, a heat resistance treatment layer, a chromate treatment layer, and a silane coupling treatment layer, it is preferable that these layers are provided on the roughening treatment layer.
  • the roughening treatment layer contains roughening particles.
  • the roughening particles may contain primary roughening particles and secondary roughening particles.
  • the secondary roughening particles may have a chemical composition different from that of the primary roughening particles.
  • a cover plating layer is formed on at least a part of the surface of the primary roughening particles.
  • FIG. 2 is a cross-sectional view that shows a schematic diagram of a surface-treated copper foil having a roughening layer on one side of the copper foil.
  • an example of an embodiment of the present invention includes a roughening treatment layer formed on one side of a copper foil (10).
  • the roughening treatment layer includes primary roughening particles (20), a cover plating layer (30) covering the primary roughening particles (20), and secondary roughening particles (40) formed on the cover plating layer (30). It is preferable that the primary roughening particles (20) covered with the cover plating layer (30) are substantially spherical, and the secondary roughening particles (40) are formed so as to spread out in a dendritic shape. It is considered that a surface treatment layer in which Vmp is controlled within the above range has such a cross-sectional structure.
  • the roughening particles may be formed from, but are not limited to, a single element selected from the group consisting of copper, nickel, cobalt, phosphorus, tungsten, arsenic, molybdenum, chromium and zinc, or an alloy containing two or more of these elements.
  • the primary roughening particles are preferably formed from copper or a copper alloy, especially copper.
  • the secondary roughening particles are preferably formed from an alloy containing copper, cobalt and nickel.
  • the cover plating layer is not particularly limited, but may be formed from copper, silver, gold, nickel, cobalt, zinc, etc. Among these, it is preferable that the cover plating layer is formed from copper.
  • the roughened layer can be formed, for example, by performing a primary roughening treatment to form primary roughening particles, followed by cover plating to form a cover plating layer, and then a secondary roughening treatment to form secondary roughening particles.
  • a primary roughening treatment to form primary roughening particles
  • cover plating to form a cover plating layer
  • secondary roughening treatment to form secondary roughening particles.
  • Each particle and layer can be formed by electroplating.
  • the primary roughening particles can be formed by electroplating using a plating solution containing a trace amount of a tungsten compound.
  • the cover plating layer and the secondary roughening particles can be formed by electroplating using a plating solution containing a predetermined component.
  • the tungsten compound is not particularly limited, but for example, sodium tungstate (Na 2 WO 4 ) can be used.
  • the content of the tungsten compound in the plating solution is preferably 1 ppm or more.
  • On the surface of the copper foil on which the roughening treatment layer is formed there are minute recesses such as oil pits, and the roughening particles may be too small or not formed around the recesses.
  • the upper limit of the content of the tungsten compound is not particularly limited, but it is preferably 20 ppm from the viewpoint of suppressing the increase in electrical resistance.
  • Plating solution composition 10-30 g/L Cu, 70-130 g/L sulfuric acid Plating solution temperature: 30-60° C.
  • Electroplating conditions current density 4.8 to 15 A/dm 2 , time 0.1 to 8 seconds
  • Plating solution composition 10-20 g/L Cu, 5-15 g/L Co, 5-15 g/L Ni Plating solution temperature: 30 to 50°C
  • Electroplating conditions current density 24-50 A/dm 2 , time 0.3-0.8 seconds
  • the chemical resistance layer and the heat resistance layer are not particularly limited and can be formed from materials known in the art. Since the chemical resistance layer may also function as a heat resistance layer, a single layer having both the functions of the chemical resistance layer and the heat resistance layer may be formed as the chemical resistance layer and the heat resistance layer.
  • the chemical resistance layer and/or heat resistance layer may be a layer containing one or more elements (which may be in any form such as metal, alloy, oxide, nitride, sulfide, etc.) selected from the group consisting of nickel, zinc, tin, cobalt, molybdenum, copper, tungsten, phosphorus, arsenic, chromium, vanadium, titanium, aluminum, gold, silver, platinum group elements, iron, and tantalum.
  • the chemical resistance layer is preferably a Co-Ni layer.
  • the heat resistance layer is preferably a Ni-Zn layer.
  • the chemical-resistant layer and heat-resistant layer can be formed by electroplating.
  • the conditions can be adjusted according to the electroplating equipment used and are not particularly limited, but the conditions for forming the chemical-resistant layer (Co-Ni layer) and heat-resistant layer (Ni-Zn layer) using a general electroplating equipment are as follows. Note that electroplating may be performed once or multiple times.
  • Plating solution composition 1-8 g/L Co, 5-20 g/L Ni Plating solution pH: 2 to 3
  • Electroplating conditions current density 1 to 20 A/dm 2 , time 0.3 to 0.6 seconds
  • Plating solution composition 1 to 30 g/L Ni, 1 to 30 g/L Zn Plating solution pH: 2 to 5 Plating solution temperature: 30 to 50°C
  • Electroplating conditions current density 0.1 to 10 A/dm 2 , time 0.1 to 5 seconds
  • the chromate treatment layer is not particularly limited, and can be formed from materials known in the art.
  • the term "chromate treatment layer” means a layer formed from a liquid containing chromic anhydride, chromic acid, dichromate, a chromate salt, or a dichromate salt.
  • the chromate-treated layer may be a layer containing one or more elements (which may be in any form such as metal, alloy, oxide, nitride, sulfide, etc.) selected from the group consisting of cobalt, iron, nickel, molybdenum, zinc, tantalum, copper, aluminum, phosphorus, tungsten, tin, arsenic, and titanium.
  • Examples of the chromate-treated layer include a chromate-treated layer treated with an aqueous solution of chromic anhydride or potassium dichromate, and a chromate-treated layer treated with a treatment solution containing chromic anhydride or potassium dichromate and zinc.
  • the chromate treatment layer can be formed by a known method such as immersion chromate treatment, electrolytic chromate treatment, etc.
  • the conditions are not particularly limited, but for example, the conditions for forming a general chromate treatment layer are as follows.
  • the chromate treatment may be performed once or multiple times.
  • Chromate solution composition 1-10 g/L K 2 Cr 2 O 7 , 0.01-10 g/L Zn Chromate solution pH: 2 to 5
  • Chromate solution temperature 30 to 55°C
  • Electrolysis conditions current density 0.1 to 10 A/dm 2 , time 0.1 to 5 seconds (in the case of electrolytic chromate treatment)
  • the silane coupling treatment layer is not particularly limited, and can be formed from a material known in the art.
  • the term "silane coupling treatment layer” means a layer formed with a silane coupling agent.
  • the silane coupling agent is not particularly limited, and can be one known in the art.
  • Examples of the silane coupling agent include amino-based silane coupling agents, epoxy-based silane coupling agents, mercapto-based silane coupling agents, methacryloxy-based silane coupling agents, vinyl-based silane coupling agents, imidazole-based silane coupling agents, and triazine-based silane coupling agents. Among these, amino-based silane coupling agents and epoxy-based silane coupling agents are preferred.
  • the above silane coupling agents can be used alone or in combination of two or more.
  • a representative method for forming the silane coupling treatment layer is to apply a 1 to 3 volume % aqueous solution of the above-mentioned silane coupling agent and dry it to form the silane coupling treatment layer.
  • the copper foil is not particularly limited, and may be either an electrolytic copper foil or a rolled copper foil.
  • Electrolytic copper foil is generally produced by electrolytically depositing copper from a copper sulfate plating bath onto a titanium or stainless steel drum, and has a flat S-side (shine side) formed on the rotating drum side and an M-side (matte side) formed on the opposite side of the S-side.
  • the M-side of electrolytic copper foil generally has minute irregularities.
  • the S-side of electrolytic copper foil has minute irregularities due to the transfer of polishing streaks formed by the rotating drum during polishing.
  • the rolled copper foil has minute irregularities on its surface due to the formation of oil pits by the rolling oil during rolling.
  • the material of the copper foil is not particularly limited, but when the copper foil is rolled copper foil, high purity copper such as tough pitch copper (JIS H3100 alloy number C1100) and oxygen-free copper (JIS H3100 alloy number C1020 or JIS H3510 alloy number C1011) that are usually used as circuit patterns for printed wiring boards can be used.
  • high purity copper such as tough pitch copper (JIS H3100 alloy number C1100) and oxygen-free copper (JIS H3100 alloy number C1020 or JIS H3510 alloy number C1011) that are usually used as circuit patterns for printed wiring boards can be used.
  • copper alloys such as copper containing Sn, copper containing Ag, copper alloys containing Cr, Zr, or Mg, and Corson copper alloys containing Ni and Si can also be used.
  • the term "copper foil” is a concept that includes copper alloy foil.
  • the rolled copper foil may have a composition containing 99.0 mass% or more of Cu, 0.003 to 0.825 mass% of one or more elements selected from the group consisting of P, Ti, Sn, Ni, Be, Zn, In, and Mg, with the balance being unavoidable impurities.
  • the rolled copper foil may also have a composition containing 99.9 mass% or more of Cu, 0.0005 mass% to 0.0220 mass% of P, with the balance being unavoidable impurities.
  • the rolled copper foil may have a composition containing 99.0 mass% or more of Cu, with the balance being unavoidable impurities.
  • the copper foil when the copper foil is a rolled copper foil, the average crystal grain size may be 0.5 to 4.0 ⁇ m and the tensile strength in the rolling direction may be 235 to 290 MPa. Furthermore, the rolled copper foil may have a conductivity of 75% IACS or more. The conductivity of the copper foil can be measured at room temperature (25° C.) by a four-terminal method in accordance with JIS H0505 (1975).
  • the thickness of the copper foil is not particularly limited, but can be, for example, 1 to 1000 ⁇ m, 1 to 500 ⁇ m, 1 to 300 ⁇ m, 3 to 100 ⁇ m, 5 to 70 ⁇ m, 6 to 35 ⁇ m, or 9 to 18 ⁇ m.
  • the surface-treated copper foil having the above-mentioned configuration can be manufactured according to a method known in the art.
  • the surface property parameters such as Vmp of the surface treatment layer can be controlled by adjusting the formation conditions of the surface treatment layer, in particular the formation conditions of the roughening treatment layer described above.
  • the amount of Zn attached to the surface treatment layer can be controlled by adjusting the type of surface treatment layer.
  • the surface-treated copper foil according to the embodiment of the present invention has a surface treatment layer with a Vmp controlled to 0.010 to 0.080 ⁇ m 3 / ⁇ m 2 and a Zn coating weight controlled to 10 to 250 ⁇ g/dm 2 , thereby improving adhesion to resin substrates, particularly resin substrates suitable for high frequency applications, and enabling the formation of a circuit pattern with excellent solder heat resistance.
  • a copper-clad laminate according to an embodiment of the present invention comprises the above-mentioned surface-treated copper foil and a resin substrate adhered to the surface treatment layer of the surface-treated copper foil.
  • This copper-clad laminate can be produced by adhering a resin substrate to the surface-treated layer of the above-mentioned surface-treated copper foil.
  • the resin substrate is not particularly limited, and can be one known in the art. Examples of the resin substrate include paper-based phenolic resin, paper-based epoxy resin, synthetic fiber cloth-based epoxy resin, glass cloth/paper composite substrate epoxy resin, glass cloth/glass nonwoven fabric composite substrate epoxy resin, glass cloth-based epoxy resin, polyester film, polyimide resin, liquid crystal polymer, fluororesin, etc. Among these, polyimide resin is preferred as the resin substrate.
  • resin substrates particularly suitable for high frequency applications include resin substrates formed from low dielectric materials.
  • low dielectric materials include liquid crystal polymers, low dielectric polyimides, fluororesins, etc.
  • the low dielectric material may be, for example, a material having a dielectric constant of 3.5 or less at 1 MHz.
  • the low dielectric material suitable for high frequency applications may be a material having a dielectric constant of 3.4 or less at 30 GHz.
  • the method for bonding the surface-treated copper foil to the resin substrate is not particularly limited and may be any method known in the art.
  • the surface-treated copper foil and the resin substrate may be laminated and then thermocompressed.
  • the copper-clad laminate produced as described above can be used in the production of printed wiring boards.
  • the copper-clad laminate according to the embodiment of the present invention uses the above-mentioned surface-treated copper foil, and therefore has excellent adhesion to resin substrates, particularly resin substrates suitable for high-frequency applications, and can form circuit patterns with excellent solder heat resistance.
  • a printed wiring board includes a circuit pattern formed by etching the surface-treated copper foil of the above-mentioned copper-clad laminate.
  • This printed wiring board can be produced by etching the surface-treated copper foil of the above-mentioned copper-clad laminate to form a circuit pattern.
  • the method for forming the circuit pattern is not particularly limited, and known methods such as a subtractive method, a semi-additive method, etc. can be used. Among these, the subtractive method is preferred as the method for forming the circuit pattern.
  • a printed wiring board is manufactured by the subtractive method, it is preferably carried out as follows. First, a resist is applied to the surface of the surface-treated copper foil of a copper-clad laminate, and a predetermined resist pattern is formed by exposing and developing it. Next, the surface-treated copper foil in the portion where the resist pattern is not formed (i.e., the unnecessary portion) is removed by etching to form a circuit pattern. Finally, the resist pattern on the surface-treated copper foil is removed.
  • the conditions for this subtractive method are not particularly limited, and the method can be carried out according to the conditions known in the art.
  • the printed wiring board according to the embodiment of the present invention uses the above-mentioned copper-clad laminate, and therefore has a circuit pattern with excellent solder heat resistance, and has excellent adhesion between the resin substrate, particularly the resin substrate suitable for high frequency applications, and the circuit pattern.
  • Example 1 A rolled copper foil (HG foil manufactured by JX Metals Corporation) having a thickness of 12 ⁇ m was prepared. Both sides of the copper foil were degreased and pickled, and then a roughening treatment layer, a chemical resistance treatment layer (Co—Ni layer), a chromate treatment layer, and a silane coupling treatment layer were sequentially formed as surface treatment layers on one side (hereinafter referred to as the “first side”) to obtain a surface-treated copper foil.
  • the conditions for forming each treatment layer were as follows.
  • Plating solution composition 20 g/L Cu, 100 g/L sulfuric acid Plating solution temperature: 50° C.
  • Plating solution composition 15.5 g/L Cu, 7.5 g/L Co, 9.5 g/L Ni Plating solution temperature: 50°C
  • Electroplating conditions current density 33.3 A/dm 2 , time 0.55 seconds
  • Chromate Treatment Layer/First Surface ⁇ Conditions for Forming Electrolytic Chromate Treatment Layer>
  • Chromate solution composition 3 g/L K2Cr2O7 , 0.33 g/L Zn Chromate solution pH: 3.7 Chromate solution temperature: 55°C
  • Electrolysis conditions current density 0.64 A/dm 2 , time 0.90 seconds
  • Number of chromate treatments 2 times
  • Silane coupling treatment layer/first surface A 1.2% by volume aqueous solution of N-2-(aminoethyl)-3-aminopropyltrimethoxysilane was applied and dried to form a silane coupling treatment layer.
  • Example 2 A surface-treated copper foil was obtained under the same conditions as in Example 1, except that the electroplating conditions for forming the chromate treatment layer on the first surface were changed to a current density of 1.0 A/dm 2 .
  • Example 3 A surface-treated copper foil was obtained under the same conditions as in Example 1, except that the electroplating conditions for forming the chromate treatment layer on the first surface were changed to a current density of 1.4 A/dm 2 .
  • Example 1 A surface-treated copper foil was obtained under the same conditions as in Example 1, except that in forming the chromate treatment layer on the first surface, the foil was immersed in the chromate solution without applying an electric current.
  • the surface-treated copper foils obtained in the above Examples and Comparative Examples were evaluated as follows. ⁇ Measurement of Zn Adhesion Amount on Surface Treatment Layer (First Side)> The amount of Zn attached in the surface treatment layer (first side) was measured by dissolving the surface treatment layer (first side) in 20 mass% nitric acid and performing quantitative analysis by atomic absorption spectrometry using an atomic absorption spectrophotometer (AA240FS, manufactured by VARIAN).
  • AA240FS atomic absorption spectrophotometer
  • the measurement was performed using a MiniScan (registered trademark) EZ Model 4000L manufactured by HunterLab Co., Ltd., in accordance with JIS Z8730:2009 to measure L*, a*, and b* of the CIE L*a*b* color system.
  • the measurement target surface of the surface-treated copper foil obtained in the above examples and comparative examples was pressed against the photosensitive part of the measurement device, and measurements were performed while preventing light from entering from the outside.
  • the measurements of L*, a*, and b* were performed based on the geometric condition C of JIS Z8722:2009.
  • the main conditions of the measurement device are as follows.
  • ⁇ Peel strength> After laminating the surface-treated copper foil (first surface side) with a resin substrate formed from a low dielectric material, a circuit having a width of 3 mm was formed in the MD direction (longitudinal direction of the rolled copper foil). The formation of the circuit was carried out according to a normal method. Next, the strength (MD 180° peel strength) when the circuit (surface-treated copper foil) was peeled off from the surface of the resin substrate at a speed of 50 mm/min in a 180° direction, i.e., in the MD direction, was measured in accordance with JIS C6471:1995. The measurement was carried out five times, and the average value was taken as the peel strength result. If the peel strength is 0.60 kgf/cm or more, it can be said that the adhesion between the circuit (surface-treated copper foil) and the resin substrate is good.
  • the surface-treated copper foils of Examples 1 to 3 in which the Vmp of the surface treatment layer was in the range of 0.010 to 0.080 ⁇ m 3 / ⁇ m 2 and the Zn coating weight was in the range of 10 to 250 ⁇ g/dm 2 , had high peel strength and high maximum solder temperature (and also had good solder heat resistance).
  • the surface-treated copper foil of Comparative Example 1 had an excessively small amount of Zn attached, and therefore the maximum soldering temperature was low (solder heat resistance was insufficient).
  • a surface-treated copper foil that has improved adhesion to a resin substrate, particularly a resin substrate suitable for high frequency applications, and that is capable of forming a circuit pattern with excellent solder heat resistance.
  • a copper-clad laminate that has excellent adhesion between a resin substrate, particularly a resin substrate suitable for high frequency applications, and the surface-treated copper foil, and that is capable of forming a circuit pattern with excellent solder heat resistance.
  • a printed wiring board that has a circuit pattern with excellent solder heat resistance, and that has excellent adhesion between a resin substrate, particularly a resin substrate suitable for high frequency applications, and the circuit pattern.
  • the embodiment of the present invention can have the following aspects.
  • the surface-treated layer has a peak volume Vmp of 0.010 to 0.080 ⁇ m 3 / ⁇ m 2 and a Zn coating weight of 10 to 250 ⁇ g/dm 2 .
  • the surface-treated copper foil according to [1], wherein the peaks have a substantial volume Vmp of 0.020 to 0.060 ⁇ m 3 / ⁇ m 2 .
  • a copper-clad laminate comprising the surface-treated copper foil according to any one of [1] to [7] and a resin base material bonded to the surface treatment layer of the surface-treated copper foil.
  • a printed wiring board comprising a circuit pattern formed by etching the surface-treated copper foil of the copper-clad laminate according to [8].

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Abstract

Provided is a surface-treated copper foil having a copper foil and a surface-treatment layer formed on at least one surface of the copper foil. The surface-treatment layer has a peak material volume Vmp of 0.010-0.080 µm3/µm2 and has a Zn deposition amount of 10-250 µg/dm2.

Description

表面処理銅箔、銅張積層板及びプリント配線板Surface-treated copper foil, copper-clad laminates and printed wiring boards
 本開示は、表面処理銅箔、銅張積層板及びプリント配線板に関する。 This disclosure relates to surface-treated copper foil, copper-clad laminates, and printed wiring boards.
 銅張積層板は、フレキシブルプリント配線板などの各種用途において広く用いられている。フレキシブルプリント配線板は、銅張積層板の銅箔をエッチングして回路パターン(「導体パターン」とも称される)を形成し、回路パターン上に電子部品をはんだで接続して実装することによって製造される。 Copper-clad laminates are widely used in a variety of applications, including flexible printed wiring boards. Flexible printed wiring boards are manufactured by etching the copper foil of a copper-clad laminate to form a circuit pattern (also called a "conductor pattern"), and then mounting electronic components on the circuit pattern by connecting them with solder.
 近年、パソコン、モバイル端末などの電子機器では、通信の高速化及び大容量化に伴い、電気信号の高周波化が進んでおり、これに対応可能なフレキシブルプリント配線板が求められている。特に、電気信号の周波数は、高周波になるほど信号電力の損失(減衰)が大きくなり、データが読み取り難くなる。このため、信号電力の損失を低減することが求められている。 In recent years, electronic devices such as personal computers and mobile terminals have been using higher frequencies for electrical signals in line with faster and larger capacity communications, and flexible printed wiring boards that can accommodate this are in demand. In particular, the higher the frequency of the electrical signal, the greater the loss (attenuation) of signal power, making it more difficult to read data. For this reason, there is a demand to reduce signal power loss.
 電子回路における信号電力の損失(伝送損失)が起こる原因は大きく二つに分けることができる。その一は、導体損失、すなわち銅箔による損失である。その二は、誘電体損失、すなわち樹脂基材による損失である。
 高周波域では、電流は導体の表面を流れるという特性(すなわち、表皮効果)を有する。このため、銅箔表面が粗いと、複雑な経路を辿って電流が流れることになる。したがって、高周波信号の導体損失を少なくするためには、銅箔の表面粗さを小さくすることが望ましい。
 以下、本明細書において、単に「伝送損失」及び「導体損失」と記載した場合は、「高周波信号の伝送損失」及び「高周波信号の導体損失」を主に意味する。
The causes of signal power loss (transmission loss) in electronic circuits can be roughly divided into two categories. The first is conductor loss, i.e., loss due to copper foil. The second is dielectric loss, i.e., loss due to resin substrate.
At high frequencies, current has the property of flowing on the surface of a conductor (i.e., the skin effect). Therefore, if the copper foil surface is rough, the current will flow along a complex path. Therefore, in order to reduce the conductor loss of high-frequency signals, it is desirable to reduce the surface roughness of the copper foil.
Hereinafter, in this specification, when the terms "transmission loss" and "conductor loss" are simply mentioned, they mainly mean "transmission loss of a high-frequency signal" and "conductor loss of a high-frequency signal".
 誘電体損失は、樹脂基材の種類に依存する。このため、高周波信号が流れる回路基板においては、低誘電材料(例えば、液晶ポリマー、低誘電ポリイミド)から形成された樹脂基材を用いることが望ましい。また、誘電体損失は、銅箔と樹脂基材との間を接着する接着剤によっても影響を受ける。このため、銅箔と樹脂基材との間は接着剤を用いずに接着することが望ましい。
 そこで、銅箔と樹脂基材との間を接着剤なしに接着するために、銅箔の少なくとも一方の面に表面処理層を形成することが提案されている。例えば、特許文献1には、銅箔上に粗化粒子から形成される粗化処理層を設けるとともに、最表層にシランカップリング処理層を形成する方法が提案されている。
The dielectric loss depends on the type of resin substrate. For this reason, in circuit boards through which high-frequency signals flow, it is desirable to use a resin substrate made of a low-dielectric material (e.g., liquid crystal polymer, low-dielectric polyimide). The dielectric loss is also affected by the adhesive used to bond the copper foil and the resin substrate. For this reason, it is desirable to bond the copper foil and the resin substrate without using an adhesive.
Therefore, in order to bond the copper foil and the resin substrate without using an adhesive, it has been proposed to form a surface treatment layer on at least one side of the copper foil.For example, Patent Document 1 proposes a method of providing a roughening treatment layer made of roughening particles on the copper foil and forming a silane coupling treatment layer on the outermost layer.
特開2012-112009号公報JP 2012-112009 A
 銅箔表面が粗化処理されていると、粗化粒子によるアンカー効果によって、銅箔と樹脂基材との間の接着性を高めることができるが、表皮効果によって導体損失を増大させることがある。このため、銅箔表面に電着させる粗化粒子を少なくすることが望ましい。
 他方、銅箔表面に電着させる粗化粒子を少なくすると、粗化粒子によるアンカー効果が低下する。その結果、銅箔と樹脂基材との接着性が十分に得られない。特に、液晶ポリマー、低誘電ポリイミドなどの低誘電材料から形成された樹脂基材は、従来の樹脂基材よりも銅箔と接着し難いため、銅箔と樹脂基材との間の接着性を高める手法の開発が望まれている。
 また、シランカップリング処理層は、銅箔と樹脂基材との間の接着性を向上させる効果を有するものの、その種類によっては、接着性の向上効果が十分ではないこともある。
When the copper foil surface is roughened, the adhesion between the copper foil and the resin substrate can be improved by the anchor effect of the roughening particles, but the skin effect can increase the conductor loss. For this reason, it is desirable to reduce the amount of roughening particles electrodeposited on the copper foil surface.
On the other hand, if the amount of roughening particles electrodeposited on the copper foil surface is reduced, the anchoring effect of the roughening particles is reduced. As a result, sufficient adhesion between the copper foil and the resin substrate is not obtained. In particular, resin substrates made of low-dielectric materials such as liquid crystal polymers and low-dielectric polyimides are more difficult to adhere to copper foil than conventional resin substrates, so there is a need to develop a method for improving adhesion between the copper foil and the resin substrate.
Although the silane coupling treatment layer has the effect of improving the adhesion between the copper foil and the resin substrate, depending on the type of the silane coupling treatment layer, the effect of improving the adhesion may not be sufficient.
 さらに、銅張積層板の銅箔をエッチングして形成される回路パターンには、電子部品がはんだ付けによって一般に実装されるが、回路パターンのファインピッチ化に伴い、電子部品との接合信頼性の確保が難しくなっている。特に、回路パターンは、はんだ付けの際に溶解してしまうことがあり、はんだ耐熱性が十分であるとはいえないことがある。 Furthermore, electronic components are generally mounted by soldering on the circuit patterns formed by etching the copper foil of copper-clad laminates, but as the pitch of circuit patterns becomes finer, it is becoming more difficult to ensure reliable bonding with electronic components. In particular, circuit patterns can melt during soldering, and solder heat resistance may not be sufficient.
 本発明の実施形態は、上記のような問題を解決するためになされたものである。本発明の実施形態は、一つの側面において、樹脂基材、特に高周波用途に好適な樹脂基材との接着性を高めるとともに、はんだ耐熱性に優れた回路パターンを形成することが可能な表面処理銅箔を提供することを目的とする。
 また、本発明の実施形態は、別の側面において、樹脂基材、特に高周波用途に好適な樹脂基材と表面処理銅箔との間の接着性に優れ、はんだ耐熱性に優れた回路パターンを形成することが可能な銅張積層板を提供することを目的とする。
 さらに、本発明の実施形態は、別の側面において、はんだ耐熱性に優れた回路パターンを備え、樹脂基材、特に高周波用途に好適な樹脂基材と回路パターンとの間の接着性に優れたプリント配線板を提供することを目的とする。
The present invention has been made to solve the above-mentioned problems, and aims to provide a surface-treated copper foil that has improved adhesion to a resin substrate, particularly a resin substrate suitable for high-frequency applications, and is capable of forming a circuit pattern having excellent solder heat resistance.
Another object of the present invention is to provide a copper-clad laminate capable of forming a circuit pattern having excellent adhesion between a resin substrate, particularly a resin substrate suitable for high frequency applications, and a surface-treated copper foil and excellent solder heat resistance.
Furthermore, in another aspect, an object of the present invention is to provide a printed wiring board having a circuit pattern with excellent solder heat resistance and excellent adhesion between a resin substrate, particularly a resin substrate suitable for high frequency applications, and the circuit pattern.
 本発明者らは、上記の問題を解決すべく表面処理銅箔について鋭意研究を行った結果、表面処理層の山部の実体部体積Vmpが、表面処理層(特に、粗化処理層における粗化粒子)の形状の複雑性と関係しており、表面処理層の山部の実体部体積Vmpを所定の範囲に制御することにより、表面処理層によるアンカー効果を高め、表面処理銅箔と樹脂基材との接着性を向上させ得ることを見出した。
 また、本発明者らは、表面処理層のZn付着量が、表面処理銅箔から形成される回路パターンのはんだ耐熱性と関係しており、Zn付着量を所定の範囲に制御することにより、回路パターンのはんだ耐熱性を向上させ得ることを見出した。
 本発明の実施形態は、このような知見に基づいて完成されたものである。
The present inventors have conducted extensive research into surface-treated copper foils in order to solve the above problems, and as a result have found that the substantial volume Vmp of the peaks of the surface treatment layer is related to the complexity of the shape of the surface treatment layer (particularly the roughening particles in the roughening treatment layer), and that by controlling the substantial volume Vmp of the peaks of the surface treatment layer within a predetermined range, the anchor effect of the surface treatment layer can be enhanced, and the adhesion between the surface-treated copper foil and the resin substrate can be improved.
The inventors also discovered that the amount of Zn deposited in the surface treatment layer is related to the solder heat resistance of the circuit pattern formed from the surface-treated copper foil, and that by controlling the amount of Zn deposited within a predetermined range, the solder heat resistance of the circuit pattern can be improved.
The embodiments of the present invention have been completed based on these findings.
 すなわち、本発明の実施形態は、一つの側面において、銅箔と、前記銅箔の少なくとも一方の面に形成された表面処理層とを有し、前記表面処理層は、山部の実体部体積Vmpが0.010~0.080μm3/μm2であり、且つZn付着量が10~250μg/dm2である、表面処理銅箔に関する。 That is, in one aspect, an embodiment of the present invention relates to a surface-treated copper foil having a copper foil and a surface treatment layer formed on at least one surface of the copper foil, the surface treatment layer having a substantial volume Vmp of a peak portion of 0.010 to 0.080 μm3 / μm2 and a Zn coating amount of 10 to 250 μg/ dm2 .
 また、本発明の実施形態は、別の側面において、前記表面処理銅箔と、前記表面処理銅箔の前記表面処理層に接着された樹脂基材とを備える銅張積層板に関する。
 さらに、本発明の実施形態は、別の側面において、前記銅張積層板の前記表面処理銅箔をエッチングして形成された回路パターンを備えるプリント配線板に関する。
In another aspect, an embodiment of the present invention relates to a copper-clad laminate comprising the above-mentioned surface-treated copper foil and a resin base material adhered to the surface treatment layer of the surface-treated copper foil.
Furthermore, in another aspect, an embodiment of the present invention relates to a printed wiring board having a circuit pattern formed by etching the surface-treated copper foil of the copper-clad laminate.
 本発明の実施形態によれば、一つの側面において、樹脂基材、特に高周波用途に好適な樹脂基材との接着性を高めるとともに、はんだ耐熱性に優れた回路パターンを形成することが可能な表面処理銅箔を提供することができる。
 また、本発明の実施形態によれば、別の側面において、樹脂基材、特に高周波用途に好適な樹脂基材と表面処理銅箔との間の接着性に優れ、はんだ耐熱性に優れた回路パターンを形成することが可能な銅張積層板を提供することができる。
 さらに、本発明の実施形態によれば、別の側面において、はんだ耐熱性に優れた回路パターンを備え、樹脂基材、特に高周波用途に好適な樹脂基材と回路パターンとの間の接着性に優れたプリント配線板を提供することができる。
According to an embodiment of the present invention, in one aspect, a surface-treated copper foil can be provided which has improved adhesion to a resin substrate, particularly a resin substrate suitable for high frequency applications, and which is capable of forming a circuit pattern having excellent solder heat resistance.
According to another aspect of the present invention, a copper-clad laminate can be provided which has excellent adhesion between a resin substrate, particularly a resin substrate suitable for high frequency applications, and a surface-treated copper foil, and which is capable of forming a circuit pattern having excellent solder heat resistance.
Furthermore, according to another aspect of the present invention, a printed wiring board can be provided that has a circuit pattern with excellent solder heat resistance and has excellent adhesion between a resin substrate, particularly a resin substrate suitable for high frequency applications, and the circuit pattern.
表面処理層の典型的な負荷曲線を示すグラフである。1 is a graph showing a typical load curve of a surface treatment layer. 本発明の実施形態の一例である、銅箔の一方の面に粗化処理層を有する表面処理銅箔を模式的に示した断面図である。FIG. 1 is a cross-sectional view showing a schematic diagram of a surface-treated copper foil having a roughened layer on one side thereof, which is an example of an embodiment of the present invention.
 以下、本発明の好適な実施形態について具体的に説明するが、本発明はこれらに限定されて解釈されるべきものではなく、本発明の要旨を逸脱しない限りにおいて、当業者の知識に基づいて、種々の変更、改良などを行うことができる。以下の実施形態に開示されている複数の構成要素は、適宜な組み合わせにより、種々の発明を形成できる。例えば、以下の実施形態に示される全構成要素からいくつかの構成要素を削除してもよいし、異なる実施形態の構成要素を適宜組み合わせてもよい。 Below, preferred embodiments of the present invention are specifically described, but the present invention should not be interpreted as being limited to these, and various modifications and improvements can be made based on the knowledge of those skilled in the art as long as they do not deviate from the gist of the present invention. The multiple components disclosed in the following embodiments can be combined appropriately to form various inventions. For example, some components may be deleted from all the components shown in the following embodiments, or components from different embodiments may be combined appropriately.
 本発明の実施形態に係る表面処理銅箔は、銅箔と、銅箔の少なくとも一方の面に形成された表面処理層とを有し、当該表面処理層は、山部の実体部体積Vmpが0.010~0.080μm3/μm2であり、且つZn付着量が10~250μg/dm2である。
 以上の構成によれば、樹脂基材、特に高周波用途に好適な樹脂基材との接着性を高めるとともに、はんだ耐熱性に優れた回路パターンを形成することが可能な表面処理銅箔を実現できる。
The surface-treated copper foil according to the embodiment of the present invention has a copper foil and a surface treatment layer formed on at least one surface of the copper foil, and the surface treatment layer has a peak volume Vmp of 0.010 to 0.080 μm 3 /μm 2 and a Zn coating weight of 10 to 250 μg/dm 2 .
According to the above-mentioned configuration, it is possible to realize a surface-treated copper foil which has improved adhesion to a resin substrate, particularly a resin substrate suitable for high frequency applications, and which is capable of forming a circuit pattern having excellent solder heat resistance.
 表面処理層は、銅箔の一方の面のみに形成されていてもよいし、銅箔の両方の面に形成されていてもよい。銅箔の両方の面に表面処理層が形成される場合、表面処理層の種類は同一であっても異なっていてもよい。銅箔の両方の面に形成される表面処理層の種類が異なる場合、例えば、粗化処理層を含む表面処理層が銅箔の一方の面に形成され、粗化処理層を含まない表面処理層が銅箔の他方の面に形成される。 The surface treatment layer may be formed on only one side of the copper foil, or on both sides of the copper foil. When a surface treatment layer is formed on both sides of the copper foil, the types of the surface treatment layer may be the same or different. When the types of surface treatment layers formed on both sides of the copper foil are different, for example, a surface treatment layer including a roughening layer is formed on one side of the copper foil, and a surface treatment layer not including a roughening layer is formed on the other side of the copper foil.
 表面処理層の表面形状は、表面性状パラメータを用いて特定することができる。表面性状パラメータは、ISO 25178-2:2012に準拠し、表面形状を測定し、測定データから算出した負荷曲線を解析することによって得られる。
 負荷曲線の説明をするにあたり、まず、負荷面積率について説明する。
 負荷面積率とは、立体的な測定対象物を、ある高さの面で切断した場合の測定対象物の断面に相当する領域を測定視野の面積で除して求められる割合のことである。なお、本開示において、測定対象物としては、銅箔や表面処理銅箔の表面処理層などを想定している。
 負荷曲線は、各高さにおける負荷面積率を表した曲線である。負荷面積率0%付近の高さは測定対象物の最も高い部分の高さを表す。負荷面積率100%付近の高さは測定対象物の最も低い部分の高さを表す。
The surface shape of the surface treatment layer can be specified using a surface texture parameter, which is obtained by measuring the surface shape and analyzing a load curve calculated from the measurement data in accordance with ISO 25178-2:2012.
In explaining the load curve, first, the load area ratio will be explained.
The area coverage ratio is a ratio obtained by dividing an area corresponding to a cross section of a three-dimensional object to be measured when the object is cut at a plane of a certain height by the area of the measurement field. In this disclosure, the object to be measured is assumed to be a copper foil or a surface treatment layer of a surface-treated copper foil.
The load curve is a curve that represents the load areal ratio at each height. The height near the load areal ratio of 0% represents the height of the highest part of the object to be measured. The height near the load areal ratio of 100% represents the height of the lowest part of the object to be measured.
 図1は、表面処理層の典型的な負荷曲線を示すグラフである。
 負荷曲線を活用して、表面処理層の実体部体積及び空間部体積を表現することができる。実体部体積とは、測定視野において測定対象物の実体が占める部分の体積に相当する。空間部体積とは、測定視野における実体部分の間の空間が占める体積に相当する。
 本開示に記載の負荷曲線においては、負荷面積率が10%及び80%の位置を境界として、谷部、コア部及び山部に分けられる。
 図1を参照しつつ、本発明の実施形態に係る表面処理層に対応させて、各パラメータを説明する。Vvvは表面処理層の谷部の空間部体積、Vvcは表面処理層のコア部の空間部体積、Vmpは表面処理層の山部の実体部体積、Vmcは表面処理層のコア部の実体部体積をそれぞれ意味する。Skは表面処理層のコア部のレベル差(コア部の上限レベルと下限レベルとの差)、Spkは表面処理層の山部の平均高さ、Svkは表面処理層の谷部の平均深さをそれぞれ意味する。
 なお、山部とは、測定対象物の中でも高さが高い部分のことである。谷部とは、測定対象物の中でも高さが低い部分のことである。コア部とは、測定対象物のうち、山部と谷部以外の部分、すなわち、平均に近い高さの部分である。
FIG. 1 is a graph showing a typical load curve of a surface treatment layer.
The load curve can be used to express the volume of the solid part and the volume of the void part of the surface treatment layer. The volume of the solid part corresponds to the volume of the part occupied by the substance of the measurement object in the measurement field of view. The volume of the void part corresponds to the volume occupied by the space between the solid parts in the measurement field of view.
In the load curve described in the present disclosure, the load curve is divided into a valley portion, a core portion, and a peak portion, with the boundaries being the positions of the load areal ratios of 10% and 80%.
Each parameter will be described with reference to Fig. 1 in association with the surface treatment layer according to the embodiment of the present invention. Vvv means the volume of the space in the valley of the surface treatment layer, Vvc means the volume of the space in the core of the surface treatment layer, Vmp means the volume of the substance in the peak of the surface treatment layer, and Vmc means the volume of the substance in the core of the surface treatment layer. Sk means the level difference of the core of the surface treatment layer (the difference between the upper limit level and the lower limit level of the core), Spk means the average height of the peak of the surface treatment layer, and Svk means the average depth of the valley of the surface treatment layer.
The peaks are the high parts of the object, the valleys are the low parts, and the cores are the parts of the object that are not the peaks or valleys, that is, the parts that are close to the average height.
 表面処理層の山部の実体部体積Vmp(以下、単に「Vmp」と省略することがある)は、表面処理層の形状の複雑性と関係する。特に、表面処理層が粗化処理層を含む場合、粗化処理層を構成する粗化粒子の形状の複雑性と関係する。
 上記の通り、本発明の実施形態に係る表面処理銅箔において、表面処理層のVmpが0.010~0.080μm3/μm2に規定される。この範囲のVmpであれば、表面処理層のアンカー効果を高めることができるため、表面処理銅箔と樹脂基材との接着性が向上する。特に、表面処理層のVmpが0.010μm3/μm2以上であると、表面処理層の複雑性が向上し、所望のアンカー効果が得られる。表面処理層のVmpが0.080μm3/μm2以下であると、伝送損失を低減できる。
 表面処理層のVmpは、表面処理層のアンカー効果を安定して高める観点から、0.020~0.060μm3/μm2が好ましく、0.026~0.038μm3/μm2がより好ましい。
The volume Vmp of the peaks of the surface treatment layer (hereinafter, sometimes simply referred to as "Vmp") is related to the complexity of the shape of the surface treatment layer. In particular, when the surface treatment layer includes a roughening layer, the volume Vmp is related to the complexity of the shape of the roughening particles that constitute the roughening layer.
As described above, in the surface-treated copper foil according to the embodiment of the present invention, the Vmp of the surface treatment layer is specified to be 0.010 to 0.080 μm 3 /μm 2. If the Vmp is within this range, the anchor effect of the surface treatment layer can be enhanced, and the adhesion between the surface-treated copper foil and the resin substrate is improved. In particular, if the Vmp of the surface treatment layer is 0.010 μm 3 /μm 2 or more, the complexity of the surface treatment layer is improved and the desired anchor effect can be obtained. If the Vmp of the surface treatment layer is 0.080 μm 3 /μm 2 or less, the transmission loss can be reduced.
From the viewpoint of stably enhancing the anchor effect of the surface treatment layer, the Vmp of the surface treatment layer is preferably 0.020 to 0.060 μm 3 /μm 2 , and more preferably 0.026 to 0.038 μm 3 /μm 2 .
 表面処理層は、Zn付着量が10~250μg/dm2である。この範囲のZn付着量であれば、表面処理銅箔から形成される回路パターンのはんだ耐熱性を向上させることができる。表面処理層のZn付着量は、この効果を安定して向上させる観点から、30~220μg/dm2が好ましく、50~220μg/dm2がより好ましく、82~200μg/dm2が更に好ましい。
 表面処理層におけるZn付着量は、表面処理層を20質量%の硝酸に溶解し、原子吸光分光光度計(VARIAN社製、AA240FS)を用いて原子吸光法で定量分析を行うことによって測定することができる。銅箔の両面に表面処理層が設けられている場合は、測定対象ではない表面処理層の表面を保護した後に、測定対象の表面処理層を溶解させて定量分析を行う。
The surface treatment layer has a Zn coating weight of 10 to 250 μg/ dm2 . With a Zn coating weight within this range, the solder heat resistance of the circuit pattern formed from the surface-treated copper foil can be improved. From the viewpoint of stably improving this effect, the Zn coating weight of the surface treatment layer is preferably 30 to 220 μg/ dm2 , more preferably 50 to 220 μg/ dm2 , and even more preferably 82 to 200 μg/ dm2 .
The amount of Zn attached in the surface treatment layer can be measured by dissolving the surface treatment layer in 20% by mass nitric acid and performing quantitative analysis by atomic absorption spectrometry using an atomic absorption spectrophotometer (AA240FS, manufactured by VARIAN). When the surface treatment layer is provided on both sides of the copper foil, the surface of the surface treatment layer that is not the measurement target is protected, and then the surface treatment layer to be measured is dissolved and quantitatively analyzed.
 表面処理層の種類は、上記の表面形状及びZn付着量の条件を満たしていれば特に限定されず、当該技術分野において公知の各種表面処理層を用いることができる。
 表面処理層の例としては、粗化処理層、耐薬品処理層、耐熱処理層、クロメート処理層、シランカップリング処理層などが挙げられる。これらの層は、単一又は2種以上を組み合わせて用いることができる。その中でも表面処理層は、樹脂基材との接着性の観点から、粗化処理層を含有することが好ましい。
 表面処理層が、耐薬品処理層、耐熱処理層、クロメート処理層及びシランカップリング処理層からなる群から選択される1種以上の層を含有する場合、これらの層は粗化処理層上に設けられることが好ましい。
The type of the surface treatment layer is not particularly limited as long as it satisfies the above conditions of the surface shape and Zn coating amount, and various surface treatment layers known in the art can be used.
Examples of the surface treatment layer include a roughening treatment layer, a chemical resistance treatment layer, a heat resistance treatment layer, a chromate treatment layer, a silane coupling treatment layer, etc. These layers may be used alone or in combination of two or more. Among them, the surface treatment layer preferably contains a roughening treatment layer from the viewpoint of adhesion to the resin substrate.
When the surface treatment layer contains one or more layers selected from the group consisting of a chemical resistance treatment layer, a heat resistance treatment layer, a chromate treatment layer, and a silane coupling treatment layer, it is preferable that these layers are provided on the roughening treatment layer.
 粗化処理層は粗化粒子を含有する。粗化粒子は、1次粗化粒子及び2次粗化粒子を含有していてもよい。2次粗化粒子は、1次粗化粒子とは異なる化学組成を有していてもよい。また、1次粗化粒子の表面の少なくとも一部にはかぶせめっき層が形成されていることが好ましい。
 図2は、銅箔の一方の面に粗化処理層を有する表面処理銅箔を模式的に示す断面図である。
 図2に示されるように、本発明の実施形態の一例は、銅箔(10)の一方の面に形成された粗化処理層を含む。粗化処理層は、1次粗化粒子(20)と、1次粗化粒子(20)を被覆するかぶせめっき層(30)と、かぶせめっき層(30)上に形成された2次粗化粒子(40)とを含む。かぶせめっき層(30)で被覆された1次粗化粒子(20)は略球状であり、2次粗化粒子(40)は樹枝状に広がるように形成されていることが好ましい。Vmpが上記の範囲に制御された表面処理層は、このような断面構造を有していると考えられる。
The roughening treatment layer contains roughening particles. The roughening particles may contain primary roughening particles and secondary roughening particles. The secondary roughening particles may have a chemical composition different from that of the primary roughening particles. In addition, it is preferable that a cover plating layer is formed on at least a part of the surface of the primary roughening particles.
FIG. 2 is a cross-sectional view that shows a schematic diagram of a surface-treated copper foil having a roughening layer on one side of the copper foil.
As shown in Fig. 2, an example of an embodiment of the present invention includes a roughening treatment layer formed on one side of a copper foil (10). The roughening treatment layer includes primary roughening particles (20), a cover plating layer (30) covering the primary roughening particles (20), and secondary roughening particles (40) formed on the cover plating layer (30). It is preferable that the primary roughening particles (20) covered with the cover plating layer (30) are substantially spherical, and the secondary roughening particles (40) are formed so as to spread out in a dendritic shape. It is considered that a surface treatment layer in which Vmp is controlled within the above range has such a cross-sectional structure.
 粗化粒子は、特に限定されないが、銅、ニッケル、コバルト、リン、タングステン、ヒ素、モリブデン、クロム及び亜鉛からなる群から選択される単一の元素、又はこれらの元素の2種以上を含む合金から形成することができる。
 1次粗化粒子は、銅又は銅合金、特に銅から形成されることが好ましい。
 2次粗化粒子は、銅、コバルト及びニッケルを含む合金から形成されることが好ましい。
 かぶせめっき層は、特に限定されないが、銅、銀、金、ニッケル、コバルト、亜鉛などから形成することができる。その中でも、かぶせめっき層は、銅から形成されることが好ましい。
The roughening particles may be formed from, but are not limited to, a single element selected from the group consisting of copper, nickel, cobalt, phosphorus, tungsten, arsenic, molybdenum, chromium and zinc, or an alloy containing two or more of these elements.
The primary roughening particles are preferably formed from copper or a copper alloy, especially copper.
The secondary roughening particles are preferably formed from an alloy containing copper, cobalt and nickel.
The cover plating layer is not particularly limited, but may be formed from copper, silver, gold, nickel, cobalt, zinc, etc. Among these, it is preferable that the cover plating layer is formed from copper.
 粗化処理層は、例えば、1次粗化粒子を形成するための1次粗化処理を行った後に、かぶせめっき層を形成するためのかぶせめっきを行い、次いで2次粗化粒子を形成するための2次粗化処理を行うことによって形成することができる。このような方法で粗化処理を行うことにより、上記のような表面形状を有する表面処理層を形成し易くなる。
 各粒子及び層の形成は、電気めっきによって行うことができる。具体的には、1次粗化粒子は、微量のタングステン化合物を添加しためっき液を用いた電気めっきによって形成することができる。かぶせめっき層及び2次粗化粒子は、所定の成分を含むめっき液を用いた電気めっきによって形成することができる。
The roughened layer can be formed, for example, by performing a primary roughening treatment to form primary roughening particles, followed by cover plating to form a cover plating layer, and then a secondary roughening treatment to form secondary roughening particles. By performing the roughening treatment in this manner, it becomes easier to form a surface treatment layer having the above-mentioned surface shape.
Each particle and layer can be formed by electroplating. Specifically, the primary roughening particles can be formed by electroplating using a plating solution containing a trace amount of a tungsten compound. The cover plating layer and the secondary roughening particles can be formed by electroplating using a plating solution containing a predetermined component.
 タングステン化合物としては、特に限定されないが、例えば、タングステン酸ナトリウム(Na2WO4)などを用いることができる。
 めっき液におけるタングステン化合物の含有量としては、1ppm以上とすることが好ましい。粗化処理層が形成される銅箔の表面には、オイルピットなどの微小な凹部が存在し、凹部周辺には粗化粒子が過小になるか又は形成されないことがあるが、このような含有量であれば、銅箔の比較的平滑な部分に形成された1次粗化粒子の過成長を抑制するとともに、凹部周辺に1次粗化粒子を形成させ易くなる。なお、タングステン化合物の含有量の上限値は、特に限定されないが、電気抵抗の増大を抑制する観点から、20ppmであることが好ましい。
The tungsten compound is not particularly limited, but for example, sodium tungstate (Na 2 WO 4 ) can be used.
The content of the tungsten compound in the plating solution is preferably 1 ppm or more. On the surface of the copper foil on which the roughening treatment layer is formed, there are minute recesses such as oil pits, and the roughening particles may be too small or not formed around the recesses. However, if the content is at this level, the overgrowth of the primary roughening particles formed on the relatively smooth part of the copper foil is suppressed, and the primary roughening particles are easily formed around the recesses. The upper limit of the content of the tungsten compound is not particularly limited, but it is preferably 20 ppm from the viewpoint of suppressing the increase in electrical resistance.
 粗化処理層を形成する際の電気めっきの条件は、使用する電気めっき装置などに応じて調整すればよく特に限定されないが、典型的な条件は以下の通りである。なお、各電気めっきは、1回であってもよいし、複数回行ってもよい。
(1次粗化粒子の形成条件)
 めっき液組成:5~15g/LのCu、40~100g/Lの硫酸、1~6ppmのタングステン酸ナトリウム
 めっき液温度:20~50℃
 電気めっき条件:電流密度30~90A/dm2、時間0.1~8秒
The electroplating conditions for forming the roughened layer are not particularly limited and may be adjusted depending on the electroplating apparatus used, but typical conditions are as follows: Each electroplating may be performed once or multiple times.
(Conditions for forming primary roughening particles)
Plating solution composition: 5-15 g/L Cu, 40-100 g/L sulfuric acid, 1-6 ppm sodium tungstate Plating solution temperature: 20-50° C.
Electroplating conditions: current density 30-90 A/dm 2 , time 0.1-8 seconds
(かぶせめっき層の形成条件)
 めっき液組成:10~30g/LのCu、70~130g/Lの硫酸
 めっき液温度:30~60℃
 電気めっき条件:電流密度4.8~15A/dm2、時間0.1~8秒
(Conditions for forming the cover plating layer)
Plating solution composition: 10-30 g/L Cu, 70-130 g/L sulfuric acid Plating solution temperature: 30-60° C.
Electroplating conditions: current density 4.8 to 15 A/dm 2 , time 0.1 to 8 seconds
(2次粗化粒子の形成条件)
 めっき液組成:10~20g/LのCu、5~15g/LのCo、5~15g/LのNi
 めっき液温度:30~50℃
 電気めっき条件:電流密度24~50A/dm2、時間0.3~0.8秒
(Conditions for forming secondary roughening particles)
Plating solution composition: 10-20 g/L Cu, 5-15 g/L Co, 5-15 g/L Ni
Plating solution temperature: 30 to 50°C
Electroplating conditions: current density 24-50 A/dm 2 , time 0.3-0.8 seconds
 耐薬品処理層及び耐熱処理層としては、特に限定されず、当該技術分野において公知の材料から形成することができる。なお、耐薬品処理層は耐熱処理層としても機能することがあるため、耐薬品処理層及び耐熱処理層として、耐薬品処理層及び耐熱処理層の両方の機能を有する1つの層を形成してもよい。
 耐薬品処理層及び/又は耐熱処理層としては、ニッケル、亜鉛、錫、コバルト、モリブデン、銅、タングステン、リン、ヒ素、クロム、バナジウム、チタン、アルミニウム、金、銀、白金族元素、鉄及びタンタルからなる群から選択される1種以上の元素(金属、合金、酸化物、窒化物、硫化物などのいずれの形態であってもよい)を含む層とすることができる。その中でも、耐薬品処理層はCo-Ni層であることが好ましい。耐熱処理層はNi-Zn層であることが好ましい。
The chemical resistance layer and the heat resistance layer are not particularly limited and can be formed from materials known in the art. Since the chemical resistance layer may also function as a heat resistance layer, a single layer having both the functions of the chemical resistance layer and the heat resistance layer may be formed as the chemical resistance layer and the heat resistance layer.
The chemical resistance layer and/or heat resistance layer may be a layer containing one or more elements (which may be in any form such as metal, alloy, oxide, nitride, sulfide, etc.) selected from the group consisting of nickel, zinc, tin, cobalt, molybdenum, copper, tungsten, phosphorus, arsenic, chromium, vanadium, titanium, aluminum, gold, silver, platinum group elements, iron, and tantalum. Among them, the chemical resistance layer is preferably a Co-Ni layer. The heat resistance layer is preferably a Ni-Zn layer.
 耐薬品処理層及び耐熱処理層は、電気めっきによって形成することができる。その条件は、使用する電気めっき装置に応じて調整すればよく特に限定されないが、一般的な電気めっき装置を用いて耐薬品処理層(Co-Ni層)及び耐熱処理層(Ni-Zn層)を形成する際の条件は以下の通りである。なお、電気めっきは、1回であってもよいし、複数回行ってもよい。 The chemical-resistant layer and heat-resistant layer can be formed by electroplating. The conditions can be adjusted according to the electroplating equipment used and are not particularly limited, but the conditions for forming the chemical-resistant layer (Co-Ni layer) and heat-resistant layer (Ni-Zn layer) using a general electroplating equipment are as follows. Note that electroplating may be performed once or multiple times.
(耐薬品処理層:Co-Ni層の形成条件)
 めっき液組成:1~8g/LのCo、5~20g/LのNi
 めっき液pH:2~3
 めっき液温度:40~60℃
 電気めっき条件:電流密度1~20A/dm2、時間0.3~0.6秒
(Conditions for forming chemical-resistant layer: Co—Ni layer)
Plating solution composition: 1-8 g/L Co, 5-20 g/L Ni
Plating solution pH: 2 to 3
Plating solution temperature: 40 to 60°C
Electroplating conditions: current density 1 to 20 A/dm 2 , time 0.3 to 0.6 seconds
(耐熱処理層:Ni-Zn層の形成条件)
 めっき液組成:1~30g/LのNi、1~30g/LのZn
 めっき液pH:2~5
 めっき液温度:30~50℃
 電気めっき条件:電流密度0.1~10A/dm2、時間0.1~5秒
(Conditions for forming heat-resistant layer: Ni-Zn layer)
Plating solution composition: 1 to 30 g/L Ni, 1 to 30 g/L Zn
Plating solution pH: 2 to 5
Plating solution temperature: 30 to 50°C
Electroplating conditions: current density 0.1 to 10 A/dm 2 , time 0.1 to 5 seconds
 クロメート処理層としては、特に限定されず、当該技術分野において公知の材料から形成することができる。
 ここで、本明細書において「クロメート処理層」とは、無水クロム酸、クロム酸、二クロム酸、クロム酸塩又は二クロム酸塩を含む液で形成された層を意味する。
 クロメート処理層は、コバルト、鉄、ニッケル、モリブデン、亜鉛、タンタル、銅、アルミニウム、リン、タングステン、錫、ヒ素及びチタンからなる群から選択される1種以上の元素(金属、合金、酸化物、窒化物、硫化物などのいずれの形態であってもよい)を含む層とすることができる。クロメート処理層の例としては、無水クロム酸又は二クロム酸カリウム水溶液で処理したクロメート処理層、無水クロム酸又は二クロム酸カリウム及び亜鉛を含む処理液で処理したクロメート処理層などが挙げられる。
The chromate treatment layer is not particularly limited, and can be formed from materials known in the art.
In this specification, the term "chromate treatment layer" means a layer formed from a liquid containing chromic anhydride, chromic acid, dichromate, a chromate salt, or a dichromate salt.
The chromate-treated layer may be a layer containing one or more elements (which may be in any form such as metal, alloy, oxide, nitride, sulfide, etc.) selected from the group consisting of cobalt, iron, nickel, molybdenum, zinc, tantalum, copper, aluminum, phosphorus, tungsten, tin, arsenic, and titanium. Examples of the chromate-treated layer include a chromate-treated layer treated with an aqueous solution of chromic anhydride or potassium dichromate, and a chromate-treated layer treated with a treatment solution containing chromic anhydride or potassium dichromate and zinc.
 クロメート処理層は、浸漬クロメート処理、電解クロメート処理などの公知の方法によって形成することができる。それらの条件は、特に限定されないが、例えば、一般的なクロメート処理層を形成する際の条件は以下の通りである。なお、クロメート処理は、1回であってもよいし、複数回行ってもよい。
 クロメート液組成:1~10g/LのK2Cr27、0.01~10g/LのZn
 クロメート液pH:2~5
 クロメート液温度:30~55℃
 電解条件:電流密度0.1~10A/dm2、時間0.1~5秒(電解クロメート処理の場合)
The chromate treatment layer can be formed by a known method such as immersion chromate treatment, electrolytic chromate treatment, etc. The conditions are not particularly limited, but for example, the conditions for forming a general chromate treatment layer are as follows. The chromate treatment may be performed once or multiple times.
Chromate solution composition: 1-10 g/L K 2 Cr 2 O 7 , 0.01-10 g/L Zn
Chromate solution pH: 2 to 5
Chromate solution temperature: 30 to 55°C
Electrolysis conditions: current density 0.1 to 10 A/dm 2 , time 0.1 to 5 seconds (in the case of electrolytic chromate treatment)
 シランカップリング処理層としては、特に限定されず、当該技術分野において公知の材料から形成することができる。
 ここで、本明細書において「シランカップリング処理層」とは、シランカップリング剤で形成された層を意味する。
 シランカップリング剤としては、特に限定されず、当該技術分野において公知のものを用いることができる。シランカップリング剤の例としては、アミノ系シランカップリング剤、エポキシ系シランカップリング剤、メルカプト系シランカップリング剤、メタクリロキシ系シランカップリング剤、ビニル系シランカップリング剤、イミダゾール系シランカップリング剤、トリアジン系シランカップリング剤などが挙げられる。これらの中でも、アミノ系シランカップリング剤、エポキシ系シランカップリング剤が好ましい。上記のシランカップリング剤は、単独又は2種以上を組み合わせて用いることができる。
 代表的なシランカップリング処理層の形成方法としては、上述のシランカップリング剤の1~3体積%水溶液を塗布し、乾燥させることでシランカップリング処理層を形成する方法が挙げられる。
The silane coupling treatment layer is not particularly limited, and can be formed from a material known in the art.
In this specification, the term "silane coupling treatment layer" means a layer formed with a silane coupling agent.
The silane coupling agent is not particularly limited, and can be one known in the art. Examples of the silane coupling agent include amino-based silane coupling agents, epoxy-based silane coupling agents, mercapto-based silane coupling agents, methacryloxy-based silane coupling agents, vinyl-based silane coupling agents, imidazole-based silane coupling agents, and triazine-based silane coupling agents. Among these, amino-based silane coupling agents and epoxy-based silane coupling agents are preferred. The above silane coupling agents can be used alone or in combination of two or more.
A representative method for forming the silane coupling treatment layer is to apply a 1 to 3 volume % aqueous solution of the above-mentioned silane coupling agent and dry it to form the silane coupling treatment layer.
 銅箔としては、特に限定されず、電解銅箔又は圧延銅箔のいずれであってもよい。
 電解銅箔は、硫酸銅めっき浴からチタン又はステンレスのドラム上に銅を電解析出させることによって一般に製造されるが、回転ドラム側に形成される平坦なS面(シャイン面)と、S面の反対側に形成されるM面(マット面)とを有する。電解銅箔のM面は、一般に微小な凹凸部を有している。また、電解銅箔のS面は、研磨時に形成された回転ドラムの研磨スジが転写されるため、微小な凹凸部を有する。
 圧延銅箔は、圧延時に圧延油によってオイルピットが形成されるため、微小な凹凸部を表面に有する。
The copper foil is not particularly limited, and may be either an electrolytic copper foil or a rolled copper foil.
Electrolytic copper foil is generally produced by electrolytically depositing copper from a copper sulfate plating bath onto a titanium or stainless steel drum, and has a flat S-side (shine side) formed on the rotating drum side and an M-side (matte side) formed on the opposite side of the S-side. The M-side of electrolytic copper foil generally has minute irregularities. In addition, the S-side of electrolytic copper foil has minute irregularities due to the transfer of polishing streaks formed by the rotating drum during polishing.
The rolled copper foil has minute irregularities on its surface due to the formation of oil pits by the rolling oil during rolling.
 銅箔の材料としては、特に限定されないが、銅箔が圧延銅箔の場合、プリント配線板の回路パターンとして通常使用されるタフピッチ銅(JIS H3100 合金番号C1100)、無酸素銅(JIS H3100 合金番号C1020又はJIS H3510 合金番号C1011)などの高純度の銅を用いることができる。また、例えば、Sn入り銅、Ag入り銅、Cr、Zr又はMgなどを添加した銅合金、Ni及びSiなどを添加したコルソン系銅合金のような銅合金も用いることができる。なお、本明細書において「銅箔」とは、銅合金箔も含む概念である。 The material of the copper foil is not particularly limited, but when the copper foil is rolled copper foil, high purity copper such as tough pitch copper (JIS H3100 alloy number C1100) and oxygen-free copper (JIS H3100 alloy number C1020 or JIS H3510 alloy number C1011) that are usually used as circuit patterns for printed wiring boards can be used. In addition, copper alloys such as copper containing Sn, copper containing Ag, copper alloys containing Cr, Zr, or Mg, and Corson copper alloys containing Ni and Si can also be used. In this specification, the term "copper foil" is a concept that includes copper alloy foil.
 銅箔が圧延銅箔の場合、圧延銅箔は、99.0質量%以上のCuと、0.003~0.825質量%のP、Ti、Sn、Ni、Be、Zn、In及びMgからなる群から選ばれる1種以上の元素とを含有し、残部が不可避不純物からなる組成を有してもよい。また、圧延銅箔は、99.9質量%以上のCuと、0.0005質量%~0.0220質量%のPとを含有し、残部が不可避不純物からなる組成を有していてもよい。さらに、圧延銅箔は、99.0質量%以上のCuを含有し、残部が不可避不純物からなる組成を有していてもよい。
 また、銅箔が圧延銅箔の場合、平均結晶粒径が0.5~4.0μmであり、且つ圧延方向における引張強度が235~290MPaであってもよい。
 さらに、圧延銅箔は、75%IACS以上の導電率を有していてもよい。銅箔の導電率は、JIS H0505(1975)に準拠して、4端子法により、室温(25℃)で測定することができる。
When the copper foil is a rolled copper foil, the rolled copper foil may have a composition containing 99.0 mass% or more of Cu, 0.003 to 0.825 mass% of one or more elements selected from the group consisting of P, Ti, Sn, Ni, Be, Zn, In, and Mg, with the balance being unavoidable impurities. The rolled copper foil may also have a composition containing 99.9 mass% or more of Cu, 0.0005 mass% to 0.0220 mass% of P, with the balance being unavoidable impurities. Furthermore, the rolled copper foil may have a composition containing 99.0 mass% or more of Cu, with the balance being unavoidable impurities.
Furthermore, when the copper foil is a rolled copper foil, the average crystal grain size may be 0.5 to 4.0 μm and the tensile strength in the rolling direction may be 235 to 290 MPa.
Furthermore, the rolled copper foil may have a conductivity of 75% IACS or more. The conductivity of the copper foil can be measured at room temperature (25° C.) by a four-terminal method in accordance with JIS H0505 (1975).
 銅箔の厚みは、特に限定されないが、例えば1~1000μm、1~500μm、1~300μm、3~100μm、5~70μm、6~35μm、或いは9~18μmとすることができる。 The thickness of the copper foil is not particularly limited, but can be, for example, 1 to 1000 μm, 1 to 500 μm, 1 to 300 μm, 3 to 100 μm, 5 to 70 μm, 6 to 35 μm, or 9 to 18 μm.
 上記のような構成を有する表面処理銅箔は、当該技術分野において公知の方法に準じて製造することができる。ここで、表面処理層のVmpなどの表面性状パラメータは、表面処理層の形成条件、特に、上記した粗化処理層の形成条件などを調整することによって制御することができる。また、表面処理層のZn付着量は、表面処理層の種類を調整することによって制御することができる。 The surface-treated copper foil having the above-mentioned configuration can be manufactured according to a method known in the art. Here, the surface property parameters such as Vmp of the surface treatment layer can be controlled by adjusting the formation conditions of the surface treatment layer, in particular the formation conditions of the roughening treatment layer described above. In addition, the amount of Zn attached to the surface treatment layer can be controlled by adjusting the type of surface treatment layer.
 本発明の実施形態に係る表面処理銅箔は、表面処理層のVmpを0.010~0.080μm3/μm2、Zn付着量を10~250μg/dm2にそれぞれ制御しているため、樹脂基材、特に高周波用途に好適な樹脂基材との接着性を高めるとともに、はんだ耐熱性に優れた回路パターンを形成することができる。 The surface-treated copper foil according to the embodiment of the present invention has a surface treatment layer with a Vmp controlled to 0.010 to 0.080 μm 3 /μm 2 and a Zn coating weight controlled to 10 to 250 μg/dm 2 , thereby improving adhesion to resin substrates, particularly resin substrates suitable for high frequency applications, and enabling the formation of a circuit pattern with excellent solder heat resistance.
 本発明の実施形態に係る銅張積層板は、上記の表面処理銅箔と、この表面処理銅箔の表面処理層に接着された樹脂基材とを備える。
 この銅張積層板は、上記の表面処理銅箔の表面処理層に樹脂基材を接着することによって製造することができる。
 樹脂基材としては、特に限定されず、当該技術分野において公知のものを用いることができる。樹脂基材の例としては、紙基材フェノール樹脂、紙基材エポキシ樹脂、合成繊維布基材エポキシ樹脂、ガラス布・紙複合基材エポキシ樹脂、ガラス布・ガラス不織布複合基材エポキシ樹脂、ガラス布基材エポキシ樹脂、ポリエステルフィルム、ポリイミド樹脂、液晶ポリマー、フッ素樹脂などが挙げられる。これらの中でも樹脂基材はポリイミド樹脂が好ましい。
 また、高周波用途に特に好適な樹脂基材としては、低誘電材料から形成された樹脂基材が挙げられる。低誘電材料の例としては、液晶ポリマー、低誘電ポリイミド、フッ素樹脂などが挙げられる。低誘電材料は、例えば、1MHzにおいて3.5以下の誘電率を有する材料であってもよい。高周波用途に適した低誘電材料としては、30GHzにおいて3.4以下の誘電率を有する材料であってもよい。
A copper-clad laminate according to an embodiment of the present invention comprises the above-mentioned surface-treated copper foil and a resin substrate adhered to the surface treatment layer of the surface-treated copper foil.
This copper-clad laminate can be produced by adhering a resin substrate to the surface-treated layer of the above-mentioned surface-treated copper foil.
The resin substrate is not particularly limited, and can be one known in the art. Examples of the resin substrate include paper-based phenolic resin, paper-based epoxy resin, synthetic fiber cloth-based epoxy resin, glass cloth/paper composite substrate epoxy resin, glass cloth/glass nonwoven fabric composite substrate epoxy resin, glass cloth-based epoxy resin, polyester film, polyimide resin, liquid crystal polymer, fluororesin, etc. Among these, polyimide resin is preferred as the resin substrate.
In addition, resin substrates particularly suitable for high frequency applications include resin substrates formed from low dielectric materials. Examples of low dielectric materials include liquid crystal polymers, low dielectric polyimides, fluororesins, etc. The low dielectric material may be, for example, a material having a dielectric constant of 3.5 or less at 1 MHz. The low dielectric material suitable for high frequency applications may be a material having a dielectric constant of 3.4 or less at 30 GHz.
 表面処理銅箔と樹脂基材との接着方法としては、特に限定されず、当該技術分野において公知の方法に準じて行うことができる。例えば、表面処理銅箔と樹脂基材とを積層させて熱圧着すればよい。
 上記のようにして製造された銅張積層板は、プリント配線板の製造に用いることができる。
The method for bonding the surface-treated copper foil to the resin substrate is not particularly limited and may be any method known in the art. For example, the surface-treated copper foil and the resin substrate may be laminated and then thermocompressed.
The copper-clad laminate produced as described above can be used in the production of printed wiring boards.
 本発明の実施形態に係る銅張積層板は、上記の表面処理銅箔を用いているため、樹脂基材、特に高周波用途に好適な樹脂基材との接着性に優れ、はんだ耐熱性に優れた回路パターンを形成することができる。 The copper-clad laminate according to the embodiment of the present invention uses the above-mentioned surface-treated copper foil, and therefore has excellent adhesion to resin substrates, particularly resin substrates suitable for high-frequency applications, and can form circuit patterns with excellent solder heat resistance.
 本発明の実施形態に係るプリント配線板は、上記の銅張積層板の表面処理銅箔をエッチングして形成された回路パターンを備える。
 このプリント配線板は、上記の銅張積層板の表面処理銅箔をエッチングして回路パターンを形成することによって製造することができる。
 回路パターンの形成方法としては、特に限定されず、サブトラクティブ法、セミアディティブ法などの公知の方法を用いることができる。その中でも、回路パターンの形成方法はサブトラクティブ法が好ましい。
A printed wiring board according to an embodiment of the present invention includes a circuit pattern formed by etching the surface-treated copper foil of the above-mentioned copper-clad laminate.
This printed wiring board can be produced by etching the surface-treated copper foil of the above-mentioned copper-clad laminate to form a circuit pattern.
The method for forming the circuit pattern is not particularly limited, and known methods such as a subtractive method, a semi-additive method, etc. can be used. Among these, the subtractive method is preferred as the method for forming the circuit pattern.
 サブトラクティブ法によってプリント配線板を製造する場合、次のようにして行うことが好ましい。まず、銅張積層板の表面処理銅箔の表面にレジストを塗布、露光及び現像することによって所定のレジストパターンを形成する。次に、レジストパターンが形成されていない部分(すなわち、不要部)の表面処理銅箔をエッチングによって除去して回路パターンを形成する。最後に、表面処理銅箔上のレジストパターンを除去する。
 なお、このサブトラクティブ法における各種条件は、特に限定されず、当該技術分野において公知の条件に準じて行うことができる。
When a printed wiring board is manufactured by the subtractive method, it is preferably carried out as follows. First, a resist is applied to the surface of the surface-treated copper foil of a copper-clad laminate, and a predetermined resist pattern is formed by exposing and developing it. Next, the surface-treated copper foil in the portion where the resist pattern is not formed (i.e., the unnecessary portion) is removed by etching to form a circuit pattern. Finally, the resist pattern on the surface-treated copper foil is removed.
The conditions for this subtractive method are not particularly limited, and the method can be carried out according to the conditions known in the art.
 本発明の実施形態に係るプリント配線板は、上記の銅張積層板を用いているため、はんだ耐熱性に優れた回路パターンを備え、樹脂基材、特に高周波用途に好適な樹脂基材と回路パターンとの間の接着性に優れている。 The printed wiring board according to the embodiment of the present invention uses the above-mentioned copper-clad laminate, and therefore has a circuit pattern with excellent solder heat resistance, and has excellent adhesion between the resin substrate, particularly the resin substrate suitable for high frequency applications, and the circuit pattern.
 以下、本発明の実施形態を実施例によって更に具体的に説明するが、本発明はこれらの実施例によって何ら限定されるものではない。 The following provides a more detailed explanation of the embodiments of the present invention using examples, but the present invention is not limited to these examples.
(実施例1)
 厚さ12μmの圧延銅箔(JX金属株式会社製HG箔)を準備した。当該銅箔の両面を脱脂及び酸洗した後、一方の面(以下、「第1面」という)に、表面処理層として粗化処理層、耐薬品処理層(Co-Ni層)、クロメート処理層及びシランカップリング処理層を順次形成することによって表面処理銅箔を得た。
 各処理層の形成条件は次の通りとした。
(1)粗化処理層/第1面
<1次粗化粒子の形成条件>
 めっき液組成:12g/LのCu、50g/Lの硫酸、5ppmのタングステン(タングステン酸ナトリウム2水和物由来)
 めっき液温度:27℃
 電気めっき条件:電流密度39.5A/dm2、時間1.2秒
 電気めっき処理回数:2回
Example 1
A rolled copper foil (HG foil manufactured by JX Metals Corporation) having a thickness of 12 μm was prepared. Both sides of the copper foil were degreased and pickled, and then a roughening treatment layer, a chemical resistance treatment layer (Co—Ni layer), a chromate treatment layer, and a silane coupling treatment layer were sequentially formed as surface treatment layers on one side (hereinafter referred to as the “first side”) to obtain a surface-treated copper foil.
The conditions for forming each treatment layer were as follows.
(1) Roughening Treatment Layer/First Surface <Conditions for Forming Primary Roughening Particles>
Plating solution composition: 12 g/L Cu, 50 g/L sulfuric acid, 5 ppm tungsten (derived from sodium tungstate dihydrate)
Plating solution temperature: 27°C
Electroplating conditions: current density 39.5 A/dm 2 , time 1.2 seconds Number of electroplating treatments: 2 times
<かぶせめっき層の形成条件>
 めっき液組成:20g/LのCu、100g/Lの硫酸
 めっき液温度:50℃
 電気めっき条件:電流密度9.6A/dm2、時間1.8秒
 電気めっき処理回数:2回
<Conditions for forming the cover plating layer>
Plating solution composition: 20 g/L Cu, 100 g/L sulfuric acid Plating solution temperature: 50° C.
Electroplating conditions: current density 9.6 A/dm 2 , time 1.8 seconds Number of electroplating treatments: 2 times
<2次粗化粒子の形成条件>
 めっき液組成:15.5g/LのCu、7.5g/LのCo、9.5g/LのNi
 めっき液温度:50℃
 電気めっき条件:電流密度33.3A/dm2、時間0.55秒
 電気めっき処理回数:2回
<Conditions for forming secondary roughening particles>
Plating solution composition: 15.5 g/L Cu, 7.5 g/L Co, 9.5 g/L Ni
Plating solution temperature: 50°C
Electroplating conditions: current density 33.3 A/dm 2 , time 0.55 seconds Number of electroplating treatments: 2 times
(2)耐薬品処理層/第1面
<Co-Ni層の形成条件>
 めっき液組成:3g/LのCo、13g/LのNi
 めっき液pH:2.0
 めっき液温度:50℃
 電気めっき条件:電流密度4.5A/dm2、時間0.48秒
 電気めっき処理回数:1回
(2) Chemical-resistant layer/first surface <Conditions for forming Co-Ni layer>
Plating solution composition: 3 g/L Co, 13 g/L Ni
Plating solution pH: 2.0
Plating solution temperature: 50°C
Electroplating conditions: current density 4.5 A/dm 2 , time 0.48 seconds Number of electroplating treatments: 1
(3)クロメート処理層/第1面
<電解クロメート処理層の形成条件>
 クロメート液組成:3g/LのK2Cr27、0.33g/LのZn
 クロメート液pH:3.7
 クロメート液温度:55℃
 電解条件:電流密度0.64A/dm2、時間0.90秒
 クロメート処理回数:2回
(3) Chromate Treatment Layer/First Surface <Conditions for Forming Electrolytic Chromate Treatment Layer>
Chromate solution composition: 3 g/L K2Cr2O7 , 0.33 g/L Zn
Chromate solution pH: 3.7
Chromate solution temperature: 55°C
Electrolysis conditions: current density 0.64 A/dm 2 , time 0.90 seconds Number of chromate treatments: 2 times
(4)シランカップリング処理層/第1面
 N-2-(アミノエチル)-3-アミノプロピルトリメトキシシランの1.2体積%水溶液を塗布し、乾燥させることでシランカップリング処理層を形成した。
(4) Silane coupling treatment layer/first surface A 1.2% by volume aqueous solution of N-2-(aminoethyl)-3-aminopropyltrimethoxysilane was applied and dried to form a silane coupling treatment layer.
(実施例2)
 第1面のクロメート処理層の形成条件において、電気めっき条件を電流密度1.0A/dm2に変更したこと以外は、実施例1と同様の条件で表面処理銅箔を得た。
Example 2
A surface-treated copper foil was obtained under the same conditions as in Example 1, except that the electroplating conditions for forming the chromate treatment layer on the first surface were changed to a current density of 1.0 A/dm 2 .
(実施例3)
 第1面のクロメート処理層の形成条件において、電気めっき条件を電流密度1.4A/dm2に変更したこと以外は、実施例1と同様の条件で表面処理銅箔を得た。
Example 3
A surface-treated copper foil was obtained under the same conditions as in Example 1, except that the electroplating conditions for forming the chromate treatment layer on the first surface were changed to a current density of 1.4 A/dm 2 .
(比較例1)
 第1面のクロメート処理層の形成条件において、電流をかけずにクロメート液に浸漬したこと以外は、実施例1と同様の条件で表面処理銅箔を得た。
(Comparative Example 1)
A surface-treated copper foil was obtained under the same conditions as in Example 1, except that in forming the chromate treatment layer on the first surface, the foil was immersed in the chromate solution without applying an electric current.
 上記の実施例及び比較例で得られた表面処理銅箔について、下記の評価を行った。
 <表面処理層(第1面)におけるZn付着量の測定>
 表面処理層(第1面)におけるZn付着量は、表面処理層(第1面)を20質量%の硝酸に溶解し、原子吸光分光光度計(VARIAN社製、AA240FS)を用いて原子吸光法で定量分析を行うことによって測定した。
The surface-treated copper foils obtained in the above Examples and Comparative Examples were evaluated as follows.
<Measurement of Zn Adhesion Amount on Surface Treatment Layer (First Side)>
The amount of Zn attached in the surface treatment layer (first side) was measured by dissolving the surface treatment layer (first side) in 20 mass% nitric acid and performing quantitative analysis by atomic absorption spectrometry using an atomic absorption spectrophotometer (AA240FS, manufactured by VARIAN).
<表面処理層(第1面)のVmp>
 オリンパス株式会社製のレーザー顕微鏡(LEXT OLS4000)を用いて画像撮影を行った。撮影した画像の解析は、オリンパス株式会社製のレーザー顕微鏡(LEXT OLS4100)の解析ソフトを用いて行った。表面処理層のVmpの測定はISO 25178-2:2012に準拠して行った。また、これらの測定結果は、任意の10か所で測定した値の平均値を測定結果とした。測定時の温度は23~25℃とした。
 レーザー顕微鏡及び解析ソフトにおける主要な設定条件は下記の通りである。
 対物レンズ:MPLAPON50XLEXT(倍率:50倍、開口数:0.95、液浸タイプ:空気、機械的鏡筒長:∞、カバーガラス厚:0、視野数:FN18)
 光学ズーム倍率:1倍
 走査モード:XYZ高精度(高さ分解能:60nm、取込みデータの画素数:1024×1024)
 取込み画像サイズ[画素数]:横257μm×縦258μm[1024×1024]
(横方向に測定するため、評価長さとしては257μmに相当)
 DIC:オフ
 マルチレイヤー:オフ
 レーザー強度:100
 オフセット:0
 コンフォーカルレベル:0
 ビーム径絞り:オフ
 画像平均:1回
 ノイズリダクション:オン
 輝度むら補正:オン
 光学的ノイズフィルタ:オン
 カットオフ:λc=200μm、λs及びλfは無し
 フィルタ:ガウシアンフィルタ
 ノイズ除去:測定前処理
 表面(傾き)補正:実施
 明るさ:30~50の範囲になるように調整する
 明るさは測定対称の色調によって適宜設定すべき値である。上記の設定はL*が-69~-10、a*が2~32、b*が2~21の表面処理銅箔の表面を測定する際に適切な値である。
<Vmp of surface treatment layer (first surface)>
Images were taken using a laser microscope (LEXT OLS4000) manufactured by Olympus Corporation. The captured images were analyzed using analysis software for a laser microscope (LEXT OLS4100) manufactured by Olympus Corporation. The Vmp of the surface treatment layer was measured in accordance with ISO 25178-2:2012. The measurement results were the average values measured at any 10 points. The temperature during measurement was 23 to 25°C.
The main settings for the laser microscope and analysis software are as follows:
Objective lens: MPLAPON50XLEXT (magnification: 50x, numerical aperture: 0.95, immersion type: air, mechanical lens barrel length: ∞, cover glass thickness: 0, field of view: FN18)
Optical zoom magnification: 1x Scanning mode: XYZ high precision (height resolution: 60nm, number of pixels of captured data: 1024 x 1024)
Captured image size [number of pixels]: 257 μm horizontal x 258 μm vertical [1024 x 1024]
(Since the measurement is performed in the horizontal direction, the evaluation length corresponds to 257 μm.)
DIC: Off Multilayer: Off Laser Intensity: 100
Offset: 0
Confocal level: 0
Beam diameter aperture: off Image averaging: once Noise reduction: on Brightness unevenness correction: on Optical noise filter: on Cutoff: λc = 200 μm, λs and λf are none Filter: Gaussian filter Noise removal: pre-measurement processing Surface (tilt) correction: performed Brightness: adjusted to be in the range of 30 to 50 Brightness is a value that should be set appropriately depending on the color tone of the object to be measured. The above settings are appropriate values when measuring the surface of surface-treated copper foil with L* of -69 to -10, a* of 2 to 32, and b* of 2 to 21.
<測定対象の色調の測定>
 測定器としてHunterLab社製のMiniScan(登録商標)EZ Model 4000Lを用い、JIS Z8730:2009に準拠してCIE L*a*b*表色系のL*、a*及びb*の測定を行った。具体的には、上記の実施例及び比較例で得られた表面処理銅箔の測定対象面を測定器の感光部に押し当て、外から光が入らないようにしつつ測定した。また、L*、a*及びb*の測定は、JIS Z8722:2009の幾何条件Cに基づいて行った。なお、測定器の主な条件は下記の通りである。
 光学系:d/8°、積分球サイズ:63.5mm、観察光源:D65
 測定方式:反射
 照明径:25.4mm
 測定径:20.0mm
 測定波長・間隔:400~700nm・10nm
 光源:パルスキセノンランプ・1発光/測定
 トレーサビリティ標準:CIE 44及びASTM E259に基づく、米国標準技術研究所(NIST)準拠校正
 標準観察者:10°
 また、測定基準となる白色タイルは、下記の物体色のものを使用した。
 D65/10°にて測定した場合に、CIE XYZ表色系での値がX:81.90、Y:87.02、Z:93.76
<Measurement of color tone of object>
The measurement was performed using a MiniScan (registered trademark) EZ Model 4000L manufactured by HunterLab Co., Ltd., in accordance with JIS Z8730:2009 to measure L*, a*, and b* of the CIE L*a*b* color system. Specifically, the measurement target surface of the surface-treated copper foil obtained in the above examples and comparative examples was pressed against the photosensitive part of the measurement device, and measurements were performed while preventing light from entering from the outside. In addition, the measurements of L*, a*, and b* were performed based on the geometric condition C of JIS Z8722:2009. The main conditions of the measurement device are as follows.
Optical system: d/8°, integrating sphere size: 63.5 mm, observation light source: D65
Measurement method: Reflection Lighting diameter: 25.4 mm
Measurement diameter: 20.0 mm
Measurement wavelength/interval: 400-700 nm/10 nm
Light source: Pulsed xenon lamp, 1 emission/measurement Traceability standard: National Institute of Standards and Technology (NIST) calibration based on CIE 44 and ASTM E259 Standard observer: 10°
The white tiles used as the measurement standards were the following object colors:
When measured at D65/10°, the CIE XYZ color system values are X: 81.90, Y: 87.02, and Z: 93.76.
<ピール強度>
 表面処理銅箔(第1面側)を低誘電材料から形成された樹脂基材と貼り合わせた後、幅3mmの回路をMD方向(圧延銅箔の長手方向)に形成した。回路の形成は通常の方法に則って実施した。次に、回路(表面処理銅箔)を樹脂基材の表面に対して、50mm/分の速度で180°方向に、すなわち、MD方向に、引き剥がすときの強さ(MD180°ピール強度)をJIS C6471:1995に準拠して測定した。測定は5回行い、その平均値をピール強度の結果とした。ピール強度は、0.60kgf/cm以上であれば、回路(表面処理銅箔)と樹脂基材との接着性が良好であるといえる。
<Peel strength>
After laminating the surface-treated copper foil (first surface side) with a resin substrate formed from a low dielectric material, a circuit having a width of 3 mm was formed in the MD direction (longitudinal direction of the rolled copper foil). The formation of the circuit was carried out according to a normal method. Next, the strength (MD 180° peel strength) when the circuit (surface-treated copper foil) was peeled off from the surface of the resin substrate at a speed of 50 mm/min in a 180° direction, i.e., in the MD direction, was measured in accordance with JIS C6471:1995. The measurement was carried out five times, and the average value was taken as the peel strength result. If the peel strength is 0.60 kgf/cm or more, it can be said that the adhesion between the circuit (surface-treated copper foil) and the resin substrate is good.
<はんだ耐熱性>
 表面処理銅箔を低誘電材料から形成された樹脂基材と貼り合わせた後、当該表面処理銅箔の表面が25mm×25mmとなるようにエッチングした。回路の形成は通常の方法に則って実施した。次に、サンプルを恒温恒湿機内に入れ、温度85℃、相対湿度85%にて48時間保持した。その後、所定の温度のはんだを収容したはんだ槽にサンプルを浮かべ30秒後に取り出し、サンプルの回路に気泡が発生しているかを目視で確認した。サンプルの回路に気泡が発生しなかった場合、別のサンプルを準備し、はんだ槽のはんだの温度を高くして、サンプルの回路に気泡が発生しているかを再度確認した。この操作をサンプルの回路に気泡が発生するまで繰り返した。この評価の結果を、サンプルの回路に気泡が発生しなかったはんだの最高温度によって表す。サンプルの回路に気泡が発生しなかったはんだの最高温度が300℃以上であれば、はんだ耐熱性が良好であるといえる。
<Solder heat resistance>
After the surface-treated copper foil was laminated with a resin substrate formed from a low dielectric material, the surface of the surface-treated copper foil was etched to 25 mm x 25 mm. The formation of the circuit was carried out according to a normal method. Next, the sample was placed in a thermostatic chamber and held at a temperature of 85°C and a relative humidity of 85% for 48 hours. After that, the sample was floated in a solder bath containing solder at a predetermined temperature, and after 30 seconds, it was removed and visually confirmed whether bubbles had occurred in the circuit of the sample. If bubbles did not occur in the circuit of the sample, another sample was prepared, the temperature of the solder in the solder bath was increased, and it was again confirmed whether bubbles had occurred in the circuit of the sample. This operation was repeated until bubbles occurred in the circuit of the sample. The result of this evaluation is expressed by the maximum temperature of the solder at which bubbles did not occur in the circuit of the sample. If the maximum temperature of the solder at which bubbles did not occur in the circuit of the sample is 300°C or higher, it can be said that the solder heat resistance is good.
 上記の特性評価の結果を表1に示す。 The results of the above characteristic evaluation are shown in Table 1.
Figure JPOXMLDOC01-appb-T000001
Figure JPOXMLDOC01-appb-T000001
 表1に示されるように、表面処理層のVmpが0.010~0.080μm3/μm2、Zn付着量が10~250μg/dm2の範囲内にある実施例1~3の表面処理銅箔は、ピール強度が高く、はんだ最高温度が高かった(はんだ耐熱性も良好であった)。
 これに対して比較例1の表面処理銅箔は、Zn付着量が少なすぎたため、はんだ最高温度が低くなった(はんだ耐熱性が十分でなかった)。
As shown in Table 1, the surface-treated copper foils of Examples 1 to 3, in which the Vmp of the surface treatment layer was in the range of 0.010 to 0.080 μm 3 /μm 2 and the Zn coating weight was in the range of 10 to 250 μg/dm 2 , had high peel strength and high maximum solder temperature (and also had good solder heat resistance).
In contrast, the surface-treated copper foil of Comparative Example 1 had an excessively small amount of Zn attached, and therefore the maximum soldering temperature was low (solder heat resistance was insufficient).
 以上の結果からわかるように、本発明の実施形態によれば、樹脂基材、特に高周波用途に好適な樹脂基材との接着性を高めるとともに、はんだ耐熱性に優れた回路パターンを形成することが可能な表面処理銅箔を提供することができる。また、本発明の実施形態によれば、樹脂基材、特に高周波用途に好適な樹脂基材と表面処理銅箔との間の接着性に優れ、はんだ耐熱性に優れた回路パターンを形成することが可能な銅張積層板を提供することができる。さらに、本発明の実施形態によれば、はんだ耐熱性に優れた回路パターンを備え、樹脂基材、特に高周波用途に好適な樹脂基材と回路パターンとの間の接着性に優れたプリント配線板を提供することができる。 As can be seen from the above results, according to an embodiment of the present invention, it is possible to provide a surface-treated copper foil that has improved adhesion to a resin substrate, particularly a resin substrate suitable for high frequency applications, and that is capable of forming a circuit pattern with excellent solder heat resistance. Furthermore, according to an embodiment of the present invention, it is possible to provide a copper-clad laminate that has excellent adhesion between a resin substrate, particularly a resin substrate suitable for high frequency applications, and the surface-treated copper foil, and that is capable of forming a circuit pattern with excellent solder heat resistance. Furthermore, according to an embodiment of the present invention, it is possible to provide a printed wiring board that has a circuit pattern with excellent solder heat resistance, and that has excellent adhesion between a resin substrate, particularly a resin substrate suitable for high frequency applications, and the circuit pattern.
 したがって、本発明の実施形態は、以下の態様とすることができる。
[1]
 銅箔と、前記銅箔の少なくとも一方の面に形成された表面処理層とを有し、
 前記表面処理層は、山部の実体部体積Vmpが0.010~0.080μm3/μm2であり、且つZn付着量が10~250μg/dm2である、表面処理銅箔。
[2]
 前記山部の実体部体積Vmpが0.020~0.060μm3/μm2である、[1]に記載の表面処理銅箔。
[3]
 前記山部の実体部体積Vmpが0.026~0.038μm3/μm2である、[2]に記載の表面処理銅箔。
[4]
 前記Zn付着量が30~220μg/dm2である、[1]~[3]のいずれか一つに記載の表面処理銅箔。
[5]
 前記Zn付着量が50~220μg/dm2である、[4]に記載の表面処理銅箔。
[6]
 前記Zn付着量が82~200μg/dm2である、[5]に記載の表面処理銅箔。
[7]
 前記表面処理層は粗化処理層を含有する、[1]~[6]のいずれか一つに記載の表面処理銅箔。
[8]
 [1]~[7]のいずれか一つに記載の表面処理銅箔と、前記表面処理銅箔の前記表面処理層に接着された樹脂基材とを備える、銅張積層板。
[9]
 [8]に記載の銅張積層板の前記表面処理銅箔をエッチングして形成された回路パターンを備える、プリント配線板。
Therefore, the embodiment of the present invention can have the following aspects.
[1]
A copper foil and a surface treatment layer formed on at least one surface of the copper foil,
The surface-treated layer has a peak volume Vmp of 0.010 to 0.080 μm 3 /μm 2 and a Zn coating weight of 10 to 250 μg/dm 2 .
[2]
The surface-treated copper foil according to [1], wherein the peaks have a substantial volume Vmp of 0.020 to 0.060 μm 3 /μm 2 .
[3]
The surface-treated copper foil according to [2], wherein the peak portion has a substantial volume Vmp of 0.026 to 0.038 μm 3 /μm 2 .
[4]
The surface-treated copper foil according to any one of [1] to [3], wherein the Zn coating amount is 30 to 220 μg / dm 2 .
[5]
The surface-treated copper foil according to [4], wherein the Zn coating amount is 50 to 220 μg / dm 2 .
[6]
The surface-treated copper foil according to [5], wherein the Zn coating amount is 82 to 200 μg / dm 2 .
[7]
The surface-treated copper foil according to any one of [1] to [6], wherein the surface treatment layer contains a roughening treatment layer.
[8]
A copper-clad laminate comprising the surface-treated copper foil according to any one of [1] to [7] and a resin base material bonded to the surface treatment layer of the surface-treated copper foil.
[9]
A printed wiring board comprising a circuit pattern formed by etching the surface-treated copper foil of the copper-clad laminate according to [8].
 10 銅箔
 20 1次粗化粒子
 30 かぶせめっき層
 40 2次粗化粒子
REFERENCE SIGNS LIST 10 Copper foil 20 Primary roughening particles 30 Cover plating layer 40 Secondary roughening particles

Claims (9)

  1.  銅箔と、前記銅箔の少なくとも一方の面に形成された表面処理層とを有し、
     前記表面処理層は、山部の実体部体積Vmpが0.010~0.080μm3/μm2であり、且つZn付着量が10~250μg/dm2である、表面処理銅箔。
    A copper foil and a surface treatment layer formed on at least one surface of the copper foil,
    The surface-treated layer has a peak volume Vmp of 0.010 to 0.080 μm 3 /μm 2 and a Zn coating weight of 10 to 250 μg/dm 2 .
  2.  前記山部の実体部体積Vmpが0.020~0.060μm3/μm2である、請求項1に記載の表面処理銅箔。 2. The surface-treated copper foil according to claim 1, wherein the peaks have a substantial volume Vmp of 0.020 to 0.060 μm 3 /μm 2 .
  3.  前記山部の実体部体積Vmpが0.026~0.038μm3/μm2である、請求項2に記載の表面処理銅箔。 3. The surface-treated copper foil according to claim 2, wherein the peaks have a substantial volume Vmp of 0.026 to 0.038 μm 3 /μm 2 .
  4.  前記Zn付着量が30~220μg/dm2である、請求項1に記載の表面処理銅箔。 The surface-treated copper foil according to claim 1, wherein the Zn coating amount is 30 to 220 μg/ dm2 .
  5.  前記Zn付着量が50~220μg/dm2である、請求項4に記載の表面処理銅箔。 The surface-treated copper foil according to claim 4, wherein the Zn coating amount is 50 to 220 μg/ dm2 .
  6.  前記Zn付着量が82~200μg/dm2である、請求項5に記載の表面処理銅箔。 The surface-treated copper foil according to claim 5, wherein the Zn coating amount is 82 to 200 μg/ dm2 .
  7.  前記表面処理層は粗化処理層を含有する、請求項1~6のいずれか一項に記載の表面処理銅箔。 The surface-treated copper foil according to any one of claims 1 to 6, wherein the surface treatment layer includes a roughening treatment layer.
  8.  請求項1~6のいずれか一項に記載の表面処理銅箔と、前記表面処理銅箔の前記表面処理層に接着された樹脂基材とを備える、銅張積層板。 A copper-clad laminate comprising the surface-treated copper foil according to any one of claims 1 to 6 and a resin substrate bonded to the surface treatment layer of the surface-treated copper foil.
  9.  請求項8に記載の銅張積層板の前記表面処理銅箔をエッチングして形成された回路パターンを備える、プリント配線板。 A printed wiring board having a circuit pattern formed by etching the surface-treated copper foil of the copper-clad laminate described in claim 8.
PCT/JP2023/028811 2022-09-28 2023-08-07 Surface-treated copper foil, copper-clad laminate plate, and printed wiring board WO2024070245A1 (en)

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Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2012087388A (en) * 2010-10-21 2012-05-10 Furukawa Electric Co Ltd:The Surface-treated copper foil and copper-clad laminate sheet
JP2022501521A (en) * 2019-02-01 2022-01-06 長春石油化學股▲分▼有限公司 Surface-treated copper foil and copper foil substrate
WO2022255420A1 (en) * 2021-06-03 2022-12-08 三井金属鉱業株式会社 Roughened copper foil, copper-clad laminated board, and printed wiring board

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2012087388A (en) * 2010-10-21 2012-05-10 Furukawa Electric Co Ltd:The Surface-treated copper foil and copper-clad laminate sheet
JP2022501521A (en) * 2019-02-01 2022-01-06 長春石油化學股▲分▼有限公司 Surface-treated copper foil and copper foil substrate
WO2022255420A1 (en) * 2021-06-03 2022-12-08 三井金属鉱業株式会社 Roughened copper foil, copper-clad laminated board, and printed wiring board

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