WO2024064081A1

WO2024064081A1 - Wide band power detector with high dynamic range

Info

Publication number: WO2024064081A1
Application number: PCT/US2023/033040
Authority: WO
Inventors: Sateh Jalaleddine
Original assignee: Viasat, Inc.
Priority date: 2022-09-19
Filing date: 2023-09-18
Publication date: 2024-03-28

Abstract

Methods, systems, and devices for wide band power detection are described. For instance, a circuit may include a set of passive attenuators coupled in parallel between a first port and a set of second ports, the set of passive attenuators configured to generate, based on a radio frequency (RF) signal input to the first port, a respective set of attenuated RF signals on the set of second ports, where each of the set of passive attenuators has a different attenuation. The circuit may include a set of rectifiers having respective input ports coupled with respective second ports of the set of second ports, where the set of rectifiers are configured to output respective currents at respective output ports that are dependent on respective powers of respective attenuated RF signals on the respective second ports, and where the respective output ports of the set of rectifiers are coupled together.

Description

WIDE BAND POWER DETECTOR WITH HIGH DYNAMIC RANGE

BACKGROUND

[0001] The following relates generally to communications, including wide band power detector with high dynamic range.

[0002] In some examples, a device may receive or transmit radio frequency (RF) signals via one or more antennas. The device may include amplifiers to apply gain to the RF signals within transmission or reception chains. For example, transmission of an RF signal may include amplification of the RF signal prior to sending the amplified RF signal to the one or more antennas. The device may have a desired output RF signal power, which may depend on the one or more antennas, receiver characteristics such as the distance to the receiver, or environmental conditions. Techniques that enable the device to determine the RF signal power more accurately or with reduced latency may reduce a likelihood that the applied gain causes the RF signal to have an undesired value.

SUMMARY

[0003] The described techniques relate to improved methods, systems, devices, and apparatuses that support a wide band power detector with high dynamic range. For example, the described techniques provide for a device to output a voltage indicating a power of an RF signal with reduced latency, a wider dynamic range, an increased linearity, or any combination thereof.

[0004] The described techniques may include generating, by a set of multiple passive attenuators coupled in parallel between a first port and a set of multiple second ports and based on a radio frequency (RF) signal input to the first port, a respective set of multiple attenuated RF signals on the set of multiple second ports, where each of the set of multiple passive attenuators has a different attenuation and outputting, by a set of multiple rectifiers having respective input ports coupled with respective second ports of the set of multiple second ports, respective currents at respective output ports that are dependent on respective powers of respective attenuated RF signals on the respective second ports, and where the respective output ports of the set of multiple rectifiers are coupled together. BRIEF DESCRIPTION OF THE DRAWINGS

[0005] FIG. 1 shows an example of a wide band power detector with high dynamic range in accordance with examples described herein.

[0006] FIG. 2 shows an example of a wide band power detector with high dynamic range in accordance with examples described herein.

[0007] FIG. 3 shows an example of a power detection relationship that supports a wide band power detector with high dynamic range in accordance with aspects of the present disclosure.

[0008] FIG. 4 shows an example of a rectifier circuit that supports a wide band power detector with high dynamic range in accordance with aspects of the present disclosure.

[0009] FIGs. 5 A, 5B, and 5C show examples of passive attenuation schemes that support a wide band power detector with high dynamic range in accordance with aspects of the present disclosure.

[0010] FIG. 6 shows a flowchart illustrating methods that support a wide band power detector with high dynamic range in accordance with aspects of the present disclosure.

DETAILED DESCRIPTION

[0011] A device may receive or transmit radio frequency (RF) signals via one or more antennas. The device may include amplifiers to apply gain to the RF signals within transmission or reception chains. For example, transmission of an RF signal may include amplification of the RF signal prior to sending the amplified RF signal to the one or more antennas. The device may have a desired output RF signal power, which may depend on the one or more antennas, receiver characteristics such as the distance to the receiver, or environmental conditions. In order to determine the gain, the device may include an RF power detector that produces a voltage corresponding to a value of a power of the RF signal. The device may use the value of the power of the RF signal in order to adjust the gain.

[0012] Reducing a latency between an RF signal and an adjusting of the gain may enable the device to more quickly adapt to channel conditions and to reduce a likelihood that an applied gain results in an undesired signal power. Additionally, as a relationship between a power of the RF signal (e.g., in decibels (dB)) and a voltage output by an RF power detector approaches linearity, the power gain may be adjusted more accurately and/or with less complexity.

[0013] The techniques and circuitry described herein may enable reduced latency between applying an RF signal and the RF power detector outputting a corresponding voltage and/or may enable increased linearity between a power of the RF signal and the voltage output by the RF power detector. For instance, the RF power detector of the device may include multiple rectifiers coupled in parallel between an input port for the RF signal and an output port for the voltage indicating the power of the RF signal. Each of a subset of the multiple rectifiers may be coupled with a respective one or more passive attenuators (e.g., resistors, capacitors), where the respective one or more passive attenuators are configured to provide a different amount of attenuation for each of the subset of the multiple rectifiers. In some examples, using passive attenuators may be advantageous over active attenuators (e.g., attenuators composed of actively powered components, such as gain cells or operational amplifiers), as the passive attenuators may incur less delay or consume less energy relative to the active attenuators.

[0014] Each rectifier of the set of rectifiers may have an order defined in terms of a stage, where each stage may include a respective rectifier and its respective one or more passive attenuators, if present. Generally, each stage in the order may be associated with a progressively higher amount of attenuation (e.g., due to the respective one or more passive attenuators providing more attenuation). Thus, if each rectifier of the multiple rectifiers is configured such that the rectifier is activated for a same signal power provided to a respective input of the rectifier, each of the multiple rectifiers may still activate for different power values associated with the RF signal due to the respective one or more attenuators providing different amounts of attenuation. For instance, if the set of rectifiers has a first rectifier in a first stage with no attenuators, a second rectifier in a second stage with a first set of attenuators, and a third rectifier in a third stage with a second set of attenuators, where the second set of attenuators provide more attenuation than the first set of attenuators, then the first rectifier may be activated for a lower power value of the RF signal than the second rectifier, and the second rectifier may be activated for a lower power value of the RF signal than the third rectifier. Similarly, a current provided by a rectifier in an earlier stage may saturate for a lower power value of the RF signal than a current provided by a rectifier in a later stage. For instance, the first rectifier may have its current saturate at a lower power value of the RF signal than the second rectifier, and the second rectifier may have its current saturate at a lower power value of the RF signal than the third rectifier.

[0015] Generally, the respective one or more passive attenuators for each stage may be configured such that a rectifier for one stage has its current reach saturation at a same power value that another rectifier has current exhibiting linear behavior. For instance, the attenuation may be configured according to a power law such that an increase in power (e.g., doubling, quadrupling) causes one rectifier to saturate while the next is in the linear region. In this manner, each stage may have a respective separate range of power values between which the respective rectifier begins to pull current (e.g., to be activated) and which the current output by the rectifier becomes saturated. The current output from a respective rectifier for its respective range of power values may exhibit approximately linear behavior (e.g., with reference to a power of the RF signal in dB) whereas the current output from the remaining rectifiers may exhibit approximately constant behavior for that range of power values. For instance, for the respective range of power values over which the second rectifier exhibits approximately linear behavior, the first rectifier may output an approximately constant, saturated current and the third rectifier may not be pulling current.

[0016] Due to the approximately linear behavior of each rectifier over the respective range of power values for their stage and the respective one or more passive attenuators being configured such that a rectifier for one stage has its current reach saturation while another rectifier has current exhibiting linear behavior, the voltage produced at the output port when the currents are summed together may also exhibit approximately linear behavior. Thus, the relationship between the power of the RF signal and the voltage output at the output port may be approximately linear.

[0017] Having the multiple rectifiers coupled in parallel may enable reduced latency between input of an RF signal and the RF power detector outputting the corresponding voltage (e.g., as compared to coupling the multiple rectifiers in series). Additionally, the multiple rectifiers being coupled in parallel may enable a higher dynamic range for the RF power detector (e.g., adding additional rectifiers may enable increased dynamic range) and may increase a linearity associated with the output voltage over the dynamic range.

[0018] Aspects of the disclosure are initially described in the context of power detectors. Additional aspects of the disclosure are described in the context of a power detection relationship, a rectifier circuit, and passive attenuation schemes. Aspects of the disclosure are further illustrated by and described with reference to apparatus diagrams, system diagrams, block diagrams, and flowcharts that relate to wide band power detector with high dynamic range.

[0019] FIG. 1 shows an example of a wide band power detector 100 with high dynamic range in accordance with examples described herein.

[0020] Wide band power detector 100 may include a set of rectifiers including rectifiers 115-a, 115-b, and 115-c. Each rectifier may include a respective set of input ports. For instance, rectifier 115-a may include set of input ports 110-a, rectifier 115-b may include a set of input ports 110-b, and rectifier 115-c may include a set of input ports 110-c. In some examples, one or more of the sets of input ports may be coupled with attenuators. For instance, a first input port (e.g., a respective first positive input port 135-a) of the set of input ports 110-b may be coupled with attenuator 125-a, a second input port (e.g., a respective second positive input port 135-b) of the set of input ports 110-b may be coupled with attenuator 125-b, a third input port of the set of input ports 110-b (e.g., a respective first negative input port 135-c) may be coupled with attenuator 125-c; and a fourth port of the set of input ports 110-b (e.g., a respective second negative input port 135-d) may be coupled with attenuator 125-d. Similarly, a first input port of the set of input ports 110-c (e.g., a respective first positive input port 135-a) may be coupled with attenuator 125-e, a second input port of the set of input ports 110-c (e.g., a respective second positive input port 135-b) may be coupled with attenuator 125-f; a third input port of the set of input ports 110-c (e.g., a respective first negative input port 135-c) may be coupled with attenuator 125-g; and a fourth input port of the set of input ports 110-c (e.g., a respective second negative input port 135-d) may be coupled with attenuator 125-h. Additionally, each of attenuators 125-a, 125-b, 125-f, and 125-g may be coupled with positive port 105-a and each of attenuators 125-c, 125-d, 125-g, and 125-h may be coupled with negative port 105-b. The set of input ports 110-a for rectifier 115-a may be coupled directly (e.g., without attenuators) to positive port 105-a and negative port 105-b. For instance, a first port (e.g., a respective first positive input port 135-a) and a second port (e.g., a respective second positive input port 135-b) of the set of input ports 110-a may be coupled with positive port 105-a and a third port (e.g., a respective first negative input port 135-c) and a fourth port (e.g., a respective second negative input port 135-d) of the set of input ports 110-a may be coupled with negative port 105-b. Rectifiers 115-a, 115-b, and 115-c may each have a respective output port. For instance, rectifier 115-a may have output port 120-a, rectifier 115-b may have output port 120-b, and rectifier 115-c may have output port 120-c, where output ports 120-a, 120-b, and 120-c may be coupled together.

[0021] Each of attenuators 125-a through 125-h may be passive attenuators. For instance, each of attenuators 125-a through 125-h may be an example of a resistor or may be an example of one or more capacitors. Each of attenuators 125-a through 125-h may also be understood to include a parasitic capacitance of a respective transistor with which they are coupled (e.g., a respective transistor of rectifier 115-b for attenuators 125-a through 125-d and a respective transistor of rectifier 115-c for attenuators 125-e through 125-g). In some cases, each attenuator 125 may include a single passive component (e.g., resistor, capacitor) that is coupled between one of the ports 105 and an input port of one of the rectifiers 115.

[0022] The first input port (e.g., positive port 105-a) may be configured to provide an RF signal 140-a to the positive input ports of the set of rectifiers (e.g., directly for rectifier 115-a or via respective attenuators for rectifier 115-b and 115-c). The second input port (e.g., negative port 105-b) may be configured to provide a second RF signal 140-b (e.g., a complementary signal of RF signal 140-a) to the negative input ports of the set of rectifiers. Attenuators 125-a, 125-b, 125-e and 125-f may be configured to attenuate the RF signal 140-a prior to the RF signal 140-a being received at the input ports of rectifiers 115-b and 115-c. Attenuators 125-c, 125-d, 125-g, and 125-h may be configured to attenuate the second RF signal 140-b prior to the second RF signal 140-b being received at the input ports of rectifiers 115-b and 115-c. Attenuators 125-a through 125-h performing the attenuation may generate a set of attenuated RF signals 150. In some examples, each attenuator for a given rectifier may provide a same amount of attenuation (e.g., may have a same resistance or a same capacitance as each other attenuator for that rectifier). For instance, attenuators 125-a through 125-d may provide a same amount of attenuation and attenuators 125-e through 125-h may provide a same amount of attenuation. Additionally, the attenuators for a first rectifier may have a different attenuation as compared to the attenuators for a second rectifier (e.g., for each other rectifier). For instance, attenuators 125-a through 125-d may provide a different attenuation as compared to attenuators 125-e through 125-h (e.g., may have different resistances or different capacitances relative to attenuators 125-e through 125-h).

[0023] In some examples, rectifiers 115-b and 115-c may be included in a set of rectifiers each coupled with a respective set of attenuators and a respective output port coupled with the other output ports of the set of rectifiers. Additionally, the set of rectifiers may have a predefined ordering defined in terms of a stage. For instance, if rectifier 115-b is a Stage 2 rectifier and rectifier 115-c is a Stage 3 rectifier, then rectifier 115-b may occur earlier in the ordering as compared to rectifier 115-c. Each stage later in the ordering may have attenuators that provide more attenuation as compared to attenuators associated with stages earlier in the ordering. For instance, attenuators 125-e through 125-h may provide more attenuation than attenuators 125-a through 125-d if rectifier 115-b is a Stage 2 rectifier and rectifier 115-c is a Stage 3 rectifier. In a first example, attenuators coupled with a Stage 2 rectifier may provide 3 dB of attenuation, attenuators coupled with a Stage 3 rectifier may provide 6 dB of attenuation, attenuators coupled with a Stage 4 rectifier may provide 9 dB of attenuation, attenuators coupled with a Stage 5 rectifier may provide ' 1 dB of attenuation, and so on. In a second example, attenuators coupled with a Stage 2 rectifier may provide 4 dB of attenuation, attenuators coupled with a Stage 3 rectifier may provide 8 dB of attenuation, attenuators coupled with a Stage 4 rectifier may provide 12 dB of attenuation, and so on. Other values of attenuation may be possible without deviating from the scope of the present disclosure. In some examples, as rectifier 115-a may be coupled directly with positive port 105-a and negative port 105-b (e.g., as rectifier 115-a may not be coupled with a respective set of attenuators), rectifier 115-a may be referred to a Stage 1 rectifier and may, thus, be associated with less attenuation than each other rectifier within the set of rectifiers (e.g., rectifiers 115-b and 115-c).

[0024] Coupled to attenuators 125 as illustrated in FIG. 1, rectifiers 115-a through 115-c may be configured to output respective currents at respective output ports that are dependent on respective powers of the signals (e.g., the respective attenuated RF signals) received at their respective input ports. For instance, rectifier 115-a may output a current 145-a dependent on a power of RF signal 140-a and/or second RF signal 140-b; rectifier 115-b may output a current 145-b dependent on a power of RF signal 140-a and/or second RF signal 140-b attenuated by one or more of attenuators 125-a through 125-d; and rectifier 115-c may output a current 145-c dependent on a power of RF signal 140-a and/or second RF signal 140-b attenuated by one or more of attenuators 125-e through 125-h.

[0025] The current output by each rectifier may have approximately linear behavior (e.g., linear in dB) over its respective range of power values. The currents output by the rectifiers (e.g., 145-a through 145-c) may be summed together, which may affect an output voltage 130 that indicates a power of RF signal 140-a. For instance, the output voltage 130 may exhibit approximately linear behavior (e.g., linear in dB) due to each set of attenuators being configured such that a rectifier for one stage has its current reach saturation while another rectifier has current exhibiting linear behavior. Additional examples of rectifiers 115-a through 115-c outputting a current may be described herein, for instance, with reference to FIG. 3.

[0026] In some examples, each of rectifiers 115-a through 115-c may be single-sided and may have only one input port. For instance, the set of input ports 110-a may only include one input port coupled directly with positive port 105-a. Additionally, the set of input ports 110-b may only have one input port coupled with attenuator 125-a and the set of input ports 110-c may only have one input port coupled with attenuator 125-e. In such examples, negative port 105-b and/or attenuators 125-b through 125-d and 125-f through 125-h may not be present.

[0027] In other examples, each of rectifiers 115-a through 115-c may be differential and may have two input ports. For instance, the set of input ports 110-a may include a first input port coupled directly with positive port 105-a and a second input port coupled directly with negative port 105-b. Additionally, the set of input ports 110-b may have a first input port coupled with attenuator 125-a and a second input port coupled with attenuator 125-c and the set of input ports 110-c may have a first input port coupled with attenuator 125-e and a second input port coupled with attenuator 125-g. In such examples, attenuators 125-b, 125-d, 125-f, and 125-h may not be present.

[0028] It should be noted that a quantity of the set of rectifiers may vary (e.g., to be greater than or equal to 2) without deviating from the scope of the present disclosure.

[0029] FIG. 2 shows an example of a wide band power detector 200 with high dynamic range in accordance with examples described herein. In some examples, wide band power detector 200 may implement one or more aspects of wide band power detector 100. For instance positive port 205 -a may be an example of a positive port 105-a as described with reference to FIG. 1; negative port 205-b may be an example of a negative port 105-b as described with reference to FIG. 1; rectifier 215-a may be an example of a rectifier 115-a as described with reference to FIG. 1; rectifiers 215-b through 215-g may each be an example of rectifier 115-b or rectifier 115-c as described with reference to FIG. 1 ; each attenuator of the set of attenuators 245 may be an example of an attenuator 125-a through 125-h as described with reference to FIG. 1; and output voltage 230 may be an example of output voltage 130 as described with reference to FIG. 1.

[0030] Wide band power detector 200 may include a set of rectifiers (e.g., rectifiers 215-a, 215-b, 215-c, 215-d, 215-e, 215-f, and 215-g). Each rectifier of the set of rectifiers may be coupled with positive port 205-a and negative port 205-b (e.g., directly for rectifier 215-a or via a respective set of attenuators 245 for rectifiers 215-b through 215-g). Additionally, each rectifier of the set of rectifiers may be coupled with a bias port 210 (e.g., a port configured to provide a bias voltage 207 that is common to each of the set of rectifiers); a drain supply voltage line 235 (e.g., a line configured to provide V_dd to each of the set of rectifiers) and a source supply voltage line 240 (e.g., a line configured to provide F_ss to each of the set of rectifiers). Additionally, each rectifier of the set of rectifiers may have a respective output port coupled with resistor 220 and capacitor 225, where each rectifier of the set of rectifiers may be configured to provide a current over the respective output port, which may affect a value of an output voltage 230. Each rectifier may be associated with a respective stage. For instance, rectifier 215-a may be referred to as a Stage 1 rectifier; rectifier 215-b may be referred to as a Stage 2 rectifier; rectifier 215-c may be referred to as a Stage 3 rectifier; rectifier 215-d may be referred to as a Stage 4 rectifier; rectifier 215-e may be referred to as a Stage 5 rectifier; rectifier 215-f may be referred to as a Stage 6 rectifier; and rectifier 215-g may be referred to as a Stage 7 rectifier. The resistor 220 may act as a current to voltage converter to allow the voltage to be evaluated.

[0031] Each stage of wide band power detector 200 may be fed an RF signal with power P_ln directly, which may allow for higher speed operation (e.g., as compared to the stages being coupled in series). The set of attenuators 245 for each rectifier (e.g., for each rectifier cell) may be different such that each rectifier contributes to a different range of input power. The collection of parallel rectifiers may be used to increase a dynamic range which the wide band power detector 200 may provide and may enable the output voltage 230 to be approximately linear with power P_in for at least a range of values of power P_in (e.g., and may accordingly provide piecewise logarithmic power to voltage detection through use of the parallel rectifiers). Each of rectifiers 215-b through 215-g may use RC attenuation to allow each stage to detect a corresponding input power range, where the capacitance may be provided by parasitic capacitance of transistors of rectifiers 215-b through 215-g. In some examples, a resistor of the respective set of attenuators 245 for each of rectifiers 215-b through 215-g may be replaced by one or more capacitors, which may be result in capacitor divider that achieves attenuation of the input RF signal.

[0032] FIG. 3 shows an example of a power detection relationship 300 that supports a wide band power detector with high dynamic range in accordance with aspects of the present disclosure. In some examples, power detection relationship 300 may be implemented by one or more components of FIGs. 1 and/or 2. For instance, output voltage 305 may be an example of an output voltage 130 as described with reference to FIG. 1 and/or an output voltage 230 as described with reference to FIG. 2. Additionally, input power 310 may be an example of a power of an RF signal (e.g., RF signal 140-a) as described with reference to FIG. 1 or an RF signal with power P_in fed over positive port 205-a of FIG. 2.

[0033] Ranges of power values 315-a through 315-g may represent a range of power values of the RF signal between which a rectifier becomes active (e.g., begins pulling current) and which the current saturates. For instance, first range of power values 315-a may correspond to a range of power values between rectifier 215-a (e.g., a Stage 1 rectifier) beginning to pull current and an output current saturating; second range of power values 315- b may correspond to a range of power values between rectifier 215-b (e.g., a Stage 2 rectifier) beginning to pull current and an output current saturating; third range of power values 315-c may correspond to a range of power values between rectifier 215-c (e.g., a Stage 3 rectifier) beginning to pull current and an output current saturating; fourth range of power values 315-d may correspond to a range of power values between rectifier 215-d (e.g., a Stage 4 rectifier) beginning to pull current and an output current saturating; fifth range of power values 315-e may correspond to a range of power values between rectifier 215-e (e.g., a Stage 5 rectifier) beginning to pull current and an output current saturating; sixth range of power values 315-f may correspond to a range of power values between rectifier 215-f (e.g., a Stage 6 rectifier) beginning to pull current and an output current saturating; and seventh range of power values 315-g may correspond to a range of power values between rectifier 215-g (e.g., a Stage 7 rectifier) beginning to pull current and an output current saturating.

[0034] The current provided by a rectifier during its associated range of power values may exhibit approximately linear behavior and may be referred to as the linear range of the rectifier. For instance, within the first range of power values 315-a, the current of rectifier 215-a may progress through its linear range. Within the second range of power values 315-b, the current of rectifier 215-b may progress through its linear range while the current provided by rectifier 215-a may be saturated. Within the third range of power values 315-c, the current of rectifier 215-c may progress through its linear range while the currents provided by rectifiers 215-a and 215-b may be saturated. Within the fourth range of power values 315-d, the current of rectifier 215-d may progress through its linear range while the currents provided by rectifiers 215-a through 215-c may be saturated. Within the fifth range of power values 315-e, the current of rectifier 215-e may progress through its linear range while the currents provided by rectifiers 215-a through 215-d may be saturated. Within the sixth range of power values 315-f, the current of rectifier 215-f may progress through its linear range while the currents provided by rectifiers 215-a through 215-e may be saturated. Within the seventh range of power values 315-g, the current of rectifier 215-g may progress through its linear range while the currents provided by rectifiers 215-a through 215-f may be saturated. Above the seventh range of power values 315-g, the currents provided by rectifiers 215-a through 215-g may be saturated.

[0035] For each range of power values, the current output by the respective rectifier associated with that range of power values may have a greatest ability to vary within the range of power values (e.g., the current output by rectifier 215-a may have the greatest ability to vary within first range of power values 315-a, the current output by rectifier 215-b may have the greatest ability to vary within the second range of power values 315-b, and so on). Additionally, or alternatively, for each range of power values, the current output by the respective rectifier associated with that range of power values may vary more than a current provided by each other rectifier. For instance, the current provided by rectifier 215-a may have a greater ability to vary than that of rectifiers 215-b through 215-g within first range of power values 315-a, the current provided by rectifier 215-b may have a greater ability to vary than that of rectifiers 215-a and 215-c through 215-g within second range of power values 315-b, and so on.

[0036] The output voltage 305 varying may be caused at least in part by a summing of the currents provided by rectifiers 215-a through 215-g on resistor 220. It should be noted that the quantity of stages and corresponding ranges of power values may vary (e.g., be greater than or equal to 2) without deviating from the scope of the present disclosure. In some examples, a minimum value of the first range of power values 315-a may be -20 dB milliwatts (dBm) and a maximum value of sixth range of power values may be 11 dBm. Additionally, or alternatively, a voltage at the minimum value of the first range of power values 315-a may be between 1.3 and 1.4 volts and a voltage at a maximum value of the seventh range of power values may be between 0.1 and 0 volts.

[0037] As depicted herein, at a first power value 320-a within the first range of power values 315-a, rectifier 215-a may output a threshold current 325-a (e.g., l_th) while rectifier 215-b may output current 325-b (e.g., /_y), which may not satisfy the threshold current 325-a. However, at a second power values 320-b within the second range of power values 315-b, rectifier 215-b may output the threshold current 325-a while rectifier 215-a may output current 325-c (e.g., /_z) which may satisfy the threshold current 325-a.

[0038] FIG. 4 shows an example of a rectifier circuit 400 that supports a wide band power detector with high dynamic range in accordance with aspects of the present disclosure. In some examples, rectifier circuit 400 may be an example of one or more aspects of FIGs. 1 and/or 2. For instance, rectifier circuit 400 may represent an internal view of any of rectifiers 115-a through 115-c as described with reference to FIG. 1 and/or an internal view of any of rectifiers 215-a through 215-g as described with reference to FIG. 2. In some examples, source supply voltage line 415 may be an example of a source supply voltage line 240 as described with reference to FIG. 2; bias port 420 may be an example of a bias port 210 as described with reference to FIG. 2; drain supply voltage line 425 may be an example of a drain supply voltage line 235 as described with reference to FIG. 2; negative input ports 430 and 445 may be examples of negative input ports coupled with negative port 205 -b of FIG. 2; positive input ports 435 and 440 may be examples of positive input ports coupled with positive port 205-a of FIG. 2; and output port 450 may be an example of an output port of any of rectifiers 215-a through 215-g as described with reference to FIG. 2. Additionally, or alternatively, negative input port 430 may be an example of a first negative input port 135-c and/or an input port of 110-a through 110-c as described with reference to FIG. 1 ; positive input port 435 may be an example of a first positive input port 135-a and/or an input port of 110-a through 110-c as described with reference to FIG. 1 ; second positive input port 440 may be an example of a second positive input port 135-b and/or an input port of 110-a through 110-c as described with reference to FIG. 1; second negative input port 445 may be an example of a second negative input port 135-d and/or an input port of 110-a through 110-c as described with reference to FIG. 1; and output port 450 may be an example of any of output ports 120-a, 120-b, or 120-c.

[0039] First negative input port 430 may be coupled with a gate of transistor 410-a, first positive input port 435 may be coupled with a gate of transistor 410-b, second positive input port 440 may be coupled with a gate of transistor 410-c; and second negative input port 445 may be coupled with a gate of transistor 410-d. Transistors 410-a and 410-b may be included in a first rectification stage 405-a and transistors 410-c and 410-d may be included in a second rectification stage 405-b.

[0040] In some examples, rectifier circuit 400 may act as a differential rectifier in order to output a voltage at output port 450 associated with a power of an RF signal (e.g., an RF signal received at first positive input port 435). For instance, the differential pair of first rectification stage 405-a (e.g., transistors 410-a and 410-b) and the differential pair of second rectification stage 405-b (e.g., transistors 410-c and 410-d) may rectify an input (e.g., provided via first negative input port 430, first positive input port 435, second positive input port 440, and second negative input port 445) while the transistors between output port 450 and rectification stages 405-a and 405-b may supply current to rectification stages 405-a and 405- b and may filter the output of rectification stages 405-a and 405-b (e.g., by utilizing resistive element 455 and capacitive element 460).

[0041] In some examples, a parasitic capacitance of transistor 410-a and a resistive element (e.g., a resistor) coupled with first negative input port 430 may be included in a passive attenuator for first negative input port 430; a parasitic capacitance of transistor 410-b and a resistive element (e.g., a resistor) coupled with first positive input port 435 may be included in a passive attenuator for first positive input port 435; a parasitic capacitance of transistor 410-c and a resistive element (e.g., a resistor) coupled with second positive input port 440 may be included in a passive attenuator for second positive input port 440; and a parasitic capacitance of transistor 410-d and a resistive element (e.g., a resistor) coupled with second negative input port 445 may be included in a passive attenuator for second negative input port 445.

[0042] FIGs. 5A, 5B, and 5C show examples of passive attenuation schemes 500-a, 500-b, and 500-c that support a wide band power detector with high dynamic range in accordance with aspects of the present disclosure. In some examples, FIGs. 5A, 5B, and 5C may be implemented by one or more aspects of FIGs. 1 and 2. For instance, rectifiers 515 -a, 515-b, and 515-c may each be an example of any of rectifiers 115-b or 115-c as described with reference to FIG. 1 or any of rectifiers 215-b through 215-g as described with reference to FIG. 2. Additionally, or alternatively, resistive element 505 (e.g., a resistor) and/or any of capacitive elements 510-a through 510-c (e.g., capacitors) may be examples of components included within any of attenuators 125-a through 125-h as described with reference to FIG. 1 or any attenuator of a set of attenuators 245 of FIG. 2.

[0043] FIG. 5A may represent a first passive attenuator that includes a resistive element 505. The resistive element 505, in conjunction with a parasitic capacitance of a transistor of rectifier 515-a, may attenuate an RF signal that is provided to resistive element 505. An output voltage or an output current provided by rectifier 515-a may be dependent on a power of the attenuated RF signal provided to rectifier 515-a via resistive element 505. Although discussed as using the parasitic capacitance of the rectifier 515-a, in some cases a discrete capacitor may be added on the input port of the rectifier 515-a. The value of the resistive element 505 may depend on the desired attenuation, parasitic capacitance of the rectifier 515- a, and frequency range of operation of the power detector.

[0044] FIG. 5B may represent a second passive attenuator that includes a capacitive element 510-a (e.g., a capacitor). The capacitive element 510-a may attenuate an RF signal that is provided to the capacitive element 510-a. An output voltage or an output current provided by rectifier 515-b may be dependent on a power of the attenuated RF signal provided to rectifier 515-b via capacitive element 510-a. The value of the capacitive element 510-a may depend on the desired attenuation, parasitic capacitance of the rectifier 515-b, and frequency range of operation of the power detector.

[0045] FIG. 5C may represent a third passive attenuator that includes a first capacitive element 510-b (e.g., a capacitor) and a second capacitive element 510-c (e.g., another capacitor). Capacitive element 510-b may be coupled directly with a positive port or a negative port and capacitive element 510-c may be coupled with a signal ground 515. The first capacitive element 510-b and the second capacitive element 510-c may act as a capacitive divider that attenuates an RF signal that is provided to the first capacitive element 510-h. An output voltage or an output current provided by rectifier 515-c may he dependent on a power of the attenuated RF signal provided to rectifier 515-c via first capacitive element 510-b. The value of the capacitive elements 510-b and 510-c may depend on the desired attenuation, parasitic capacitance of the rectifier 515-c, and frequency range of operation of the power detector.

[0046] FIG. 6 shows a flowchart illustrating a method 600 that supports a wide hand power detector with high dynamic range in accordance with aspects of the present disclosure. The operations of the method 600 may be implemented by a device or its components as described herein. For example, the operations of the method 600 may be performed by a device as described with reference to FIGs. 1 through 6. In some examples, a device may execute a set of instructions to control the functional elements of the device to perform the described functions. Additionally, or alternatively, the device may perform aspects of the described functions using special-purpose hardware.

[0047] At 605, the method may include generating, by a plurality of passive attenuators coupled in parallel between a first port and a plurality of second ports and based on a radio frequency (RF) signal input to the first port, a respective plurality of attenuated RF signals on the plurality of second ports, wherein each of the plurality of passive attenuators has a different attenuation. The operations of block 605 may be performed in accordance with examples as disclosed herein. In some examples, aspects of the operations of 605 may be performed by an RF signal attenuator 25 as described with reference to FIG. .

[0048] At 610, the method may include outputting, by a plurality of rectifiers having respective input ports coupled with respective second ports of the plurality of second ports, respective currents at respective output ports that are dependent on respective powers of respective attenuated RF signals on the respective second ports, and wherein the respective output ports of the plurality of rectifiers are coupled together. The operations of block 610 may be performed in accordance with examples as disclosed herein. In some examples, aspects of the operations of 610 may be performed by a voltage output component 30 as described with reference to FIG. .

[0049] It should be noted that these methods describe examples of implementations, and that the operations and the steps may be rearranged or otherwise modified such that other implementations are possible. In some examples, aspects from two or more of the methods may be combined. For example, aspects of each of the methods may include steps or aspects of the other methods, or other steps or techniques described herein.

[0050] Information and signals described herein may be represented using any of a variety of different technologies and techniques. For example, data, instructions, commands, information, signals, bits, symbols, and chips that may be referenced throughout the description may be represented by voltages, currents, electromagnetic waves, magnetic fields or particles, optical fields or particles, or any combination thereof.

[0051] The various illustrative blocks and components described in connection with the disclosure herein may be implemented or performed using a general-purpose processor, a DSP, an ASIC, a CPU, an FPGA or other programmable logic device, discrete gate or transistor logic, discrete hardware components, or any combination thereof designed to perform the functions described herein. A general-purpose processor may be a microprocessor but, in the alternative, the processor may be any processor, controller, microcontroller, or state machine. A processor may also be implemented as a combination of computing devices (e.g., a combination of a DSP and a microprocessor, multiple microprocessors, one or more microprocessors in conjunction with a DSP core, or any other such configuration). Any functions or operations described herein as being capable of being performed by a processor may be performed by multiple processors that, individually or collectively, are capable of performing the described functions or operations.

[0052] The functions described herein may be implemented in hardware, software executed by a processor, firmware, or any combination thereof. If implemented in software executed by a processor, the functions may be stored on or transmitted over as one or more instructions or code on a computer readable medium. Other examples and implementations are within the scope of the disclosure and appended claims. For example, due to the nature of software, functions described herein can be implemented using software executed by a processor, hardware, firmware, hardwiring, or combinations of any of these. Features implementing functions may also be physically located at various positions, including being distributed such that portions of functions are implemented at different physical locations.

[0053] Computer-readable media includes both non-transitory computer storage media and communication media including any medium that facilitates transfer of a computer program from one location to another. A non-transitory storage medium may be any available medium that may be accessed by a general-purpose or special-purpose computer. By way of example, and not limitation, non-transitory computer-readable media may include RAM, ROM, electrically erasable programmable ROM (EEPROM), flash memory, compact disk (CD) ROM or other optical disk storage, magnetic disk storage or other magnetic storage devices, or any other non-transitory medium that may be used to carry or store desired program code means in the form of instructions or data structures and that may be accessed by a general-purpose or special-purpose computer, or a general -purpose or special-purpose processor. Also, any connection is properly termed a computer-readable medium. For example, if the software is transmitted from a website, server, or other remote source using a coaxial cable, fiber optic cable, twisted pair, digital subscriber line (DSL), or wireless technologies such as infrared, radio, and microwave, then the coaxial cable, fiber optic cable, twisted pair, DSL, or wireless technologies such as infrared, radio, and microwave are included in the definition of computer-readable medium. Disk and disc, as used herein, include CD, laser disc, optical disc, digital versatile disc (DVD), floppy disk and Blu-ray disc. Disks may reproduce data magnetically, and discs may reproduce data optically using lasers. Combinations of the above are also included within the scope of computer-readable media. Any functions or operations described herein as being capable of being performed by a memory may be performed by multiple memories that, individually or collectively, are capable of performing the described functions or operations.

[0054] As used herein, including in the claims, “or” as used in a list of items (e.g., a list of items prefaced by a phrase such as “at least one of’ or “one or more of’) indicates an inclusive list such that, for example, a list of at least one of A, B, or C means A or B or C or AB or AC or BC or ABC (i.e., A and B and C). Also, as used herein, the phrase “based on” shall not be construed as a reference to a closed set of conditions. For example, an exemplary step that is described as “based on condition A” may be based on both a condition A and a condition B without departing from the scope of the present disclosure. In other words, as used herein, the phrase “based on” shall be construed in the same manner as the phrase “based at least in part on.”

[0055] As used herein, including in the claims, the article “a” before a noun is open-ended and understood to refer to “at least one” of those nouns or “one or more” of those nouns.

Thus, the terms “a,” “at least one,” “one or more,” “at least one of one or more” may be interchangeable. For example, if a claim recites “a component” that performs one or more functions, each of the individual functions may be performed by a single component or by any combination of multiple components. Thus, the term “a component” having characteristics or performing functions may refer to “at least one of one or more components” having a particular characteristic or performing a particular function. Subsequent reference to a component introduced with the article “a” using the terms “the” or “said” may refer to any or all of the one or more components. For example, a component introduced with the article “a” may be understood to mean “one or more components,” and referring to “the component” subsequently in the claims may be understood to be equivalent to referring to “at least one of the one or more components.” Similarly, subsequent reference to a component introduced as “one or more components” using the terms “the” or “said” may refer to any or all of the one or more components. For example, referring to “the one or more components” subsequently in the claims may be understood to be equivalent to referring to “at least one of the one or more components.”

[0056] In the appended figures, similar components or features may have the same reference label. Further, various components of the same type may be distinguished by following the reference label by a dash and a second label that distinguishes among the similar components. If just the first reference label is used in the specification, the description is applicable to any one of the similar components having the same first reference label irrespective of the second reference label, or other subsequent reference label.

[0057] The description set forth herein, in connection with the appended drawings, describes example configurations and does not represent all the examples that may be implemented or that are within the scope of the claims. The term “exemplary” used herein means “serving as an example, instance, or illustration,” and not “preferred” or “advantageous over other examples.” The detailed description includes specific details for the purpose of providing an understanding of the described techniques. These techniques, however, may be practiced without these specific details. In some instances, well known structures and devices are shown in block diagram form in order to avoid obscuring the concepts of the described examples.

[0058] The description herein is provided to enable a person skilled in the art to make or use the disclosure. Various modifications to the disclosure will be readily apparent to those skilled in the art, and the generic principles defined herein may be applied to other variations without departing from the scope of the disclosure. Thus, the disclosure is not limited to the examples and designs described herein but is to be accorded the broadest scope consistent with the principles and novel features disclosed herein.

Claims

CLAIMS What is claimed is:

1. A circuit, comprising: a plurality of passive attenuators (125-a, 125-e) coupled in parallel between a first port (105-a) and a plurality of second ports (135-a), the plurality of passive attenuators (125-a, 125-e) configured to generate, based on a radio frequency (RF) signal (140-a) input to the first port (105-a), a respective plurality of attenuated RF signals (150) on the plurality of second ports (135-a), wherein each of the plurality of passive attenuators (125-a, 125-e) has a different attenuation; and a plurality of rectifiers (115-b, 115-c) having respective input ports

(1 10-b, 1 10-c) coupled with respective second ports of the plurality of second ports (135-a), wherein the plurality of rectifiers (115-b, 115-c) are configured to output respective currents (145-b, 145-c) at respective output ports (120-b, 120-c) that are dependent on respective powers (310) of respective attenuated RF signals (150) on the respective second ports (135-a), and wherein the respective output ports (120-b, 120-c) of the plurality of rectifiers (115-b, 115-c) are coupled together.

2. The circuit of claim 1, wherein the first port (105-a) is a positive signal port, the plurality of passive attenuators (125-a, 125-e) is a first plurality of passive attenuators, and the input ports (110-b, 110-c) of the plurality of rectifiers

(115-b, 115-c) are positive input ports (435), the circuit further comprising: a second plurality of passive attenuators (125-c, 125-g) coupled in parallel between a negative signal port (105-b) and a plurality of third ports (135-c), wherein each of the second plurality of passive attenuators (125-c, 125-g) has a different attenuation, and wherein the plurality of rectifiers ( 115-b, 115-c) has respective negative input ports (430) coupled with respective third ports of the plurality of third ports (135-c).

3. The circuit of claim 2, wherein each of the plurality of rectifiers (115-b, 115-c) comprises a first rectification stage (405-a) between the positive input port (435) and the negative input port (430), and a second rectification stage (405-b) between a second positive input port (440) and a second negative input port (445), the circuit further comprising: V ^Z i 6- w - 1 a third plurality of passive attenuators ( 125-d, 125-h) coupled in parallel between the negative signal port (105-b) and a plurality of fourth ports (135-d), wherein each of the third plurality of passive attenuators (125-d, 125-h) has a different attenuation, and wherein the plurality of rectifiers (115-b, 115-c) has respective second negative input ports (445) coupled with respective fourth ports of the plurality of fourth ports (135-d); and a fourth plurality of passive attenuators (125-b, 125-f) coupled in parallel between the positive signal port (105-a) and a plurality of fifth ports (135-b), wherein each of the fourth plurality of passive attenuators (125-b, 125-f) has a different attenuation, and wherein the plurality of rectifiers has respective second positive input ports (440) coupled with respective fifth ports of the plurality of fifth ports (135-b).

4. The circuit of claim 3, wherein: the third plurality of passive attenuators (125-d, 125-h) are configured to generate, based on a second RF signal (140-b) input to the negative signal port (105-b), a respective plurality of attenuated signals on the plurality of fourth ports (135-d) and the fourth plurality of passive attenuators (125-b, 125-f) are configured to generate, based on the RF signal (140-a) input to the positive signal port (105-a), a respective plurality of attenuated signals on the plurality of fifth ports (135-b), and the respective currents (145-b, 145-c) output by the respective output ports (120-b, 120-c) of the plurality of rectifiers (115-b, 115-c) are further dependent on respective powers (310) of respective attenuated RF signals (150) on the respective fourth ports (135-d) and respective attenuated RF signals (150) of the respective fifth ports (135-b).

5. The circuit of any one of claims 3 or 4, wherein: each passive attenuator of the third plurality of passive attenuators (125-d, 125-h) has a same attenuation as at least one passive attenuator of the second plurality of passive attenuators (125-c, 125-g), and each passive attenuator of the fourth plurality of passive attenuators (125-b, 125-f) has a same attenuation as at least one passive attenuator of the first plurality of passive attenuators (125-a, 125-e). V ^Z i 6- w - 1

6. The circuits of any one of claims 2 through 5, wherein: the second plurality of passive attenuators (125-c, 125-g) are configured to generate, based on a second RF signal (140-b) input to the negative signal port (435), a respective plurality of attenuated RF signals (150) on the plurality of third ports (135-c), and the respective currents (145-b, 145-c) output by the respective output ports (120-b, 120-c) of the plurality of rectifiers (115-b, 115-c) are further dependent on respective powers (310) of respective attenuated RF signals (150) on the respective third ports (135-c).

7. The circuit of claim 6, wherein the second RF signal (140-b) is a complementary signal of the RF signal (140- ).

8. The circuits of any one of claims 2 through 7, wherein each passive attenuator of the second plurality of passive attenuators (125-c, 125-g) has a same attenuation as at least one passive attenuator of the first plurality of passive attenuators (125-a, 125-e).

9. The circuit of any one of claims 1 through 8, further comprising: a rectifier (115-a) separate from the plurality of rectifiers (115-b, 115-c) and that is coupled directly with the first port (105-a), wherein the rectifier (115-a) is configured to output a current (145-a) at an output port (120-a) that is dependent on a power (310) of the RF signal (140-a) input to the first port (105-a), and wherein the output port (120-a) of the rectifier (115-a) is coupled together with the respective output ports (120-b, 120-c) of the plurality of rectifiers (115-b, 115-c).

10. The circuit of any one of claims 1 through 9, wherein the respective current (145-b) for each output port (120-b) of the respective output ports of the plurality of rectifiers (115-b, 115-c) reaches a threshold current (325-a) at a different power value (320-a, 320-b) associated with the RF signal (140-a) relative to the respective currents (145-c) for each other output port (120-c) of the respective output ports of the plurality of rectifiers (115-b, 115-c).

11. The circuit of any one of claims 1 through 10, further comprising: a plurality of third ports (210), wherein the plurality of rectifiers (115-b,

115-c) are configured to output the respective currents (145-b, 14-c) at the respective V ^Z i 6- w - 1 output ports (120-b, 120-c) based at least in part on a bias voltage (207) input to the plurality of third ports (135-c), wherein the plurality of rectifiers (115-b, 115-c) has respective input ports (110-b, 110-c) coupled with respective third ports of the plurality of third ports (135-c).

12. The circuit of any one of claims 1 through 11, wherein each passive attenuator of the plurality of passive attenuators (125 -a, 125-e) comprises a resistive element (505) or a capacitive element (510-a, 510-b).

13. The circuit of claim 12, wherein the capacitive element (510-b) for each passive attenuator (125-a) comprises a plurality of capacitive elements (510-b, 510-c).

14. The circuit of claim 12, wherein each passive attenuator (125-a) comprises a parasitic capacitance of a respective transistor (410-a) coupled with the resistive element (505) for the passive attenuator (125-a).

15. A method, comprising: generating, by a plurality of passive attenuators (125-a, 125-e) coupled in parallel between a first port (105-a) and a plurality of second ports (135-a) and based on a radio frequency (RF) signal (140-a) input to the first port (105-a), a respective plurality of attenuated RF signals (150) on the plurality of second ports (135-a), wherein each of the plurality of passive attenuators (125-a, 125-e) has a different attenuation; and outputting, by a plurality of rectifiers (115-b, 115-c) having respective input ports (110-b, 110-c) coupled with respective second ports of the plurality of second ports (125-a, 125-e), respective currents (145-b, 145-c) at respective output ports (120-b, 120-c) that are dependent on respective powers (310) of respective attenuated RF signals (150) on the respective second ports (135-a), and wherein the respective output ports (120-b, 120-c) of the plurality of rectifiers (115-b, 115-c) are coupled together.

16. The method of claim 15, wherein the first port (105-a) is a positive signal port, the plurality of passive attenuators (125-a, 125-e) is a first plurality of passive attenuators, and the input ports (110-b, 110-c) of the plurality of rectifiers are positive input ports (435), the method further comprising: V . 4 I 5- WU- I generating, by a second plurality of passive attenuators (125-c, 125-g) coupled in parallel between a negative signal port (105-b) and a plurality of third ports (135-c), a respective plurality of attenuated RF signals (150) on the plurality of third ports (135-c), wherein the plurality of rectifiers has respective negative input ports (430) coupled with respective third ports of the plurality of third ports (135-c), wherein each of the second plurality of passive attenuators (125-c, 125-g) has a different attenuation, and wherein outputting the respective currents (145-b, 145-c) by the respective output ports (120-b, 120-c) of the plurality of rectifiers (115-b, 115-c) is further dependent on respective powers (310) of attenuated RF signals (150) on the respective third ports (135-c).

17. The method of claim 16, wherein each of the plurality of rectifiers (115-b, 115-c) comprises a first rectification stage (405-a) between the positive input port (435) and the negative input port (430), and a second rectification stage (405-b) between a second positive input port (440) and a second negative input port (445), the method further comprising: generating, by a third plurality of passive attenuators (125-d, 125-h) coupled in parallel between the negative signal port (105-b) and a plurality of fourth ports (135-d), a respective plurality of attenuated RF signals (150) on the plurality of fourth ports (135-d), wherein the plurality of rectifiers (115-b, 115-c) has respective second negative input ports (445) coupled with respective fourth ports of the plurality of fourth ports (135-d), wherein each of the third plurality of passive attenuators (125-d, 125-h) has a different attenuation, and wherein outputting the respective currents (145-b, 145-c) by the respective output ports (120-b, 120-c) of the plurality of rectifiers (115-b, 115-c) is further dependent on respective powers (310) of the attenuated RF signals (150) on the respective fourth ports (135-d); and generating, by a fourth plurality of passive attenuators (125-b, 125-f) coupled in parallel between the positive signal port (105-a) and a plurality of fifth ports (135-b), a respective plurality of attenuated RF signals (150) on the plurality of fifth ports (135-b), wherein the plurality of rectifiers (115-b, 115-c) has respective second positive input ports (440) coupled with respective fifth ports of the plurality of fifth ports (135-b), wherein each of the fourth plurality of passive attenuators (125-b, 125-f) has a different attenuation, and wherein outputting the respective currents (145-b, 145-c) by the respective output ports (120-b, 120-c) of the plurality of rectifiers (115-b, V . 4 I 5- WU- I

115-c) is further dependent on respective powers (310) of the attenuated RF signals (150) on the respective fifth ports (135-b).

18. The method of claim 17, wherein: each passive attenuator of the third plurality of passive attenuators (125-d, 125-h) has a same attenuation as at least one passive attenuator of the second plurality of passive attenuators (125-c, 125-g), and each passive attenuator of the fourth plurality of passive attenuators (125-b, 125-f) has a same attenuation as at least one passive attenuator of the first plurality of passive attenuators (125-a, 125-e).

19. The method of any one of claims 16 through 18, wherein each passive attenuator of the second plurality of passive attenuators (125-c, 125-g) has a same attenuation as at least one passive attenuator of the first plurality of passive attenuators (125-a, 125-e).

20. The method of any one of claims 16 through 19, wherein the second RF signal (140-b) is a complementary signal of the RF signal (140-a).

21. The method of any one of claims 15 through 20, further comprising: outputting, by a rectifier (115-a) separate from the plurality of rectifiers (115-b, 115-c) and that is coupled directly with the first port (105-a), a current (145-a) at an output port (120-a) that is dependent on a power (310) of the RF signal (140-a) input to the first port (105-a), and wherein the output port (120-a) of the rectifier (115-a) is coupled together with the respective output ports (120-b, 120-c) of the plurality of rectifiers (115-b, 115-c).

22. The method of any one of claims 15 through 21, wherein the respective current (145-b) for each output port (120-b) of the respective output ports of the plurality of rectifiers (115-b, 115-c) reaches a threshold current (325-a) at a different power value (320-a, 320-b) associated with the RF signal (140-a) relative to the respective currents (145-c) for each other output port (120-c) of the respective output ports of the plurality of rectifiers (115-b, 115-c). V ^Z i 6- w - 1

23. The method of any one of claims 15 through 22, wherein: the plurality of rectifiers (115-b, 115-c) are configured to output the respective currents (145-b, 145-c) at the respective output ports (120-b, 120-c) based at least in part on a bias voltage (207) input to a plurality of third ports (210), and the plurality of rectifiers (115-b, 115-c) has respective input ports (110-b, 110-c) coupled with respective third ports of the plurality of third ports (210).

24. The method of any one of claims 15 through 23, wherein each passive attenuator of the plurality of passive attenuators (125 -a, 125-e) comprises a resistive element (505) or a capacitive element (510-a, 510-b).

25. The method of claim 24, wherein the capacitive element (510-b) for each passive attenuator (125-a) comprises a plurality of capacitive elements (510-b, 510-c).

26. The method of claim 24, wherein each passive attenuator (125-a) comprises a parasitic capacitance of a respective transistor (410-a) coupled with the resistive element (505) for the passive attenuator (125-a).