WO2024045351A1 - Method and apparatus for predicting service life of cmos device, electronic device, and medium - Google Patents

Method and apparatus for predicting service life of cmos device, electronic device, and medium Download PDF

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WO2024045351A1
WO2024045351A1 PCT/CN2022/132173 CN2022132173W WO2024045351A1 WO 2024045351 A1 WO2024045351 A1 WO 2024045351A1 CN 2022132173 W CN2022132173 W CN 2022132173W WO 2024045351 A1 WO2024045351 A1 WO 2024045351A1
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time series
sample data
cmos device
series sample
life prediction
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PCT/CN2022/132173
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French (fr)
Chinese (zh)
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赵东艳
梁英宗
陈燕宁
邵瑾
张东嵘
鹿祥宾
付振
刘芳
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北京智芯微电子科技有限公司
北京芯可鉴科技有限公司
国家电网有限公司
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Publication of WO2024045351A1 publication Critical patent/WO2024045351A1/en

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    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/26Testing of individual semiconductor devices
    • G01R31/2642Testing semiconductor operation lifetime or reliability, e.g. by accelerated life tests
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/26Testing of individual semiconductor devices
    • G01R31/2601Apparatus or methods therefor

Definitions

  • the present disclosure relates to the field of semiconductor technology, and specifically to a complementary metal oxide semiconductor (Complementary Metal Oxide Semiconductor, CMOS) device life prediction method, device, electronic equipment and medium.
  • CMOS complementary Metal Oxide Semiconductor
  • CMOS devices As the production process technology of CMOS devices reaches the nanometer level, the size of CMOS devices has approached the physical limit. As the size of CMOS devices produced continues to shrink, the damage caused to CMOS devices by certain effects that may occur during the production, manufacturing and use of small-size devices cannot be ignored. In the prior art, test data on damage caused to CMOS devices by hot carrier injection effects are often used to calculate the service life of CMOS devices and judge their reliability. However, the number of CMOS devices produced in the industrial production process in our country is huge. Even if the hot carrier injection effect accelerated stress test is used for CMOS devices, it takes a lot of test time to know their failure time and determine their service life, which reduces the cost of CMOS devices. The efficiency of device quality inspection extends the production cycle of CMOS devices.
  • embodiments of the present disclosure provide a CMOS device life prediction method, device, electronic equipment, and media.
  • an embodiment of the present disclosure provides a method for predicting the life of a CMOS device.
  • the CMOS device life prediction method includes:
  • time series sample data set of electrical parameters of the CMOS device under accelerated stress testing, where the time series sample data set includes time series sample data representing the amount of electrical parameter degradation that characterizes the life of the CMOS device;
  • the life prediction model is used to predict the failure time of the CMOS device.
  • Optional also includes:
  • using the life prediction model to predict the failure time of the CMOS device includes using the verified life prediction model to predict the failure time of the CMOS device.
  • the timing model is a long short-term memory model.
  • the long short-term memory model has 1 to 5 hidden layer nodes and 1 fully connected layer node.
  • the electrical parameters characterizing the life of the CMOS device include at least one of the following: saturation leakage current, threshold voltage, and transconductance;
  • the electrical parameter degradation amount in the time series sample data set is less than or equal to the corresponding electrical parameter degradation amount when the CMOS device fails.
  • the maximum value of electrical parameter degradation in the time series sample data set is 5% to 7% of the corresponding electrical parameter.
  • the maximum value of the electrical parameter degradation in the time series sample data set is 5%, 6%, or 7% of the corresponding electrical parameter.
  • Optional also includes:
  • the output of the previous process is used as the input of the next process, and the preprocessing in the multiple methods is performed in sequence to obtain a processed time series sample data set.
  • using the training set to train a time series model to obtain a lifespan prediction model includes:
  • the time series sample data at the previous moment in the training set is used as the input feature, and the time series sample data at the current moment in the training set is used as the output feature, and the long and short-term memory model is subjected to supervised learning training.
  • using the training set to train a time series model to obtain a lifespan prediction model includes:
  • the sliding time window method is used to use multiple continuous time series sample data in the training set as input features, and the time series sample data at the next moment of the sliding time window in the training set is used as the output feature.
  • Memory models are trained for supervised learning.
  • the number of continuous time series sample data is 8 to 11; or
  • the number of continuous time series sample data is 9.
  • using the training set to train a time series model and obtain a lifespan prediction model further includes:
  • using the training set to train a time series model and obtain a lifespan prediction model further includes:
  • the life prediction model is subjected to multiple iterations.
  • the number of iterations is 1,000 to 10,000 times.
  • an embodiment of the present disclosure provides a device for predicting the life of a CMOS device.
  • the CMOS device life prediction device includes:
  • An acquisition module configured to acquire a time series sample data set of electrical parameters of the CMOS device under accelerated stress testing, where the time series sample data set includes time series sample data characterizing the electrical parameter degradation amount of the CMOS device life;
  • a first classification module configured to obtain a training set based on the time series sample data set
  • a training module configured to train a time series model using the training set to obtain a lifespan prediction model
  • a prediction module configured to predict the failure time of the CMOS device using the life prediction model.
  • Optional also includes:
  • the second classification module is configured to obtain a test set based on the time series sample data set
  • a verification module configured to verify the life prediction model using the test set to obtain the verified life prediction model
  • the prediction module is further configured to predict the failure time of the CMOS device using the verified life prediction model.
  • the timing model is a long short-term memory model.
  • the long short-term memory model has 1 to 5 hidden layer nodes and 1 fully connected layer node.
  • the electrical parameters characterizing the life of the CMOS device include at least one of the following: saturation leakage current, threshold voltage, and transconductance;
  • the electrical parameter degradation amount in the time series sample data set is less than or equal to the corresponding electrical parameter degradation amount when the CMOS device fails.
  • the maximum value of electrical parameter degradation in the time series sample data set is 5% to 7% of the corresponding electrical parameter.
  • the maximum value of the electrical parameter degradation in the time series sample data set is 5%, 6%, or 7% of the corresponding electrical parameter.
  • Optional also includes:
  • the preprocessing module is configured to preprocess the time series sample data set through any one or more of the following methods to obtain a processed time series sample data set:
  • the output of the previous process is used as the input of the next process, and the preprocessing in the multiple ways is performed in sequence to obtain a processed time series sample data set.
  • the training module includes:
  • a supervised learning module configured to use the time series sample data at the previous moment in the training set as input features, use the time series sample data at the current moment in the training set as output features, and perform supervised learning on the long short-term memory model. train.
  • the training module includes:
  • a supervised learning module configured to use a sliding time window method to use multiple continuous time series sample data in the training set as input features, and use the time series sample data at the next moment of the sliding time window in the training set as output Features, perform supervised learning training on the long short-term memory model.
  • the number of continuous time series sample data is 8 to 11; or
  • the number of continuous time series sample data is 9.
  • the training module also includes:
  • the optimization module is configured to use the mean square error or the average absolute percentage error as the loss function, and use at least one of AdaGrad, RMSprop, and Adam optimizers to optimize model parameters to train the long short-term memory model.
  • the training module also includes:
  • An iteration module configured to iterate the life prediction model multiple times.
  • the number of iterations of the iteration module is 1,000 to 10,000 times.
  • embodiments of the present disclosure provide an electronic device including a memory and a processor, wherein the memory is used to store one or more computer instructions, and wherein the one or more computer instructions are processed by the The processor is executed to implement the method described in any one of the first aspects.
  • embodiments of the present disclosure provide a computer-readable storage medium on which computer instructions are stored. When the computer instructions are executed by a processor, the method as described in any one of the first aspects is implemented.
  • an embodiment of the present disclosure provides a computer program product, which includes computer instructions that, when executed by a processor, implement the method steps described in any one of the first aspects.
  • the method includes: obtaining a time series sample data set of electrical parameters of the CMOS device under an accelerated stress test, where the time series sample data set includes electrical parameter degradation that characterizes the life of the CMOS device. Amount of time series sample data; obtain a training set based on the time series sample data set; use the training set to train a timing model to obtain a life prediction model; use the life prediction model to predict the failure time of the CMOS device.
  • the above technical solution conducts non-complete accelerated stress tests on CMOS devices to obtain a time series sample data set in which the electrical parameter degradation amount that characterizes the life of the CMOS device is within the range from the initial value to the preset threshold, and the life span is trained based on the time series sample data set. Predict the model, and then use the model to predict the failure time of the CMOS device, which reduces the time cost of conducting a complete accelerated stress test on the CMOS device to determine its service life in the existing technology, improves product quality inspection efficiency, and shortens the time CMOS device production cycle.
  • FIG. 1 shows a flowchart of a CMOS device life prediction method according to an embodiment of the present disclosure.
  • FIG. 2 shows a structural diagram of a Long Short-Term Memory (LSTM) model according to an embodiment of the present disclosure.
  • LSTM Long Short-Term Memory
  • FIG. 3A shows a curve of the degradation amount of saturation leakage current of a CMOS device as a function of time in an accelerated stress test.
  • FIG. 3B shows a schematic diagram of the prediction results of the life prediction model trained using the time series sample data set when the saturation leakage current degradation amount reaches 5%.
  • Figure 4 shows a flow chart of a method for preprocessing a time series sample data set.
  • Figure 5 shows a flow chart of a method for training a lifespan prediction model using a training set.
  • FIG. 6 shows a structural block diagram of a CMOS device life prediction device according to an embodiment of the present disclosure.
  • FIG. 7 shows a structural block diagram of an electronic device according to an embodiment of the present disclosure.
  • FIG. 8 shows a schematic structural diagram of a computer system suitable for implementing methods according to embodiments of the present disclosure.
  • the acquisition of user information or user data is an operation authorized, confirmed by the user, or actively selected by the user.
  • CMOS devices As the production process technology of CMOS devices reaches the nanometer level, the size of CMOS devices has approached the physical limit. As the size of CMOS devices produced continues to shrink, the damage caused to CMOS devices by certain effects that may occur during the production, manufacturing and use of small-size devices cannot be ignored. In the prior art, test data on damage caused to CMOS devices by hot carrier injection effects are often used to calculate the service life of CMOS devices and judge their reliability. However, the number of CMOS devices produced in the industrial production process in our country is huge. Even if the hot carrier injection effect accelerated stress test is used for CMOS devices, it will take a lot of test time to know their failure time and determine their service life, which reduces the cost of CMOS devices. The efficiency of device quality inspection extends the production cycle of CMOS devices.
  • the present disclosure is made to address, at least in part, problems in the prior art identified by the inventors.
  • FIG. 1 shows a flowchart of a CMOS device life prediction method according to an embodiment of the present disclosure.
  • the CMOS device life prediction method includes the following steps S101-S104:
  • step S101 obtain a time series sample data set of the electrical parameters of the CMOS device under accelerated stress testing, where the time series sample data set includes time series sample data characterizing the electrical parameter degradation amount of the CMOS device life;
  • step S102 a training set is obtained based on the time series sample data set
  • step S103 use the training set to train the time series model to obtain a lifespan prediction model
  • step S104 the life prediction model is used to predict the failure time of the CMOS device.
  • CMOS device life prediction method also includes:
  • using the life prediction model to predict the failure time of the CMOS device includes using the verified life prediction model to predict the failure time of the CMOS device.
  • the CMOS device life prediction method provided by the present disclosure can be implemented by a CMOS device life prediction device.
  • the CMOS device life prediction device can be implemented by a single computer host or by a cloud server.
  • the above method can also be implemented by software, hardware, or a combination of both, and this disclosure does not limit this.
  • a time series sample data set is obtained through an accelerated test.
  • the accelerated test may be an accelerated stress test or other tests that can quickly identify the cause of product failure and quickly assess product reliability.
  • the disclosure does not limit this.
  • this disclosure takes time series sample data obtained by using an accelerated stress test as an example for explanation. Accelerated stress testing is a testing method to study the reliability of semiconductor devices. It can shorten the test time. That is, under the premise of controlling the same failure mechanism, by increasing the stress, the degradation process of the CMOS device is accelerated, and the failure rate of the CMOS device can be obtained in a short time. Wait for test data.
  • the present disclosure uses the degree of damage caused to the CMOS device by the hot carrier injection (Hot Carrier Injection, HCI) effect to determine whether the CMOS device has failed.
  • HCI hot Carrier Injection
  • HCI hot Carrier Injection
  • the mathematical model established by extracting time series sample data can be a recurrent neural network (Recurrent Neural Network, RNN), a long short-term memory network (Long Short-Term Memory, LSTM), a gated recurrent unit (Gate Recurrent Unit, GRU), Temporal Convolutional Network (Temporal Convolutional Network, TCN) and other timing models.
  • RNN Recurrent Neural Network
  • LSTM Long Short-Term Memory
  • GRU Gated recurrent Unit
  • Temporal Convolutional Network Temporal Convolutional Network
  • TCN Temporal Convolutional Network
  • this disclosure adopts the training LSTM model to obtain the life prediction model of CMOS devices.
  • the LSTM model controls the transmission state through the gating state, remembers the information that requires long-term memory, and forgets unimportant information, unlike the ordinary RNN model. In this way, there is only one memory superposition method, which is more suitable for training the life prediction model of the CMOS device of the present disclosure.
  • LSTM Long Short-Term Memory
  • RNN Recurrent Neural Network
  • the LSTM model includes an input layer, a hidden layer and an output layer.
  • the number of neurons in the input layer corresponds to the input parameter characteristics and is initialized to the capacity value predicted by the neural network.
  • the hidden layer in LSTM consists of a forget gate (forget gate) and an input gate (input gate). ) and the output gate (outputgate) are composed of three parts. These gates can be opened or closed to determine whether the memory state of the model network (the state of the previous network) in this layer reaches the threshold to be added to the calculation of the current layer.
  • the gate node uses the sigmoid function to calculate the memory state of the network as input; if the output result reaches the threshold, the gate output is multiplied with the calculation result of the current layer as the input of the next layer; if the threshold is not reached, the output result is forgotten .
  • the weights of each layer, including gate nodes, are updated during each model backpropagation training process.
  • the memory function of the LSTM model is implemented by these gate nodes.
  • Figure 2 shows a structural diagram of an LSTM model according to an embodiment of the present disclosure.
  • x t is the input value at the current moment
  • h t-1 is the output value at the previous moment
  • c t-1 is the unit state at the previous moment
  • h t is the output at the current moment
  • c t is The unit state at the current moment
  • is the sigmoid activation function
  • tanh is the tanh activation function.
  • f t ⁇ (W f [h t-1 , x t ]+b f ), this gate determines how much of the unit state c t-1 at the previous moment is retained to the current moment c t , where, f t refers to the output value of the hidden layer at the current moment, ⁇ is the sigmoid activation function, W f is the forgetting gate weight matrix related to the input value x t at the current moment, h t-1 is the output value of the previous moment, x t is the current moment The input value of , b f is the bias term;
  • c t f t *c t-1 +i t *(tanh(W c [h t-1 , x t ]+b c )), this gate determines how much of the current input value x t is retained in the unit state c t , where i t is the output value of the input gate at the current moment, ⁇ is the sigmoid activation function, Wi is the weight matrix of the input gate, h t-1 is the output value of the previous moment, x t is the current moment Input value, b i is the input gate bias term, c t is the unit state at the current moment, f t refers to the output value of the hidden layer at the current moment, c t-1 is the unit state at the previous moment, tanh is the tanh activation function, W c is the weight matrix of the unit state, b c is the bias term of the unit state;
  • Output gate: h t ⁇ (W o [h t-1 , x t ]+ bo )*tanh(c t ), this gate controls how much of the unit state c t is output to the current output value h t , where, h t is the output value of the output gate at the current moment, ⁇ is the sigmoid activation function, W o is the output gate weight matrix related to the input value x t at the current moment, h t-1 is the output value of the previous moment, x t is the current moment The input value of , b o is the bias term, tanh is the tanh activation function, and c t is the unit state at the current moment.
  • the present disclosure in order to make the model obtained by training more accurate, can select an LSTM neural network model with 1 to 5 hidden layer nodes and 1 fully connected layer node.
  • the time series sample data may be the values of electrical parameters that characterize the life of the CMOS device as they change over time.
  • the electrical parameters that characterize the life of the CMOS device may be static electrical parameters such as saturation leakage current, threshold voltage, and transconductance drift. Any one or more, this disclosure does not limit this. For example, taking the saturation leakage current as an example, when the degradation of the saturation leakage current reaches 10%, it means that the CMOS device has failed. Then, the time series sample data set is the time series data composed of the degradation amount of the time-saturation leakage current. Similarly, a 10% change in threshold voltage or a 10% change in transconductance can also indicate failure of the CMOS device.
  • the technical solution claimed in this disclosure is to obtain a time series sample data set of the CMOS device through a non-complete accelerated stress test to train and test the model, and predict the service life of the CMOS device through the model.
  • the complete accelerated stress test refers to the time series sample data set of the electrical parameters of the CMOS device under the accelerated stress test obtained through the test.
  • the threshold value It refers to the percentage value of the electrical parameter degradation amount when the CMOS device fails;
  • the non-complete accelerated stress test refers to the time series sample data set of the electrical parameters of the CMOS device under the accelerated stress test obtained through the test, which is the electrical parameter degradation amount that characterizes the life of the CMOS device.
  • Part of the timing data that reaches the threshold range that is, the amount of electrical parameter degradation that characterizes the life of the CMOS device is smaller than the corresponding electrical parameter degradation amount when the CMOS device fails.
  • the complete accelerated stress test refers to obtaining the time series sample data set of the electrical parameters of the CMOS device under the accelerated stress test, which is all the time series data in the range from 0 to 10% of the degradation amount of the saturation leakage current; incomplete accelerated stress
  • the test refers to obtaining the time series sample data of the electrical parameters of the CMOS device under the accelerated stress test.
  • the data set is part of the time series data in the range of the degradation amount of the saturation leakage current from 0 to 10%.
  • the parameter time series sample data set is the time series data in which the degradation amount of the saturation leakage current is less than 10%.
  • Time series sample data set of the device Theoretically, when the amount of degradation is higher and the amount of data in the acquired time series sample data set is larger, the accuracy of the life prediction model obtained by training will be higher; in fact, the time series when the saturation leakage current degradation amount reaches different proportions is selected.
  • the sample data set was used for model training, and the root mean square error (RMSE) results between the predicted value of the failure time of the obtained model and the test value of the complete accelerated stress test are shown in Table 1.
  • RMSE root mean square error
  • FIG. 3A shows a curve of the degradation amount of saturation leakage current of a CMOS device as a function of time in an accelerated stress test.
  • the ordinate of each point on the time-varying curve is the degradation amount ⁇ Idsat (unit: %) of the saturated leakage current, and the corresponding abscissa is the time (unit: %) corresponding to the degradation amount of the saturated leakage current. s).
  • the degradation amount of the saturation leakage current reaches 10% of the initial value, it means that the CMOS device has failed.
  • the time point when the degradation amount of the saturation leakage current reaches 10% of the initial value is read from the time variation curve, which is the failure of the CMOS device. time.
  • the existing technology is to conduct a complete hot-carrying current flow on the CMOS device.
  • the timing data of the saturated leakage current degradation of the CMOS device reaching 10% of the initial value was obtained through the test.
  • the failure time interval of the CMOS device was known.
  • the entire test process lasted more than 100,000 seconds. The time cost is higher.
  • the present disclosure conducts a non-complete accelerated stress test on a CMOS device under the same test conditions.
  • the obtained time series sample data set of the CMOS device can be that the degradation amount of the saturation leakage current of the CMOS device reaches 5% of the initial value, or 6%, or 7%, or other time series sample data sets less than 10%, such as conducting a hot carrier injection effect accelerated stress test on a CMOS device, and obtaining through the test that the degradation amount of the saturation leakage current of the CMOS device reaches the initial value.
  • FIG. 3B shows a schematic diagram of the prediction results of the life prediction model trained using the time series sample data set when the saturation leakage current degradation amount reaches 5%.
  • the ordinate in the figure is the degradation amount ⁇ Idsat (unit: %) of the saturation leakage current, and the corresponding abscissa is the time (unit: s) corresponding to the degradation amount of the saturation leakage current.
  • the curve represents the value of the degradation amount of the saturated leakage current measured in the complete accelerated stress test as a function of time.
  • the triangular curve represents the saturation predicted by the life prediction model trained using the time series sample data set when the degradation amount of the saturation leakage current reaches 5%. The amount of leakage current degradation that changes with time.
  • the time series sample data set is divided into a training set and a test set, and the training set is used to train the time series model to obtain a life prediction model; the test set is used to verify the life prediction model to obtain a verified life prediction model; the verified life prediction model is used Predict the failure time of CMOS devices. That is, compared with the existing technology, the technical solution of the present disclosure significantly reduces the time cost for obtaining the service life results of CMOS devices.
  • a training set and a test set are obtained based on a time series sample data set; a time series model is trained using the training set to obtain a lifespan prediction model; and the lifespan prediction model is verified using the test set to obtain a verified lifespan prediction.
  • Model predict the failure time of the CMOS device using the validated life prediction model.
  • the sliding time window method is used to take L time series sample data in the training set as input features, and the tail of the sliding time window in the training set is used.
  • the time series sample data at one moment is used as the output feature to perform supervised learning training on the long short-term memory model.
  • L the time series sample data at the previous moment in the training set is used as the input feature
  • the time series sample data at the current moment in the training set is used as the output feature to perform supervised learning training on the long and short-term memory model
  • 1 ⁇ L consecutive time series sample data in each sliding time window of the training set are used as input features, and the time series sample data at the next moment of the sliding time window are used as output features to supervise the long and short-term memory model.
  • 8 ⁇ L ⁇ 11, or 6 ⁇ L ⁇ 13 can be selected to make the trained model more accurate.
  • Different numbers of continuous time series sample data are selected as input features in the sliding time window to perform supervised learning training on the long short-term memory model.
  • the mean square between the predicted value of the failure time of the model and the test value of the complete accelerated stress test is obtained.
  • the root error (RMSE) results are shown in Table 2. The results show that when the number of continuous time series sample data in the sliding time window is between 8-11,
  • the RMSE is in a relatively small range, that is, the obtained life prediction model has high accuracy.
  • the RMSE is 0.265, that is, 9 continuous time series sample data in the sliding time window of the training set are used as input features, and the The time series sample data at the last moment of the sliding time window is used as the output feature, and the long short-term memory model is supervised learning and trained, and the life prediction model obtained has the highest accuracy.
  • a time-varying curve can be drawn based on the predicted value output by the life prediction model, and the failure time of the CMOS device can be directly read based on the time-varying curve.
  • the training set and the test set are obtained based on the time series sample data set.
  • the time series sample data set obtained through the experiment can be divided into the training set and the test set according to a certain proportion or other methods, thereby improving the generalization ability of the model and preventing the occurrence of Overfitting, and finding the optimal adjustment parameters of the model.
  • the method includes: obtaining a time series sample data set of electrical parameters of the CMOS device under an accelerated stress test, where the time series sample data set includes electrical parameter degradation that characterizes the life of the CMOS device. Amount of time series sample data; obtain a training set based on the time series sample data set; use the training set to train a timing model to obtain a life prediction model; use the life prediction model to predict the failure time of the CMOS device.
  • the above technical solution conducts non-complete accelerated stress tests on CMOS devices to obtain a time series sample data set in which the electrical parameter degradation amount that characterizes the life of the CMOS device is within the range from the initial value to the preset threshold, and the life span is trained based on the time series sample data set. Predict the model, and then use the model to predict the failure time of the CMOS device, which reduces the time cost of conducting a complete accelerated stress test on the CMOS device to determine its service life in the existing technology, improves product quality inspection efficiency, and shortens the time CMOS device production cycle.
  • Figure 4 shows a flow chart of a method for preprocessing a time series sample data set.
  • the time series sample data set is preprocessed to obtain a processed time series sample data set.
  • preprocessing includes the following steps S401-S403:
  • step S401 perform interpolation processing at equal time intervals on the time series sample data sets with non-equal time intervals
  • step S402 perform differential differentiation processing on the time series sample data set
  • step S403 the time series sample data set is normalized.
  • the obtained time series sample data set is preprocessed.
  • the method may be any one or more of interpolation processing, differential processing and normalization processing.
  • the output of the previous process is used as the input of the next process, and the preprocessing in the multiple methods is performed in sequence to obtain a processed time series sample data set.
  • the time series sample data obtained is time series sample data with non-equal time intervals, it needs to be interpolated to convert it into a time series sample data set with equal time intervals.
  • the interpolation processing method may be linear interpolation, spline interpolation, or time-based interpolation, and the present disclosure does not limit this.
  • the saturation leakage current degradation amount shows an upward trend with time, then it needs to be differentially processed to obtain stationary time series data.
  • the time series sample data set needs to be normalized to limit the convergence of the obtained time series sample data set within a certain range to eliminate the problems caused by singular sample data. adverse effects and improve the accuracy of subsequent training and testing models.
  • x′ is the value after normalization of time series sample data
  • x is the value before normalization of time series sample data
  • x max and x min are the maximum and minimum values in the time series sample data set.
  • Figure 5 shows a flow chart of a method for training a lifespan prediction model using a training set.
  • the method of using a training set to train a lifespan prediction model includes the following steps S501-S502:
  • step S501 use the time series sample data at the previous moment in the training set as the input feature, use the time series sample data at the current moment in the training set as the output feature, and perform supervised learning training on the long and short-term memory model;
  • the sliding time window method is used to use multiple continuous time series sample data in the training set as input features, and the time series sample data at the next moment of the sliding time window in the training set is used as the output feature.
  • Memory models are trained for supervised learning.
  • step S502 use the mean square error or the average absolute percentage error as the loss function, and use at least one of AdaGrad, RMSprop, and Adam optimizers to optimize model parameters to train the long short-term memory model.
  • the most accurate life prediction model is obtained by performing supervised learning training on the long short-term memory model to adjust model parameters.
  • the training set the time series sample data of the previous moment is input, the time series sample data of the current moment is output, and a one-to-one mapping relationship is formed between the input data and the output data, that is, a lifespan prediction model is formed.
  • the input value at the earliest moment can be set to 0, the corresponding output value is the time series sample data at the first moment, the sample data at time T-1 is used as the input value, the corresponding output value is the sample data at time T, and so on. .
  • the sliding time window method can be used to use multiple continuous time series sample data in the training set as input features, and the time series sample data at the next moment in the sliding time window in the training set as the output feature to perform the long and short-term memory model.
  • Supervised learning training For example, there are L continuous time series sample data in the sliding time window in the training set. These L continuous time series sample data are used as input features, and the time series sample data at the next moment of the sliding time window is used as the output feature.
  • Short-term memory models are trained for supervised learning.
  • 8 ⁇ L ⁇ 11, or 6 ⁇ L ⁇ 13 can be selected to make the trained model more accurate.
  • the mean square error or the average absolute percentage error can be used as the loss function, and at least one of AdaGrad, RMSprop, and Adam optimizers can be used to optimize the model parameters, Train the long short-term memory model.
  • the life prediction model when minimizing the loss function is the optimization goal and using AdaGrad, RMSprop, and Adam optimizers to iteratively update and adjust the parameters of the life prediction model, in order to prevent the life prediction model from non-convergence problems during the training process, the life prediction model can be modified Multiple iterations, the number of iterations can be 1,000 to 10,000 times.
  • Using the life prediction model of the present disclosure to predict CMOS device failure time includes: using any time series sample data as the input of the life prediction model to obtain the output of the life prediction model; updating the input of the life prediction model with the output of the life prediction model , to update the output of the life prediction model until the output of the life prediction model reaches the corresponding electrical parameter degradation threshold range when the CMOS device fails; according to the time interval between adjacent time sample data and the output of the life prediction model, determine the CMOS Device failure time.
  • the corresponding electrical parameter degradation threshold range when the CMOS device fails can be 9% to 11% of the initial value.
  • the corresponding electrical parameter degradation amount when the CMOS device fails is 10% of the initial value as an example to illustrate that in each batch of CMOS produced in industrialization
  • a certain proportion or number of CMOS devices are selected using random sampling.
  • a time series sample data set is obtained through an accelerated stress test in which the degradation amount of the saturation leakage current reaches 5% of the initial value.
  • the time series samples are The data set is divided into a training set and a test set. Then the time series sample data of the previous moment in the training set is used as the input feature, and the time series sample data of the current moment in the training set is used as the output feature.
  • Supervised learning training is performed on the long and short-term memory model.
  • Obtain the life prediction model and then input the time series sample data of the previous moment in the test set as input features into the life prediction model to calculate the time series sample data of the current moment, that is, predict the degradation amount of the saturation leakage current at the current moment, and calculate The mean square error between the predicted value and the data value in the test set takes the minimization of the loss function as the optimization goal.
  • Optimizers such as AdaGrad, RMSprop, and Adam are used to iteratively update and adjust the parameters of the life prediction model so that the established model has the highest accuracy and the predicted value Most accurate.
  • the time series sample data at the current moment is then input into the iteratively updated life prediction model as input features to calculate the time series sample data at the next moment, that is, to predict the degradation amount of the saturation leakage current at the next moment, until the next predicted
  • a time-varying curve can be drawn based on the predicted value output by the life prediction model, and the failure time of the CMOS device can be directly read based on the time-varying curve. Repeat this process for each CMOS device in the sample, and you can know the service life range of the batch of CMOS devices.
  • the life prediction model of the present disclosure uses the life prediction model of the present disclosure to predict the failure time of the CMOS device, or use the time series sample data in any sliding time window as the input of the life prediction model to obtain the output result of the life prediction model;
  • the output result of the model updates the input of the life prediction model to update the output of the life prediction model until the output of the life prediction model reaches the corresponding electrical parameter degradation threshold range when the CMOS device fails; according to the time between adjacent time sample data
  • the output of interval and lifetime prediction models determines the time to failure of CMOS devices.
  • the corresponding electrical parameter degradation threshold range when the CMOS device fails can be 9% to 11% of the initial value.
  • the corresponding electrical parameter degradation amount when the CMOS device fails is 10% of the initial value as an example.
  • L consecutive time series sample data in the sliding time window of the training set are used as input features, and the time series sample data at the current moment in the training set is used as the output feature.
  • For the long short-term memory model Perform supervised learning training to obtain a lifespan prediction model, and then input L consecutive time series sample data in the sliding time window of the test set as input features into the lifespan prediction model to calculate the time series sample data at the current moment, that is, predict the time series sample data at the current moment.
  • Degradation amount of saturation leakage current calculate the mean square error between the predicted value and the data value in the test set, take the minimization of the loss function as the optimization goal, use AdaGrad, RMSprop, Adam and other optimizers to iteratively update and adjust the life prediction model parameters, so that The established model has the highest accuracy and the most accurate prediction value.
  • L consecutive time series sample data containing the current moment in the sliding time window are used as input features into the iteratively updated life prediction model to calculate the time series sample data at the next moment, that is, predict the saturation leakage current at the next moment. until the predicted degradation amount of saturated leakage current reaches 10% of the initial value at the next moment.
  • a time-varying curve can be drawn based on the predicted value output by the life prediction model, and the time-varying curve can be read directly Take the failure time of the CMOS device.
  • the ordinate of each point on the time-varying curve is the output value of the life prediction model
  • the corresponding abscissa is the time point corresponding to the output value
  • the difference between the abscissas of adjacent points is The time interval between adjacent time sample data.
  • FIG. 6 shows a structural block diagram of a CMOS device life prediction device according to an embodiment of the present disclosure.
  • the device can be implemented as part or all of the electronic device through software, hardware, or a combination of both.
  • the CMOS device life prediction device 600 includes:
  • the acquisition module 601 is configured to acquire a time series sample data set of the electrical parameters of the CMOS device under accelerated stress testing, where the time series sample data set includes time series sample data characterizing the electrical parameter degradation amount of the CMOS device life;
  • the first classification module 602 is configured to obtain a training set based on the time series sample data set
  • the training module 603 is configured to train a time series model using the training set to obtain a lifespan prediction model
  • the prediction module 604 is configured to predict the failure time of the CMOS device using the life prediction model.
  • CMOS device life prediction device 600 also includes:
  • the second classification module is configured to obtain a test set based on the time series sample data set
  • a verification module configured to verify the life prediction model using the test set to obtain the verified life prediction model
  • the prediction module is further configured to predict the failure time of the CMOS device using the verified life prediction model.
  • the CMOS device life prediction device includes: an acquisition module configured to acquire a time series sample data set of the electrical parameters of the CMOS device under accelerated stress testing, where the time series sample data set includes parameters characterizing the life of the CMOS device. Time series sample data of electrical parameter degradation amount; a first classification module configured to obtain a training set based on the time series sample data set; a training module configured to train a time series model using the training set to obtain a lifespan prediction model; A prediction module configured to predict the failure time of the CMOS device using the life prediction model.
  • the above technical solution conducts non-complete accelerated stress tests on CMOS devices to obtain a time series sample data set in which the electrical parameter degradation amount that characterizes the life of the CMOS device is within the range from the initial value to the preset threshold, and the life span is trained based on the time series sample data set. Predict the model, and then use the model to predict the failure time of the CMOS device, which reduces the time cost of conducting a complete accelerated stress test on the CMOS device to determine its service life in the existing technology, improves product quality inspection efficiency, and shortens the time CMOS device production cycle.
  • the timing model is a long short-term memory model.
  • the long short-term memory model has 1 to 5 hidden layer nodes and 1 fully connected layer node.
  • the electrical parameters characterizing the life of the CMOS device include at least one of the following: saturation leakage current, threshold voltage, and transconductance;
  • the electrical parameter degradation amount in the time series sample data set is less than or equal to the corresponding electrical parameter degradation amount when the CMOS device fails.
  • the maximum value of the electrical parameter degradation in the time series sample data set is 5% to 7% of the corresponding electrical parameter.
  • the maximum value of the electrical parameter degradation in the time series sample data set is 5% or 6% or 7% of the corresponding electrical parameter.
  • it also includes:
  • the preprocessing module is configured to preprocess the time series sample data set through any one or more of the following methods to obtain a processed time series sample data set:
  • the output of the previous process is used as the input of the next process, and the preprocessing in the multiple ways is performed in sequence to obtain a processed time series sample data set.
  • the training module includes:
  • a supervised learning module configured to use the time series sample data at the previous moment in the training set as input features, use the time series sample data at the current moment in the training set as output features, and perform supervised learning on the long short-term memory model. train.
  • the training module includes:
  • a supervised learning module configured to use the sliding time window method to use multiple continuous time series sample data in the training set as input features, and use the time series sample data at the next moment of the sliding time window in the training set as output Features, perform supervised learning training on the long short-term memory model.
  • the number of continuous time series sample data is 8 to 11; or
  • the number of continuous time series sample data is 9.
  • the training module further includes:
  • the optimization module is configured to use the mean square error or the average absolute percentage error as the loss function, and use at least one of AdaGrad, RMSprop, and Adam optimizers to optimize model parameters to train the long short-term memory model.
  • the training module further includes:
  • An iteration module configured to iterate the life prediction model multiple times.
  • the number of iterations of the iteration module is 1,000 to 10,000 times.
  • FIG. 7 shows a structural block diagram of an electronic device according to an embodiment of the present disclosure.
  • the electronic device 700 includes a memory 701 and a processor 702.
  • the memory 701 is used to store one or more computer instructions, and the one or more computer instructions are executed by the processor 702. To implement the following method steps:
  • time series sample data set of electrical parameters of the CMOS device under accelerated stress testing, where the time series sample data set includes time series sample data representing the amount of electrical parameter degradation that characterizes the life of the CMOS device;
  • the life prediction model is used to predict the failure time of the CMOS device.
  • it also includes:
  • using the life prediction model to predict the failure time of the CMOS device includes using the verified life prediction model to predict the failure time of the CMOS device.
  • the timing model is a long short-term memory model.
  • the long short-term memory model has 1 to 5 hidden layer nodes and 1 fully connected layer node.
  • the electrical parameters characterizing the life of the CMOS device include at least one of the following: saturation leakage current, threshold voltage, and transconductance;
  • the electrical parameter degradation amount in the time series sample data set is less than or equal to the corresponding electrical parameter degradation amount when the CMOS device fails.
  • the maximum value of the electrical parameter degradation in the time series sample data set is 5% to 7% of the corresponding electrical parameter.
  • the maximum value of the electrical parameter degradation in the time series sample data set is 5% or 6% or 7% of the corresponding electrical parameter.
  • it also includes:
  • the output of the previous process is used as the input of the next process, and the preprocessing in the multiple ways is performed in sequence to obtain a processed time series sample data set.
  • using the training set to train a time series model and obtain a lifespan prediction model includes:
  • the time series sample data at the previous moment in the training set is used as the input feature, and the time series sample data at the current moment in the training set is used as the output feature, and the long and short-term memory model is subjected to supervised learning training.
  • using the training set to train a time series model and obtain a lifespan prediction model includes:
  • the sliding time window method is used to use multiple continuous time series sample data in the training set as input features, and the time series sample data at the next moment of the sliding time window in the training set is used as the output feature.
  • Memory models are trained with supervised learning.
  • the number of continuous time series sample data is 8 to 11; or,
  • the number of continuous time series sample data is 9.
  • using the training set to train a time series model and obtain a lifespan prediction model further includes:
  • using the training set to train a time series model and obtain a lifespan prediction model further includes:
  • the life prediction model is subjected to multiple iterations.
  • the number of iterations is 1,000 to 10,000.
  • FIG. 8 shows a schematic structural diagram of a computer system suitable for implementing methods according to embodiments of the present disclosure.
  • the computer system 800 includes a processing unit 801 that can perform the above-described implementation according to a program stored in a read-only memory (ROM) 802 or loaded from a storage portion 808 into a random access memory (RAM) 803 Various treatments in the example. In the RAM 803, various programs and data required for the operation of the computer system 800 are also stored.
  • the processing unit 801, ROM 802 and RAM 803 are connected to each other via a bus 804.
  • An input/output (I/O) interface 805 is also connected to bus 804.
  • the following components are connected to the I/O interface 805: an input section 806 including a keyboard, a mouse, etc.; an output section 807 including a cathode ray tube (CRT), a liquid crystal display (LCD), etc., speakers, etc.; and a storage section 808 including a hard disk, etc. ; and a communication section 809 including a network interface card such as a LAN card, a modem, etc.
  • the communication section 809 performs communication processing via a network such as the Internet.
  • Driver 810 is also connected to I/O interface 805 as needed.
  • Removable media 811 such as magnetic disks, optical disks, magneto-optical disks, semiconductor memories, etc.
  • the processing unit 801 can be implemented as a processing unit such as CPU, GPU, TPU, FPGA, NPU, etc.
  • the method described above may be implemented as a computer software program.
  • embodiments of the present disclosure include a computer program product including computer instructions that, when executed by a processor, implement the method steps described above.
  • the computer program product may be downloaded and installed from the network via communications portion 809 and/or installed from removable media 811 .
  • each block in the flowchart or block diagrams may represent a module, segment, or portion of code that contains one or more components for implementing the specified logical function(s).
  • Executable instructions may also be noted that, in some alternative implementations, the functions noted in the block may occur out of the order noted in the figures. For example, two blocks shown one after another may actually execute substantially in parallel, or they may sometimes execute in the reverse order, depending on the functionality involved.
  • each block of the block diagram and/or flowchart illustration, and combinations of blocks in the block diagram and/or flowchart illustration can be implemented by special purpose hardware-based systems that perform the specified functions or operations. , or can be implemented using a combination of specialized hardware and computer instructions.
  • the units or modules described in the embodiments of the present disclosure may be implemented in software or programmable hardware.
  • the described units or modules may also be provided in the processor, and the names of these units or modules do not constitute a limitation on the units or modules themselves under certain circumstances.
  • the present disclosure also provides a computer-readable storage medium.
  • the computer-readable storage medium may be the computer-readable storage medium included in the electronic device or computer system in the above embodiments; it may also exist independently. , a computer-readable storage medium that is not installed in the device.
  • the computer-readable storage medium stores one or more programs, which are used by one or more processors to perform the methods described in the present disclosure.

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Abstract

A method and apparatus for predicting the service life of a CMOS device, an electronic device, and a medium. The method for predicting the service life of a CMOS device comprises: acquiring a time series sample data set of an electrical parameter of a CMOS device under an accelerated stress test, the time series sample data set comprising time series sample data of a degradation amount of the electrical parameter characterizing the service life of the CMOS device (S101); obtaining a training set on the basis of the time series sample data set (S102); training a time series model by using the training set to obtain a service life prediction model (S103); and predicting failure time of the CMOS device by using the service life prediction model (S104). The method reduces the time cost of determining the service life of a CMOS device by performing a complete accelerated stress test on the CMOS device in the prior art, improves the product quality inspection efficiency, shortens the production period of CMOS devices, and solves the problem of low production efficiency of CMOS devices.

Description

CMOS器件寿命预测方法、装置、电子设备及介质CMOS device life prediction method, device, electronic equipment and media 技术领域Technical field
本公开涉及半导体技术领域,具体涉及一种互补金属氧化物半导体(Complementary Metal Oxide Semiconductor,CMOS)器件寿命预测方法、装置、电子设备及介质。The present disclosure relates to the field of semiconductor technology, and specifically to a complementary metal oxide semiconductor (Complementary Metal Oxide Semiconductor, CMOS) device life prediction method, device, electronic equipment and medium.
背景技术Background technique
随着CMOS器件的生产工艺技术进入到纳米级别,CMOS器件的尺寸已经逼近了物理极限。由于生产的CMOS器件尺寸不断缩小,小尺寸器件在生产、制造及使用时可能产生的某些效应对CMOS器件造成的损伤已经不可忽视。现有技术中,常使用热载流子注入效应对CMOS器件造成的损伤试验数据来计算CMOS器件的使用寿命,判断其可靠性。然而,在我国工业化生产过程中产出的CMOS器件数量巨大,即便对CMOS器件采用热载流子注入效应加速应力试验也需要耗费大量试验时间才能获知其失效时间,确定其使用寿命,降低了CMOS器件质检效率,延长了CMOS器件的生产周期。As the production process technology of CMOS devices reaches the nanometer level, the size of CMOS devices has approached the physical limit. As the size of CMOS devices produced continues to shrink, the damage caused to CMOS devices by certain effects that may occur during the production, manufacturing and use of small-size devices cannot be ignored. In the prior art, test data on damage caused to CMOS devices by hot carrier injection effects are often used to calculate the service life of CMOS devices and judge their reliability. However, the number of CMOS devices produced in the industrial production process in our country is huge. Even if the hot carrier injection effect accelerated stress test is used for CMOS devices, it takes a lot of test time to know their failure time and determine their service life, which reduces the cost of CMOS devices. The efficiency of device quality inspection extends the production cycle of CMOS devices.
发明内容Contents of the invention
为了解决相关技术中的问题,本公开实施例提供一种CMOS器件寿命预测方法、装置、电子设备及介质。In order to solve problems in related technologies, embodiments of the present disclosure provide a CMOS device life prediction method, device, electronic equipment, and media.
第一方面,本公开实施例中提供了一种CMOS器件寿命预测方法。In a first aspect, an embodiment of the present disclosure provides a method for predicting the life of a CMOS device.
具体地,所述CMOS器件寿命预测方法,包括:Specifically, the CMOS device life prediction method includes:
获取CMOS器件在加速应力试验下电参数的时间序列样本数据集,所述时间序列样本数据集包括表征所述CMOS器件寿命的电参数退化量的时间序列样本数据;Obtaining a time series sample data set of electrical parameters of the CMOS device under accelerated stress testing, where the time series sample data set includes time series sample data representing the amount of electrical parameter degradation that characterizes the life of the CMOS device;
基于所述时间序列样本数据集得到训练集;Obtain a training set based on the time series sample data set;
用所述训练集训练时序模型,获得寿命预测模型;Use the training set to train a time series model to obtain a lifespan prediction model;
用所述寿命预测模型预测所述CMOS器件的失效时间。The life prediction model is used to predict the failure time of the CMOS device.
可选的,还包括:Optional, also includes:
基于所述时间序列样本数据集得到测试集;Obtain a test set based on the time series sample data set;
用所述测试集验证所述寿命预测模型得到验证的寿命预测模型,Use the test set to verify the life prediction model to obtain a verified life prediction model,
其中,所述用所述寿命预测模型预测所述CMOS器件的失效时间,包括用验证的所述寿命预测模型预测所述CMOS器件的失效时间。Wherein, using the life prediction model to predict the failure time of the CMOS device includes using the verified life prediction model to predict the failure time of the CMOS device.
可选的,所述时序模型是长短期记忆模型。Optionally, the timing model is a long short-term memory model.
可选的,所述长短期记忆模型具有1~5个隐藏层节点,以及1个全连接层节点。Optionally, the long short-term memory model has 1 to 5 hidden layer nodes and 1 fully connected layer node.
可选的,表征所述CMOS器件寿命的电参数包括以下的至少一项:饱和漏电流、阈值电压、跨导;Optionally, the electrical parameters characterizing the life of the CMOS device include at least one of the following: saturation leakage current, threshold voltage, and transconductance;
所述时间序列样本数据集中的电参数退化量小于等于所述CMOS器件失效时的相应电参数退化量。The electrical parameter degradation amount in the time series sample data set is less than or equal to the corresponding electrical parameter degradation amount when the CMOS device fails.
可选的,所述时间序列样本数据集中的电参数退化量最大值为相应电参数的5%~7%。Optionally, the maximum value of electrical parameter degradation in the time series sample data set is 5% to 7% of the corresponding electrical parameter.
可选的,所述时间序列样本数据集中的电参数退化量最大值为相应电参数的5%或6%或7%。Optionally, the maximum value of the electrical parameter degradation in the time series sample data set is 5%, 6%, or 7% of the corresponding electrical parameter.
可选的,还包括:Optional, also includes:
通过以下任意一种或多种方式对所述时间序列样本数据集进行预处理,得到处理后的时间序列样本数据集:Preprocess the time series sample data set in any one or more of the following ways to obtain a processed time series sample data set:
对非等时间间隔的时间序列样本数据集进行等时间间隔的插值处理;Perform equal time interval interpolation processing on time series sample data sets with non-equal time intervals;
对所述时间序列样本数据集进行差分化处理;Perform differential differentiation processing on the time series sample data set;
对所述时间序列样本数据集进行归一化处理;Perform normalization processing on the time series sample data set;
其中,当采用多种方式进行预处理时,将上一处理的输出作为下一处理的输入,依次进行所述多种方式的 预处理,得到处理后的时间序列样本数据集。Among them, when multiple methods are used for preprocessing, the output of the previous process is used as the input of the next process, and the preprocessing in the multiple methods is performed in sequence to obtain a processed time series sample data set.
可选的,所述用所述训练集训练时序模型,获得寿命预测模型包括:Optionally, using the training set to train a time series model to obtain a lifespan prediction model includes:
将所述训练集中前一时刻的时间序列样本数据作为输入特征,将所述训练集中当前时刻的时间序列样本数据作为输出特征,对所述长短期记忆模型进行监督学习训练。The time series sample data at the previous moment in the training set is used as the input feature, and the time series sample data at the current moment in the training set is used as the output feature, and the long and short-term memory model is subjected to supervised learning training.
可选的,所述用所述训练集训练时序模型,获得寿命预测模型包括:Optionally, using the training set to train a time series model to obtain a lifespan prediction model includes:
采用滑动时间窗方法将所述训练集中多个连续的时间序列样本数据作为输入特征,将所述训练集中所述滑动时间窗的后一时刻的时间序列样本数据作为输出特征,对所述长短期记忆模型进行监督学习训练。The sliding time window method is used to use multiple continuous time series sample data in the training set as input features, and the time series sample data at the next moment of the sliding time window in the training set is used as the output feature. Memory models are trained for supervised learning.
可选的,所述连续的时间序列样本数据数量是8~11个;或Optionally, the number of continuous time series sample data is 8 to 11; or
所述连续的时间序列样本数据数量是9个。The number of continuous time series sample data is 9.
可选的,所述用所述训练集训练时序模型,获得寿命预测模型还包括:Optionally, using the training set to train a time series model and obtain a lifespan prediction model further includes:
用均方误差或者平均绝对百分比误差作为损失函数,用AdaGrad,RMSprop,Adam优化器中的至少一种优化模型参数,训练所述长短期记忆模型。Use the mean square error or the average absolute percentage error as the loss function, and use at least one of AdaGrad, RMSprop, and Adam optimizers to optimize model parameters to train the long short-term memory model.
可选的,所述用所述训练集训练时序模型,获得寿命预测模型还包括:Optionally, using the training set to train a time series model and obtain a lifespan prediction model further includes:
对所述寿命预测模型进行多次迭代。The life prediction model is subjected to multiple iterations.
可选的,所述迭代的次数是1,000~10,000次。Optionally, the number of iterations is 1,000 to 10,000 times.
第二方面,本公开实施例中提供了一种CMOS器件寿命预测装置。In a second aspect, an embodiment of the present disclosure provides a device for predicting the life of a CMOS device.
具体地,所述CMOS器件寿命预测装置,包括:Specifically, the CMOS device life prediction device includes:
获取模块,被配置为获取CMOS器件在加速应力试验下电参数的时间序列样本数据集,所述时间序列样本数据集包括表征所述CMOS器件寿命的电参数退化量的时间序列样本数据;An acquisition module configured to acquire a time series sample data set of electrical parameters of the CMOS device under accelerated stress testing, where the time series sample data set includes time series sample data characterizing the electrical parameter degradation amount of the CMOS device life;
第一分类模块,被配置为基于所述时间序列样本数据集得到训练集;A first classification module configured to obtain a training set based on the time series sample data set;
训练模块,被配置为用所述训练集训练时序模型,获得寿命预测模型;A training module configured to train a time series model using the training set to obtain a lifespan prediction model;
预测模块,被配置为用所述寿命预测模型预测所述CMOS器件的失效时间。A prediction module configured to predict the failure time of the CMOS device using the life prediction model.
可选的,还包括:Optional, also includes:
第二分类模块,被配置为基于所述时间序列样本数据集得到测试集;The second classification module is configured to obtain a test set based on the time series sample data set;
验证模块,被配置为用所述测试集验证所述寿命预测模型得到验证的寿命预测模型,a verification module configured to verify the life prediction model using the test set to obtain the verified life prediction model,
其中,所述预测模块还被配置为用验证的所述寿命预测模型预测所述CMOS器件的失效时间。Wherein, the prediction module is further configured to predict the failure time of the CMOS device using the verified life prediction model.
可选的,所述时序模型是长短期记忆模型。Optionally, the timing model is a long short-term memory model.
可选的,所述长短期记忆模型具有1~5个隐藏层节点,以及1个全连接层节点。Optionally, the long short-term memory model has 1 to 5 hidden layer nodes and 1 fully connected layer node.
可选的,表征所述CMOS器件寿命的电参数包括以下的至少一项:饱和漏电流、阈值电压、跨导;Optionally, the electrical parameters characterizing the life of the CMOS device include at least one of the following: saturation leakage current, threshold voltage, and transconductance;
所述时间序列样本数据集中的电参数退化量小于等于所述CMOS器件失效时的相应电参数退化量。The electrical parameter degradation amount in the time series sample data set is less than or equal to the corresponding electrical parameter degradation amount when the CMOS device fails.
可选的,所述时间序列样本数据集中的电参数退化量最大值为相应电参数的5%~7%。Optionally, the maximum value of electrical parameter degradation in the time series sample data set is 5% to 7% of the corresponding electrical parameter.
可选的,所述时间序列样本数据集中的电参数退化量最大值为相应电参数的5%或6%或7%。Optionally, the maximum value of the electrical parameter degradation in the time series sample data set is 5%, 6%, or 7% of the corresponding electrical parameter.
可选的,还包括:Optional, also includes:
预处理模块,被配置为通过以下任意一种或多种方式对所述时间序列样本数据集进行预处理,得到处理后的时间序列样本数据集:The preprocessing module is configured to preprocess the time series sample data set through any one or more of the following methods to obtain a processed time series sample data set:
对非等时间间隔的时间序列样本数据集进行等时间间隔的插值处理;Perform equal time interval interpolation processing on time series sample data sets with non-equal time intervals;
对所述时间序列样本数据集进行差分化处理;Perform differential differentiation processing on the time series sample data set;
对所述时间序列样本数据集进行归一化处理;Perform normalization processing on the time series sample data set;
其中,当采用多种方式进行预处理时,将上一处理的输出作为下一处理的输入,依次进行所述多种方式的预处理,得到处理后的时间序列样本数据集。When preprocessing is performed in multiple ways, the output of the previous process is used as the input of the next process, and the preprocessing in the multiple ways is performed in sequence to obtain a processed time series sample data set.
可选的,所述训练模块包括:Optionally, the training module includes:
监督学习模块,被配置为将所述训练集中前一时刻的时间序列样本数据作为输入特征,将所述训练集中当前时刻的时间序列样本数据作为输出特征,对所述长短期记忆模型进行监督学习训练。A supervised learning module configured to use the time series sample data at the previous moment in the training set as input features, use the time series sample data at the current moment in the training set as output features, and perform supervised learning on the long short-term memory model. train.
可选的,所述训练模块包括:Optionally, the training module includes:
监督学习模块,被配置为采用滑动时间窗方法将所述训练集中多个连续的时间序列样本数据作为输入特 征,将所述训练集中所述滑动时间窗的后一时刻的时间序列样本数据作为输出特征,对所述长短期记忆模型进行监督学习训练。A supervised learning module configured to use a sliding time window method to use multiple continuous time series sample data in the training set as input features, and use the time series sample data at the next moment of the sliding time window in the training set as output Features, perform supervised learning training on the long short-term memory model.
可选的,所述连续的时间序列样本数据数量是8~11个;或Optionally, the number of continuous time series sample data is 8 to 11; or
所述连续的时间序列样本数据数量是9个。The number of continuous time series sample data is 9.
可选的,所述训练模块还包括:Optionally, the training module also includes:
优化模块,被配置为用均方误差或者平均绝对百分比误差作为损失函数,用AdaGrad,RMSprop,Adam优化器中的至少一种优化模型参数,训练所述长短期记忆模型。The optimization module is configured to use the mean square error or the average absolute percentage error as the loss function, and use at least one of AdaGrad, RMSprop, and Adam optimizers to optimize model parameters to train the long short-term memory model.
可选的,所述训练模块还包括:Optionally, the training module also includes:
迭代模块,被配置为对所述寿命预测模型进行多次迭代。An iteration module configured to iterate the life prediction model multiple times.
可选的,所述迭代模块的迭代的次数是1,000~10,000次。Optionally, the number of iterations of the iteration module is 1,000 to 10,000 times.
第三方面,本公开实施例提供了一种电子设备,包括存储器和处理器,其中,所述存储器用于存储一条或多条计算机指令,其中,所述一条或多条计算机指令被所述处理器执行以实现如第一方面任一项所述的方法。In a third aspect, embodiments of the present disclosure provide an electronic device including a memory and a processor, wherein the memory is used to store one or more computer instructions, and wherein the one or more computer instructions are processed by the The processor is executed to implement the method described in any one of the first aspects.
第四方面,本公开实施例中提供了一种计算机可读存储介质,其上存储有计算机指令,该计算机指令被处理器执行时实现如第一方面任一项所述的方法。In a fourth aspect, embodiments of the present disclosure provide a computer-readable storage medium on which computer instructions are stored. When the computer instructions are executed by a processor, the method as described in any one of the first aspects is implemented.
第五方面,本公开实施例中提供了一种计算机程序产品,包括计算机指令,该计算机指令被处理器执行时实现如第一方面任一项所述的方法步骤。In a fifth aspect, an embodiment of the present disclosure provides a computer program product, which includes computer instructions that, when executed by a processor, implement the method steps described in any one of the first aspects.
本公开实施例提供的技术方案可以包括以下有益效果:The technical solutions provided by the embodiments of the present disclosure may include the following beneficial effects:
根据本公开实施例提供的CMOS器件寿命预测方法,包括:获取CMOS器件在加速应力试验下电参数的时间序列样本数据集,所述时间序列样本数据集包括表征所述CMOS器件寿命的电参数退化量的时间序列样本数据;基于所述时间序列样本数据集得到训练集;用所述训练集训练时序模型,获得寿命预测模型;用所述寿命预测模型预测所述CMOS器件的失效时间。上述技术方案通过对CMOS器件进行非完整的加速应力试验,获得表征CMOS器件寿命的电参数退化量在初始值到预设阈值范围内的时间序列样本数据集,根据该时间序列样本数据集训练寿命预测模型,然后使用模型即可预测该CMOS器件的失效时间,减少了现有技术中因对CMOS器件进行完整的加速应力试验以确定其使用寿命的时间成本,提高了产品质检效率,缩短了CMOS器件的生产周期。According to the method for predicting the life of a CMOS device provided by an embodiment of the present disclosure, the method includes: obtaining a time series sample data set of electrical parameters of the CMOS device under an accelerated stress test, where the time series sample data set includes electrical parameter degradation that characterizes the life of the CMOS device. Amount of time series sample data; obtain a training set based on the time series sample data set; use the training set to train a timing model to obtain a life prediction model; use the life prediction model to predict the failure time of the CMOS device. The above technical solution conducts non-complete accelerated stress tests on CMOS devices to obtain a time series sample data set in which the electrical parameter degradation amount that characterizes the life of the CMOS device is within the range from the initial value to the preset threshold, and the life span is trained based on the time series sample data set. Predict the model, and then use the model to predict the failure time of the CMOS device, which reduces the time cost of conducting a complete accelerated stress test on the CMOS device to determine its service life in the existing technology, improves product quality inspection efficiency, and shortens the time CMOS device production cycle.
应当理解的是,以上的一般描述和后文的细节描述仅是示例性和解释性的,并不能限制本公开。It should be understood that the foregoing general description and the following detailed description are exemplary and explanatory only, and do not limit the present disclosure.
附图说明Description of drawings
结合附图,通过以下非限制性实施方式的详细描述,本公开的其它特征、目的和优点将变得更加明显。在附图中。Other features, objects and advantages of the present disclosure will become more apparent from the following detailed description of the non-limiting embodiments in conjunction with the accompanying drawings. In the attached picture.
图1示出根据本公开的实施例的CMOS器件寿命预测方法的流程图。FIG. 1 shows a flowchart of a CMOS device life prediction method according to an embodiment of the present disclosure.
图2示出本公开的实施例的长短期记忆(Long Short-Term Memory,LSTM)模型的结构图。Figure 2 shows a structural diagram of a Long Short-Term Memory (LSTM) model according to an embodiment of the present disclosure.
图3A示出CMOS器件在加速应力试验中饱和漏电流的退化量随时间变化的曲线。FIG. 3A shows a curve of the degradation amount of saturation leakage current of a CMOS device as a function of time in an accelerated stress test.
图3B示出使用饱和漏电流退化量达到5%时的时间序列样本数据集训练的寿命预测模型预测结果示意图。FIG. 3B shows a schematic diagram of the prediction results of the life prediction model trained using the time series sample data set when the saturation leakage current degradation amount reaches 5%.
图4示出对时间序列样本数据集进行预处理的方法的流程图。Figure 4 shows a flow chart of a method for preprocessing a time series sample data set.
图5示出用训练集训练寿命预测模型的方法流程图。Figure 5 shows a flow chart of a method for training a lifespan prediction model using a training set.
图6示出根据本公开的实施例的CMOS器件寿命预测装置的结构框图。FIG. 6 shows a structural block diagram of a CMOS device life prediction device according to an embodiment of the present disclosure.
图7示出根据本公开的实施例的电子设备的结构框图。FIG. 7 shows a structural block diagram of an electronic device according to an embodiment of the present disclosure.
图8示出适于用来实现根据本公开实施例的方法的计算机***的结构示意图。FIG. 8 shows a schematic structural diagram of a computer system suitable for implementing methods according to embodiments of the present disclosure.
具体实施方式Detailed ways
下文中,将参考附图详细描述本公开的示例性实施例,以使本领域技术人员可容易地实现它们。此外,为了清楚起见,在附图中省略了与描述示例性实施例无关的部分。Hereinafter, exemplary embodiments of the present disclosure will be described in detail with reference to the accompanying drawings so that those skilled in the art can easily implement them. Furthermore, for clarity, parts irrelevant to describing the exemplary embodiments are omitted in the drawings.
在本公开中,应理解,诸如“包括”或“具有”等的术语旨在指示本说明书中所公开的特征、数字、步骤、行为、部件、部分或其组合的存在,并且不欲排除一个或多个其他特征、数字、步骤、行为、部件、部分 或其组合存在或被添加的可能性。In this disclosure, it should be understood that terms such as "comprising" or "having" are intended to indicate the presence of features, numbers, steps, acts, components, portions, or combinations thereof disclosed in this specification, and are not intended to exclude a or the possibility that multiple other features, numbers, steps, acts, parts, portions, or combinations thereof may exist or be added.
另外还需要说明的是,在不冲突的情况下,本公开中的实施例及实施例中的特征可以相互组合。下面将参考附图并结合实施例来详细说明本公开。In addition, it should be noted that the embodiments and features in the embodiments of the present disclosure can be combined with each other as long as there is no conflict. The present disclosure will be described in detail below in conjunction with embodiments with reference to the accompanying drawings.
在本公开中,对用户信息或用户数据的获取均为经用户授权、确认,或由用户主动选择的操作。In this disclosure, the acquisition of user information or user data is an operation authorized, confirmed by the user, or actively selected by the user.
随着CMOS器件的生产工艺技术进入到纳米级别,CMOS器件的尺寸已经逼近了物理极限。由于生产的CMOS器件尺寸不断缩小,小尺寸器件在生产、制造及使用时可能产生的某些效应对CMOS器件造成的损伤已经不可忽视。现有技术中,常使用热载流子注入效应对CMOS器件造成的损伤试验数据来计算CMOS器件的使用寿命,判断其可靠性。然而,在我国工业化生产过程中产出的CMOS器件数量巨大,即便对CMOS器件采用热载流子注入效应加速应力试验也需要耗费大量试验时间才能获知其失效时间,确定其使用寿命,降低了CMOS器件质检效率,延长了CMOS器件的生产周期。As the production process technology of CMOS devices reaches the nanometer level, the size of CMOS devices has approached the physical limit. As the size of CMOS devices produced continues to shrink, the damage caused to CMOS devices by certain effects that may occur during the production, manufacturing and use of small-size devices cannot be ignored. In the prior art, test data on damage caused to CMOS devices by hot carrier injection effects are often used to calculate the service life of CMOS devices and judge their reliability. However, the number of CMOS devices produced in the industrial production process in our country is huge. Even if the hot carrier injection effect accelerated stress test is used for CMOS devices, it will take a lot of test time to know their failure time and determine their service life, which reduces the cost of CMOS devices. The efficiency of device quality inspection extends the production cycle of CMOS devices.
为至少部分地解决发明人发现的现有技术中的问题而提出本公开。The present disclosure is made to address, at least in part, problems in the prior art identified by the inventors.
图1示出根据本公开的实施例的CMOS器件寿命预测方法的流程图。FIG. 1 shows a flowchart of a CMOS device life prediction method according to an embodiment of the present disclosure.
如图1所示,所述CMOS器件寿命预测方法包括以下步骤S101-S104:As shown in Figure 1, the CMOS device life prediction method includes the following steps S101-S104:
在步骤S101中,获取CMOS器件在加速应力试验下电参数的时间序列样本数据集,所述时间序列样本数据集包括表征所述CMOS器件寿命的电参数退化量的时间序列样本数据;In step S101, obtain a time series sample data set of the electrical parameters of the CMOS device under accelerated stress testing, where the time series sample data set includes time series sample data characterizing the electrical parameter degradation amount of the CMOS device life;
在步骤S102中,基于所述时间序列样本数据集得到训练集;In step S102, a training set is obtained based on the time series sample data set;
在步骤S103中,用所述训练集训练时序模型,获得寿命预测模型;In step S103, use the training set to train the time series model to obtain a lifespan prediction model;
在步骤S104中,用所述寿命预测模型预测所述CMOS器件的失效时间。In step S104, the life prediction model is used to predict the failure time of the CMOS device.
进一步的,所述CMOS器件寿命预测方法还包括:Further, the CMOS device life prediction method also includes:
基于所述时间序列样本数据集得到测试集;Obtain a test set based on the time series sample data set;
用所述测试集验证所述寿命预测模型得到验证的寿命预测模型,Use the test set to verify the life prediction model to obtain a verified life prediction model,
其中,所述用所述寿命预测模型预测所述CMOS器件的失效时间,包括用验证的所述寿命预测模型预测所述CMOS器件的失效时间。Wherein, using the life prediction model to predict the failure time of the CMOS device includes using the verified life prediction model to predict the failure time of the CMOS device.
本公开提供的CMOS器件寿命预测方法可以由CMOS器件寿命预测装置实现,该CMOS器件寿命预测装置可以由单个计算机主机实现,也可以由云端服务器实现。当然,上述方法也可以通过软件、硬件或者两者的结合来实现,本公开对此不做限制。The CMOS device life prediction method provided by the present disclosure can be implemented by a CMOS device life prediction device. The CMOS device life prediction device can be implemented by a single computer host or by a cloud server. Of course, the above method can also be implemented by software, hardware, or a combination of both, and this disclosure does not limit this.
根据本公开的实施例,通过加速试验获取时间序列样本数据集,加速试验可以是加速应力试验或者其他可迅速查明产品失效原因,快速评定产品可靠性的试验,本公开对此不做限制。为了方便理解,本公开以采用加速应力试验获取的时间序列样本数据为例进行说明。加速应力试验是研究半导体器件可靠性的一种测试方法,可以缩短测试时间,即在控制失效机制相同的前提下,通过增加应力,加速CMOS器件退化过程,进而在短时间内获得CMOS器件失效率等试验数据。According to embodiments of the present disclosure, a time series sample data set is obtained through an accelerated test. The accelerated test may be an accelerated stress test or other tests that can quickly identify the cause of product failure and quickly assess product reliability. The disclosure does not limit this. To facilitate understanding, this disclosure takes time series sample data obtained by using an accelerated stress test as an example for explanation. Accelerated stress testing is a testing method to study the reliability of semiconductor devices. It can shorten the test time. That is, under the premise of controlling the same failure mechanism, by increasing the stress, the degradation process of the CMOS device is accelerated, and the failure rate of the CMOS device can be obtained in a short time. Wait for test data.
根据本公开的实施例,为了方便理解,本公开利用热载流子注入(Hot Carrier Injection,HCI)效应对CMOS器件造成的损伤程度判断CMOS器件是否失效,当然也可以利用其他可靠性测试试验,本公开对此不做限制。According to the embodiments of the present disclosure, in order to facilitate understanding, the present disclosure uses the degree of damage caused to the CMOS device by the hot carrier injection (Hot Carrier Injection, HCI) effect to determine whether the CMOS device has failed. Of course, other reliability testing tests can also be used. This disclosure does not limit this.
根据本公开的实施例,通过提取时间序列样本数据建立的数学模型可以是循环神经网络(Recurrent Neural Network,RNN)、长短期记忆网络(Long Short-Term Memory,LSTM)、门控循环单元(Gate Recurrent Unit,GRU)、时域卷积网络(Temporal Convolutional Network,TCN)等时序模型。具体地,通过训练时序模型获得的寿命预测模型与传统基于统计学建立的寿命预测模型(即使用整体样本数据的统计分布及其统计量来预测每个被测样品的寿命)相比较,训练时序模型是通过机器学习每个被测CMOS器件其自身的时间序列样本数据来建立其寿命预测模型,对每个被测CMOS器件的电参数退化过程描述性更好,获得的寿命预测模型精度更高,预测的CMOS器件的失效时间更接近其真实值。优选的,本公开采用训练LSTM模型来获得CMOS器件的寿命预测模型,LSTM模型是通过门控状态来控制传输状态,记住需要长时间记忆的,忘记不重要的信息,不像普通的RNN模型那样仅有一种记忆叠加方式,更适用于训练本公开的CMOS器件的寿命预测模型。According to embodiments of the present disclosure, the mathematical model established by extracting time series sample data can be a recurrent neural network (Recurrent Neural Network, RNN), a long short-term memory network (Long Short-Term Memory, LSTM), a gated recurrent unit (Gate Recurrent Unit, GRU), Temporal Convolutional Network (Temporal Convolutional Network, TCN) and other timing models. Specifically, the life prediction model obtained by training the time series model is compared with the traditional life prediction model based on statistics (that is, using the statistical distribution of the overall sample data and its statistics to predict the life of each tested sample). The training time series The model establishes its life prediction model by machine learning its own time series sample data of each tested CMOS device. It is more descriptive of the electrical parameter degradation process of each tested CMOS device and the obtained life prediction model is more accurate. , the predicted failure time of CMOS devices is closer to its true value. Preferably, this disclosure adopts the training LSTM model to obtain the life prediction model of CMOS devices. The LSTM model controls the transmission state through the gating state, remembers the information that requires long-term memory, and forgets unimportant information, unlike the ordinary RNN model. In this way, there is only one memory superposition method, which is more suitable for training the life prediction model of the CMOS device of the present disclosure.
LSTM(Long Short-Term Memory)即长短期记忆模型,是一种改进之后的循环神经网络(Recurrent Neural Network,RNN),可以解决RNN无法处理长距离的依赖的问题。LSTM模型包含输入层、隐藏层和输出层,输 入层的神经元个数对应输入参数特征,并初始化为神经网络预测的容量值,LSTM中隐藏层由遗忘门(forget gate)、输入门(inputgate)和输出门(outputgate)三部分组成。这些门可以打开或关闭,用于判断模型网络的记忆态(之前网络的状态)在该层输出的结果是否达到阈值以加入到当前层的计算中。门节点利用sigmoid函数将网络的记忆态作为输入计算;如果输出结果达到阈值则将该门输出与当前层的计算结果相乘作为下一层的输入;如果没有达到阈值则将该输出结果遗忘掉。每一层包括门节点的权重都会在每一次模型反向传播训练过程中更新。LSTM模型的记忆功能就是由这些门节点实现的。当门打开的时候,前面模型的训练结果就会关联到当前的模型计算,而当门关闭的时候,之前的计算结果就不再影响当前的计算。LSTM (Long Short-Term Memory), the long short-term memory model, is an improved Recurrent Neural Network (RNN) that can solve the problem of RNN being unable to handle long-distance dependencies. The LSTM model includes an input layer, a hidden layer and an output layer. The number of neurons in the input layer corresponds to the input parameter characteristics and is initialized to the capacity value predicted by the neural network. The hidden layer in LSTM consists of a forget gate (forget gate) and an input gate (input gate). ) and the output gate (outputgate) are composed of three parts. These gates can be opened or closed to determine whether the memory state of the model network (the state of the previous network) in this layer reaches the threshold to be added to the calculation of the current layer. The gate node uses the sigmoid function to calculate the memory state of the network as input; if the output result reaches the threshold, the gate output is multiplied with the calculation result of the current layer as the input of the next layer; if the threshold is not reached, the output result is forgotten . The weights of each layer, including gate nodes, are updated during each model backpropagation training process. The memory function of the LSTM model is implemented by these gate nodes. When the door is opened, the training results of the previous model will be associated with the current model calculation, and when the door is closed, the previous calculation results will no longer affect the current calculation.
图2示出本公开的实施例的LSTM模型的结构图。Figure 2 shows a structural diagram of an LSTM model according to an embodiment of the present disclosure.
如图2所示,x t是当前时刻的输入值,h t-1是上一时刻的输出值,c t-1是上一时刻的单元状态,h t是当前时刻的输出,c t是当前时刻单元状态,σ是sigmoid激活函数,tanh是tanh激活函数。三个门的计算公式如下: As shown in Figure 2, x t is the input value at the current moment, h t-1 is the output value at the previous moment, c t-1 is the unit state at the previous moment, h t is the output at the current moment, and c t is The unit state at the current moment, σ is the sigmoid activation function, and tanh is the tanh activation function. The calculation formulas for the three gates are as follows:
遗忘门:f t=σ(W f[h t-1,x t]+b f),该门决定上一时刻的单元状态c t-1有多少保留到当前时刻c t,其中,f t是指隐藏层当前时刻的输出值,σ是sigmoid激活函数,W f是与当前时刻输入值x t相关的遗忘门权重矩阵,h t-1是上一时刻的输出值,x t是当前时刻的输入值,b f是偏置项; Forgetting gate: f t =σ(W f [h t-1 , x t ]+b f ), this gate determines how much of the unit state c t-1 at the previous moment is retained to the current moment c t , where, f t refers to the output value of the hidden layer at the current moment, σ is the sigmoid activation function, W f is the forgetting gate weight matrix related to the input value x t at the current moment, h t-1 is the output value of the previous moment, x t is the current moment The input value of , b f is the bias term;
输入门:i t=σ(W i[h t-1,x t]+b i), Input gate: i t =σ(W i [h t-1 , x t ]+b i ),
c t=f t*c t-1+i t*(tanh(W c[h t-1,x t]+b c)),该门决定了当前的输入值x t有多少保留到单元状态c t,其中,i t是输入门在当前时刻的输出值,σ是sigmoid激活函数,W i是输入门的权重矩阵,h t-1是上一时刻的输出值,x t是当前时刻的输入值,b i是输入门偏置项,c t是当前时刻单元状态,f t是指隐藏层当前时刻的输出值,c t-1是上一时刻的单元状态,tanh是tanh激活函数,W c是单元状态的权重矩阵,b c是单元状态的偏置项; c t = f t *c t-1 +i t *(tanh(W c [h t-1 , x t ]+b c )), this gate determines how much of the current input value x t is retained in the unit state c t , where i t is the output value of the input gate at the current moment, σ is the sigmoid activation function, Wi is the weight matrix of the input gate, h t-1 is the output value of the previous moment, x t is the current moment Input value, b i is the input gate bias term, c t is the unit state at the current moment, f t refers to the output value of the hidden layer at the current moment, c t-1 is the unit state at the previous moment, tanh is the tanh activation function, W c is the weight matrix of the unit state, b c is the bias term of the unit state;
输出门:h t=σ(W o[h t-1,x t]+b o)*tanh(c t),该门控制单元状态c t有多少输出到当前输出值h t,其中,h t是输出门当前时刻的输出值,σ是sigmoid激活函数,W o是与当前时刻输入值x t相关的输出门权重矩阵,h t-1是上一时刻的输出值,x t是当前时刻的输入值,b o是偏置项,tanh是tanh激活函数,c t是当前时刻单元状态。 Output gate: h t =σ(W o [h t-1 , x t ]+ bo )*tanh(c t ), this gate controls how much of the unit state c t is output to the current output value h t , where, h t is the output value of the output gate at the current moment, σ is the sigmoid activation function, W o is the output gate weight matrix related to the input value x t at the current moment, h t-1 is the output value of the previous moment, x t is the current moment The input value of , b o is the bias term, tanh is the tanh activation function, and c t is the unit state at the current moment.
在本公开的一个实施例中,为了使训练获得的模型精度更高,本公开可以选择具有1~5个隐藏层节点,1个全连接层节点的LSTM神经网络模型。In one embodiment of the present disclosure, in order to make the model obtained by training more accurate, the present disclosure can select an LSTM neural network model with 1 to 5 hidden layer nodes and 1 fully connected layer node.
根据本公开的实施例,时间序列样本数据可以是表征CMOS器件寿命的电参数随时间变化的数值,表征CMOS器件寿命的电参数可以是饱和漏电流、阈值电压、跨导漂移等静态电参数中的任意一种或多种,本公开对此不做限制。例如,以饱和漏电流为例,当饱和漏电流的退化量达到10%时,即表示该CMOS器件失效。那么,时间序列样本数据集就是时间-饱和漏电流的退化量构成的时序数据。同样的,阈值电压变化10%,或者跨导变化10%,也可表示该CMOS器件失效。According to embodiments of the present disclosure, the time series sample data may be the values of electrical parameters that characterize the life of the CMOS device as they change over time. The electrical parameters that characterize the life of the CMOS device may be static electrical parameters such as saturation leakage current, threshold voltage, and transconductance drift. Any one or more, this disclosure does not limit this. For example, taking the saturation leakage current as an example, when the degradation of the saturation leakage current reaches 10%, it means that the CMOS device has failed. Then, the time series sample data set is the time series data composed of the degradation amount of the time-saturation leakage current. Similarly, a 10% change in threshold voltage or a 10% change in transconductance can also indicate failure of the CMOS device.
进一步的,本公开要求保护的技术方案是通过非完整的加速应力试验获得CMOS器件的时间序列样本数据集训练和测试模型,通过模型预测该CMOS器件的使用寿命。具体地,完整的加速应力试验是指通过试验获取CMOS器件在加速应力试验下电参数的时间序列样本数据集为表征CMOS器件寿命的电参数退化量达到阈值范围内的全部时序数据,其中,阈值是指CMOS器件失效时刻电参数退化量的百分比数值;非完整的加速应力试验是指通过试验获取CMOS器件在加速应力试验下电参数的时间序列样本数据集为表征CMOS器件寿命的电参数退化量达到阈值范围内的部分时序数据,即表征CMOS器件寿命的电参数退化量小于CMOS器件失效时的相应电参数退化量。例如,当饱和漏电流的退化量达到10%时,即表示该CMOS器件失效。那么完整的加速应力试验是指获取CMOS器件在加速应力试验下电参数的时间序列样本数据集是饱和漏电流的退化量由0到10%这一区间内的全部时序数据;非完整的加速应力试验是指获取CMOS器件在加速应力试验下电参数的时间序列样本数据集是饱和漏电流的退化量由0到10%这一区间内的部分时序数据,即获取CMOS器件在加速应力试验下电参数的时间序列样本数据集是饱和漏电流的退化量小于10%的时序数据,可以是获取饱和漏电流的退化量达到5%~7%(例如是5%、6%或7%)的CMOS器件的时间序列样本数据集。理论上,当选择退化量更高的、获取的时间序列样本数据集中数据量越多时,训练得到的寿命预测模型精度就越高;实际上,选择饱和漏电流退化量达到不同比例时的时间序列样本数据集进行模型训练,获得的模型对于失效时间的预测值与完整加速应力试验的测试值之间的均方根误差(RMSE)结果如表1所示,可以获知,当采用饱和漏电流的退化量达到5%和6%时,使用获得的时间序列样本数据集训练模型时,得到的寿命预测模型预测结果精度略有差异,那么在预测结果精度相差不大的情况下,选择退化量更低的、获得的时间序列样本数据集中数据量更少的,可以更大程度上减少加速应力试验测试时间。因此,为了节约时间成本,本公开实施例中选择饱和漏电流退化量达到5%的时间序列样本数据集来获取寿命预测模型。Further, the technical solution claimed in this disclosure is to obtain a time series sample data set of the CMOS device through a non-complete accelerated stress test to train and test the model, and predict the service life of the CMOS device through the model. Specifically, the complete accelerated stress test refers to the time series sample data set of the electrical parameters of the CMOS device under the accelerated stress test obtained through the test. It is all the time series data that characterizes the electrical parameter degradation amount that characterizes the life of the CMOS device and reaches the threshold range, where the threshold value It refers to the percentage value of the electrical parameter degradation amount when the CMOS device fails; the non-complete accelerated stress test refers to the time series sample data set of the electrical parameters of the CMOS device under the accelerated stress test obtained through the test, which is the electrical parameter degradation amount that characterizes the life of the CMOS device. Part of the timing data that reaches the threshold range, that is, the amount of electrical parameter degradation that characterizes the life of the CMOS device is smaller than the corresponding electrical parameter degradation amount when the CMOS device fails. For example, when the degradation of saturation leakage current reaches 10%, it means that the CMOS device has failed. Then the complete accelerated stress test refers to obtaining the time series sample data set of the electrical parameters of the CMOS device under the accelerated stress test, which is all the time series data in the range from 0 to 10% of the degradation amount of the saturation leakage current; incomplete accelerated stress The test refers to obtaining the time series sample data of the electrical parameters of the CMOS device under the accelerated stress test. The data set is part of the time series data in the range of the degradation amount of the saturation leakage current from 0 to 10%. The parameter time series sample data set is the time series data in which the degradation amount of the saturation leakage current is less than 10%. It can be obtained from CMOS with the degradation amount of the saturation leakage current reaching 5% to 7% (for example, 5%, 6% or 7%). Time series sample data set of the device. Theoretically, when the amount of degradation is higher and the amount of data in the acquired time series sample data set is larger, the accuracy of the life prediction model obtained by training will be higher; in fact, the time series when the saturation leakage current degradation amount reaches different proportions is selected. The sample data set was used for model training, and the root mean square error (RMSE) results between the predicted value of the failure time of the obtained model and the test value of the complete accelerated stress test are shown in Table 1. It can be known that when the saturated leakage current is used When the degradation amount reaches 5% and 6%, when using the obtained time series sample data set to train the model, the accuracy of the prediction results of the life prediction model is slightly different. Then, if the accuracy of the prediction results is not much different, choose a higher degradation amount. The lower, smaller amount of data in the obtained time series sample data set can reduce the testing time of the accelerated stress test to a greater extent. Therefore, in order to save time and cost, in the embodiment of the present disclosure, a time series sample data set with a saturated leakage current degradation amount reaching 5% is selected to obtain the life prediction model.
表1Table 1
饱和漏电流退化量Saturation leakage current degradation amount 5%5% 6%6% 7%7%
RMSERMSE 0.2650.265 0.2350.235 0.0670.067
图3A示出CMOS器件在加速应力试验中饱和漏电流的退化量随时间变化的曲线。FIG. 3A shows a curve of the degradation amount of saturation leakage current of a CMOS device as a function of time in an accelerated stress test.
如图3A所示,经时变化曲线上的每个点的纵坐标是饱和漏电流的退化量ΔIdsat(单位:%),相应的横坐标是该饱和漏电流的退化量对应的时间(单位:s)。饱和漏电流的退化量达到初始值的10%时,表示该CMOS器件失效,从经时变化曲线上读出饱和漏电流的退化量达到初始值的10%时的时间点就是该CMOS器件的失效时间。以0.18μm工艺下生产的1.8VCMOS器件为例,在分别对栅极和漏极施加VDS=-2.6V,VGS=1.4V的应力条件下,现有技术是对CMOS器件进行完整的热载流子注入效应加速应力试验,通过试验获得CMOS器件的饱和漏电流的退化量达到初始值的10%的时序数据,如此获知该CMOS器件的失效时间区间,整个试验过程持续的时间超过10万秒,时间成本较高。而本公开则是在同样试验条件下对CMOS器件进行非完整的加速应力试验,获取的CMOS器件的时间序列样本数据集可以是CMOS器件的饱和漏电流的退化量达到初始值的5%、或6%、或7%、或其他小于10%的时间序列样本数据集,例如对CMOS器件进行热载流子注入效应加速应力试验,通过试验获得CMOS器件的饱和漏电流的退化量达到初始值的5%的时间序列样本数据集。As shown in Figure 3A, the ordinate of each point on the time-varying curve is the degradation amount ΔIdsat (unit: %) of the saturated leakage current, and the corresponding abscissa is the time (unit: %) corresponding to the degradation amount of the saturated leakage current. s). When the degradation amount of the saturation leakage current reaches 10% of the initial value, it means that the CMOS device has failed. The time point when the degradation amount of the saturation leakage current reaches 10% of the initial value is read from the time variation curve, which is the failure of the CMOS device. time. Taking the 1.8VCMOS device produced in the 0.18μm process as an example, under the stress conditions of VDS = -2.6V and VGS = 1.4V applied to the gate and drain respectively, the existing technology is to conduct a complete hot-carrying current flow on the CMOS device. Through the sub-injection effect accelerated stress test, the timing data of the saturated leakage current degradation of the CMOS device reaching 10% of the initial value was obtained through the test. In this way, the failure time interval of the CMOS device was known. The entire test process lasted more than 100,000 seconds. The time cost is higher. The present disclosure conducts a non-complete accelerated stress test on a CMOS device under the same test conditions. The obtained time series sample data set of the CMOS device can be that the degradation amount of the saturation leakage current of the CMOS device reaches 5% of the initial value, or 6%, or 7%, or other time series sample data sets less than 10%, such as conducting a hot carrier injection effect accelerated stress test on a CMOS device, and obtaining through the test that the degradation amount of the saturation leakage current of the CMOS device reaches the initial value. 5% time series sample data set.
图3B示出使用饱和漏电流退化量达到5%时的时间序列样本数据集训练的寿命预测模型预测结果示意图。FIG. 3B shows a schematic diagram of the prediction results of the life prediction model trained using the time series sample data set when the saturation leakage current degradation amount reaches 5%.
如图3B所示,图中纵坐标是饱和漏电流的退化量ΔIdsat(单位:%),相应的横坐标是该饱和漏电流的退化量对应的时间(单位:s)。曲线表示完整的加速应力试验中测试得到的饱和漏电流的退化量随时间变化的数值,三角形曲线表示使用饱和漏电流退化量达到5%时的时间序列样本数据集训练的寿命预测模型预测的饱和漏电流的退化量随时间变化的数值。对于每个CMOS器件,仅需获取加速应力试验饱和漏电流退化量达到5% 的时间序列样本数据集,试验持续时间缩短至5万秒,即可实现其剩余寿命的预测。具体地,将该时间序列样本数据集分为训练集和测试集,用训练集训练时序模型,获得寿命预测模型;用测试集验证寿命预测模型得到验证的寿命预测模型;用验证的寿命预测模型预测CMOS器件的失效时间。即与现有技术相比,本公开的技术方案获得CMOS器件使用寿命结果的时间成本大幅降低。As shown in FIG. 3B , the ordinate in the figure is the degradation amount ΔIdsat (unit: %) of the saturation leakage current, and the corresponding abscissa is the time (unit: s) corresponding to the degradation amount of the saturation leakage current. The curve represents the value of the degradation amount of the saturated leakage current measured in the complete accelerated stress test as a function of time. The triangular curve represents the saturation predicted by the life prediction model trained using the time series sample data set when the degradation amount of the saturation leakage current reaches 5%. The amount of leakage current degradation that changes with time. For each CMOS device, it is only necessary to obtain a time series sample data set in which the saturated leakage current degradation reaches 5% in the accelerated stress test, and the test duration is shortened to 50,000 seconds to predict its remaining life. Specifically, the time series sample data set is divided into a training set and a test set, and the training set is used to train the time series model to obtain a life prediction model; the test set is used to verify the life prediction model to obtain a verified life prediction model; the verified life prediction model is used Predict the failure time of CMOS devices. That is, compared with the existing technology, the technical solution of the present disclosure significantly reduces the time cost for obtaining the service life results of CMOS devices.
根据本公开的实施例,基于时间序列样本数据集得到训练集和测试集;用所述训练集训练时序模型,获得寿命预测模型;用所述测试集验证所述寿命预测模型得到验证的寿命预测模型;用所述验证的寿命预测模型预测所述CMOS器件的失效时间。以饱和漏电流的退化量为例说明,经试验获得某个CMOS器件饱和漏电流的退化量达到初始值的5%的时间序列样本数据集,将该时间序列样本数据集经划分后,训练集中共有c个饱和漏电流的退化量数据,测试集中有p个饱和漏电流的退化量数据,采用滑动时间窗方法将训练集中L个时间序列样本数据作为输入特征,将训练集中滑动时间窗的后一时刻的时间序列样本数据作为输出特征,对长短期记忆模型进行监督学习训练。其中,当L=1时,即将训练集中前一时刻的时间序列样本数据作为输入特征,将训练集中当前时刻的时间序列样本数据作为输出特征,对长短期记忆模型进行监督学习训练;当1<L时,即将训练集的每个滑动时间窗中L个连续的时间序列样本数据作为输入特征,将该滑动时间窗的后一时刻的时间序列样本数据作为输出特征,对长短期记忆模型进行监督学习训练。作为可替换的实施方案,可选择8<L<11,或者6<L<13,以使得训练的模型精度更高。滑动时间窗中选择不同数量连续的时间序列样本数据作为输入特征,以对长短期记忆模型进行监督学习训练,获得的模型对于失效时间的预测值与完整加速应力试验的测试值之间的均方根误差(RMSE)结果如表2所示,结果显示滑动时间窗中连续的时间序列样本数据数量在8-11之间时,According to an embodiment of the present disclosure, a training set and a test set are obtained based on a time series sample data set; a time series model is trained using the training set to obtain a lifespan prediction model; and the lifespan prediction model is verified using the test set to obtain a verified lifespan prediction. Model; predict the failure time of the CMOS device using the validated life prediction model. Taking the degradation amount of saturation leakage current as an example, after experiments, we obtained a time series sample data set in which the degradation amount of saturation leakage current of a certain CMOS device reached 5% of the initial value. After dividing the time series sample data set, the training set There are c pieces of degradation data of saturated leakage current, and there are p pieces of degradation data of saturated leakage current in the test set. The sliding time window method is used to take L time series sample data in the training set as input features, and the tail of the sliding time window in the training set is used. The time series sample data at one moment is used as the output feature to perform supervised learning training on the long short-term memory model. Among them, when L=1, the time series sample data at the previous moment in the training set is used as the input feature, and the time series sample data at the current moment in the training set is used as the output feature to perform supervised learning training on the long and short-term memory model; when 1 < When L, L consecutive time series sample data in each sliding time window of the training set are used as input features, and the time series sample data at the next moment of the sliding time window are used as output features to supervise the long and short-term memory model. Learn and train. As an alternative implementation, 8<L<11, or 6<L<13 can be selected to make the trained model more accurate. Different numbers of continuous time series sample data are selected as input features in the sliding time window to perform supervised learning training on the long short-term memory model. The mean square between the predicted value of the failure time of the model and the test value of the complete accelerated stress test is obtained. The root error (RMSE) results are shown in Table 2. The results show that when the number of continuous time series sample data in the sliding time window is between 8-11,
RMSE处于比较小的范围,即获得的寿命预测模型精度较高。The RMSE is in a relatively small range, that is, the obtained life prediction model has high accuracy.
表2Table 2
L L 88 99 1010 1111
RMSERMSE 0.4570.457 0.2650.265 0.4430.443 0.3610.361
对于本公开的实施例,例如,滑动时间窗中连续的时间序列样本数据数量选择9时,RMSE是0.265,即将训练集的滑动时间窗中9个连续的时间序列样本数据作为输入特征,将该滑动时间窗的后一时刻的时间序列样本数据作为输出特征,对长短期记忆模型进行监督学习训练,获得的寿命预测模型精度最高。For the embodiment of the present disclosure, for example, when the number of continuous time series sample data in the sliding time window is 9, the RMSE is 0.265, that is, 9 continuous time series sample data in the sliding time window of the training set are used as input features, and the The time series sample data at the last moment of the sliding time window is used as the output feature, and the long short-term memory model is supervised learning and trained, and the life prediction model obtained has the highest accuracy.
采用训练集对长短期记忆模型进行监督学习训练获得寿命预测模型后,将训练集中最后一个滑动时间窗内L个时间序列样本数据输入到寿命预测模型中,预测下一个索引为c+1的值,然后将索引为c+1-L到c+1之间的数据输入到寿命预测模型中,预测索引为c+2的值,以此类推,直到预测出索引为c+p的值,计算预测值和测试集中数据值之间的均方误差,评估模型建立的精度。使用该寿命预测模型预测该CMOS器件的失效时间,即将索引为c+p的值继续输入该寿命预测模型,继续预测索引为c+p+1的值,接着输入索引为c+p+1的值预测索引为c+p+2的值……,直到预测的索引为c+p+n的值是饱和漏电流的退化量达到初始值的10%的数值;或者将索引为c+p-L到c+p之间的数据输入到寿命预测模型中,继续预测索引为c+p+1的值,接着输入索引为c+p-L+1到c+p+1之间的数据输入到寿命预测模型中,继续预测索引为c+p+2的值……,直到预测的索引为c+p+n的值是饱和漏电流的退化量达到初始值的10%的数值。此时可根据寿命预测模型输出的预测值绘制经时变化曲线,根据经时变化曲线直接读取CMOS器件的失效时间。其中,基于时间序列样本数据集得到训练集和测试集,可以是将试验获得的时间序列样本数据集按照一定比例或者其他方式划分为训练集和测试集,从而提高模型的泛化能力,防止出现过拟合,以及寻找模型的最优调节参数。Use the training set to perform supervised learning training on the long-short-term memory model. After obtaining the lifespan prediction model, input L time series sample data in the last sliding time window of the training set into the lifespan prediction model to predict the next value with index c+1. , then input the data with index between c+1-L to c+1 into the life prediction model, predict the value with index c+2, and so on, until the value with index c+p is predicted, calculate The mean square error between the predicted value and the data value in the test set evaluates the accuracy of the model. Use the life prediction model to predict the failure time of the CMOS device. That is, continue to input the value with index c+p into the life prediction model, continue to predict the value with index c+p+1, and then enter the value with index c+p+1. The value predicts the value with index c+p+2... until the predicted value with index c+p+n is the value at which the degradation amount of the saturation leakage current reaches 10% of the initial value; or the value with index c+p-L to The data between c+p is input into the life prediction model, continue to predict the value with index c+p+1, and then input the data with index between c+p-L+1 to c+p+1 into the life span In the prediction model, continue to predict the value with index c+p+2... until the predicted value with index c+p+n is the value at which the degradation amount of the saturation leakage current reaches 10% of the initial value. At this time, a time-varying curve can be drawn based on the predicted value output by the life prediction model, and the failure time of the CMOS device can be directly read based on the time-varying curve. Among them, the training set and the test set are obtained based on the time series sample data set. The time series sample data set obtained through the experiment can be divided into the training set and the test set according to a certain proportion or other methods, thereby improving the generalization ability of the model and preventing the occurrence of Overfitting, and finding the optimal adjustment parameters of the model.
根据本公开实施例提供的CMOS器件寿命预测方法,包括:获取CMOS器件在加速应力试验下电参数的时间序列样本数据集,所述时间序列样本数据集包括表征所述CMOS器件寿命的电参数退化量的时间序列样本数据;基于所述时间序列样本数据集得到训练集;用所述训练集训练时序模型,获得寿命预测模型;用所述寿命预测模型预测所述CMOS器件的失效时间。上述技术方案通过对CMOS器件进行非完整的加速应力试验,获得表征CMOS器件寿命的电参数退化量在初始值到预设阈值范围内的时间序列样本数据集,根据该时间序列样本数据集训练寿命预测模型,然后使用模型即可预测该CMOS器件的失效时间,减少了现有技术中因对CMOS器件进行完整的加速应力试验以确定其使用寿命的时间成本,提高了产品质检效率,缩短了CMOS器件的生产周期。According to the method for predicting the life of a CMOS device provided by an embodiment of the present disclosure, the method includes: obtaining a time series sample data set of electrical parameters of the CMOS device under an accelerated stress test, where the time series sample data set includes electrical parameter degradation that characterizes the life of the CMOS device. Amount of time series sample data; obtain a training set based on the time series sample data set; use the training set to train a timing model to obtain a life prediction model; use the life prediction model to predict the failure time of the CMOS device. The above technical solution conducts non-complete accelerated stress tests on CMOS devices to obtain a time series sample data set in which the electrical parameter degradation amount that characterizes the life of the CMOS device is within the range from the initial value to the preset threshold, and the life span is trained based on the time series sample data set. Predict the model, and then use the model to predict the failure time of the CMOS device, which reduces the time cost of conducting a complete accelerated stress test on the CMOS device to determine its service life in the existing technology, improves product quality inspection efficiency, and shortens the time CMOS device production cycle.
图4示出对时间序列样本数据集进行预处理的方法的流程图。Figure 4 shows a flow chart of a method for preprocessing a time series sample data set.
如图4所示,对所述时间序列样本数据集进行预处理,得到处理后的时间序列样本数据集。其中,预处理包括以下步骤S401-S403:As shown in Figure 4, the time series sample data set is preprocessed to obtain a processed time series sample data set. Among them, preprocessing includes the following steps S401-S403:
在步骤S401中,对非等时间间隔的时间序列样本数据集进行等时间间隔的插值处理;In step S401, perform interpolation processing at equal time intervals on the time series sample data sets with non-equal time intervals;
在步骤S402中,对所述时间序列样本数据集进行差分化处理;In step S402, perform differential differentiation processing on the time series sample data set;
在步骤S403中,对所述时间序列样本数据集进行归一化处理。In step S403, the time series sample data set is normalized.
在本公开的实施方式中,为了提高所建立的寿命预测模型的准确性,在使用时间序列样本数据集训练、验证寿命预测模型之前,先对获得的时间序列样本数据集进行预处理,预处理方法可以是插值处理、差分化处理以及归一化处理中的任意一种或者多种方式。当采用多种方式进行预处理时,将上一处理的输出作为下一处理的输入,依次进行所述多种方式的预处理,得到处理后的时间序列样本数据集。In the embodiment of the present disclosure, in order to improve the accuracy of the established life prediction model, before using the time series sample data set to train and verify the life prediction model, the obtained time series sample data set is preprocessed. The method may be any one or more of interpolation processing, differential processing and normalization processing. When multiple methods are used for preprocessing, the output of the previous process is used as the input of the next process, and the preprocessing in the multiple methods is performed in sequence to obtain a processed time series sample data set.
其中,若获得的时间序列样本数据是非等时间间隔的时间序列样本数据,则需对其进行插值处理,将其转换为等时间间隔的时间序列样本数据集。插值处理方法可以是线性插值、样条插值,或者基于时间的插值等方法,本公开对此不做限制。Among them, if the time series sample data obtained is time series sample data with non-equal time intervals, it needs to be interpolated to convert it into a time series sample data set with equal time intervals. The interpolation processing method may be linear interpolation, spline interpolation, or time-based interpolation, and the present disclosure does not limit this.
其中,若获得的时间序列样本数据是不平稳的,例如,实施过程中发现饱和漏电流退化量随时间变化是呈上升趋势的,则需要对其进行差分化处理,以获得平稳时间序列数据。Among them, if the time series sample data obtained is not stationary, for example, during the implementation process, it is found that the saturation leakage current degradation amount shows an upward trend with time, then it needs to be differentially processed to obtain stationary time series data.
其中,若获得的时间序列样本数据中含有奇异样本数据,则需对该时间序列样本数据集进行归一化处理,将获得的时间序列样本数据集收敛限定在一定范围内,消除奇异样本数据导致的不良影响,提高后续训练、测试模型的精度。例如,在本公开的实施例中,可以选择根据如下公式对时间序列样本数据集进行归一化处理:Among them, if the obtained time series sample data contains singular sample data, the time series sample data set needs to be normalized to limit the convergence of the obtained time series sample data set within a certain range to eliminate the problems caused by singular sample data. adverse effects and improve the accuracy of subsequent training and testing models. For example, in the embodiment of the present disclosure, you can choose to normalize the time series sample data set according to the following formula:
Figure PCTCN2022132173-appb-000001
Figure PCTCN2022132173-appb-000001
其中,x′为时间序列样本数据归一化后的值,x为时间序列样本数据归一化前的值,x max和x min为时间序列样本数据集中的最大值和最小值。 Among them, x′ is the value after normalization of time series sample data, x is the value before normalization of time series sample data, x max and x min are the maximum and minimum values in the time series sample data set.
图5示出用训练集训练寿命预测模型的方法流程图。Figure 5 shows a flow chart of a method for training a lifespan prediction model using a training set.
如图5所示,所述用训练集训练寿命预测模型方法包括以下步骤S501-S502:As shown in Figure 5, the method of using a training set to train a lifespan prediction model includes the following steps S501-S502:
在步骤S501中,将所述训练集中前一时刻的时间序列样本数据作为输入特征,将所述训练集中当前时刻的时间序列样本数据作为输出特征,对所述长短期记忆模型进行监督学习训练;或In step S501, use the time series sample data at the previous moment in the training set as the input feature, use the time series sample data at the current moment in the training set as the output feature, and perform supervised learning training on the long and short-term memory model; or
采用滑动时间窗方法将所述训练集中多个连续的时间序列样本数据作为输入特征,将所述训练集中所述滑动时间窗的后一时刻的时间序列样本数据作为输出特征,对所述长短期记忆模型进行监督学习训练。The sliding time window method is used to use multiple continuous time series sample data in the training set as input features, and the time series sample data at the next moment of the sliding time window in the training set is used as the output feature. Memory models are trained for supervised learning.
在步骤S502中,用均方误差或者平均绝对百分比误差作为损失函数,用AdaGrad,RMSprop,Adam优化器中的至少一种优化模型参数,训练所述长短期记忆模型。In step S502, use the mean square error or the average absolute percentage error as the loss function, and use at least one of AdaGrad, RMSprop, and Adam optimizers to optimize model parameters to train the long short-term memory model.
在本公开的实施例中,通过对长短期记忆模型进行监督学习训练,以调整模型参数,获得最准确的寿命预测模型。具体地,在训练集中,输入前一时刻的时间序列样本数据,输出当前时刻的时间序列样本数据,将输入数据与输出数据之间形成一对一映射关系,即形成寿命预测模型。例如可以是将最开始时刻的输入值设为0,对应的输出值是第一时刻时间序列样本数据,T-1时刻样本数据作为输入值,对应的输出值是T时刻样本数据,以此类推。通过输入值和输出值之间实现转换,以获得模型参数,即对长短期记忆模型进行监督学习训练,得到寿命预测模型。或者,也可以是采用滑动时间窗方法将训练集中多个连续的时间序列样本数据作为输入特征,将训练集中滑动时间窗的后一时刻的时间序列样本数据作为输出特征,对长短期记忆模型进行监督学习训练。例如训练集中滑动时间窗内有L个连续的时间序列样本数据,将这L个连续的时间序列样本数据作为输入特征,将滑动时间窗的后一时刻的时间序列样本数据作为输出特征,对长短期记忆模型进行监督学习训练。作为可替换的实施方案,可选择8<L<11,或者6<L<13,以使得训练的模型精度更高。In embodiments of the present disclosure, the most accurate life prediction model is obtained by performing supervised learning training on the long short-term memory model to adjust model parameters. Specifically, in the training set, the time series sample data of the previous moment is input, the time series sample data of the current moment is output, and a one-to-one mapping relationship is formed between the input data and the output data, that is, a lifespan prediction model is formed. For example, the input value at the earliest moment can be set to 0, the corresponding output value is the time series sample data at the first moment, the sample data at time T-1 is used as the input value, the corresponding output value is the sample data at time T, and so on. . By converting the input value and the output value to obtain the model parameters, that is, performing supervised learning training on the long-short-term memory model to obtain the lifespan prediction model. Alternatively, the sliding time window method can be used to use multiple continuous time series sample data in the training set as input features, and the time series sample data at the next moment in the sliding time window in the training set as the output feature to perform the long and short-term memory model. Supervised learning training. For example, there are L continuous time series sample data in the sliding time window in the training set. These L continuous time series sample data are used as input features, and the time series sample data at the next moment of the sliding time window is used as the output feature. Short-term memory models are trained for supervised learning. As an alternative implementation, 8<L<11, or 6<L<13 can be selected to make the trained model more accurate.
在本公开的实施例中,对于通过监督学***均绝对百分比误差作为损失函数,用AdaGrad,RMSprop,Adam优化器中的至少一种优化模型参数,训练所述长短期记忆模型。In embodiments of the present disclosure, for the life prediction model obtained through supervised learning training, the mean square error or the average absolute percentage error can be used as the loss function, and at least one of AdaGrad, RMSprop, and Adam optimizers can be used to optimize the model parameters, Train the long short-term memory model.
其中,均方误差计算公式是:Among them, the calculation formula of mean square error is:
Figure PCTCN2022132173-appb-000002
Figure PCTCN2022132173-appb-000002
其中y i为真实值,
Figure PCTCN2022132173-appb-000003
为预测值。
where y i is the real value,
Figure PCTCN2022132173-appb-000003
is the predicted value.
绝对百分比误差计算公式是:The absolute percentage error calculation formula is:
Figure PCTCN2022132173-appb-000004
Figure PCTCN2022132173-appb-000004
其中y i为真实值,
Figure PCTCN2022132173-appb-000005
为预测值。
where y i is the real value,
Figure PCTCN2022132173-appb-000005
is the predicted value.
其中,以损失函数最小化为优化目标,用AdaGrad,RMSprop,Adam优化器来迭代更新调整寿命预测模型参数时,为了防止寿命预测模型在训练过程中出现不收敛的问题,可以对寿命预测模型进行多次迭代,迭代次数可以是1,000~10,000次。Among them, when minimizing the loss function is the optimization goal and using AdaGrad, RMSprop, and Adam optimizers to iteratively update and adjust the parameters of the life prediction model, in order to prevent the life prediction model from non-convergence problems during the training process, the life prediction model can be modified Multiple iterations, the number of iterations can be 1,000 to 10,000 times.
使用本公开的寿命预测模型预测CMOS器件失效时间,包括:将任一时间序列样本数据作为寿命预测模型的输入,得到寿命预测模型的输出结果;将寿命预测模型的输出结果更新寿命预测模型的输入,以更新寿命预测模型的输出,直到寿命预测模型的输出达到CMOS器件失效时对应的相应电参数退化量阈值范围;根据相邻时间样本数据之间的时间间隔和寿命预测模型的输出,确定CMOS器件的失效时间。其中,CMOS器件失效时对应的相应电参数退化量阈值范围可以是初始值的9%~11%。具体地,以通过加速应力试验获取饱和漏电流退化量的时间序列样本数据,CMOS器件失效时对应的相应电参数退化量是初始值的10%为例说明,在工业化产出的每批次CMOS器件中,采用随机抽样方式抽取一定比例或者数量的CMOS器件,对于每件CMOS器件通过加速应力试验获取饱和漏电流的退化量达到初始值的5%的时间序列样本数据集,将该时间序列样本数据集分为训练集和测试集,然后将训练集中前一时刻的时间序列样本数据作为输入特征,将训练集中当前时刻的时间序列样本数据作为输出特征,对长短期记忆模型进行监督学习训练,得到寿命预测模型,之后再将测试集中的前一时刻的时间序列样本数据作为输入特征输入寿命预测模型,以计算当前时刻的时间序列样本数据,即预测当前时刻的饱和漏电流的退化量,计算预测值和测试集中数据值之间的均方误差,以损失函数最小化为优化目标,采用AdaGrad,RMSprop,Adam等优化器来迭代更新调整寿命预测模型参数,使建立的模型精度最高,预测值最准确。再将当前时刻的时间序列样本数据作为输入特征输入经迭代更新的寿命预测模型,以计算下一时刻的时间序列样本数据,即预测下一时刻的饱和漏电流的退化量,直到预测的下一时刻的饱和漏电流的退化量达到初始值的10%的数值,此时可根据寿命预测模型输出的预测值绘制经时变化曲线,根据经时变化曲线直接读取CMOS器件的失效时间。针对样本中的每个CMOS器件都重复该过程,即可获知该批次CMOS器件使用寿命的区间范围。Using the life prediction model of the present disclosure to predict CMOS device failure time includes: using any time series sample data as the input of the life prediction model to obtain the output of the life prediction model; updating the input of the life prediction model with the output of the life prediction model , to update the output of the life prediction model until the output of the life prediction model reaches the corresponding electrical parameter degradation threshold range when the CMOS device fails; according to the time interval between adjacent time sample data and the output of the life prediction model, determine the CMOS Device failure time. Among them, the corresponding electrical parameter degradation threshold range when the CMOS device fails can be 9% to 11% of the initial value. Specifically, taking the time series sample data of the saturation leakage current degradation amount obtained through the accelerated stress test, the corresponding electrical parameter degradation amount when the CMOS device fails is 10% of the initial value as an example to illustrate that in each batch of CMOS produced in industrialization Among the devices, a certain proportion or number of CMOS devices are selected using random sampling. For each CMOS device, a time series sample data set is obtained through an accelerated stress test in which the degradation amount of the saturation leakage current reaches 5% of the initial value. The time series samples are The data set is divided into a training set and a test set. Then the time series sample data of the previous moment in the training set is used as the input feature, and the time series sample data of the current moment in the training set is used as the output feature. Supervised learning training is performed on the long and short-term memory model. Obtain the life prediction model, and then input the time series sample data of the previous moment in the test set as input features into the life prediction model to calculate the time series sample data of the current moment, that is, predict the degradation amount of the saturation leakage current at the current moment, and calculate The mean square error between the predicted value and the data value in the test set takes the minimization of the loss function as the optimization goal. Optimizers such as AdaGrad, RMSprop, and Adam are used to iteratively update and adjust the parameters of the life prediction model so that the established model has the highest accuracy and the predicted value Most accurate. The time series sample data at the current moment is then input into the iteratively updated life prediction model as input features to calculate the time series sample data at the next moment, that is, to predict the degradation amount of the saturation leakage current at the next moment, until the next predicted When the degradation amount of the saturation leakage current reaches 10% of the initial value, a time-varying curve can be drawn based on the predicted value output by the life prediction model, and the failure time of the CMOS device can be directly read based on the time-varying curve. Repeat this process for each CMOS device in the sample, and you can know the service life range of the batch of CMOS devices.
和/或,使用本公开的寿命预测模型预测CMOS器件失效时间,也可以是将任一滑动时间窗内的时间序列样本数据作为寿命预测模型的输入,得到寿命预测模型的输出结果;将寿命预测模型的输出结果更新寿命预测模型的输入,以更新寿命预测模型的输出,直到寿命预测模型的输出达到CMOS器件失效时对应的相应电参数退化量阈值范围;根据相邻时间样本数据之间的时间间隔和寿命预测模型的输出,确定CMOS器件的失效时间。其中,CMOS器件失效时对应的相应电参数退化量阈值范围可以是初始值的9%~11%。具体地,以通过加速应力试验获取饱和漏电流退化量的时间序列样本数据,CMOS器件失效时对应的相应电参数退化量是初始值的10%为例说明,针对每个CMOS器件,在时间序列样本数据集分为训练集和测试集后,将训练集滑动时间窗中L个连续的时间序列样本数据作为输入特征,将训练集中当前时刻的时间序列样本数据作为输出特征,对长短期记忆模型进行监督学习训练,得到寿命预测模型,之后再将测试集滑动时间窗中L个连续的时间序列样本数据作为输入特征输入寿命预测模型,以计算当前时刻的时间序列样本数据,即预测当前时刻的饱和漏电流的退化量,计算预测值和测试集中数据值之间的均方误差,以损失函数最小化为优化目标,采用AdaGrad,RMSprop,Adam等优化器来迭代更新调整寿命预测模型参数,使建立的模型精度最高,预测值最准确。再将滑动时间窗中包含当前时刻的L个连续的时间序列样本数据作为输入特征输入经迭代更新的寿命预测模型,以计算下一时刻 的时间序列样本数据,即预测下一时刻的饱和漏电流的退化量,直到预测的下一时刻的饱和漏电流的退化量达到初始值的10%的数值,此时可根据寿命预测模型输出的预测值绘制经时变化曲线,根据经时变化曲线直接读取CMOS器件的失效时间。And/or, use the life prediction model of the present disclosure to predict the failure time of the CMOS device, or use the time series sample data in any sliding time window as the input of the life prediction model to obtain the output result of the life prediction model; The output result of the model updates the input of the life prediction model to update the output of the life prediction model until the output of the life prediction model reaches the corresponding electrical parameter degradation threshold range when the CMOS device fails; according to the time between adjacent time sample data The output of interval and lifetime prediction models determines the time to failure of CMOS devices. Among them, the corresponding electrical parameter degradation threshold range when the CMOS device fails can be 9% to 11% of the initial value. Specifically, taking the time series sample data of the saturation leakage current degradation amount obtained through the accelerated stress test, the corresponding electrical parameter degradation amount when the CMOS device fails is 10% of the initial value as an example. For each CMOS device, in the time series After the sample data set is divided into a training set and a test set, L consecutive time series sample data in the sliding time window of the training set are used as input features, and the time series sample data at the current moment in the training set is used as the output feature. For the long short-term memory model Perform supervised learning training to obtain a lifespan prediction model, and then input L consecutive time series sample data in the sliding time window of the test set as input features into the lifespan prediction model to calculate the time series sample data at the current moment, that is, predict the time series sample data at the current moment. Degradation amount of saturation leakage current, calculate the mean square error between the predicted value and the data value in the test set, take the minimization of the loss function as the optimization goal, use AdaGrad, RMSprop, Adam and other optimizers to iteratively update and adjust the life prediction model parameters, so that The established model has the highest accuracy and the most accurate prediction value. Then, L consecutive time series sample data containing the current moment in the sliding time window are used as input features into the iteratively updated life prediction model to calculate the time series sample data at the next moment, that is, predict the saturation leakage current at the next moment. until the predicted degradation amount of saturated leakage current reaches 10% of the initial value at the next moment. At this time, a time-varying curve can be drawn based on the predicted value output by the life prediction model, and the time-varying curve can be read directly Take the failure time of the CMOS device.
根据本公开的实施例,经时变化曲线上的每个点的纵坐标是寿命预测模型的输出值,相应的横坐标是该输出值对应的时间点,相邻点的横坐标之差为相邻时间样本数据之间的时间间隔。According to embodiments of the present disclosure, the ordinate of each point on the time-varying curve is the output value of the life prediction model, the corresponding abscissa is the time point corresponding to the output value, and the difference between the abscissas of adjacent points is The time interval between adjacent time sample data.
图6示出根据本公开的实施例的CMOS器件寿命预测装置的结构框图。其中,该装置可以通过软件、硬件或者两者的结合实现成为电子设备的部分或者全部。FIG. 6 shows a structural block diagram of a CMOS device life prediction device according to an embodiment of the present disclosure. The device can be implemented as part or all of the electronic device through software, hardware, or a combination of both.
如图6所示,所述CMOS器件寿命预测装置600包括:As shown in Figure 6, the CMOS device life prediction device 600 includes:
获取模块601,被配置为获取CMOS器件在加速应力试验下电参数的时间序列样本数据集,所述时间序列样本数据集包括表征所述CMOS器件寿命的电参数退化量的时间序列样本数据;The acquisition module 601 is configured to acquire a time series sample data set of the electrical parameters of the CMOS device under accelerated stress testing, where the time series sample data set includes time series sample data characterizing the electrical parameter degradation amount of the CMOS device life;
第一分类模块602,被配置为基于所述时间序列样本数据集得到训练集;The first classification module 602 is configured to obtain a training set based on the time series sample data set;
训练模块603,被配置为用所述训练集训练时序模型,获得寿命预测模型;The training module 603 is configured to train a time series model using the training set to obtain a lifespan prediction model;
预测模块604,被配置为用所述寿命预测模型预测所述CMOS器件的失效时间。The prediction module 604 is configured to predict the failure time of the CMOS device using the life prediction model.
进一步的,所述CMOS器件寿命预测装置600还包括:Further, the CMOS device life prediction device 600 also includes:
第二分类模块,被配置为基于所述时间序列样本数据集得到测试集;The second classification module is configured to obtain a test set based on the time series sample data set;
验证模块,被配置为用所述测试集验证所述寿命预测模型得到验证的寿命预测模型,a verification module configured to verify the life prediction model using the test set to obtain the verified life prediction model,
其中,所述预测模块还被配置为用验证的所述寿命预测模型预测所述CMOS器件的失效时间。Wherein, the prediction module is further configured to predict the failure time of the CMOS device using the verified life prediction model.
本公开提供的CMOS器件寿命预测装置,包括:获取模块,被配置为获取CMOS器件在加速应力试验下电参数的时间序列样本数据集,所述时间序列样本数据集包括表征所述CMOS器件寿命的电参数退化量的时间序列样本数据;第一分类模块,被配置为基于所述时间序列样本数据集得到训练集;训练模块,被配置为用所述训练集训练时序模型,获得寿命预测模型;预测模块,被配置为用所述寿命预测模型预测所述CMOS器件的失效时间。上述技术方案通过对CMOS器件进行非完整的加速应力试验,获得表征CMOS器件寿命的电参数退化量在初始值到预设阈值范围内的时间序列样本数据集,根据该时间序列样本数据集训练寿命预测模型,然后使用模型即可预测该CMOS器件的失效时间,减少了现有技术中因对CMOS器件进行完整的加速应力试验以确定其使用寿命的时间成本,提高了产品质检效率,缩短了CMOS器件的生产周期。The CMOS device life prediction device provided by the present disclosure includes: an acquisition module configured to acquire a time series sample data set of the electrical parameters of the CMOS device under accelerated stress testing, where the time series sample data set includes parameters characterizing the life of the CMOS device. Time series sample data of electrical parameter degradation amount; a first classification module configured to obtain a training set based on the time series sample data set; a training module configured to train a time series model using the training set to obtain a lifespan prediction model; A prediction module configured to predict the failure time of the CMOS device using the life prediction model. The above technical solution conducts non-complete accelerated stress tests on CMOS devices to obtain a time series sample data set in which the electrical parameter degradation amount that characterizes the life of the CMOS device is within the range from the initial value to the preset threshold, and the life span is trained based on the time series sample data set. Predict the model, and then use the model to predict the failure time of the CMOS device, which reduces the time cost of conducting a complete accelerated stress test on the CMOS device to determine its service life in the existing technology, improves product quality inspection efficiency, and shortens the time CMOS device production cycle.
根据本公开的实施例,所述时序模型是长短期记忆模型。According to an embodiment of the present disclosure, the timing model is a long short-term memory model.
根据本公开的实施例,所述长短期记忆模型具有1~5个隐藏层节点,以及1个全连接层节点。According to an embodiment of the present disclosure, the long short-term memory model has 1 to 5 hidden layer nodes and 1 fully connected layer node.
根据本公开的实施例,表征所述CMOS器件寿命的电参数包括以下的至少一项:饱和漏电流、阈值电压、跨导;According to an embodiment of the present disclosure, the electrical parameters characterizing the life of the CMOS device include at least one of the following: saturation leakage current, threshold voltage, and transconductance;
所述时间序列样本数据集中的电参数退化量小于等于所述CMOS器件失效时的相应电参数退化量。The electrical parameter degradation amount in the time series sample data set is less than or equal to the corresponding electrical parameter degradation amount when the CMOS device fails.
根据本公开的实施例,所述时间序列样本数据集中的电参数退化量最大值为相应电参数的5%~7%。According to an embodiment of the present disclosure, the maximum value of the electrical parameter degradation in the time series sample data set is 5% to 7% of the corresponding electrical parameter.
根据本公开的实施例,所述时间序列样本数据集中的电参数退化量最大值为相应电参数的5%或6%或7%。According to an embodiment of the present disclosure, the maximum value of the electrical parameter degradation in the time series sample data set is 5% or 6% or 7% of the corresponding electrical parameter.
根据本公开的实施例,还包括:According to an embodiment of the present disclosure, it also includes:
预处理模块,被配置为通过以下任意一种或多种方式对所述时间序列样本数据集进行预处理,得到处理后的时间序列样本数据集:The preprocessing module is configured to preprocess the time series sample data set through any one or more of the following methods to obtain a processed time series sample data set:
对非等时间间隔的时间序列样本数据集进行等时间间隔的插值处理;Perform equal time interval interpolation processing on time series sample data sets with non-equal time intervals;
对所述时间序列样本数据集进行差分化处理;Perform differential differentiation processing on the time series sample data set;
对所述时间序列样本数据集进行归一化处理;Perform normalization processing on the time series sample data set;
其中,当采用多种方式进行预处理时,将上一处理的输出作为下一处理的输入,依次进行所述多种方式的预处理,得到处理后的时间序列样本数据集。When preprocessing is performed in multiple ways, the output of the previous process is used as the input of the next process, and the preprocessing in the multiple ways is performed in sequence to obtain a processed time series sample data set.
根据本公开的实施例,所述训练模块包括:According to an embodiment of the present disclosure, the training module includes:
监督学习模块,被配置为将所述训练集中前一时刻的时间序列样本数据作为输入特征,将所述训练集中当前时刻的时间序列样本数据作为输出特征,对所述长短期记忆模型进行监督学习训练。A supervised learning module configured to use the time series sample data at the previous moment in the training set as input features, use the time series sample data at the current moment in the training set as output features, and perform supervised learning on the long short-term memory model. train.
根据本公开的实施例,所述训练模块包括:According to an embodiment of the present disclosure, the training module includes:
监督学习模块,被配置为采用滑动时间窗方法将所述训练集中多个连续的时间序列样本数据作为输入特 征,将所述训练集中所述滑动时间窗的后一时刻的时间序列样本数据作为输出特征,对所述长短期记忆模型进行监督学习训练。A supervised learning module configured to use the sliding time window method to use multiple continuous time series sample data in the training set as input features, and use the time series sample data at the next moment of the sliding time window in the training set as output Features, perform supervised learning training on the long short-term memory model.
根据本公开的实施例,所述连续的时间序列样本数据数量是8~11个;或According to an embodiment of the present disclosure, the number of continuous time series sample data is 8 to 11; or
所述连续的时间序列样本数据数量是9个。The number of continuous time series sample data is 9.
根据本公开的实施例,所述训练模块还包括:According to an embodiment of the present disclosure, the training module further includes:
优化模块,被配置为用均方误差或者平均绝对百分比误差作为损失函数,用AdaGrad,RMSprop,Adam优化器中的至少一种优化模型参数,训练所述长短期记忆模型。The optimization module is configured to use the mean square error or the average absolute percentage error as the loss function, and use at least one of AdaGrad, RMSprop, and Adam optimizers to optimize model parameters to train the long short-term memory model.
根据本公开的实施例,所述训练模块还包括:According to an embodiment of the present disclosure, the training module further includes:
迭代模块,被配置为对所述寿命预测模型进行多次迭代。An iteration module configured to iterate the life prediction model multiple times.
根据本公开的实施例,所述迭代模块的迭代的次数是1,000~10,000次。According to an embodiment of the present disclosure, the number of iterations of the iteration module is 1,000 to 10,000 times.
图7示出根据本公开的实施例的电子设备的结构框图。FIG. 7 shows a structural block diagram of an electronic device according to an embodiment of the present disclosure.
如图7所示,所述电子设备700包括存储器701和处理器702,其中,存储器701用于存储一条或多条计算机指令,其中,所述一条或多条计算机指令被所述处理器702执行以实现如下方法步骤:As shown in Figure 7, the electronic device 700 includes a memory 701 and a processor 702. The memory 701 is used to store one or more computer instructions, and the one or more computer instructions are executed by the processor 702. To implement the following method steps:
获取CMOS器件在加速应力试验下电参数的时间序列样本数据集,所述时间序列样本数据集包括表征所述CMOS器件寿命的电参数退化量的时间序列样本数据;Obtaining a time series sample data set of electrical parameters of the CMOS device under accelerated stress testing, where the time series sample data set includes time series sample data representing the amount of electrical parameter degradation that characterizes the life of the CMOS device;
基于所述时间序列样本数据集得到训练集;Obtain a training set based on the time series sample data set;
用所述训练集训练时序模型,获得寿命预测模型;Use the training set to train a time series model to obtain a lifespan prediction model;
用所述寿命预测模型预测所述CMOS器件的失效时间。The life prediction model is used to predict the failure time of the CMOS device.
根据本公开的实施例,还包括:According to an embodiment of the present disclosure, it also includes:
基于所述时间序列样本数据集得到测试集;Obtain a test set based on the time series sample data set;
用所述测试集验证所述寿命预测模型得到验证的寿命预测模型,Use the test set to verify the life prediction model to obtain a verified life prediction model,
其中,所述用所述寿命预测模型预测所述CMOS器件的失效时间,包括用验证的所述寿命预测模型预测所述CMOS器件的失效时间。Wherein, using the life prediction model to predict the failure time of the CMOS device includes using the verified life prediction model to predict the failure time of the CMOS device.
根据本公开的实施例,所述时序模型是长短期记忆模型。According to an embodiment of the present disclosure, the timing model is a long short-term memory model.
根据本公开的实施例,所述长短期记忆模型具有1~5个隐藏层节点,以及1个全连接层节点。According to an embodiment of the present disclosure, the long short-term memory model has 1 to 5 hidden layer nodes and 1 fully connected layer node.
根据本公开的实施例,表征所述CMOS器件寿命的电参数包括以下的至少一项:饱和漏电流、阈值电压、跨导;According to an embodiment of the present disclosure, the electrical parameters characterizing the life of the CMOS device include at least one of the following: saturation leakage current, threshold voltage, and transconductance;
所述时间序列样本数据集中的电参数退化量小于等于所述CMOS器件失效时的相应电参数退化量。The electrical parameter degradation amount in the time series sample data set is less than or equal to the corresponding electrical parameter degradation amount when the CMOS device fails.
根据本公开的实施例,所述时间序列样本数据集中的电参数退化量最大值为相应电参数的5%~7%。According to an embodiment of the present disclosure, the maximum value of the electrical parameter degradation in the time series sample data set is 5% to 7% of the corresponding electrical parameter.
根据本公开的实施例,所述时间序列样本数据集中的电参数退化量最大值为相应电参数的5%或6%或7%。According to an embodiment of the present disclosure, the maximum value of the electrical parameter degradation in the time series sample data set is 5% or 6% or 7% of the corresponding electrical parameter.
根据本公开的实施例,还包括:According to an embodiment of the present disclosure, it also includes:
通过以下任意一种或多种方式对所述时间序列样本数据集进行预处理,得到处理后的时间序列样本数据集:Preprocess the time series sample data set in any one or more of the following ways to obtain a processed time series sample data set:
对非等时间间隔的时间序列样本数据集进行等时间间隔的插值处理;Perform equal time interval interpolation processing on time series sample data sets with non-equal time intervals;
对所述时间序列样本数据集进行差分化处理;Perform differential differentiation processing on the time series sample data set;
对所述时间序列样本数据集进行归一化处理;Perform normalization processing on the time series sample data set;
其中,当采用多种方式进行预处理时,将上一处理的输出作为下一处理的输入,依次进行所述多种方式的预处理,得到处理后的时间序列样本数据集。When preprocessing is performed in multiple ways, the output of the previous process is used as the input of the next process, and the preprocessing in the multiple ways is performed in sequence to obtain a processed time series sample data set.
根据本公开的实施例,所述用所述训练集训练时序模型,获得寿命预测模型包括:According to an embodiment of the present disclosure, using the training set to train a time series model and obtain a lifespan prediction model includes:
将所述训练集中前一时刻的时间序列样本数据作为输入特征,将所述训练集中当前时刻的时间序列样本数据作为输出特征,对所述长短期记忆模型进行监督学习训练。The time series sample data at the previous moment in the training set is used as the input feature, and the time series sample data at the current moment in the training set is used as the output feature, and the long and short-term memory model is subjected to supervised learning training.
根据本公开的实施例,所述用所述训练集训练时序模型,获得寿命预测模型包括:According to an embodiment of the present disclosure, using the training set to train a time series model and obtain a lifespan prediction model includes:
采用滑动时间窗方法将所述训练集中多个连续的时间序列样本数据作为输入特征,将所述训练集中所述滑动时间窗的后一时刻的时间序列样本数据作为输出特征,对所述长短期记忆模型进行监督学习训练。The sliding time window method is used to use multiple continuous time series sample data in the training set as input features, and the time series sample data at the next moment of the sliding time window in the training set is used as the output feature. Memory models are trained with supervised learning.
根据本公开的实施例,所述连续的时间序列样本数据数量是8~11个;或,According to an embodiment of the present disclosure, the number of continuous time series sample data is 8 to 11; or,
所述连续的时间序列样本数据数量是9个。The number of continuous time series sample data is 9.
根据本公开的实施例,所述用所述训练集训练时序模型,获得寿命预测模型还包括:According to an embodiment of the present disclosure, using the training set to train a time series model and obtain a lifespan prediction model further includes:
用均方误差或者平均绝对百分比误差作为损失函数,用AdaGrad,RMSprop,Adam优化器中的至少一种优化模型参数,训练所述长短期记忆模型。Use the mean square error or the average absolute percentage error as the loss function, and use at least one of AdaGrad, RMSprop, and Adam optimizers to optimize model parameters to train the long short-term memory model.
根据本公开的实施例,所述用所述训练集训练时序模型,获得寿命预测模型还包括:According to an embodiment of the present disclosure, using the training set to train a time series model and obtain a lifespan prediction model further includes:
对所述寿命预测模型进行多次迭代。The life prediction model is subjected to multiple iterations.
根据本公开的实施例,所述迭代的次数是1,000~10,000次。According to an embodiment of the present disclosure, the number of iterations is 1,000 to 10,000.
图8示出适于用来实现根据本公开实施例的方法的计算机***的结构示意图。FIG. 8 shows a schematic structural diagram of a computer system suitable for implementing methods according to embodiments of the present disclosure.
如图8所示,计算机***800包括处理单元801,其可以根据存储在只读存储器(ROM)802中的程序或者从存储部分808加载到随机访问存储器(RAM)803中的程序而执行上述实施例中的各种处理。在RAM 803中,还存储有计算机***800操作所需的各种程序和数据。处理单元801、ROM 802以及RAM 803通过总线804彼此相连。输入/输出(I/O)接口805也连接至总线804。As shown in FIG. 8 , the computer system 800 includes a processing unit 801 that can perform the above-described implementation according to a program stored in a read-only memory (ROM) 802 or loaded from a storage portion 808 into a random access memory (RAM) 803 Various treatments in the example. In the RAM 803, various programs and data required for the operation of the computer system 800 are also stored. The processing unit 801, ROM 802 and RAM 803 are connected to each other via a bus 804. An input/output (I/O) interface 805 is also connected to bus 804.
以下部件连接至I/O接口805:包括键盘、鼠标等的输入部分806;包括诸如阴极射线管(CRT)、液晶显示器(LCD)等以及扬声器等的输出部分807;包括硬盘等的存储部分808;以及包括诸如LAN卡、调制解调器等的网络接口卡的通信部分809。通信部分809经由诸如因特网的网络执行通信处理。驱动器810也根据需要连接至I/O接口805。可拆卸介质811,诸如磁盘、光盘、磁光盘、半导体存储器等等,根据需要安装在驱动器810上,以便于从其上读出的计算机程序根据需要被安装入存储部分808。其中,所述处理单元801可实现为CPU、GPU、TPU、FPGA、NPU等处理单元。The following components are connected to the I/O interface 805: an input section 806 including a keyboard, a mouse, etc.; an output section 807 including a cathode ray tube (CRT), a liquid crystal display (LCD), etc., speakers, etc.; and a storage section 808 including a hard disk, etc. ; and a communication section 809 including a network interface card such as a LAN card, a modem, etc. The communication section 809 performs communication processing via a network such as the Internet. Driver 810 is also connected to I/O interface 805 as needed. Removable media 811, such as magnetic disks, optical disks, magneto-optical disks, semiconductor memories, etc., are installed on the drive 810 as needed, so that a computer program read therefrom is installed into the storage portion 808 as needed. Wherein, the processing unit 801 can be implemented as a processing unit such as CPU, GPU, TPU, FPGA, NPU, etc.
特别地,根据本公开的实施例,上文描述的方法可以被实现为计算机软件程序。例如,本公开的实施例包括一种计算机程序产品,其包括计算机指令,该计算机指令被处理器执行时实现上文所述的方法步骤。在这样的实施例中,该计算机程序产品可以通过通信部分809从网络上被下载和安装,和/或从可拆卸介质811被安装。In particular, according to embodiments of the present disclosure, the method described above may be implemented as a computer software program. For example, embodiments of the present disclosure include a computer program product including computer instructions that, when executed by a processor, implement the method steps described above. In such embodiments, the computer program product may be downloaded and installed from the network via communications portion 809 and/or installed from removable media 811 .
附图中的流程图和框图,图示了按照本公开各种实施例的***、方法和计算机程序产品的可能实现的体系架构、功能和操作。在这点上,流程图或框图中的每个方框可以代表一个模块、程序段或代码的一部分,所述模块、程序段或代码的一部分包含一个或多个用于实现规定的逻辑功能的可执行指令。也应当注意,在有些作为替换的实现中,方框中所标注的功能也可以以不同于附图中所标注的顺序发生。例如,两个接连地表示的方框实际上可以基本并行地执行,它们有时也可以按相反的顺序执行,这依所涉及的功能而定。也要注意的是,框图和/或流程图中的每个方框、以及框图和/或流程图中的方框的组合,可以用执行规定的功能或操作的专用的基于硬件的***来实现,或者可以用专用硬件与计算机指令的组合来实现。The flowcharts and block diagrams in the figures illustrate the architecture, functionality, and operations of possible implementations of systems, methods, and computer program products according to various embodiments of the present disclosure. In this regard, each block in the flowchart or block diagrams may represent a module, segment, or portion of code that contains one or more components for implementing the specified logical function(s). Executable instructions. It should also be noted that, in some alternative implementations, the functions noted in the block may occur out of the order noted in the figures. For example, two blocks shown one after another may actually execute substantially in parallel, or they may sometimes execute in the reverse order, depending on the functionality involved. It will also be noted that each block of the block diagram and/or flowchart illustration, and combinations of blocks in the block diagram and/or flowchart illustration, can be implemented by special purpose hardware-based systems that perform the specified functions or operations. , or can be implemented using a combination of specialized hardware and computer instructions.
描述于本公开实施例中所涉及到的单元或模块可以通过软件的方式实现,也可以通过可编程硬件的方式来实现。所描述的单元或模块也可以设置在处理器中,这些单元或模块的名称在某种情况下并不构成对该单元或模块本身的限定。The units or modules described in the embodiments of the present disclosure may be implemented in software or programmable hardware. The described units or modules may also be provided in the processor, and the names of these units or modules do not constitute a limitation on the units or modules themselves under certain circumstances.
作为另一方面,本公开还提供了一种计算机可读存储介质,该计算机可读存储介质可以是上述实施例中电子设备或计算机***中所包含的计算机可读存储介质;也可以是单独存在,未装配入设备中的计算机可读存储介质。计算机可读存储介质存储有一个或者一个以上程序,所述程序被一个或者一个以上的处理器用来执行描述于本公开的方法。As another aspect, the present disclosure also provides a computer-readable storage medium. The computer-readable storage medium may be the computer-readable storage medium included in the electronic device or computer system in the above embodiments; it may also exist independently. , a computer-readable storage medium that is not installed in the device. The computer-readable storage medium stores one or more programs, which are used by one or more processors to perform the methods described in the present disclosure.
以上描述仅为本公开的较佳实施例以及对所运用技术原理的说明。本领域技术人员应当理解,本公开中所涉及的发明范围,并不限于上述技术特征的特定组合而成的技术方案,同时也应涵盖在不脱离所述发明构思的情况下,由上述技术特征或其等同特征进行任意组合而形成的其它技术方案。例如上述特征与本公开中公开的(但不限于)具有类似功能的技术特征进行互相替换而形成的技术方案。The above description is only a description of the preferred embodiments of the present disclosure and the technical principles applied. Those skilled in the art should understand that the scope of the invention involved in the present disclosure is not limited to technical solutions formed by a specific combination of the above technical features, but should also cover any combination of the above technical features without departing from the concept of the invention. or other technical solutions formed by any combination of equivalent features. For example, a technical solution is formed by replacing the above features with technical features with similar functions disclosed in this disclosure (but not limited to).

Claims (30)

  1. 一种CMOS器件寿命预测方法,其特征在于,包括:A CMOS device life prediction method, which is characterized by including:
    获取CMOS器件在加速应力试验下电参数的时间序列样本数据集,所述时间序列样本数据集包括表征所述CMOS器件寿命的电参数退化量的时间序列样本数据;Obtaining a time series sample data set of electrical parameters of the CMOS device under accelerated stress testing, where the time series sample data set includes time series sample data representing the amount of electrical parameter degradation that characterizes the life of the CMOS device;
    基于所述时间序列样本数据集得到训练集;Obtain a training set based on the time series sample data set;
    用所述训练集训练时序模型,获得寿命预测模型;Use the training set to train a time series model to obtain a lifespan prediction model;
    用所述寿命预测模型预测所述CMOS器件的失效时间。The life prediction model is used to predict the failure time of the CMOS device.
  2. 根据权利要求1所述的CMOS器件寿命预测方法,其特征在于,还包括:The CMOS device life prediction method according to claim 1, further comprising:
    基于所述时间序列样本数据集得到测试集;Obtain a test set based on the time series sample data set;
    用所述测试集验证所述寿命预测模型得到验证的寿命预测模型,Use the test set to verify the life prediction model to obtain a verified life prediction model,
    其中,所述用所述寿命预测模型预测所述CMOS器件的失效时间,包括用验证的所述寿命预测模型预测所述CMOS器件的失效时间。Wherein, using the life prediction model to predict the failure time of the CMOS device includes using the verified life prediction model to predict the failure time of the CMOS device.
  3. 根据权利要求1或2所述的CMOS器件寿命预测方法,其特征在于,The CMOS device life prediction method according to claim 1 or 2, characterized in that:
    所述时序模型是长短期记忆模型。The timing model is a long short-term memory model.
  4. 根据权利要求3所述的CMOS器件寿命预测方法,其特征在于,The CMOS device life prediction method according to claim 3, characterized in that:
    所述长短期记忆模型具有1~5个隐藏层节点,以及1个全连接层节点。The long short-term memory model has 1 to 5 hidden layer nodes and 1 fully connected layer node.
  5. 根据权利要求1所述的CMOS器件寿命预测方法,其特征在于,The CMOS device life prediction method according to claim 1, characterized in that:
    表征所述CMOS器件寿命的电参数包括以下的至少一项:饱和漏电流、阈值电压、跨导;The electrical parameters characterizing the life of the CMOS device include at least one of the following: saturation leakage current, threshold voltage, and transconductance;
    所述时间序列样本数据集中的电参数退化量小于等于所述CMOS器件失效时的相应电参数退化量。The electrical parameter degradation amount in the time series sample data set is less than or equal to the corresponding electrical parameter degradation amount when the CMOS device fails.
  6. 根据权利要求5所述的CMOS器件寿命预测方法,其特征在于,The CMOS device life prediction method according to claim 5, characterized in that:
    所述时间序列样本数据集中的电参数退化量最大值为相应电参数的5%~7%。The maximum value of electrical parameter degradation in the time series sample data set is 5% to 7% of the corresponding electrical parameter.
  7. 根据权利要求5所述的CMOS器件寿命预测方法,其特征在于,The CMOS device life prediction method according to claim 5, characterized in that:
    所述时间序列样本数据集中的电参数退化量最大值为相应电参数的5%或6%或7%。The maximum value of the electrical parameter degradation in the time series sample data set is 5% or 6% or 7% of the corresponding electrical parameter.
  8. 根据权利要求1所述的CMOS器件寿命预测方法,其特征在于,还包括:The CMOS device life prediction method according to claim 1, further comprising:
    通过以下任意一种或多种方式对所述时间序列样本数据集进行预处理,得到处理后的时间序列样本数据集:Preprocess the time series sample data set in any one or more of the following ways to obtain a processed time series sample data set:
    对非等时间间隔的时间序列样本数据集进行等时间间隔的插值处理;Perform equal time interval interpolation processing on time series sample data sets with non-equal time intervals;
    对所述时间序列样本数据集进行差分化处理;Perform differential differentiation processing on the time series sample data set;
    对所述时间序列样本数据集进行归一化处理;Perform normalization processing on the time series sample data set;
    其中,当采用多种方式进行预处理时,将上一处理的输出作为下一处理的输入,依次进行所述多种方式的预处理,得到处理后的时间序列样本数据集。When preprocessing is performed in multiple ways, the output of the previous process is used as the input of the next process, and the preprocessing in the multiple ways is performed in sequence to obtain a processed time series sample data set.
  9. 根据权利要求3所述的CMOS器件寿命预测方法,其特征在于,The CMOS device life prediction method according to claim 3, characterized in that:
    所述用所述训练集训练时序模型,获得寿命预测模型包括:Using the training set to train a time series model and obtain a lifespan prediction model includes:
    将所述训练集中前一时刻的时间序列样本数据作为输入特征,将所述训练集中当前时刻的时间序列样本数据作为输出特征,对所述长短期记忆模型进行监督学习训练。The time series sample data at the previous moment in the training set is used as the input feature, and the time series sample data at the current moment in the training set is used as the output feature, and the long and short-term memory model is subjected to supervised learning training.
  10. 根据权利要求3所述的CMOS器件寿命预测方法,其特征在于,The CMOS device life prediction method according to claim 3, characterized in that:
    所述用所述训练集训练时序模型,获得寿命预测模型包括:Using the training set to train a time series model and obtain a lifespan prediction model includes:
    采用滑动时间窗方法将所述训练集中多个连续的时间序列样本数据作为输入特征,将所述训练集中所述滑动时间窗的后一时刻的时间序列样本数据作为输出特征,对所述长短期记忆模型进行监督学习训练。The sliding time window method is used to use multiple continuous time series sample data in the training set as input features, and the time series sample data at the next moment of the sliding time window in the training set is used as the output feature. Memory models are trained for supervised learning.
  11. 根据权利要求10所述的CMOS器件寿命预测方法,其特征在于,The CMOS device life prediction method according to claim 10, characterized in that:
    所述连续的时间序列样本数据数量是8~11个;或The number of continuous time series sample data is 8 to 11; or
    所述连续的时间序列样本数据数量是9个。The number of continuous time series sample data is 9.
  12. 根据权利要求3所述的CMOS器件寿命预测方法,其特征在于,The CMOS device life prediction method according to claim 3, characterized in that:
    所述用所述训练集训练时序模型,获得寿命预测模型还包括:The use of the training set to train the time series model and obtain the life prediction model also includes:
    用均方误差或者平均绝对百分比误差作为损失函数,用AdaGrad,RMSprop,Adam优化器中的至少一种优化模型参数,训练所述长短期记忆模型。Use the mean square error or the average absolute percentage error as the loss function, and use at least one of AdaGrad, RMSprop, and Adam optimizers to optimize model parameters to train the long short-term memory model.
  13. 根据权利要求12所述的CMOS器件寿命预测方法,其特征在于,The CMOS device life prediction method according to claim 12, characterized in that:
    所述用所述训练集训练时序模型,获得寿命预测模型还包括:The use of the training set to train the time series model and obtain the life prediction model also includes:
    对所述寿命预测模型进行多次迭代。The life prediction model is subjected to multiple iterations.
  14. 根据权利要求13所述的CMOS器件寿命预测方法,其特征在于,The CMOS device life prediction method according to claim 13, characterized in that:
    所述迭代的次数是1,000~10,000次。The number of iterations is 1,000 to 10,000.
  15. 一种CMOS器件寿命预测装置,其特征在于,包括:A CMOS device life prediction device, which is characterized by including:
    获取模块,被配置为获取CMOS器件在加速应力试验下电参数的时间序列样本数据集,所述时间序列样本数据集包括表征所述CMOS器件寿命的电参数退化量的时间序列样本数据;An acquisition module configured to acquire a time series sample data set of electrical parameters of the CMOS device under accelerated stress testing, where the time series sample data set includes time series sample data characterizing the electrical parameter degradation amount of the CMOS device life;
    第一分类模块,被配置为基于所述时间序列样本数据集得到训练集;A first classification module configured to obtain a training set based on the time series sample data set;
    训练模块,被配置为用所述训练集训练时序模型,获得寿命预测模型;A training module configured to train a time series model using the training set to obtain a lifespan prediction model;
    预测模块,被配置为用所述寿命预测模型预测所述CMOS器件的失效时间。A prediction module configured to predict the failure time of the CMOS device using the life prediction model.
  16. 根据权利要求15所述的CMOS器件寿命预测装置,其特征在于,还包括:The CMOS device life prediction device according to claim 15, further comprising:
    第二分类模块,被配置为基于所述时间序列样本数据集得到测试集;The second classification module is configured to obtain a test set based on the time series sample data set;
    验证模块,被配置为用所述测试集验证所述寿命预测模型得到验证的寿命预测模型,a verification module configured to verify the life prediction model using the test set to obtain the verified life prediction model,
    其中,所述预测模块还被配置为用验证的所述寿命预测模型预测所述CMOS器件的失效时间。Wherein, the prediction module is further configured to predict the failure time of the CMOS device using the verified life prediction model.
  17. 根据权利要求15或16所述的CMOS器件寿命预测装置,其特征在于,The CMOS device life prediction device according to claim 15 or 16, characterized in that:
    所述时序模型是长短期记忆模型。The timing model is a long short-term memory model.
  18. 根据权利要求17所述的CMOS器件寿命预测装置,其特征在于,The CMOS device life prediction device according to claim 17, characterized in that:
    所述长短期记忆模型具有1~5个隐藏层节点,以及1个全连接层节点。The long short-term memory model has 1 to 5 hidden layer nodes and 1 fully connected layer node.
  19. 根据权利要求15所述的CMOS器件寿命预测装置,其特征在于,The CMOS device life prediction device according to claim 15, characterized in that:
    表征所述CMOS器件寿命的电参数包括以下的至少一项:饱和漏电流、阈值电压、跨导;The electrical parameters characterizing the life of the CMOS device include at least one of the following: saturation leakage current, threshold voltage, and transconductance;
    所述时间序列样本数据集中的电参数退化量小于等于所述CMOS器件失效时的相应电参数退化量。The electrical parameter degradation amount in the time series sample data set is less than or equal to the corresponding electrical parameter degradation amount when the CMOS device fails.
  20. 根据权利要求19所述的CMOS器件寿命预测装置,其特征在于,The CMOS device life prediction device according to claim 19, characterized in that:
    所述时间序列样本数据集中的电参数退化量最大值为相应电参数的5%~7%。The maximum value of electrical parameter degradation in the time series sample data set is 5% to 7% of the corresponding electrical parameter.
  21. 根据权利要求19所述的CMOS器件寿命预测装置,其特征在于,The CMOS device life prediction device according to claim 19, characterized in that:
    所述时间序列样本数据集中的电参数退化量最大值为相应电参数的5%或6%或7%。The maximum value of the electrical parameter degradation in the time series sample data set is 5% or 6% or 7% of the corresponding electrical parameter.
  22. 根据权利要求15所述的CMOS器件寿命预测装置,其特征在于,还包括:The CMOS device life prediction device according to claim 15, further comprising:
    预处理模块,被配置为通过以下任意一种或多种方式对所述时间序列样本数据集进行预处理,得到处理后的时间序列样本数据集:The preprocessing module is configured to preprocess the time series sample data set through any one or more of the following methods to obtain a processed time series sample data set:
    对非等时间间隔的时间序列样本数据集进行等时间间隔的插值处理;Perform equal time interval interpolation processing on time series sample data sets with non-equal time intervals;
    对所述时间序列样本数据集进行差分化处理;Perform differential differentiation processing on the time series sample data set;
    对所述时间序列样本数据集进行归一化处理;Perform normalization processing on the time series sample data set;
    其中,当采用多种方式进行预处理时,将上一处理的输出作为下一处理的输入,依次进行所述多种方式的预处理,得到处理后的时间序列样本数据集。When preprocessing is performed in multiple ways, the output of the previous process is used as the input of the next process, and the preprocessing in the multiple ways is performed in sequence to obtain a processed time series sample data set.
  23. 根据权利要求17所述的CMOS器件寿命预测装置,其特征在于,所述训练模块包括:The CMOS device life prediction device according to claim 17, wherein the training module includes:
    监督学习模块,被配置为将所述训练集中前一时刻的时间序列样本数据作为输入特征,将所述训练集中当前时刻的时间序列样本数据作为输出特征,对所述长短期记忆模型进行监督学习训练。A supervised learning module configured to use the time series sample data at the previous moment in the training set as input features, use the time series sample data at the current moment in the training set as output features, and perform supervised learning on the long short-term memory model. train.
  24. 根据权利要求17所述的CMOS器件寿命预测装置,其特征在于,所述训练模块包括:The CMOS device life prediction device according to claim 17, wherein the training module includes:
    监督学习模块,被配置为采用滑动时间窗方法将所述训练集中多个连续的时间序列样本数据作为输入特征,将所述训练集中所述滑动时间窗的后一时刻的时间序列样本数据作为输出特征,对所述长短期记忆模型进行监督学习训练。A supervised learning module configured to use the sliding time window method to use multiple continuous time series sample data in the training set as input features, and use the time series sample data at the next moment of the sliding time window in the training set as output Features, perform supervised learning training on the long short-term memory model.
  25. 根据权利要求24所述的CMOS器件寿命预测装置,其特征在于,The CMOS device life prediction device according to claim 24, characterized in that:
    所述连续的时间序列样本数据数量是8~11个;或The number of continuous time series sample data is 8 to 11; or
    所述连续的时间序列样本数据数量是9个。The number of continuous time series sample data is 9.
  26. 根据权利要求17所述的CMOS器件寿命预测装置,其特征在于,所述训练模块还包括:The CMOS device life prediction device according to claim 17, wherein the training module further includes:
    优化模块,被配置为用均方误差或者平均绝对百分比误差作为损失函数,用AdaGrad,RMSprop,Adam优化器中的至少一种优化模型参数,训练所述长短期记忆模型。The optimization module is configured to use the mean square error or the average absolute percentage error as the loss function, and use at least one of AdaGrad, RMSprop, and Adam optimizers to optimize model parameters to train the long short-term memory model.
  27. 根据权利要求26所述的CMOS器件寿命预测装置,其特征在于,The CMOS device life prediction device according to claim 26, characterized in that:
    所述训练模块还包括:The training module also includes:
    迭代模块,被配置为对所述寿命预测模型进行多次迭代。An iteration module configured to iterate the life prediction model multiple times.
  28. 根据权利要求27所述的CMOS器件寿命预测装置,其特征在于,The CMOS device life prediction device according to claim 27, characterized in that:
    所述迭代模块的迭代的次数是1,000~10,000次。The number of iterations of the iteration module is 1,000 to 10,000 times.
  29. 一种电子设备,包括存储器和处理器;其中,所述存储器用于存储一条或多条计算机指令,其中,所述一条或多条计算机指令被所述处理器执行以实现权利要求1~14任一项所述的方法步骤。An electronic device, including a memory and a processor; wherein the memory is used to store one or more computer instructions, wherein the one or more computer instructions are executed by the processor to implement any of claims 1 to 14 Method steps described in one item.
  30. 一种可读存储介质,其上存储有计算机指令,该计算机指令被处理器执行时实现权利要求1~14任一项所述的方法步骤。A readable storage medium on which computer instructions are stored, which implement the method steps described in any one of claims 1 to 14 when executed by a processor.
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