WO2024036800A1 - Anti-backflow circuit started by using full-bridge synchronous rectification, and electronic device - Google Patents

Anti-backflow circuit started by using full-bridge synchronous rectification, and electronic device Download PDF

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Publication number
WO2024036800A1
WO2024036800A1 PCT/CN2022/133267 CN2022133267W WO2024036800A1 WO 2024036800 A1 WO2024036800 A1 WO 2024036800A1 CN 2022133267 W CN2022133267 W CN 2022133267W WO 2024036800 A1 WO2024036800 A1 WO 2024036800A1
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sub
circuit
voltage
rectifier
backflow
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PCT/CN2022/133267
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French (fr)
Chinese (zh)
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张亮
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深圳英集芯科技股份有限公司
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    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00—Details of apparatus for conversion
    • H02M1/32—Means for protecting converters other than automatic disconnection
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02J—CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
    • H02J50/00—Circuit arrangements or systems for wireless supply or distribution of electric power
    • H02J50/10—Circuit arrangements or systems for wireless supply or distribution of electric power using inductive coupling
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02J—CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
    • H02J7/00—Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries
    • H02J7/0029—Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries with safety or protection devices or circuits
    • H02J7/0034—Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries with safety or protection devices or circuits using reverse polarity correcting or protecting circuits
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00—Details of apparatus for conversion
    • H02M1/0048—Circuits or arrangements for reducing losses
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M7/00—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
    • H02M7/02—Conversion of ac power input into dc power output without possibility of reversal
    • H02M7/04—Conversion of ac power input into dc power output without possibility of reversal by static converters
    • H02M7/12—Conversion of ac power input into dc power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M7/21—Conversion of ac power input into dc power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
    • H02M7/217—Conversion of ac power input into dc power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only
    • H02M7/219—Conversion of ac power input into dc power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only in a bridge configuration
    • H02M7/2195—Conversion of ac power input into dc power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only in a bridge configuration the switches being synchronously commutated at the same frequency of the AC input voltage
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02J—CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
    • H02J2207/00—Indexing scheme relating to details of circuit arrangements for charging or depolarising batteries or for supplying loads from batteries
    • H02J2207/20—Charging or discharging characterised by the power electronics converter
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02B—CLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
    • Y02B70/00—Technologies for an efficient end-user side electric power management and consumption
    • Y02B70/10—Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes

Definitions

  • the invention relates to the field of electronic equipment, and in particular to an anti-backflow circuit using full-bridge synchronous rectification and electronic equipment.
  • full-bridge rectifiers In the field of switching power supplies, full-bridge rectifiers are widely used, such as half-bridge push-pull converters, full-bridge push-pull converters, wireless charging receivers, etc.
  • the traditional method of full-bridge rectification is to use four diodes, and use the unidirectional conductivity of the diodes to achieve rectification of sinusoidal signals.
  • This rectification method has a simple structure and does not require additional control circuits. It is very suitable for low-power applications. However, as the power increases, the current through the diodes becomes larger and larger.
  • the full-bridge rectification method of four diodes cannot meet the power increase. requirements.
  • the full-bridge synchronous rectification method uses four switching tubes instead of diodes. Since the on-resistance of the switching tubes can be very low, even when a large current is passed, the voltage drop at both ends can be very small, and the efficiency will be greatly improved. However, the full-bridge synchronous rectification method may cause the synchronous rectification to enter an abnormal working state (for example, the switch tube is misdirected, that is, the current flows back), which causes the circuit to fail to start normally and affects the charging efficiency of the switching power supply.
  • an abnormal working state for example, the switch tube is misdirected, that is, the current flows back
  • Embodiments of the present invention provide an anti-backflow circuit and electronic equipment using full-bridge synchronous rectification, which can prevent current backflow and thereby improve the charging efficiency of the switching power supply.
  • an embodiment of the present invention provides a full-bridge synchronous rectification start-up anti-backflow circuit.
  • the circuit includes: four rectifier sub-modules, and the four rectifier sub-modules are respectively connected to a voltage output terminal and two voltage input terminals, wherein , two rectifier sub-modules are connected to the first voltage input terminal, and the other two rectifier sub-modules are connected to the second voltage input terminal.
  • Each rectifier sub-module includes: an anti-backflow sub-circuit and a rectifier tube, where,
  • the input port of the anti-backflow sub-circuit of the two rectifier sub-modules is connected to the first voltage input terminal, the control port of the anti-backflow sub-circuit is connected to the gate of the rectifier, the drain of the rectifier is connected to the voltage output terminal Vo; the source of the rectifier Connect the second voltage input terminal;
  • the input ports of the anti-backflow sub-circuit of the other two rectifier sub-modules are connected to the second voltage input terminal, the control port of the anti-backflow sub-circuit is connected to the gate of the rectifier, the drain of the rectifier is connected to the voltage output terminal Vo; the source of the rectifier The pole is connected to the first voltage input terminal.
  • an electronic device in a second aspect, includes the anti-backflow circuit using full-bridge synchronous rectification startup provided in the first aspect.
  • the application of the full-bridge synchronous rectification startup anti-backflow circuit in the embodiment of the present application can avoid current backflow, improve the charging efficiency of the switching circuit, and reduce the power consumption of charging.
  • Figure 1 is a schematic diagram of the full-bridge rectifier circuit principle diagram
  • Figure 2 is the schematic diagram of the full-bridge synchronous rectification circuit
  • Figure 3 is the schematic diagram of current backflow after SR1 and SR2 are misdirected in full-bridge synchronous rectification
  • Figure 4 shows the current backflow waveform after SR1 and SR2 are misdirected in full-bridge synchronous rectification
  • Figure 5 is a schematic diagram of the full-bridge synchronous rectification startup anti-backflow circuit provided by this application.
  • Figure 6 is a schematic waveform diagram of the full-bridge synchronous rectification startup anti-backflow circuit provided by this application.
  • an embodiment means that a particular feature, result or characteristic described in connection with the embodiment can be included in at least one embodiment of the invention.
  • the appearances of this phrase in various places in the specification are not necessarily all referring to the same embodiment, nor are separate or alternative embodiments mutually exclusive of other embodiments. Those skilled in the art understand, both explicitly and implicitly, that the embodiments described herein may be combined with other embodiments.
  • FIG. 1 is the schematic diagram of the full-bridge rectification in the wireless charging receiver.
  • L is the receiving inductor
  • C1 is the series compensation capacitor
  • D1 ⁇ D4 constitute the full-bridge rectifier
  • Co is the output capacitor
  • RL is the load.
  • FIG. 2 is a schematic diagram of full-bridge synchronous rectification.
  • SR1 to SR4 are synchronous rectifier tubes, which are used to replace the diodes D1 to D4 in Figure 1. Due to the small on-resistance and area considerations, most synchronous rectifier tubes are used NMOS power tube is used; Driver is its driving circuit, used to drive the synchronous rectifier and turn on and off; Rg1 ⁇ Rg4 are the synchronous rectifier gate pull-down resistors, used to discharge the synchronous rectifier gate when the gate is floating Floating; DRV1 ⁇ DRV4 are logic signals, providing logic control functions for the drive circuit; since SR1 and SR4 are NMOS tubes, the drive voltage needs to be boosted relative to AC1 and AC2, and D5 and C2 form a boost circuit relative to AC1 , when AC1 voltage is low, VCC charges BST1 through D5, the capacitance at both ends of the capacitor is approximately VCC-VD5, VD5 is the turn-on voltage
  • V GS_SR1 ⁇ V(1-exp -t/ ⁇ )
  • R g1 determines the discharge capacity of the SR1 gate voltage.
  • V GS_SR1 When the size of SR1 remains unchanged, R g1 determines the discharge capacity of the SR1 gate voltage.
  • V GS_SR1 When the size of SR1 remains unchanged, R g1 determines the discharge capacity of the SR1 gate voltage.
  • V GS_SR1 When the size of SR1 remains unchanged, R g1 determines the discharge capacity of the SR1 gate voltage.
  • V GS_SR1 is closer to 0, and SR1 will not be turned on by mistake.
  • SR1 after the startup is completed, SR1 will also draw current from R g1 when it is turned on normally. Therefore, the smaller R g1 means the greater the power consumption.
  • R g1 In order to meet the power consumption requirements, R g1 generally cannot be made smaller; when R g1 When the value is larger, V GS_SR1 becomes larger, which may cause SR1 to be turned on by mistake, causing the synchronous
  • Vd represents the voltage drop of the SR1 ⁇ SR4 body diodes.
  • I1 inductor current
  • the AC2 voltage rises rapidly from -Vd to Vd
  • the SR2 gate-source voltage Vgs (SR2) drops from Vd to 0.
  • SR2 turns off and the body diode freewheels.
  • the AC1 voltage rapidly rises from Vd. drops to -Vd
  • the SR1 gate-source voltage Vgs(SR1) rises from 0 to Vd.
  • SR1 is turned on, and the current returns from it to C1. Since Rg1 is large, Vgs(SR1) drops very slowly, so during this process SR1 is always on; when the inductor current such as I2 flows, the AC1 voltage rises rapidly from -Vd to Vd, and the SR1 gate-source voltage Vgs (SR1) drops from Vd to 0. At this time, SR1 is turned off, and the body diode freewheels. , at the same time, the AC2 voltage drops rapidly from Vd to -Vd, and the SR2 gate-source voltage Vgs(SR2) rises from 0 to Vd. At this time, SR2 is turned on by mistake, and the current returns from it to L.
  • the circuit includes: four rectifier sub-modules.
  • the four rectifier sub-modules are respectively connected to the voltage output terminal and the two voltage input terminals.
  • the two rectifier sub-modules Connect the first voltage input terminal, and the other two rectifier sub-modules are connected to the second voltage input terminal.
  • Each rectifier sub-module includes: anti-backflow sub-circuit and rectifier tube, wherein,
  • the input port of the anti-backflow sub-circuit of the two rectifier sub-modules is connected to the first voltage input terminal, the control port of the anti-backflow sub-circuit is connected to the gate of the rectifier, the drain of the rectifier is connected to the voltage output terminal Vo; the source of the rectifier Connect the second voltage input terminal;
  • the input ports of the anti-backflow sub-circuit of the other two rectifier sub-modules are connected to the second voltage input terminal, the control port of the anti-backflow sub-circuit is connected to the gate of the rectifier, the drain of the rectifier is connected to the voltage output terminal Vo; the source of the rectifier The pole is connected to the first voltage input terminal.
  • the anti-backflow sub-circuit includes: resistors, capacitors, comparators, drive units and transistors; wherein,
  • the anode of the first diode is connected to the voltage source VCC, the cathode of the first diode is connected to a comparison terminal of the driving unit, the other comparison terminal of the driving unit is connected to the second voltage input terminal, and the output terminal of the driving unit is the anti-backfill subcircuit.
  • the control port, the input end of the drive unit is connected to the drive logic signal;
  • the forward input terminal of the comparator is connected to the cathode of the first diode, the reverse input terminal of the comparator is connected to the reference voltage, the output terminal of the comparator is connected to the gate of the first triode, and the source of the first triode is connected to On the other voltage input terminal, the drain of the first triode is connected to the gate of the second triode, the source of the second triode is connected to the other voltage input terminal, and the drain of the second triode is connected to the driving unit. the output terminal;
  • a voltage input end is connected to one end of the first resistor, the other end of the first resistor is connected to the anode of the second diode, and the cathode of the second diode is connected to the output end of the driving unit, the gate of the second diode and the third diode.
  • One end of the second capacitor and the other end of the second capacitor are connected to another voltage input end;
  • One end of the first capacitor is connected to the cathode of the first capacitor, the other end of the first capacitor is connected to another voltage input end, one end of the second resistor drives the output end of the unit, and the other end of the second resistor is connected to another voltage input end;
  • the output terminal of the comparator is connected to one input terminal of the AND gate circuit, and the other input terminal of the AND gate circuit is connected to the output terminal of the comparator of the opposite rectifier sub-module.
  • the output terminal of the AND gate controls the first and third terminals of the two rectifier sub-modules. Is the tube working?
  • the second voltage input terminal can be AC2; if the first voltage input terminal can be AC2, then the second voltage input terminal can be AC1.
  • the anti-backfill sub-circuit further includes: a third diode, the anode of the third diode is connected to another voltage input terminal, and the cathode of the third diode is connected to the gate of the second transistor.
  • FIG. 5 is a schematic diagram of the full-bridge synchronous rectification startup anti-backflow circuit provided by this application.
  • SR1 and SR2 are synchronous rectifiers, R g1 and R g2 are their gate pull-down resistors respectively, with larger values; diode D5 and capacitor C2 form a charge pump circuit based on AC1, and diode D6 and capacitor C3 form a charge pump circuit based on AC2
  • the charge pump circuit is used to generate driving voltages BST1 and BST2 with a voltage difference of approximately VCC relative to AC1 and AC2 respectively;
  • DRV1 and DRV2 are the driving logic signals of SR1 and SR2 respectively, and control the opening of SR1 and SR2 after passing through the driving unit Driver.
  • Vth1 and Vth2 are the reference voltages
  • CMP1 is used to determine whether the voltage difference between BST1 and AC1 exceeds the reference voltage Vth1
  • CMP2 is used to determine whether the voltage difference between BST2 and AC2 exceeds the reference voltage Vth2
  • their outputs BST1OK and BST2OK pass the AND gate
  • the start-up completion signal BSTOK is generated after AN1.
  • SR1 ⁇ SR4 need to be turned off and their body diodes work.
  • SR1 ⁇ SR4 need to be normal.
  • R1, D7, MN1, C4, D9, and MN2 constitute the dynamic gate pull-down circuit of SR1, in which MN2 is the pull-down switch tube, and its switching characteristics are used as the gate of the synchronous rectifier SR1.
  • pull-down tube; R1 is used for current limiting, with a larger value;
  • Schottky diode D7 is used for the one-way flow of current, only allowing AC2 to charge C4, blocking the flow of current from C4 to AC2, and C4 is the voltage stabilizing capacitor.
  • R2, D8, MN3, C5, D10, and MN4 constitute the dynamic gate pull-down circuit of SR2, in which MN3 is the pull-down switch tube, and its switching characteristics are used as the gate pull-down tube of the synchronous rectifier SR2;
  • R2 is used Current limiting, with a larger value;
  • Schottky diode D8 is used for one-way flow of current, only allowing AC1 to charge C5, blocking the flow of current from C5 to AC1,
  • C5 is a voltage stabilizing capacitor, and does not charge when AC1 is lower than AC2 , can also stabilize the gate voltage of MN4;
  • D10 is a voltage stabilizing diode, which can clamp the gate voltage of MN4 below a safe value to prevent excessive voltage from damaging MN4;
  • Vd be the conduction voltage of the body diode of SR1 ⁇ SR4
  • Vs be the forward voltage drop of the Schottky diode, assuming that the current flow in the first half cycle causes the body diode of SR2 to turn on, then AC2 changes from 0 to Vd, and AC1 changes from 0 becomes -Vd, and the voltage difference between AC2 and AC1 is 2Vd, then the charging voltage of capacitor C4 is 2Vd-Vs.
  • BST1 and BST2 can be charged through D5 and D6 respectively.
  • the voltages of BST1 and BST2 will gradually increase, and the voltage difference between AC2 and AC1 will also gradually increase. Therefore, the gate-source voltage Vgs of MN2 and MN4 (MN2 ) and Vgs (MN4) will also gradually increase until the voltage regulator tubes D9 and D10 are triggered and clamped to a certain value.
  • the voltage difference between BST1 and AC1 exceeds the threshold voltage Vth1
  • BST1OK changes from low to high
  • MN1 turns on and pulls the gate voltage of MN2 down to the AC1 potential, that is, MN2 is turned off
  • the voltage between BST2 and AC2 exceeds the threshold voltage Vth2
  • BST2OK changes from low to high
  • MN3 is turned on and pulls the gate voltage of MN4 down to the AC2 potential, that is, MN4 is turned off
  • BST1OK and BST2OK are high and BSTOK will also become high after passing the AND gate AN1, entering synchronization
  • the drive circuit can work normally at this time. Since MN1 and MN2 are turned off, the synchronous rectification working state will not increase power consumption.
  • FIG. 6 is a waveform diagram of the current provided by this application.
  • AC1 and AC2 are both 0 initially.
  • the current flow in the first half cycle causes the voltage of AC1 to change from 0 to -Vd, and the voltage of AC2 changes from 0 to Vd. Therefore, the gate-source voltage Vgs (MN2) of MN2 quickly rises to 2Vd- Vs, pull down the SR1 gate to AC1. Since Vgs (MN2) has a small rise time, Vgs (SR1) will have a small glitch voltage as shown in the waveform, but the time is very short and the backwash current is very small.
  • Vgs (MN4) has a small rise time
  • Vgs (SR2) will have a small glitch voltage as shown in the waveform, but the time is very short, the backwash current is very small, and most of the current flows in In the output Vo, the VCC voltage will continue to rise.
  • Vd+Vo the high potentials of AC1 and AC2 will also rise, which can be expressed as Vd+Vo. Therefore, Vgs(MN2) and Vgs(MN4) will also rise with Vo, which can be expressed as 2Vd+Vo-Vs. This value continues to fully conduct MN2 and MN4, and SR1 and SR2 remain turned off.
  • Vgs (MN2) and Vgs (MN4) will be in the off state, and Vgs ( SR1) and Vgs (SR2) are in a switching state, controlling the on and off of SR1 and SR2.
  • This application also provides an electronic device, which includes an anti-backflow circuit using full-bridge synchronous rectification as shown in Figure 5 .
  • the disclosed device can be implemented in other ways.
  • the device embodiments described above are only illustrative.
  • the division of the units is only a logical function division. In actual implementation, there may be other division methods.
  • multiple units or components may be combined or may be Integrated into another system, or some features can be ignored, or not implemented.
  • the coupling or direct coupling or communication connection between each other shown or discussed may be through some interfaces, and the indirect coupling or communication connection of the devices or units may be in electrical or other forms.

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  • Power Engineering (AREA)
  • Computer Networks & Wireless Communication (AREA)
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  • Dc-Dc Converters (AREA)

Abstract

Provided in the present application are an anti-backflow circuit started by using full-bridge synchronous rectification, and an electronic device. The circuit comprises: four rectification sub-modules, the four rectification sub-modules being respectively connected to a voltage output end and two voltage input ends, wherein two rectification sub-modules are connected to a first voltage input end, and the other two rectification sub-modules are connected to a second voltage input end. Each rectification sub-module comprises: an anti-backflow sub-circuit and a rectifying transistor. With respect to two rectification sub-modules, input ports of the anti-backflow sub-circuits are connected to the first voltage input end, control ports of the anti-backflow sub-circuits are connected to the gates of the rectifying transistors, and the drains of the rectifying transistors are connected to the voltage output end. The technical solution provided in the present application has the advantage of high charging efficiency.

Description

应用全桥同步整流启动防倒灌电路及电子设备Application of full-bridge synchronous rectification to start anti-backflow circuits and electronic equipment
本申请要求于2022年8月18日提交中国专利局、申请号为2022109898202、申请名称为“应用全桥同步整流启动防倒灌电路及电子设备”的中国专利申请的优先权，其全部内容通过引用结合在本申请中。This application claims priority to the Chinese patent application submitted to the China Patent Office on August 18, 2022, with application number 2022109898202 and the application name "Application of full-bridge synchronous rectification to start anti-backflow circuit and electronic equipment", the entire content of which is incorporated by reference incorporated in this application.
技术领域Technical field
本发明涉及电子设备领域，具体涉及一种应用全桥同步整流启动防倒灌电路及电子设备。The invention relates to the field of electronic equipment, and in particular to an anti-backflow circuit using full-bridge synchronous rectification and electronic equipment.
背景技术Background technique
在开关电源领域，全桥整流器的应用非常广泛，如半桥推挽式变换器、全桥推挽式变换器、无线充电接收器等。全桥整流的传统方式是用四个二极管构成，利用二极管的单向导通性实现对正弦信号的整流。这种整流方式结构简单，不需要额外的控制电路，非常适用于小功率应用中，然而随着功率的提升，通过二极管的电流越来越大，四个二极管的全桥整流方式无法满足功率提升的要求。In the field of switching power supplies, full-bridge rectifiers are widely used, such as half-bridge push-pull converters, full-bridge push-pull converters, wireless charging receivers, etc. The traditional method of full-bridge rectification is to use four diodes, and use the unidirectional conductivity of the diodes to achieve rectification of sinusoidal signals. This rectification method has a simple structure and does not require additional control circuits. It is very suitable for low-power applications. However, as the power increases, the current through the diodes becomes larger and larger. The full-bridge rectification method of four diodes cannot meet the power increase. requirements.
全桥同步整流方式就是用四个开关管代替二极管，由于开关管的导通阻抗可以做到很低，因此即使是通过大电流时，两端的压降也可以很小，效率会有极大的提升，但是全桥同步整流方式可能引起同步整流进入异常工作状态(例如开关管误导通，即电流倒灌)，这样导致电路无法正常启动，影响了开关电源的充电效率。The full-bridge synchronous rectification method uses four switching tubes instead of diodes. Since the on-resistance of the switching tubes can be very low, even when a large current is passed, the voltage drop at both ends can be very small, and the efficiency will be greatly improved. However, the full-bridge synchronous rectification method may cause the synchronous rectification to enter an abnormal working state (for example, the switch tube is misdirected, that is, the current flows back), which causes the circuit to fail to start normally and affects the charging efficiency of the switching power supply.
发明内容Contents of the invention
本发明实施例提供了一种应用全桥同步整流启动防倒灌电路及电子设备，可以防止电流倒灌，进而提高开关电源的充电效率。Embodiments of the present invention provide an anti-backflow circuit and electronic equipment using full-bridge synchronous rectification, which can prevent current backflow and thereby improve the charging efficiency of the switching power supply.
第一方面，本发明实施例提供一种应用全桥同步整流启动防倒灌电路，所述电路包括：四个整流子模块，四个整流子模块分别连接电压输出端以及两个电压输入端，其中，两个整流子模块连接第一电压输入端，另两个整流子模块连接第二电压输入端，每个整流子模块包括：防倒灌子电路和整流管，其中，In a first aspect, an embodiment of the present invention provides a full-bridge synchronous rectification start-up anti-backflow circuit. The circuit includes: four rectifier sub-modules, and the four rectifier sub-modules are respectively connected to a voltage output terminal and two voltage input terminals, wherein , two rectifier sub-modules are connected to the first voltage input terminal, and the other two rectifier sub-modules are connected to the second voltage input terminal. Each rectifier sub-module includes: an anti-backflow sub-circuit and a rectifier tube, where,
两个整流子模块的防倒灌子电路的输入端口连接第一电压输入端，防倒灌子电路的控制端口连接整流管的栅极，整流管的漏极连接电压输出端Vo；整流管的源极连接第二电压输入端；The input port of the anti-backflow sub-circuit of the two rectifier sub-modules is connected to the first voltage input terminal, the control port of the anti-backflow sub-circuit is connected to the gate of the rectifier, the drain of the rectifier is connected to the voltage output terminal Vo; the source of the rectifier Connect the second voltage input terminal;
另两个整流子模块的防倒灌子电路的输入端口连接第二电压输入端，防倒灌子电路的控制端口连接整流管的栅极，整流管的漏极连接电压输出端Vo；整流管的源极连接第一电压输入端。The input ports of the anti-backflow sub-circuit of the other two rectifier sub-modules are connected to the second voltage input terminal, the control port of the anti-backflow sub-circuit is connected to the gate of the rectifier, the drain of the rectifier is connected to the voltage output terminal Vo; the source of the rectifier The pole is connected to the first voltage input terminal.
第二方面，提供一种电子设备，所述电子设备包括第一方面提供的应用全桥同步整流启动防倒灌电路。In a second aspect, an electronic device is provided. The electronic device includes the anti-backflow circuit using full-bridge synchronous rectification startup provided in the first aspect.
实施本发明实施例，具有如下有益效果：Implementing the embodiments of the present invention has the following beneficial effects:
可以看出，本申请实施例的应用全桥同步整流启动防倒灌电路能够避免电流倒灌，提高开关电路的充电效率，降低充电的功耗。It can be seen that the application of the full-bridge synchronous rectification startup anti-backflow circuit in the embodiment of the present application can avoid current backflow, improve the charging efficiency of the switching circuit, and reduce the power consumption of charging.
附图说明Description of drawings
为了更清楚地说明本发明实施例中的技术方案，下面将对实施例描述中所需要使用的附图作简单地介绍，显而易见地，下面描述中的附图是本发明的一些实施例，对于本领域普通技术人员来讲，在不付出创造性劳动的前提下，还可以根据这些附图获得其他的附图。In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the drawings needed to be used in the description of the embodiments will be briefly introduced below. Obviously, the drawings in the following description are some embodiments of the present invention. Those of ordinary skill in the art can also obtain other drawings based on these drawings without exerting creative efforts.
图1为全桥整流电路原理图示意图；Figure 1 is a schematic diagram of the full-bridge rectifier circuit principle diagram;
图2为全桥同步整流电路原理图；Figure 2 is the schematic diagram of the full-bridge synchronous rectification circuit;
图3为全桥同步整流中SR1与SR2误导通后电流反灌原理图；Figure 3 is the schematic diagram of current backflow after SR1 and SR2 are misdirected in full-bridge synchronous rectification;
图4为全桥同步整流中SR1与SR2误导通后电流反灌波形图；Figure 4 shows the current backflow waveform after SR1 and SR2 are misdirected in full-bridge synchronous rectification;
图5是本申请提供的应用全桥同步整流启动防倒灌电路的示意图；Figure 5 is a schematic diagram of the full-bridge synchronous rectification startup anti-backflow circuit provided by this application;
图6是本申请提供的应用全桥同步整流启动防倒灌电路的波形示意图。Figure 6 is a schematic waveform diagram of the full-bridge synchronous rectification startup anti-backflow circuit provided by this application.
具体实施方式Detailed ways
下面将结合本发明实施例中的附图，对本发明实施例中的技术方案进行清楚、完整地描述，显然，所描述的实施例是本发明一部分实施例，而不是全部的实施例。基于本发明中的实施例，本领域普通技术人员在没有作出创造性劳动前提下所获得的所有其他实施例，都属于本发明保护的范围。The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are part of the embodiments of the present invention, not all of them. Based on the embodiments of the present invention, all other embodiments obtained by those of ordinary skill in the art without making creative efforts fall within the scope of protection of the present invention.
本发明的说明书和权利要求书及所述附图中的术语“第一”、“第二”、“第三”和“第四”等是用于区别不同对象，而不是用于描述特定顺序。此外，术语“包括”和“具有”以及它们任何变形，意图在于覆盖不排他的包含。例如包含了一系列步骤或单元的过程、方法、***、产品或设备没有限定于已列出的步骤或单元，而是可选地还包括没有列出的步骤或单元，或可选地还包括对于这些过程、方法、产品或设备固有的其它步骤或单元。The terms "first", "second", "third" and "fourth" in the description, claims and drawings of the present invention are used to distinguish different objects, rather than describing a specific sequence. . Furthermore, the terms "including" and "having" and any variations thereof are intended to cover non-exclusive inclusion. For example, a process, method, system, product or device that includes a series of steps or units is not limited to the listed steps or units, but optionally also includes steps or units that are not listed, or optionally also includes Other steps or units inherent to such processes, methods, products or devices.
在本文中提及“实施例”意味着，结合实施例描述的特定特征、结果或特性可以包含在本发明的至少一个实施例中。在说明书中的各个位置出现该短语并不一定均是指相同的实施例，也不是与其它实施例互斥的独立的或备选的实施例。本领域技术人员显式地和隐式地理解的是，本文所描述的实施例可以与其它实施例相结合。Reference herein to "an embodiment" means that a particular feature, result or characteristic described in connection with the embodiment can be included in at least one embodiment of the invention. The appearances of this phrase in various places in the specification are not necessarily all referring to the same embodiment, nor are separate or alternative embodiments mutually exclusive of other embodiments. Those skilled in the art understand, both explicitly and implicitly, that the embodiments described herein may be combined with other embodiments.
参阅图1，图1为无线充电接收器中全桥整流的原理图，L为接收电感，C1为串联补偿电容，D1～D4构成全桥整流，Co为输出电容，RL为负载。当输入信号为正弦波正半边时，AC1为正，AC2为负，D1与D4导通，D2与D3截止，电流通过D1与D4传输到输出Vout；当输入信号为正弦波负半边时，AC1为负，AC2为正，D2与D3导通，D1与D4截止，电流通过D2与D3传输到输出Vout，从而实现了对输入信号全范围的整流功能。Refer to Figure 1, which is the schematic diagram of the full-bridge rectification in the wireless charging receiver. L is the receiving inductor, C1 is the series compensation capacitor, D1~D4 constitute the full-bridge rectifier, Co is the output capacitor, and RL is the load. When the input signal is the positive half of the sine wave, AC1 is positive, AC2 is negative, D1 and D4 are on, D2 and D3 are off, and the current is transmitted to the output Vout through D1 and D4; when the input signal is the negative half of the sine wave, AC1 is negative, AC2 is positive, D2 and D3 are turned on, D1 and D4 are turned off, and the current is transmitted to the output Vout through D2 and D3, thus realizing the full range rectification function of the input signal.
图2为全桥同步整流原理图，图中SR1～SR4为同步整流管，用于取代图1中D1～D4的二极管，由于很小的导通电阻并且兼顾面积的考虑，因此同步整流管大多采用NMOS功率管；Driver为其驱动电路，用 以驱动同步整流管和开启与关断；R g1～R g4为同步整流管栅极下拉电阻，用以泄放同步整流管栅极浮空时的浮电；DRV1～DRV4为逻辑信号，为驱动电路提供逻辑控制功能；由于SR1与SR4为NMOS管，因此驱动电压需要相对于AC1与AC2进行升压，D5、C2构成相对于AC1的升压电路，当AC1电压为低时，VCC通过D5为BST1充电，电容两端电容约为VCC-VD5，VD5为二极管的开启电压，当AC1为高，BST1的电容相应升高，由于电容两端的电压不会突变，因而BST1-AC1的电压仍然保持为VCC；D6、C3构成相对于AC2的升压电路，其原理与AC1的升压电路一样。LDO电路用于产生驱动电路的电源电压VCC，Cm为LDO的输出电容。 Figure 2 is a schematic diagram of full-bridge synchronous rectification. In the figure, SR1 to SR4 are synchronous rectifier tubes, which are used to replace the diodes D1 to D4 in Figure 1. Due to the small on-resistance and area considerations, most synchronous rectifier tubes are used NMOS power tube is used; Driver is its driving circuit, used to drive the synchronous rectifier and turn on and off; Rg1 ~ Rg4 are the synchronous rectifier gate pull-down resistors, used to discharge the synchronous rectifier gate when the gate is floating Floating; DRV1 ~ DRV4 are logic signals, providing logic control functions for the drive circuit; since SR1 and SR4 are NMOS tubes, the drive voltage needs to be boosted relative to AC1 and AC2, and D5 and C2 form a boost circuit relative to AC1 , when AC1 voltage is low, VCC charges BST1 through D5, the capacitance at both ends of the capacitor is approximately VCC-VD5, VD5 is the turn-on voltage of the diode, when AC1 is high, the capacitance of BST1 increases accordingly, because the voltage across the capacitor is not will mutate, so the voltage of BST1-AC1 still remains at VCC; D6 and C3 form a boost circuit relative to AC2, and its principle is the same as the boost circuit of AC1. The LDO circuit is used to generate the power supply voltage VCC of the drive circuit, and Cm is the output capacitance of the LDO.
当电路启动时，Vo与VCC的电压均为0，SR1～SR4驱动电路均无法开启，因而由其体二极管续流工作，由于Co一般较大，Vo与VCC上升速度很慢，SR1～SR4的驱动电路将会有很长一段时间内无法工作，在此过程中，SR1与SR2的栅电压下拉能力由电阻Rg1与Rg2决定。我们以SR1及其驱动电路为例，分析同步整流启动过程中可能出现的问题。如图3所示，C g为SR1的栅极等效寄生电容，启动过程中，由于VCC电压很低，BST1与AC1的压差很小，Driver电路无法正常工作。当AC1电压迅速升高时，SR1的体二极导通，并且由于SR1的栅极初始为0，即使AC1通过R g1为SR1的栅极充电，也无法导通SR1，因而SR1会一直处于关断状态。当AC1电压迅速降低时，SR1的栅极电压会跟随降低，假定AC1的变化为ΔV，那么SR1的栅源电压为： When the circuit starts, the voltages of Vo and VCC are both 0, and the SR1 ~ SR4 drive circuits cannot be turned on, so their body diodes work as freewheelers. Since Co is generally large, the rise speed of Vo and VCC is very slow, and the SR1 ~ SR4 The drive circuit will be unable to work for a long period of time. During this process, the gate voltage pull-down capabilities of SR1 and SR2 are determined by the resistors Rg1 and Rg2. We take SR1 and its drive circuit as an example to analyze possible problems that may occur during the startup process of synchronous rectification. As shown in Figure 3, C g is the gate equivalent parasitic capacitance of SR1. During the startup process, because the VCC voltage is very low and the voltage difference between BST1 and AC1 is very small, the Driver circuit cannot work normally. When the voltage of AC1 rises rapidly, the body diode of SR1 is turned on, and since the gate of SR1 is initially 0, even if AC1 charges the gate of SR1 through R g1 , it cannot turn on SR1, so SR1 will always be off. disconnected state. When the voltage of AC1 decreases rapidly, the gate voltage of SR1 will decrease accordingly. Assuming that the change of AC1 is ΔV, then the gate-source voltage of SR1 is:
V GS_SR1＝ΔV(1-exp -t/τ) V GS_SR1 =ΔV(1-exp -t/τ )
其中，τ＝R g1*C g，可以看出当SR1大小不变时，R g1决定了SR1栅电压的泄放能力，当R g1越小，V GS_SR1越接近0，SR1越不会误开通，然而启动完成后，SR1正常工作开通时也会从R g1走电流，因此R g1越小也意味着功耗越大，为了满足功耗的要求一般也无法将R g1取小；当R g1越大时，V GS_SR1越大，这就可能会导致SR1误开通，从而引起同步整流进入异常工作状态。下面我们具体分析误开通之后同步整流的工作状态。 Among them, τ=R g1 *C g . It can be seen that when the size of SR1 remains unchanged, R g1 determines the discharge capacity of the SR1 gate voltage. When R g1 is smaller, V GS_SR1 is closer to 0, and SR1 will not be turned on by mistake. , however, after the startup is completed, SR1 will also draw current from R g1 when it is turned on normally. Therefore, the smaller R g1 means the greater the power consumption. In order to meet the power consumption requirements, R g1 generally cannot be made smaller; when R g1 When the value is larger, V GS_SR1 becomes larger, which may cause SR1 to be turned on by mistake, causing the synchronous rectifier to enter an abnormal working state. Below we analyze in detail the working status of synchronous rectification after mistaken activation.
如图3所示，假定Rg1与Rg2都比较大，当电感电流如I1流动时，AC2从低变高，SR2体二极管导通，AC1从高变低，SR1触发误开通，因而电流会从SR2进入SR1，然而再返回到C1，此过程并没有为Vo提供能量；同理当电感电流如I2流动时，AC1从低变高，SR1体二极管导通，AC2从高变低，SR2触发误开通，因而电流会从SR1进入SR2，然后再返回到L，此过程中也没有为Vo提供能量。可以看出，在整个传输过程中没有电流流入到Vo，因而Vo与VCC始终为0，电路无法正常启动。相应的波形如图4所示，Vd表示SR1～SR4体二极管的压降。当电感电流如I1流动时，AC2电压从-Vd迅速上升到Vd，SR2栅源电压Vgs(SR2)从Vd下降到0，此时SR2关断，由体二极管续流，同时AC1电压从Vd迅速下降到-Vd，SR1栅源电压Vgs(SR1)从0上升到Vd，此时SR1误导通，电流从其返回到C1中，由于Rg1较 大，Vgs(SR1)下降很慢，因而这个过程中SR1始终处于导通状态；当电感电流如I2流动时，AC1电压从-Vd迅速上升到Vd，SR1栅源电压Vgs(SR1)从Vd下降到0，此时SR1关断，由体二极管续流，同时AC2电压从Vd迅速下降到-Vd，SR2栅源电压Vgs(SR2)从0上升到Vd，此时SR2误导通，电流从其返回到L中，由于Rg2较大，Vgs(SR2)下降很慢，因而这个过程中SR2始终处于导通状态。整个过程没有电流为输出Vo供电，因而即使工作多个周期之后，Vo与VCC电压仍然为0，全桥同步整流电流无法正常完成启动。As shown in Figure 3, assuming that Rg1 and Rg2 are both relatively large, when the inductor current such as I1 flows, AC2 changes from low to high, the SR2 body diode conducts, AC1 changes from high to low, SR1 triggers and mistakenly turns on, so the current will change from SR2 Entering SR1, but then returning to C1, this process does not provide energy for Vo; similarly, when the inductor current such as I2 flows, AC1 changes from low to high, the SR1 body diode conducts, AC2 changes from high to low, and SR2 triggers a false turn-on. Therefore, the current will enter SR2 from SR1 and then return to L. No energy is provided to Vo in this process. It can be seen that no current flows into Vo during the entire transmission process, so Vo and VCC are always 0, and the circuit cannot start normally. The corresponding waveform is shown in Figure 4. Vd represents the voltage drop of the SR1 ~ SR4 body diodes. When the inductor current such as I1 flows, the AC2 voltage rises rapidly from -Vd to Vd, and the SR2 gate-source voltage Vgs (SR2) drops from Vd to 0. At this time, SR2 turns off and the body diode freewheels. At the same time, the AC1 voltage rapidly rises from Vd. drops to -Vd, the SR1 gate-source voltage Vgs(SR1) rises from 0 to Vd. At this time, SR1 is turned on, and the current returns from it to C1. Since Rg1 is large, Vgs(SR1) drops very slowly, so during this process SR1 is always on; when the inductor current such as I2 flows, the AC1 voltage rises rapidly from -Vd to Vd, and the SR1 gate-source voltage Vgs (SR1) drops from Vd to 0. At this time, SR1 is turned off, and the body diode freewheels. , at the same time, the AC2 voltage drops rapidly from Vd to -Vd, and the SR2 gate-source voltage Vgs(SR2) rises from 0 to Vd. At this time, SR2 is turned on by mistake, and the current returns from it to L. Since Rg2 is large, Vgs(SR2) drops. It is very slow, so SR2 is always on during this process. There is no current to power the output Vo during the entire process, so even after working for multiple cycles, the voltages of Vo and VCC are still 0, and the full-bridge synchronous rectification current cannot start normally.
本申请提供一种应用全桥同步整流启动防倒灌电路，所述电路包括：四个整流子模块，四个整流子模块分别连接电压输出端以及两个电压输入端，其中，两个整流子模块连接第一电压输入端，另两个整流子模块连接第二电压输入端，每个整流子模块包括：防倒灌子电路和整流管，其中，This application provides an anti-backflow circuit using full-bridge synchronous rectification startup. The circuit includes: four rectifier sub-modules. The four rectifier sub-modules are respectively connected to the voltage output terminal and the two voltage input terminals. Among them, the two rectifier sub-modules Connect the first voltage input terminal, and the other two rectifier sub-modules are connected to the second voltage input terminal. Each rectifier sub-module includes: anti-backflow sub-circuit and rectifier tube, wherein,
两个整流子模块的防倒灌子电路的输入端口连接第一电压输入端，防倒灌子电路的控制端口连接整流管的栅极，整流管的漏极连接电压输出端Vo；整流管的源极连接第二电压输入端；The input port of the anti-backflow sub-circuit of the two rectifier sub-modules is connected to the first voltage input terminal, the control port of the anti-backflow sub-circuit is connected to the gate of the rectifier, the drain of the rectifier is connected to the voltage output terminal Vo; the source of the rectifier Connect the second voltage input terminal;
另两个整流子模块的防倒灌子电路的输入端口连接第二电压输入端，防倒灌子电路的控制端口连接整流管的栅极，整流管的漏极连接电压输出端Vo；整流管的源极连接第一电压输入端。The input ports of the anti-backflow sub-circuit of the other two rectifier sub-modules are connected to the second voltage input terminal, the control port of the anti-backflow sub-circuit is connected to the gate of the rectifier, the drain of the rectifier is connected to the voltage output terminal Vo; the source of the rectifier The pole is connected to the first voltage input terminal.
示例的，Example,
所述防倒灌子电路包括：电阻、电容、比较器、驱动单元和三极管；其中，The anti-backflow sub-circuit includes: resistors, capacitors, comparators, drive units and transistors; wherein,
第一二极管阳极连接电压源VCC，第一二极管阴极连接驱动单元的一个比较端，驱动单元的另一个比较端连接第二电压输入端，驱动单元输出端为所述防倒灌子电路的控制端口，驱动单元输入端连接驱动逻辑信号；The anode of the first diode is connected to the voltage source VCC, the cathode of the first diode is connected to a comparison terminal of the driving unit, the other comparison terminal of the driving unit is connected to the second voltage input terminal, and the output terminal of the driving unit is the anti-backfill subcircuit. The control port, the input end of the drive unit is connected to the drive logic signal;
比较器的正向输入端连接第一二极管阴极，比较器的反向输入端连接基准电压，比较器的输出端连接第一三极管的栅极，第一三极管的源极连接另一个电压输入端，第一三极管的漏极连接第二三极管的栅极，第二三极管的源极连接另一电压输入端，第二三极管的漏极连接驱动单元的输出端；The forward input terminal of the comparator is connected to the cathode of the first diode, the reverse input terminal of the comparator is connected to the reference voltage, the output terminal of the comparator is connected to the gate of the first triode, and the source of the first triode is connected to On the other voltage input terminal, the drain of the first triode is connected to the gate of the second triode, the source of the second triode is connected to the other voltage input terminal, and the drain of the second triode is connected to the driving unit. the output terminal;
一个电压输入端连接第一电阻的一端，第一电阻的另一端连接第二二极管的阳极，第二二极管的阴极连接驱动单元的输出端、第二二极管的栅极以及第二电容的一端，第二电容的另一端连接另一个电压输入端；A voltage input end is connected to one end of the first resistor, the other end of the first resistor is connected to the anode of the second diode, and the cathode of the second diode is connected to the output end of the driving unit, the gate of the second diode and the third diode. One end of the second capacitor and the other end of the second capacitor are connected to another voltage input end;
第一电容的一端连接第一电容的阴极，第一电容的另一端连接另一个电压输入端，第二电阻的一端驱动单元的输出端，第二电阻的另一端连接另一个电压输入端；One end of the first capacitor is connected to the cathode of the first capacitor, the other end of the first capacitor is connected to another voltage input end, one end of the second resistor drives the output end of the unit, and the other end of the second resistor is connected to another voltage input end;
比较器的输出端连接与门电路的一个输入端，与门电路的另一个输入端连接相对的整流子模块的比较器的输出端，与门的输出端控制两个整流子模块的第一三极管是否工作。The output terminal of the comparator is connected to one input terminal of the AND gate circuit, and the other input terminal of the AND gate circuit is connected to the output terminal of the comparator of the opposite rectifier sub-module. The output terminal of the AND gate controls the first and third terminals of the two rectifier sub-modules. Is the tube working?
其中，若第一电压输入端可以为AC1，那么第二电压输入端可以为AC2；若第一电压输入端可以为AC2，那么第二电压输入端可以为AC1。Wherein, if the first voltage input terminal can be AC1, then the second voltage input terminal can be AC2; if the first voltage input terminal can be AC2, then the second voltage input terminal can be AC1.
示例的，Example,
所述防倒灌子电路还包括：第三二极管，第三二极管的阳极连接另一个电压输入端，第三二极管的阴极连接第二三极管的栅极。The anti-backfill sub-circuit further includes: a third diode, the anode of the third diode is connected to another voltage input terminal, and the cathode of the third diode is connected to the gate of the second transistor.
图5为本申请提供的应用全桥同步整流启动防倒灌电路的示意图。图5中SR1与SR2为同步整流管，R g1与R g2分别为其栅极下拉电阻，取值较大；二极管D5与电容C2构成基于AC1的电荷泵电路，二极管D6与电容C3构成基于AC2的电荷泵电路，分别用于产生相对于AC1与AC2压差约为VCC的驱动电压BST1与BST2；DRV1与DRV2分别为SR1与SR2的驱动逻辑信号，经过驱动单元Driver后控制SR1与SR2的开启与关断；Vth1与Vth2为基准电压，CMP1用于判断BST1与AC1压差是否超过基准电压Vth1，CMP2用于判断BST2与AC2压差是否超过基准电压Vth2，它们的输出BST1OK与BST2OK通过与门AN1后产生启动完成信号BSTOK，当BSTOK＝0时，表示电路未启动完成，SR1～SR4需要关断，由其体二极管工作，当BSTOK＝1时，表示电路已经启动完成，SR1～SR4需要正常开启与关断，进入同步整流工作状态；R1、D7、MN1、C4、D9、MN2构成SR1的动态栅极下拉电路，其中MN2为下拉管开关管，利用其开关特性作为同步整流管SR1的栅极下拉管；R1用于限流，取值较大；肖特基二极管D7用于电流的单向流动，只允许AC2为C4充电，阻断电流从C4流向AC2，C4为稳压电容，当AC2低于AC1不充电时，也能稳定MN2的栅极电压；D9为稳压二极管，可以将MN2的栅极电压钳位在安全值以下，以防止电压过高损坏MN2；MN1为开关管，BST1OK＝0时将其关断，BST1OK＝1时将其导通。与此对应，R2、D8、MN3、C5、D10、MN4构成SR2的动态栅极下拉电路，其中MN3为下拉管开关管，利用其开关特性作为同步整流管SR2的栅极下拉管；R2用于限流，取值较大；肖特基二极管D8用于电流的单向流动，只允许AC1为C5充电，阻断电流从C5流向AC1，C5为稳压电容，当AC1低于AC2不充电时，也能稳定MN4的栅极电压；D10为稳压二极管，可以将MN4的栅极电压钳位在安全值以下，以防止电压过高损坏MN4；MN3为开关管，BST2OK＝0时将其关断，BST2OK＝1时将其导通。 Figure 5 is a schematic diagram of the full-bridge synchronous rectification startup anti-backflow circuit provided by this application. In Figure 5, SR1 and SR2 are synchronous rectifiers, R g1 and R g2 are their gate pull-down resistors respectively, with larger values; diode D5 and capacitor C2 form a charge pump circuit based on AC1, and diode D6 and capacitor C3 form a charge pump circuit based on AC2 The charge pump circuit is used to generate driving voltages BST1 and BST2 with a voltage difference of approximately VCC relative to AC1 and AC2 respectively; DRV1 and DRV2 are the driving logic signals of SR1 and SR2 respectively, and control the opening of SR1 and SR2 after passing through the driving unit Driver. and turn off; Vth1 and Vth2 are the reference voltages, CMP1 is used to determine whether the voltage difference between BST1 and AC1 exceeds the reference voltage Vth1, CMP2 is used to determine whether the voltage difference between BST2 and AC2 exceeds the reference voltage Vth2, their outputs BST1OK and BST2OK pass the AND gate The start-up completion signal BSTOK is generated after AN1. When BSTOK=0, it means that the circuit has not started up. SR1~SR4 need to be turned off and their body diodes work. When BSTOK=1, it means that the circuit has started up. SR1~SR4 need to be normal. Turn on and off to enter the synchronous rectification working state; R1, D7, MN1, C4, D9, and MN2 constitute the dynamic gate pull-down circuit of SR1, in which MN2 is the pull-down switch tube, and its switching characteristics are used as the gate of the synchronous rectifier SR1. pull-down tube; R1 is used for current limiting, with a larger value; Schottky diode D7 is used for the one-way flow of current, only allowing AC2 to charge C4, blocking the flow of current from C4 to AC2, and C4 is the voltage stabilizing capacitor. When AC2 is lower than AC1 and not charging, it can also stabilize the gate voltage of MN2; D9 is a voltage stabilizing diode, which can clamp the gate voltage of MN2 below a safe value to prevent excessive voltage from damaging MN2; MN1 is a switching tube. When BST1OK=0, it is turned off, and when BST1OK=1, it is turned on. Correspondingly, R2, D8, MN3, C5, D10, and MN4 constitute the dynamic gate pull-down circuit of SR2, in which MN3 is the pull-down switch tube, and its switching characteristics are used as the gate pull-down tube of the synchronous rectifier SR2; R2 is used Current limiting, with a larger value; Schottky diode D8 is used for one-way flow of current, only allowing AC1 to charge C5, blocking the flow of current from C5 to AC1, C5 is a voltage stabilizing capacitor, and does not charge when AC1 is lower than AC2 , can also stabilize the gate voltage of MN4; D10 is a voltage stabilizing diode, which can clamp the gate voltage of MN4 below a safe value to prevent excessive voltage from damaging MN4; MN3 is a switching tube, which is turned off when BST2OK=0 off, turn it on when BST2OK=1.
电路的工作原理如下：初始时，VCC电压为0，BST1无电压为其充电，因而也为0，驱动电路无法工作，BST1OK＝0，AC1与AC2均为0。设Vd为SR1～SR4的体二极管的导通电压，Vs为肖特基二极的正向压降，假定开始半周期电流流动使SR2的体二极管打开，那么AC2从0变为Vd，AC1从0变为-Vd，AC2与AC1的压差为2Vd，那么为电容C4的充电电压为2Vd-Vs，由于肖特基二极管的正向压降Vs很低，因而C4的充电电压相对AC1约为2Vd，又C4取值较小，因此MN2的栅源电压可以很快上升到2Vd，此电压足够将MN2打开，将SR1的栅极下拉到AC1。由于SR1不会误开启，那么电流就不会发生反灌，电流将从SR2的体二极管流入到输出Vo，VCC会随之上升。下个半周期，电流流动会使SR1的体二极管打开，那么AC1从-Vd变为Vd，AC2从Vd变为-Vd，AC1与AC2的压差为2Vd，那么为电容C5的充电电压约为2Vd，又C5取值较小，因此MN4的栅源电压可以很快上升到2Vd，此电压足够将MN4打开，将SR2的栅极下拉到AC2。由于SR2不会误开启，那么电流就不会发生反灌，电流将从SR1的体二极管流入到输出Vo，VCC也会继续上升。The working principle of the circuit is as follows: initially, the VCC voltage is 0, BST1 has no voltage to charge it, so it is also 0, the driving circuit cannot work, BST1OK=0, AC1 and AC2 are both 0. Let Vd be the conduction voltage of the body diode of SR1~SR4, Vs be the forward voltage drop of the Schottky diode, assuming that the current flow in the first half cycle causes the body diode of SR2 to turn on, then AC2 changes from 0 to Vd, and AC1 changes from 0 becomes -Vd, and the voltage difference between AC2 and AC1 is 2Vd, then the charging voltage of capacitor C4 is 2Vd-Vs. Since the forward voltage drop Vs of the Schottky diode is very low, the charging voltage of C4 relative to AC1 is about 2Vd, and the value of C4 is small, so the gate-source voltage of MN2 can quickly rise to 2Vd. This voltage is enough to turn on MN2 and pull the gate of SR1 down to AC1. Since SR1 will not turn on accidentally, the current will not flow back, and the current will flow from the body diode of SR2 to the output Vo, and VCC will rise accordingly. In the next half cycle, the current flow will open the body diode of SR1, then AC1 changes from -Vd to Vd, AC2 changes from Vd to -Vd, the voltage difference between AC1 and AC2 is 2Vd, then the charging voltage of capacitor C5 is approximately 2Vd, and the value of C5 is small, so the gate-source voltage of MN4 can quickly rise to 2Vd. This voltage is enough to turn on MN4 and pull the gate of SR2 down to AC2. Since SR2 will not turn on accidentally, the current will not flow back, the current will flow from the body diode of SR1 to the output Vo, and VCC will continue to rise.
Vo与VCC上升后，可以通过D5与D6分别为BST1与BST2充电，BST1与BST2的电压会逐渐上升，AC2与AC1的压差也会逐渐加大，因而MN2与MN4的栅源电压Vgs(MN2)与Vgs(MN4)也会逐渐增加，直到触发稳压管D9与D10，将其钳位到一定值。VCC的上升持续多个周期后，BST1与AC1的压差超过阈值电压Vth1，BST1OK由低变高，MN1导通将MN2的栅极电压下拉到AC1电位，即将MN2关断； BST2与AC2的压差超过阈值电压Vth2，BST2OK由低变高，MN3导通将MN4的栅极电压下拉到AC2电位，即MN4关断；BST1OK与BST2OK为高通过与门AN1后BSTOK也会变为高，进入同步整流工作状态，此时驱动电路可以正常工作，由于MN1与MN2的关断，因而同步整流工作状态也不会增加功耗。After Vo and VCC rise, BST1 and BST2 can be charged through D5 and D6 respectively. The voltages of BST1 and BST2 will gradually increase, and the voltage difference between AC2 and AC1 will also gradually increase. Therefore, the gate-source voltage Vgs of MN2 and MN4 (MN2 ) and Vgs (MN4) will also gradually increase until the voltage regulator tubes D9 and D10 are triggered and clamped to a certain value. After the rise of VCC continues for several cycles, the voltage difference between BST1 and AC1 exceeds the threshold voltage Vth1, BST1OK changes from low to high, MN1 turns on and pulls the gate voltage of MN2 down to the AC1 potential, that is, MN2 is turned off; the voltage between BST2 and AC2 The difference exceeds the threshold voltage Vth2, BST2OK changes from low to high, MN3 is turned on and pulls the gate voltage of MN4 down to the AC2 potential, that is, MN4 is turned off; BST1OK and BST2OK are high and BSTOK will also become high after passing the AND gate AN1, entering synchronization In the rectification working state, the drive circuit can work normally at this time. Since MN1 and MN2 are turned off, the synchronous rectification working state will not increase power consumption.
图6为本申请提供的电流的波形图。图中初始时AC1与AC2均为0，开始半周期电流流动使AC1电压由0变为-Vd，AC2的电压由0变为Vd，因而MN2的栅源电压Vgs(MN2)迅速上升到2Vd-Vs，将SR1栅极下拉到AC1，由于Vgs(MN2)有一个很小的上升时间，因而如波形所示Vgs(SR1)会有一个小的毛刺电压，但是时间很短，反灌的电流很小，大部分电流均流入输出Vo中，VCC电压会缓慢上升；下半个周期电流流动使AC2电压由Vd变为-Vd，AC1的电压由-Vd变为Vd，由于肖特基二极管D7阻断了电流从MN2的栅极流入到AC2，因此MN2的栅电压可以保持不变，即SR1保持关断，MN4的栅源电压Vgs(MN4)迅速上升到2Vd-Vs，将SR2的栅极下拉到AC2，由于Vgs(MN4)有一个很小的上升时间，因而如波形所示Vgs(SR2)会有一个小的毛刺电压，但是时间很短，反灌的电流很小，大部分电流均流入输出Vo中，VCC电压会继续上升。Vo与VCC上升后，AC1与AC2的高电位也会随之上升，可以表示为Vd+Vo，因而Vgs(MN2)与Vgs(MN4)也会随Vo上升，可以表示为2Vd+Vo-Vs，这个值持续将MN2与MN4完全导通，SR1与SR2保持关断，当2Vd+Vo超过稳压管D9与D10的稳压值后，会保持在稳压值不变。持续工作多个周期后，VCC上升会使BSTOK＝1，电路进入到同步工作状态，通过AC1与AC2的波形可以看出，同步整流后AC1与AC2的高电位约为Vo，不再有体二极管的压降，低电位除死区时间外电压约为0，体二极管也不再导通，效率相对于BSTOK＝0时会有很大的提升。进入同步整流后，SR1与SR2的驱动可以正常工作，MN2与MN4均会关断以减小功耗，由波形可以看到，Vgs(MN2)与Vgs(MN4)会处于关断状态，Vgs(SR1)与Vgs(SR2)处于开关状态，控制SR1与SR2的开启与关断。Figure 6 is a waveform diagram of the current provided by this application. In the figure, AC1 and AC2 are both 0 initially. The current flow in the first half cycle causes the voltage of AC1 to change from 0 to -Vd, and the voltage of AC2 changes from 0 to Vd. Therefore, the gate-source voltage Vgs (MN2) of MN2 quickly rises to 2Vd- Vs, pull down the SR1 gate to AC1. Since Vgs (MN2) has a small rise time, Vgs (SR1) will have a small glitch voltage as shown in the waveform, but the time is very short and the backwash current is very small. small, most of the current flows into the output Vo, and the VCC voltage will rise slowly; the current flow in the second half cycle causes the voltage of AC2 to change from Vd to -Vd, and the voltage of AC1 from -Vd to Vd. Due to the resistance of Schottky diode D7 When the current is cut off, the current flows from the gate of MN2 to AC2, so the gate voltage of MN2 can remain unchanged, that is, SR1 remains turned off, and the gate-source voltage Vgs (MN4) of MN4 quickly rises to 2Vd-Vs, pulling down the gate of SR2. to AC2, since Vgs (MN4) has a small rise time, Vgs (SR2) will have a small glitch voltage as shown in the waveform, but the time is very short, the backwash current is very small, and most of the current flows in In the output Vo, the VCC voltage will continue to rise. After Vo and VCC rise, the high potentials of AC1 and AC2 will also rise, which can be expressed as Vd+Vo. Therefore, Vgs(MN2) and Vgs(MN4) will also rise with Vo, which can be expressed as 2Vd+Vo-Vs. This value continues to fully conduct MN2 and MN4, and SR1 and SR2 remain turned off. When 2Vd+Vo exceeds the regulated value of the voltage regulator tubes D9 and D10, it will remain at the regulated value. After continuous operation for several cycles, the rise of VCC will cause BSTOK=1, and the circuit enters the synchronous working state. It can be seen from the waveforms of AC1 and AC2 that the high potentials of AC1 and AC2 after synchronous rectification are about Vo, and there are no longer body diodes. The voltage drop at low potential is about 0 except for the dead time, and the body diode no longer conducts. The efficiency will be greatly improved compared to BSTOK=0. After entering synchronous rectification, the drivers of SR1 and SR2 can work normally, and both MN2 and MN4 will be turned off to reduce power consumption. As can be seen from the waveform, Vgs (MN2) and Vgs (MN4) will be in the off state, and Vgs ( SR1) and Vgs (SR2) are in a switching state, controlling the on and off of SR1 and SR2.
本申请还提供一种电子设备，所述电子设备包括如图5所示的应用全桥同步整流启动防倒灌电路。This application also provides an electronic device, which includes an anti-backflow circuit using full-bridge synchronous rectification as shown in Figure 5 .
在上述实施例中，对各个实施例的描述都各有侧重，某个实施例中没有详述的部分，可以参见其他实施例的相关描述。In the above embodiments, each embodiment is described with its own emphasis. For parts that are not described in detail in a certain embodiment, please refer to the relevant descriptions of other embodiments.
在本申请所提供的几个实施例中，应该理解到，所揭露的装置，可通过其它的方式实现。例如，以上所描述的装置实施例仅仅是示意性的，例如所述单元的划分，仅仅为一种逻辑功能划分，实际实现时可以有另外的划分方式，例如多个单元或组件可以结合或者可以集成到另一个***，或一些特征可以忽略，或不执行。另一点，所显示或讨论的相互之间的耦合或直接耦合或通信连接可以是通过一些接口，装置或单元的间接耦合或通信连接，可以是电性或其它的形式。In the several embodiments provided in this application, it should be understood that the disclosed device can be implemented in other ways. For example, the device embodiments described above are only illustrative. For example, the division of the units is only a logical function division. In actual implementation, there may be other division methods. For example, multiple units or components may be combined or may be Integrated into another system, or some features can be ignored, or not implemented. On the other hand, the coupling or direct coupling or communication connection between each other shown or discussed may be through some interfaces, and the indirect coupling or communication connection of the devices or units may be in electrical or other forms.
以上对本发明实施例进行了详细介绍，本文中应用了具体个例对本发明的原理及实施方式进行了阐述，以上实施例的说明只是用于帮助理解本发明的方法及其核心思想；同时，对于本领域的一般技术人员，依据本发明的思想，在具体实施方式及应用范围上均会有改变之处，综上所述，本说明书内容不应理解为对本发明的限制。The embodiments of the present invention have been introduced in detail above. Specific examples are used in this article to illustrate the principles and implementation modes of the present invention. The description of the above embodiments is only used to help understand the method and the core idea of the present invention; at the same time, for Those of ordinary skill in the art will make changes in the specific implementation and application scope based on the ideas of the present invention. In summary, the contents of this description should not be understood as limiting the present invention.

Claims (4)

  1. 一种应用全桥同步整流启动防倒灌电路，其特征在于，所述电路包括：四个整流子模块，四个整流子模块分别连接电压输出端以及两个电压输入端，其中，两个整流子模块连接第一电压输入端，另两个整流子模块连接第二电压输入端，每个整流子模块包括：防倒灌子电路和整流管，其中，An anti-backflow circuit using full-bridge synchronous rectification startup, characterized in that the circuit includes: four rectifier sub-modules, the four rectifier sub-modules are respectively connected to the voltage output terminal and the two voltage input terminals, wherein the two rectifier sub-modules The module is connected to the first voltage input terminal, and the other two rectifier sub-modules are connected to the second voltage input terminal. Each rectifier sub-module includes: an anti-backflow sub-circuit and a rectifier tube, wherein,
    两个整流子模块的防倒灌子电路的输入端口连接第一电压输入端，防倒灌子电路的控制端口连接整流管的栅极，整流管的漏极连接电压输出端Vo；整流管的源极连接第二电压输入端；The input port of the anti-backflow sub-circuit of the two rectifier sub-modules is connected to the first voltage input terminal, the control port of the anti-backflow sub-circuit is connected to the gate of the rectifier, the drain of the rectifier is connected to the voltage output terminal Vo; the source of the rectifier Connect the second voltage input terminal;
    另两个整流子模块的防倒灌子电路的输入端口连接第二电压输入端，防倒灌子电路的控制端口连接整流管的栅极，整流管的漏极连接电压输出端Vo；整流管的源极连接第一电压输入端。The input ports of the anti-backflow sub-circuit of the other two rectifier sub-modules are connected to the second voltage input terminal, the control port of the anti-backflow sub-circuit is connected to the gate of the rectifier, the drain of the rectifier is connected to the voltage output terminal Vo; the source of the rectifier The pole is connected to the first voltage input terminal.
  2. 根据权利要求1所述的应用全桥同步整流启动防倒灌电路，其特征在于，The anti-backflow circuit using full-bridge synchronous rectification startup according to claim 1, characterized in that:
    所述防倒灌子电路包括：电阻、电容、比较器、驱动单元和三极管；其中，The anti-backflow sub-circuit includes: resistors, capacitors, comparators, drive units and transistors; wherein,
    第一二极管阳极连接电压源VCC，第一二极管阴极连接驱动单元的一个比较端，驱动单元的另一个比较端连接第二电压输入端，驱动单元输出端为所述防倒灌子电路的控制端口，驱动单元输入端连接驱动逻辑信号；The anode of the first diode is connected to the voltage source VCC, the cathode of the first diode is connected to a comparison terminal of the driving unit, the other comparison terminal of the driving unit is connected to the second voltage input terminal, and the output terminal of the driving unit is the anti-backfill subcircuit. The control port, the input end of the drive unit is connected to the drive logic signal;
    比较器的正向输入端连接第一二极管阴极，比较器的反向输入端连接基准电压，比较器的输出端连接第一三极管的栅极，第一三极管的源极连接另一个电压输入端，第一三极管的漏极连接第二三极管的栅极，第二三极管的源极连接另一电压输入端，第二三极管的漏极连接驱动单元的输出端；The forward input terminal of the comparator is connected to the cathode of the first diode, the reverse input terminal of the comparator is connected to the reference voltage, the output terminal of the comparator is connected to the gate of the first triode, and the source of the first triode is connected to On the other voltage input terminal, the drain of the first triode is connected to the gate of the second triode, the source of the second triode is connected to the other voltage input terminal, and the drain of the second triode is connected to the driving unit. the output terminal;
    一个电压输入端连接第一电阻的一端，第一电阻的另一端连接第二二极管的阳极，第二二极管的阴极连接驱动单元的输出端、第二二极管的栅极以及第二电容的一端，第二电容的另一端连接另一个电压输入端；A voltage input end is connected to one end of the first resistor, the other end of the first resistor is connected to the anode of the second diode, and the cathode of the second diode is connected to the output end of the driving unit, the gate of the second diode and the third diode. One end of the second capacitor and the other end of the second capacitor are connected to another voltage input end;
    第一电容的一端连接第一电容的阴极，第一电容的另一端连接另一个电压输入端，第二电阻的一端驱动单元的输出端，第二电阻的另一端连接另一个电压输入端；One end of the first capacitor is connected to the cathode of the first capacitor, the other end of the first capacitor is connected to another voltage input end, one end of the second resistor drives the output end of the unit, and the other end of the second resistor is connected to another voltage input end;
    比较器的输出端连接与门电路的一个输入端，与门电路的另一个输入端连接相对的整流子模块的比较器的输出端，与门的输出端控制两个整流子模块的第一三极管是否工作。The output terminal of the comparator is connected to one input terminal of the AND gate circuit, and the other input terminal of the AND gate circuit is connected to the output terminal of the comparator of the opposite rectifier sub-module. The output terminal of the AND gate controls the first and third terminals of the two rectifier sub-modules. Is the tube working?
  3. 根据权利要求2所述的应用全桥同步整流启动防倒灌电路，其特征在于，The anti-backflow circuit using full-bridge synchronous rectification startup according to claim 2, characterized in that:
    所述防倒灌子电路还包括：第三二极管，第三二极管的阳极连接另一个电压输入端，第三二极管的阴极连接第二三极管的栅极。The anti-backflow sub-circuit also includes: a third diode, the anode of the third diode is connected to another voltage input terminal, and the cathode of the third diode is connected to the gate of the second transistor.
  4. 一种电子设备，其特征在于，所述电子设备包括如权利要求1-3任意一项所述的应用全桥同步整流启动防倒灌电路。An electronic device, characterized in that the electronic device includes the anti-backflow circuit using full-bridge synchronous rectification startup according to any one of claims 1-3.
PCT/CN2022/133267 2022-08-18 2022-11-21 Anti-backflow circuit started by using full-bridge synchronous rectification, and electronic device WO2024036800A1 (en)

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