WO2024036774A1 - 显示模组及显示装置 - Google Patents

显示模组及显示装置 Download PDF

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Publication number
WO2024036774A1
WO2024036774A1 PCT/CN2022/130999 CN2022130999W WO2024036774A1 WO 2024036774 A1 WO2024036774 A1 WO 2024036774A1 CN 2022130999 W CN2022130999 W CN 2022130999W WO 2024036774 A1 WO2024036774 A1 WO 2024036774A1
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WO
WIPO (PCT)
Prior art keywords
reflective light
sub
shielding
pixel
area
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PCT/CN2022/130999
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English (en)
French (fr)
Inventor
罗成志
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武汉华星光电技术有限公司
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Publication of WO2024036774A1 publication Critical patent/WO2024036774A1/zh

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    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G02F1/136209—Light shielding layers, e.g. black matrix, incorporated in the active matrix substrate, e.g. structurally associated with the switching element
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G02F1/1335—Structural association of cells with optical devices, e.g. polarisers or reflectors
    • G02F1/133509—Filters, e.g. light shielding masks
    • G02F1/133512—Light shielding layers, e.g. black matrix
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G02F1/1335—Structural association of cells with optical devices, e.g. polarisers or reflectors
    • G02F1/133553—Reflecting elements
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/124—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits

Definitions

  • the present application relates to the field of mobile communication technology, and in particular, to a display module and a display device having the display module.
  • Liquid Crystal Display uses changes in electric field intensity to change the orientation of liquid crystal molecules to control the intensity of light transmission to display images.
  • liquid crystal displays have been widely used in various terminal display devices of large, medium and small sizes due to their characteristics of light weight, small size and thin thickness.
  • its light efficiency refers to the ratio of the light intensity before and after the backlight passes through the panel; in existing liquid crystal displays, due to the influence of the refractive index and light transmittance of each film layer in the panel, the existing liquid crystal display The light efficiency of the display is only 3-10%, of which more than 90% of the light cannot be utilized.
  • Embodiments of the present application provide a display module and a display device, which can improve the light efficiency of the display module by improving the light utilization rate of the backlight component by the display module.
  • An embodiment of the present application provides a display module, including:
  • a reflective light-shielding layer disposed on the substrate
  • a thin film transistor layer disposed on the side of the reflective light-shielding layer away from the substrate;
  • a black matrix disposed on the side of the thin film transistor layer away from the reflective light-shielding layer;
  • a backlight assembly disposed on the side of the substrate away from the reflective light-shielding layer;
  • the display module includes a display area
  • the reflective light shielding layer is on the base and corresponds to the orthographic projection in the display area
  • the black matrix is on the base and corresponds to the orthographic projection in the display area.
  • the ratio of the orthographic projection area of the reflective light-shielding layer on the substrate and corresponding to the display area to the orthographic projection area of the black matrix on the substrate and corresponding to the display area greater than 20%.
  • the reflective light-shielding layer is on the substrate and corresponds to the orthographic projection area of the display area, accounting for the area of the black matrix on the substrate and corresponding to the orthographic projection area of the display area.
  • the ratio of the projected area is greater than or equal to 80% and less than or equal to 100%.
  • the display module includes a plurality of sub-pixel block groups arranged in the display area and arranged along a first direction, and each sub-pixel block group is provided with a plurality of sub-pixel blocks arranged along a second direction. A plurality of sub-pixel areas arranged in a direction, and the first direction intersects the second direction;
  • the reflective light-shielding layer includes a plurality of first reflective light-shielding parts and at least one second reflective light-shielding part;
  • the thin film transistor layer includes a plurality of data lines and a plurality of scan lines, and the data lines are arranged between any two adjacent sub-pixel areas in each of the sub-pixel area groups.
  • the scan lines are arranged Between any two adjacent sub-pixel blocks;
  • the first reflective light-shielding part is provided between any two adjacent sub-pixel blocks
  • the second reflective light-shielding part is provided between two adjacent sub-pixel blocks in at least one of the sub-pixel blocks. between the sub-pixel areas.
  • the reflective light-shielding layer includes a plurality of second reflective light-shielding parts, and a plurality of second reflective light-shielding parts are provided between any two adjacent sub-pixel regions in each of the sub-pixel regions.
  • the second reflective light shielding part includes a plurality of second reflective light-shielding parts, and a plurality of second reflective light-shielding parts are provided between any two adjacent sub-pixel regions in each of the sub-pixel regions.
  • each of the first reflective light-shielding portions is disposed between any two adjacent sub-pixel blocks and extends along the second direction;
  • Each of the second reflective light-shielding portions is disposed between any two adjacent sub-pixel areas in the corresponding sub-pixel area group, and is located between the two adjacent second sub-pixel areas along the first direction. between a reflective shading part.
  • the orthographic projection of the data line on the substrate and the orthographic projection of the scan line on the substrate are both located at the orthographic projection of the reflective light-shielding layer on the substrate. within the coverage area.
  • each of the second reflective light-shielding parts is connected between two first reflective light-shielding parts adjacent along the first direction, so that a plurality of the first reflective light-shielding parts A reflective light-shielding portion and a plurality of second reflective light-shielding portions are provided around each of the sub-pixel areas.
  • the first reflective light-shielding portion and the second reflective light-shielding portion are spaced apart.
  • each of the first reflective light-shielding parts includes a plurality of first sub-parts arranged at intervals, and the plurality of first sub-parts in the same first reflective light-shielding part are arranged along the Arrange in the second direction.
  • a plurality of the first sub-parts in one of the first reflective light-shielding parts are in contact with the other first reflective light-shielding part.
  • a plurality of the first sub-parts in the light-shielding part are arranged in one-to-one correspondence;
  • At least six of the sub-pixel regions arranged along the second direction are provided between two adjacent first sub-parts of the first reflective light-shielding parts that are opposite to each other.
  • the thin film transistor layer further includes a plurality of touch lines
  • the second reflective light-shielding part includes a second sub-part and a third sub-part, the second sub-part is along the The width in the second direction is greater than the width of the third sub-section along the second direction;
  • a touch line, a data line and a second sub-section are provided between any two adjacent sub-pixel areas in each sub-pixel area group, and a touch line Both the control line and the data line are at least partially overlapped with the corresponding second sub-section;
  • one of the data lines and a third sub-section are provided between any two adjacent sub-pixel areas in each of the sub-pixel blocks, and one of the data lines is connected to a corresponding third sub-pixel area.
  • the three sub-parts are at least partially overlapped.
  • the second sub-section includes a first unit and a second unit spaced apart along the second direction, wherein the first unit at least partially overlaps the data line.
  • the second unit is arranged to at least partially overlap the touch line.
  • the width of the first reflective light-shielding part along the first direction is greater than the width of the scan line along the first direction, and the second reflective light-shielding part is along the first direction.
  • the width in the second direction is greater than the sum of the width of the data line in the second direction and the width of the touch line in the second direction.
  • the black matrix includes a plurality of openings, and one opening is provided corresponding to one of the sub-pixel areas;
  • the difference between the distance between two adjacent openings along the first direction and the width of the first reflective light shielding portion along the first direction is greater than or equal to 0.5 microns and less than or equal to 2 microns;
  • the difference between the distance between two adjacent openings along the second direction and the width of the second reflective light shielding portion along the second direction is greater than or equal to 0.5 microns and less than or equal to 2 microns.
  • the thin film transistor layer further includes a thin film transistor disposed in the display area, and the reflective light-shielding layer is disposed between the thin film transistor and the substrate.
  • the ratio of the orthographic projection area of the reflective light-shielding layer on the substrate and corresponding to the display area to the area of the display area is greater than or equal to 25% and less than or equal to 90 %.
  • the ratio of the orthographic projection area of the reflective light-shielding layer on the substrate and corresponding to the display area to the area of the display area is greater than or equal to 25% and less than or equal to 70 %.
  • inventions of the present application further provide a display device.
  • the display device includes a device main body and a display module, and the device main body and the display module are combined into one body;
  • the display module includes:
  • a reflective light-shielding layer disposed on the substrate
  • a thin film transistor layer disposed on the side of the reflective light-shielding layer away from the substrate;
  • a black matrix disposed on the side of the thin film transistor layer away from the reflective light-shielding layer;
  • a backlight assembly disposed on the side of the substrate away from the reflective light-shielding layer;
  • the display module includes a display area
  • the reflective light shielding layer is on the base and corresponds to the orthographic projection in the display area
  • the black matrix is on the base and corresponds to the orthographic projection in the display area.
  • the ratio of the orthographic projection area of the reflective light-shielding layer on the substrate and corresponding to the display area to the orthographic projection area of the black matrix on the substrate and corresponding to the display area greater than 20%.
  • the reflective light-shielding layer is on the substrate and corresponds to the orthographic projection area of the display area, accounting for the area of the black matrix on the substrate and corresponding to the orthographic projection area of the display area.
  • the ratio of the projected area is greater than or equal to 80% and less than or equal to 100%.
  • the display module includes a plurality of sub-pixel block groups arranged in the display area and arranged along a first direction, and each sub-pixel block group is provided with a plurality of sub-pixel blocks arranged along a second direction. A plurality of sub-pixel areas arranged in a direction, and the first direction intersects the second direction;
  • the reflective light-shielding layer includes a plurality of first reflective light-shielding parts and at least one second reflective light-shielding part;
  • the thin film transistor layer includes a plurality of data lines and a plurality of scan lines, and the data lines are arranged between any two adjacent sub-pixel areas in each of the sub-pixel area groups.
  • the scan lines are arranged Between any two adjacent sub-pixel blocks;
  • the first reflective light-shielding part is provided between any two adjacent sub-pixel blocks
  • the second reflective light-shielding part is provided between two adjacent sub-pixel blocks in at least one of the sub-pixel blocks. between the sub-pixel areas.
  • the ratio of the orthographic projection area of the reflective light-shielding layer on the substrate to the orthographic projection area of the black matrix on the substrate is greater than 20%, so as to increase the area ratio of the reflective light-shielding layer in the display area.
  • the reflective light-shielding layer The orthographic projection of the layer on the substrate is within the coverage of the orthographic projection of the black matrix on the substrate.
  • this application can prevent the reflective light-shielding layer from exceeding the coverage of the black matrix, thereby preventing the reflective light-shielding layer from affecting the display surface of the display module. It causes reflection on the side and improves the display effect of the display module.
  • Figure 1 is a schematic structural diagram of a display module provided by an embodiment of the present application.
  • Figure 2 is a schematic structural diagram of a reflective light-shielding layer provided by an embodiment of the present application
  • Figure 3 is a schematic diagram of a planar distribution structure of the reflective light shielding layer and the thin film transistor layer provided by the embodiment of the present application;
  • Figure 4 is a schematic diagram of the distribution structure of the sub-pixel area and the light-shielding layer in the related art
  • Figure 5 is a schematic structural diagram of the sub-pixel area in the related art
  • Figure 6 is another structural schematic diagram of the reflective light-shielding layer provided by the embodiment of the present application.
  • Figure 7 is a schematic diagram of another planar distribution structure of the reflective light shielding layer and the thin film transistor layer provided by the embodiment of the present application;
  • Figure 8 is another structural schematic diagram of the reflective light-shielding layer provided by the embodiment of the present application.
  • FIG. 9 is a schematic diagram of another planar distribution structure of the reflective light shielding layer and the thin film transistor layer provided by the embodiment of the present application.
  • a plurality of data signal lines 1 and a plurality of scanning signal lines 2 are criss-crossed to define a plurality of sub-pixel areas 3 in the display panel, and each sub-pixel area
  • a thin film transistor is provided in 3, which may specifically include an active layer 4, a source electrode 5 and a drain electrode 6; in the related art, in order to avoid light irradiation on the active layer 4 to affect the stability of the thin film transistor, the A light-shielding layer 7 is provided below the active layer 4 to block light. Therefore, in the related art, the light-shielding layer 7 is only disposed under the active layer 4 , its area is small, and its reflectivity for light is low.
  • an embodiment of the present application provides a display module, which includes a display area; and the display module also includes a substrate 10, a reflective light shielding layer 20, a thin film transistor layer 30, and a backlight assembly 40; wherein, The reflective light-shielding layer 20 is disposed on the substrate 10; the thin film transistor layer 30 is disposed on the side of the reflective light-shielding layer 20 away from the substrate 10; the black matrix 61 is disposed on the side of the thin film transistor layer 30 away from the reflective light-shielding layer 20; the backlight assembly 40 is disposed on The side of the substrate 10 away from the reflective light-shielding layer 20 .
  • the reflective light-shielding layer 20 is on the substrate 10 and corresponds to the orthographic projection in the display area, and is located within the coverage of the black matrix 61 on the substrate 10 and corresponding to the orthographic projection in the display area.
  • the reflective light-shielding layer 20 is on the substrate 10 and corresponds to the orthographic projection in the display area.
  • the ratio of the orthographic projection area in the display area to the orthographic projection area of the black matrix 61 on the substrate 10 and corresponding to the display area is greater than 20%.
  • the embodiment of the present application increases the area ratio of the reflective light-shielding layer 20 in the display area, so that the orthographic projection area of the reflective light-shielding layer 20 on the substrate 10 accounts for 30% of the orthographic projection area of the black matrix 61 on the substrate 10
  • the ratio is greater than 20% to increase the reflectivity of the reflective light-shielding layer 20 for the light emitted by the backlight assembly 40, thereby improving the light utilization rate of the display module for the backlight assembly 40, thereby improving the light efficiency of the display module and reducing the cost of the display module.
  • the orthographic projection of the reflective light-shielding layer 20 on the substrate 10 is located within the coverage of the orthographic projection of the black matrix 61 on the substrate 10 , that is, this application can prevent the reflective light-shielding layer 20 from exceeding the coverage of the black matrix 61 , and then This prevents the reflective light-shielding layer 20 from causing reflection on the display surface side of the display module, thereby improving the display effect of the display module.
  • An embodiment of the present application provides a display module.
  • the display module includes a plurality of sub-pixel blocks 100 arranged in a display area and arranged along the first direction X.
  • Each sub-pixel block group 100 is provided with a plurality of sub-pixel areas 101 arranged along the second direction Y, and the first direction X and the second direction Y intersect.
  • the reflective light-shielding layer 20 includes a plurality of first reflective light-shielding parts 21 and at least one second reflective light-shielding part 22;
  • the thin film transistor layer 30 includes a plurality of data lines 31 and a plurality of scanning lines 32, and the data lines 31 are provided in each sub-pixel area. Between any two adjacent sub-pixel areas 101 in the group 100, the scan line 32 is provided between any two adjacent sub-pixel areas 100.
  • first reflective light-shielding part 21 is provided between any two adjacent sub-pixel blocks 100
  • second reflective light-shielding part 22 is provided between two adjacent sub-pixel areas 101 in at least one sub-pixel block 100.
  • the display module includes a plurality of sub-pixel blocks 100 arranged along the first direction X.
  • Each sub-pixel block 100 A plurality of sub-pixel areas 101 arranged along the second direction Y are provided inside, where the first direction X and the second direction Y intersect.
  • the angle between the first direction X and the second direction Y is determined. Without limitation, the angle between the first direction X and the second direction Y is 90° as an example for explanation.
  • the display module further includes a substrate 10 , a reflective light-shielding layer 20 disposed on the substrate 10 , a thin film transistor layer 30 disposed on the reflective light-shielding layer 20 , and an opposite side disposed on the side of the thin film transistor layer 30 away from the substrate 10
  • the backlight assembly 40 on the layer 20 side.
  • the thin film transistor layer 30 includes a plurality of data lines 31 and a plurality of scan lines 32, and each data line 31 is correspondingly arranged between any two adjacent sub-pixel areas 101 in each sub-pixel area group 100, and each scan line 32 is arranged correspondingly. Between any two adjacent sub-pixel blocks 100; specifically, a data line 31 is provided between any two adjacent sub-pixel areas 101 in each sub-pixel block 100, and any two adjacent sub-pixel areas A scan line 32 is set between 101 and 101.
  • the thin film transistor layer 30 also includes thin film transistors provided corresponding to each sub-pixel region 101, which may specifically include a gate electrode (not shown in the figure), an active layer 34, a source electrode 35 and a drain electrode 36, wherein, The active layer 34 can be located above the gate electrode, and both the source electrode 35 and the drain electrode 36 can be located above the active layer 34 and overlap both ends of the active layer 34; further, the reflective light-shielding layer 20 is located between the thin film transistor and the substrate 10 between the active layer 34 and the substrate 10 .
  • a gate electrode not shown in the figure
  • an active layer 34 can be located above the gate electrode
  • both the source electrode 35 and the drain electrode 36 can be located above the active layer 34 and overlap both ends of the active layer 34
  • the reflective light-shielding layer 20 is located between the thin film transistor and the substrate 10 between the active layer 34 and the substrate 10 .
  • a plurality of data lines 31 and a plurality of scan lines 32 are crisscrossed and arranged around each sub-pixel area 101, and one data line 31 and one scan line 32 are arranged corresponding to one sub-pixel area 101 to transfer data.
  • the signals and scanning signals are transmitted within the sub-pixel area 101; specifically, the corresponding gate electrode of each sub-pixel area 101 is connected to the corresponding scanning line 32, and the source electrode 35 is connected to the corresponding one data line 31.
  • each source electrode 35 and each drain electrode 36 can be arranged in the same layer as a plurality of data lines 31, and each gate electrode can be arranged in a same layer as a plurality of scan lines 32; further, the thin film transistor layer 30 can also include a layer arranged in A pixel electrode layer (not shown in the figure) above the source electrode 35 and the drain electrode 36, and the pixel electrode layer may include multiple pixel electrodes.
  • Each pixel electrode is correspondingly disposed in a sub-pixel region 101 and is connected to a corresponding
  • the drain electrode 36 of the sub-pixel area 101 is electrically connected to transmit the data signal in the data line 31 to the pixel electrode to control the deflection of the liquid crystal molecules in the corresponding liquid crystal layer of the sub-pixel area 101 to realize the display module. Display function.
  • the reflective light-shielding layer 20 is disposed between the substrate 10 and the thin film transistor layer 30.
  • the reflective light-shielding layer 20 includes a plurality of first reflective light-shielding parts 21 and at least one second reflective light-shielding part 22, wherein the first reflective light-shielding part 22
  • the light-shielding portion 21 is disposed between any two adjacent sub-pixel blocks 100
  • the second reflective light-shielding portion 22 is disposed between two adjacent sub-pixel areas 101 in at least one sub-pixel block 100 .
  • the reflective light-shielding layer 20 includes a plurality of second reflective light-shielding portions 22 , and the second reflective light-shielding portions 22 are provided between any two adjacent sub-pixel areas 101 in each sub-pixel block group 100 .
  • Each first reflective light-shielding portion 21 is disposed between any two adjacent sub-pixel blocks 100 and extends along the second direction Y; each second reflective light-shielding portion 22 is disposed in any corresponding sub-pixel block 100 . Between two adjacent sub-pixel areas 101 and between two adjacent first reflective light shielding portions 21 along the first direction X.
  • each second reflective light-shielding portion 22 is connected between two first reflective light-shielding portions 21 adjacent along the first direction X, so that the plurality of first reflective light-shielding portions 21 and the plurality of second reflective light-shielding portions are 22 are arranged around each sub-pixel area 101, as shown in FIG. 2 .
  • the material of the reflective light-shielding layer 20 includes at least one of Mo, Ti, and Al; and since Al has a high reflectivity, the material of the reflective light-shielding layer 20 in this embodiment is preferably Al.
  • the backlight assembly 40 is disposed on a side of the substrate 10 away from the reflective light-shielding layer 20 , and the backlight assembly 40 emits light along a side close to the substrate 10 ; optionally, the backlight assembly 40 includes a backlight source and an optical film set, and the optical The film group can specifically include light guide plates, reflective sheets and other optical films, which are not limited here.
  • a second reflective light-shielding portion 22 located between two adjacent sub-pixel regions 101 in at least one pixel group 100 is added to the reflective light-shielding layer 20 to improve the performance of the reflective light-shielding layer 20 for the backlight assembly 40
  • the reflectivity of the emitted light can improve the light utilization rate of the backlight assembly 40 by the display module, thereby improving the light efficiency of the display module and reducing the power consumption of the display module.
  • the first reflective light-shielding part 21 and the second reflective light-shielding part 22 are both disposed outside each sub-pixel area 101.
  • the embodiment of the present application improves the utilization rate of return light in the non-aperture area and improves the light efficiency of the display module on the premise of ensuring the aperture ratio of the display module.
  • the orthographic projection of the data line 31 on the substrate 10 and the orthographic projection of the scan line 32 on the substrate 10 are both located within the coverage of the orthographic projection of the reflective light shielding layer 20 on the substrate 10; in addition, the source electrode 35 and the drain electrode 36 and the orthographic projection of part of the active layer 34 on the substrate 10 can be located within the coverage of the orthographic projection of the reflective light shielding layer 20 on the substrate 10 .
  • the display module provided by the embodiment of the present application also includes a color filter layer 60 disposed between the liquid crystal layer 70 and the opposite substrate 50 , and the color filter layer 60 includes a black matrix 61 and a plurality of color resist blocks 62; wherein, The black matrix 61 includes a plurality of openings, and each color resist block 62 is correspondingly disposed in one opening.
  • each opening is provided corresponding to one sub-pixel area 101, so that the light emitted from each sub-pixel area 101 passes through each color block 62, so that each sub-pixel area 101 can emit light of the corresponding color;
  • the plurality of color resist blocks 62 may include red color resist blocks, green color resist blocks, and blue color resist blocks.
  • the orthographic projection of the reflective light-shielding layer 20 on the substrate 10 is located within the coverage of the orthographic projection of the black matrix 61 on the substrate 10 . That is, the reflective light-shielding layer 20 does not exceed the coverage area of the black matrix 61 to prevent the reflective light-shielding layer 20 from affecting the light emission of each sub-pixel area 101; and the orthographic projection area of the reflective light-shielding layer 20 on the substrate 10 occupies the area of the black matrix 61 on the substrate 10 The ratio of the orthographic projection area is greater than 20%.
  • the ratio of the orthographic projection area of the reflective light shielding layer 20 on the substrate 10 and corresponding to the display area to the orthographic projection area of the black matrix 61 on the substrate 10 and the corresponding display area is greater than or equal to 80%, and less than or equal to 100%; further, the difference between the distance between two adjacent openings along the first direction X and the width of the second reflective light shielding portion 22 along the first direction Equal to 2 microns; the difference between the distance between two adjacent openings along the second direction Y and the width of the second reflective light shielding portion 22 along the second direction Y is greater than or equal to 0.5 microns, and less than or equal to 2 Micron.
  • the thin film transistor layer 30 also includes a plurality of touch lines 33.
  • One touch line 33 is provided between two adjacent sub-pixel areas 101 in each sub-pixel block 100.
  • a touch line 33 is provided for every three sub-pixel areas 101 .
  • the number of specific spaced sub-pixel areas 101 is not limited here and can be selected according to actual needs.
  • the second reflective light shielding part 22 includes a second sub-part 221 and a third sub-part 222.
  • the width of the second sub-part 221 along the second direction Y is greater than the width of the third sub-part 222 along the second direction Y.
  • a touch line 33, a data line 31 and a second sub-section 221 are provided between any two adjacent sub-pixel areas 101 in each sub-pixel block group 100, and a touch line 33, a data line 31 They are all at least partially overlapped with a corresponding second sub-section 221; or, a data line 31 and a third sub-section 222 are provided between any two adjacent sub-pixel areas 101 in each sub-pixel block group 100.
  • the line 31 is at least partially overlapped with a corresponding third sub-portion 222 .
  • a second sub-section 221, a data line 31, and a touch line 33 are provided for every plurality of sub-pixel areas 101 along the second direction Y, and between the other two adjacent sub-pixel areas 101 A third sub-section 222 and a data line 31 are provided.
  • the width of the first reflective light shielding part 21 along the first direction X is greater than the width of the scan line 32 along the first direction X, and the width of the second reflective light shielding part 22 along the second direction The sum of the width of the line 31 along the second direction Y and the width of the touch line 33 along the second direction Y.
  • the light emitted by the backlight assembly 40 includes the light a that is incident into the sub-pixel area 101 and the light b that is incident outside the sub-pixel area 101 .
  • the light b After the light b reaches the reflective light-shielding layer 20 , it passes through the reflective light-shielding layer 20
  • the light c is reflected, and after the light c reaches the backlight assembly 40, it can be reflected by the reflective sheet in the backlight assembly 40 to obtain the light d, and the light d is injected into the sub-pixel area 101, thereby improving the utilization rate of the light emitted from the backlight assembly 40. , so that more light is emitted into the sub-pixel area 101, thereby improving the light efficiency of the display module.
  • the brightness of the display module can be increased, thereby effectively reducing the power consumption of the display module.
  • the reflective light-shielding layer 20 does not affect the emission of light a, that is, it does not affect the aperture ratio of the display module.
  • the reflective light shielding layer 20 is on the substrate 10 and the ratio of the orthographic projection area in the corresponding display area to the display area area is greater than or equal to 25% and less than or equal to 90%; further, the black matrix 61 is on the substrate 10 And the ratio of the orthographic projection area in the corresponding display area to the area of the display area is greater than or equal to 30% and less than or equal to 90%.
  • the ratio of the orthographic projection area of the reflective light-shielding layer 20 on the substrate 10 and corresponding to the display area to the area of the display area is greater than or equal to 25% and less than or equal to 70%.
  • Embodiment M1 adopts the light-shielding layer arrangement in the prior art, as shown in Figures 1 and 2;
  • Embodiments M2 and M3 adopt the structure of the reflective light-shielding layer 20 in the embodiments of the present application, as shown in Figures 4 and 2.
  • Figure 5 only the area ratio of the reflective light-shielding layer 20 in the control embodiments M2 and M3 is different; and the predicted light efficiency gain and measured light efficiency gain results corresponding to the three embodiments are obtained as shown in Table 1 below.
  • the area ratio is the ratio of the area of the reflective light-shielding layer 20 to the area of the display area of the display module; when the area ratio of the reflective light-shielding layer 20 is constant, the light effect of the display module is set to A.
  • the light efficiency of the display module is B, and the light efficiency gain of the display module is (A-B)/B.
  • Embodiment M2 and Embodiment M3 can effectively increase the area ratio of the reflective light-shielding layer 20 compared to Embodiment M1.
  • the area ratio of the reflective light-shielding layer 20 reaches 23.3%, the actual measured light effect gain Reaching 3%, when the area ratio of the reflective light-shielding layer 20 reaches 66.9%, the actual measured light effect gain reaches 10%. Therefore, it can be shown that by increasing the area ratio of the reflective light-shielding layer 20 in the embodiment of the present application, the light efficiency of the display panel can be effectively improved.
  • a second reflective light-shielding portion 22 located between two adjacent sub-pixel regions 101 in at least one pixel group 100 is added to the reflective light-shielding layer 20 to improve the performance of the reflective light-shielding layer 20 .
  • the reflectivity of the light emitted by the backlight component 40 improves the light utilization rate of the backlight component 40 by the display module, thereby improving the light efficiency of the display module and reducing the power consumption of the display module.
  • the first reflective light-shielding part 21 and the second reflective light-shielding part 22 are both disposed outside each sub-pixel area 101.
  • the embodiment of the present application improves the utilization rate of return light in the non-aperture area and improves the light efficiency of the display module on the premise of ensuring the aperture ratio of the display module.
  • each first reflective light shielding part 21 includes a plurality of first sub-parts 211 arranged along the second direction Y.
  • each One reflective light-shielding part 21 is spaced into a plurality of first sub-parts 211, so that each reflective light-shielding part 21 is divided into a plurality of first sub-parts 211 with smaller areas to avoid static electricity accumulation in the first reflective light-shielding part 21.
  • the signal coupling phenomenon between the first reflective light shielding part 21 and the scanning line 32 is not limited to parasitic capacitance.
  • the first reflective light-shielding portion 21 overlaps with multiple data lines 31 at the same time. Furthermore, the first reflective light-shielding portion 21 may cause signal coupling with both the positive and negative potential signal data lines 31 , which may cause the positive and negative potential signals of the data lines 31 to be coupled. interference between them.
  • the first reflective light-shielding part 21 and the second reflective light-shielding part 22 are spaced apart, and the second reflective light-shielding part 22 is insulated from the first reflective light-shielding part 21 , that is, the second reflective light-shielding part 22 only has an overlapping portion with one data line 31, and does not produce a signal coupling phenomenon with the data lines 31 of positive and negative potential signals at the same time, so as to improve the interference between the reflective light shielding layer 20 and the thin film transistor layer 30 due to the increase in area.
  • the signal coupling phenomenon improves the stability of signal transmission in the thin film transistor layer 30 .
  • the plurality of first sub-parts 211 in one first reflective light-shielding part 21 and the plurality of first sub-parts 211 in the other first reflective light-shielding part 21 are A plurality of first sub-parts 211 are arranged in one-to-one correspondence; wherein, at least 6 first sub-parts 211 arranged along the second direction Y are provided between two adjacent first reflective light-shielding parts 21 and two oppositely arranged first sub-parts 211 .
  • Sub-pixel area 101 is provided between two adjacent first reflective light-shielding parts 21 .
  • the 6 sub-pixel areas 101 may include 2 pixel units, that is, include 2 complete red, green, and blue sub-pixels, including 3 positive potential signals and 3 negative potential signals, so that each first sub-section 211 offsets the signal coupling generated between the plurality of data lines 31; and the number of sub-pixel areas 101 between two adjacent first sub-portions 211 can be an integer multiple of 6, so that each first sub-portion 211 This is offset by signal coupling occurring between the plurality of data lines 31 .
  • the distance between adjacent first reflective light-shielding parts 21 and second reflective light-shielding parts 22 is greater than or equal to 1 micron and less than or equal to 3 microns, and the distance between two adjacent first reflective light-shielding parts 21 in the same first reflective light-shielding part 21
  • the distance between the first sub-sections 211 is greater than or equal to 1 micron and less than or equal to 3 microns.
  • a second reflective light-shielding portion 22 located between two adjacent sub-pixel regions 101 in at least one pixel group 100 is added to the reflective light-shielding layer 20 to improve the performance of the reflective light-shielding layer 20 .
  • the reflectivity of the light emitted by the backlight component 40 improves the light utilization rate of the backlight component 40 by the display module, thereby improving the light efficiency of the display module and reducing the power consumption of the display module.
  • the first reflective light-shielding part 21 and the second reflective light-shielding part 22 are both disposed outside each sub-pixel area 101.
  • the embodiment of the present application improves the utilization rate of return light in the non-aperture area and improves the light efficiency of the display module on the premise of ensuring the aperture ratio of the display module.
  • the first reflective light-shielding part 21 is also divided into a plurality of first sub-parts 211, and the first reflective light-shielding part 21 is separated from the second reflective light-shielding part 22, which can effectively
  • the signal coupling phenomenon between the reflective light shielding layer 20 and the thin film transistor layer 30 is improved, the signal transmission stability in the thin film transistor layer 30 is improved, and the display effect of the display module is improved.
  • the second sub-part 221 includes first units spaced apart along the second direction Y. 2211 and the second unit 2212, wherein the first unit 2211 is at least partially overlapped with the data line 31, and the second unit 2212 is at least partially overlapped with the touch line 33.
  • both the data line 31 and the touch line 33 are prone to signal coupling with the same second sub-section 221, the signal transmission between the data line 31 and the touch line 33 is prone to interfere with each other.
  • the two sub-parts 221 are divided into a first unit 2211 that has an overlapping portion with the data line 31 and a second unit 2212 that has an overlapping portion with the touch line 33, thereby avoiding signal transmission between the data line 31 and the touch line 33.
  • Mutual interference improves the signal transmission stability of the data line 31 and the touch line 33, and improves the display effect and touch effect of the display module.
  • the distance between the first unit 2211 and the second unit 2212 in the same second sub-section 221 is greater than or equal to 1 micron and less than or equal to 3 micron.
  • a second reflective light-shielding portion 22 located between two adjacent sub-pixel regions 101 in at least one pixel group 100 is added to the reflective light-shielding layer 20 to improve the performance of the reflective light-shielding layer 20 .
  • the reflectivity of the light emitted by the backlight component 40 improves the light utilization rate of the backlight component 40 by the display module, thereby improving the light efficiency of the display module and reducing the power consumption of the display module.
  • the first reflective light-shielding part 21 and the second reflective light-shielding part 22 are both disposed outside each sub-pixel area 101.
  • the embodiment of the present application improves the utilization rate of return light in the non-aperture area and improves the light efficiency of the display module on the premise of ensuring the aperture ratio of the display module.
  • the first reflective light-shielding part 21 is also divided into a plurality of first sub-parts 211, and the first reflective light-shielding part 21 is separated from the second reflective light-shielding part 22, which can effectively
  • the signal coupling phenomenon between the reflective light shielding layer 20 and the thin film transistor layer 30 is improved, the signal transmission stability in the thin film transistor layer 30 is improved, and the display effect of the display module is improved.
  • the embodiment of the present application also divides the second sub-section 221 that overlaps the data line 31 and the touch line 33 into a first unit 2211 and a second unit 2212, thereby avoiding the need for interlocking between the data line 31 and the touch line 33. The signal transmission between them interferes with each other, which improves the signal transmission stability of the data line 31 and the touch line 33, and improves the display effect and touch effect of the display module.
  • embodiments of the present application also provide a display device, which includes a device main body and the display module described in the above embodiments, and the device main body and the display module are combined into one body.
  • the device body may include a middle frame, frame glue, etc.
  • the display device may be a mobile phone, tablet, TV, VR (virtual reality) and other display terminals, which are not limited here.

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Abstract

本申请公开了一种显示模组及显示装置。其中，反射遮光层在基底上且对应显示区内的正投影位于黑色矩阵在基底上且对应显示区内的正投影的覆盖范围以内，反射遮光层在基底上且对应显示区内的正投影面积占黑色矩阵在基底上且对应显示区内的正投影面积的比值大于20％。

Description

显示模组及显示装置 技术领域
本申请涉及移动通信技术领域，尤其涉及一种显示模组及具有该显示模组的显示装置。
背景技术
液晶显示器(Liquid Crystal Display，LCD)是利用电场强度的变化，改变液晶分子的取向控制透光的强弱来显示图像。目前，液晶显示器由于其具有的重量轻、体积小、厚度薄的特点，已广泛地被用在各种大中小尺寸的终端显示设备中。
在液晶显示器中，其光效是指背光源透过面板前后的光强之比；而在现有的液晶显示器中，由于面板中各膜层的折射率和透光率的影响，现有液晶显示器的光效只有3-10％，其中，超过90％的光是无法得到利用的。
因此，现有的液晶显示器中对光线的利用率极低。
技术问题
本申请实施例提供一种显示模组及显示装置，能够通提高显示模组对背光组件的光线利用率，提高显示模组的光效。
技术解决方案
本申请实施例提供一种显示模组，包括：
基底；
反射遮光层，设置于所述基底上；
薄膜晶体管层，设置于所述反射遮光层远离所述基底的一侧；
黑色矩阵，设置于所述薄膜晶体管层远离所述反射遮光层的一侧；
背光组件，设置于所述基底远离所述反射遮光层的一侧；
其中，所述显示模组包括显示区，所述反射遮光层在所述基底上且对应所述显示区内的正投影位于所述黑色矩阵在所述基底上且对应所述显示区内的正投影的覆盖范围以内，所述反射遮光层在所述基底上且对应所述显示区内的 正投影面积占所述黑色矩阵在所述基底上且对应所述显示区内的正投影面积的比值大于20％。
在本申请的一种实施例中，所述反射遮光层在所述基底上且对应所述显示区内的正投影面积占所述黑色矩阵在所述基底上且对应所述显示区内的正投影面积的比值大于或等于80％，且小于或等于100％。
在本申请的一种实施例中，所述显示模组包括设置于所述显示区内并沿第一方向排列的多个子像素区组，每一所述子像素区组内设置有沿第二方向排列的多个子像素区，且所述第一方向与所述第二方向相交；
所述反射遮光层包括多个第一反射遮光部以及至少一个第二反射遮光部；
所述薄膜晶体管层包括多个数据线以及多个扫描线，且所述数据线设置于各所述子像素区组内的任意相邻两个所述子像素区之间，所述扫描线设置于任意相邻的两个所述子像素区组之间；
其中，所述第一反射遮光部设置于任意相邻的两个所述子像素区组之间，所述第二反射遮光部设置于至少一个所述子像素区组内的相邻两个所述子像素区之间。
在本申请的一种实施例中，所述反射遮光层包括多个所述第二反射遮光部，各所述子像素区组内的任意相邻两个所述子像素区之间皆设置有所述第二反射遮光部。
在本申请的一种实施例中，每一所述第一反射遮光部设置于任意相邻两个所述子像素区组之间，且沿所述第二方向延伸；
每一所述第二反射遮光部设置于对应的所述子像素区组内的任意相邻两个所述子像素区之间，且位于沿所述第一方向相邻的两个所述第一反射遮光部之间。
在本申请的一种实施例中，所述数据线在所述基底上的正投影、所述扫描线在所述基底上的正投影皆位于所述反射遮光层在所述基底上的正投影的覆盖范围内。
在本申请的一种实施例中，每一所述第二反射遮光部连接于沿所述第一方向相邻的两个所述第一反射遮光部之间，以使得多个所述第一反射遮光部和多个所述第二反射遮光部围绕各所述子像素区设置。
在本申请的一种实施例中，所述第一反射遮光部与所述第二反射遮光部相间隔设置。
在本申请的一种实施例中，每一所述第一反射遮光部包括间隔设置的多个第一子部，同一所述第一反射遮光部中的多个所述第一子部沿所述第二方向排列。
在本申请的一种实施例中，相邻两所述第一反射遮光部之间，其中一所述第一反射遮光部中的多个所述第一子部与另一所述第一反射遮光部中的多个所述第一子部一一对应设置；
其中，相邻两个所述第一反射遮光部中且相对设置的两个所述第一子部之间设置有沿所述第二方向排列的至少6个所述子像素区。
在本申请的一种实施例中，所述薄膜晶体管层还包括多个触控线，所述第二反射遮光部包括第二子部以及第三子部，所述第二子部沿所述第二方向上的宽度大于所述第三子部沿所述第二方向上的宽度；
其中，各所述子像素区组内的任意相邻两个所述子像素区之间设置有一所述触控线、一所述数据线以及一所述第二子部，且一所述触控线、一所述数据线皆与对应的一所述第二子部至少部分重叠设置；
或者，各所述子像素区组内的任意相邻两个所述子像素区之间设置有一所述数据线以及一所述第三子部，一所述数据线与对应的一所述第三子部至少部分重叠设置。
在本申请的一种实施例中，所述第二子部包括沿所述第二方向相间隔设置的第一单元和第二单元，其中，所述第一单元与所述数据线至少部分重叠设置，所述第二单元与所述触控线至少部分重叠设置。
在本申请的一种实施例中，所述第一反射遮光部沿所述第一方向上的宽度大于所述扫描线沿所述第一方向上的宽度，所述第二反射遮光部沿所述第二方向上的宽度大于所述数据线沿所述第二方向上的宽度以及所述触控线沿所述第二方向上的宽度之和。
在本申请的一种实施例中，所述黑色矩阵包括多个开口，一所述开口与一所述子像素区相对应设置；
其中，沿所述第一方向相邻的两个所述开口之间的距离与所述第一反射遮 光部沿所述第一方向上的宽度之间的差值大于或等于0.5微米，且小于或等于2微米；
沿所述第二方向相邻的两个所述开口之间的距离与所述第二反射遮光部沿所述第二方向上的宽度之间的差值大于或等于0.5微米，且小于或等于2微米。
在本申请的一种实施例中，所述薄膜晶体管层还包括设置于所述显示区内的薄膜晶体管，且所述反射遮光层设置于所述薄膜晶体管和所述基底之间。
在本申请的一种实施例中，所述反射遮光层在所述基底上且对应所述显示区内的正投影面积占所述显示区面积的比值大于或等于25％，且小于或等于90％。
在本申请的一种实施例中，所述反射遮光层在所述基底上且对应所述显示区内的正投影面积占所述显示区面积的比值大于或等于25％，且小于或等于70％。
根据本申请的上述目的，本申请实施例还提供一种显示装置，所述显示装置包括装置主体、以及显示模组，且所述装置主体与所述显示模组组合为一体；
所述显示模组包括：
基底；
反射遮光层，设置于所述基底上；
薄膜晶体管层，设置于所述反射遮光层远离所述基底的一侧；
黑色矩阵，设置于所述薄膜晶体管层远离所述反射遮光层的一侧；
背光组件，设置于所述基底远离所述反射遮光层的一侧；
其中，所述显示模组包括显示区，所述反射遮光层在所述基底上且对应所述显示区内的正投影位于所述黑色矩阵在所述基底上且对应所述显示区内的正投影的覆盖范围以内，所述反射遮光层在所述基底上且对应所述显示区内的正投影面积占所述黑色矩阵在所述基底上且对应所述显示区内的正投影面积的比值大于20％。
在本申请的一种实施例中，所述反射遮光层在所述基底上且对应所述显示区内的正投影面积占所述黑色矩阵在所述基底上且对应所述显示区内的正投影面积的比值大于或等于80％，且小于或等于100％。
在本申请的一种实施例中，所述显示模组包括设置于所述显示区内并沿第一方向排列的多个子像素区组，每一所述子像素区组内设置有沿第二方向排列的多个子像素区，且所述第一方向与所述第二方向相交；
所述反射遮光层包括多个第一反射遮光部以及至少一个第二反射遮光部；
所述薄膜晶体管层包括多个数据线以及多个扫描线，且所述数据线设置于各所述子像素区组内的任意相邻两个所述子像素区之间，所述扫描线设置于任意相邻的两个所述子像素区组之间；
其中，所述第一反射遮光部设置于任意相邻的两个所述子像素区组之间，所述第二反射遮光部设置于至少一个所述子像素区组内的相邻两个所述子像素区之间。
有益效果
相较于现有技术，在本申请中，反射遮光层在基底上的正投影面积占黑色矩阵在基底上的正投影面积的比值大于20％，以增加显示区内反射遮光层的面积占比，以提高反射遮光层对于背光组件发出光线的反射率，以提高显示模组对背光组件的光线利用率，进而可以提高显示模组的光效，降低显示模组的功耗；此外，反射遮光层在基底上的正投影位于黑色矩阵在基底上的正投影的覆盖范围以内，即本申请可以防止反射遮光层超出黑色矩阵的覆盖范围，进而避免了反射遮光层对显示模组的显示面一侧造成反光，提高了显示模组的显示效果。
附图说明
下面结合附图，通过对本申请的具体实施方式详细描述，将使本申请的技术方案及其它有益效果显而易见。
图1为本申请实施例提供的显示模组的一种结构示意图；
图2为本申请实施例提供的反射遮光层的一种结构示意图；
图3为本申请实施例提供的反射遮光层与薄膜晶体管层的一种平面分布结构示意图；
图4为相关技术中子像素区与遮光层的分布结构示意图；
图5为相关技术中子像素区内的结构示意图；
图6为本申请实施例提供的反射遮光层的另一种结构示意图；
图7为本申请实施例提供的反射遮光层与薄膜晶体管层的另一种平面分布结构示意图；
图8为本申请实施例提供的反射遮光层的另一种结构示意图；
图9为本申请实施例提供的反射遮光层与薄膜晶体管层的另一种平面分布结构示意图。
本发明的实施方式
下面将结合本申请实施例中的附图，对本申请实施例中的技术方案进行清楚、完整地描述。显然，所描述的实施例仅仅是本申请一部分实施例，而不是全部的实施例。基于本申请中的实施例，本领域技术人员在没有作出创造性劳动前提下所获得的所有其他实施例，都属于本申请保护的范围。
下文的公开提供了许多不同的实施方式或例子用来实现本申请的不同结构。为了简化本申请的公开，下文中对特定例子的部件和设置进行描述。当然，它们仅仅为示例，并且目的不在于限制本申请。此外，本申请可以在不同例子中重复参考数字和/或参考字母，这种重复是为了简化和清楚的目的，其本身不指示所讨论各种实施方式和/或设置之间的关系。此外，本申请提供了的各种特定的工艺和材料的例子，但是本领域普通技术人员可以意识到其他工艺的应用和/或其他材料的使用。
请参照图1以及图2，在相关技术的显示面板中，多个数据信号线1与多个扫描信号线2纵横交错，以在显示面板中限定出多个子像素区3，而各子像素区3内设置有薄膜晶体管，具体可以包括有源层4、源电极5以及漏电极6；而相关技术中，为了避免光线照射至有源层4上，以影响薄膜晶体管的稳定性，进而常在有源层4下方设置遮光层7，以起到遮挡光线的作用。因此，相关技术中，遮光层7仅设置于有源层4下方，其面积占比较小，对于光线的反射率较低。
请参照图3，本申请实施例提供一种显示模组，该显示模组包括显示区；且该显示模组还包括基底10、反射遮光层20、薄膜晶体管层30以及背光组件40；其中，反射遮光层20设置于基底10上；薄膜晶体管层30设置于反射遮 光层20远离基底10的一侧；黑色矩阵61设置于薄膜晶体管层30远离反射遮光层20的一侧；背光组件40设置于基底10远离反射遮光层20的一侧。
进一步地，反射遮光层20在基底10上且对应显示区内的正投影位于黑色矩阵61在基底10上且对应显示区内的正投影的覆盖范围以内，反射遮光层20在基底10上且对应显示区内的正投影面积占黑色矩阵61在基底10上且对应显示区内的正投影面积的比值大于20％。
在实施应用过程中，本申请实施例通过增加显示区内反射遮光层20的面积占比，使得反射遮光层20在基底10上的正投影面积占黑色矩阵61在基底10上的正投影面积的比值大于20％，以提高反射遮光层20对于背光组件40发出光线的反射率，以提高显示模组对背光组件40的光线利用率，进而可以提高显示模组的光效，降低显示模组的功耗；此外，反射遮光层20在基底10上的正投影位于黑色矩阵61在基底10上的正投影的覆盖范围以内，即本申请可以防止反射遮光层20超出黑色矩阵61的覆盖范围，进而避免了反射遮光层20对显示模组的显示面一侧造成反光，提高了显示模组的显示效果。
进一步地，请参照图3、图4以及图5，本申请实施例提供一种显示模组，该显示模组包括设置于显示区内并沿第一方向X排列的多个子像素区组100，每一子像素区组100内设置有沿第二方向Y排列的多个子像素区101，且第一方向X与第二方向Y相交。
反射遮光层20包括多个第一反射遮光部21以及至少一第二反射遮光部22；薄膜晶体管层30包括多个数据线31以及多个扫描线32，且数据线31设置于各子像素区组100内的任意相邻两个子像素区101之间，扫描线32设置于任意相邻的两个子像素区组100之间。
进一步地，第一反射遮光部21设置于任意相邻的两个子像素区组100之间，第二反射遮光部22设置于至少一个子像素区组100内的相邻两个子像素区101之间。
下面对结合具体实施例对本申请提供的显示模组中，反射遮光层20的结构分布进行详述。
具体地，在本申请的一种实施例中，请继续参照图3、图4以及图5，该显示模组包括沿第一方向X排列的多个子像素区组100，各子像素区组100内 设置有沿第二方向Y排列的多个子像素区101，其中，第一方向X与第二方向Y相交，本申请实施例中对第一方向X与第二方向Y之间的夹角大小并不作限定，第一方向X与第二方向Y之间的夹角为90°为例，进行说明。
进一步地，该显示模组还包括基底10、设置于基底10上的反射遮光层20、设置于反射遮光层20上的薄膜晶体管层30、设置于薄膜晶体管层30远离基底10一侧的对置基板50、设置于对置基板50靠近薄膜晶体管层30一侧的彩色滤光层60、设置于彩色滤光层60和薄膜晶体管层30一侧的液晶层70、以及设置于基底10远离反射遮光层20一侧的背光组件40。
薄膜晶体管层30包括多个数据线31以及多个扫描线32，且各数据线31对应设置于各子像素区组100内的任意相邻两个子像素区101之间，各扫描线32对应设置于任意相邻两个子像素区组100之间；具体地，各子像素区组100内的任意相邻两个子像素区101之间皆设置有一个数据线31，任意相邻的两个子像素区101之间皆设置一个扫描线32。
此外，薄膜晶体管层30还包括设置于对应各子像素区101设置的薄膜晶体管，具体可包括栅极(图中并未示出)、有源层34、源极35以及漏极36，其中，有源层34可位于栅极上方，源极35和漏极36皆可位于有源层34上方并与有源层34的两端搭接；进一步地，反射遮光层20位于薄膜晶体管和基底10之间，并可具***于有源层34和基底10之间。
可理解的是，多个数据线31与多个扫描线32横纵交错，以围绕各子像素区101设置，且一个数据线31与一个扫描线32对应一个子像素区101设置，以将数据信号以及扫描信号传输子像素区101内；具体地，各子像素区101对应的栅极连接于对应的扫描线32、源极35连接于对应的一个数据线31。
可选的，各源极35和各漏极36可与多个数据线31同层设置，各栅极可与多个扫描线32同层设置；进一步地，薄膜晶体管层30还可以包括设置于源极35和漏极36上方的像素电极层(图中并未示出)，而像素电极层可包括多个像素电极，每一个像素电极对应设置于一个子像素区101内，并与对应的子像素区101的漏极36电性连接，以将数据线31内的数据信号传输至像素电极内，以控制该子像素区101对应液晶层中的液晶分子的偏转，以实现显示模组的显示功能。
进一步地，反射遮光层20设置于基底10和薄膜晶体管层30之间，具体地，反射遮光层20包括多个第一反射遮光部21和至少一个第二反射遮光部22，其中，第一反射遮光部21设置于任意相邻的两个子像素区组100之间，第二反射遮光部22设置于至少一个子像素区组100内的相邻两个子像素区101之间。
在本实施例中，反射遮光层20包括多个第二反射遮光部22，各子像素区组100内的任意相邻两个子像素区101之间皆设置有第二反射遮光部22。
每一第一反射遮光部21设置于任意相邻两个子像素区组100之间，且沿第二方向Y延伸；每一第二反射遮光部22设置于对应的子像素区组100内的任意相邻两个子像素区101之间，且位于沿第一方向X相邻的两个第一反射遮光部21之间。
具体地，每一第二反射遮光部22连接于沿第一方向X相邻的两个第一反射遮光部21之间，以使得多个第一反射遮光部21和多个第二反射遮光部22围绕各子像素区101设置，如图2所示。
可选的，反射遮光层20的材料包括Mo、Ti、Al中的至少一者；且由于Al的反射率较高，因此，本实施例中反射遮光层20的材料优选为Al。
此外，背光组件40设置于基底10远离反射遮光层20的一侧，且背光组件40的沿靠近基底10的一侧出光；可选的，背光组件40包括背光源以及光学膜片组，且光学膜片组具体可包块导光板以及反射片等光学膜片，在此不作限定。
本申请实施例中，通过在反射遮光层20中增设位于至少一个像素区组100内的相邻两个子像素区101之间的第二反射遮光部22，以提高反射遮光层20对于背光组件40发出光线的反射率，以提高显示模组对背光组件40的光线利用率，进而可以提高显示模组的光效，降低显示模组的功耗。且本申请实施例中第一反射遮光部21和第二反射遮光部22皆设置于各子像素区101以外，进而反射遮光层20在对背光组件40的出光进行反射时，也不会影响各子像素区101的透光，因此，本申请实施例在保证显示模组开口率的前提下，提高了非开口区的回光利用率，提高了显示模组的光效。
进一步地，数据线31在基底10上的正投影、扫描线32在基底10上的正 投影皆位于反射遮光层20在基底10上的正投影的覆盖范围内；此外，源极35、漏极36以及部分有源层34在基底10上的正投影皆可位于反射遮光层20在基底10上的正投影的覆盖范围以内。
本申请实施例提供的显示模组还包括设置于液晶层70和对置基板50之间的彩色滤光层60，而彩色滤光层60包括黑色矩阵61以及多个色阻块62；其中，黑色矩阵61包括多个开口，而每一色阻块62对应设置于一个开口内。
需要说明的是，每一开口皆与一个子像素区101对应设置，以使得各子像素区101的出光经过各色阻块62，使得各子像素区101可以发出对应颜色的光线；可选的，多个色阻块62可以包括红色色阻块、绿色色阻块以及蓝色色阻块。
在本申请实施例中，反射遮光层20在基底10上的正投影位于黑色矩阵61在基底10上的正投影的覆盖范围内。即反射遮光层20不超出黑色矩阵61的覆盖范围，以避免反射遮光层20影响各子像素区101的出光；且反射遮光层20在基底10上的正投影面积占黑色矩阵61在基底10上的正投影面积的比值大于20％。
可选的，反射遮光层20在基底10上且对应显示区内的正投影面积占黑色矩阵61在基底10上且对应显示区内的正投影面积的比值大于或等于80％，且小于或等于100％；进一步地，沿第一方向X相邻的两个开口之间的距离与第二反射遮光部22沿第一方向X上的宽度之间的差值大于或等于0.5微米，且小于或等于2微米；沿第二方向Y相邻的两个开口之间的距离与第二反射遮光部22沿第二方向Y上的宽度之间的差值大于或等于0.5微米，且小于或等于2微米。
另外，薄膜晶体管层30还包括多个触控线33，各子像素区组100内的部分相邻两个子像素区101之间皆设置有一个触控线33，例如在各子像素区组100内，每隔三个子像素区101设置一个触控线33。且具体间隔的子像素区101的数量在此不作限定，可根据实际需求进行选择。
第二反射遮光部22包括第二子部221以及第三子部222，第二子部221沿第二方向Y上的宽度大于第三子部222沿第二方向Y上的宽度。
其中，各子像素区组100内的任意相邻两个子像素区101之间设置有一触 控线33、一数据线31以及一第二子部221，且一触控线33、一数据线31皆与对应的一第二子部221至少部分重叠设置；或者，各子像素区组100内的任意相邻两个子像素区101之间设置有一数据线31以及一第三子部222，一数据线31与对应的一第三子部222至少部分重叠设置。即在本申请实施例中，沿第二方向Y每隔多个子像素区101设置一个第二子部221、数据线31、以及一个触控线33，而其他相邻两个子像素区101之间设置一个第三子部222、以及一个数据线31。
在本申请实施例中，第一反射遮光部21沿第一方向X上的宽度大于扫描线32沿第一方向X上的宽度，第二反射遮光部22沿第二方向X上的宽度大于数据线31沿第二方向Y上的宽度以及触控线33沿第二方向Y上的宽度之和。
请参照图3，背光组件40发出的光线包括射入子像素区101内光线a以及射入子像素区101外的光线b，其中，光线b达到反射遮光层20之后，藉由反射遮光层20反射得到光线c，而光线c达到背光组件40后，可通过背光组件40中的反射片反射得到光线d，而光线d射入子像素区101内，进而可以提高背光组件40出射光线的利用率，使得更多的光效射入子像素区101内，提高显示模组的光效，在功率一定的前提下可以提高显示模组的亮度，进而可以有效降低显示模组的功耗。且反射遮光层20并不影响光线a的出射，即不会影响显示模组的开口率。
可选的，反射遮光层20在基底10上且对应显示区内的正投影面积占显示区面积的比值大于或等于25％，且小于或等于90％；进一步地，黑色矩阵61在基底10上且对应显示区内的正投影面积占显示区面积的比值大于或等于30％，且小于或等于90％。
进一步优选的，反射遮光层20在基底10上且对应显示区内的正投影面积占显示区面积的比值大于或等于25％，且小于或等于70％。
如下表所示，为本申请实施例中对反射遮光层20的在不同面积占比下，对光效的增益情况，具体提供M1、M2以及M3三个实施例进行验证，且三个实施例的验证对象皆为6寸的FHD显示模组。其中，实施例M1为采用现有技术中的遮光层设置，如图1和图2所示；实施例M2和M3为采用本申请 实施例中反射遮光层20的结构进行设置，如图4和图5所示，仅控制实施例M2和M3中反射遮光层20的面积占比不同；且得到如下表一所示的三个实施例对应的预计光效增益和实测光效增益结果。
表一反射遮光层的面积占比与光效增益结果表
实施例 面积占比 预计光效增益 实测光效增益
M1 7.2％ 1.11％ 1.4％
M2 23.3％ 3.93％ 3.0％
M3 66.9％ 12.70％ 10.0％
其中，面积占比为反射遮光层20的面积与显示模组的显示区面积的比值；当反射遮光层20的面积占比一定时，显示模组的光效设为A，当显示模组不设置反射遮光层20时，显示模组的光效为B，则显示模组的光效增益为(A-B)/B。
由上表可知，实施例M2和实施例M3相对于实施例M1可以有效增加反射遮光层20的面积占比，同时，当反射遮光层20的面积占比达到23.3％时，其实测光效增益达到3％，当反射遮光层20的面积占比达到66.9％时，其实测光效增益达到10％。因此，可以表明，本申请实施例中通过增加反射遮光层20的面积占比，可以有效提高显示面板的光效。
承上，本申请实施例中，通过在反射遮光层20中增设位于至少一个像素区组100内的相邻两个子像素区101之间的第二反射遮光部22，以提高反射遮光层20对于背光组件40发出光线的反射率，以提高显示模组对背光组件40的光线利用率，进而可以提高显示模组的光效，降低显示模组的功耗。且本申请实施例中第一反射遮光部21和第二反射遮光部22皆设置于各子像素区101以外，进而反射遮光层20在对背光组件40的出光进行反射时，也不会影响各子像素区101的透光，因此，本申请实施例在保证显示模组开口率的前提下，提高了非开口区的回光利用率，提高了显示模组的光效。
在本申请的另一种实施例中，请参照图6以及图7，本实施例与上一个实施例的区别之处在于：第一反射遮光部21与第二反射遮光部22之间相间隔设 置，且每一个第一反射遮光部21包括沿第二方向Y排列的多个第一子部211。
在本实施例中，由于第一反射遮光部21与扫描线32具有重叠部分，进而容易产生寄生电容，产生信号耦合现象，使得扫描线32传输的扫描信号受到影响，进而本实施例中将每一个反射遮光部21间隔为多个第一子部211，以使得每一个反射遮光部21分隔为面积较小的多个第一子部211，以避免第一反射遮光部21出现静电积累，以第一反射遮光部21与扫描线32之间的信号耦合现象。
此外，由于显示模组内的多个子像素区101常采用列反转的方式进行驱动，即沿第二方向Y排列的相邻两列子像素区101对应的数据线31的数据信号电位相反，由于第一反射遮光部21同时与多个数据线31重叠，进而第一反射遮光部21可能会与正负电位信号的数据线31皆产生信号耦合现象，进而可能使得数据线31的正负电位信号之间产生干扰。而本实施例中还将第一反射遮光部21与第二反射遮光部22之间进行间隔，进而第二反射遮光部22与第一反射遮光部21之间相绝缘，即第二反射遮光部22仅与一个数据线31具有重叠部分，而不会同时与正负电位信号的数据线31之间产生信号耦合现象，以改善反射遮光层20由于面积增加后与薄膜晶体管层30之间产生的信号耦合现象，提高了薄膜晶体管层30中信号传输的稳定性。
可选的，在本实施例中，相邻两个第一反射遮光部21之间，其中一第一反射遮光部21中的多个第一子部211与另一第一反射遮光部21中的多个第一子部211一一对应设置；其中，相邻两个第一反射遮光部21中且相对设置的两个第一子部211之间设置有沿第二方向Y排列的至少6个子像素区101。例如，6个子像素区101可以包括2个像素单元，即包括2个完整的红、绿、蓝子像素，其中包括3个正电位信号和3个负电位信号，可使得每一第一子部211与多个数据线31之间的产生信号耦合相抵消；且相邻两个第一子部211之间子像素区101的数量可为6的整数倍，以使得每一第一子部211与多个数据线31之间的产生信号耦合相抵消。
可选的，相邻的第一反射遮光部21与第二反射遮光部22之间的距离大于或等于1微米，且小于或等于3微米，同一个第一反射遮光部21中的相邻两个第一子部211之间的距离大于或等于1微米，且小于或等于3微米。
承上，本申请实施例中，通过在反射遮光层20中增设位于至少一个像素区组100内的相邻两个子像素区101之间的第二反射遮光部22，以提高反射遮光层20对于背光组件40发出光线的反射率，以提高显示模组对背光组件40的光线利用率，进而可以提高显示模组的光效，降低显示模组的功耗。且本申请实施例中第一反射遮光部21和第二反射遮光部22皆设置于各子像素区101以外，进而反射遮光层20在对背光组件40的出光进行反射时，也不会影响各子像素区101的透光，因此，本申请实施例在保证显示模组开口率的前提下，提高了非开口区的回光利用率，提高了显示模组的光效。进一步地，本申请实施例中，还通过将第一反射遮光部21分隔为多个第一子部211、以及将第一反射遮光部21与第二反射遮光部22分隔开，进而可以有效改善反射遮光层20与薄膜晶体管层30之间产生的信号耦合现象，提高了薄膜晶体管层30中的信号传输稳定性，提高了显示模组的显示效果。
在本申请的另一种实施例，请参照图8和图9，本实施例与上一个实施例的区别之处在于：第二子部221包括沿第二方向Y相间隔设置的第一单元2211和第二单元2212，其中，第一单元2211与数据线31至少部分重叠设置，第二单元2212与触控线33至少部分重叠设置。
由于数据线31和触控线33皆容易与同一第二子部221产生信号耦合，进而数据线31和触控线33之间的信号传输容易相互干扰，而本实施例中，通过将与第二子部221分隔为与数据线31具有重叠部分的第一单元2211、以及与触控线33具有重叠部分的第二单元2212，进而可以避免数据线31和触控线33之间的信号传输相互干扰，提高了数据线31和触控线33的信号传输稳定性，提高了显示模组的显示效果和触控效果。
可选的，同一第二子部221内的第一单元2211与第二单元2212之间的距离大于或等于1微米，且小于或等于3微米。
承上，本申请实施例中，通过在反射遮光层20中增设位于至少一个像素区组100内的相邻两个子像素区101之间的第二反射遮光部22，以提高反射遮光层20对于背光组件40发出光线的反射率，以提高显示模组对背光组件40的光线利用率，进而可以提高显示模组的光效，降低显示模组的功耗。且本申请实施例中第一反射遮光部21和第二反射遮光部22皆设置于各子像素区 101以外，进而反射遮光层20在对背光组件40的出光进行反射时，也不会影响各子像素区101的透光，因此，本申请实施例在保证显示模组开口率的前提下，提高了非开口区的回光利用率，提高了显示模组的光效。进一步地，本申请实施例中，还通过将第一反射遮光部21分隔为多个第一子部211、以及将第一反射遮光部21与第二反射遮光部22分隔开，进而可以有效改善反射遮光层20与薄膜晶体管层30之间产生的信号耦合现象，提高了薄膜晶体管层30中的信号传输稳定性，提高了显示模组的显示效果。另外，本申请实施例还将与数据线31和触控线33具有重叠部分的第二子部221分隔为第一单元2211和第二单元2212，进而可以避免数据线31和触控线33之间的信号传输相互干扰，提高了数据线31和触控线33的信号传输稳定性，提高了显示模组的显示效果和触控效果。
另外，本申请实施例还提供一种显示装置，该显示装置包括装置主体、以及上述实施例中所述的显示模组，且装置主体与显示模组组合为一体。
本申请实施例中，该装置主体可以包括中框、框胶等，该显示装置可以为手机、平板、电视以及VR(虚拟现实)等显示终端，在此不做限定。
在上述实施例中，对各个实施例的描述都各有侧重，某个实施例中没有详述的部分，可以参见其他实施例的相关描述。
以上对本申请实施例所提供的一种显示模组及显示装置进行了详细介绍，本文中应用了具体个例对本申请的原理及实施方式进行了阐述，以上实施例的说明只是用于帮助理解本申请的技术方案及其核心思想；本领域的普通技术人员应当理解：其依然可以对前述各实施例所记载的技术方案进行修改，或者对其中部分技术特征进行等同替换；而这些修改或者替换，并不使相应技术方案的本质脱离本申请各实施例的技术方案的范围。

Claims (20)

  1. 一种显示模组，其包括：
    基底；
    反射遮光层，设置于所述基底上；
    薄膜晶体管层，设置于所述反射遮光层远离所述基底的一侧；
    黑色矩阵，设置于所述薄膜晶体管层远离所述反射遮光层的一侧；
    背光组件，设置于所述基底远离所述反射遮光层的一侧；
    其中，所述显示模组包括显示区，所述反射遮光层在所述基底上且对应所述显示区内的正投影位于所述黑色矩阵在所述基底上且对应所述显示区内的正投影的覆盖范围以内，所述反射遮光层在所述基底上且对应所述显示区内的正投影面积占所述黑色矩阵在所述基底上且对应所述显示区内的正投影面积的比值大于20％。
  2. 根据权利要求1所述的显示模组，其中，所述反射遮光层在所述基底上且对应所述显示区内的正投影面积占所述黑色矩阵在所述基底上且对应所述显示区内的正投影面积的比值大于或等于80％，且小于或等于100％。
  3. 根据权利要求1所述的显示模组，其中，所述显示模组包括设置于所述显示区内并沿第一方向排列的多个子像素区组，每一所述子像素区组内设置有沿第二方向排列的多个子像素区，且所述第一方向与所述第二方向相交；
    所述反射遮光层包括多个第一反射遮光部以及至少一个第二反射遮光部；
    所述薄膜晶体管层包括多个数据线以及多个扫描线，且所述数据线设置于各所述子像素区组内的任意相邻两个所述子像素区之间，所述扫描线设置于任意相邻的两个所述子像素区组之间；
    其中，所述第一反射遮光部设置于任意相邻的两个所述子像素区组之间，所述第二反射遮光部设置于至少一个所述子像素区组内的相邻两个所述子像素区之间。
  4. 根据权利要求3所述的显示模组，其中，所述反射遮光层包括多个所述第二反射遮光部，各所述子像素区组内的任意相邻两个所述子像素区之间皆设置有所述第二反射遮光部。
  5. 根据权利要求4所述的显示模组，其中，每一所述第一反射遮光部设 置于任意相邻两个所述子像素区组之间，且沿所述第二方向延伸；
    每一所述第二反射遮光部设置于对应的所述子像素区组内的任意相邻两个所述子像素区之间，且位于沿所述第一方向相邻的两个所述第一反射遮光部之间。
  6. 根据权利要求5所述的显示模组，其中，所述数据线在所述基底上的正投影、所述扫描线在所述基底上的正投影皆位于所述反射遮光层在所述基底上的正投影的覆盖范围内。
  7. 根据权利要求5所述的显示模组，其中，每一所述第二反射遮光部连接于沿所述第一方向相邻的两个所述第一反射遮光部之间，以使得多个所述第一反射遮光部和多个所述第二反射遮光部围绕各所述子像素区设置。
  8. 根据权利要求5所述的显示模组，其中，所述第一反射遮光部与所述第二反射遮光部相间隔设置。
  9. 根据权利要求8所述的显示模组，其中，每一所述第一反射遮光部包括间隔设置的多个第一子部，同一所述第一反射遮光部中的多个所述第一子部沿所述第二方向排列。
  10. 根据权利要求9所述的显示模组，其中，相邻两所述第一反射遮光部之间，其中一所述第一反射遮光部中的多个所述第一子部与另一所述第一反射遮光部中的多个所述第一子部一一对应设置；
    其中，相邻两个所述第一反射遮光部中且相对设置的两个所述第一子部之间设置有沿所述第二方向排列的至少6个所述子像素区。
  11. 根据权利要求5所述的显示模组，其中，所述薄膜晶体管层还包括多个触控线，所述第二反射遮光部包括第二子部以及第三子部，所述第二子部沿所述第二方向上的宽度大于所述第三子部沿所述第二方向上的宽度；
    其中，各所述子像素区组内的任意相邻两个所述子像素区之间设置有一所述触控线、一所述数据线以及一所述第二子部，且一所述触控线、一所述数据线皆与对应的一所述第二子部至少部分重叠设置；
    或者，各所述子像素区组内的任意相邻两个所述子像素区之间设置有一所述数据线以及一所述第三子部，一所述数据线与对应的一所述第三子部至少部分重叠设置。
  12. 根据权利要求11所述的显示模组，其中，所述第二子部包括沿所述第二方向相间隔设置的第一单元和第二单元，其中，所述第一单元与所述数据线至少部分重叠设置，所述第二单元与所述触控线至少部分重叠设置。
  13. 根据权利要求11所述的显示模组，其中，所述第一反射遮光部沿所述第一方向上的宽度大于所述扫描线沿所述第一方向上的宽度，所述第二反射遮光部沿所述第二方向上的宽度大于所述数据线沿所述第二方向上的宽度以及所述触控线沿所述第二方向上的宽度之和。
  14. 根据权利要求3所述的显示模组，其中，所述黑色矩阵包括多个开口，一所述开口与一所述子像素区相对应设置；
    其中，沿所述第一方向相邻的两个所述开口之间的距离与所述第一反射遮光部沿所述第一方向上的宽度之间的差值大于或等于0.5微米，且小于或等于2微米；
    沿所述第二方向相邻的两个所述开口之间的距离与所述第二反射遮光部沿所述第二方向上的宽度之间的差值大于或等于0.5微米，且小于或等于2微米。
  15. 根据权利要求3所述的显示模组，其中，所述薄膜晶体管层还包括设置于所述显示区内的薄膜晶体管，且所述反射遮光层设置于所述薄膜晶体管和所述基底之间。
  16. 根据权利要求1所述的显示模组，其中，所述反射遮光层在所述基底上且对应所述显示区内的正投影面积占所述显示区面积的比值大于或等于25％，且小于或等于90％。
  17. 根据权利要求16所述的显示模组，其中，所述反射遮光层在所述基底上且对应所述显示区内的正投影面积占所述显示区面积的比值大于或等于25％，且小于或等于70％。
  18. 一种显示装置，所述显示装置包括装置主体、以及显示模组，且所述装置主体与所述显示模组组合为一体；
    所述显示模组包括：
    基底；
    反射遮光层，设置于所述基底上；
    薄膜晶体管层，设置于所述反射遮光层远离所述基底的一侧；
    黑色矩阵，设置于所述薄膜晶体管层远离所述反射遮光层的一侧；
    背光组件，设置于所述基底远离所述反射遮光层的一侧；
    其中，所述显示模组包括显示区，所述反射遮光层在所述基底上且对应所述显示区内的正投影位于所述黑色矩阵在所述基底上且对应所述显示区内的正投影的覆盖范围以内，所述反射遮光层在所述基底上且对应所述显示区内的正投影面积占所述黑色矩阵在所述基底上且对应所述显示区内的正投影面积的比值大于20％。
  19. 根据权利要求18所述的显示装置，其中，所述反射遮光层在所述基底上且对应所述显示区内的正投影面积占所述黑色矩阵在所述基底上且对应所述显示区内的正投影面积的比值大于或等于80％，且小于或等于100％。
  20. 根据权利要求18所述的显示装置，其中，所述显示模组包括设置于所述显示区内并沿第一方向排列的多个子像素区组，每一所述子像素区组内设置有沿第二方向排列的多个子像素区，且所述第一方向与所述第二方向相交；
    所述反射遮光层包括多个第一反射遮光部以及至少一个第二反射遮光部；
    所述薄膜晶体管层包括多个数据线以及多个扫描线，且所述数据线设置于各所述子像素区组内的任意相邻两个所述子像素区之间，所述扫描线设置于任意相邻的两个所述子像素区组之间；
    其中，所述第一反射遮光部设置于任意相邻的两个所述子像素区组之间，所述第二反射遮光部设置于至少一个所述子像素区组内的相邻两个所述子像素区之间。
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CN107632453A (zh) * 2017-10-31 2018-01-26 京东方科技集团股份有限公司 显示面板及制造方法和显示装置
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CN113156651A (zh) * 2021-04-26 2021-07-23 京东方科技集团股份有限公司 一种显示面板及显示装置
CN114200713A (zh) * 2021-12-31 2022-03-18 重庆惠科金渝光电科技有限公司 显示面板及显示装置

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