WO2023245408A1 - 显示基板、显示背板、显示面板 - Google Patents

显示基板、显示背板、显示面板 Download PDF

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WO2023245408A1
WO2023245408A1 PCT/CN2022/100063 CN2022100063W WO2023245408A1 WO 2023245408 A1 WO2023245408 A1 WO 2023245408A1 CN 2022100063 W CN2022100063 W CN 2022100063W WO 2023245408 A1 WO2023245408 A1 WO 2023245408A1
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Prior art keywords
signal line
electrode
display
substrate
light
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PCT/CN2022/100063
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English (en)
French (fr)
Inventor
汪军
成军
王海涛
苏同上
黄勇潮
方金钢
张刘
刘胜利
王宏征
Original Assignee
京东方科技集团股份有限公司
合肥鑫晟光电科技有限公司
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Priority to PCT/CN2022/100063 priority Critical patent/WO2023245408A1/zh
Publication of WO2023245408A1 publication Critical patent/WO2023245408A1/zh

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  • the embodiments of the present disclosure belong to the field of display technology, and specifically relate to a display substrate, a display backplane, and a display panel.
  • OLED Organic Light-Emitting Diode, organic light-emitting diode
  • OLED Organic Light-Emitting Diode, organic light-emitting diode
  • LCD Liquid Crystal Display
  • OLED display panels can be divided into top-emitting and bottom-emitting types according to their different light-emitting modes.
  • an embodiment of the present disclosure provides a display substrate, including: a substrate; a first signal line; a second signal line; a first electrode;
  • the first signal line, the second signal line and the first electrode are located on the substrate and are arranged away from the substrate in order; the first signal line, the second signal line and the The first electrodes are insulated from each other;
  • the orthographic projections of the first signal line and the second signal line on the substrate at least partially overlap; the first electrode overlaps the orthographic projections of the first signal line and the second signal line. Areas partially overlap;
  • the first electrode has an opening in at least a partial area that overlaps an orthographic overlap area of the first signal line and the second signal line.
  • the first signal line includes a body line, and the body line and the second signal line intersect in space;
  • the orthographic projection of the opening on the substrate covers the spatial intersection position of the body line and the second signal line.
  • the first signal line also includes a backup line, the backup line and the body line are located on the same film layer, and a part of the body line is connected in parallel with the backup line;
  • the backup line and the second signal line intersect in space
  • the orthographic projection of the opening on the substrate also covers the spatial intersection position of the backup line and the second signal line.
  • the first signal lines include a plurality of parallel lines; the spacing between at least two adjacent first signal lines is smaller than the distance between the two adjacent first signal lines along the opening. Width in cloth direction;
  • the orthographic projection of the opening on the substrate covers two adjacent first signal lines and the local area between them.
  • the second signal lines include a plurality of parallel lines; the distance between at least two adjacent second signal lines is smaller than the distance between the two adjacent second signal lines along the opening. Width in cloth direction;
  • the orthographic projection of the opening on the substrate covers two adjacent second signal lines and the local area between them.
  • the number of the first electrodes is multiple, and the plurality of first electrodes are arranged in an array;
  • the opening is provided on at least part of the first electrode
  • the orthographic projection area of the opening on the first electrode on the substrate accounts for 1/30 to 1/20 of the orthographic projection area of the first electrode on the substrate.
  • the spacing of the openings corresponding to the first electrodes in two adjacent columns along the extension direction of the first signal line is unequal.
  • At least one of the openings exposes local areas of two of the second signal lines
  • At least one of the openings exposes local areas of the two first signal lines.
  • the first signal line includes a scanning signal line or a lighting control signal line
  • the second signal line includes a data signal line, a power signal line and a sensing signal line.
  • an embodiment of the present disclosure provides a display backplane, which includes the above-mentioned display substrate;
  • a filling structure is provided in the opening of the first electrode in the display substrate, and an orthographic projection of the filling structure on the base in the display substrate coincides with an orthographic projection of the opening on the base.
  • a surface of the filling structure facing away from the substrate is flush with a surface of the first electrode facing away from the substrate.
  • the filling structure includes a transparent conductive layer and/or a transparent insulating layer
  • the transparent insulating layer and the transparent conductive layer are arranged away from the substrate in sequence.
  • an embodiment of the present disclosure provides a display panel, which includes the above-mentioned display backplane.
  • it also includes a light-emitting functional layer and a second electrode located on the display backplane, and the light-emitting functional layer and the second electrode are arranged in sequence away from the first electrode in the display backplane; And the orthographic projection of the light-emitting functional layer and the second electrode on the display backplane respectively covers the first electrode and the opening in the first electrode;
  • the second electrode is made of light-impermeable conductive material
  • the second electrode is made of light-transmitting conductive material
  • the first electrode further includes an opaque conductive material layer located on a side of the light-transmissive conductive material layer of the first electrode facing away from the substrate in the display backplane.
  • a plurality of pixel areas are included, each of the pixel areas including a transparent sub-area and a display sub-area;
  • the first electrode, the light-emitting functional layer and the second electrode are stacked in sequence to form a light-emitting device; the light-emitting device is located in the display sub-region;
  • the first signal line and the second signal line in the display backplane are located in the display sub-area;
  • the substrate extends from the display sub-region to the transparent sub-region.
  • an embodiment of the present disclosure provides a display device, which includes the above-mentioned display panel.
  • embodiments of the present disclosure provide a method for preparing a display substrate, including:
  • the first signal line, the second signal line and the first electrode are insulated from each other; the orthographic projection of the first signal line and the second signal line on the substrate is at least partially Overlap; the first electrode partially overlaps with the orthographic overlap area of the first signal line and the second signal line;
  • Forming the pattern of the first electrode includes using a patterning process to open openings in at least part of the area where the first electrode overlaps the orthographic overlap area of the first signal line and the second signal line.
  • embodiments of the present disclosure provide a method for manufacturing a display backplane, which includes the above method for manufacturing a display substrate;
  • It also includes forming a filling structure in the opening of the first electrode of the display substrate; an orthographic projection of the filling structure on the base in the display substrate coincides with an orthographic projection of the opening on the base.
  • forming the filling structure includes: forming an insulating layer and/or a conductive layer;
  • the insulating layer and the conductive layer are sequentially formed in the opening.
  • Figure 1 is a schematic structural diagram of an exemplary display substrate.
  • Figure 2 is a schematic cross-sectional view of the structure along the AA' section line in Figure 1.
  • Figure 3 is a schematic diagram of an exemplary pixel driving circuit.
  • Figure 4 is a schematic diagram of another exemplary pixel driving circuit.
  • FIG. 5 is a schematic top view of the partial structure of a display substrate with a pixel driving circuit and anode prepared in the disclosed technology.
  • FIG. 6 is a schematic top view of a partial structure of a display substrate in an embodiment of the present disclosure.
  • Figure 7 is a structural cross-sectional view along the BB' line in Figure 6.
  • FIG. 8 is a schematic top view of a partial structure of another display substrate in an embodiment of the present disclosure.
  • Figure 9 is a structural cross-sectional view along the CC' section line in Figure 8.
  • FIG. 10 is a schematic top view of a partial structure of a display backplane in an embodiment of the present disclosure.
  • FIG. 11 is a schematic cross-sectional view of a partial structure of a display panel in an embodiment of the present disclosure.
  • FIG. 12 is a schematic top view of a partial structure of a display panel in an embodiment of the present disclosure.
  • Figure 1 is a schematic structural diagram of an exemplary display substrate
  • Figure 2 is a schematic structural cross-sectional view along the AA' section line in Figure 1
  • the display substrate includes a substrate 1 and a substrate
  • the pixel driving circuit 13 , the light-emitting device 12 and the encapsulating layer 14 for encapsulating the light-emitting device 12 are arranged on the substrate 1 in sequence.
  • the light-emitting device 12 includes an anode 121, a light-emitting functional layer 9 and a cathode 122 which are arranged in sequence away from the substrate.
  • the anode 121 is usually stacked by a light-transmissive first ITO (indium tin oxide) layer, an opaque silver film layer, and a light-transmissive second ITO layer.
  • the anode 121 can connect the light-emitting device to the The light emitted by 12 is reflected toward the side of the display panel away from the substrate 1, thereby achieving top emission of the OLED light-emitting device.
  • the cathode 122 is usually made of an opaque conductive material (such as silver or copper, etc.).
  • the cathode 122 can reflect the light emitted by the light-emitting device 12 toward the substrate 1 side of the display panel, thereby realizing OLED Bottom emission of light-emitting devices.
  • Figure 3 is a schematic diagram of an exemplary pixel driving circuit; the pixel driving circuit in each pixel unit may include: a first reset sub-circuit 15, a threshold compensation sub-circuit 16, a driving sub-circuit 17, a data writing sub-circuit circuit 18, a first lighting control sub-circuit 19, a second lighting control sub-circuit 20, a second reset sub-circuit 22 and a storage sub-circuit 23.
  • the first reset sub-circuit 15 is connected to the control end of the driving sub-circuit 17 and is configured to reset the control end of the driving sub-circuit 17 under the control of the first reset signal.
  • the threshold compensation sub-circuit 16 is electrically connected to the control terminal and the second terminal of the driving sub-circuit 17 respectively, and is configured to perform threshold compensation on the driving sub-circuit 17 .
  • the data writing sub-circuit 18 is electrically connected to the first end of the driving sub-circuit 17 and is configured to write the data signal into the storage sub-circuit 23 under the control of the scanning signal.
  • the storage sub-circuit 23 is electrically connected to the control terminal of the driving sub-circuit 17 and the first power signal line VDD respectively, and is configured to store data signals.
  • the first lighting control sub-circuit 19 is connected to the first power signal line VDD and the first end of the driving sub-circuit 17 respectively, and is configured to enable or disconnect the connection between the driving sub-circuit 17 and the first power signal line VDD.
  • the second light-emitting control sub-circuit 20 is electrically connected to the second end of the driving sub-circuit 17 and the first electrode of the light-emitting device 12 respectively, and is configured to realize the connection between the driving sub-circuit 17 and the light-emitting device 12 to be turned on or off. open.
  • the second reset sub-circuit 22 is electrically connected to the first electrode of the light-emitting device 12 and is configured to reset the control terminal of the driving sub-circuit 17 and the first electrode of the light-emitting device 12 under the control of the second reset control signal.
  • the first reset sub-circuit 15 includes a first reset transistor T1
  • the threshold compensation sub-circuit 16 includes a threshold compensation transistor T2
  • the driving sub-circuit 17 includes a driving transistor T3
  • the control end of the driving sub-circuit 17 includes the control of the driving transistor T3 pole
  • the first terminal of the driving sub-circuit 17 includes the first pole of the driving transistor T3
  • the second terminal of the driving sub-circuit 17 includes the second pole of the driving transistor T3.
  • the data writing sub-circuit 18 includes a data writing transistor T4, the storage sub-circuit 23 includes a storage capacitor Cst, the first lighting control sub-circuit 19 includes a first lighting control transistor T5, and the second lighting control sub-circuit 20 includes a second lighting control transistor. T6, the second reset sub-circuit 22 includes a second reset transistor T7.
  • the drain of the data writing transistor T4 is electrically connected to the source of the driving transistor T3 .
  • the source of the data writing transistor T4 is configured to be electrically connected to the data signal line Data to receive the data signal.
  • the data writing transistor T4 The gate is configured to be electrically connected to the first scan signal line Ga1 to receive the scan signal; the second plate of the storage capacitor Cst is electrically connected to the first power signal line VDD, and the first plate of the storage capacitor Cst is connected to the driving transistor T3
  • the gate of the threshold compensation transistor T2 is electrically connected to the gate of the driving transistor T3, the drain of the threshold compensation transistor T2 is electrically connected to the drain of the driving transistor T3, and the gate of the threshold compensation transistor T2 is configured as is electrically connected to the second scan signal line Ga2 to receive the compensation control signal;
  • the source of the first reset transistor T1 is configured to be electrically connected to the first reset power terminal Vinit1 to receive the first reset signal, and the drain of the first reset transistor T1 Electrically connected to the
  • the source of the second reset transistor T7 is electrically connected with the first electrode of the light emitting device 12 .
  • the gate of the second reset transistor T7 is configured to be connected to the second reset power terminal Vinit1.
  • the control signal line Rst2 is electrically connected to receive the second reset control signal;
  • the source of the first light-emitting control transistor T5 is electrically connected to the first power signal line VDD, and the drain of the first light-emitting control transistor T5 is electrically connected to the source of the driving transistor T3.
  • the gate of the first light-emitting control transistor T5 is configured to be electrically connected to the first light-emitting control signal line EM1 to receive the first light-emitting control signal;
  • the source of the second light-emitting control transistor T6 is electrically connected to the drain of the driving transistor T3 , the drain of the second light-emitting control transistor T6 is electrically connected to the first electrode D1 of the light-emitting device 12, and the gate of the second light-emitting control transistor T6 is configured to be electrically connected to the second light-emitting control signal line EM2 to receive the second light-emitting control.
  • the second electrode of the light-emitting device 12 is electrically connected to the second power supply signal line VSS.
  • Figure 4 is a schematic diagram of another exemplary pixel driving circuit; the pixel driving circuit includes a first transistor T1, a second transistor T2, a third transistor T3 and a storage capacitor Cst; the gate of the first transistor T1 is connected to the The drain of the second transistor T2 is connected to the first plate of the storage capacitor Cst; the source of the first transistor T1 is connected to the first power supply signal line VDD; the drain of the first transistor T1 is connected to the drain of the third transistor T3 and the storage capacitor Cst.
  • the pixel driving circuit includes a first transistor T1, a second transistor T2, a third transistor T3 and a storage capacitor Cst; the gate of the first transistor T1 is connected to the The drain of the second transistor T2 is connected to the first plate of the storage capacitor Cst; the source of the first transistor T1 is connected to the first power supply signal line VDD; the drain of the first transistor T1 is connected to the drain of the third transistor T3 and the storage capacitor Cst.
  • the second plate and the anode of the light-emitting device 12; the cathode of the light-emitting device 12 is connected to the second power signal line VSS; the gate of the second transistor T2 is connected to the switch scan line Switch Scan; the source of the second transistor T2 is connected to the data signal line Data; the gate of the third transistor T3 is connected to the sensing scan line Sense Scan; the source of the third transistor T3 is connected to the sensing signal line Sense; the sensing signal line Sense is connected to the data driving circuit (ie, data driving chip, Source IC);
  • the third transistor T3 is used to confirm the threshold voltage of the first transistor T1 through the sensing signal line, and check the driving current capability of the first transistor T1, while adjusting the current capability of the first transistor T1 so that the first transistor T1 always has the same current. Capability; the data driving circuit is connected to the data signal line Data and is used to provide data driving signals to the data signal line.
  • some of the various signal lines are located on the same layer, and some are located on different layers, and the signal lines located on different layers may intersect in space to form space intersection points; such as scanning signals
  • the lines are usually made of the same material as the gate electrodes of the transistors in the pixel drive circuit and are prepared by a single patterning process;
  • the data signal lines and power signal lines are usually made of the same material as the source and drain electrodes of the transistors in the pixel drive circuit and are prepared by a single patterning process;
  • the scanning signal lines The data signal lines and power signal lines are located on different layers, and there are spatial intersection points between the upper and lower layer signal lines; during the preparation process, these spatial intersection points are prone to short circuit defects; at the same time, the distances distributed on the same layer are relatively close.
  • Interconnection short-circuit failures are also prone to occur between adjacent signal lines; or, signal lines with narrow line widths are prone to open circuit failures themselves; the above-mentioned various defects can be discovered through testing before the display substrate is prepared, such as: By testing the display substrate with only the pixel drive circuit and anode prepared, the various short circuits or poor open circuits mentioned above can be found.
  • FIG. 5 a schematic top view of the partial structure of a display substrate with a pixel drive circuit and anode prepared in the public technology is shown.
  • some key positions where defects are prone to occur between the anode 121 of the OLED light-emitting device and the pixel drive circuit For example, there are overlaps at the spatial intersection points of signal lines, between adjacent signal lines that are close to each other, and at points where breakage is prone to occur on signal lines, etc.), which results in the discovery of pixels under the anode 121 layer after the anode 121 layer is prepared. Repairs cannot be performed if there is a defect in the drive circuit.
  • an embodiment of the present disclosure provides a display substrate.
  • FIG. 6 is a schematic top view of a partial structure of a display substrate in an embodiment of the present disclosure
  • FIG. 7 is a schematic diagram along the line of FIG.
  • the display substrate includes: substrate 1; first signal line 2; second signal line 3; first electrode 4; first signal line 2, second signal line 3 and first electrode 4 Located on the substrate 1 and arranged away from the substrate 1 in sequence; the first signal line 2, the second signal line 3 and the first electrode 4 are insulated from each other; the first signal line 2 and the second signal line 3 are on the substrate 1
  • the orthographic projection at least partially overlaps; the first electrode 4 partially overlaps with the orthographic overlap area of the first signal line 2 and the second signal line 3; wherein the first electrode 4 is in contact with the first signal line 2 and the second signal line 3. Openings 40 are provided in at least part of the overlapping areas of the orthographic projection overlap areas of the signal lines 3 .
  • an insulating layer 6 is disposed between any adjacent pairs of the first signal line 2 , the second signal line 3 and the first electrode 4 , and the insulating layer 6 is used to realize the positioning between the three of different layers. are insulated from each other.
  • the first signal line 2 includes a scanning signal line 21 or a light emission control signal line;
  • the second signal line 3 includes a data signal line Data, a power signal line 30 and a sensing signal line Sense. .
  • the first signal line 2 and the second signal line 3 may be any signal lines located in any two different layers. It is not limited to scanning signal lines and data signal lines located on different layers.
  • the first electrode 4 may be an anode of an OLED light-emitting device, or may be a pixel electrode of a sub-pixel in a liquid crystal display panel.
  • the display substrate is an OLED display substrate.
  • the OLED display substrate includes a pixel driving circuit.
  • the pixel driving circuit includes a driving transistor.
  • the source or drain of the driving transistor is connected to the first electrode 4 .
  • a light-shielding metal layer 5 is provided on the side.
  • the light-shielding metal layer 5 blocks the active layer of the driving transistor to prevent the active layer from increasing the leakage current of the driving transistor under light and ensure the performance of the driving transistor.
  • the first signal line 2 and the second signal line 3 are easily short-circuited in their orthographic overlap areas.
  • the position of the opening 40 on the first electrode 4 is the first
  • the location where a short circuit is likely to occur between the signal line 2 and the second signal line 3 is established by arranging the first electrode 4 in at least a partial area that overlaps the orthographic overlap area of the first signal line 2 and the second signal line 3.
  • Opening 40 When a short circuit failure occurs between the first signal line 2 and the second signal line 3, the defective location of the short circuit can be repaired from the side of the first electrode 4 through the opening 40, thus ensuring the quality of the display substrate.
  • laser cutting is performed from the side of the first electrode 4 through the opening 40 to repair the defective short circuit point, and the two signal lines where the short circuit occurs are cut off at the short circuit point to eliminate the short circuit defect.
  • the first signal line 2 includes a body line 201 , and the body line 201 and the second signal line 3 intersect in space; the orthographic projection of the opening 40 on the substrate 1 covers the body line 201 and the second signal line. 3’s space intersection location.
  • the body line 201 and the second signal line 3 are prone to short-circuit failure at their spatial intersection points.
  • the orthographic projection of the opening 40 on the substrate 1 cover the spatial intersection point of the body line 201 and the second signal line 3, it can be achieved. It is convenient to repair the short circuit defect at the space intersection point.
  • the first signal line 2 is a scanning signal line 21 (such as a gate line)
  • the second signal line 3 is a data signal line Data, a power signal line 30 and a sensing signal line Sense.
  • the scanning signal line 21 intersects with the data signal line Data, the power signal line 30 and the sensing signal line Sense respectively to form a spatial intersection point.
  • Figure 8 is a schematic top view of a partial structure of another display substrate in an embodiment of the present disclosure
  • Figure 9 is a structural cross-sectional view along the CC' section line in Figure 8
  • a signal line 2 also includes a backup line 202.
  • the backup line 202 and the body line 201 are located on the same film layer, and part of the body line 201 is connected in parallel with the backup line 202; the backup line 202 intersects with the second signal line 3 in space; the opening 40
  • the orthographic projection on the substrate 1 also covers the spatial intersection position of the backup line 202 and the second signal line 3 .
  • the backup line 202 and the second signal line 3 are prone to short-circuit failure at their spatial intersection points.
  • the backup line 202 can keep the signal transmitted on the main line 201 from being transmitted through the backup line 202 when the main line 201 is disconnected due to a fault, thereby preventing display defects on the display substrate caused by signal loss.
  • the main line 201 can play the same role as mentioned above.
  • the first signal lines 2 include a plurality of parallel lines; the distance between at least two adjacent first signal lines 2 is smaller than the opening 40 along the row of two adjacent first signal lines 2 The width in the cloth direction; the orthographic projection of the opening 40 on the substrate 1 covers two adjacent first signal lines 2 and the local area between them.
  • the spacing between two adjacent first signal lines 2 may be the minimum safety distance between the two first signal lines 2 .
  • the distance between two adjacent first signal lines 2 is small, short-circuit interconnection between the two first signal lines 2 is easy to occur at certain points.
  • the corresponding two first signal lines 2 on the first electrode 4 are prone to
  • the opening 40 is provided at the point where the short-circuit interconnection occurs, which can facilitate the repair of the defective short-circuit interconnection point.
  • the line width of the first signal line 2 is small, the first signal line 2 is likely to be disconnected at certain points.
  • the opening 40 on the first electrode 4 is correspondingly opened at the position where the disconnection is prone to occur. This can also It is convenient to repair the location of bad circuit break.
  • the two first signal lines 2 that are short-circuited are laser-cut through the opening 40 to cut off the connection between the two first signal lines 2 at the short-circuit interconnection point; the first signal that is disconnected is cut through the opening 40 Line 2 is subjected to laser repair, so that the first signal line 2 is repaired and connected at the break point.
  • the second signal lines 3 include multiple parallel lines; the distance between at least two adjacent second signal lines 3 is smaller than the opening 40 along the row of two adjacent second signal lines 3 .
  • the width in the cloth direction; the orthographic projection of the opening 40 on the substrate 1 covers two adjacent second signal lines 3 and the local area between them.
  • the spacing between two adjacent second signal lines 3 may be the minimum safety distance between the two second signal lines 3 .
  • the spacing between two adjacent second signal lines 3 is small, short-circuit interconnection between the two second signal lines 3 is easy to occur at certain locations.
  • the corresponding two second signal lines 3 on the first electrode 4 are prone to
  • the opening 40 is provided at the point where the short-circuit interconnection occurs, which can facilitate the repair of the defective short-circuit interconnection point.
  • the line width of the second signal line 3 is small, the second signal line 3 is likely to be disconnected at certain points.
  • the opening 40 on the first electrode 4 is correspondingly opened at the position where the disconnection is prone to occur. This can also It is convenient to repair the location of bad circuit break.
  • the two second signal lines 3 that are short-circuited are laser-cut through the opening 40 to cut off the connection between the two second signal lines 3 at the short-circuit interconnection point; the second signal lines that are disconnected are cut through the opening 40 Line 3 is subjected to laser repair, so that the second signal line 3 is repaired and connected at the break point.
  • the number of first electrodes 4 is multiple, and the plurality of first electrodes 4 are arranged in an array; at least part of the first electrodes 4 are provided with openings 40 ;
  • the orthographic projection area of the opening 40 on the substrate 1 accounts for 1/30 to 1/20 of the orthographic projection area of the first electrode 4 on the substrate 1 .
  • the openings 40 corresponding to two adjacent columns of first electrodes 4 have unequal spacing along the extension direction of the first signal line 2 . That is, the position of the opening 40 can be randomly set according to the location point where a short circuit or an open circuit easily occurs between the first signal line 2 and/or the second signal line 3.
  • At least one opening 40 exposes local areas of the two second signal lines 3 ; and/or, at least one opening 40 exposes local areas of the two first signal lines 2 .
  • the first electrode 4 includes a layer of light-transmissive conductive material.
  • an ITO light-transmitting layer is usually prepared on the side of the pixel driving circuit away from the substrate 1 . In this way, the defect between the first signal line 2 and the second signal line 3 below it or the defect on the respective lines of the first signal line 2 and the second signal line 3 can be easily seen through the first electrode 4, thereby making it easier to perform defective work. repair.
  • the first electrode 4 can also be made of an opaque conductive material. Since the first electrode 4 is provided with an opening 40 for maintenance, the first electrode 4 can also be viewed through the opening 40 if it is made of a light-proof conductive material. to the bottom of it for easy repair.
  • embodiments of the present disclosure also provide a preparation method of the display substrate, including: sequentially forming patterns of first signal lines, second signal lines and first electrodes on the substrate; wherein, the first signal The line, the second signal line and the first electrode are insulated from each other; the orthographic projections of the first signal line and the second signal line on the substrate at least partially overlap; the first electrode and the first signal line and the second signal line The orthographic overlapping area partially overlaps; forming the pattern of the first electrode includes using a patterning process to open openings in at least part of the area where the first electrode overlaps the orthographic overlapping area of the first signal line and the second signal line.
  • the patterning process includes depositing and forming a first electrode film layer, applying photoresist on the first electrode film layer, and using a mask plate including the first electrode and an opening pattern thereon to perform photolithography on the first electrode film layer.
  • the glue is exposed, developed, and etched to form a first electrode and a pattern of openings thereon.
  • the preparation process of the first signal line and the second signal line is the same as the preparation process of the first electrode, which will not be described again here.
  • the display substrate provided by the embodiment of the present disclosure can open the first electrode in at least part of the area that overlaps the orthographic overlap area of the first signal line and the second signal line; When a short-circuit defect occurs between the signal lines, the defective point where the short-circuit occurs is repaired through the opening from the side of the first electrode, thereby ensuring the quality of the display substrate.
  • an embodiment of the present disclosure also provides a display backplane.
  • FIG. 10 is a schematic top view of a partial structure of the display backplane in the embodiment of the present disclosure; wherein the display backplane includes the display substrate in the above disclosed embodiment; A filling structure 7 is provided in the opening 40 of the first electrode 4 in the display substrate. The orthographic projection of the filling structure 7 on the base in the display substrate coincides with the orthographic projection of the opening 40 on the base.
  • the filling structure 7 By arranging the filling structure 7 in the opening 40, the flatness of the first electrode 4 can be ensured, so that other film layers can be subsequently formed on the side of the first electrode 4 facing away from the substrate, and the normal display performance of the display backplane can be ensured.
  • the surface of the filling structure 7 facing away from the substrate is flush with the surface of the first electrode 4 facing away from the substrate. This arrangement can further ensure the flatness of the surface of the first electrode 4 facing away from the substrate, so that other film layers can be subsequently formed on the side of the first electrode 4 facing away from the substrate, while also ensuring normal display performance of the display backplane.
  • the filling structure 7 includes a transparent conductive layer and/or a transparent insulating layer; the transparent insulating layer and the transparent conductive layer are arranged in sequence away from the substrate.
  • the arrangement of the transparent conductive layer in the filling structure 7 can, on the one hand, make the area of the opening 40 have the same conductivity as other areas of the first electrode 4, thereby ensuring the overall conductivity of the first electrode 4, thereby ensuring that the first electrode 4 is used as the The normal luminous performance of the anode OLED light-emitting device or the normal display performance of the sub-pixel using the first electrode 4 as the pixel electrode; on the other hand, it is also convenient for short circuit or occurrence between the first signal line 2 and/or the second signal line 3 When there is an open circuit fault, the fault location can be repaired by using laser through the transparent conductive layer.
  • the transparent conductive layer is made of conductive silver glue or ITO materials; the transparent insulating layer is made of organic transparent glue, such as photoresist.
  • the filling structure 7 adopts a transparent film layer.
  • the filling structure 7 has the same light transmission performance as the light-transmitting first electrode 4, thereby making it easier to view the second electrode below it through the first electrode 4 and the opening 40 thereon. Defects between the first signal line 2 and the second signal line 3 or defects on the respective lines of the first signal line 2 and the second signal line 3 are easy to repair; on the other hand, it is also convenient to repair the defects between the first signal line 2 and the second signal line 3. /Or when a short circuit or open circuit fault occurs between the second signal lines 3, the fault location can be repaired by using laser light through the transparent conductive layer and/or the transparent insulating layer.
  • the filling structure 7 may also be opaque.
  • the first electrode 4 and the filling structure 7 filled in the opening 40 include an opaque conductive film layer in order to process the light emitted by the OLED light-emitting device. Reflection to achieve top-emission display.
  • the short circuit or open circuit fault between the first signal line 2 and/or the second signal line 3 under the first electrode 4 can only be repaired when the filling structure 7 is not provided in the opening 40; After the filling structure 7 is provided in 40, since the filling structure 7 is opaque, the laser can no longer pass through the filling structure 7 for fault repair.
  • an embodiment of the present disclosure also provides a method for preparing the display backplane, which includes the method for preparing the display substrate in the above embodiment, and further includes forming in the opening of the first electrode of the display substrate Filling structure; the orthographic projection of the filling structure on the base in the display substrate coincides with the orthographic projection of the opening on the base.
  • forming the filling structure includes: forming an insulating layer and/or a conductive layer; and the insulating layer and the conductive layer are sequentially formed in the opening.
  • the conductive layer uses conductive silver glue; the insulating layer uses organic transparent glue, such as photoresist.
  • the insulating layer and the conductive layer are sprayed with transparent glue into the opening through the nozzle of the glue spraying equipment to seal the opening.
  • the display backplane provided in the embodiment of the present disclosure by using the display substrate in the above embodiment, can be used to display the display backplane from the third signal line when a short circuit failure occurs between the first signal line and the second signal line in the display backplane.
  • the defective point where the short circuit occurs is repaired through the opening on the side where the first electrode is located, ensuring the quality of the display substrate;
  • the display backplane can fill the opening of the first electrode by arranging a filling structure in the opening, thereby ensuring that the first electrode
  • the flatness of the entire film layer is required to subsequently form other flat film layers on the side of the first electrode facing away from the substrate, while also ensuring the normal display performance of the display backplane.
  • the embodiment of the present disclosure also provides a display panel.
  • FIG. 11 is a schematic cross-sectional view of a partial structure of the display panel in the embodiment of the present disclosure.
  • the display panel includes the display backplane 8 in the above-mentioned disclosed embodiment.
  • the display panel further includes a light-emitting functional layer 9 and a second electrode 10 located on the display backplane 8 .
  • the light-emitting functional layer 9 and the second electrode 10 are sequentially away from the first electrode in the display backplane 8 .
  • the electrodes 4 are arranged; and the orthographic projections of the light-emitting functional layer 9 and the second electrode 10 on the display backplane 8 cover the first electrode 4 and the opening in the first electrode 4 respectively.
  • the stacked structure of the first electrode 4, the light-emitting functional layer 9 and the second electrode 10 can form a light-emitting device.
  • the second electrode 10 is made of an opaque conductive material; the first electrode 4 is a layer of light-transmitting conductive material.
  • the second electrode 10 uses a light-transmitting conductive material;
  • the first electrode 4 also includes a light-transmitting conductive material layer based on the light-transmitting conductive material layer, and the light-transmitting conductive material layer is located on the light-transmitting conductive material layer.
  • the side facing away from the substrate 1 in the back plate 8 is shown. With this arrangement, the light emitted by the light-emitting device is reflected by the first electrode 4 and then emitted from the second electrode 10 side, thereby realizing a top-emission light-emitting device.
  • FIG. 12 is a schematic top view of a partial structure of a display panel in an embodiment of the present disclosure
  • the display panel includes a plurality of pixel areas 11 , and each pixel area 11 includes a transparent sub-area 111 and a display sub-area 112 ;
  • the first electrode, the light-emitting functional layer and the second electrode are stacked in sequence to form the light-emitting device 12;
  • the light-emitting device 12 is located in the display sub-area 112;
  • the first signal line 2 and the second signal line 3 in the display backplane are located in the display sub-area 112 ;
  • the substrate extends from the display sub-area 112 to the transparent sub-area 111.
  • the display panel configures each pixel area 11 to include a transparent sub-area 111 and a display sub-area 112, and integrates the light-emitting device 12 and the pixel driving circuit (including transistor circuits and various signal lines) that drive the light-emitting device 12 to emit light.
  • the display sub-region 112 only transparent insulating layers, such as substrates, inorganic insulating layers, organic insulating layers, etc., are disposed in the transparent sub-region 111, thereby enabling transparent display of the display panel.
  • the display panel may be a larger size (such as 55-inch) transparent display panel.
  • the display panel provided by the embodiment of the present disclosure by using the above-mentioned display backplane, can pass through the side where the first electrode of the display backplane is located when a short circuit failure occurs between the first signal line and the second signal line in the display backplane.
  • the openings are used to repair defective points where short circuits occur, ensuring the quality of the display backplane and thus the display panel.
  • an embodiment of the present disclosure further provides a display device, including the display panel in the above embodiment.
  • the display device can be an OLED panel, an OLED TV, an OLED billboard, an LCD panel, an LCD TV, a monitor, a mobile phone, a navigator, or any other product or component with a display function.

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Abstract

一种显示基板，包括：基底（1）；第一信号线（2）、第二信号线（3）和第一电极（4）位于基底（1）上，且依次远离基底（1）排布；第一信号线（2）、第二信号线（3）和第一电极（4）彼此之间相互绝缘；第一信号线（2）和第二信号线（3）在基底（1）上的正投影至少局部交叠；第一电极（4）与第一信号线（2）和第二信号线（3）的正投影交叠区域局部交叠；其中，第一电极（4）在与第一信号线（2）和第二信号线（3）的正投影交叠区域相交叠的至少部分区域开设有开口（40）。

Description

显示基板、显示背板、显示面板 技术领域
本公开实施例属于显示技术领域，具体涉及一种显示基板、显示背板、显示面板。
背景技术
OLED(Organic Light-Emitting Diode，有机发光二极管)显示装置，具备自发光、高亮度、宽视角、高对比度、可挠曲、低能耗等特性，因此受到广泛的关注，并作为新一代的显示方式，已开始逐渐取代传统LCD(Liquid Crystal Display)显示装置，被广泛应用在手机屏幕、电脑显示器、全彩电视等。相关技术中OLED显示面板按照其发光方式的不同，可以分为顶发射型和底发射型。
发明内容
第一方面，本公开实施例提供一种显示基板，包括：基底；第一信号线；第二信号线；第一电极；
所述第一信号线、所述第二信号线和所述第一电极位于所述基底上，且依次远离所述基底排布；所述第一信号线、所述第二信号线和所述第一电极彼此之间相互绝缘；
所述第一信号线和所述第二信号线在所述基底上的正投影至少局部交叠；所述第一电极与所述第一信号线和所述第二信号线的正投影交叠区域局部交叠；
其中，所述第一电极在与所述第一信号线和所述第二信号线的正投影交叠区域相交叠的至少部分区域开设有开口。
在一些实施例中，所述第一信号线包括本体线，所述本体线和所述第二信号线空间交叉；
所述开口在所述基底上的正投影覆盖所述本体线和所述第二信号线的 空间交叉位置。
在一些实施例中，所述第一信号线还包括备用线，所述备用线与所述本体线位于同一膜层上，且所述本体线的局部与所述备用线并联连接；
所述备用线和所述第二信号线空间交叉；
所述开口在所述基底上的正投影还覆盖所述备用线和所述第二信号线的空间交叉位置。
在一些实施例中，所述第一信号线包括相互平行的多条；至少两条相邻所述第一信号线之间的间距小于所述开口沿相邻两条所述第一信号线排布方向的宽度；
所述开口在所述基底上的正投影覆盖相邻两条所述第一信号线及其间隔的局部区域。
在一些实施例中，所述第二信号线包括相互平行的多条；至少两条相邻所述第二信号线之间的间距小于所述开口沿相邻两条所述第二信号线排布方向的宽度；
所述开口在所述基底上的正投影覆盖相邻两条所述第二信号线及其间隔的局部区域。
在一些实施例中，所述第一电极的数量为多个，多个所述第一电极呈阵列排布；
至少部分所述第一电极上开设有所述开口；
一个所述第一电极上的所述开口在所述基底上的正投影面积占该个所述第一电极在所述基底上正投影面积的1/30～1/20。
在一些实施例中，沿所述第二信号线的延伸方向，相邻的两列所述第一电极对应的所述开口沿所述第一信号线延伸方向的间距不相等。
在一些实施例中，至少一个所述开口暴露两条所述第二信号线的局部区域；
和/或，至少一个所述开口暴露两条所述第一信号线的局部区域。
在一些实施例中，所述第一信号线包括扫描信号线或者发光控制信号线；
所述第二信号线包括数据信号线、电源信号线和感测信号线。
第二方面，本公开实施例提供一种显示背板，其中，包括上述显示基板；
所述显示基板中第一电极的开口中设置有填充结构，所述填充结构在所述显示基板中基底上的正投影与所述开口在所述基底上的正投影重合。
在一些实施例中，所述填充结构的背离所述基底的表面与所述第一电极的背离所述基底的表面平齐。
在一些实施例中，所述填充结构包括透明导电层和/或透明绝缘层；
所述透明绝缘层和所述透明导电层依次远离所述基底排布。
第三方面，本公开实施例提供一种显示面板，其中，包括上述显示背板。
在一些实施例中，还包括发光功能层和第二电极，位于所述显示背板上，所述发光功能层和所述第二电极依次远离所述显示背板中的第一电极排布；且所述发光功能层和所述第二电极在所述显示背板上的正投影分别覆盖所述第一电极及所述第一电极中的开口；
所述第二电极采用不透光导电材料；
或者，
所述第二电极采用透光导电材料；
所述第一电极还包括不透光导电材料层，位于所述第一电极的透光导电材料层的背离所述显示背板中基底的一侧。
在一些实施例中，包括多个像素区，每个所述像素区包括透明子区和显示子区；
所述第一电极、所述发光功能层和所述第二电极依次叠置构成发光器件；所述发光器件位于所述显示子区；
所述显示背板中的第一信号线和第二信号线位于所述显示子区；
所述基底由所述显示子区延伸至所述透明子区。
第四方面，本公开实施例提供一种显示装置，其中，包括上述显示面板。
第五方面，本公开实施例提供一种显示基板的制备方法，包括：
依次在基底上形成第一信号线、第二信号线和第一电极的图形；
其中，所述第一信号线、所述第二信号线和所述第一电极彼此之间相互绝缘；所述第一信号线和所述第二信号线在所述基底上的正投影至少局部交叠；所述第一电极与所述第一信号线和所述第二信号线的正投影交叠区域局部交叠；
形成所述第一电极的图形包括：采用构图工艺在所述第一电极与所述第一信号线和所述第二信号线的正投影交叠区域相交叠的至少部分区域开设开口。
第六方面，本公开实施例提供一种显示背板的制备方法，其中，包括上述显示基板的制备方法；
还包括在所述显示基板的第一电极的开口中形成填充结构；所述填充结构在所述显示基板中基底上的正投影与所述开口在所述基底上的正投影重合。
在一些实施例中，形成所述填充结构包括：形成绝缘层和/或导电层；
所述绝缘层和所述导电层依次形成于所述开口中。
附图说明
附图用来提供对本公开实施例的进一步理解，并且构成说明书的一部分，与本公开实施例一起用于解释本公开，并不构成对本公开的限制。通过参考附图对详细示例实施例进行描述，以上和其它特征和优点对本领域技术人员将变得更加显而易见，在附图中：
图1为一种示例性的显示基板结构示意图。
图2为沿图1中AA＇剖切线的结构剖视示意图。
图3为一种示例性的像素驱动电路示意图。
图4为另一种示例性的像素驱动电路示意图。
图5为公开技术中制备完成像素驱动电路和阳极的显示基板的局部结构俯视示意图。
图6为本公开实施例中一种显示基板的局部结构俯视示意图。
图7为沿图6中BB＇剖切线的结构剖视图。
图8为本公开实施例中另一种显示基板的局部结构俯视示意图。
图9为沿图8中CC＇剖切线的结构剖视图。
图10为本公开实施例中显示背板的局部结构俯视示意图。
图11为本公开实施例中显示面板的局部结构剖视示意图。
图12为本公开实施例中显示面板的局部结构俯视示意图。
具体实施方式
为使本领域技术人员更好地理解本公开实施例的技术方案，下面结合附图和具体实施方式对本公开实施例提供的一种显示基板、显示背板、显示面板作进一步详细描述。
在下文中将参考附图更充分地描述本公开实施例，但是所示的实施例可以以不同形式来体现，且不应当被解释为限于本公开阐述的实施例。反之，提供这些实施例的目的在于使本公开透彻和完整，并将使本领域技术人员充分理解本公开的范围。
本公开实施例不限于附图中所示的实施例，而是包括基于制造工艺而形成的配置的修改。因此，附图中例示的区具有示意性属性，并且图中所示区的形状例示了区的具体形状，但并不是旨在限制性的。
公开技术中，图1为一种示例性的显示基板结构示意图；图2为沿图1中AA＇剖切线的结构剖视示意图；如图1和2所示，该显示基板包括基底1和基底1上呈阵列排布的多个像素单元100，每个像素单元100中均包括 像素驱动电路13和发光器件12。如图2所示，像素驱动电路13、发光器件12以及对发光器件12进行封装的封装层14依次设置于基底1上。发光器件12包括依次远离基底设置的阳极121、发光功能层9和阴极122。对于顶发射型OLED发光器件，阳极121通常由透光的第一ITO(氧化铟锡)层、不透光的银膜层和透光的第二ITO层叠置而成，阳极121能够将发光器件12发出的光线向显示面板的背离基底1的一侧反射，从而实现OLED发光器件的顶发射。对于底发射型OLED发光器件，阴极122通常采用不透光的导电材料(如银或铜等)制成，阴极122能够将发光器件12发出的光线向显示面板的基底1侧反射，从而实现OLED发光器件的底发射。
公开技术中，图3为一种示例性的像素驱动电路示意图；各像素单元中的像素驱动电路可以包括：第一复位子电路15、阈值补偿子电路16、驱动子电路17、数据写入子电路18、第一发光控制子电路19、第二发光控制子电路20、第二复位子电路22及存储子电路23。
其中，第一复位子电路15与驱动子电路17的控制端连接，且被配置为在第一复位信号的控制下对驱动子电路17的控制端进行复位。阈值补偿子电路16分别与驱动子电路17的控制端和第二端电连接，且被配置为对驱动子电路17进行阈值补偿。数据写入子电路18与驱动子电路17的第一端电连接，且被配置为在扫描信号的控制下将数据信号写入存储子电路23。存储子电路23分别与驱动子电路17的控制端和第一电源信号线VDD电连接，且被配置为存储数据信号。第一发光控制子电路19分别与第一电源信号线VDD以及驱动子电路17的第一端相连，且被配置为实现驱动子电路17和第一电源信号线VDD间的连接导通或断开，第二发光控制子电路20分别与驱动子电路17的第二端和发光器件12的第一电极电连接，且被配置为实现驱动子电路17和发光器件12之间的连接导通或断开。第二复位子电路22与发光器件12的第一电极电连接，且被配置为在第二复位控制信号的控制下对驱动子电路17的控制端和发光器件12的第一电极进行复位。
参照图3，第一复位子电路15包括第一复位晶体管T1，阈值补偿子电路16包括阈值补偿晶体管T2，驱动子电路17包括驱动晶体管T3，驱动子电路17的控制端包括驱动晶体管T3的控制极，驱动子电路17的第一端包括驱动晶体管T3的第一极，驱动子电路17的第二端包括驱动晶体管T3的第二极。数据写入子电路18包括数据写入晶体管T4，存储子电路23包括存储电容Cst，第一发光控制子电路19包括第一发光控制晶体管T5，第二发光控制子电路20包括第二发光控制晶体管T6，第二复位子电路22包括第二复位晶体管T7。
参照图3，数据写入晶体管T4漏极的与驱动晶体管T3的源极电连接，数据写入晶体管T4的源极被配置为与数据信号线Data电连接以接收数据信号，数据写入晶体管T4的栅极被配置为与第一扫描信号线Ga1电连接以接收扫描信号；存储电容Cst的第二极板与第一电源信号线VDD电连接，存储电容Cst的第一极板与驱动晶体管T3的栅极电连接；阈值补偿晶体管T2的源极与驱动晶体管T3的栅极电连接，阈值补偿晶体管T2的漏极与驱动晶体管T3的漏极电连接，阈值补偿晶体管T2的栅极被配置为与第二扫描信号线Ga2电连接以接收补偿控制信号；第一复位晶体管T1的源极被配置为与第一复位电源端Vinit1电连接以接收第一复位信号，第一复位晶体管T1的漏极与驱动晶体管T3的栅极电连接，第一复位晶体管T1的栅极被配置为与第一复位控制信号线Rst1电连接以接收第一复位控制信号；第二复位晶体管T7的漏极被配置为与第一复位电源端Vinit1电连接以接收第一复位信号，第二复位晶体管T7的源极与发光器件12的第一电极电连接，第二复位晶体管T7的栅极被配置为与第二复位控制信号线Rst2电连接以接收第二复位控制信号；第一发光控制晶体管T5的源极与第一电源信号线VDD电连接，第一发光控制晶体管T5的漏极与驱动晶体管T3的源极电连接，第一发光控制晶体管T5的栅极被配置为与第一发光控制信号线EM1电连接以接收第一发光控制信号；第二发光控制晶体管T6的源极与驱动晶体管T3 的漏极电连接，第二发光控制晶体管T6的漏极与发光器件12的第一电极D1电连接，第二发光控制晶体管T6的栅极被配置为与第二发光控制信号线EM2电连接以接收第二发光控制信号；发光器件12的第二电极与第二电源信号线VSS电连接。
公开技术中，图4为另一种示例性的像素驱动电路示意图；像素驱动电路包括第一晶体管T1、第二晶体管T2、第三晶体管T3和存储电容Cst；第一晶体管T1的栅极连接第二晶体管T2的漏极和存储电容Cst的第一极板；第一晶体管T1的源极连接第一电源信号线VDD；第一晶体管T1的漏极连接第三晶体管T3的漏极、存储电容Cst的第二极板和发光器件12的阳极；发光器件12的阴极连接第二电源信号线VSS；第二晶体管T2的栅极连接开关扫描线Switch Scan；第二晶体管T2的源极连接数据信号线Data；第三晶体管T3的栅极连接感测扫描线Sense Scan；第三晶体管T3的源极连接感测信号线Sense；感测信号线Sense连接数据驱动电路(即数据驱动芯片，Source IC)；第三晶体管T3用于通过感测信号线确认第一晶体管T1的阈值电压，并检查第一晶体管T1驱动电流能力，同时调节第一晶体管T1的电流能力,使第一晶体管T1始终具有相同的电流能力；数据驱动电路连接数据信号线Data，用于向数据信号线提供数据驱动信号。
参照图3和图4中的像素驱动电路，各种信号线有的位于同一层，有的位于不同层，且位于不同层的信号线会存在空间交叉形成空间交叉位置点的情况；如扫描信号线通常与像素驱动电路中晶体管的栅极采用相同材料一次构图工艺制备；数据信号线和电源信号线通常与像素驱动电路中晶体管的源极和漏极采用相同材料一次构图工艺制备；扫描信号线与数据信号线和电源信号线位于不同层，且上下层信号线之间存在空间交叉位置点；在制备工艺过程中，这些空间交叉位置点容易发生短路不良；同时，同层分布的距离较近的相邻信号线之间也容易发生互联短路不良；或者，线宽较窄的信号线本身还容易发生断路不良；上述各种不良的发生都可以在显 示基板制备完成之前通过测试发现，如：对仅制备完成像素驱动电路和阳极的显示基板进行测试，即可发现上述各种短路或者断路不良。
参照图5，为公开技术中制备完成像素驱动电路和阳极的显示基板的局部结构俯视示意图；从图5中可见，由于OLED发光器件的阳极121与像素驱动电路中容易发生不良的一些关键位置(如信号线空间交叉位置点、距离较近的相邻信号线之间、信号线上易发生断路的位置点等)存在交叠，这就导致在阳极121层制备完毕后发现阳极121层下方像素驱动电路中的不良时无法进行维修。
针对公开技术中存在的上述问题，第一方面，本公开实施例提供一种显示基板，参照图6，为本公开实施例中一种显示基板的局部结构俯视示意图；图7为沿图6中BB＇剖切线的结构剖视图；其中，显示基板包括：基底1；第一信号线2；第二信号线3；第一电极4；第一信号线2、第二信号线3和第一电极4位于基底1上，且依次远离基底1排布；第一信号线2、第二信号线3和第一电极4彼此之间相互绝缘；第一信号线2和第二信号线3在基底1上的正投影至少局部交叠；第一电极4与第一信号线2和第二信号线3的正投影交叠区域局部交叠；其中，第一电极4在与第一信号线2和第二信号线3的正投影交叠区域相交叠的至少部分区域开设有开口40。
在一些实施例中，第一信号线2、第二信号线3和第一电极4任意相邻的两两之间都设置有绝缘层6，通过绝缘层6实现位于不同层的三者之间的彼此绝缘。
在一些实施例中，参照图6和图7，第一信号线2包括扫描信号线21或者发光控制信号线；第二信号线3包括数据信号线Data、电源信号线30和感测信号线Sense。
在一些实施例中，第一信号线2和第二信号线3可以是位于任意两个不同层中的任意信号线。并不局限于位于不同层的扫描信号线和数据信号 线。
在一些实施例中，第一电极4可以是OLED发光器件的阳极，也可以是液晶显示面板中子像素的像素电极。
在一些实施例中，显示基板为OLED显示基板，OLED显示基板包括像素驱动电路，像素驱动电路包括驱动晶体管，驱动晶体管的源极或者漏极连接第一电极4，驱动晶体管的靠近基底1的一侧设置有遮光金属层5，遮光金属层5遮挡驱动晶体管的有源层，以避免有源层在光照下导致驱动晶体管的漏电流增大，确保驱动晶体管的性能。
本公开实施例中，由于制备工艺缺陷或者其他的原因，第一信号线2和第二信号线3容易在其正投影交叠区域发生短路，第一电极4上开设开口40的位置为第一信号线2和第二信号线3之间容易发生短路的位置点，通过使第一电极4在与第一信号线2和第二信号线3的正投影交叠区域相交叠的至少部分区域开设开口40；能够在第一信号线2和第二信号线3之间发生短路不良时，从第一电极4所在侧通过开口40对发生短路的不良位置点进行维修，确保了显示基板的品质。
在一些实施例中，从第一电极4所在侧通过开口40对发生短路的不良位置点进行激光切割维修，将发生短路的两信号线在短路位置点切断，消除短路不良。
在一些实施例中，参照图6，第一信号线2包括本体线201，本体线201和第二信号线3空间交叉；开口40在基底1上的正投影覆盖本体线201和第二信号线3的空间交叉位置。
其中，本体线201与第二信号线3容易在其空间交叉位置点发生短路不良，通过使开口40在基底1上的正投影覆盖本体线201和第二信号线3的空间交叉位置点，能方便对空间交叉位置点的短路不良进行维修。
在一些实施例中，参照图6，第一信号线2为扫描信号线21(如栅线)，第二信号线3为数据信号线Data、电源信号线30和感测信号线Sense。扫 描信号线21与数据信号线Data、电源信号线30和感测信号线Sense分别纵横交叉形成空间交叉位置点。
在一些实施例中，参照图8和图9，图8为本公开实施例中另一种显示基板的局部结构俯视示意图；图9为沿图8中CC＇剖切线的结构剖视图；其中，第一信号线2还包括备用线202，备用线202与本体线201位于同一膜层上，且本体线201的局部与备用线202并联连接；备用线202和第二信号线3空间交叉；开口40在基底1上的正投影还覆盖备用线202和第二信号线3的空间交叉位置。
其中，备用线202与第二信号线3容易在其空间交叉位置点发生短路不良，通过使开口40在基底1上的正投影覆盖备用线202和第二信号线3的空间交叉位置点，能方便对空间交叉位置点的短路不良进行维修。备用线202能够在本体线201出现故障断开时，保持本体线201上传输的信号能够通过备用线202继续传输，避免显示基板出现由于信号缺失所导致的显示不良。同理，当备用线202出现故障断开时，本体线201可以发挥上述相同的作用。
在一些实施例中，参照图8，第一信号线2包括相互平行的多条；至少两条相邻第一信号线2之间的间距小于开口40沿相邻两条第一信号线2排布方向的宽度；开口40在基底1上的正投影覆盖相邻两条第一信号线2及其间隔的局部区域。
其中，相邻两条第一信号线2之间的间距可以为两第一信号线2之间的最小安全距离。当相邻两条第一信号线2之间的间距较小时，两第一信号线2之间在某些位置点容易发生短路互联，在第一电极4的对应两第一信号线2的容易发生短路互联的位置点开设开口40，能方便对短路互联不良位置点进行维修。另外，如果第一信号线2的线宽较小，第一信号线2还容易在某些位置点发生断路，将第一电极4上的开口40对应开设在易发生断路的位置点，还能方便对断路不良的位置点进行维修。
在一些实施例中，通过开口40对发生短路互联的两第一信号线2进行激光切割，切断短路互联位置点两第一信号线2之间的连接；通过开口40对发生断路的第一信号线2进行激光修复，使第一信号线2在断路位置点被修复连接。
在一些实施例中，参照图8，第二信号线3包括相互平行的多条；至少两条相邻第二信号线3之间的间距小于开口40沿相邻两条第二信号线3排布方向的宽度；开口40在基底1上的正投影覆盖相邻两条第二信号线3及其间隔的局部区域。
其中，相邻两条第二信号线3之间的间距可以为两第二信号线3之间的最小安全距离。当相邻两条第二信号线3之间的间距较小时，两第二信号线3之间在某些位置点容易发生短路互联，在第一电极4的对应两第二信号线3的容易发生短路互联的位置点开设开口40，能方便对短路互联不良位置点进行维修。另外，如果第二信号线3的线宽较小，第二信号线3还容易在某些位置点发生断路，将第一电极4上的开口40对应开设在易发生断路的位置点，还能方便对断路不良的位置点进行维修。
在一些实施例中，通过开口40对发生短路互联的两第二信号线3进行激光切割，切断短路互联位置点两第二信号线3之间的连接；通过开口40对发生断路的第二信号线3进行激光修复，使第二信号线3在断路位置点被修复连接。
在一些实施例中，参照图8，第一电极4的数量为多个，多个第一电极4呈阵列排布；至少部分第一电极4上开设有开口40；一个第一电极4上的开口40在基底1上的正投影面积占该个第一电极4在基底1上正投影面积的1/30～1/20。如此设置，开口40所占用的第一电极4的区域面积基本不会对显示基板的显示开口率造成影响，从而确保显示基板能够正常显示。
在一些实施例中，参照图8，沿第二信号线3的延伸方向，相邻的两列第一电极4对应的开口40沿第一信号线2延伸方向的间距不相等。即开口 40的位置可根据第一信号线2和/或第二信号线3之间容易发生短路或断路的位置点随机设置。
在一些实施例中，参照图8，至少一个开口40暴露两条第二信号线3的局部区域；和/或，至少一个开口40暴露两条第一信号线2的局部区域。
在一些实施例中，第一电极4包括透光导电材料层。如作为OLED发光器件阳极的第一电极4通常先在像素驱动电路的背离基底1的一侧制备一个ITO透光层。如此能便于透过第一电极4观看到其下方第一信号线2和第二信号线3之间的不良或者第一信号线2和第二信号线3各自线上的不良，从而便于进行不良维修。
在一些实施例中，第一电极4也可以采用不透光导电材料，因为第一电极4中开设有用于维修的开口40，所以第一电极4采用不透光导电材料也能通过开口40观看到其下方不良，从而便于维修。
基于显示基板的上述结构，本公开实施例还提供一种该显示基板的制备方法，包括：依次在基底上形成第一信号线、第二信号线和第一电极的图形；其中，第一信号线、第二信号线和第一电极彼此之间相互绝缘；第一信号线和第二信号线在基底上的正投影至少局部交叠；第一电极与第一信号线和第二信号线的正投影交叠区域局部交叠；形成第一电极的图形包括：采用构图工艺在第一电极与第一信号线和第二信号线的正投影交叠区域相交叠的至少部分区域开设开口。
其中，构图工艺包括沉积形成第一电极膜层、在第一电极膜层上涂敷光刻胶、采用包含第一电极以及其上开口图形的掩膜板对第一电极膜层上的光刻胶进行曝光显影、刻蚀形成第一电极以及其上开口的图形。
在一些实施例中，第一信号线和第二信号线的制备工艺与第一电极的制备工艺相同，这里不再赘述。
本公开实施例所提供的显示基板，通过使第一电极在与第一信号线和第二信号线的正投影交叠区域相交叠的至少部分区域开设开口；能够在第 一信号线和第二信号线之间发生短路不良时，从第一电极所在侧通过开口对发生短路的不良位置点进行维修，确保了显示基板的品质。
第二方面，本公开实施例还提供一种显示背板，参照图10，为本公开实施例中显示背板的局部结构俯视示意图；其中，显示背板包括上述公开实施例中的显示基板；显示基板中第一电极4的开口40中设置有填充结构7，填充结构7在显示基板中基底上的正投影与开口40在基底上的正投影重合。
通过在开口40中设置填充结构7，能够确保第一电极4的平整度，以便后续在第一电极4背离基底的一侧形成其他膜层，同时还能确保显示背板的正常显示性能。
在一些实施例中，填充结构7的背离基底的表面与第一电极4的背离基底的表面平齐。如此设置，能进一步确保第一电极4的背离基底一侧表面的平整度，以便后续在第一电极4背离基底的一侧形成其他膜层，同时还能确保显示背板的正常显示性能。
在一些实施例中，填充结构7包括透明导电层和/或透明绝缘层；透明绝缘层和透明导电层依次远离基底排布。填充结构7中透明导电层的设置，一方面能够使开口40区域与第一电极4的其他区域具有同样的导电性能，从而确保第一电极4整体的导电性能，进而确保采用第一电极4作为阳极的OLED发光器件的正常发光性能或者采用第一电极4作为像素电极的子像素的正常显示性能；另一方面还便于在第一信号线2和/或第二信号线3之间发生短路或断路故障时，能通过激光透过该透明导电层对故障位置点进行修复。
在一些实施例中，透明导电层采用如导电银胶或者ITO材料；透明绝缘层采用有机透明胶，如光刻胶等。其中，填充结构7采用透明膜层，一方面使填充结构7具有与能透光的第一电极4相同的透光性能，从而便于透过第一电极4及其上的开口40观看其下方第一信号线2和第二信号线3 之间的不良或者第一信号线2和第二信号线3各自线上的不良，从而便于进行不良维修；另一方面还便于在第一信号线2和/或第二信号线3之间发生短路或断路故障时，能通过激光透过该透明导电层和/或透明绝缘层对故障位置点进行修复。
在一些实施例中，填充结构7也可以是不透光的。例如对于采用第一电极4作为阳极的顶发射型OLED发光器件，第一电极4以及填充于开口40中的填充结构7均包括不透光的导电膜层，以便对OLED发光器件发出的光线进行反射，实现顶发射显示。但这种情况下，只能在开口40中未设置填充结构7时对第一电极4下方的第一信号线2和/或第二信号线3之间的短路或断路故障进行修复；当开口40中设置填充结构7后，由于该填充结构7是不透光的，所以激光无法再透过该填充结构7进行故障修复。
基于显示背板的上述结构，本公开实施例还提供一种该显示背板的制备方法，其中，包括上述实施例中显示基板的制备方法，还包括在显示基板的第一电极的开口中形成填充结构；填充结构在显示基板中基底上的正投影与开口在基底上的正投影重合。
在一些实施例中，形成填充结构包括：形成绝缘层和/或导电层；绝缘层和导电层依次形成于开口中。
在一些实施例中，导电层采用导电银胶；绝缘层采用有机透明胶，如光刻胶等。绝缘层和导电层分别通过喷胶设备的喷嘴将透明胶喷涂于开口中，将开口封闭。
本公开实施例中所提供的显示背板，通过采用上述实施例中的显示基板，能够在显示背板中第一信号线和第二信号线之间发生短路不良时，从显示背板的第一电极所在侧通过开口对发生短路的不良位置点进行维修，确保了显示基板的品质；该显示背板通过在开口中设置填充结构，能够将第一电极的开口填平，从而确保第一电极整体膜层的平整度，以便后续在第一电极背离基底的一侧形成平整的其他膜层，同时还能确保显示背板的 正常显示性能。
第三方面，本公开实施例还提供一种显示面板，参照图11，为本公开实施例中显示面板的局部结构剖视示意图；其中，显示面板包括上述公开实施例中的显示背板8。
在一些实施例中，参照图11，显示面板还包括发光功能层9和第二电极10，位于显示背板8上，发光功能层9和第二电极10依次远离显示背板8中的第一电极4排布；且发光功能层9和第二电极10在显示背板8上的正投影分别覆盖第一电极4及第一电极4中的开口。其中，第一电极4、发光功能层9和第二电极10的叠置结构可以形成发光器件。
在一些实施例中，第二电极10采用不透光导电材料；第一电极4为透光导电材料层，如此设置，发光器件发出的光线经第二电极10反射后从显示背板8侧出射，从而能实现底发射型的发光器件。
在一些实施例中，第二电极10采用透光导电材料；第一电极4在透光导电材料层的基础上还包括不透光导电材料层，不透光导电材料层位于透光导电材料层的背离显示背板8中基底1的一侧。如此设置，发光器件发出的光线经第一电极4反射后从第二电极10侧出射，从而能实现顶发射型的发光器件。
在一些实施例中，参照图12，为本公开实施例中显示面板的局部结构俯视示意图；其中，显示面板包括多个像素区11，每个像素区11包括透明子区111和显示子区112；第一电极、发光功能层和第二电极依次叠置构成发光器件12；发光器件12位于显示子区112；显示背板中的第一信号线2和第二信号线3位于显示子区112；基底由显示子区112延伸至透明子区111。
其中，该显示面板通过将各个像素区11分别设置为包括透明子区111和显示子区112，将发光器件12以及驱动发光器件12发光的像素驱动电路(包括晶体管电路和各种信号线)都设置在显示子区112，透明子区111内 仅设置有透明绝缘层，如基底，无机绝缘层和有机绝缘层等，能够实现该显示面板的透明显示。该显示面板可以是较大尺寸(如55寸)的透明显示面板。
本公开实施例所提供的显示面板，通过采用上述显示背板，能够在显示背板中第一信号线和第二信号线之间发生短路不良时，从显示背板的第一电极所在侧通过开口对发生短路的不良位置点进行维修，确保了显示背板的品质，从而确保了显示面板的品质。
第四方面，本公开实施例还提供一种显示装置，包括上述实施例中的显示面板。
通过采用上述实施例中的显示面板，能够对该显示装置中的短路不良进行及时维修，从而确保了该显示装置的品质。
本公开实施例所提供的显示装置可以为OLED面板、OLED电视、OLED广告牌、LCD面板、LCD电视、显示器、手机、导航仪等任何具有显示功能的产品或部件。
可以理解的是，以上实施方式仅仅是为了说明本公开的原理而采用的示例性实施方式，然而本公开并不局限于此。对于本领域内的普通技术人员而言，在不脱离本公开的精神和实质的情况下，可以做出各种变型和改进，这些变型和改进也视为本公开的保护范围。

Claims (15)

  1. 一种显示基板，包括：基底；第一信号线；第二信号线；第一电极；
    所述第一信号线、所述第二信号线和所述第一电极位于所述基底上，且依次远离所述基底排布；所述第一信号线、所述第二信号线和所述第一电极彼此之间相互绝缘；
    所述第一信号线和所述第二信号线在所述基底上的正投影至少局部交叠；所述第一电极与所述第一信号线和所述第二信号线的正投影交叠区域局部交叠；
    其中，所述第一电极在与所述第一信号线和所述第二信号线的正投影交叠区域相交叠的至少部分区域开设有开口。
  2. 根据权利要求1所述的显示基板，其中，所述第一信号线包括本体线，所述本体线和所述第二信号线空间交叉；
    所述开口在所述基底上的正投影覆盖所述本体线和所述第二信号线的空间交叉位置。
  3. 根据权利要求2所述的显示基板，其中，所述第一信号线还包括备用线，所述备用线与所述本体线位于同一膜层上，且所述本体线的局部与所述备用线并联连接；
    所述备用线和所述第二信号线空间交叉；
    所述开口在所述基底上的正投影还覆盖所述备用线和所述第二信号线的空间交叉位置。
  4. 根据权利要求1所述的显示基板，其中，所述第一信号线包括相互平行的多条；至少两条相邻所述第一信号线之间的间距小于所述开口沿相 邻两条所述第一信号线排布方向的宽度；
    所述开口在所述基底上的正投影覆盖相邻两条所述第一信号线及其间隔的局部区域。
  5. 根据权利要求1所述的显示基板，其中，所述第二信号线包括相互平行的多条；至少两条相邻所述第二信号线之间的间距小于所述开口沿相邻两条所述第二信号线排布方向的宽度；
    所述开口在所述基底上的正投影覆盖相邻两条所述第二信号线及其间隔的局部区域。
  6. 根据权利要求1-5任意一项所述的显示基板，其中，所述第一电极的数量为多个，多个所述第一电极呈阵列排布；
    至少部分所述第一电极上开设有所述开口；
    一个所述第一电极上的所述开口在所述基底上的正投影面积占该个所述第一电极在所述基底上正投影面积的1/30～1/20。
  7. 根据权利要求6所述的显示基板，其中，沿所述第二信号线的延伸方向，相邻的两列所述第一电极对应的所述开口沿所述第一信号线延伸方向的间距不相等。
  8. 根据权利要求6所述的显示基板，其中，至少一个所述开口暴露两条所述第二信号线的局部区域；
    和/或，至少一个所述开口暴露两条所述第一信号线的局部区域。
  9. 根据权利要求1-5任意一项所述的显示基板，其中，所述第一信号线包括扫描信号线或者发光控制信号线；
    所述第二信号线包括数据信号线、电源信号线和感测信号线。
  10. 一种显示背板，其中，包括权利要求1-9任意一项所述的显示基板；
    所述显示基板中第一电极的开口中设置有填充结构，所述填充结构在所述显示基板中基底上的正投影与所述开口在所述基底上的正投影重合。
  11. 根据权利要求10所述的显示背板，其中，所述填充结构的背离所述基底的表面与所述第一电极的背离所述基底的表面平齐。
  12. 根据权利要求11所述的显示背板，其中，所述填充结构包括透明导电层和/或透明绝缘层；
    所述透明绝缘层和所述透明导电层依次远离所述基底排布。
  13. 一种显示面板，其中，包括权利要求10-12任意一项所述的显示背板。
  14. 根据权利要求13所述的显示面板，其中，还包括发光功能层和第二电极，位于所述显示背板上，所述发光功能层和所述第二电极依次远离所述显示背板中的第一电极排布；且所述发光功能层和所述第二电极在所述显示背板上的正投影分别覆盖所述第一电极及所述第一电极中的开口；
    所述第二电极采用不透光导电材料；
    或者，
    所述第二电极采用透光导电材料；
    所述第一电极还包括不透光导电材料层，位于所述第一电极的透光导电材料层的背离所述显示背板中基底的一侧。
  15. 根据权利要求14所述的显示面板，其中，包括多个像素区，每个所述像素区包括透明子区和显示子区；
    所述第一电极、所述发光功能层和所述第二电极依次叠置构成发光器件；所述发光器件位于所述显示子区；
    所述显示背板中的第一信号线和第二信号线位于所述显示子区；
    所述基底由所述显示子区延伸至所述透明子区。
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