WO2023234851A1

WO2023234851A1 - Semiconductor device

Info

Publication number: WO2023234851A1
Application number: PCT/SG2022/050372
Authority: WO
Inventors: Chee Wei LEE
Original assignee: Compoundtek Pte. Ltd.
Priority date: 2022-05-31
Filing date: 2022-05-31
Publication date: 2023-12-07

Abstract

The present invention relates to semiconductor device (1) e.g. silicon photonic chip, comprising at least one insulator layer (10), at least one first waveguide (20) encapsulated within the insulator layer (10) for propagating light through the insulator layer (10) and at least two dielectric interfacing layers for converting a spot size of light exiting the first waveguide (20) to be matching with an optical fiber coupled to a facet of the device (1).

Description

SEMICONDUCTOR DEVICE

FIELD OF THE INVENTION

The disclosures made herein relate generally to the semiconductor devices and more particularly to a silicon photonic chip.

BACKGROUND OF THE INVENTION

Due to rapid growing demands from data center, Lidar, Internet of Things (loT), 5G network and the like, silicon photonics technology has attracted great attention over the past decade. Benefited from its advantages in terms of compatibility with the Complementary Metal-Oxide-Semiconductor (CMOS) process, low cost, high production volume and high integration density, silicon photonics has achieved great success in the technology transfer from academia to industry.

A typical silicon photonic chip includes a silicon-on-insulator (SOI) core layer and silicon dioxide cladding layer fabricated into waveguide, splitters, modulators, detector, etc., for optical signal processing, and metal traces and vertical metal interconnects for electrical signal interface. Figure 1 illustrates standard layer stacks of a silicon photonic wafer or chip, including an electrical interface fabricated by backend-of-the-line (BEOL). A BEOL layer stack consists of a dielectric layer, formed of silicon dioxide material, three dielectric etch stop layers formed of silicon nitride (SiNx) or silicon oxynitride (SiON) material and metal layers. In actual application, no matter how much improvement is made to the devices, a silicon chip is still facing a high interface loss with the external component, which is usually an optical fiber attached to the silicon chip. This remains a challenge in the industry, which would require a coupling loss of less than 1 dB per facet. The loss is mainly attributed to spot size mismatch between waveguide mode spot sizes in SOI device and optical fiber. A commonly used standard single mode fiber (SMF) has a circular spot size of around 10 pm in diameter, while the maximum spot size of a SOI interface coupler is around 3 pm in diameter. This mismatch could easily incur a coupling loss of more than 3dB.

United States Patent No.: US 10,444,434 B2 discloses a semiconductor photonic device with a set of facets and optical couplers associated with the facets. Each coupler has multiple waveguides, wherein at least one waveguide includes spaced-apart segments arranged to form a subwavelength grating (SWG) configured to entrain electromagnetic radiation. However, the SWG is still weaker to guide light and creates leakage losses, which in turn makes it unsuitable for applications wherein the waveguide needs to be slanted or bent. Furthermore, the SWG complicates the process of modulating light signals inside the SWG through electrical pumping. Due to the submicron size of each segment of the SWG, the fabrication of SWG devices is also more stringent and difficult to control, which will largely affect the performance of the SWG.

Hence, there is a need for a semiconductor device that minimizes coupling losses without complicating the waveguide structure or fabrication thereof. Furthermore, there is a need for a semiconductor device that allows fabrication of slanted and/or bent waveguides without increasing leakage losses.

SUMMARY OF THE INVENTION

The present invention as defined in the appended claims relates to a semiconductor device, comprising at least one insulator layer, at least one first waveguide for propagating light through the insulator layer and at least two dielectric interfacing layers encapsulated within the insulator layer for converting a spot size of light exiting the first waveguide to be matching with an optical fiber coupled to a facet of the device. At least three second waveguides are formed in the dielectric interfacing layers, wherein the dielectric interfacing layers are grown within the insulator layer by means of chemical vapor deposition (CVD) process. At least one second waveguide is formed in each dielectric interfacing layer.

Preferably, the insulator layer is a silicon dioxide (SiCh) layer and the dielectric interfacing layers are formed of silicon nitride (SiN) and/or silicon oxynitride (SiON). At least one of the second waveguides slanted and/or bent with respect to the facet of the device.

Each of the second waveguides is configured as a continuous solid structure. At least one of the dielectric interfacing layers is formed with at least one photonic crystal portion. In one aspect, the first waveguide is a silicon waveguide and the device is a silicon photonic chip.

In one aspect, the second waveguides are parallel to one another. Preferably, the second waveguides are at equidistant from one another.

BRIEF DESCRIPTION OF THE ACCOMPANYING DRAWINGS

The present invention will be fully understood from the detailed description given herein below and the accompanying drawings which are given by way of illustration only, and thus are not limitative of the present invention, wherein:

In the appended drawings:

Figure 1 shows a longitudinal sectional view of a conventional semiconductor chip;

Figure 2 shows a plane view of a semiconductor device in accordance to an exemplary embodiment of the present invention;

Figure 3 shows a side view of a semiconductor device in accordance to an exemplary embodiment of the present invention;

Figure 4 shows a front view of a semiconductor device in accordance to an exemplary embodiment of the present invention;

Figure 5 shows a perspective view of a semiconductor device in accordance to an exemplary embodiment of the present invention;

Figure 6 shows a perspective view of dielectric interface layers in accordance to an alternate embodiment of the present invention; Figure 7 shows a graphical representation of transmission loss of the semiconductor chip;

Figure 8 shows a graphical representation of coupling loss of the semiconductor chip in comparison with prior art; and

Figure 9 shows experimental results of mode of light entering the first waveguide and mode of light exiting between the second waveguides.

DETAILED DESCRIPTION OF THE INVENTION

Detailed description of preferred embodiments of the present invention is disclosed herein. It should be understood, however, that the embodiments are merely exemplary of the present invention, which may be embodied in various forms. Therefore, the details disclosed herein are not to be interpreted as limiting, but merely as the basis for the claims and for teaching one skilled in the art of the invention. The numerical data or ranges used in the specification are not to be construed as limiting. The following detailed description of the preferred embodiments will now be described in accordance with the attached drawings, either individually or in combination.

Figure 2 shows a plan view of a semiconductor device (1), in accordance with an exemplary embodiment of the present invention. The device (1), preferably a silicon photonics chip, comprising at least one insulator layer (10), at least one first waveguide (20) e.g. silicon waveguide, for propagating light through the insulator layer (10) and at least two dielectric interfacing layers encapsulated within the insulator layer (10), as shown in Figures 3 & 4 for converting a spot size of light exiting the first waveguide (20) to be matching with an optical fiber (3) coupled to a facet (2) of the device (1). In one embodiment, the first waveguide (20) is formed of at least one of silicon nitride (SiN), III-V compound semiconductor material, titanium oxide (TiC ) or aluminum trioxide (AI2O3).

At least three second waveguides (30a-30c) are formed in the two dielectric interfacing layers, wherein the dielectric interfacing layers are grown within the insulator layer (10) by means of chemical vapor deposition (CVD) process. At least one second waveguide (30a-30c) is formed in each dielectric interfacing layer. Preferably, at least one of the second waveguides (30a-30c) slanted and/or bent with respect to the facet (2) of the device (1). More preferably, the second waveguides (30a-30c) are parallel to one another and are at equidistant from one another, as shown in Figure 4.

The insulator layer (10) is a silicon dioxide (SiO2) layer or silicon oxynitride (SiON) layer. The dielectric interfacing layers are formed of silicon nitride (SiN) and/or silicon oxynitride (SiON) and one dielectric interfacing layer is stacked upon the other dielectric interfacing layer. Each of the second waveguides (30a- 30c) is configured as a continuous solid structure. Preferably, the dielectric interfacing layers are formed with a thickness within the range of 210-280 nm

In one embodiment, the dielectric interfacing layers are formed as slabs of dielectric material formed with one or more photonic crystal portions (30d) defining the second waveguides (30a-30c) as shown in Figure 6. The first waveguide (20) and the second waveguide (30a) of the lower dielectric interfacing layer is formed with adiabatic tapered couplers (19), such that light exiting the first waveguide (20) enters to the second waveguide (30a) of the lower dielectric interfacing layer through adiabatic tapered couplers (19), as shown in Figures 2 & 5. The experimental results plotted in Figure 7 shows that the transfer loss reaches as low as 0. The light propagating in the second waveguide (30a) expands into a much larger supermode due to the refractive indices of the second waveguides (30a-30c) as shown in Figure 8. The transition is done by the adiabatic couplers (19) wherein the mode of the light expands to a much larger supermode of the second waveguides (30a-30c) formed as a three-prong or trident configuration, as shown in Figure 9. By this way, the present invention enhances coupling efficiency without complicating the waveguide structure or fabrication thereof. Furthermore, in one embodiment, the second waveguides (30a-30c) are angled or bent with respect to the facet (2) is a need for a semiconductor device. Since the second waveguides (30a-30c) are formed as continuous structure without any segmentation of cavities by means of CVD process, fabrication of slanted and/or bent waveguides is possible without increasing leakage losses and without complicating the fabrication process.

A coupling loss with an optical fiber is characterized by an experiment in accordance with the present invention is shown in Figure 8, in comparison to those of conventional single dielectrics-2 waveguide. From the results, it can be seen that the present invention greatly improves the coupling efficiency between the device (1) and the optical fiber i.e. single mode fiber (SMF).

The experimental results are based on operating wavelength set to be 1550 nm. Nevertheless, based on the material used, the operating wavelength can be from visible to mid infrared, which is wider than the silicon photonics operation regime.

The present invention is applicable to optical couplers to act as an interface between a silicon chip and SMF. This greatly reduces optical power budget of the entire chip while minimizing the coupling losses as low as 0.5 dB/facet. Since the second waveguides (30a-30c) are formed of SiN, the device (1) has also higher temperature stability, mechanical strength and structural integrity, and all these will improve the reliability of the device (1). There are also no additional layers involved. Thus, it serves as a high-performance, economical and effective solution.

Due to the simple waveguide structure and fabrication process thereof, the present invention can be fabricated via back end of line (BEOL) silicon photonics wafer process, which is scalable and highly cost effective. The present invention is realized by integration of two materials platform (dielectric and SOI) integrated via the BEOL process on the silicon photonic process.

The thickness of the second waveguides (30a-30c) is in the range of 210-280 nm, and thus the light is weakly confined in the layer as compared to the first waveguide (20), which in turn makes the coupling performance less sensitive to the quality of dielectric material and also to a sidewall of second waveguides (30a- 30c). The weak confinement also gives good interaction between dielectric interface layers even when separated by wider gaps.

The present invention makes full use of the standard wafer-scale process for silicon photonics, with no additional layer and process required, but offers an effective way to enable large-scale silicon photonics chip with enhanced performance. The coupling loss achievable is as low as 0.5 dB/facet, as compared to typical 3dB loss for SOI coupler, and >ldB if using just a single layer of dielectrics -2.

The present invention does not involve any air suspended structure, hence, it has much higher mechanical strength and structural integrity than the commonly used suspended spot-size converter in silicon photonics. Furthermore, the second waveguides (30a-30c) are fabricated through BEOL process from SiNx or SiON material that is transparent in visible to mid-infrared wavelength region. Therefore, the present invention does not affect the existing applications of silicon photonics. Furthermore, the waveguide material exhibits much better temperature stability than silicon, and thus guarantee performance stability over wider temperature range. The terminology used herein is for the purpose of describing particular example embodiments only and is not intended to be limiting. As used herein, the singular forms "a", "an" and "the" may be intended to include the plural forms as well, unless the context clearly indicates otherwise. The terms "comprises", "comprising", “including” and “having” are inclusive and therefore specify the presence of stated features, integers, steps, operations, elements and/or components, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components and/or groups thereof.

The method steps, processes and operations described herein are not to be construed as necessarily requiring their performance in the particular order discussed or illustrated, unless specifically identified as an order of performance. It is also to be understood that additional or alternative steps may be employed. The use of the expression “at least” or “at least one” suggests the use of one or more elements, as the use may be in one of the embodiments to achieve one or more of the desired objects or results.

Claims

CLAIMS.

1. A semiconductor device (1), comprising:

(a) at least one insulator layer (10);

(b) at least one first waveguide (20) for propagating light through said insulator layer (10); and

(c) at least two dielectric interfacing layers encapsulated within said insulator layer (10) for converting a spot size of light exiting said first waveguide (20) to be matching with an optical fiber coupled to a facet of said device (1), characterized in that at least three second waveguides (30a-30c) are formed in said dielectric interfacing layers, wherein said dielectric interfacing layers are grown within said insulator layer (10) by means of chemical vapor deposition (CVD) process, wherein at least one second waveguide (30a-30c) is formed in each dielectric interfacing layer.

2. The device (1) of claim 1, wherein at least one of said second waveguides (30a- 30c) slanted and/or bent with respect to said facet of said device (1).

3. The device (1) of claim 1, wherein said insulator layer (10) is a silicon dioxide (SiCh) layer or silicon oxynitride (SiON) layer.

4. The device (1) of claim 1, wherein said dielectric interfacing layers are formed of silicon nitride (SiN) and/or silicon oxynitride (SiON).

5. The device (1) of claim 1, wherein each of said second waveguides (30a-30c) is configured as a continuous solid structure.

6. The device (1) of claim 1, wherein at least one of said dielectric interfacing layers is formed with at least one photonic crystal portion. The device (1) of claim 1, wherein said first waveguide (20) is made of at least one of silicon (Si), silicon nitride (SiN), III-V compound semiconductor material, titanium oxide (TiCh) or aluminum trioxide (AI2O3). The device (1) of claim 1, wherein said device (1) is a silicon photonic chip. The device (1) of claim 1, wherein said second waveguides (30a-30c) are parallel to one another. The device (1) of claim 1, wherein said second waveguides (30a-30c) are at equidistant from one another.