WO2023225540A2

WO2023225540A2 - Fabrication methods for high aspect ratio microneedles and tools

Info

Publication number: WO2023225540A2
Application number: PCT/US2023/067096
Authority: WO
Inventors: Mark A. Webb; Marc S. CHOOLJIAN; David A. Steele; Charles V. NGUYEN
Original assignee: Mekonos Inc.
Priority date: 2022-05-18
Filing date: 2023-05-17
Publication date: 2023-11-23
Also published as: WO2023225550A2; WO2023225550A3; WO2023225540A3

Abstract

Aspects of the present disclosure provide systems, methods, and computer-readable storage media that support fabrication of microneedles or other tools having high aspect ratios. A method of fabricating such microneedles or tools includes depositing a photoresist layer on a substrate, followed by applying a custom pattern to the photoresist layer. The method includes performing one or more lithography operations on the photoresist layer to remove a portion of the photoresist layer beneath the custom pattern and form, from the substrate, a custom-shaped feature having a shape that corresponds to the custom pattern. The method includes performing an etching process on the substrate. The custom-shaped feature acts as a mask during the etching process to form a substrate pillar. A dimension of the substrate pillar at a second end within the substrate is larger than the dimension of the substrate pillar at a first end that includes the custom-shaped feature.

Description

FABRICATION METHODS FOR HIGH ASPECT RATIO MICRONEEDLES AND

TOOLS

CROSS-REFERENCE TO RELATED APPLICATIONS

[0001] The present application claims the benefit of U.S. Provisional Application No. 63/364,948, filed on May 18, 2022 and titled “FABRICATION METHODS OF PRECISE AUTOMATED TOOLS”, the contents of which are incorporated herein by reference in their entirety.

TECHNICAL FIELD

[0002] The present disclosure relates generally to systems, processes, and methods for manufacturing a needle-containing or tool-containing device for medical applications. Particular implementations leverage lithography operations and other fabrication processes to form tips of microneedles or other tools having high aspect ratios from silicon or other semiconductor substrates.

BACKGROUND

[0003] As technology advances, research and commercial interest in developing microscopic devices continues to grow. For example, in recent years materials and technologies traditionally associated with fabricating semiconductor devices for computers or other electronic devices have found useful applications in other fields, such as in biology and medicine. One such application is the use of microneedles and nanoneedles fabricated using semiconductor materials. Microneedles have attracted the attention of researchers because of their potential to provide a pain-free or reduced-pain alternative to syringes for injecting fluid into a patient or drawing blood from a patient for testing (e.g., blood glucose and/or insulin levels). Additionally, microneedles offer the potential for improved logistics (e.g., reducing the free volume of medication in any one place to reduce or eliminate the need for refrigerated transport) and increased patient selfadministration (e.g., reducing the need and resulting costs for a healthcare provider to be present to inject fluid or draw blood). Microneedles may be also useful for medical procedures requiring a high degree of precision, such as treatments precisely targeting cancer cells while avoiding non- cancerous cells. [0004] High aspect ratio nanoneedle/microneedle architectures and geometries are commercially difficult to manufacture at scale. For example, attempts at fabricating microneedles with high aspect ratios often result in microneedles that fail to achieve the desired aspect ratios or that are brittle and prone to breaking, which limits or prevents their usefulness in medical or biological applications. Even more difficult is achieving specific feature geometries for high efficacy cell and gene engineering workflows utilizing traditional semiconductor process tooling. High aspect ratio structures that are tightly packed are known to not survive processing in liquids. It is also difficult to manufacture high aspect ratio microneedles for multi-use devices, as opposed to a single-use devices that fail after use due to stress. Manufacturing microneedle structures at scale without breaking the structures or experiencing low yield is a key barrier to commercial viability.

SUMMARY

[0005] Aspects of the present disclosure provide systems, devices, methods, and computer-readable storage devices and media that support scalable fabrication of microneedles and tools having high aspect ratios. The aspects described herein enable the formation of high aspect ratio microneedles and tools that are more robust and less prone to breaking than microneedles made previously. This is directly related to increased yield and scalability for batches of microneedles.

[0006] In some aspects described herein, microneedle structures are formed from a substrate, such as a silicon wafer, using lithographic processes. In some aspects, the structures formed may include a pillar and a custom-shaped tip. A pillar may be formed from the substrate by etching surrounding material away from the pillar, such as through the use of reactive ion etching (RIE). Additionally, in some aspects a pillar may be tapered further, by performing chemical or oxidative thinning, to achieve a desired aspect ratio. Custom-shaped tips can be formed for the microneedle structures prior to and/or during the etching of the pillar structure, and may include as non-limiting examples, such shapes as cones, cone-shaped cavities, cavities having a substantially flat bottom, polygonal cavities, polygonal protrusions, pores, and/or pads. These custom-shaped tips are formed by applying custom patterns, such as annular cutout patterns and the like, to photoresist material during the lithographic processes and by designing the patterns and etching processes parameters, such as parameters enabling tapered etching, such that etching the substrate using a custom pattern-shaped material as a mask results in formation of detailed shapes such as cones, inverted cones, polygonal structures, and the like. Dimensions and characteristics of the custom-shaped tips can be controlled by design of dimensions and characteristics of the custom patterns. In some implementations, a metal material may be deposited on the customshaped tip, such as on a protruding substrate structure or within an etched cavity.

[0007] In a particular aspect, a method for fabricating microneedles or tools having high aspect ratios includes depositing a photoresist layer on a substrate. The method also includes applying a custom pattern to the photoresist layer. The method includes performing one or more lithography operations on the photoresist layer. The one or more lithography operations remove a portion of the photoresist layer beneath the custom pattern and form a custom-shaped feature from the substrate. The custom-shaped feature has a shape that corresponds to the custom pattern. The method further includes performing an etching process on the substrate. The custom-shaped feature acts as a mask during the etching process. The etching process forms a substrate pillar having a first end that includes the custom-shaped feature and a second end at an etched depth of the substrate. A dimension of the substrate pillar at the second end is larger than the dimension of the substrate pillar at the first end.

[0008] In another particular aspect, a non-transitory computer-readable storage device stores instructions that, when executed by one or more processors, cause the one or more processors to perform operations for fabricating microneedles or tools having high aspect ratios. The operations include initiating deposition of a photoresist layer on a substrate. The operations also include initiating application of a custom pattern to the photoresist layer. The operations include initiating performance of one or more lithography operations on the photoresist layer. The one or more lithography operations remove a portion of the photoresist layer beneath the custom pattern and form a custom-shaped feature from the substrate. The custom-shaped feature has a shape that corresponds to the custom pattern. The operations further include initiating performance of an etching process on the substrate. The custom-shaped feature acts as a mask during the etching process. The etching process forms a substrate pillar having a first end that includes the custom-shaped feature and a second end at an etched depth of the substrate. A dimension of the substrate pillar at the second end is larger than the dimension of the substrate pillar at the first end. [0009] The foregoing has outlined rather broadly the features and technical advantages of the present disclosure in order that the detailed description that follows may be better understood. Additional features and advantages will be described hereinafter which form the subject of the claims of the disclosure. It should be appreciated by those skilled in the art that the conception and specific aspects disclosed may be readily utilized as a basis for modifying or designing other structures for carrying out the same purposes of the present disclosure. It should also be realized by those skilled in the art that such equivalent constructions do not depart from the scope of the disclosure as set forth in the appended claims. The novel features which are disclosed herein, both as to organization and method of operation, together with further objects and advantages will be better understood from the following description when considered in connection with the accompanying figures. It is to be expressly understood, however, that each of the figures is provided for the purpose of illustration and description only and is not intended as a definition of the limits of the present disclosure.

BRIEF DESCRIPTION OF THE DRAWINGS

[0010] For a more complete understanding of the present disclosure, reference is now made to the following descriptions taken in conjunction with the accompanying drawings, in which:

[0011] FIGS. 1A-F illustrate stages of an example of a process for fabricating microneedles or tools having high aspect ratios according to one or more aspects;

[0012] FIGS. 2A-E illustrate stages of an example of a fabrication process for microneedles or tools having high aspect ratios according to one or more aspects;

[0013] FIGS. 3A-E illustrate stages of another example of a fabrication process for microneedles or tools having high aspect ratios according to one or more aspects;

[0014] FIGS. 4A-E illustrate stages of another example of a fabrication process for microneedles or tools having high aspect ratios according to one or more aspects;

[0015] FIGS. 5A-E illustrate stages of another example of a fabrication process for microneedles or tools having high aspect ratios according to one or more aspects; [0016] FIGS. 6A-E illustrate stages of another example of a fabrication process for microneedles or tools having high aspect ratios according to one or more aspects;

[0017] FIGS. 7A-F illustrate stages of another example of a fabrication process for microneedles or tools having high aspect ratios according to one or more aspects;

[0018] FIGS. 8A-D illustrate stages of another example of a fabrication process for microneedles or tools having high aspect ratios according to one or more aspects;

[0019] FIGS. 9A-E illustrate stages of another example of a fabrication process for microneedles or tools having high aspect ratios according to one or more aspects;

[0020] FIG. 10 is a flow diagram illustrating an example of a method for fabricating microneedles or tools having high aspect ratios according to one or more aspects;

[0021] FIG. 11 is a flow diagram illustrating an example of another method for fabricating microneedles or tools having high aspect ratios according to one or more aspects;

[0022] FIG. 12 is a block diagram of an example of a computing device that is operable to support fabrication of microneedles or tools having high aspect ratios according to one or more aspects;

[0023] FIG. 13 A depicts a plurality of microneedles of a microneedle array formed from a substrate according to one or more aspects;

[0024] FIG. 13B depicts a closer view of the microneedle array according to one or more aspects;

[0025] FIG. 13C depicts a view of a subset of the microneedles showing the tips in more detail according to one or more aspects; and

[0026] FIG. 13D depicts a particular microneedle 1302 and details of its dimensions according to one or more aspects.

[0027] It should be understood that the drawings are not necessarily to scale and that the disclosed aspects are sometimes illustrated diagrammatically and in partial views. In certain instances, details which are not necessary for an understanding of the disclosed methods and apparatuses or which render other details difficult to perceive may have been omitted. It should be understood, of course, that this disclosure is not limited to the particular aspects illustrated herein.

DETAILED DESCRIPTION

[0028] Referring to FIGS. 1A-F, stages of an example of a process for fabricating microneedles or tools having high aspect ratios according to one or more aspects of the present disclosure are shown. The process described with reference to FIGS. 1 A-F may be performed to fabricate one or more tools for use in medical procedures, such as one or more microneedles, nanoneedles, or other micro- or small tools. The disclosed microneedles or tools have high aspect ratios as compared to conventional microneedles or other tools. As used herein, an aspect ratio of a microneedle refers to a proportional relationship between a longitudinal dimension of the microneedle and a lateral dimension of the microneedle (or a portion thereof). As further described herein, the disclosed methods and processes for fabrication of such microneedles or tools with high aspect ratios are scalable and may be implemented in foundries or by other semiconductor manufacturers. Although described in the context of medical and biological applications, the needles or tools that are fabricated by aspects described herein are not so limited, and may be designed and used in other applications and contexts. As non-limiting examples, the manufacturing and/or fabrication processes disclosed herein may be used to fabricate tools with high aspect ratios for brain implants, stealth metasurfaces, or other applications and use cases.

[0029] FIG. 1 A illustrates a first stage 100 of the process. During the first stage 100, a hard mask layer is deposited on a substrate 102. For example, a hard mask material may be deposited on a first surface (e.g., a top surface in the orientation shown in FIG. 1 A) of the substrate 102 to form the hard mask layer 104. The substrate 102 (e.g., a wafer) may include undoped silicon (Si), doped Si (e.g., Si with an impurity of boron, phosphorus, arsenic, antimony, or the like), silicon dioxide (SiCh), silicon carbide (SiC), or any other substrate material suitable for the formation of microneedles or medical tools, and the hard mask layer 104 may include silicon oxide (SiO), SiC, silicon nitride (SiN), or any material suitable for providing an etch mask. Additionally or alternatively, the hard mask layer 104 may include a metal hard mask material or a metal oxide hard mask material, such as aluminum oxide (AI2O3), tantalum oxide (Ta2Os), or the like. The hard mask layer 104 (e.g., the hard mask material) may be deposited using any suitable deposition technique, such as a chemical vapor deposition (CVD) technique, an electro-chemical vapor deposition (ECVD) technique, a plasma-enhanced chemical vapor deposition (PECVD) technique, a sputtering technique, an evaporation technique, an atomic layer deposition (ALD) technique, a spin coating technique, a pulsed laser deposition (PLD) technique, a molecular-beam epitaxial technique, an electroplating technique, or the like. Although described as being deposited, the deposition may include or be replaced by an oxide growth process, such as a wet oxide growth process or a dry oxide growth process, that grows the hard mask material from the substrate 102 to form the hard mask layer 104. In some particular implementations, the substrate 102 is undoped silicon and includes a surface layer of SiCh (not shown). In some particular implementations, the substrate 102 is a P-type substrate having a thickness in a range between 100-200 millimeters (mm), and in some implementations approximately 150 mm. The hard mask material may be deposited to form the hard mask layer 104 having a desired thickness, such as within a range between 125-175 nanometers (nm), and in some implementations approximately 140 nm. In some implementations, the substrate 102 may be cleaned prior to formation of the hard mask layer 104. Although shown in FIG. 1A, the hard mask layer 104 is optional, and in some other implementations there is no hard mask layer 104 on the substrate 102, such that operations described with respect to the next stage of the process are performed directly on the substrate 102.

[0030] FIG. IB illustrates a second stage 110 of the process. During the second stage 110, a photoresist layer 112 is deposited on the hard mask layer 104. For example, a photoresist material may be deposited on a first surface (e.g., a top surface in the orientation shown in FIG. IB) of the hard mask layer 104 to form the photoresist layer 112. Stated another way, the photoresist material may be deposited on a first surface of the hard mask layer 104 that is opposite to a second surface of the hard mask layer 104 that is in direct contact with the first surface of the substrate 102. The photoresist material may be deposited on the substrate 102 using any suitable deposition technique, such as a CVD technique, an ECVD technique, a PECVD technique, a sputtering technique, an evaporation technique, an ALD technique, a spin coating technique, a PLD technique, a molecular-beam epitaxial technique, an electroplating technique, or the like. In implementations in which the hard mask layer 104 is not included, the photoresist material is deposited on the substrate 102 (e.g., on the first surface of the substrate 102) to form the photoresist layer 112. The photoresist layer 112 may include any type of single or multi-purpose resist material for lithography. In some particular implementations, the photoresist layer 112 includes a dual -ultraviolet (DUV) photoresist that is capable of forming patterns in the 130-180 nm critical dimension (CD) range. The photoresist material may be deposited to form the photoresist layer 112 having a desired thickness, such as within a range between 400-500 nm, and in some implementations approximately 430 nm. Although described as a single photoresist layer 112 is described and shown in FIG. IB, in some other implementations, the photoresist layer 112 may include multiple photoresist layers or materials. In some implementations, an optionally bottom antireflective coating (BARC) layer may be deposited on the hard mask layer 104 prior to deposition of the photoresist material on the BARC layer. In some such implementations, the BARC layer may have a thickness within a range from 50-100 nm, and in some implementations approximately 60 nm.

[0031] FIG. 1C illustrates a third stage 120 of the process. During the third stage 120, a custom pattern 122 may be applied to the photoresist layer 112. For example, a mask that has the shape of the custom pattern 122 may be placed on a surface of the photoresist layer 112 prior to exposure of the photoresist layer 112 to light (e.g., UV light). This exposure, and a subsequent development process, may cause the photoresist layer 112 to weaken in areas other than the custom pattern 122 (e.g., in a positive lithography process) or to weaken in the area of the custom pattern 122 (e.g., in a negative lithography process). In some implementations, a single exposure and development process is performed to apply the custom pattern 122. In some other implementations, multiple exposure and development processes are performed using multiple masks to apply the custom pattern 122, such as in a dual UV lithography process, which may enable the custom pattern 122 to have more complicated shapes than if a single exposure process is used. After the exposure and development process(es), the substrate 102 with the photoresist layer 112 may be baked to further weaken or remove the weakened portions of the photoresist layer. The custom pattern 122 may have one of a variety of shapes or patterns, as further described herein, such as an annular cutout pattern, an annual cutout pattern surrounding a central opening cutout, a circular cutout pattern, a polygonal cutout pattern, or a circular pattern, as non-limiting examples. The particular custom pattern 122 that is selected for application is based on a desired shape of a tip of the microneedle or other tool being fabricated by the process illustrated in FIGS. 1A-F.

[0032] FIG. ID illustrates a fourth stage 130 of the process. Prior to the fourth stage 130, a portion of the photoresist layer 112 that corresponds to the custom pattern 122 is removed, such as by performing one or more of the above-described lithographic operations. A first etching process may be performed, using the custom pattern 122 as a mask, to etch into the substrate 102. As a result, a removed portion 132 is removed from the stack (e.g., one or more of the substrate 102, the hard mask layer 104, and the photoresist layer 112) to form a custom-shaped feature 134 from the substrate 102. A shape of the custom-shaped feature 134 corresponds to the custom pattern 122. As a non-limiting example, if the custom pattern 122 is an annular cutout pattern, the custom-shaped feature 134 may have a cone shape. Additional examples are described herein, with reference to FIGS. 2A-E, 3 A-E, 4A-E, 5A-E, 6A-E, 7A-F, 8A-D, and 9A-E. The first etching process may include or correspond to a plasma etch, a wet etch, a chemical etch, a dry etch, or any other type of etching process that is capable of etching into a semiconductor substrate in the region of a custom pattern in a photoresist material. In implementations that include the hard mask layer 104, a hard mask etching process is performed prior to the first etching process (or as part of the first etching process) to remove a portion of the hard mask layer 104 that is exposed by removal of the portion of the photoresist layer 112 that corresponds to the custom pattern 122.

[0033] FIG. IE illustrates a fifth stage 140 of the process. During the fifth stage 140, a hard mask cover 142 may be deposited over and/or on the custom-shaped feature 134 on the substrate 102. The hard mask cover 142 may be deposited on the custom-shaped feature 134 using any suitable deposition technique, such as a CVD technique, an ECVD technique, a PECVD technique, a sputtering technique, an evaporation technique, an ALD technique, a spin coating technique, a PLD technique, a molecular-beam epitaxial technique, an electroplating technique, or the like. The hard mask cover 142 may include SiO, SiC, SiN, or any material suitable for providing an etch mask. In some implementations, the hard mask cover 142 includes the same material as the hard mask layer 104. Alternatively, the hard mask cover 142 may include a different material than the hard mask layer 104. Although shown in FIG. IE, the hard mask cover 142 is optional, and in some other implementations there is no hard mask cover 142 over the custom-shaped feature 134, such that operations described with respect to the next stage of the process are performed directly on the custom-shaped feature 134 and the substrate 102.

[0034] FIG. IF illustrates a sixth stage 150 of the process. During the sixth stage 150, an etching process (e.g., a second etching process, also referred to as a main silicon etch) is performed on the substrate 102. The custom-shaped feature 134 acts as a mask during the second etching process, such that the second etching process results in formation of a substrate pillar 152 extending from the substrate 102. A first end of the substrate pillar 152 (e.g., a top end in the orientation shown in FIG. IF) includes the custom-shaped feature 134 and a second end of the substrate pillar 152 (e.g., a bottom end in the orientation shown in FIG. IF) is located at an etched depth of the substrate 102. The etched depth may be within a range between 1 and 150 nm or more from a surface of the substrate 102 (e.g., the surface that, prior to etching, was in contact with the hard mask layer 104), and in some implementations the etched depth is 100 nm. A dimension d2 (e.g., a width) of the substrate pillar 152 at the second end may be larger than a corresponding dimension dl of the substrate pillar at the first end due to the etch being controlled such that etching is not perfectly vertical, and due to one or more optional thinning processes further described below. In some particular implementations, a tapered etch may be performed, by controlling one or more parameters of the etching process, to achieve particular target geometries, as further described herein. In some implementations, the custom-shaped feature 134 and the substrate pillar 152 form a microneedle structure. For example, the custom-shaped feature 134 may be the tip of a microneedle, and a remainder of the substrate pillar 152 may be the base of the microneedle. Alternatively, other tools or microtools may be formed depending on the shape of the customshaped feature 134 (e.g., a tip of the other tool or structure).

[0035] As shown in FIG. IF, the etching process may include etching through a remainder of the photoresist layer 112, the hard mask layer 104 (if the hard mask layer 104 is present), and a portion of the substrate 102. Alternatively, a remainder of the photoresist layer 112 may be cleaned prior to the etching process. In some implementations in which the hard mask cover 142 depicted in FIG. IE is included, a hard mask etching process may be performed during the fifth stage 140 and after the etching process (or the etching process may include a hard mask etching process) to remove the hard mask cover 142 from the custom-shaped feature 134.

[0036] In some implementations, the etching process may include a tapered etching process or one or more thinning processes may be performed after the etching process to further taper the substrate pillar 152. Tapering the substrate pillar 152 may cause the difference between d2 and dl to increase, such that more material is removed from the sides of the substrate pillar closer to the first end (e.g., the top end) than the second end (e.g., the bottom end). In some implementations, the thinning processes include one or more oxidative thinning processes. Alternatively, the thinning processes may include one or more chemical thinning processes. In some implementations that include a plasma etching process, the tapered etching process may include alternating of cycling at the plasma etch tool with the photoresist layer 112 in place, alternating of chamber cleanliness steps at the plasma etch tool in between etching process runs with the photoresist layer 112 in place, SiO growth resharpening in the oxidation tool after removal of the photoresist layer 112 with subsequent SiO removal, other thinning or tapered etching techniques, or a combination thereof.

[0037] In some implementations, the stages of the process depicted in FIGS. 1 A-F may be performed at multiple locations across the substrate 102 to form an array of microneedles or tools from the substrate 102. For example, a plurality of custom patterns 122 may be applied during at a plurality of locations on the photoresist layer 112, and performance of the abovedescribed lithography operations may remove a plurality of portions of the photoresist layer 112 beneath the plurality of customs patterns 122 to be used as masks during the first etching process, thereby forming a plurality of custom-shaped features 134 from the substrate 102. In this example, performing the second etching process forms a plurality of substrate pillars 152, each of which extend from the etched depth of the substrate 102 to a tip having a corresponding custom-shaped feature 134. In this manner, a microneedle array or array of other tools may be formed from the substrate 102. An illustrative microneedle array is further described herein with reference to FIGS. 13A-D. As non-limiting examples, the above-described process may manufacture or fabricate, in a 1 cm² die, a 1000 x 1000 microneedle array having 10 micrometer (pm) pitch, a 500 x 500 microneedle array having 20 pm pitch, a 200 x 200 microneedle array having 50 pm pitch, or a 100 x 100 microneedle array having 100 pm pitch. In some implementations, each substrate pillar 152 of an array have the same custom-shaped feature 134 as tips. For example, the same custom pattern 122 may be applied at each microneedle location on the photoresist layer 112. Alternatively, the custom-shaped feature 134 may vary for at least some substrate pillars 152 of the microneedle array. For example, a first custom pattern may be applied at locations within a first region of the photoresist layer 112 and a second custom pattern may be applied at locations within a second region of the photoresist layer 112, resulting in formation of the substrate pillars 152 having differently-shaped tips.

[0038] As described above, the process illustrated in FIGS. 1A-F supports fabrication of microneedles or tools having high aspect ratios. For example, by applying the custom pattern 122 to the photoresist layer 112 and performing the lithography and etch operations, the customershaped feature 134 having one of a variety of shapes may be formed from the substrate 102 to act as the tip of a microneedle or other tool. Such custom-shaped tips can result, in combination with the thinning or tapered etching processes, in substrate pillars 152 that have an increasing dimension from a respective top end (as shown in FIGS. 1 A-F) to a bottom end (as shown in FIGS. 1 A-F). As such, an aspect ratio of the fabricated microneedle, which is calculated based on d2/d 1 , is higher than conventional silicon microneedles. Such high aspect ratios confer benefits to the microneedles, such as improving a flexibility of the microneedle when pressure is applied to the tip, such that the microneedle has an increased chance of bending and not breaking. Reducing the likelihood of breaks may improve the scalability of the disclosed fabrication processes and increase a manufacturing yield that results from the fabrication processes, result in reusable microneedles, or both.

[0039] To further illustrate, the systems, methods, and processes described with reference to FIGS. 1A-F, and described further herein, are designed from the beginning to be a scalable manufacturing or fabrication process. To improve scalability, the processes described herein are designed for automation and are designed to provide consistency and control of manufacturing processes that yield statistically consistent outputs. Homogenous needle populations yield homogenous cell phenotype populations of clinical grade quality, which are important market access technology enablers. Other silicon microneedle processes are not designed to be automated and scaled to large output volumes, and as such are not concerned with identifying or addressing many of the problems solved by the above-described processes. Because the microneedles (or other tools) described with reference to FIGS. 1 A-F have high aspect ratios, the microneedles are reusable, i.e., the microneedles are robust and do not break, and accordingly they do not produce dangerous debris in the cellular product when used in biomedical applications. Thus, the above-described fabrication process results in microneedles that benefit from reusability in the overall cost/batch or cells (COGS), which impacts the commercial scalability and overall market access due to patient costs. As such, reusability of the microneedles of the process depicted in FIGS. 1 A-F is an indicator of improved scalability of the disclosed fabrication process for the microneedles.

[0040] Additionally, microneedles (or other tools) having the high aspect ratios achieved from the process depicted in FIGS. 1 A-F provide benefits to the medical services that in which the microneedles are used. As an example, high aspect ratio metasurfaces, such the abovedescribed microneedles, generally create unique boundary layer flow conditions when in the presence of fluids and fluid systems due to the nature of solid features projected. Additionally, the high aspect ratios of the microneedles enable enhanced interface control at a tissue site, as the interface control may be mesoscale nanoscopic morphology-dependent. As example of such an interface that exhibits enhanced control using microneedles formed by the above-described process includes oleophobic metasurfaces. As another example, the higher aspect ratios of the disclosed microneedles may enable enhanced mass flow kinetics, which may have a positive impact on payload sorption/desorption applications as well as on total system ‘runtime’ (known as ‘the runtime problem’), and hence a positive impact on throughput (e.g., satisfying clinical scale throughput requirements). As still another example, the microneedles described herein having the high aspect ratios may enable boundary layer fluid backpressure dynamic control (e.g., maintaining the boundary fluid backpressure below a critical pressure and flow condition or threshold) between two parallel metasurfaces (e.g., simulated as a finite element that is then scaled over a chip dimension). In addition to conveying reusability, taller microneedles or nanoneedles having high aspect ratios provide the flexibility of the transfection of differing cell types and sizes without necessitating customization of the needle morphology, and therefore the microneedles are applicable to a wider range of applications than conventional silicon microneedles. Additionally or alternatively, because the process of FIGS. 1 A-F may be controlled such that the ratio of the top of the microneedle (e.g., dl) to the base of the microneedle (e.g., d2) can be adjusted as desired, the manufactured microneedles will have stability and be capable of a wider operational range in force, operation temperature, pressure, and time. Additionally or alternatively, the ability to evaluate the process stress, temperature, and time of the thinning processes enables the adjustment of process variability in such a manner to arrive at desired microneedle dimensions while decreasing or eliminating manufacturing losses.

[0041] Referring to FIGS. 2A-E, stages of an example of a fabrication process for microneedles or tools having high aspect ratios according to one or more aspects of the present disclosure are shown. In the example shown in FIGS. 2A-E, the process is performed to fabricate a microneedle (or other tool) having a cone-shaped. In some implementations, one or more of the stages described with reference to FIGS. 2A-E may include or correspond to, may come before, may come between, or may come after, one or more of stages 100, 110, 120, 130, 140, and 150 described above with reference to FIGS. 1 A-F.

[0042] FIG. 2A illustrates a first stage 200 of the process. Prior to the first stage 200, a photoresist layer 206 is deposited on a substrate 202, or on an optional hard mask layer (not shown) that is deposited on the substrate 202. The photoresist layer 206 may include or correspond to the photoresist layer 112 of FIG. IB and may be deposited using any of the deposition techniques described above with reference to the photoresist layer 112 of FIG. IB. The optional hard mask may include or correspond to the hard mask layer 104 of FIG. 1 A and may be deposited using any of the deposition techniques described above with reference to the hard mask layer 104 of FIG. 1 A. During the first stage 200, a custom pattern is applied to the photoresist layer 206 and one or more lithography operations are performed such that a custom pattern portion 204 of the photoresist layer 206 is removed, and remaining portions 206A and 206B of the photoresist layer 206 remain on the substrate 202. For example, the lithography operations may remove the custom pattern portion 204 (e.g., a portion having a shape defined by the custom pattern) and expose a surface of the substrate 202 (or a surface of a hard mask layer if a hard mask layer is included between the substrate 202 and the photoresist layer 206). In some implementations, the lithography operations include a dual ultraviolet (DUV) lithography process. In some implementations, the custom pattern (e.g., corresponding to the custom pattern portion 204) is an annular cutout pattern, and the remainder of the photoresist layer 206 includes an exterior portion 206A and an interior portion 206B (e.g., a central portion). In some such implementations, the annular pattern is carefully designed such that a subsequent plasma etch or wet chemical etch produces a controlled cut of the substrate 202 (and optionally a hard mask layer) that results in a sloping cone shape that will act as needle tip, as further described below. In some such implementations, dimensions of the annular cutout pattern may control dimensions of the cone shape within 100 nm.

[0043] FIG. 2B illustrates a second stage 210 of the process. During the second stage 210, a first etch process is performed to cut a cone-shaped feature 212 that extends from an etched surface 214 of the substrate 202. To illustrate, the first etch process may cut away a portion of the substrate 202 to create an opening 216 that extends from the photoresist layer 206 to the etched surface 214, which has the cone-shaped feature 212 (e.g., a cone) extending upwards (in the orientation shown in FIG. 2B) from etched surface 214. The first etch may be performed using an etching process capable of etching features with nanometer margins. In a preferred implementation, the first etching process is a plasma etching process, such as a deep reactive ion etching (DRIE) process. In other implementations, the first etching process is a wet etching process (e.g., a wet chemical etching process), a dry etching process, or another type of etching process. One or more dimensions of the cone-shaped feature 212 are based on one or more dimensions of the annular cutout pattern that corresponds to the custom pattern portion 204. For example, a height of the cone-shaped feature 212 and a taper associated with the cone-shaped feature 212 may be based on one or more dimensions of an interior of the annular cutout pattern (e.g., the interior portion 206B). To illustrate, the diameter of the interior portion 206B may be selected to control the maximum depth and taper of the cone-shaped feature 212. As another example, a diameter of a base of the cone-shaped feature 212 may be based on a diameter of the annular cutout pattern. In some implementations, the height of the cone-shaped feature 212 is within a range between .1 and 100 pm based on a diameter of the interior portion 206B. Additionally or alternatively, a diameter of a tip of the cone-shaped feature 212 may be less than 1 pm, and in some particular implementations, is less than 250 nm, based on a difference between a diameter of the custom pattern portion 204 and the diameter of the interior portion 206B. Additionally or alternatively, the diameter of the base of the cone-shaped feature 212 may be in a range between 1 and 100 pm, and in some particular implementations 20 pm, based on the diameter of the custom pattern portion 204. Additionally or alternatively, the taper of the cone- shaped feature 212 may be based on a draft angle associated with the first etch process. For example, a draft angle associated with the first etch process may be selected or controlled in order to control a taper of the etch to side walls of an area that eventually forms the cone-shaped feature 212, such that a tapered etch is performed using the annular cutout pattern as a mask.

[0044] FIG. 2C illustrates a third stage 220 of the process. During the third stage 220, a hard mask cover 222 may be deposited over and/or on the cone-shaped feature 212 on the etched surface 214. The hard mask cover 222 may include or correspond to the hard mask cover 142 of FIG. IE and may be deposited using any of the deposition techniques described above with reference to the hard mask cover 142 of FIG. IE. The hard mask cover 222 may include SiO, SiC, SiN, or any material suitable for providing an etch mask or a hard mask. In some implementations, the hard mask cover 222 includes the same material as the optional hard mask layer between the substrate 202 and the photoresist layer 206 if the optional hard mask layer is included. Alternatively, the hard mask cover 222 may include a different material than the optional hard mask layer if the optional hard mask layer is included. In some implementations, the hard mask cover 222 may deposited as a larger hard mask layer that is then patterned into the hard mask cover 222 by a lithographic process and an etching process. For example, hard mask cover material may be deposited using PECVD, followed by performance of a lithographic process and an etch process to pattern a circle around the cone-shaped feature 212 and then cut away an exterior portion of the hard mask cover material from the circle, leaving the hard mask cover 222. Although shown in FIG. 2C, the third stage 220 and the hard mask cover 222 are optional, and in some other implementations there is no hard mask cover 222 over the cone-shaped feature 212.

[0045] FIG. 2D illustrates a fourth stage 230 of the process. During the fourth stage 230, a second etching process (also referred to as a main silicon etch) may be performed to create a substrate pillar 232 having the cone-shaped feature 212 as a tip at a first end. In some implementations, the second etching process is a Bosch etching process that is performed to cut away the substrate 102 surrounding the exposed etched surface 214. In some other implementations, the second etching process may be a plasma etching process, a wet etching process, a dry etching process, or another type of etching process. The exterior portion 206A of the photoresist layer 206 may be cleaned prior to the second etching process. In implementations in which the optional hard mask layer is included, the second etching process may include (or be subsequent to) a hard mask etching process to cut away the remaining portion of the optional hard mask layer. In some implementations, second etching process is designed to etch (e.g., cut) to an etched depth in the substrate 202 in a range between 5 and 500 pm, and in some particular implementations, between a range of 1 to 150 pm. Additionally or alternatively, the second etching process may be a tapered etching process as described above. In implementations in which the hard mask cover 222 is included, an additional hard mask etch may be performed to remove the hard mask cover 222.

[0046] FIG. 2E illustrates a fifth stage 240 of the process. During the fifth stage 240, one or more thinning processes may be performed to further taper the substrate pillar 232. For example, one or more oxidative thinning processes (e.g., a single-stage or multi-stage oxidative thinning process) may be performed to further decrease a dimension, such as a diameter, toward the tip of the substrate pillar 232 (e.g., an end that includes the cone-shaped feature 212) as compared to the opposite end of the substrate pillar 232 (e.g., a bottom end in FIG. 2E that extends from the substrate 202). Due to the tapered etching process and/or the oxidative thinning process, a microneedle 242 that is formed from the cone-shaped feature 212 and the substrate pillar 232 may be tapered such that, in the orientation shown in FIG. 2E, the diameter of the microneedle 242 stays the same or increases as the microneedle 242 is traversed along a longitudinal axis from the tip to the etched depth of the substrate 202. Such a tapering results in the microneedle 242 being more flexible and less likely to break when used in a biomedical application. Additionally, the cone-shaped feature 212 may be designed, through control of dimensions of the annular cutout pattern, to have a particular sharpness and aspect ratio for a variety of biomedical applications, thereby increasing the utility of the microneedle 242. In some particular implementations, the microneedle 242 may be designed such that the cone-shaped tip 212 has a starting diameter (e.g., prior to the second etching process) of approximately 3 pm and that a height of the microneedle 242 (e.g., after the second etching process) is in a range between .1 and 100 pm. In some such implementations, the cone-shaped tip 212 may be sharpened to have a diameter (dl) that is less than 1 pm, and a diameter (d2) at the base of the microneedle 242 may be in a range between 1 and 100 pm. In implementations in which the microneedle 242 is part of a microneedle array, the microneedle array may be formed on a 1 cm² die with a pitch (e.g., between microneedles) that is in a range between 10 and 20 pm.

[0047] As described above with reference to FIGS. 2A-E, a fabrication process may be designed to fabricate microneedles (or nanoneedles) having a cone-shaped tip. This process flow includes etching out an annular cut out as shown in FIGS. 2 A and 2B. The cut out opening of the annular cut out pattern may be carefully designed such that under a process condition specification for plasma etching processes, or even for wet etching processes, the first etching process results in a controlled undercut of the substrate 202 (or the optional hard mask layer) that leaves behind the cone-shaped feature 212 from the substrate 202 in the center of the opening 216. Stated another way, a plasma undercut condition may be matched to the opening 216 and the first etching process may be confined to create the slope and taper of the cone-shaped feature 212. The second etching process (e.g., the main silicon etching process) may form the substrate pillar 232 that has a diameter that is slightly larger than the diameter of the base of the cone-shaped feature 212. Having the cone-shaped feature 212 may improve, on the cellular level, transfection efficiency and the mechanism of cargo absorption into a cell from the cone-shaped feature 212 as compared to a microneedle with a flat square tip. Additionally or alternatively, by tapering the substrate pillar 232, stability of the microneedle 242 is increased. For example, the differential cone taper may impart additional lateral stability due to, when a force is applied to the top of the microneedle 242, each piece of the microneedle 242 (in the orientation shown in FIG. 2E) has a thicker piece below the current piece as a longitudinal axis is traversed toward the etched depth. As such, the microneedle 242 does not have a local stress point. Therefore, the microneedle 242 may bend, possibly into a curl bend, but is unlikely to or does not break, making the microneedle 242 structurally robust compared to conventional microneedles that are more brittle and are likely to break when force is applied to the tip.

[0048] Referring to FIGS. 3A-E, stages of an example of a fabrication process for microneedles or tools having high aspect ratios according to one or more aspects of the present disclosure are shown. In the example shown in FIGS. 3A-E, the process is performed to fabricate a microneedle (or other tool) having an inverted cone-shaped tip. In some implementations, one or more of the stages described with reference to FIGS. 3A-E may include or correspond to, may come before, may come between, or may come after, one or more of stages 100, 110, 120, 130, 140, and 150 described above with reference to FIGS. 1A-F.

[0049] FIG. 3 A illustrates a first stage 300 of the process. Prior to the first stage 300, a photoresist layer 306 is deposited on a substrate 302, or on an optional hard mask layer (not shown) that is deposited on the substrate 302. The photoresist layer 306 may include or correspond to the photoresist layer 112 of FIG. IB and may be deposited using any of the deposition techniques described above with reference to the photoresist layer 112 of FIG. IB. The optional hard mask may include or correspond to the hard mask layer 104 of FIG. 1 A and may be deposited using any of the deposition techniques described above with reference to the hard mask layer 104 of FIG. 1 A. During the first stage 300, a custom pattern is applied to the photoresist layer 306 and one or more lithography operations are performed such that custom pattern portions 304 A and 304B of the photoresist layer 306 are removed, and remaining portions 306A and 306B of the photoresist layer 306 remain on the substrate 302. For example, the lithography operations may remove the custom pattern portions 304 A and 304B (e.g., portions having a shape defined by the custom pattern) and expose a surface of the substrate 302 (or a surface of a hard mask layer if a hard mask layer is included between the substrate 302 and the photoresist layer 306). In some implementations, the lithography operations include a DUV lithography process. In some implementations, the custom pattern (e.g., corresponding to the custom pattern portions 304A and 304B) is an annular cutout pattern (e.g., that corresponds to the custom pattern portion 304A) that surrounds a central opening cutout (e.g., that corresponds to the custom pattern portion 306B), and the remainder of the photoresist layer 306 includes an exterior portion 306A and an interior portion 306B (e.g., an annular portion). In some such implementations, the annular cutout pattern and the central opening cutout are carefully designed such that a subsequent plasma etch or wet chemical etch produces a controlled cut of the substrate 302 (and optionally a hard mask layer) that results in a cone-shaped cavity or divot that will be formed within a needle tip, as further described below. In some such implementations, dimensions of the annular cutout pattern and the central opening cutout may control dimensions of the cavity within 100 nm.

[0050] FIG. 3B illustrates a second stage 310 of the process. During the second stage 310, a first etch process is performed to cut an inverted cone-shaped cavity 312 into an etched surface 316 of the substrate 302. To illustrate, the first etch process may cut away a portion of the substrate 302 to create an opening 314 that extends from the photoresist layer 306 to the etched surface 316, which has the inverted cone-shaped cavity 312 extending downwards (in the orientation shown in FIG. 3B) from etched surface 316. The first etch may be performed using an etching process capable of etching features with nanometer margins. In a preferred implementation, the first etching process is a plasma etching process, such as a DRIE process. In other implementations, the first etching process is a wet etching process (e.g., a wet chemical etching process), a dry etching process, or another type of etching process. One or more dimensions of the inverted cone-shaped cavity 312 are based on one or more dimensions of the annular cutout pattern that corresponds to the custom pattern portion 304 A and the central opening cutout that corresponds to the custom pattern portion 304B. For example, a depth of the inverted cone-shaped cavity 312 and a taper associated with inverted cone-shaped cavity 312 may be based on one or more dimensions of central opening cutout (e.g., the custom pattern portion 304B). To illustrate, the diameter of the custom pattern portion 304B may be selected to control the maximum depth and taper of the inverted cone-shaped cavity 312. In some implementations, the depth of the inverted cone-shaped cavity 312 is within a range between 20 and 40 pm, or a range between .1 and 100 pm, based on a diameter of the custom pattern portion 304B.

[0051] FIG. 3C illustrates a third stage 320 of the process. During the third stage 320, a hard mask cover 322 may be deposited over and/or on the inverted cone-shaped cavity 312 on the etched surface 316. The hard mask cover 322 may include or correspond to the hard mask cover 142 of FIG. IE and may be deposited using any of the deposition techniques described above with reference to the hard mask cover 142 of FIG. IE. The hard mask cover 322 may include SiO, SiC, SiN, or any material suitable for providing an etch mask or a hard mask. In some implementations, the hard mask cover 322 includes the same material as the optional hard mask layer between the substrate 302 and the photoresist layer 306 if the optional hard mask layer is included. Alternatively, the hard mask cover 322 may include a different material than the optional hard mask layer if the optional hard mask layer is included. In some implementations, the hard mask cover 322 may deposited as a larger hard mask layer that is then patterned into the hard mask cover 322 by a lithographic process and an etching process. For example, hard mask cover material may be deposited using PECVD, followed by performance of a lithographic process and an etch process to pattern a circle around the inverted cone-shaped cavity 312 and then cut away an exterior portion of the hard mask cover material from the circle, leaving the hard mask cover 322. Although shown in FIG. 3C, the third stage 320 and the hard mask cover 322 are optional, and in some other implementations there is no hard mask cover 322 over the inverted cone-shaped cavity 312.

[0052] FIG. 3D illustrates a fourth stage 330 of the process. During the fourth stage 330, a second etching process (also referred to as a main silicon etch) may be performed to create a substrate pillar 332 having the inverted cone-shaped cavity 312 within a tip at a first end. In some implementations, the second etching process is a Bosch etching process that is performed to cut away the substrate 302 surrounding the exposed etched surface 316. In some other implementations, the second etching process may be a plasma etching process, a wet etching process, a dry etching process, or another type of etching process. The exterior portion 306 A of the photoresist layer 306 may be cleaned prior to the second etching process. In implementations in which the optional hard mask layer is included, the second etching process may include (or be subsequent to) a hard mask etching process to cut away the remaining portion of the optional hard mask layer. In some implementations, the second etching process is designed to etch (e.g., cut) to an etched depth in the substrate 302 in a range between 5 and 500 pm, and in some particular implementations, between a range of 1 to 150 pm. Additionally or alternatively, the second etching process may be a tapered etching process as described above. In implementations in which the hard mask cover 322 is included, an additional hard mask etch may be performed to remove the hard mask cover 322.

[0053] FIG. 3E illustrates a fifth stage 340 of the process. During the fifth stage 340, one or more thinning processes may be performed to further taper the substrate pillar 332. For example, one or more oxidative thinning processes (e.g., a single-stage or multi-stage oxidative thinning process) may be performed to further decrease a dimension, such as a diameter, toward the tip of the substrate pillar 332 (e.g., an end that includes the inverted cone-shaped cavity 312) as compared to the opposite end of the substrate pillar 332 (e.g., a bottom end in FIG. 3E that extends from the substrate 302). Due to the tapered etching process and/or the oxidative thinning process, a microneedle 342 that is formed from the substrate pillar 332 (and that includes the inverted cone-shaped cavity 312) may be tapered such that, in the orientation shown in FIG. 3E, the diameter of the microneedle 342 stays the same or increases as the microneedle 342 is traversed along a longitudinal axis from the tip to the etched depth of the substrate 302. Such a tapering results in the microneedle 342 being more flexible and less likely to break when used in a biomedical application. Additionally, the inverted cone-shaped cavity 312 may be designed, through control of dimensions of the annular cutout pattern and the central opening cutout, to have a gradation of the inverted cone-shaped cavity 312 and an aspect ratio of the microneedle 342 for a variety of biomedical applications, thereby increasing the utility of the microneedle 342. In implementations in which the microneedle 342 is part of a microneedle array, the microneedle array may be formed on a 1 cm² die with a pitch (e.g., between microneedles) that is in a range between 10 and 20 pm.

[0054] In some particular implementations, a microneedle having an inverted cone- shaped cavity in the tip, such as the tip illustrated in FIGS. 3A-E, may be used in biomedical applications involving impacting cells with a microneedle. In such implementations, if a cell’s surface can be kinetically impacted quickly enough with a tip having an inverted cone-shaped cavity, a local shear cavitation can be formed in the cell. The local shear cavitation can be used to leave behind a pellet or some other payload inside the cell. For example, genetic material useful for gene engineering or other genetic cell treatments may be used as a payload. In other examples, a micro-dose of medication may be deposited into a cell using similar techniques and the microneedle 342. Alternatively, or additionally, a payload delivered to the cell in this manner may be intended to cause kinetic damage to the target cell. By way of analogy, this kind of impacting a cell is similar to the functioning of a captive bolt gun, in that a pellet may be left inside the cell to damage its interior structures much as the bolt of a captive bolt gun may be used to penetrate the skull of an animal and damage the animal’s brain tissue.

[0055] Referring to FIGS. 4A-E, stages of an example of a fabrication process for microneedles or tools having high aspect ratios according to one or more aspects of the present disclosure are shown. In the example shown in FIGS. 4A-E, the process is performed to fabricate a microneedle (or other tool) having a hollow opening at the tip. In some implementations, one or more of the stages described with reference to FIGS. 4A-E may include or correspond to, may come before, may come between, or may come after, one or more of stages 100, 110, 120, 130, 140, and 150 described above with reference to FIGS. 1A-F.

[0056] FIG. 4A illustrates a first stage 400 of the process. Prior to the first stage 400, a photoresist layer 406 is deposited on a substrate 402, or on an optional hard mask layer (not shown) that is deposited on the substrate 402. The photoresist layer 406 may include or correspond to the photoresist layer 112 of FIG. IB and may be deposited using any of the deposition techniques described above with reference to the photoresist layer 112 of FIG. IB. The optional hard mask may include or correspond to the hard mask layer 104 of FIG. 1 A and may be deposited using any of the deposition techniques described above with reference to the hard mask layer 104 of FIG. 1 A. During the first stage 400, a custom pattern is applied to the photoresist layer 406 and one or more lithography operations are performed such that a custom pattern portion 404 of the photoresist layer 406 is removed, and a remaining portion of the photoresist layer 406 remains on the substrate 402. For example, the lithography operations may remove the custom pattern portion 404 (e.g., a portion having a shape defined by the custom pattern) and expose a surface of the substrate 402 (or a surface of a hard mask layer if a hard mask layer is included between the substrate 402 and the photoresist layer 406). In some implementations, the lithography operations include a DUV lithography process. In some implementations, the custom pattern (e.g., corresponding to the custom pattern portion 404) is a circular cutout pattern in the photoresist layer 406. In some such implementations, the circular cutout pattern is carefully designed such that a subsequent plasma etch or wet chemical etch produces a controlled cut of the substrate 402 (and optionally a hard mask layer) that results in a cavity within a portion of the substrate. In some such implementations, the cavity may have a substantially flat base. The cavity will be within the tip of a needle, as further described below. In some such implementations, dimensions of the circular cutout pattern may control dimensions of the cavity within 100 nm.

[0057] FIG. 4B illustrates a second stage 410 of the process. During the second stage 410, a first etch process is performed to cut a cavity 412 that extends into the substrate 402. To illustrate, the first etch process may cut away a portion of the substrate 402 to create an opening 414 (e.g., a pinhole) that extends from the photoresist layer 406 to the base of the cavity 412 (e.g., a cavity having a substantially flat base), which extends downwards (in the orientation shown in FIG. 4B) from opening 414. The first etch may be performed using an etching process capable of etching features with nanometer margins. In a preferred implementation, the first etching process is a plasma etching process, such as a DRIE process. In other implementations, the first etching process is a wet etching process (e.g., a wet chemical etching process), a dry etching process, or another type of etching process. One or more dimensions of the cavity 412 are based on one or more dimensions of the circular cutout pattern that corresponds to the custom pattern portion 404. For example, a depth of the cavity 412 may be based on the diameter of the custom pattern portion 404. To illustrate, the diameter of the circular cutout pattern (corresponding to the custom pattern portion 404) may be selected to control the maximum depth of the cavity 412. Additionally or alternatively, the base of the cavity 412 may be made substantially flat by modifying the etching process to create effectively lateral etching at the base of the cavity 412. In some such instances, this lateral etching can cause portions of the sides of the cavity 412 to blow out or extend beyond the dimensions of the microneedle, which can result in a cavity structure having a hollow opening (e.g. corresponding to opening 414) at the top and holes in the bottom that blow out, forming a particular architecture like a nano proboscis.

[0058] FIG. 4C illustrates a third stage 420 of the process. During the third stage 420, a hard mask cover 422 may be deposited over and/or on the opening 414 to the cavity 412. The hard mask cover 422 may include or correspond to the hard mask cover 142 of FIG. IE and may be deposited using any of the deposition techniques described above with reference to the hard mask cover 142 of FIG. IE. The hard mask cover 422 may include SiO, SiC, SiN, or any material suitable for providing an etch mask or a hard mask. In some implementations, the hard mask cover 422 includes the same material as the optional hard mask layer between the substrate 402 and the photoresist layer 406 if the optional hard mask layer is included. Alternatively, the hard mask cover 422 may include a different material than the optional hard mask layer if the optional hard mask layer is included. In some implementations, the hard mask cover 422 may deposited as a larger hard mask layer that is then patterned into the hard mask cover 422 by a lithographic process and an etching process. For example, hard mask cover material may be deposited using PECVD, followed by performance of a lithographic process and an etch process to pattern a circle around the cavity 412 and then cut away an exterior portion of the hard mask cover material from the circle, leaving the hard mask cover 422. Although shown in FIG. 4C, the third stage 420 and the hard mask cover 422 are optional, and in some other implementations there is no hard mask cover 422 over the cavity 412. [0059] FIG. 4D illustrates a fourth stage 430 of the process. During the fourth stage 430, a second etching process (also referred to as a main silicon etch) may be performed to create a substrate pillar 432 having the cavity 412 within a tip at a first end. In some implementations, the second etching process is a Bosch etching process that is performed to cut away the substrate 402 surrounding the cavity 412. In some other implementations, the second etching process may be a plasma etching process, a wet etching process, a dry etching process, or another type of etching process. In implementations in which the optional hard mask layer is included, the second etching process may include (or be subsequent to) a hard mask etching process to cut away the remaining portion of the optional hard mask layer. In some implementations, second etching process is designed to etch (e.g., cut) to an etched depth in the substrate 402 in a range between 5 and 500 pm, and in some particular implementations, between a range of 1 to 150 pm. Additionally or alternatively, the second etching process may be a tapered etching process as described above. In implementations in which the hard mask cover 422 is included, an additional hard mask etch may be performed to remove the hard mask cover 422.

[0060] FIG. 4E illustrates a fifth stage 440 of the process. During the fifth stage 440, one or more thinning processes may be performed to further taper the substrate pillar 432. For example, one or more oxidative thinning processes (e.g., a single-stage or multi-stage oxidative thinning process) may be performed to further decrease a dimension, such as a diameter, toward the tip of the substrate pillar 432 (e.g., an end that includes the cavity 412) as compared to the opposite end of the substrate pillar 432 (e.g., a bottom end in FIG. 4E that extends from the substrate 402). Due to the tapered etching process and/or the oxidative thinning process, a microneedle 442 that is formed from the substrate pillar 432 (and that includes the cavity 412) may be tapered such that, in the orientation shown in FIG. 4E, the diameter of the microneedle 442 stays the same or increases as the microneedle 442 is traversed along a longitudinal axis from the tip to the etched depth of the substrate 402. Such a tapering results in the microneedle 442 being more flexible and less likely to break when used in a biomedical application. In a preferred implementation, the calculated material loss during the oxidative thinning should be accounted for in the critical dimension(s) (CDs) of the circular cutout pattern lithography to account for material loss to the thickness of the side wall of the cavity 412. This may be determined using an adjusted deal growth model for the mean free path in the depth of the cavity 412. Additionally, the cavity 412 may be designed, through control of dimensions of the circular cutout pattern, to have a particular diameter and depth, and the microneedle 442 to have a particular aspect ratio, for a variety of biomedical applications, thereby increasing the utility of the microneedle 442. In implementations in which the microneedle 442 is part of a microneedle array, the microneedle array may be formed on a 1 cm² die with a pitch (e.g., between microneedles) that is in a range between 10 and 20 pm.

[0061] Referring to FIGS. 5A-E, stages of an example of a fabrication process for microneedles or tools having high aspect ratios according to one or more aspects of the present disclosure are shown. In the example shown in FIGS. 5A-E, the process is performed to fabricate a microneedle (or other tool) having polygonal-shaped opening. In some implementations, one or more of the stages described with reference to FIGS. 5A-E may include or correspond to, may come before, may come between, or may come after, one or more of stages 100, 110, 120, 130, 140, and 150 described above with reference to FIGS. 1A-F.

[0062] FIG. 5 A illustrates a first stage 500 of the process. Prior to the first stage 500, a photoresist layer 506 is deposited on a substrate 502, or on an optional hard mask layer (not shown) that is deposited on the substrate 502. The photoresist layer 506 may include or correspond to the photoresist layer 112 of FIG. IB and may be deposited using any of the deposition techniques described above with reference to the photoresist layer 112 of FIG. IB. The optional hard mask may include or correspond to the hard mask layer 104 of FIG. 1 A and may be deposited using any of the deposition techniques described above with reference to the hard mask layer 104 of FIG. 1 A. During the first stage 500, a custom pattern is applied to the photoresist layer 506 and one or more lithography operations are performed such that a custom pattern portion 504 of the photoresist layer 506 is removed, and a remaining portion of the photoresist layer 506 remains on the substrate 502. For example, the lithography operations may remove the custom pattern portion 504 (e.g., a portion having a shape defined by the custom pattern) and expose a surface of the substrate 502 (or a surface of a hard mask layer if a hard mask layer is included between the substrate 502 and the photoresist layer 506). In some implementations, the lithography operations include a DUV lithography process. In some implementations, the custom pattern (e.g., corresponding to the custom pattern portion 504) is a polygonal cutout pattern, and the remainder of the photoresist layer 506 includes an exterior portion with respect to the polygonal cutout pattern. For example, the polygonal cutout pattern may be a keyhole-shaped cutout pattern, as shown in FIG. 5 A. As other examples, the polygonal cutout pattern may be a square-shaped cutout pattern, a rectangular-shaped cutout pattern, a triangular-shaped cutout pattern, a rhombus-shaped cutout pattern, a parallelogram-shaped cutout pattern, an oval-shaped cutout pattern, or another shape of cutout pattern. In some such implementations, the polygonal cutout pattern is carefully designed such that a subsequent plasma etch or wet chemical etch produces a controlled cut of the substrate 502 (and optionally a hard mask layer) that results in a polygonal cavity within a needle tip, as further described below. In some such implementations, dimensions of the polygonal cutout pattern may control dimensions of the polygonal cavity within 100 nm.

[0063] FIG. 5B illustrates a second stage 510 of the process. During the second stage 510, a first etch process is performed to cut a polygonal cavity 512 within the substrate 502. To illustrate, the first etch process may cut away a portion of the substrate 502 beneath the polygonshaped pattern to create an opening 514 that extends from the photoresist layer 506 to a bottom (in the orientation illustrated in FIG. 5B) of the polygonal cavity 512. The first etch may be performed using an etching process capable of etching features with nanometer margins. In a preferred implementation, the first etching process is a plasma etching process, such as a DRIE process. In other implementations, the first etching process is a wet etching process (e.g., a wet chemical etching process), a dry etching process, or another type of etching process. One or more dimensions of the polygonal cavity 512 are based on one or more dimensions of the polygonshaped cutout pattern that corresponds to the custom pattern portion 504. For example, dimension(s) and shape of the polygonal cavity 512 may be the same as dimension(s) and shape of the polygon-shaped pattern. In the example shown in FIG. 5B, the polygonal cavity 512 is a keyhole-shaped cavity, although other shaped cavities or depressions are possible using the other shapes of the custom pattern described above.

[0064] FIG. 5C illustrates a third stage 520 of the process. During the third stage 520, a hard mask cover 522 may be deposited over and/or on the polygonal cavity 512 on the substrate 502. The hard mask cover 522 may include or correspond to the hard mask cover 142 of FIG. IE and may be deposited using any of the deposition techniques described above with reference to the hard mask cover 142 of FIG. IE. The hard mask cover 522 may include SiO, SiC, SiN, or any material suitable for providing an etch mask or a hard mask. In some implementations, the hard mask cover 522 includes the same material as the optional hard mask layer between the substrate 502 and the photoresist layer 506 if the optional hard mask layer is included. Alternatively, the hard mask cover 522 may include a different material than the optional hard mask layer if the optional hard mask layer is included. In some implementations, the hard mask cover 522 may deposited as a larger hard mask layer that is then patterned into the hard mask cover 522 by a lithographic process and an etching process. For example, hard mask cover material may be deposited using PECVD, followed by performance of a lithographic process and an etch process to pattern a circle around the polygonal cavity 512 and then cut away an exterior portion of the hard mask cover material from the circle, leaving the hard mask cover 522. A center of the hard mask cover 522 may be offset from a center of the polygonal cavity 512, such that at least a small portion of the polygonal cavity 512 is not covered by the hard mask cover 522. Although shown in FIG. 5C, the third stage 520 and the hard mask cover 522 are optional, and in some other implementations there is no hard mask cover 522 over the polygonal cavity 512.

[0065] FIG. 5D illustrates a fourth stage 530 of the process. During the fourth stage 530, a second etching process (also referred to as a main silicon etch) may be performed to create a substrate pillar 532 having the polygonal cavity 512 within the tip at a first end. In some implementations, the second etching process is a Bosch etching process that is performed to cut away the substrate 502 surrounding the hard mask cover 522. In some other implementations, the second etching process may be a plasma etching process, a wet etching process, a dry etching process, or another type of etching process. Because the center of the hard mask cover 522 is offset from the center of the polygonal cavity 512, the second etching process cuts away the substrate 502 in a circular shape using the hard mask cover 522 as a mask, resulting in etching away at least the small portion of the polygonal cavity 512 that is not covered by the hard mask cover 522, thereby forming an opening of the substate pillar 532. For example, an edge of the keyhole-shaped cavity intersects an edge of the cylindrical substrate pillar after the second etching process, as depicted in FIG. 5D. The opening of the substrate pillar 532 may be defined for a height of the polygonal cavity 512, such that at least at a point along a circumference of the substrate pillar 532, the polygonal cavity 512 is accessible from an exterior of the substrate pillar 532 via the opening. An overall geometry of the polygonal cavity 512 (e.g., the keyhole-shaped cavity) can be described as the intersection of two draft angles. The substrate pillar 532 is formed at a first draft angle and the polygonal cavity 512 is formed with a particular etch trench outward draft angle, and each of these geometries are etched to a depth such that the draft angles intersect to form opening(s) having particular geometries and/or widths. In implementations in which the optional hard mask layer is included, the second etching process may include (or be subsequent to) a hard mask etching process to cut away the remaining portion of the optional hard mask layer. In some implementations, second etching process is designed to etch (e.g., cut) to an etched depth in the substrate 502 in a range between 5 and 500 gm, and in some particular implementations, between a range of 1 to 150 pm. Additionally or alternatively, the second etching process may be a tapered etching process as described above. In implementations in which the hard mask cover 522 is included, an additional hard mask etch may be performed to remove the hard mask cover 522.

[0066] FIG. 5E illustrates a fifth stage 540 of the process. During the fifth stage 540, one or more thinning processes may be performed to further taper the substrate pillar 532. For example, one or more oxidative thinning processes (e.g., a single-stage or multi-stage oxidative thinning process) may be performed to further decrease a dimension, such as a diameter, toward the tip of the substrate pillar 532 (e.g., an end that includes the polygonal cavity 512) as compared to the opposite end of the substrate pillar 532 (e.g., a bottom end in FIG. 5E that extends from the substrate 502). Due to the tapered etching process and/or the oxidative thinning process, a microneedle 542 that is formed from the substrate pillar 532 (including the polygonal cavity 512) may be tapered such that, in the orientation shown in FIG. 5E, the diameter of the microneedle 542 stays the same or increases as the microneedle 542 is traversed along a longitudinal axis from the tip to the etched depth of the substrate 502. Such a tapering results in the microneedle 542 being more flexible and less likely to break when used in a biomedical application. Additionally, the polygonal cavity 512 and the microneedle 542 may be designed, through control of dimensions of the polygonal cutout pattern, to have a particular depth and aspect ratio for a variety of biomedical applications, thereby increasing the utility of the microneedle 542. For example, the opening to the polygonal cavity 512 may enable the microneedle 542 to act as a capillary suction proboscis when delivering a payload to a cell. If the microneedle 542 is doped with ions or any sort of charge carrier, the ions may be conducted off the microneedle through the opening, thereby impacting absorption and desorption kinetics. Additionally or alternatively, the microneedle 542 may be capable, via providing an electro-osmotic flow, to wet or de-wet a surface and interface with the cell. In implementations in which the microneedle 542 is part of a microneedle array, the microneedle array may be formed on a 1 cm² die with a pitch (e.g., between microneedles) that is in a range between 10 and 20 pm.

[0067] Referring to FIGS. 6A-E, stages of an example of a fabrication process for microneedles or tools having high aspect ratios according to one or more aspects of the present disclosure are shown. In the example shown in FIGS. 6A-E, the process is performed to fabricate a microneedle (or other tool) having a porous portion at the tip. In some implementations, one or more of the stages described with reference to FIGS. 6A-E may include or correspond to, may come before, may come between, or may come after, one or more of stages 100, 110, 120, 130, 140, and 150 described above with reference to FIGS. 1A-F.

[0068] FIG. 6A illustrates a first stage 600 of the process. Prior to the first stage 600, a photoresist layer is deposited on a substrate 602, or on an optional hard mask layer (not shown) that is deposited on the substrate 602. The photoresist layer may include or correspond to the photoresist layer 112 of FIG. IB and may be deposited using any of the deposition techniques described above with reference to the photoresist layer 112 of FIG. IB. The optional hard mask may include or correspond to the hard mask layer 104 of FIG. 1 A and may be deposited using any of the deposition techniques described above with reference to the hard mask layer 104 of FIG. 1 A. During the first stage 600, a custom pattern is applied to the photoresist layer and one or more lithography operations are performed such that mask structure 606 is formed on a custom patternshaped portion 604 of the substrate 602. For example, the lithography operations may define a circular pattern on a hard mask layer or hard mask cover on the substrate 602. In some implementations, the lithography operations include a DUV lithography process. In some implementations, the custom pattern (e.g., corresponding to the custom pattern-shaped portion 604) is a circular pattern. In some such implementations, dimensions of the circular pattern may control dimensions of a tip of a microneedle within 100 nm. After defining the custom pattern, a first etch process is performed to cut away a remainder of the hard mask layer from the mask structure 606. The first etch may be performed using an etching process capable of etching features with nanometer margins. In a preferred implementation, the first etching process is a plasma etching process, such as a DRIE process. In other implementations, the first etching process is a wet etching process (e.g., a wet chemical etching process), a dry etching process, or another type of etching process. One or more dimensions of a microneedle tip to be fabricated by the process of FIGS. 6A-E are based on one or more dimensions of the circular pattern that corresponds to the custom pattern-shaped portion 604. For example, a diameter of the tip may be based on a diameter of the circular pattern. In some implementations, a diameter of the tip is within a range between 750 and 1300 nm, or less than 1 pm, based on the diameter of the custom pattern-shaped portion 604. [0069] FIG. 6B illustrates a second stage 610 of the process. During the second stage 610, a second etching process (also referred to as a main silicon etch) may be performed to create a substrate pillar 614 having a flat tip 612 at a first end. In some implementations, the second etching process is a Bosch etching process that is performed to cut away the substrate 602 surrounding the custom pattern-shaped portion 604. In some other implementations, the second etching process may be a plasma etching process, a wet etching process, a dry etching process, or another type of etching process. In implementations in which the optional hard mask layer is included, the second etching process may include (or be subsequent to) a hard mask etching process to cut away the remaining portion of the optional hard mask layer. In some implementations, the second etching process is designed to etch (e.g., cut) to an etched depth in the substrate 602 in a range between 5 and 500 pm, and in some particular implementations, between a range of 1 to 150 pm. Additionally or alternatively, the second etching process may be a tapered etching process as described above. In some implementations, one or more thinning processes may be performed to further taper the substrate pillar 614. For example, one or more oxidative thinning processes (e.g., a single-stage or multi-stage oxidative thinning process) may be performed to further decrease a dimension, such as a diameter, toward the flat tip 612 of the substrate pillar 614 as compared to the opposite end of the substrate pillar 614 (e.g., a bottom end in FIG. 2B that extends from the substrate 602).

[0070] FIG. 6C illustrates a third stage 620 of the process. During the third stage 620, an oxidative process may be performed on a portion of the substrate pillar 614 that includes or is adjacent to the flat tip 612. The oxidative process is an oxidative transformative process and may also be known or referred to as oxidative pickling. Performing the oxidative process may form one or more pores 622 within an exterior of the portion of the substrate pillar 614, such as illustrative pores 622 A and 622B. The pores may be small holes, cavities, divots, or the like, but are not typically through-holes through the substrate pillar 614. A size of the portion of the substrate pillar 614 on which the oxidative process is performed may be selected based on an application for which the microneedle (or other tool) is being fabricated. In some implementations, the oxidative process is a chemical oxidative process. In some such implementations, a morphology of the pores 622 is based on a concentration of a chemical agent used during the chemical oxidative process. For example, using a higher concentration of the chemical agent may cause formation of more pores, pores having larger area, deeper pores, or a combination thereof, and using a lower concentration of the chemical agent may cause formation of few pores, pores having smaller area, less deep pores, or a combination thereof. Alternatively, the oxidative process may be an electro-oxidative process. In some such implementations, a morphology of the pores 622 may be based on a current applied during the electro-oxidative process, an etchant or chemical used during the fabrication, or a combination thereof. To illustrate, by selection of the applied current, the concentration of the chemical agent, the etchants used during fabrication, and/or the like, the morphology of the pores 622 can be controlled to change the shape, size, and/or appearance, or in some other implementations, to form small protrusions (instead of the pores 622) with specific dimensions that are favorable for molecular cargo sorption and/or desorption. That’s kind of like the what ties it together.

[0071] FIG. 6D illustrates a fourth stage 630 of the process. The fourth stage 630 represents completion of the oxidative process of the third stage 620 and the tapering process of the second stage 610. Due to the tapered etching process and/or the oxidative thinning process of the second stage 610, a microneedle 632 that is formed from the flat tip 612 and the substrate pillar 614 may be tapered such that, in the orientation shown in FIG. 6D, the diameter of the microneedle 632 stays the same or increases as the microneedle 632 is traversed along a longitudinal axis from the flat tip 612 to the etched depth of the substrate 602. Such a tapering results in the microneedle 632 being more flexible and less likely to break when used in a biomedical application. Additionally, the pores 622 (or in other implementations, small protrusions) may enable the microneedle 632 to be used for different applications than conventional microneedles without pores or protrusions. FIG. 6E illustrates a side view 640 of the microneedle 632 extending above the substrate 602, shown in FIG. 6E after completion of the stages 600, 610, 620, and 630.

[0072] Referring to FIGS. 7A-F, stages of an example of a fabrication process for microneedles or tools having high aspect ratios according to one or more aspects of the present disclosure are shown. In the example shown in FIGS. 7A-F, the process is performed to fabricate a microneedle (or other tool) having a cone-shaped tip coated in metal or a metal alloy. In some implementations, one or more of the stages described with reference to FIGS. 7A-F may include or correspond to, may come before, may come between, or may come after, one or more of stages 100, 110, 120, 130, 140, and 150 described above with reference to FIGS. 1A-F.

[0073] FIG. 7A illustrates a first stage 700 of the process. Prior to the first stage 700, a photoresist layer 706 is deposited on a substrate 702, or on an optional hard mask layer (not shown) that is deposited on the substrate 702. The photoresist layer 706 may include or correspond to the photoresist layer 112 of FIG. IB and may be deposited using any of the deposition techniques described above with reference to the photoresist layer 112 of FIG. IB. The optional hard mask may include or correspond to the hard mask layer 104 of FIG. 1 A and may be deposited using any of the deposition techniques described above with reference to the hard mask layer 104 of FIG. 1 A. During the first stage 700, a custom pattern is applied to the photoresist layer 706 and one or more lithography operations are performed such that a custom pattern portion 704 of the photoresist layer 706 is removed, and remaining portions 706A and 706B of the photoresist layer 706 remain on the substrate 702. For example, the lithography operations may remove the custom pattern portion 704 (e.g., a portion having a shape defined by the custom pattern) and expose a surface of the substrate 702 (or a surface of a hard mask layer if a hard mask layer is included between the substrate 702 and the photoresist layer 706). In some implementations, the lithography operations include a DUV lithography process. In some implementations, the custom pattern (e.g., corresponding to the custom pattern portion 704) is an annular cutout pattern, and the remainder of the photoresist layer 706 includes an exterior portion 706A and an interior portion 706B (e.g., a central portion). In some such implementations, the annular pattern is carefully designed such that a subsequent plasma etch or wet chemical etch produces a controlled cut of the substrate 702 (and optionally a hard mask layer) that results in a sloping cone shape that will act as needle tip, as further described below. In some such implementations, dimensions of the annular cutout pattern may control dimensions of the cone shape within 100 nm.

[0074] FIG. 7B illustrates a second stage 710 of the process. During the second stage 710, a first etch process is performed to cut a cone-shaped feature 712 that extends from an etched surface 716 of the substrate 702. To illustrate, the first etch process may cut away a portion of the substrate 702 to create an opening 714 that extends from the photoresist layer 706 to the etched surface 716, which has the cone-shaped feature 712 (e.g., a cone) extending upwards (in the orientation shown in FIG. 7B) from etched surface 716. The first etch may be performed using an etching process capable of etching features with nanometer margins. In a preferred implementation, the first etching process is a plasma etching process, such as a DRIE process. In other implementations, the first etching process is a wet etching process (e.g., a wet chemical etching process), a dry etching process, or another type of etching process. One or more dimensions of the cone-shaped feature 712 are based on one or more dimensions of the annular cutout pattern that corresponds to the custom pattern portion 704. For example, a height of the cone-shaped feature 712 and a taper associated with the cone-shaped feature 712 may be based on one or more dimensions of an interior of the annular cutout pattern (e.g., the interior portion 706B). To illustrate, the diameter of the interior portion 706B may be selected to control the maximum depth and taper of the cone-shaped feature 712. As another example, a diameter of a base of the cone-shaped feature 712 may be based on a diameter of the annular cutout pattern. In some implementations, the height of the cone-shaped feature 712 is within a range between .1 and 100 pm based on a diameter of the interior portion 706B. Additionally or alternatively, a diameter of a tip of the cone-shaped feature 712 may be within a range between 10 and 300 nm. In other examples, the tip may be less than 1 pm, based on a difference between a diameter of the custom pattern portion 704 and the diameter of the interior portion 706B. Additionally or alternatively, the diameter of the base of the cone-shaped feature 712 may be in a range between 1 and 100 pm, based on the diameter of the custom pattern portion 704.

[0075] FIG. 7C illustrates a third stage 720 of the process. During the third stage 720, a metal material may be deposited on the cone-shaped feature 712. Deposition of the metal material may form a metal coating on at least a portion of the cone-shaped feature 712, thereby resulting in a metal-coated feature 722. The metal material may be deposited via a vapor deposition process, an e-beam process, a sputtering process, an electrodeposition process, or any type of deposition process suitable for depositing metals or metallic materials. The metal material may include an inorganic metal, an organic metal, or a metal alloy, or a mixture of metals and/or metal alloys. As illustrative examples, the metal material that coats the metal-coated feature 722 may include gold, silver, copper, or alloys thereof. Alternatively, after applying the custom pattern to the photoresist layer 706 in the first stage 700, the process may include depositing a metal film on a remainder of the photoresist layer 706 and the custom pattern such that a portion of the metal film covers the custom pattern. In such an example, the above-described lithography operations may include a metallization liftoff process to remove the remainder of the photoresist layer 706 and a remainder of the metal film that is disposed on the remainder of the photoresist layer 706, resulting in a metal coating the substrate 702 in a region that is to be etched to form the metal- coated feature 722.

[0076] FIG. 7D illustrates a fourth stage 730 of the process. During the fourth stage 730, a hard mask cover 732 may be deposited over and/or on the metal-coated feature 722 on the etched surface 716. The hard mask cover 732 may include a protective material that encapsulates the metal material of the metal-coated feature 722 during a subsequent etching process to prevent exposure of the metal material to plasma etch conditions. The hard mask cover 732 may include or correspond to the hard mask cover 142 of FIG. IE and may be deposited using any of the deposition techniques described above with reference to the hard mask cover 142 of FIG. IE. The hard mask cover 732 may include SiO, SiC, SiN, or any material suitable for providing an etch mask or a hard mask. In some implementations, the hard mask cover 732 includes the same material as the optional hard mask layer between the substrate 702 and the photoresist layer 706 if the optional hard mask layer is included. Alternatively, the hard mask cover 732 may include a different material than the optional hard mask layer if the optional hard mask layer is included. In some implementations, the hard mask cover 732 may deposited as a larger hard mask layer that is then patterned into the hard mask cover 732 by a lithographic process and an etching process. For example, hard mask cover material may be deposited using PECVD, followed by performance of a lithographic process and an etch process to pattern a circle around the metal-coated feature 722 and then cut away an exterior portion of the hard mask cover material from the circle, leaving the hard mask cover 732. Although shown in FIG. 7D, the fourth stage 730 and the hard mask cover 732 are optional, and in some other implementations there is no hard mask cover 732 over the metal-coated feature 722.

[0077] FIG. 7E illustrates a fifth stage 740 of the process. During the fifth stage 740, a second etching process (also referred to as a main silicon etch) may be performed to create a substrate pillar 742 having the metal-coated feature 722 as a tip at a first end. In some implementations, the second etching process is a Bosch etching process that is performed to cut away the substrate 702 surrounding the exposed etched surface 716. In some other implementations, the second etching process may be a plasma etching process, a wet etching process, a dry etching process, or another type of etching process. The exterior portion 706A of the photoresist layer 706 may be cleaned prior to the second etching process. In implementations in which the optional hard mask layer is included, the second etching process may include (or be subsequent to) a hard mask etching process to cut away the remaining portion of the optional hard mask layer. In some implementations, second etching process is designed to etch (e.g., cut) to an etched depth in the substrate 702 in a range between 5 and 500 pm, and in some particular implementations, between a range of 1 to 150 pm. Additionally or alternatively, the second etching process may be a tapered etching process as described above. In implementations in which the hard mask cover 732 is included, an additional hard mask etch may be performed to remove the hard mask cover 732.

[0078] FIG. 7F illustrates a sixth stage 750 of the process. During the sixth stage 750, one or more thinning processes may be performed to further taper the substrate pillar 742. For example, one or more oxidative thinning processes (e.g., a single-stage or multi-stage oxidative thinning process) may be performed to further decrease a dimension, such as a diameter, toward the tip of the substrate pillar 742 (e.g., an end that includes the metal-coated feature 722) as compared to the opposite end of the substrate pillar 742 (e.g., a bottom end in FIG. 7F that extends from the substrate 702). Due to the tapered etching process and/or the oxidative thinning process, a microneedle 752 that is formed from the metal-coated feature 722 and the substrate pillar 742 may be tapered such that, in the orientation shown in FIG. 7F, the diameter of the microneedle 752 stays the same or increases as the microneedle 752 is traversed along a longitudinal axis from the tip to the etched depth of the substrate 702. Such a tapering results in the microneedle 752 being more flexible and less likely to break when used in a biomedical application. Additionally, the metal-coated feature 722 may be designed, through control of dimensions of the annular cutout pattern, to have a particular sharpness and aspect ratio for a variety of biomedical applications, thereby increasing the utility of the microneedle 752. In some particular implementations, the microneedle 752 may be designed such that the metal-coated feature 722 has a starting diameter (e.g., prior to the second etching process) of approximately 3 pm and that a height of the microneedle 752 (e.g., after the second etching process) is in a range between .1 and 100 pm. In some such implementations, the metal-coated feature 722 may be sharpened to have a diameter (dl) that is less than 1 pm, and a diameter (d2) at the base of the microneedle 752 may be in a range between 1 and 100 pm. In implementations in which the microneedle 752 is part of a microneedle array, the microneedle array may be formed on a 1 cm² die with a pitch (e.g., between microneedles) that is in a range between 10 and 20 pm. Although the examples shown in FIGS. 7A-F depict deposition of metal on substrate features, such as a cone-shaped feature, in other implementations, metal deposition as described with reference to FIGS. 7A-F may be performed on cavities formed with the disclosed processes, such as the cavities described with reference to FIGS. 3A-E, 4A-E, and/or 5A-E.

[0079] Referring to FIGS. 8A-D, stages of an example of a fabrication process for microneedles or tools having high aspect ratios according to one or more aspects of the present disclosure are shown. In the example shown in FIGS. 8A-D, the process is performed to fabricate a microneedle (or other tool) having a pad-shaped tip coated in metal or a metal alloy. In some implementations, one or more of the stages described with reference to FIGS. 8A-D may include or correspond to, may come before, may come between, or may come after, one or more of stages 100, 110, 120, 130, 140, and 150 described above with reference to FIGS. 1A-F.

[0080] FIG. 8A illustrates a first stage 800 of the process. Prior to the first stage 800, a photoresist layer is deposited on a substrate 802, or on an optional hard mask layer (not shown) that is deposited on the substrate 802. The photoresist layer may include or correspond to the photoresist layer 112 of FIG. IB and may be deposited using any of the deposition techniques described above with reference to the photoresist layer 112 of FIG. IB. The optional hard mask may include or correspond to the hard mask layer 104 of FIG. 1 A and may be deposited using any of the deposition techniques described above with reference to the hard mask layer 104 of FIG. 1 A. During the first stage 800, a custom pattern is applied to the photoresist layer and one or more lithography operations are performed such that the photoresist layer is removed except for over a custom pattern-shaped portion 804 of the substrate 802. For example, the lithography operations may remove an exterior region of the photoresist layer except for a portion having a shape defined by the custom pattern. In some implementations, the lithography operations include a DUV lithography process. In some implementations, the custom pattern (e.g., corresponding to the custom pattern-shaped portion 804) is a circular pattern (e.g., a small dot pattern). In some such implementations, the circular pattern is carefully designed such that a subsequent plasma etch or wet chemical etch produces a controlled cut of the substrate 802 (and optionally a hard mask layer) that results in a pad shape that will act as needle tip, as further described below. In some such implementations, dimensions of the circular pattern may control dimensions of the pad shape within 100 nm. After defining the custom pattern, a first etch process is performed to cut away a remainder of the optional hard mask layer and/or a portion of the substrate 802 that is not covered by the circular pattern to create a pad-shaped feature that extends from the substrate 802. The first etch may be performed using an etching process capable of etching features with nanometer margins. In a preferred implementation, the first etching process is a plasma etching process, such as a DRIE process. In other implementations, the first etching process is a wet etching process (e.g., a wet chemical etching process), a dry etching process, or another type of etching process. One or more dimensions of a microneedle tip to be fabricated by the process of FIGS. 8A-D are based on one or more dimensions of the circular pattern that corresponds to the custom pattern- shaped portion 804. For example, a diameter of the tip may be based on a diameter of the circular pattern. In some implementations, a diameter of the pad-shaped feature (e.g., the tip of a microneedle structure) is within a range between 1 and 100 pm, based on the diameter of the custom pattern-shaped portion 804. After the first etch process is complete, and the pad-shaped feature is formed, a metal material may be deposited on the pad-shaped feature (e.g., a customshaped substrate structure). Deposition of the metal material may form a metal coating on at least a portion of the pad-shaped feature, thereby resulting in a metal-coated feature 806. The metal material may be deposited via a vapor deposition process, an e-beam process, a sputtering process, an electrodeposition process, or any type of deposition process suitable for depositing metals or metallic materials. The metal material may include an inorganic metal, an organic metal, or a metal alloy, or a mixture of metals and/or metal alloys. As illustrative examples, the metal material that coats the metal-coated feature 806 may include gold, silver, copper, or alloys thereof. Alternatively, after applying the custom pattern to the photoresist layer, the first stage 800 may include depositing a metal film on a remainder of the photoresist layer and the custom pattern such that a portion of the metal film covers the custom pattern. In such an example, the above-described lithography operations may include a metallization liftoff process to remove the remainder of the photoresist layer and a remainder of the metal film that is disposed on the remainder of the photoresist layer, resulting in a metal coating the substrate 802 in the custom pattern-shaped portion 804 that will become the metal-coated feature 806 after the first etch process. In some other implementations, the pad-shaped feature is not coated in metal, and the process continues as shown in FIGS. 8B-D with a pad-shaped substrate feature, resulting in a microneedle with a padshaped tip that is not coated in metal, similar to the cone-shaped feature 212 of the microneedle 242 of FIG. 2E.

[0081] FIG. 8B illustrates a second stage 810 of the process. During the second stage 810, a hard mask cover 812 may be deposited over and/or on the metal-coated feature 806. The hard mask cover 812 may include a protective material that encapsulates the metal material of the metal-coated feature 806 during a subsequent etching process to prevent exposure of the metal material to plasma etch conditions. The hard mask cover 812 may include or correspond to the hard mask cover 142 of FIG. IE and may be deposited using any of the deposition techniques described above with reference to the hard mask cover 142 of FIG. IE. The hard mask cover 812 may include SiO, SiC, SiN, or any material suitable for providing an etch mask or a hard mask. In some implementations, the hard mask cover 812 includes the same material as the optional hard mask layer between the substrate 802 and the photoresist layer if the optional hard mask layer is included. Alternatively, the hard mask cover 812 may include a different material than the optional hard mask layer if the optional hard mask layer is included. In some implementations, the hard mask cover 812 may deposited as a larger hard mask layer that is then patterned into the hard mask cover 812 by a lithographic process and an etching process. For example, hard mask cover material may be deposited using PECVD, followed by performance of a lithographic process and an etch process to pattern a circle around the metal-coated feature 806 and then cut away an exterior portion of the hard mask cover material from the circle, leaving the hard mask cover 812. Although shown in FIG. 8B, the second stage 810 and the hard mask cover 812 are optional, and in some other implementations there is no hard mask cover 812 over the metal-coated feature 806.

[0082] FIG. 8C illustrates a third stage 820 of the process. During the third stage 820, a second etching process (also referred to as a main silicon etch) may be performed to create a substrate pillar 822 having the metal-coated feature 806 as a tip at a first end. In some implementations, the second etching process is a Bosch etching process that is performed to cut away the substrate 802 except for a portion below, and having a slightly larger diameter than, the metal-coated feature 806. In some other implementations, the second etching process may be a plasma etching process, a wet etching process, a dry etching process, or another type of etching process. In implementations in which the optional hard mask layer is included, the second etching process may include (or be subsequent to) a hard mask etching process to cut away the remaining portion of the optional hard mask layer. In some implementations, second etching process is designed to etch (e.g., cut) to an etched depth in the substrate 802 in a range between 5 and 500 pm, and in some particular implementations, between a range of 1 to 150 pm. Additionally or alternatively, the second etching process may be a tapered etching process as described above. In implementations in which the hard mask cover 812 is included, an additional hard mask etch may be performed to remove the hard mask cover 812.

[0083] FIG. 8D illustrates a fourth stage 830 of the process. During the fourth stage 830, one or more thinning processes may be performed to further taper the substrate pillar 822. For example, one or more oxidative thinning processes (e.g., a single-stage or multi-stage oxidative thinning process) may be performed to further decrease a dimension, such as a diameter, toward the tip of the substrate pillar 822 (e.g., an end that includes the metal-coated feature 806) as compared to the opposite end of the substrate pillar 822 (e.g., a bottom end in FIG. 8D that extends from the substrate 802). Due to the tapered etching process and/or the oxidative thinning process, a microneedle 832 (or other tool) that is formed from the metal-coated feature 806 and the substrate pillar 822 may be tapered such that, in the orientation shown in FIG. 8D, the diameter of the microneedle 832 stays the same or increases as the microneedle 832 is traversed along a longitudinal axis from the tip to the etched depth of the substrate 802. Such a tapering results in the microneedle 832 being more flexible and less likely to break when used in a biomedical application. Additionally, the metal-coated feature 806 may be designed, through control of dimensions of the circular pattern, to have a particular diameter and aspect ratio for a variety of biomedical applications, thereby increasing the utility of the microneedle 832. In some particular implementations, the microneedle 832 may be designed such that the metal-coated feature 806 has a diameter that is in a range between 100 and 500 nm, or between .1 and 100 pm, and a diameter at the base of the microneedle 832 may be in a range between 700 and 1200 nm, or between 1 and 100 pm. In implementations in which the microneedle 832 is part of a microneedle array, the microneedle array may be formed on a 1 cm² die with a pitch (e.g., between microneedles) that is in a range between 10 and 20 pm.

[0084] Referring to FIGS. 9A-E, stages of an example of a fabrication process for microneedles or tools having high aspect ratios according to one or more aspects of the present disclosure are shown. In the example shown in FIGS. 9A-E, the process is performed to fabricate a microneedle (or other tool) having a polygonal-shaped tip coated in metal or a metal alloy. In some implementations, one or more of the stages described with reference to FIGS. 9A-E may include or correspond to, may come before, may come between, or may come after, one or more of stages 100, 110, 120, 130, 140, and 150 described above with reference to FIGS. 9A-F.

[0085] FIG. 9A illustrates a first stage 900 of the process. Prior to the first stage 900, a photoresist layer is deposited on a substrate 902, or on an optional hard mask layer (not shown) that is deposited on the substrate 902. The photoresist layer may include or correspond to the photoresist layer 112 of FIG. IB and may be deposited using any of the deposition techniques described above with reference to the photoresist layer 112 of FIG. IB. The optional hard mask may include or correspond to the hard mask layer 104 of FIG. 1 A and may be deposited using any of the deposition techniques described above with reference to the hard mask layer 104 of FIG. 1 A. During the first stage 900, a custom pattern is applied to the photoresist layer and one or more lithography operations are performed such that the photoresist layer is removed except for over a custom pattern-shaped portion of the substrate 902. For example, the lithography operations may remove an exterior region of the photoresist layer except for a portion having a shape defined by the custom pattern. In some implementations, the lithography operations include a DUV lithography process. In some implementations, the custom pattern is a polygonal pattern, and the polygonal pattern may be applied through a series of application of multiple less complicated patterns that result in the custom pattern. In some such implementations, the polygonal pattern is carefully designed such that a subsequent plasma etch or wet chemical etch produces a controlled cut of the substrate 902 (and optionally a hard mask layer) that results in a polygonal shape that will act as needle tip, as further described below. In some such implementations, dimensions of the polygonal pattern may control dimensions of the polygonal shape within 100 nm. After applying the custom pattern, an initial etch process may be performed to cut away an exterior portion of the optional hard mask layer and/or an exterior portion of the substrate 902 (e.g., to a small depth) to create a mask structure 904 having the custom pattern shape (e.g., a polygonal shape). In some implementations, the mask structure 904 has a star shape, as shown in the example depicted in FIG. 9A. In other implementations, the mask structure 904 may have other shapes, such as a triangular shape, a square shape, a rectangular shape, a rhombus shape, a parallelogram shape, an oval shape, or another type of polygonal shape. Additionally or alternatively, the clefts or the crevices of the star shape (or another shape) may be engineered, through design of the custom pattern, to be on the same size scale as some macromolecular payload assemblies for delivery into cells by a microneedle formed from the process described with reference to FIGS. 9A-E. For example, nuances to the hydrodynamics of cell penetration and transit through the lipid bilayer and material can be exploited to release payload selectively in a controlled displacement workflow via microelectromechanical system (MEMS) actuation and design of the custom pattern geometry. The design of the custom pattern geometry may also be based on the size and type of payloads to be delivered by the fabricated microneedle.

[0086] FIG. 9B illustrates a second stage 910 of the process. During the second stage 910, a first etch process is performed to cut a polygonal-shaped feature 912 that extends from an etched surface of the substrate 902. To illustrate, the first etch process may cut away an exterior portion of the substrate 902 to a particular depth, resulting in the polygonal-shaped feature 912 that extends upwards (in the orientation shown in FIG. 9B) from the substrate 902. The first etch may be performed using an etching process capable of etching features with nanometer margins. In a preferred implementation, the first etching process is a plasma etching process, such as a DRIE process. In other implementations, the first etching process is a wet etching process (e.g., a wet chemical etching process), a dry etching process, or another type of etching process. One or more dimensions of the polygonal-shaped feature 912 are based on one or more dimensions of the polygonal pattern that corresponds to the mask structure 904. In implementations in which the mask structure 904 includes hard mask material or other non-substrate materials, an additional hard mask etch may be included in or subsequent to the first etch process to remove the mask structure 904. Alternatively, if the mask structure 904 is a silicon or other substrate structure, the polygonal-shaped feature 912 may include the mask structure 904. In some implementations, the second stage 910 includes depositing a metal material, or performing a metal liftoff process, to coat the polygonal-shaped feature in a metal or metal alloy materials, as described above with reference to FIGS. 7A-F and 8A-D. Alternatively, the metal deposition or liftoff process may be omitted for formation of microneedles with a silicon or other substrate material tip.

[0087] FIG. 9C illustrates a third stage 920 of the process. During the third stage 920, a hard mask cover 922 may be deposited over and/or on the polygonal-shaped feature 912 on the etched surface of the substrate 902. In implementations in which the polygonal-shaped feature 912 is coated with metal, the hard mask cover 922 includes a protective material that encapsulates the metal material of the polygonal-shaped feature 912 during a subsequent etching process to prevent exposure of the metal material to plasma etch conditions. The hard mask cover 922 may include or correspond to the hard mask cover 142 of FIG. IE and may be deposited using any of the deposition techniques described above with reference to the hard mask cover 142 of FIG. IE. The hard mask cover 922 may include SiO, SiC, SiN, or any material suitable for providing an etch mask or a hard mask. In some implementations, the hard mask cover 922 includes the same material as the optional hard mask layer between the substrate 902 and the photoresist layer if the optional hard mask layer is included. Alternatively, the hard mask cover 922 may include a different material than the optional hard mask layer if the optional hard mask layer is included. In some implementations, the hard mask cover 922 may deposited as a larger hard mask layer that is then patterned into the hard mask cover 922 by a lithographic process and an etching process. For example, hard mask cover material may be deposited using PECVD, followed by performance of a lithographic process and an etch process to pattern a circle around the polygonal-shaped feature 912 and then cut away an exterior portion of the hard mask cover material from the circle, leaving the hard mask cover 922. Although shown in FIG. 9C, the third stage 920 and the hard mask cover 922 are optional, and in some other implementations there is no hard mask cover 922 over the polygonal-shaped feature 912.

[0088] FIG. 9D illustrates a fourth stage 930 of the process. During the fourth stage 930, a second etching process (also referred to as a main silicon etch) may be performed to create a substrate pillar 932 having the polygonal-shaped feature 912 as a tip at a first end. In some implementations, the second etching process is a Bosch etching process that is performed to cut away the substrate 902 exterior to the portion covered by the polygonal-shaped feature 912. In some other implementations, the second etching process may be a plasma etching process, a wet etching process, a dry etching process, or another type of etching process. In implementations in which the optional hard mask layer is included, the second etching process may include (or be subsequent to) a hard mask etching process to cut away the remaining portion of the optional hard mask layer. In some implementations, second etching process is designed to etch (e.g., cut) to an etched depth in the substrate 902 in a range between 5 and 500 pm, and in some particular implementations, between a range of 1 to 150 pm. Additionally or alternatively, the second etching process may be a tapered etching process as described above. In implementations in which the hard mask cover 922 is included, an additional hard mask etch may be performed to remove the hard mask cover 922.

[0089] FIG. 9E illustrates a fifth stage 940 of the process. During the fifth stage 940, one or more thinning processes may be performed to further taper the substrate pillar 932. For example, one or more oxidative thinning processes (e.g., a single-stage or multi-stage oxidative thinning process) may be performed to further decrease a dimension, such as a diameter, toward the tip of the substrate pillar 932 (e.g., an end that includes the polygonal-shaped feature 912) as compared to the opposite end of the substrate pillar 932 (e.g., a bottom end in FIG. 9E that extends from the substrate 902). Due to the tapered etching process and/or the oxidative thinning process, a microneedle 944 that is formed from the polygonal-shaped feature 912, or a metal coated polygonal-shaped feature 942 as shown in FIG. 9E, and the substrate pillar 932 may be tapered such that, in the orientation shown in FIG. 9F, the diameter of the microneedle 944 stays the same or increases as the microneedle 944 is traversed along a longitudinal axis from the tip to the etched depth of the substrate 902. Such a tapering results in the microneedle 944 being more flexible and less likely to break when used in a biomedical application. Additionally, the polygonal-shaped feature 912 (or the metal coated polygonal-shaped feature 942) may be designed, through control of dimensions of the polygonal pattern, to have a particular size and aspect ratio for a variety of biomedical applications, thereby increasing the utility of the microneedle 944. In implementations in which the microneedle 944 is part of a microneedle array, the microneedle array may be formed on a 1 cm² die with a pitch (e.g., between microneedles) that is in a range between 10 and 20 pm.

[0090] Referring to FIG. 10, a flow diagram of an example of a method for fabricating microneedles or tools having high aspect ratios according to one or more aspects is shown as a method 1000. In some implementations, the operations of the method 1000 may be stored as instructions that, when executed by one or more processors (e.g., the one or more processors of a computing device or a server), cause the one or more processors to perform the operations of the method 1000. In some implementations, these instructions may be stored on a non-transitory computer-readable storage device or a non-transitory computer-readable storage medium. In some implementations, the method 1000 may be performed by a computing device, such as a computing device described further herein with reference to FIG. 12. In FIG. 10, the dashed line represents potential shifts in sequencing between lithography coating stripping and etching. Additionally, one or more of the operations described with reference to 1006, 1014, 1018, and 1024 may include or correspond to metrology checks.

[0091] The method 1000 includes providing a silicon substrate, at 1002. For example, the silicon substrate may include or correspond to the substrate 102 of FIG. 1A. Although described as a silicon substrate, in other implementations, the substrate may be a different type of wafer material. Additionally or alternatively, the silicon substrate may have a small surface layer of SiCh on a top surface, such as a layer having a maximum height of 50 angstroms. The method 1000 includes performing a pre-clean on the silicon substrate, at 1004. In some implementations, the pre-clean is a SiCh pre-clean. For example, the SiCh pre-clean may remove unwanted contaminants and/or native oxide from the silicon substrate (e.g., the wafer).

[0092] The method 1000 includes a performing wet SiCh growth process, at 1006. For example, the wet SiCh growth process may form the hard mask layer 104 of FIG. 1A. The wet SiCh growth process may grow a SiCh hard mask layer having a height of approximately 140 nm. This stage may include metrology check(s), such as measuring the thickness of a thin film (e.g., layer) of SiCh to ensure the thickness is within a tolerance range before proceeding to the next stage. The method 1000 includes depositing one or more lithography coatings, at 1008. For example, the one or more lithographic coatings may include or correspond to the photoresist layer 112 of FIG. IB. In some implementations, the lithography coatings include a bottom anti- reflective coating (BARC) layer and a photoresist layer, such that the BARC layer is disposed between the hard mask layer and the photoresist layer. As non-limiting examples, the BARC layer may have a height of approximately 60 nm, and the photoresist layer may have a height of 430 nm. The BARC layer may be added to prevent light absorption, to provide a barrier, and/or to reduce reflection energy at the wafer surface from reflecting back into the photoresist layer.

[0093] The method 1000 includes exposing and developing the lithography coatings, at 1010. For example, the exposing and developing may apply the custom pattern 122 of FIG. 1C. The method 1000 includes performing a lithography hardbake, at 1012. Performing the hard bake after exposing and developing the lithography coatings may remove the photoresist layer (e.g., the lithographic coating) except at locations that correspond to the custom pattern, such that these photoresist layer structures may be used as etch masks in later stages of the method 1000. As a particular, non-limiting example, the exposure matrices for the exposure and development may be within a range of 11-11.5 millijoules (mJ) per 0.0 pm focus, and the hard bake may be at 120° for 30 minutes.

[0094] The method 1000 includes performing a hard mask etch process, at 1014. For example, the hard mask etch process may form the custom-shaped feature 134 of FIG. ID. The hard mask etch may etch away portions of the exposed BARC layer and then the exposed hard mask layer, and depending on the needle tip feature to be formed, optionally a small portion of the silicon substrate, from the open photoresist areas (e.g., areas not covered by the mask structures). In some implementations, the hard mask etch (e.g., a first etching process) may be performed for approximately 30 seconds. This stage may include metrology check(s), such as measuring the depth of the etch, or thicknesses of one or more etched layer(s), to ensure the depth is within a tolerance range before proceeding to the next stage. If a wet clean is to be performed, the method 1000 proceeds to 1016. Otherwise, the method 1000 continues to 1018. The method 1000 may optionally include stripping the lithography coatings, at 1016. For example, if a wet clean is used, the wet clean may be performed to strip the lithography coatings that remain from the deposition at 1008, such as the mask structures formed from the photoresist layer and the BARC layer at the areas corresponding to the custom mask. The wet clean may be used if the BARC layer is expected to micromask during a subsequent silicon etch or depending on the target geometry of the substrate pillars to be formed. After the wet clean, the method 1000 continues to 1018.

[0095] The method 1000 includes performing a silicon etch process on the substrate, at 1018. For example, the silicon etch may form the substrate pillar 152 of FIG. IF. As a nonlimiting example, the silicon etch (e.g., a second etching process) may define substrate pillars that each have a diameter that is approximately 0.5 pm and a height that is approximately 5 pm. In some implementations, the silicon etch may include a combination of shallow etching and deep hydrofluoric (HF) etching, with a mixture of etching and etchant deposition cycles. As a nonlimiting example, the silicon etch may include 7 cycles of HF etching, including 5 deposition cycles and 7 etch cycles, and 10 cycles of shallow etching followed by 7 additional cycles of shallow etching, with 3 seconds of deposition and 15 etches. This stage may include metrology check(s), such as measuring the depth of the silicon etch, or a thickness of the etched silicon, to ensure the depth is within a tolerance range before proceeding to the next stage. If a wet clean was performed (e.g., at 1016), the method 1000 proceeds to 1022. Otherwise, the method 1000 continues to 1020, and the method 1000 includes stripping the lithography coatings. For example, if a plasma clean is used, the plasma clean may be performed to strip the lithography coatings that remain from the deposition at 1008, such as the mask structures formed from the photoresist layer and the BARC layer that remain on top of the substrate pillars. The plasma clean may be used if the BARC layer does not micromask during a the silicon etch or depending on the target geometry of the substrate pillars. After the plasma clean, the method 1000 continues to 1022. In some implementations, prior to 1022, one or more oxidative or chemical thinning operations may be performed to further taper the substrate pillars, such that a diameter of a substrate pillar increases as the substrate pillar is traversed from a top tip to an opposite end along a longitudinal axis of the substrate pillar. Additionally or alternatively, the tapering may be performed by controlling aspect(s) of the silicon etch, such as alternating cycling of an STS tool (prior to cleaning the photoresist structures), alternating chamber cleanliness steps for the STS tool in between etching process runs (prior to cleaning the photoresist structures), performing silicon oxide growth resharpening with subsequent oxide removal (subsequent to cleaning the photoresist structures), or a combination thereof.

[0096] The method 1000 includes applying one or more metals (or metal alloys), at 1022. For example, application of the metals may include or correspond to the metal or metal alloy coatings described with reference to FIGS. 7A-F, 8A-D, and 9A-E. As a non-limiting example, a first coating of titanium (Ti) may be deposited, followed by a second coating of gold (Au), the coatings having thicknesses of approximately 10 nm and 100 nm, respectively, on the tips of the substrate pillars. In this example, the Ti may be deposited to promote adherence of the Au to the substrate pillars, and the Au may be added based on a desired medical application and/or to provide contrast between substrate pillars in a scanning electron microscope (SEM). The method 1000 includes performing a SEM review, at 1024. For example, the SEM review may be performed to confirm the dimensions of one or more microneedles fabricated as a result of the method 1000. For example, each substrate pillar and corresponding tip feature may form a microneedle, a nanoneedle, or another MEMS or nanoelectromechanical system (NEMS) tool. The SEM review may include one or more metrology checks, such as measuring the depth of the various etches, or dimensions of one or more of the formed features, such as the substrate pillar, the tip geometry, or the like. In some examples, the microneedles may be approximately 5 pm in height and have a particular needle tip based on the processes described with reference to FIGS. 2A-E, 3A-E, 4A-E, 5A-E, 6A-E, 7A-F, 8A-D, and 9A-E. The method 1000 has been described for implementations in which metal deposition is performed. In some other implementations, metal coatings may be added via a metal lift-off process, which may result in application of the metals prior to the application of the lithography coatings, lift off of the metal material except for in the regions to be patterned (e.g., the tips of the microneedles), and use of the plasma clean at 1022 to remove lithography coatings (e.g., the wet clean process at 1016 may be skipped).

[0097] Referring to FIG. 11, a flow diagram of an example of a method for fabricating microneedles or tools having high aspect ratios according to one or more aspects is shown as a method 1100. In some implementations, the operations of the method 1100 may be stored as instructions that, when executed by one or more processors (e.g., the one or more processors of a computing device or a server), cause the one or more processors to perform the operations of the method 1100. In some implementations, these instructions may be stored on a non-transitory computer-readable storage device or a non-transitory computer-readable storage medium. In some implementations, the method 1100 may be performed by a computing device, such as a computing device described further herein with reference to FIG. 12.

[0098] The method 1100 includes depositing a photoresist layer on a substrate, at 1102.

For example, this may include a photoresist layer like photoresist layer 112 shown in FIG. IB and discussed above. In some implementations, a hard mask layer may be deposited on the substrate prior to depositing the photoresist layer, in which case the photoresist layer is deposited on a surface of the hard mask layer. For example, the hard mask layer may include or correspond to the hard mask layer 104 of FIG. 1 A. The method 1100 includes applying a custom pattern to the photoresist layer, at 1104. For example, a custom pattern like the custom pattern 122 shown in FIG. 1C may be applied to the photoresist layer.

[0099] The method 1100 includes performing one or more lithography operations on the photoresist layer, at 1106. The one or more lithography operations remove a portion of the photoresist layer beneath the custom pattern and form a custom-shaped feature from the substrate. The custom-shaped feature has a shape that corresponds to the custom pattern. For example, portions of the photoresist layer corresponding to the custom pattern 122 shown in FIG. 1C may be removed using the one or more lithography operations, forming removed portion 132 and custom-shaped feature 134 shown in FIG. ID. Alternatively, if negative lithography is performed, portions of the photoresist layer corresponding to the custom pattern may remain in place following the one or more lithography operations while other portions of the photoresist layer not corresponding to the custom pattern may be removed using the one or more lithography operations.

[0100] The method 1100 includes performing an etching process on the substrate, at 1108. The custom-shaped feature acts as a mask during the etching process. For example, the custom-shaped feature 134 shown in FIG. ID may act as a mask during an etching process. This etching process may include a plasma etch process, a wet etch process, a dry etch process, or another type of etching process. The etching process forms a substrate pillar having a first end that includes the custom-shaped feature and a second end at an etched depth of the substrate. A dimension of the substrate pillar at the second end is larger than the dimension of the substrate pillar at the first end. For example, FIG. IF depicts the substrate pillar 152 formed by an etching process, which may include one or multiple etching operations. As shown in FIG. IF, a first end of the substrate pillar 152 corresponds to the custom-shaped feature 134 and has a dimension dl. A second end of the substrate pillar 152 that is etched to an etched depth of the substrate 102 has a dimension d2 which is larger than dimension dl. In some implementations, the etched depth may be between 1 and 150 nanometers from a surface of the substrate 102. In some implementations, the custom-shaped feature and the substrate pillar may form a microneedle structure or another type of tool structure. In some implementations in which a hard mask layer is deposited on the substrate prior to the photoresist layer, a hard mask etching process may be performed prior to performing the etching process (or as part of the etching process) to remove a portion of the hard mask layer that is exposed by removal of the portion of the photoresist layer. For example, the etching process may remove portions of the photoresist layer 112 and the hard mask layer 104, as shown in FIG. ID.

[0101] In some implementations, a hard mask cover may be deposited over the customshaped feature on the substrate. This may be done before the etching process described at 1108 in FIG. 11. For example, the hard mask cover 142 shown in FIG. IE is deposited over the customshaped feature 134 before the etching process. In some implementations, a hard mask etching process may be performed after the etching process to remove the hard mask cover from the custom-shaped feature. For example, a hard mask etching process performed after the etching process results in the substrate pillar shown in FIG. IF.

[0102] In some implementations, the method 1100 may also include processes to further taper the substrate pillar. For example, the method 1100 may include performing one or more oxidative thinning processes to further taper the substrate pillar. Additionally or alternatively, the method 1100 may include performing one or more chemical thinning processes to further taper the substrate pillar.

[0103] In some implementations, the method 1100 may also include applying the custom pattern during application of a plurality of custom patterns at a plurality of locations on the photoresist layer. In such implementations, the one or more lithography operations may remove a plurality of portions of the photoresist layer beneath the plurality of customs patterns and form a plurality of custom-shaped features from the substrate. The etching process may form a plurality of substrate pillars, each of the plurality of substrate pillars having a respective first end that includes a corresponding custom-shaped feature and a respective second end at the etched depth. For example, multiple custom patterns may be applied to the photoresist layer 112 of FIG. IB to form an array of structures, such as a microneedle array. In some implementations, the customshaped features for each of the plurality of substrate pillars may include the same or a substantially similar shape. For example, each microneedle of a microneedle array may have a tip having a shape shown in one of FIGS. 2E, 3E, 4E, 5E, 6E, 7F, 8D, or 9E. Alternatively, the custom-shaped features for some of the plurality of substrate pillars may vary in shape and/or size from one another. For example, a first portion of substrate pillars of a microneedle array may have a cone- shaped tip and a second portion of substate pillars of the microneedle array may have a polygonalshaped tip if two different custom-shaped features are applied to various locations of the photoresist layer.

[0104] In some implementations, the custom pattern may include an annular cutout pattern, and the custom-shaped feature may include a cone that extends from the substrate. For example, the annular cutout pattern may include or correspond to the annular cutout pattern associated with the custom pattern portion 204 of FIG. 2A, and the cone may include or correspond to the cone-shaped feature 212 of FIGS. 2B-E. In some implementations, the height of the cone and a taper associated with the cone may be based on one or more dimensions of an interior of the annular cutout pattern, and a diameter of a base of the cone may be based on a diameter of the annular cutout pattern. In some such implementations, the height of the cone is between 20 and 40 pm, a diameter of a tip of the cone is less than 200 nm, and the diameter of the base is between 700 and 1200 nm.

[0105] In some implementations, the custom pattern may include an annular cutout pattern surrounding a central opening cutout, and the custom-shaped feature may include a cone- shaped cavity within a portion of the substrate. For example, the annular cutout pattern and the central opening cutout may include or correspond to custom pattern portions 304 A and 304B of FIG. 3 A, and the cone-shaped cavity may include or correspond to the inverted cone-shaped cavity 312 of FIGS. 3B-E. In some implementations, a diameter of an opening of the cone-shaped cavity is based on a diameter of the central opening cutout. In some implementations, the method 1100 may include, prior to performing the etching process, depositing a first hard mask cover on the annular cutout pattern and depositing a second hard mask cover on the central opening cutout. The second hard mask cover and the first hard mask cover act as masks during the etching process to form the cone-shaped cavity. In some implementations, the method 1100 may include, prior to performing the etching process, depositing a hard mask cover on the annular cutout pattern via a CVD process, depositing a second photoresist layer on the hard mask cover, applying the custom pattern to the second photoresist layer, and performing one or more additional lithography operations on the second photoresist layer. The one or more additional lithography operations may remove a portion of the second photoresist layer beneath the custom pattern and form a customshaped hard mask feature from the hard mask cover, and the custom-shaped hard mask feature may act as an additional mask during the etching process to form the cone-shaped cavity. For example, hard mask cover may include or correspond to the hard mask cover 322 of FIG. 3C.

[0106] In some implementations, the custom pattern may include a circular cutout pattern, and the custom-shaped feature may include a cavity within a portion of the substrate. The cavity has a substantially flat base. For example, the circular cutout may include or correspond to the custom pattern portion 404 of FIG. 4 A, and the cavity may include or correspond to the cavity 412 of FIGS. 4B-E. In some implementations, a diameter of the cavity is based on a diameter of the circular cutout pattern.

[0107] In some implementations, the custom pattern may include a polygonal cutout pattern, and the custom-shaped feature may include a polygonal cavity within a portion of the substrate. For example, the custom pattern may include or correspond to the custom pattern that corresponds to the custom pattern portion 504 of FIG. 5 A, and the polygonal cavity may include or correspond to the polygonal cavity 512 of FIGS. 5B-E. In some such implementations, the polygonal cutout pattern includes a keyhole-shaped cutout pattern, and the polygonal cavity includes a keyhole-shaped cavity, as shown in FIGS. 5A-B. Additionally or alternatively, a dimension of the polygonal cavity may be based on a corresponding dimension of the polygonal cutout pattern. Additionally or alternatively, the polygonal cavity may extend to an edge of the substrate pillar at a point along a circumference of the substrate pillar, and an opening of the substrate pillar may be defined at the point for a height of the polygonal cavity, as shown in FIG. 5D. In some such implementations, the etching process may include a plurality of etching operations, such that a first set of etching operations of the plurality of etching operations form the polygonal cavity, and a second set of etching operations of the plurality of etching operations form the opening. Additionally or alternatively, the method 1100 may include, prior to performing the etching process, depositing a hard mask cover having a circular shape on the polygonal cutout pattern, such that a center of the hard mask cover is offset from a center of the polygonal cutout pattern, and such that the hard mask cover acts as an additional mask during the etching process to form the polygonal cavity and the opening. For example, the hard mask cover may include or correspond to the hard mask cover 422 of FIG. 5C.

[0108] In some implementations, the method 1100 may include, after forming the custom-shaped feature and the substrate pillar, performing an oxidative process on the custom shaped feature or a portion of the substrate pillar that includes the custom-shaped feature. The oxidative process forms one or more pores within an exterior of the custom-shaped feature or the portion of the substrate pillar that includes the custom-shaped feature. For example, the one or more pores may include or correspond to pores 622 of FIGS. 6C-E. In some such implementations, the oxidative process includes a chemical oxidative process, and a morphology of the one or more pores is based on a concentration of a chemical agent used during the chemical oxidative process. Alternatively, the oxidative process may include an electro-oxidative process, and a morphology of the one or more pores may be based on a current applied during the electro-oxidative process.

[0109] In some implementations, the custom pattern includes a circular pattern, and the custom-shaped feature includes a pad that extends from the substrate. For example, the pad may include or correspond to the metal-coated feature 806 of FIGS. 8A-D. In some implementations, a diameter of the pad is based on a diameter of the circular pattern.

[0110] In some implementations, the method 1100 also includes, prior to performing the etching process, depositing a metal material on the custom-shaped feature, as described with reference to FIGS. 7A-F, 8A-D, and 9A-E. In some such implementations, the custom-shaped feature includes a custom-shaped substrate structure, and the deposition of the metal material forms a metal coating on at least a portion of the custom-shaped substrate structure. For example, the custom-shaped substrate structure may include or correspond to the polygonal-shaped feature 912 of FIGS. 9B-E. Alternatively, the custom-shaped feature may include a custom-shaped cavity, and the deposition of the metal material may form a metal coating on at least a portion of one or more sidewalls of the custom-shaped cavity. In some implementations that include deposition of the metal material, the metal material is deposited via a vapor deposition process, an e-beam process, a sputtering process, or an electrodeposition process. Additionally or alternatively, the method 1100 may further include, prior to performing the etching process, depositing a protective material over the metal material and the custom-shaped feature, such that the protective material encapsulates the metal material during the etching process. For example, the protective material may include or correspond to the hard mask cover 732 of FIG. 7D, the hard mask cover 812 of FIG. 8B, or the hard mask cover 922 of FIG. 9C. Additionally or alternatively, after applying the custom pattern to the photoresist layer, a metal film may be deposited on a remainder of the photoresist layer and the custom pattern, such that a portion of the metal film covers the custom pattern. In this example, performing the one or more lithography operations may include performing a metallization liftoff process to remove the remainder of the photoresist layer and a remainder of the metal film that is disposed on the remainder of the photoresist layer.

[0111] Referring to FIG. 12, an example of a computing device that is operable to support fabrication of microneedles or tools having high aspect ratios according to one or more aspects of the present disclosure is shown as a computing environment 1200 that includes a computing device 1210. The computing device 1210 may be operable to initiate or control fabrication of one or more microneedles or other tools, including the stages of any of the processes described with reference to FIGS. 1 A-F, 2A-E, 3 A-E, 4A-E, 5A-E, 6A-E, 7A-F, 8A-D, and 9A-E.

[0112] The computing device 1210 includes at least one processor 1220 and system memory 1230. Depending on the configuration and type of computing device, the system memory 1230 may be volatile (such as random access memory or “RAM”), non-volatile (such as read-only memory or “ROM,” flash memory, and similar memory devices that maintain stored data even when power is not provided) or some combination of the two. The system memory 1230 typically includes instructions 1232 and one or more applications. The at least one processor 1220 may be operable to execute the instructions 1232 to perform one or more operations described herein, including operations of the method 1000 of FIG. 10 or the method 1100 of FIG. 11. Alternatively, the instructions 1232, the applications, or both, may be located at multiple computing devices, where the multiple computing devices are part of a distributed computing system. In this case, one or more of the multiple computing devices of the distributed system may comprise the representative computing device 1210.

[0113] The computing device 1210 may also have additional features or functionality. For example, the computing device 1210 may also include removable and/or non-removable data storage devices such as magnetic disks, optical disks, tape, and standard-sized or miniature flash memory cards. Such additional storage is illustrated in FIG. 12 by storage 1240. Computer storage media may include volatile and/or non-volatile storage and removable and/or non-removable media implemented in any method or technology for storage of information such as computer- readable instructions, data structures, program components or other data. The system memory 1230 and the storage 1240 are examples of computer storage media. The computer storage media includes, but is not limited to, RAM, ROM, electrically erasable programmable read-only memory (EEPROM), flash memory or other memory technology, compact disks (CD), digital versatile disks (DVD) or other optical storage, magnetic cassettes, magnetic tape, magnetic disk storage or other magnetic storage devices, or any other medium that can be used to store information and that can be accessed by computing device 1210. Any such computer storage media may be part of the computing device 1210. The computing device 1210 may also have input/output (I/O) device(s) 1250, which may include input devices, such as a keyboard, mouse, pen, voice input device, touch input device, etc., output device(s), such as a display, speakers, a printer, etc., or a combination thereof.

[0114] The computing device 1210 also contains one or more communication interface(s) 1260 that allow the computing device 1210 to communicate with a fabrication system 1280 via a wired or a wireless network 1270. The fabrication system 1280 may include one or more semiconductor fabrication tools, one or more computing devices, other tools or devices, or a combination thereof. In an illustrative embodiment, the fabrication system 1280 may initiate or facilitate any of the stages of the processes described with reference to FIGS. 1 A-F, 2A-E, 3A-E, 4A-E, 5A-E, 6A-E, 7A-F, 8A-D, or 9A-E.

[0115] The communication interface(s) 1260 are an example of communication media. By way of example, and not limitation, communication media may include wired media such as a wired network or direct-wired connection, and wireless media, such as acoustic, radio frequency (RF), infrared and other wireless media. It will be appreciated, however, that not all of the components or devices illustrated in FIG. 12 or otherwise described in the previous paragraphs are necessary to support embodiments as herein described. For example, the VO device(s) 1250 may be optional.

[0116] FIGS. 13A-13D depict an exemplary implementation of a plurality of microneedles as a microneedle array 1300 formed from a substrate, according to one or more aspects of the present disclosure. For illustrative purposes, a particular microneedle 1302 is depicted in FIGS. 13A-13D. FIG. 13A depicts a microneedle array 1300, and FIGS. 13B-13D show increasingly closer detail of a particular microneedle 1302 of the microneedle array 1300. In FIG. 13C, a tip 1304 of the microneedle 1302 extends from a point Pal to a point PaRl . In this example, the tip may have a length along the distance between point Pal and point PaRl of 12.25 pm. In FIG. 13D, the tip 1304 may have a first diameter at one end of the tip 1304 (measured from point Pa2 to point PaR2) and a second diameter at the other end of tip 1304 (measured from point Pa3 to point PaR3). In the example illustrated in FIG. 13C, the first diameter is 391.3 nm and the second diameter is 1.631 pm. These diameters highlight the kind of tapering that can be achieved for microneedles and microneedle tips fabricated using processes such as those described above. This tapering may result in microneedles having high aspect ratios, as illustrated by this example in which the aspect ratio is the ratio of the second diameter to the first diameter.

[0117] It is noted that other types of devices and functionality may be provided according to aspects of the present disclosure and discussion of specific devices and functionality herein have been provided for purposes of illustration, rather than by way of limitation. It is noted that the operations of the method 1000 of FIG. 10 and the method 1100 of FIG. 11 may be performed in any order. Additionally or alternatively, one or more operations described with reference to the method 1000 of FIG. 10 or the method 1100 of FIG. 11 may be performed during performance of another of the method 1100 of FIG. 11 or the method 1000 of FIG. 10. It is also noted that the method 1000 of FIG. 10 or the method 1100 of FIG. 11 may also include other functionality or operations consistent with the description of the operations of the stages 100, 110, 120, 130, and 140 of FIGS. 1 A-F, the stages 200, 210, 220, 230, and 240 of FIGS. 2A-E, the stages 300, 310, 320, 330, and 340 of FIGS. 3A-E, the stages 400, 410, 420, 430, and 440 of FIGS. 4A- E, the stages 500, 510, 520, 530, and 540 of FIGS. 5A-E, the stages 600, 610, 620, 630, and side view 640 of FIGS. 6A-E, the stages 700, 710, 720, 730, 740, and 750 of FIGS. 7A-E, the stages 800, 810, 820, and 830 of FIGS. 8A-E, or the stages 900, 910, 920, 930, and 940 of FIGS. 9A-E.

[0118] Those of skill in the art would understand that information and signals may be represented using any of a variety of different technologies and techniques. For example, data, instructions, commands, information, signals, bits, symbols, and chips that may be referenced throughout the above description may be represented by voltages, currents, electromagnetic waves, magnetic fields or particles, optical fields or particles, or any combination thereof.

[0119] Components, the functional blocks, and the modules described herein with respect to FIGS. 1-13D) include processors, electronics devices, hardware devices, electronics components, logical circuits, memories, software codes, firmware codes, among other examples, or any combination thereof. In addition, features discussed herein may be implemented via specialized processor circuitry, via executable instructions, or combinations thereof. [0120] Those of skill would further appreciate that the various illustrative logical blocks, modules, circuits, and algorithm steps described in connection with the disclosure herein may be implemented as electronic hardware, computer software, or combinations of both. To clearly illustrate this interchangeability of hardware and software, various illustrative components, blocks, modules, circuits, and steps have been described above generally in terms of their functionality. Whether such functionality is implemented as hardware or software depends upon the particular application and design constraints imposed on the overall system. Skilled artisans may implement the described functionality in varying ways for each particular application, but such implementation decisions should not be interpreted as causing a departure from the scope of the present disclosure. Skilled artisans will also readily recognize that the order or combination of components, methods, or interactions that are described herein are merely examples and that the components, methods, or interactions of the various aspects of the present disclosure may be combined or performed in ways other than those illustrated and described herein.

[0121] The various illustrative logics, logical blocks, modules, circuits, and algorithm processes described in connection with the implementations disclosed herein may be implemented as electronic hardware, computer software, or combinations of both. The interchangeability of hardware and software has been described generally, in terms of functionality, and illustrated in the various illustrative components, blocks, modules, circuits and processes described above. Whether such functionality is implemented in hardware or software depends upon the particular application and design constraints imposed on the overall system.

[0122] The hardware and data processing apparatus used to implement the various illustrative logics, logical blocks, modules, and circuits described in connection with the aspects disclosed herein may be implemented or performed with a general purpose single- or multi-chip processor, a digital signal processor (DSP), an application specific integrated circuit (ASIC), a field programmable gate array (FPGA) or other programmable logic device, discrete gate or transistor logic, discrete hardware components, or any combination thereof designed to perform the functions described herein. A general purpose processor may be a microprocessor, or any conventional processor, controller, microcontroller, or state machine. In some implementations, a processor may also be implemented as a combination of computing devices, such as a combination of a DSP and a microprocessor, a plurality of microprocessors, one or more microprocessors in conjunction with a DSP core, or any other such configuration. In some implementations, particular processes and methods may be performed by circuitry that is specific to a given function.

[0123] In one or more aspects, the functions described may be implemented in hardware, digital electronic circuitry, computer software, firmware, including the structures disclosed in this specification and their structural equivalents thereof, or any combination thereof. Implementations of the subject matter described in this specification also may be implemented as one or more computer programs, that is one or more modules of computer program instructions, encoded on a computer storage media for execution by, or to control the operation of, data processing apparatus.

[0124] If implemented in software, the functions may be stored on or transmitted over as one or more instructions or code on a computer-readable medium. The processes of a method or algorithm disclosed herein may be implemented in a processor-executable software module which may reside on a computer-readable medium. Computer-readable media includes both computer storage media and communication media including any medium that may be enabled to transfer a computer program from one place to another. A storage media may be any available media that may be accessed by a computer. By way of example, and not limitation, such computer- readable media can include random-access memory (RAM), read-only memory (ROM), electrically erasable programmable read-only memory (EEPROM), CD-ROM or other optical disk storage, magnetic disk storage or other magnetic storage devices, or any other medium that may be used to store desired program code in the form of instructions or data structures and that may be accessed by a computer. Also, any connection may be properly termed a computer-readable medium. Disk and disc, as used herein, includes compact disc (CD), laser disc, optical disc, digital versatile disc (DVD), floppy disk, hard disk, solid state disk, and Blu-ray disc where disks usually reproduce data magnetically, while discs reproduce data optically with lasers. Combinations of the above should also be included within the scope of computer-readable media. Additionally, the operations of a method or algorithm may reside as one or any combination or set of codes and instructions on a machine readable medium and computer-readable medium, which may be incorporated into a computer program product.

[0125] Various modifications to the implementations described in this disclosure may be readily apparent to those skilled in the art, and the generic principles defined herein may be applied to some other implementations without departing from the spirit or scope of this disclosure. Thus, the claims are not intended to be limited to the implementations shown herein, but are to be accorded the widest scope consistent with this disclosure, the principles and the novel features disclosed herein.

[0126] Additionally, a person having ordinary skill in the art will readily appreciate, the terms “upper” and “lower” are sometimes used for ease of describing the figures, and indicate relative positions corresponding to the orientation of the figure on a properly oriented page, and may not reflect the proper orientation of any device as implemented.

[0127] Certain features that are described in this specification in the context of separate implementations also may be implemented in combination in a single implementation. Conversely, various features that are described in the context of a single implementation also may be implemented in multiple implementations separately or in any suitable subcombination. Moreover, although features may be described above as acting in certain combinations and even initially claimed as such, one or more features from a claimed combination may in some cases be excised from the combination, and the claimed combination may be directed to a subcombination or variation of a subcombination.

[0128] Similarly, while operations are depicted in the drawings in a particular order, this should not be understood as requiring that such operations be performed in the particular order shown or in sequential order, or that all illustrated operations be performed, to achieve desirable results. Further, the drawings may schematically depict one more example processes in the form of a flow diagram. However, other operations that are not depicted may be incorporated in the example processes that are schematically illustrated. For example, one or more additional operations may be performed before, after, simultaneously, or between any of the illustrated operations. In certain circumstances, multitasking and parallel processing may be advantageous. Moreover, the separation of various system components in the implementations described above should not be understood as requiring such separation in all implementations, and it should be understood that the described program components and systems may generally be integrated together in a single software product or packaged into multiple software products. Additionally, some other implementations are within the scope of the following claims. In some cases, the actions recited in the claims may be performed in a different order and still achieve desirable results.

[0129] As used herein, including in the claims, various terminology is for the purpose of describing particular implementations only and is not intended to be limiting of implementations. For example, as used herein, an ordinal term (e.g., “first,” “second,” “third,” etc.) used to modify an element, such as a structure, a component, an operation, etc., does not by itself indicate any priority or order of the element with respect to another element, but rather merely distinguishes the element from another element having a same name (but for use of the ordinal term). The term “coupled” is defined as connected, although not necessarily directly, and not necessarily mechanically; two items that are “coupled” may be unitary with each other, the term “or,” when used in a list of two or more items, means that any one of the listed items may be employed by itself, or any combination of two or more of the listed items may be employed. For example, if a composition is described as containing components A, B, or C, the composition may contain A alone; B alone; C alone; A and B in combination; A and C in combination; B and C in combination; or A, B, and C in combination. Also, as used herein, including in the claims, “or” as used in a list of items prefaced by “at least one of’ indicates a disjunctive list such that, for example, a list of “at least one of A, B, or C” means A or B or C or AB or AC or BC or ABC (that is A and B and C) or any of these in any combination thereof. The term “substantially” is defined as largely but not necessarily wholly what is specified - and includes what is specified; e.g., substantially 90 degrees includes 90 degrees and substantially parallel includes parallel - as understood by a person of ordinary skill in the art. In any disclosed aspect, the term “substantially” may be substituted with “within [a percentage] of’ what is specified, where the percentage includes 0.1, 1, 5, and 10 percent; and the term “approximately” may be substituted with “within 10 percent of’ what is specified. The phrase “and/or” means and or.

[0130] Although the aspects of the present disclosure and their advantages have been described in detail, it should be understood that various changes, substitutions and alterations can be made herein without departing from the spirit of the disclosure as defined by the appended claims. Moreover, the scope of the present application is not intended to be limited to the particular implementations of the process, machine, manufacture, composition of matter, means, methods and processes described in the specification. As one of ordinary skill in the art will readily appreciate from the present disclosure, processes, machines, manufacture, compositions of matter, means, methods, or operations, presently existing or later to be developed that perform substantially the same function or achieve substantially the same result as the corresponding aspects described herein may be utilized according to the present disclosure. Accordingly, the appended claims are intended to include within their scope such processes, machines, manufacture, compositions of matter, means, methods, or operations.

Claims

CLAIMS What is claimed is:

1. A method of fabricating microneedles or tools having high aspect ratios, the method comprising: depositing a photoresist layer on a substrate; applying a custom pattern to the photoresist layer; performing one or more lithography operations on the photoresist layer, wherein the one or more lithography operations remove a portion of the photoresist layer beneath the custom pattern and form a custom-shaped feature from the substrate, the custom-shaped feature having a shape that corresponds to the custom pattern; and performing an etching process on the substrate, wherein the custom-shaped feature acts as a mask during the etching process, wherein the etching process forms a substrate pillar having a first end that includes the custom-shaped feature and a second end at an etched depth of the substrate, and wherein a dimension of the substrate pillar at the second end is larger than the dimension of the substrate pillar at the first end.

2. The method of claim 1, wherein a microneedle structure comprises the customshaped feature and the substrate pillar.

3. The method of any of claims 1 or 2, further comprising: depositing a hard mask cover over the custom-shaped feature on the substrate.

4. The method of claim 3, further comprising: after performing the etching process, performing a hard mask etching process, wherein the hard mask etching process removes the hard mask cover from the custom-shaped feature.

5. The method of any of claims 1-4, further comprising: prior to depositing the photoresist layer, depositing a hard mask layer on the substrate, wherein the photoresist layer is deposited on a surface of the hard mask layer; and prior to performing the etching process, performing a hard mask etching process, wherein the hard mask etching processes removes a portion of the hard mask layer that is exposed by removal of the portion of the photoresist layer.

6. The method of any of claims 1-5, further comprising: performing one or more oxidative thinning processes to further taper the substrate pillar.

7. The method of any of claims 1-6, wherein the custom pattern is applied during application of a plurality of custom patterns at a plurality of locations on the photoresist layer, wherein the one or more lithography operations remove a plurality of portions of the photoresist layer beneath the plurality of customs patterns and form a plurality of custom-shaped features from the substrate, and wherein the etching process forms a plurality of substrate pillars, each of the plurality of substrate pillars having a respective first end that includes a corresponding custom-shaped feature and a respective second end at the etched depth.

8. The method of any of claims 1-7, wherein the etched depth is between 1 and 150 nanometers from a surface of the substrate.

9. The method of any of claims 1-8, wherein the custom pattern comprises an annular cutout pattern, and wherein the custom-shaped feature comprises a cone that extends from the substrate.

10. The method of claim 9, wherein a height of the cone and a taper associated with the cone are based on one or more dimensions of an interior of the annular cutout pattern, and wherein a diameter of a base of the cone is based on a diameter of the annular cutout pattern, the taper of the cone is based on a draft angle associated with the etching process, or a combination thereof.

11. The method of claim 10, wherein the height of the cone is between .1 and 100 micrometers, wherein a diameter of a tip of the cone is less than 1 micrometer, and wherein the diameter of the base is between 1 and 100 micrometers.

12. The method of any of claims 1-8, wherein the custom pattern comprises an annular cutout pattern surrounding a central opening cutout, and wherein the custom-shaped feature comprises a cone-shaped cavity within a portion of the substrate.

13. The method of claim 12, wherein a diameter of an opening of the cone-shaped cavity is based on a diameter of the central opening cutout.

14. The method of any of claims 12 or 13, further comprising, prior to performing the etching process: depositing a first hard mask cover on the annular cutout pattern; and depositing a second hard mask cover on the central opening cutout, wherein the second hard mask cover and the first hard mask cover act as masks during the etching process to form the cone-shaped cavity.

15. The method of any of claims 12-14, further comprising, prior to performing the etching process: depositing a hard mask cover on the annular cutout pattern via a chemical vapor deposition (CVD) process; depositing a second photoresist layer on the hard mask cover; applying the custom pattern to the second photoresist layer; and performing one or more additional lithography operations on the second photoresist layer, wherein the one or more additional lithography operations remove a portion of the second photoresist layer beneath the custom pattern and form a custom-shaped hard mask feature from the hard mask cover, and wherein the custom-shaped hard mask feature acts as an additional mask during the etching process to form the cone-shaped cavity.

16. The method of any of claims 1-8, wherein the custom pattern comprises a circular cutout pattern, and wherein the custom-shaped feature comprises a cavity within a portion of the substrate, the cavity having a substantially flat base.

17. The method of claim 16, wherein a diameter of the cavity is based on a diameter of the circular cutout pattern.

18. The method of any of claims 1-8, wherein the custom pattern comprises a polygonal cutout pattern, and wherein the custom-shaped feature comprises a polygonal cavity within a portion of the substrate.

19. The method of claim 18, wherein the polygonal cutout pattern comprises a keyhole-shaped cutout pattern, and wherein the polygonal cavity comprises a keyhole-shaped cavity.

20. The method of any of claims 18 or 19, wherein a dimension of the polygonal cavity is based on a corresponding dimension of the polygonal cutout pattern.

21. The method of any of claims 18-20, wherein the polygonal cavity extends to an edge of the substrate pillar at a point along a circumference of the substrate pillar, and wherein an opening of the substrate pillar is defined at the point for a height of the polygonal cavity.

22. The method of claim 21, wherein the etching process includes a plurality of etching operations, wherein a first set of etching operations of the plurality of etching operations form the polygonal cavity, and wherein a second set of etching operations of the plurality of etching operations form the opening.

23. The method of claim 22, further comprising: prior to performing the etching process, depositing a hard mask cover having a circular shape on the polygonal cutout pattern, wherein a center of the hard mask cover is offset from a center of the polygonal cutout pattern, and wherein the hard mask cover acts as an additional mask during the etching process to form the polygonal cavity and the opening.

24. The method of any of claims 1-23, further comprising: after forming the custom-shaped feature and the substrate pillar, performing an oxidative process on the custom-shaped feature or a portion of the substrate pillar that includes the customshaped feature, wherein the oxidative process forms one or more pores within an exterior of the custom-shaped feature or the portion of the substrate pillar that includes the custom-shaped feature.

25. The method of claim 24, wherein the oxidative process comprises a chemical oxidative process, and wherein a morphology of the one or more pores is based on a concentration of a chemical agent used during the chemical oxidative process.

26. The method of any of claims 24 or 25, wherein the oxidative process comprises an electro-oxidative process, and wherein a morphology of the one or more pores is based on a current applied during the electro-oxidative process.

27. The method of any of claims 1-8, wherein the custom pattern comprises a circular pattern, and wherein the custom-shaped feature comprises a pad that extends from the substrate.

28. The method of claim 27, wherein a diameter of the pad is based on a diameter of the circular pattern.

29. The method of any of claims 1-28, further comprising: prior to performing the etching process, depositing a metal material on the custom-shaped feature.

30. The method of claim 29, wherein the custom-shaped feature comprises a customshaped substrate structure, and wherein deposition of the metal material forms a metal coating on at least a portion of the custom-shaped substrate structure.

31. The method of claim 29, wherein the custom-shaped feature comprises a customshaped cavity, and wherein deposition of the metal material forms a metal coating on at least a portion of one or more sidewalls of the custom-shaped cavity.

32. The method of any of claims 29-31, wherein the metal material is deposited via a vapor deposition process, an e-beam process, a sputtering process, or an electrodeposition process.

33. The method of any of claims 29-32, further comprising: prior to performing the etching process, depositing a protective material over the metal material and the custom-shaped feature, wherein the protective material encapsulates the metal material during the etching process.

34. The method of any of claims 1-28, further comprising: after applying the custom pattern to the photoresist layer, depositing a metal film on a remainder of the photoresist layer and the custom pattern, wherein a portion of the metal film covers the custom pattern, and wherein performing the one or more lithography operations includes performing a metallization liftoff process to remove the remainder of the photoresist layer and a remainder of the metal film that is disposed on the remainder of the photoresist layer.

35. A non-transitory computer-readable storage device storing instructions that, when executed by one or more processors, cause the one or more processors to perform operations for fabricating microneedles or tools having high aspect ratios, the operations comprising: initiating deposition of a photoresist layer on a substrate; initiating application of a custom pattern to the photoresist layer; initiating performance of one or more lithography operations on the photoresist layer, wherein the one or more lithography operations remove a portion of the photoresist layer beneath the custom pattern and form a custom-shaped feature from the substrate, the custom-shaped feature having a shape that corresponds to the custom pattern; and initiating performance of an etching process on the substrate, wherein the custom-shaped feature acts as a mask during the etching process, wherein the etching process forms a substrate pillar having a first end that includes the custom-shaped feature and a second end at an etched depth of the substrate, and wherein a dimension of the substrate pillar at the second end is larger than the dimension of the substrate pillar at the first end.

36. The non-transitory computer-readable storage device of claim 35, wherein a microneedle structure comprises the custom-shaped feature and the substrate pillar.

37. The non-transitory computer-readable storage device of any of claims 35 or 36, wherein the operations further comprise: depositing a hard mask cover over the custom-shaped feature on the substrate.

38. The non-transitory computer-readable storage device of claim 37, wherein the operations further comprise: after performing the etching process, performing a hard mask etching process, wherein the hard mask etching process removes the hard mask cover from the custom-shaped feature.

39. The non-transitory computer-readable storage device of any of claims 35-38, wherein the operations further comprise: prior to depositing the photoresist layer, depositing a hard mask layer on the substrate, wherein the photoresist layer is deposited on a surface of the hard mask layer; and prior to performing the etching process, performing a hard mask etching process, wherein the hard mask etching processes removes a portion of the hard mask layer that is exposed by removal of the portion of the photoresist layer.

40. The non-transitory computer-readable storage device of any of claims 35-39, wherein the operations further comprise: performing one or more oxidative thinning processes to further taper the substrate pillar.

41. The non-transitory computer-readable storage device of any of claims 35-40, wherein the custom pattern is applied during application of a plurality of custom patterns at a plurality of locations on the photoresist layer, wherein the one or more lithography operations remove a plurality of portions of the photoresist layer beneath the plurality of customs patterns and form a plurality of custom-shaped features from the substrate, and wherein the etching process forms a plurality of substrate pillars, each of the plurality of substrate pillars having a respective first end that includes a corresponding custom-shaped feature and a respective second end at the etched depth.

42. The non-transitory computer-readable storage device of any of claims 35-41, wherein the etched depth is between 1 and 150 nanometers from a surface of the substrate.

43. The non-transitory computer-readable storage device of any of claims 35-42, wherein the custom pattern comprises an annular cutout pattern, and wherein the custom-shaped feature comprises a cone that extends from the substrate.

44. The non-transitory computer-readable storage device of claim 43, wherein a height of the cone and a taper associated with the cone are based on one or more dimensions of an interior of the annular cutout pattern, and wherein a diameter of a base of the cone is based on a diameter of the annular cutout pattern, the taper of the cone is based on a draft angle associated with the etching process, or a combination thereof.

45. The non-transitory computer-readable storage device of claim 44, wherein the height of the cone is between .1 and 100 micrometers, wherein a diameter of a tip of the cone is less than 1 micrometer, and wherein the diameter of the base is between 1 and 100 micrometers.

46. The non-transitory computer-readable storage device of any of claims 35-42, wherein the custom pattern comprises an annular cutout pattern surrounding a central opening cutout, and wherein the custom-shaped feature comprises a cone-shaped cavity within a portion of the substrate.

47. The non-transitory computer-readable storage device of claim 46, wherein a diameter of an opening of the cone-shaped cavity is based on a diameter of the central opening cutout.

48. The non-transitory computer-readable storage device of any of claims 46 or 47, wherein the operations further comprise, prior to performing the etching process: depositing a first hard mask cover on the annular cutout pattern; and depositing a second hard mask cover on the central opening cutout, wherein the second hard mask cover and the first hard mask cover act as masks during the etching process to form the cone-shaped cavity.

49. The non-transitory computer-readable storage device of any of claims 46-48, wherein the operations further comprise, prior to performing the etching process: depositing a hard mask cover on the annular cutout pattern via a chemical vapor deposition (CVD) process; depositing a second photoresist layer on the hard mask cover; applying the custom pattern to the second photoresist layer; and performing one or more additional lithography operations on the second photoresist layer, wherein the one or more additional lithography operations remove a portion of the second photoresist layer beneath the custom pattern and form a custom-shaped hard mask feature from the hard mask cover, and wherein the custom-shaped hard mask feature acts as an additional mask during the etching process to form the cone-shaped cavity.

50. The non-transitory computer-readable storage device of any of claims 35-42, wherein the custom pattern comprises a circular cutout pattern, and wherein the custom-shaped feature comprises a cavity within a portion of the substrate, the cavity having a substantially flat base.

51. The non-transitory computer-readable storage device of claim 50, wherein a diameter of the cavity is based on a diameter of the circular cutout pattern.

52. The non-transitory computer-readable storage device of any of claims 35-42, wherein the custom pattern comprises a polygonal cutout pattern, and wherein the customshaped feature comprises a polygonal cavity within a portion of the substrate.

53. The non-transitory computer-readable storage device of claim 52, wherein the polygonal cutout pattern comprises a keyhole-shaped cutout pattern, and wherein the polygonal cavity comprises a keyhole-shaped cavity.

54. The non-transitory computer-readable storage device of any of claims 52 or 53, wherein a dimension of the polygonal cavity is based on a corresponding dimension of the polygonal cutout pattern.

55. The non-transitory computer-readable storage device of any of claims 52-54, wherein the polygonal cavity extends to an edge of the substrate pillar at a point along a circumference of the substrate pillar, and wherein an opening of the substrate pillar is defined at the point for a height of the polygonal cavity.

56. The non-transitory computer-readable storage device of claim 55, wherein the etching process includes a plurality of etching operations, wherein a first set of etching operations of the plurality of etching operations form the polygonal cavity, and wherein a second set of etching operations of the plurality of etching operations form the opening.

57. The non-transitory computer-readable storage device of claim 56, wherein the operations further comprise: prior to performing the etching process, depositing a hard mask cover having a circular shape on the polygonal cutout pattern, wherein a center of the hard mask cover is offset from a center of the polygonal cutout pattern, and wherein the hard mask cover acts as an additional mask during the etching process to form the polygonal cavity and the opening.

58. The non-transitory computer-readable storage device of any of claims 35-57, wherein the operations further comprise: after forming the custom-shaped feature and the substrate pillar, performing an oxidative process on the custom-shaped feature or a portion of the substrate pillar that includes the customshaped feature, wherein the oxidative process forms one or more pores within an exterior of the custom-shaped feature or the portion of the substrate pillar that includes the custom-shaped feature.

59. The non-transitory computer-readable storage device of claim 58, wherein the oxidative process comprises a chemical oxidative process, and wherein a morphology of the one or more pores is based on a concentration of a chemical agent used during the chemical oxidative process.

60. The non-transitory computer-readable storage device of any of claims 58 or 59, wherein the oxidative process comprises an electro-oxidative process, and wherein a morphology of the one or more pores is based on a current applied during the electro-oxidative process.

61. The non-transitory computer-readable storage device of any of claims 35-42, wherein the custom pattern comprises a circular pattern, and wherein the custom-shaped feature comprises a pad that extends from the substrate.

62. The non-transitory computer-readable storage device of claim 61, wherein a diameter of the pad is based on a diameter of the circular pattern.

63. The non-transitory computer-readable storage device of any of claims 35-62, wherein the operations further comprise: prior to performing the etching process, depositing a metal material on the custom-shaped feature.

64. The non-transitory computer-readable storage device of claim 63, wherein the custom-shaped feature comprises a custom-shaped substrate structure, and wherein deposition of the metal material forms a metal coating on at least a portion of the custom-shaped substrate structure.

65. The non-transitory computer-readable storage device of claim 63, wherein the custom-shaped feature comprises a custom-shaped cavity, and wherein deposition of the metal material forms a metal coating on at least a portion of one or more sidewalls of the customshaped cavity.

66. The non-transitory computer-readable storage device of any of claims 63-65, wherein the metal material is deposited via a vapor deposition process, an e-beam process, a sputtering process, or an electrodeposition process.

67. The non-transitory computer-readable storage device of any of claims 63-66, wherein the operations further comprise: prior to performing the etching process, depositing a protective material over the metal material and the custom-shaped feature, wherein the protective material encapsulates the metal material during the etching process.

68. The non-transitory computer-readable storage device of any of claims 35-62, wherein the operations further comprise: after applying the custom pattern to the photoresist layer, depositing a metal film on a remainder of the photoresist layer and the custom pattern, wherein a portion of the metal film covers the custom pattern, and wherein performing the one or more lithography operations includes performing a metallization liftoff process to remove the remainder of the photoresist layer and a remainder of the metal film that is disposed on the remainder of the photoresist layer.