WO2023206091A1 - 液晶光栅、其驱动方法及3d显示装置 - Google Patents

液晶光栅、其驱动方法及3d显示装置 Download PDF

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Publication number
WO2023206091A1
WO2023206091A1 PCT/CN2022/089370 CN2022089370W WO2023206091A1 WO 2023206091 A1 WO2023206091 A1 WO 2023206091A1 CN 2022089370 W CN2022089370 W CN 2022089370W WO 2023206091 A1 WO2023206091 A1 WO 2023206091A1
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Prior art keywords
liquid crystal
strip
electrically connected
electrode
layer
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PCT/CN2022/089370
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English (en)
French (fr)
Inventor
张永刚
张伟
李超
王喜鹏
高吉磊
周鑫
许本志
刘颀
张良维
张星
Original Assignee
京东方科技集团股份有限公司
合肥京东方显示技术有限公司
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Application filed by 京东方科技集团股份有限公司, 合肥京东方显示技术有限公司 filed Critical 京东方科技集团股份有限公司
Priority to CN202280000901.3A priority Critical patent/CN117296005A/zh
Priority to PCT/CN2022/089370 priority patent/WO2023206091A1/zh
Publication of WO2023206091A1 publication Critical patent/WO2023206091A1/zh

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    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G02F1/1335—Structural association of cells with optical devices, e.g. polarisers or reflectors
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G02F1/1343—Electrodes

Definitions

  • the present disclosure relates to the field of 3D display technology, and in particular, to a liquid crystal grating, its driving method and a 3D display device.
  • the working principle of three-dimensional (3D) display technology is: for the same scene, the viewer's left eye and right eye receive images respectively, and the distance between the viewer's two eyes in the horizontal direction (ie, the interpupillary distance, is about 65mm), so that There is a subtle difference in the viewing angles of the two eyes. Due to this difference, the images observed by the left eye and right eye of the viewer will also be slightly different. This difference is called “binocular parallax" and is determined by the visual cortex of the brain. After fusion, a three-dimensional effect is formed.
  • naked-eye 3D display is very popular among people.
  • Naked-eye 3D technology refers to directly allowing the left and right eyes to see pictures with parallax from the display screen without using any tools. The two pictures are emitted to the brain, resulting in Display technology with three-dimensional images.
  • Embodiments of the present disclosure provide a liquid crystal grating, its driving method and a 3D display device.
  • the specific solutions are as follows:
  • the second substrate being arranged opposite to the first substrate
  • a liquid crystal layer, the liquid crystal layer is located between the first substrate and the second substrate;
  • a first transparent grating electrode layer is located on the side of the first substrate facing the liquid crystal layer; the first transparent grating electrode layer includes a plurality of spaced apart first electrodes extending along the first direction and arranged along the second direction. Strip electrode; among them,
  • At least part of the first strip electrode is divided into at least two independently arranged first sub-strip electrodes along the first direction.
  • each of the first strip electrodes is divided into at least two independently arranged first strip electrodes along the first direction. sub-strip electrode.
  • the above-mentioned liquid crystal grating provided by the embodiment of the present disclosure further includes: an insulating layer located on the side of the first transparent grating electrode layer facing the liquid crystal layer, and an insulating layer located on the insulating layer. a second transparent grating electrode layer on the side of the liquid crystal layer;
  • the second transparent grating electrode layer includes a plurality of spaced-apart second strip-shaped electrodes extending along the first direction and arranged along the second direction.
  • the second strip-shaped electrodes are located on the first substrate.
  • the orthographic projection covers the orthographic projection of the area between two adjacent first strip electrodes on the first substrate; wherein,
  • At least part of the second strip-shaped electrode is divided into at least two independently arranged second sub-strip-shaped electrodes along the first direction.
  • each of the second strip electrodes is divided into at least two independently arranged second strip electrodes along the first direction. sub-strip electrode.
  • the number of the second sub-strip electrodes included in each second strip-shaped electrode is the same as that of each of the first strip-shaped electrodes.
  • the number of the first sub-strip-shaped electrodes included in the shaped electrodes is the same.
  • the first sub-strip electrodes included in the first strip electrode have the same length along the first direction, so The lengths of the second sub-strip electrodes included in the second strip electrode along the first direction are the same.
  • the liquid crystal grating has a grating area and a peripheral area arranged around the grating area;
  • the grating area includes: a plurality of control lines extending along the first direction and arranged along the second direction, a plurality of signal input lines extending along the second direction and arranged along the first direction, and A plurality of driving transistors located between the first substrate and the first transparent grating electrode layer; the driving transistors correspond to the first sub-strip electrode and the second sub-strip electrode in one-to-one correspondence;
  • the control line is arranged on the same layer as the gate of the driving transistor, and the signal input line is arranged on the same layer as the source and drain of the driving transistor;
  • the gate of the driving transistor is electrically connected to the control line, the source of the driving transistor is electrically connected to the signal input line, and the drain of the driving transistor is connected to the first sub-strip electrode or the first sub-strip electrode.
  • the second sub-strip electrode is electrically connected.
  • control line includes a first control line and a second control line
  • signal input line includes a first signal input line and a second control line
  • driving transistor includes a first driving transistor and a second driving transistor
  • the gate of the first driving transistor is electrically connected to the first control line, the source of the first driving transistor is electrically connected to the first signal input line, and the drain of the first driving transistor is connected to the first signal input line.
  • the first sub-strip electrode is electrically connected;
  • the gate of the second driving transistor is electrically connected to the second control line
  • the source of the second driving transistor is electrically connected to the second signal input line
  • the drain of the second driving transistor is electrically connected to the second control line.
  • the second sub-strip electrode is electrically connected.
  • the gates of each of the first driving transistors electrically connected to the same first strip electrode are connected to the same first control strip.
  • the lines are electrically connected, and one of the first control lines is electrically connected to at least the gate of each of the first driving transistors that is electrically connected to one of the first strip electrodes.
  • the gates of each of the second driving transistors electrically connected to the same second strip electrode are connected to the same second control strip.
  • the lines are electrically connected, and one of the second control lines is electrically connected to at least the gate of each of the second driving transistors that is electrically connected to one of the second strip electrodes.
  • the peripheral area includes a plurality of first signal leads and a plurality of second signal leads, and the same first strip electrode electrode
  • the sources of the connected first driving transistors are electrically connected to the same first signal lead through the corresponding first signal input lines, and the sources of the first drive transistors that are not electrically connected to the first strip electrodes are electrically connected to the same first signal lead through the corresponding first signal input line.
  • the source of the driving transistor is electrically connected to the different first signal lead through the corresponding first signal input line;
  • the sources of each of the second driving transistors electrically connected to the same second strip electrode are electrically connected to the same second signal lead through the corresponding second signal input line, and the sources of the different second drive transistors are electrically connected to the same second signal lead.
  • the source electrode of each second driving transistor electrically connected to the shaped electrode is electrically connected to the different second signal lead through the corresponding second signal input line.
  • the peripheral area includes a plurality of first signal leads and a plurality of second signal leads, and the same first strip electrode
  • the sources of each of the first drive transistors electrically connected to each of the first sub-strip electrodes are electrically connected to different first signal leads through the corresponding first signal input lines, and different first signal leads are electrically connected.
  • the source of each first driving transistor to which the strip electrode is electrically connected is electrically connected to the different first signal lead through the corresponding first signal input line;
  • each second driving transistor electrically connected to each second sub-strip electrode in the same second strip electrode are connected to different strips of second drive transistors through the corresponding second signal input line.
  • the signal leads are electrically connected, and the sources of the second driving transistors that are electrically connected to different second strip electrodes are electrically connected to different second signal leads through the corresponding second signal input lines.
  • the grating area is divided into at least one area, and for each area, each of the first strip electrodes is divided into a plurality of first groups, the number of first strip electrodes in each first group is the same, and the number of first signal leads is the same as the number of first strip electrodes in each first group; each of the first strip electrodes is The two strip electrodes are divided into a plurality of second groups, the number of second strip electrodes in each second group is the same, and the number of the second signal leads is the same as the number of second signal leads in each second group.
  • the number of strip electrodes is the same;
  • the first strip electrodes with the same position are electrically connected to the same first signal lead through the same first signal input line, and the first strip electrodes with different positions are connected through different strips.
  • the first signal input line is electrically connected to different first signal leads;
  • the second strip electrodes with the same position are electrically connected to the same second signal lead through the same second signal input line, and the second strip electrodes with different positions are connected through different strips.
  • the second signal input line is electrically connected to different second signal leads.
  • the above-mentioned liquid crystal grating provided by the embodiment of the present disclosure further includes a flat layer between the driving transistor and the first transparent grating electrode layer, and the first driving transistor includes A first gate electrode, a first active layer, a first source electrode and a first drain electrode are stacked, and the first sub-strip electrode is electrically connected to the first drain electrode through a via hole penetrating the flat layer. ;
  • the second driving transistor includes a stacked second gate electrode, a second active layer, a second source electrode, and a second drain electrode.
  • the second sub-strip electrode passes through the flat layer and the insulating layer.
  • the via hole is electrically connected to the second drain electrode;
  • the first gate electrode and the second gate electrode are arranged in the same layer, the first active layer and the second active layer are arranged in the same layer, the first source electrode and the first drain electrode are arranged in the same layer as the second gate electrode.
  • the second source electrode and the second drain electrode are arranged on the same layer.
  • the first signal lead and the first gate are arranged on the same layer, and the second signal lead and the first gate Extremely homogeneous setting.
  • the above-mentioned liquid crystal grating provided by the embodiment of the present disclosure further includes a gate insulation layer located between the first gate electrode and the first active layer, and the first signal The lead wire is electrically connected to the first signal input line through a via hole penetrating the gate insulating layer, and the second signal lead wire is electrically connected to the second signal input line through a via hole penetrating the gate insulating layer.
  • the above-mentioned liquid crystal grating provided by the embodiment of the present disclosure also includes a common electrode layer located on the side of the second substrate facing the liquid crystal layer, and the common electrode layer is provided on the entire surface. planar structure.
  • an embodiment of the present disclosure also provides a driving method for driving the liquid crystal grating according to any one of the above provided by the embodiment of the present disclosure.
  • the driving method includes:
  • the liquid crystal grating is driven to form alternately arranged light-transmitting areas and dark-state areas.
  • driving the liquid crystal grating to form alternately arranged light-transmitting areas and dark-state areas specifically includes:
  • the driving transistor at the position of the current position information is controlled to be turned off through the corresponding control line to form the light-transmitting area; the driving transistors at the remaining positions are controlled to be turned on and pass through the first The signal lead and the second signal lead load a driving voltage to the corresponding signal input line, and the driving voltage is transmitted to the first strip electrode and the second strip electrode through the turned-on driving transistor to form a dark state area.
  • embodiments of the disclosure also provide a 3D display device, including a display panel, a liquid crystal grating as described in any of the above provided by embodiments of the disclosure, and a human eye tracking module;
  • the eye tracking module is used to obtain the position of the viewer's eyes
  • the liquid crystal grating is controlled to form alternately arranged light-transmitting areas and dark-state areas, so that the viewer's left eye can see through the light-transmitting area of the liquid crystal grating.
  • the left eye image displayed on the display panel is seen by the right eye through the light-transmitting area, and the right eye image displayed on the display panel is seen by the right eye.
  • the display panel is a liquid crystal display panel, and the liquid crystal grating is disposed on the light incident side of the liquid crystal display panel;
  • the display panel is an OLED display panel
  • the liquid crystal grating is disposed on the light-emitting side of the OLED display panel.
  • Figure 1 is a schematic structural diagram of a liquid crystal grating provided by an embodiment of the present disclosure
  • Figure 2 is a schematic plan view of the first transparent grating electrode layer in Figure 1;
  • Figure 3 is another plan view of the first transparent grating electrode layer in Figure 1;
  • Figure 4 is a schematic structural diagram of yet another liquid crystal grating provided by an embodiment of the present disclosure.
  • Figure 5 is a schematic plan view of the second transparent grating electrode layer in Figure 4.
  • Figure 6 is another plan view of the second transparent grating electrode layer in Figure 4.
  • Figure 7 is a schematic structural diagram of yet another liquid crystal grating provided by an embodiment of the present disclosure.
  • Figure 8 is an optical path diagram when the liquid crystal grating provided by the embodiment of the present disclosure is applied to a 3D display device;
  • Figure 9 is a schematic structural diagram of another liquid crystal grating provided by an embodiment of the present disclosure.
  • Figure 10 is a schematic plan view of a liquid crystal grating provided by an embodiment of the present disclosure.
  • Figure 11 is a schematic plan view of another liquid crystal grating provided by an embodiment of the present disclosure.
  • Figure 12 is a partial enlarged schematic diagram of Figure 10;
  • Figure 13 is a schematic diagram of a partial film layer in Figure 9;
  • Figure 14 is a schematic diagram of another partial film layer in Figure 9;
  • Figure 15 shows the working principle of liquid crystal grating in 2D display
  • Figure 16 shows the working principle of liquid crystal grating in 3D display
  • Figure 17 is a schematic flowchart of a method for driving a liquid crystal grating provided by an embodiment of the present disclosure
  • Figure 18 is a schematic flowchart of yet another liquid crystal grating driving method provided by an embodiment of the present disclosure.
  • Figure 19 is a schematic structural diagram of a 3D display device provided by an embodiment of the present disclosure.
  • Embodiments of the present disclosure provide a liquid crystal grating, as shown in Figures 1 to 3.
  • Figure 1 is a schematic cross-sectional view of the liquid crystal grating.
  • Figure 2 is a schematic plan view of the first transparent grating electrode layer in Figure 1.
  • Figure 3 is another plan view of the first transparent grating electrode layer in Figure 1.
  • the liquid crystal grating includes:
  • the second substrate 2 is arranged opposite to the first substrate 1;
  • Liquid crystal layer 3 the liquid crystal layer 3 is located between the first substrate 1 and the second substrate 2;
  • the first transparent grating electrode layer 4 is located on the side of the first substrate 1 facing the liquid crystal layer 3; the first transparent grating electrode layer 4 includes a plurality of first transparent grating electrode layers extending along the first direction X and arranged along the second direction Y.
  • Strip electrode 41 where,
  • At least part of the first strip electrode 41 is divided into at least two independently arranged first sub-strip electrodes 411 along the first direction
  • each first strip electrode 41 is divided into two independently arranged first sub-strip electrodes 411 along the first direction
  • the sub-strip electrode 411 is taken as an example; of course, it is not limited to this.
  • the above-mentioned liquid crystal grating provided by the embodiment of the present disclosure is applied to a 3D display device, part of the first strip electrodes 41 in the first transparent grating electrode layer 4 is loaded with a driving voltage, and part of the first strip electrodes 41 is not loaded.
  • the driving voltage can drive the liquid crystal grating to form alternately arranged light-transmitting areas and dark-state areas, so that the left eye of the viewer can see the left-eye image displayed on the display panel through the light-transmitting area of the liquid crystal grating, and the right eye can see the image displayed on the display panel through the light-transmitting area.
  • the right-eye image displayed by the display panel to achieve naked-eye 3D display.
  • the first strip electrode 41 is divided into at least two independently arranged first sub-strip electrodes 411 along the first direction
  • the resistance of each first strip electrode 41 of the strip electrode 411 can reduce signal attenuation and delay, thereby improving the performance of the liquid crystal grating.
  • the liquid crystal grating provided by the embodiments of the present disclosure is particularly suitable for large-size 3D display devices, such as 3D display screens in cinemas.
  • a large-sized 3D display device requires a large-sized liquid crystal grating.
  • each first strip electrode of the first transparent grating electrode layer has a long length and a large resistance, which easily causes signal attenuation and delay. Therefore, the present disclosure uses a relatively large size liquid crystal grating.
  • Each long first strip electrode is divided into at least two sections of first sub-strip electrodes, which can greatly reduce the resistance of the first strip electrode and improve signal transmission performance.
  • the liquid crystal grating provided by the embodiments of the present disclosure is also suitable for small-sized 3D display devices.
  • FIGS. 1 to 3 of the embodiments of the present disclosure only illustrate part of the first strip electrodes 41 .
  • the number of the first strip electrodes 41 is set according to the size of the liquid crystal grating.
  • each first strip electrode 41 is divided into at least two independently arranged first strip electrodes 41 along the first direction X.
  • a sub-strip electrode 411 In this way, the resistance of each first strip electrode 41 in the entire liquid crystal grating can be reduced, thereby improving the signal transmission performance of each first strip electrode 41 in the entire liquid crystal grating.
  • the state of the liquid crystal molecules in the gap cannot be controlled, so the liquid crystal molecules in the gap are only in one state, and the gap is only in one state. It can be a light-transmitting area or a dark-state area and cannot form a switched light-transmitting area or a dark-state area.
  • Figure 4 is another schematic cross-sectional view of the liquid crystal grating
  • Figure 5 is a schematic plan view of the second transparent grating electrode layer in Figure 4
  • Figure 6 is another schematic plan view of the second transparent grating electrode layer in Figure 4.
  • the liquid crystal grating also includes: an insulating layer 5 located on the side of the first transparent grating electrode layer 4 facing the liquid crystal layer 3, and an insulating layer 5 facing the liquid crystal.
  • the second transparent grating electrode layer 6 on the layer 3 side;
  • the second transparent grating electrode layer 6 includes a plurality of spaced second strip electrodes 61 extending along the first direction X and arranged along the second direction Y.
  • the second strip electrodes 61 cover the orthographic projection phase of the first substrate 1 The orthographic projection of the area between two adjacent first strip electrodes 41 on the first substrate 1;
  • At least part of the second strip electrode 61 is divided into at least two independently arranged second sub-strip electrodes 611 along the first direction X; for example, as shown in FIG. 5 , each second strip electrode 61 is divided along the first direction As an example, each second strip electrode 61 is divided into two independently arranged second sub-strip electrodes 611 along the first direction
  • the sub-strip electrode 611 is taken as an example; of course, it is not limited to this.
  • the second strip electrode 61 is divided into at least two independently arranged second sub-strip electrodes 611 along the first direction
  • the resistance of each second strip electrode 61 of the strip electrode 611 can further reduce signal attenuation and delay on the basis of realizing that each position in the liquid crystal grating can be adjusted to a light-transmitting area or a dark state area, thereby Further improve the performance of liquid crystal grating.
  • each second strip electrode 61 is divided into at least two independently arranged second strip electrodes 61 along the first direction X. Two sub-strip electrodes 611. In this way, the resistance of each second strip electrode 61 in the entire liquid crystal grating can be reduced, thereby improving the signal transmission performance of each second strip electrode 61 in the entire liquid crystal grating.
  • each first sub-strip electrode 411 is equidistantly distributed along the second direction Y
  • each second sub-strip electrode 411 is equidistantly distributed along the second direction Y
  • 611 are distributed equidistantly along the second direction Y.
  • each second strip electrode 61 includes a second sub-strip electrode 611.
  • the number is the same as the number of first sub-strip electrodes 411 included in each first strip electrode 41 .
  • each first sub-strip electrode 411 included in the first strip electrode 41 is along the first The lengths in one direction X are the same, and the lengths of each second sub-strip electrode 611 included in the second strip electrode 61 along the first direction X are the same.
  • the above-mentioned liquid crystal grating provided by the embodiment of the present disclosure also includes a common electrode layer 7 located on the side of the second substrate 2 facing the liquid crystal layer 3.
  • the common electrode layer 7 can A planar structure set for the entire surface. Specifically, a driving voltage is applied to the first transparent grating electrode layer 4, the second transparent grating electrode layer 6, and the common electrode layer 7 so that the liquid crystal grating forms alternately arranged light-transmitting areas and dark-state areas.
  • the above-mentioned liquid crystal grating provided by the embodiment of the present disclosure also includes a sealing adhesive layer located between the first substrate 1 and the second substrate 2 and located around the liquid crystal grating. 8.
  • the sealing glue layer 8 is used to seal the liquid crystal layer 3 .
  • the liquid crystal grating provided by the embodiment of the present disclosure also includes: a first orientation layer 9 located between the second transparent grating electrode layer 6 and the cathode layer 3, and a first alignment layer 9 located between the liquid crystal layer 3 and the common electrode.
  • first polarizer 11 and the first substrate 1 and the second polarizer 12 and the second substrate 2 are bonded together through optical glue.
  • the liquid crystal molecules in the liquid crystal layer 3 can be oriented through the first alignment layer 11 and the second alignment layer 12 so that the liquid crystal molecules are arranged in a twisted nematic (TN) arrangement, that is,
  • the liquid crystal grating provided by the embodiment of the present disclosure may be a TN-type liquid crystal grating.
  • the liquid crystal molecules are continuously twisted by 90° between the first substrate 1 and the second substrate 2.
  • the liquid crystal molecules are deflected, and the long axes of the liquid crystal molecules are aligned perpendicular to the first substrate.
  • the transmission axis of the first polarizer 11 and the transmission axis of the second polarizer 12 are perpendicular to each other, and the first polarizer 11 converts the incident light into Linearly polarized light is injected into the liquid crystal layer 3.
  • the liquid crystal molecules in the liquid crystal layer 3 are not deflected, and the linearly polarized light passes through the liquid crystal layer. 3.
  • the back polarization direction is rotated 90° and can pass through the second polarizer 12.
  • the area where the liquid crystal molecules are not deflected corresponds to the light-transmitting area; and the first transparent grating electrode layer 4 and the second transparent grating electrode layer 6 are loaded with driving signals.
  • the liquid crystal molecules in the liquid crystal layer 3 are deflected.
  • the polarization direction of the linearly polarized light does not change after passing through the liquid crystal layer 3 and cannot pass through the second polarizer 12. Therefore, the area where the liquid crystal molecules are deflected corresponds to the dark state area.
  • liquid crystal grating provided by the embodiment of the present disclosure is explained by taking a TN-type liquid crystal grating as an example, and is of course not limited thereto.
  • Figure 8 is an optical path diagram when the liquid crystal grating provided by the embodiment of the present disclosure is applied to a 3D display device (the liquid crystal grating is bonded to a 2D display panel).
  • the similar triangle theorem can be as follows Relationship:
  • W is the grating period (pitch)
  • Ws is the grating slit width
  • H is the grating placement height
  • K is the number of viewpoints
  • P is the pixel width of the display panel
  • L is the optimal viewing distance of the observer
  • D is the interpupillary distance.
  • the viewpoint distance Q D/N, N is a positive integer.
  • the main parameters of the grating can be obtained as follows:
  • the pixel width P is also a fixed value. From the above formula we can get:
  • Figure 9 is another schematic cross-sectional view of the liquid crystal grating
  • Figures 10 and 11 are two planes of the liquid crystal grating.
  • Figure 12 is a partially enlarged schematic diagram of Figure 10.
  • the liquid crystal grating has a grating area AA and a peripheral area BB arranged around the grating area AA;
  • the grating area AA includes: a plurality of control lines (G11, G12...Gtae11', G12'%) (G21, G22...Gtae21', G22'%) extending along the first direction X and arranged along the second direction Y. ), a plurality of signal input lines (D11, D12%) (D21, D227) extending along the second direction Y and arranged along the first direction X, and located on the first substrate 1 and the first transparent grating electrode layer 4 A plurality of driving transistors (TFT1 and TFT2) between them; the driving transistors (TFT1 and TFT2) correspond to the first sub-strip electrode 411 and the second sub-strip electrode 611 in a one-to-one manner;
  • control lines G11, G12...Gtae11', G12'...) (G21, G22...Gtae21', G22'...) are arranged on the same layer as the gates (13 and 13') of the drive transistors (TFT1 and TFT2) , the signal input lines (D11, D12%) (D21, D22%) are arranged on the same layer as the sources (14 and 14') and drains (15 and 15') of the driving transistors (TFT1 and TFT2);
  • the gates (13 and 13') of the driving transistors (TFT1 and TFT2) are electrically connected to the control lines
  • the sources (14 and 14') of the driving transistors (TFT1 and TFT2) are electrically connected to the signal input lines
  • the driving transistors (TFT1 and TFT2) are electrically connected to the signal input lines.
  • the drain electrodes (15 and 15') of the TFT 2) are electrically connected to the first sub-strip electrode 411 or the second sub-strip electrode 611.
  • Figure 10 of the embodiment of the present disclosure illustrates the first transparent grating electrode layer 4 and the corresponding control lines (G11, G12...Gtae11', G12'...) and signal input lines (D11, D12... ...), TFT1 and the first signal leads (L11, L12...L11', L12'..., introduced later).
  • Figure 11 illustrates the second transparent grating electrode layer 6 and the corresponding control lines (G21, Schematic plan view of G22...Gtae21', G22'...), signal input lines (D21, D22%), TFT2 and second signal leads (L21, L22...L21', L22'..., introduced later).
  • the TFT is controlled to be turned on or off through G, and the D signal is charged or discharged through the TFT.
  • the embodiment of the present disclosure controls the switching of each first sub-strip electrode 411 and the second sub-strip electrode 611 by using a driving transistor (TFT1 and TFT2), that is, each first sub-strip electrode 411 and the second sub-strip electrode
  • TFT1 and TFT2 a driving transistor
  • the electrode 611 can individually control the switch through the corresponding TFT to achieve light-transmitting and non-light-transmitting switching. In this way, it can be used with the human eye tracking module to obtain the position of the viewer's eyes in real time.
  • the driving module can obtain the position of the viewer's eyes based on the human eye tracking module.
  • the liquid crystal grating forms an alternately arranged light-transmitting area and a dark-state area, so that the left eye of the viewer can see the left eye displayed on the display panel through the light-transmitting area of the liquid crystal grating.
  • Image the right eye sees the right eye image displayed on the display panel through the light-transmitting area, which can accurately control the light-transmitting area and the dark state area, thereby not only realizing the motion parallax due to the movement of the viewer in the 3D display, but also eliminating the viewing position Moiré and view crosstalk brought about by changes.
  • the human eye position is tracked through the human eye tracking module, and the grating opening and position are adjusted in real time through the individual TFT control switches corresponding to the first sub-strip electrode 411 and the second sub-strip electrode 611.
  • the slit width Ws of the liquid crystal grating can be precisely controlled, thereby adjusting the observer's optimal viewing distance L and adjusting the number of viewpoints K by changing the grating slit width Ws, thereby providing the best viewing experience.
  • control lines include first control lines (G11, G12...Gtae11', G12'%) and second control lines Control lines (G21, G22...Gtae21', G22'%)
  • signal input lines include first signal input lines (D11, D12%) and second signal input lines (D21, D22%)
  • drive transistors include The first driving transistor TFT1 and the second driving transistor TFT2;
  • the gates (13 and 13') of the first driving transistor TFT1 are electrically connected to the corresponding first control lines (G11, G12...Gtae11', G12'...), and the sources (14 and 14) of the first driving transistor TFT1 ') are electrically connected to the corresponding first signal input lines (D11, D12%), and the drains (15 and 15') of the first driving transistor TFT1 are electrically connected to the corresponding first sub-strip electrode 411;
  • the gates (13 and 13') of the second driving transistor TFT2 are electrically connected to the corresponding second control lines (G21, G22...Gtae21', G22'...), and the sources (14 and 14 ') are electrically connected to the corresponding second signal input lines (D21, D22%), and the drains (15 and 15') of the second driving transistor TFT2 are electrically connected to the corresponding second sub-strip electrode 611.
  • the gate 13 of the first driving transistor TFT1 is electrically connected to the corresponding first control line (G11, G12...Gtae11', G12'%), and the first driving transistor TFT1
  • the source electrode 14 of the first driving transistor TFT1 is electrically connected to the corresponding first signal input line (D11, D12%), and the drain electrode 15 of the first driving transistor TFT1 is electrically connected to the corresponding first sub-strip electrode 411.
  • the gate 13' of the second driving transistor TFT2 is electrically connected to the corresponding second control line (G21, G22...Gtae21', G22'%), and the second driving transistor
  • the source electrode 14' of the TFT2 is electrically connected to the corresponding second signal input line (D21, D22%), and the drain electrode 15' of the second driving transistor TFT2 is electrically connected to the corresponding second sub-strip electrode 611.
  • the gates of each first driving transistor electrically connected to the same first strip electrode are electrically connected to the same first control line.
  • the three first sub-strip electrodes 411 included in the first strip electrode 41 from the left are respectively electrically connected to the gates of the first driving transistors TFT1 and the first control line G11, and the gates of the first strip electrodes 41 from the left are electrically connected to the first control line G11.
  • the three first sub-strip electrodes 411 included in the two first strip electrodes 41 are respectively electrically connected to the gate of each first driving transistor TFT1 and the first control line G11.
  • the third first strip from the left is The three first sub-strip electrodes 411 included in the electrode 41 are respectively electrically connected to the gates of each first driving transistor TFT1 and the first control line G11; the fourth first sub-strip electrode 41 from the left includes three The gates of each first drive transistor TFT1 to which the first sub-strip electrodes 411 are respectively electrically connected are electrically connected to the first control line G12.
  • the fifth first strip-shaped electrode 41 from the left includes three first sub-strip electrodes. 411 are electrically connected to the gates of each first driving transistor TFT1 and the first control line G12, and the three first sub-strip electrodes 411 included in the sixth first strip electrode 41 from the left are electrically connected to each of the first driving transistors TFT1.
  • the gate of the first driving transistor TFT1 is electrically connected to the first control line G12; and so on...
  • a first control line is electrically connected to at least the gate of each first drive transistor electrically connected to a first strip electrode.
  • the first control line G11 is electrically connected to the gates of each first driving transistor TFT1 that are electrically connected to each first sub-strip electrode 411 included in the first to third first strip electrodes 41 from the left;
  • the control line G12 is electrically connected to the gates of each first driving transistor TFT1 that are electrically connected to the first sub-strip electrodes 411 included in the fourth to sixth first strip electrodes 41 from the left;
  • the first control line G13 is electrically connected to the gates of the first driving transistors TFT1.
  • the first sub-strip electrodes 411 included in the seventh to ninth first strip electrodes 41 are electrically connected to the gates of the first driving transistors TFT1; and so on....
  • Embodiments of the present disclosure can reduce the number of control lines and improve the transmittance by using a first control line to electrically connect at least the gates of each first driving transistor that is electrically connected to one (for example, three) first strip electrodes.
  • a first control line is used to electrically connect the gates of each first drive transistor that are electrically connected to three first strip electrodes.
  • a first control line may The gates of each first drive transistor are electrically connected to one, two or more first strip electrodes, but if there are more than three, the load of the first control line may not meet the requirements. If one first control line If the gate electrode of each first driving transistor is electrically connected to only one first strip electrode, then the number of first control lines is too many. Therefore, in the embodiment of the present disclosure, it is preferred that one first control line is electrically connected to the gate of each first driving transistor in which two or three first strip electrodes are electrically connected.
  • each second driving transistor TFT2 electrically connected to the same second strip electrode 61 are connected to the same second strip electrode 61 .
  • the control lines are electrically connected, and one second control line is electrically connected to at least the gate of each second driving transistor TFT2 electrically connected to one second strip electrode 61 .
  • the connection relationship of each second sub-strip electrode 611 included in the second strip electrode 61 in Figure 11 can be referred to the description in Figure 10.
  • the connection relationship in Figure 11 is the same as the connection relationship in Figure 10.
  • it is preferred that a second control line is electrically connected to the gate of each second driving transistor electrically connected to two or three second strip electrodes.
  • the peripheral area BB includes a plurality of first signal leads (L11, L12...L11', L12'%) and a plurality of second signal leads (L21, L22...L21', L22').
  • each first driving transistor TFT1 electrically connected to the same first strip electrode passes through the corresponding first signal input line.
  • D11, D14, D17 are electrically connected to the same first signal lead L11 and are electrically connected to different first strip electrodes (for example, the first first strip electrode 41 and the second first strip electrode 41 from the left)
  • the sources of each first driving transistor TFT1 are electrically connected to different first signal leads (L11, L12) through corresponding first signal input lines (D11, D12).
  • each second driving transistor TFT2 electrically connected to the same second strip electrode passes through the corresponding second signal input line.
  • D21, D24, D27 are electrically connected to the same second signal lead L11'
  • different second strip electrodes for example, the first second strip electrode 61 and the second second strip electrode 61 from the left
  • the sources of each connected second driving transistor TFT2 are electrically connected to different second signal leads (L11', L12') through corresponding second signal input lines (D21, D22).
  • each first sub-strip electrode included in the same first strip electrode is electrically connected to the same first signal lead, that is, the same first strip electrode is electrically connected to the same first signal lead.
  • Each first sub-strip electrode included in the strip electrode is loaded with a driving voltage at the same time or not loaded with a driving voltage at the same time;
  • each second sub-strip electrode included in the same second strip electrode is electrically connected to the same second signal lead, That is, for example, each second sub-strip electrode included in the same second strip electrode is loaded with a driving voltage at the same time or is not loaded with a driving voltage at the same time;
  • Figures 10 and 11 can realize column driving of a certain column or several columns.
  • the sources of each first driving transistor electrically connected to each first sub-strip electrode in the same first strip electrode are electrically connected to different first signal leads through the corresponding first signal input line.
  • the sources of each first driving transistor electrically connected to different first strip electrodes are electrically connected to different first signal leads through corresponding first signal input lines, that is, all first sub-strip electrodes adopt different
  • the first signal lead is loaded with a driving voltage; the sources of each second driving transistor electrically connected to each second sub-strip electrode in the same second strip electrode are connected to different second signal leads through the corresponding second signal input line.
  • each second driving transistor electrically connected to different second strip electrodes are electrically connected to different second signal leads through corresponding second signal input lines, that is, all second sub-strip electrodes adopt different
  • the second signal lead is loaded with a driving voltage; this can achieve partitioned driving and more finely control the light-transmitting area and dark-state area of the grating.
  • the structural schematic diagram of the first transparent grating electrode layer and the second transparent grating electrode layer using partitioned driving is basically the same as Figure 10 and Figure 11. The only difference is that in partitioned driving, all the first sub-strip electrodes are connected to different ones. The first signal leads are electrically connected, and all the second sub-strip electrodes are electrically connected to different second signal leads respectively.
  • the grating area AA is divided into at least one area (for example, divided into two areas A1 and A2 along the center of AA),
  • each first strip electrode 41 is divided into a plurality of first groups (for example, every three groups from the left), and the first strip electrodes in each first group
  • the number of 41 is the same (for example, each group includes 3 first strip electrodes 41), and the number of first signal leads (L11, L127) is the same as the number of first strip electrodes 41 in each first group.
  • each second strip electrode 61 is divided into a plurality of second groups (for example, each group includes 3 second strip electrodes 61), and each second strip electrode 61 in each second group
  • the number of second strip electrodes 61 is the same (for example, each group includes three second strip electrodes 61), and the number of second signal leads (L21, L22%) is the same as the number of second signal leads (L21, L22%) in each second group.
  • the number of shaped electrodes 61 is the same (the number of second signal leads is 3).
  • the first strip electrodes with the same position are electrically connected to the same first signal lead through the same first signal input line, for example, the first one from the left
  • the first strip-shaped electrode 41, the fourth strip-shaped electrode 41, the seventh first strip-shaped electrode 41... are all electrically connected to the first signal lead L11 through the first signal input line D11, the second and first strip-shaped electrode from the left
  • the first strip-shaped electrode 41, the fifth strip-shaped electrode 41, the eighth first strip-shaped electrode 41... are all electrically connected to the first signal lead L12 through the first signal input line D12, the third and first strip-shaped electrode from the left
  • First strip electrodes with different positions are electrically connected to different first signal leads through different first signal input lines, for example, the first first strip electrode 41, the second first strip electrode 41, and the first strip electrode 41 from the left.
  • the three first strip electrodes 41 are electrically connected to the corresponding first signal leads L11, L12, and L13 through the first signal input lines D11, D12, and D13 respectively.
  • the fourth and fifth first strip electrodes 41 and 41 from the left are The first strip electrode 41 and the sixth first strip electrode 41 are electrically connected to the corresponding first signal leads L11, L12, and L13 through the first signal input lines D11, D12, and D13 respectively, and so on.
  • the second strip-shaped electrodes with the same position are electrically connected to the same second signal lead through the same second signal input line, for example, the first and second electrodes from the left
  • the second strip-shaped electrode 61, the fourth strip-shaped electrode 61, the seventh second strip-shaped electrode 61... are all electrically connected to the second signal lead L21 through the second signal input line D21, and the second strip-shaped electrode 61 is the second one from the left.
  • the shaped electrode 61, the sixth second strip electrode 61, the ninth second strip electrode 61 are all electrically connected to the second signal lead L23 through the second signal input line D23, and so on.
  • Second strip-shaped electrodes with different positions are electrically connected to different second signal leads through different second signal input lines, for example, the first second strip-shaped electrode 61, the second second strip-shaped electrode 61, and the second strip-shaped electrode 61 from the left.
  • the three second strip-shaped electrodes 61 are electrically connected to the corresponding second signal leads L21, L22, and L23 through the second signal input lines D21, D22, and D23 respectively.
  • the fourth and fifth second strip-shaped electrodes 61 and 61 from the left are The second strip-shaped electrode 61 and the sixth strip-shaped electrode 61 are electrically connected to the corresponding second signal leads L21, L22, and L23 through the second signal input lines D21, D22, and D23 respectively, and so on.
  • the first control lines (G11, G12%) located in the first area A1 are electrically connected to the gate driving circuit GOA1 respectively, and the first control lines (Gtae11) located in the second area A2 ', G12'...) are electrically connected to the gate drive circuit GOA2 respectively, that is, the two GOA units control the first control lines (G11, G12...Gtae11', G12'%) to be opened row by row in a certain time sequence.
  • the second control lines (G21, G22%) located in the first area A1 are electrically connected to the gate drive circuit GOA1 respectively, and the second control lines (Gtae21 ', G22'%) are electrically connected to the gate drive circuit GOA2 respectively, that is, the two GOA units control the second control lines (G21, G22...Gtae21', G22'%) to be opened row by row according to a certain timing.
  • the liquid crystal grating provided by the embodiment of the present disclosure also includes a flat layer 16 located between the driving transistors (TFT1 and TFT2) and the first transparent grating electrode layer 4.
  • the first driving The transistor TFT1 includes a stacked first gate electrode 13, a first active layer 17, a first source electrode 14 and a first drain electrode 15.
  • the first sub-strip electrode 411 is connected to the first drain electrode through a via hole penetrating the planar layer 16. Pole 15 electrical connection;
  • the second driving transistor TFT2 includes a stacked second gate electrode 13', a second active layer 17', a second source electrode 14' and a second drain electrode 15'.
  • the second sub-stripe electrode 611 passes through the planar layer 16
  • the via hole of the insulating layer 5 is electrically connected to the second drain electrode 15';
  • the first gate electrode 13 and the second gate electrode 13' are arranged in the same layer.
  • the first active layer 17 and the second active layer 17' are arranged in the same layer.
  • the first source electrode 14 and the first drain electrode 15 are arranged in the same layer as the second source electrode. 14' and the second drain electrode 15' are arranged on the same layer. In this way, film layers with the same functions can be produced using a one-time patterning process, thereby reducing the production process and cost.
  • the first signal leads (L11, L12%) are arranged on the same layer as the first gate 13, and the second signal leads (L21, L22%) are arranged in the same layer as the first gate electrode 13'.
  • the first signal leads (L11, L12%) and the second signal leads ( L21, L22%) and the first gate electrode 13 and the first gate electrode 13' there is no need to separately prepare the first signal leads (L11, L12%) and the second signal leads (L21, L22).
  • the technology can simplify the preparation process, save production costs and improve production efficiency.
  • FIG. 13 and FIG. 14 are schematic diagrams of partial film layers in FIG.
  • the via hole of the gate insulation layer 18 is electrically connected to the second signal input line D21.
  • all TFT1 and TFT2 can be N-type transistors; of course, all TFT1 and TFT2 can also be P-type transistors.
  • TFT1 and TFT2 as N-type transistors as an example, the following describes the working principle of the TN-type liquid crystal grating provided by the embodiment of the present disclosure.
  • the timing is shown in Figure 15 and Figure 16.
  • GOA1 and GOA2 work at the same time, and GOA1 starts from G11 It is opened row by row to G 1n, GOA2 is opened row by row from G11' to G 1n', and the G lines with the same serial number electrically connected to GOA1 and GOA2 control the D signal of the same row. Since the timing of GOA1 and GOA2 is the same, Figure 15 and Figure 16 only illustrate the working timing of GOA1, and G1 to G n represent G11 to G 1n, and D 1 to D n represent D 11 to D 1n.
  • the TN-type liquid crystal grating is in a normally white mode (which can save power consumption), that is, Neither the first transparent grating electrode layer 4 nor the second transparent grating electrode layer 6 is loaded with a driving signal.
  • the liquid crystal molecules in the liquid crystal layer 3 are not deflected.
  • the polarization direction of the linearly polarized light is rotated 90° and can pass through the third transparent grating electrode layer 4.
  • the TN-type liquid crystal grating is in a full transmission mode (all the liquid crystal gratings form a light-transmitting area) and the transmittance is maximum.
  • the gates of TFT1 and TFT2 which are electrically connected to the first sub-strip electrode 411 and the second sub-strip electrode 611 corresponding to the position of the grating slit, input low through the corresponding control line.
  • the level signal is turned off, which is a light-transmitting mode, that is, a light-transmitting area is formed; the gates of TFT1 and TFT2, which are electrically connected to the first sub-strip electrode 411 and the second sub-strip electrode 611 at the remaining positions, are input through corresponding control lines.
  • the high-level signal is turned on, and the driving voltage is loaded to the corresponding signal input line D through the first signal lead and the second signal lead.
  • the driving voltage is transmitted to the first sub-strip electrode 411 and the first sub-strip electrode 411 through the turned-on TFT1 and TFT2.
  • the two sub-strip electrodes 611 are in a light-shielding mode, that is, forming a dark state area; thus, the liquid crystal grating forms alternately arranged light-transmitting areas and dark-state areas. Since the first sub-strip electrode 411 and the second sub-strip electrode 611 are periodically controlled by several D lines, an equally spaced slit grating is presented.
  • the liquid crystal grating provided by the embodiment of the present disclosure uses TFT to charge and discharge each sub-strip electrode individually to achieve on and off, and is used with a human eye tracking module to accurately control the slits and positions of the grating, which can not only realize 3D
  • the motion parallax in the display due to the movement of the viewer can also eliminate moiré and crosstalk caused by changes in viewing position.
  • embodiments of the present disclosure also provide a driving method for driving the above-mentioned liquid crystal grating.
  • the driving method includes:
  • the liquid crystal grating in the above-mentioned driving method of the liquid crystal grating provided by the embodiment of the present disclosure, as shown in FIG. 18, in the 3D display mode, the liquid crystal grating is driven to form alternately arranged light-transmitting areas and dark-state areas, which may specifically include :
  • control the driving transistor at the current position information position to turn off through the corresponding control line to form a light-transmitting area; control the driving transistors at other positions to turn on, and pass the first signal lead and the third
  • the two signal leads load the driving voltage to the corresponding signal input line, and the driving voltage is transmitted to the first strip electrode and the second strip electrode through the turned-on driving transistor to form a dark state area.
  • the liquid crystal grating is driven to form alternately arranged light-transmitting areas and dark-state areas.
  • the specific principle description of the 3D display in the aforementioned liquid crystal grating which will not be described again here.
  • an embodiment of the present disclosure also provides a 3D display device, as shown in Figure 19, including a display panel 100, the above-mentioned liquid crystal grating 200 provided by an embodiment of the present disclosure, and a human eye tracking module (not shown); in,
  • the eye tracking module is used to obtain the position of the viewer's eyes
  • the liquid crystal grating 200 is controlled to form alternately arranged light-transmitting areas and dark-state areas, so that the viewer's left eye can see the display panel 100 through the light-transmitting area of the liquid crystal grating 200
  • the left eye image is displayed, and the right eye sees the right eye image displayed on the display panel 100 through the light-transmitting area.
  • the display panel 100 may be a liquid crystal display panel, and the liquid crystal grating 200 is disposed on the light incident side of the liquid crystal display panel (100).
  • the liquid crystal display panel (100) may include a third substrate 30 and a fourth substrate 40 arranged oppositely, a liquid crystal layer 50 located between the third substrate 30 and the fourth substrate 40, and a side of the third substrate 30 facing the liquid crystal layer 50.
  • color filter substrate 70 includes a black matrix 71 and a color filter layer 72 (eg, a red color film R, a green color film G, and a blue color film B).
  • the black matrix 71 has a plurality of openings, and the color filter layer 72 is located within the openings of the black matrix 71 .
  • the liquid crystal display panel (100) and the liquid crystal grating 200 are bonded together through the intermediate glass 90, and bonding alignment marks are respectively provided on the array substrate 60 and the second substrate 2.
  • the thickness of the glass 90 is the placement height H of the liquid crystal grating 200 .
  • the liquid crystal grating 200 is disposed on the light incident side of the liquid crystal display panel (100).
  • the liquid crystal grating 200 will not affect the liquid crystal display panel.
  • the touch electrodes in (100) generate shielding to avoid the problem of touch failure, thereby improving the touch sensitivity and accuracy of the liquid crystal display panel (100).
  • the display panel provided by the embodiment of the present disclosure is not limited to a liquid crystal display panel.
  • the display panel provided by the embodiment of the present disclosure may be an OLED display panel, and the liquid crystal grating is disposed on the light emitting side of the OLED display panel.
  • the 3D display device provided by the embodiments of the present disclosure may also include other functional film layers well known to those skilled in the art according to the type of display panel, which are not listed here.
  • the 3D display device can be: a mobile phone, a tablet computer, a television, a monitor, a notebook computer, a digital photo frame, a navigator, or any other product or component with a display function. Since the problem-solving principle of the 3D display device is similar to the aforementioned liquid crystal grating, the implementation of the 3D display device can refer to the above embodiment of the liquid crystal grating, and repeated details will not be repeated.
  • the liquid crystal grating, its driving method and the 3D display device provided by the embodiments of the present disclosure, when the liquid crystal grating is applied to the 3D display device, by loading a driving voltage on part of the first strip electrode in the first transparent grating electrode layer, and part of the third A strip of electrode is not loaded with a driving voltage, which can drive the liquid crystal grating to form alternately arranged light-transmitting areas and dark-state areas, so that the viewer's left eye can see the left-eye image displayed on the display panel through the light-transmitting area of the liquid crystal grating, and the right eye can The right-eye image displayed on the display panel can be seen through the light-transmitting area to achieve naked-eye 3D display.
  • Embodiments of the present disclosure divide at least part of the first strip electrode into at least two independently arranged first sub-strip electrodes along the first direction, which can reduce the cost of dividing into at least two independently arranged first sub-strip electrodes.
  • the resistance of each first strip electrode can reduce signal attenuation and delay, thereby improving the performance of the liquid crystal grating.

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Abstract

本公开提供的一种液晶光栅、其驱动方法及3D显示装置，该液晶光栅包括：第一基板；第二基板，第二基板与第一基板相对设置；液晶层，液晶层位于第一基板与第二基板之间；第一透明光栅电极层，位于第一基板面向液晶层的一侧；第一透明光栅电极层包括沿第一方向延伸且沿第二方向排列的多个间隔设置的第一条形电极；其中，至少部分第一条形电极沿第一方向上分割成独立设置的至少两个第一子条形电极。

Description

液晶光栅、其驱动方法及3D显示装置 技术领域
本公开涉及3D显示技术领域，尤其涉及一种液晶光栅、其驱动方法及3D显示装置。
背景技术
三维(3D)显示技术的工作原理为：针对同一场景，使观看者的左眼和右眼分别接收图像，观看者的两眼在水平方向上的间距(即瞳距，约为65mm)，使得两眼的视角存在细微的差别，由于这种差别的存在，观看者的左眼和右眼分别观察到的图像也会略有差异，这个差异被称为“双眼视差”，经大脑视觉皮层的融合后，就形成了立体效果。
随着显示技术的发展，裸眼3D显示倍受人们喜爱，裸眼3D技术是指不通过任何工具，直接让左右两只眼睛从显示屏幕上看具有视差的画面，两幅画面被发射到大脑，产生具有立体感画面的显示技术。
发明内容
本公开实施例提供了一种液晶光栅、其驱动方法及3D显示装置，具体方案如下：
本公开实施例提供的一种液晶光栅，包括：
第一基板；
第二基板，所述第二基板与所述第一基板相对设置；
液晶层，所述液晶层位于所述第一基板与所述第二基板之间；
第一透明光栅电极层，位于所述第一基板面向所述液晶层的一侧；所述第一透明光栅电极层包括沿第一方向延伸且沿第二方向排列的多个间隔设置的第一条形电极；其中，
至少部分所述第一条形电极沿所述第一方向上分割成独立设置的至少两 个第一子条形电极。
在一种可能的实现方式中，在本公开实施例提供的上述液晶光栅中，每一所述第一条形电极沿所述第一方向上均分割为独立设置的至少两个所述第一子条形电极。
在一种可能的实现方式中，在本公开实施例提供的上述液晶光栅中，还包括：位于所述第一透明光栅电极层面向所述液晶层一侧的绝缘层，以及位于所述绝缘层面向所述液晶层一侧的第二透明光栅电极层；
所述第二透明光栅电极层包括沿所述第一方向延伸且沿所述第二方向排列的多个间隔设置的第二条形电极，所述第二条形电极在所述第一基板的正投影覆盖相邻两个所述第一条形电极之间的区域在所述第一基板的正投影；其中，
至少部分所述第二条形电极沿所述第一方向上分割成独立设置的至少两个第二子条形电极。
在一种可能的实现方式中，在本公开实施例提供的上述液晶光栅中，每一所述第二条形电极沿所述第一方向上均分割为独立设置的至少两个所述第二子条形电极。
在一种可能的实现方式中，在本公开实施例提供的上述液晶光栅中，每一所述第二条形电极包括的所述第二子条形电极的数量与每一所述第一条形电极包括的所述第一子条形电极的数量相同。
在一种可能的实现方式中，在本公开实施例提供的上述液晶光栅中，所述第一条形电极包括的各所述第一子条形电极沿所述第一方向的长度相同，所述第二条形电极包括的各所述第二子条形电极沿所述第一方向的长度相同。
在一种可能的实现方式中，在本公开实施例提供的上述液晶光栅中，所述液晶光栅具有光栅区和围绕所述光栅区设置的周边区；
所述光栅区包括：沿所述第一方向延伸且沿所述第二方向排列的多条控制线，沿所述第二方向延伸且沿所述第一方向排列的多条信号输入线，以及位于所述第一基板和所述第一透明光栅电极层之间的多个驱动晶体管；所述 驱动晶体管与所述第一子条形电极、所述第二子条形电极一一对应；
所述控制线与所述驱动晶体管的栅极同层设置，所述信号输入线与所述驱动晶体管的源极和漏极同层设置；
所述驱动晶体管的栅极与所述控制线电连接，所述驱动晶体管的源极与所述信号输入线电连接，所述驱动晶体管的漏极与所述第一子条形电极或所述第二子条形电极电连接。
在一种可能的实现方式中，在本公开实施例提供的上述液晶光栅中，所述控制线包括第一控制线和第二控制线，所述信号输入线包括第一信号输入线和第二信号输入线，所述驱动晶体管包括第一驱动晶体管和第二驱动晶体管；其中，
所述第一驱动晶体管的栅极与所述第一控制线电连接，所述第一驱动晶体管的源极与所述第一信号输入线电连接，所述第一驱动晶体管的漏极与所述第一子条形电极电连接；
所述第二驱动晶体管的栅极与所述第二控制线电连接，所述第二驱动晶体管的源极与所述第二信号输入线电连接，所述第二驱动晶体管的漏极与所述第二子条形电极电连接。
在一种可能的实现方式中，在本公开实施例提供的上述液晶光栅中，同一所述第一条形电极电连接的各所述第一驱动晶体管的栅极与同一条所述第一控制线电连接，且一条所述第一控制线至少与一条所述第一条形电极电连接的各所述第一驱动晶体管的栅极电连接。
在一种可能的实现方式中，在本公开实施例提供的上述液晶光栅中，同一所述第二条形电极电连接的各所述第二驱动晶体管的栅极与同一条所述第二控制线电连接，且一条所述第二控制线至少与一条所述第二条形电极电连接的各所述第二驱动晶体管的栅极电连接。
在一种可能的实现方式中，在本公开实施例提供的上述液晶光栅中，所述周边区包括多条第一信号引线和多条第二信号引线，同一条所述第一条形电极电连接的各所述第一驱动晶体管的源极通过对应的所述第一信号输入线 与同一条所述第一信号引线电连接，不同所述第一条形电极电连接的各所述第一驱动晶体管的源极通过对应的所述第一信号输入线与不同的所述第一信号引线电连接；
同一条所述第二条形电极电连接的各所述第二驱动晶体管的源极通过对应的所述第二信号输入线与同一条所述第二信号引线电连接，不同所述第二条形电极电连接的各所述第二驱动晶体管的源极通过对应的所述第二信号输入线与不同的所述第二信号引线电连接。
在一种可能的实现方式中，在本公开实施例提供的上述液晶光栅中，所述周边区包括多条第一信号引线和多条第二信号引线，同一条所述第一条形电极中的各所述第一子条形电极电连接的各所述第一驱动晶体管的源极通过对应的所述第一信号输入线与不同条所述第一信号引线电连接，不同所述第一条形电极电连接的各所述第一驱动晶体管的源极通过对应的所述第一信号输入线与不同的所述第一信号引线电连接；
同一条所述第二条形电极中的各所述第二子条形电极电连接的各所述第二驱动晶体管的源极通过对应的所述第二信号输入线与不同条所述第二信号引线电连接，不同所述第二条形电极电连接的各所述第二驱动晶体管的源极通过对应的所述第二信号输入线与不同的所述第二信号引线电连接。
在一种可能的实现方式中，在本公开实施例提供的上述液晶光栅中，所述光栅区划分为至少一个区域，针对每一区域，各所述第一条形电极划分为多个第一组，每一所述第一组内的第一条形电极数量相同，且所述第一信号引线的数量与每一所述第一组内的第一条形电极数量相同；各所述第二条形电极划分为多个第二组，每一所述第二组内的第二条形电极数量相同，且所述第二信号引线的数量与每一所述第二组内的第二条形电极数量相同；
各所述第一组内，位置相同的第一条形电极通过同一条所述第一信号输入线与同一条所述第一信号引线电连接，位置不同的第一条形电极通过不同条所述第一信号输入线与不同的所述第一信号引线电连接；
各所述第二组内，位置相同的第二条形电极通过同一条所述第二信号输 入线与同一条所述第二信号引线电连接，位置不同的第二条形电极通过不同条所述第二信号输入线与不同的所述第二信号引线电连接。
在一种可能的实现方式中，在本公开实施例提供的上述液晶光栅中，还包括位于所述驱动晶体管和所述第一透明光栅电极层之间的平坦层，所述第一驱动晶体管包括层叠设置的第一栅极、第一有源层、第一源极和第一漏极，所述第一子条形电极通过贯穿所述平坦层的过孔与所述第一漏极电连接；
所述第二驱动晶体管包括层叠设置的第二栅极、第二有源层、第二源极和第二漏极，所述第二子条形电极通过贯穿所述平坦层和所述绝缘层的过孔与所述第二漏极电连接；
所述第一栅极与所述第二栅极同层设置，所述第一有源层与所述第二有源层同层设置，所述第一源极和第一漏极与所述第二源极和第二漏极同层设置。
在一种可能的实现方式中，在本公开实施例提供的上述液晶光栅中，所述第一信号引线与所述第一栅极同层设置，所述第二信号引线与所述第一栅极同层设置。
在一种可能的实现方式中，在本公开实施例提供的上述液晶光栅中，还包括位于所述第一栅极和所述第一有源层之间的栅绝缘层，所述第一信号引线通过贯穿所述栅绝缘层的过孔与所述第一信号输入线电连接，所述第二信号引线通过贯穿所述栅绝缘层的过孔与所述第二信号输入线电连接。
在一种可能的实现方式中，在本公开实施例提供的上述液晶光栅中，还包括位于所述第二基板面向所述液晶层一侧的公共电极层，所述公共电极层为整面设置的面状结构。
相应地，本公开实施例还提供了一种用于驱动本公开实施例提供的上述任一项所述的液晶光栅的驱动方法，所述驱动方法包括：
在2D显示模式下，驱动所述液晶光栅全部形成透光区；
在3D显示模式下，驱动所述液晶光栅形成交替排列的透光区和暗态区。
在一种可能的实现方式中，在本公开实施例提供的上述驱动方法中，在 3D显示模式下，驱动所述液晶光栅形成交替排列的透光区和暗态区，具体包括：
获取观看者的左眼或右眼相对于所述液晶光栅的各透光区域的当前位置信息；
根据确定的各所述当前位置信息，通过相应的控制线控制所述当前位置信息位置处的驱动晶体管关闭，以形成所述透光区；控制其余位置处的驱动晶体管导通，并通过第一信号引线和第二信号引线向对应的信号输入线加载驱动电压，所述驱动电压通过导通的所述驱动晶体管传输至第一条形电极和第二条形电极，以形成暗态区。
相应地，本公开实施例还提供了一种3D显示装置，包括显示面板、如本公开实施例提供的上述任一项所述的液晶光栅以及人眼追踪模块；
所述人眼追踪模块用于获取观看者的眼睛所在的位置；
根据所述人眼追踪模块获取的观看者眼睛所在的当前位置，控制所述液晶光栅形成交替排列的透光区和暗态区，使观看者的左眼通过所述液晶光栅的透光区看到所述显示面板显示的左眼图像，右眼通过所述透光区看到所述显示面板显示的右眼图像。
在一种可能的实现方式中，在本公开实施例提供的上述3D显示装置中，所述显示面板为液晶显示面板，所述液晶光栅设置于所述液晶显示面板的入光侧；
或者，所述显示面板为OLED显示面板，所述液晶光栅设置于所述OLED显示面板的出光侧。
附图说明
为了更清楚地说明本公开实施例中的技术方案，下面将对实施例描述中所需要使用的附图作简要介绍，显而易见地，下面描述中的附图仅仅是本公开的一些实施例，对于本领域的普通技术人员来讲，在不付出创造性劳动的前提下，还可以根据这些附图获得其他的附图。
图1为本公开实施例提供的一种液晶光栅的结构示意图；
图2为图1中第一透明光栅电极层的一种平面示意图；
图3为图1中第一透明光栅电极层的又一种平面示意图；
图4为本公开实施例提供的又一种液晶光栅的结构示意图；
图5为图4中第二透明光栅电极层的一种平面示意图；
图6为图4中第二透明光栅电极层的又一种平面示意图；
图7为本公开实施例提供的又一种液晶光栅的结构示意图；
图8为本公开实施例提供的液晶光栅应用于3D显示装置时的光路图；
图9为本公开实施例提供的又一种液晶光栅的结构示意图；
图10为本公开实施例提供的一种液晶光栅的平面结构示意图；
图11为本公开实施例提供的又一种液晶光栅的平面结构示意图；
图12为图10中的局部放大示意图；
图13为图9中的一种局部膜层示意图；
图14为图9中的又一种局部膜层示意图；
图15为液晶光栅在2D显示时的工作原理；
图16为液晶光栅在3D显示时的工作原理；
图17为本公开实施例提供的一种液晶光栅的驱动方法的流程示意图；
图18为本公开实施例提供的又一种液晶光栅的驱动方法的流程示意图；
图19为本公开实施例提供的一种3D显示装置的结构示意图。
具体实施方式
为使本公开实施例的目的、技术方案和优点更加清楚，下面将结合本公开实施例的附图，对本公开实施例的技术方案进行清楚、完整地描述。显然，所描述的实施例是本公开的一部分实施例，而不是全部的实施例。并且在不冲突的情况下，本公开中的实施例及实施例中的特征可以相互组合。基于所描述的本公开的实施例，本领域普通技术人员在无需创造性劳动的前提下所获得的所有其他实施例，都属于本公开保护的范围。
除非另外定义，本公开使用的技术术语或者科学术语应当为本公开所属领域内具有一般技能的人士所理解的通常意义。本公开中使用的“第一”、“第二”以及类似的词语并不表示任何顺序、数量或者重要性，而只是用来区分不同的组成部分。“包括”或者“包含”等类似的词语意指出现该词前面的元件或者物件涵盖出现在该词后面列举的元件或者物件及其等同，而不排除其他元件或者物件。“连接”或者“相连”等类似的词语并非限定于物理的或者机械的连接，而是可以包括电性的连接，不管是直接的还是间接的。
需要注意的是，附图中各图形的尺寸和形状不反映真实比例，目的只是示意说明本公开内容。并且自始至终相同或类似的标号表示相同或类似的元件或具有相同或类似功能的元件。
本公开实施例提供了一种液晶光栅，如图1-图3所示，图1为液晶光栅的一种截面示意图，图2为图1中第一透明光栅电极层的一种平面示意图，图3为图1中第一透明光栅电极层的又一种平面示意图，该液晶光栅包括：
第一基板1；
第二基板2，第二基板2与第一基板1相对设置；
液晶层3，液晶层3位于第一基板1与第二基板2之间；
第一透明光栅电极层4，位于第一基板1面向液晶层3的一侧；第一透明光栅电极层4包括沿第一方向X延伸且沿第二方向Y排列的多个间隔设置的第一条形电极41；其中，
至少部分第一条形电极41沿第一方向X上分割成独立设置的至少两个第一子条形电极411；例如，如图2所示，以各第一条形电极41沿第一方向X上均分割成独立设置的两个第一子条形电极411为例；如图3所示，以各第一条形电极41沿第一方向X上均分割成独立设置的三个第一子条形电极411为例；当然，不限于此。
本公开实施例提供的上述液晶光栅，在应用于3D显示装置时，通过对第一透明光栅电极层4中的部分第一条形电极41加载驱动电压，以及部分第一条形电极41未加载驱动电压，可驱动液晶光栅形成交替排列的透光区和暗态 区，使观看者的左眼通过液晶光栅的透光区看到显示面板显示的左眼图像，右眼通过透光区看到显示面板显示的右眼图像，以实现裸眼3D显示。本公开实施例通过将至少部分第一条形电极41沿第一方向X上分割成独立设置的至少两个第一子条形电极411，这样可以降低分割成独立设置的至少两个第一子条形电极411的各第一条形电极41的电阻，可以减小信号衰减和延迟，从而提高液晶光栅的性能。
需要说明的是，本公开实施例提供的液晶光栅特别适用于大尺寸的3D显示装置，例如电影院的3D显示屏。大尺寸的3D显示装置对应需要大尺寸的液晶光栅，这样第一透明光栅电极层的各第一条形电极的长度较长，电阻较大，容易引起信号衰减和延迟，因此本公开通过将较长的各第一条形电极分割成至少两段第一子条形电极，可以大大降低第一条形电极的电阻，提高信号传输性能。当然，本公开实施例提供的液晶光栅也适用于小尺寸的3D显示装置。
需要说明的是，本公开实施例图1-图3仅示意出部分第一条形电极41，当然，在具体实施时，第一条形电极41的数量根据液晶光栅的尺寸进行设置。
在具体实施时，在本公开实施例提供的上述液晶光栅中，如图2和图3所示，每一第一条形电极41沿第一方向X上均分割为独立设置的至少两个第一子条形电极411。这样可以降低整个液晶光栅中各第一条形电极41的电阻，从而可以提高整个液晶光栅中各第一条形电极41的信号传输性能。
在具体实施时，对于单层的透明光栅电极层，由于各条形电极之间具有间隙，这样间隙处液晶分子状态无法被调控，从而间隙处的液晶分子只处于一种状态，该间隙处只能为透光区或暗态区，无法形成切换的透光区或暗态区，本公开实施例为了使得液晶光栅中每一位置处均可被调控为透光区或暗态区，在本公开实施例提供的上述液晶光栅中，如图4-图6所示，图4为液晶光栅的又一种截面示意图，图5为图4中第二透明光栅电极层的一种平面示意图，图6为图4中第二透明光栅电极层的又一种平面示意图，该液晶光栅还包括：位于第一透明光栅电极层4面向液晶层3一侧的绝缘层5，以及位 于绝缘层5面向液晶层3一侧的第二透明光栅电极层6；
第二透明光栅电极层6包括沿第一方向X延伸且沿第二方向Y排列的多个间隔设置的第二条形电极61，第二条形电极61在第一基板1的正投影覆盖相邻两个第一条形电极41之间的区域在第一基板1的正投影；其中，
至少部分第二条形电极61沿第一方向X上分割成独立设置的至少两个第二子条形电极611；例如，如图5所示，以各第二条形电极61沿第一方向X上均分割成独立设置的两个第二子条形电极611为例；如图6所示，以各第二条形电极61沿第一方向X上均分割成独立设置的三个第二子条形电极611为例；当然，不限于此。
本公开实施例通过将至少部分第二条形电极61沿第一方向X上分割成独立设置的至少两个第二子条形电极611，这样可以降低分割成独立设置的至少两个第二子条形电极611的各第二条形电极61的电阻，可以在实现液晶光栅中每一位置处均可被调控为透光区或暗态区的基础上，进一步减小信号衰减和延迟，从而进一步提高液晶光栅的性能。
在具体实施时，在本公开实施例提供的上述液晶光栅中，如图5和图6所示，每一第二条形电极61沿第一方向X上均分割为独立设置的至少两个第二子条形电极611。这样可以降低整个液晶光栅中各第二条形电极61的电阻，从而可以提高整个液晶光栅中各第二条形电极61的信号传输性能。
在具体实施时，在本公开实施例提供的上述液晶光栅中，如图1-图6所示，各第一子条形电极411沿第二方向Y等距离分布，各第二子条形电极611沿第二方向Y等距离分布。
在具体实施时，在本公开实施例提供的上述液晶光栅中，如图2、图3、图5和图6所示，每一第二条形电极61包括的第二子条形电极611的数量与每一第一条形电极41包括的第一子条形电极411的数量相同。
在具体实施时，在本公开实施例提供的上述液晶光栅中，如图2、图3、图5和图6所示，第一条形电极41包括的各第一子条形电极411沿第一方向X的长度相同，第二条形电极61包括的各第二子条形电极611沿第一方向X 的长度相同。
在具体实施时，在本公开实施例提供的上述液晶光栅中，如图1和图4所示，还包括位于第二基板2面向液晶层3一侧的公共电极层7，公共电极层7可以为整面设置的面状结构。具体地，对第一透明光栅电极层4、第二透明光栅电极层6以及公共电极层7加载驱动电压以使液晶光栅形成交替排列的透光区和暗态区。
在具体实施时，在本公开实施例提供的上述液晶光栅中，如图1和图4所示，还包括位于第一基板1和第二基板2之间且位于液晶光栅四周的封框胶层8，封框胶层8用于密封液晶层3。
在具体实施时，如图7所示，本公开实施例提供的液晶光栅还包括：位于第二透明光栅电极层6和阴极层3之间的第一取向层9，位于液晶层3和公共电极层7之间的第二取向层10，位于第一基板1背离第二基板2一侧的第一偏光片11，以及位于第二基板背离第一基板1一侧的第二偏光片12。
在具体实施时，第一偏光片11与第一基板1之间、第二偏光片12与第二基板2之间均通过光学胶贴合。
在具体实施时，如图7所示，可以通过第一取向层11和第二取向层12对液晶层3中的液晶分子取向以使液晶分子呈扭曲向列(Twisted Nematic，TN)排列，即本公开实施例提供的液晶光栅可以为TN型液晶光栅。TN型液晶光栅的液晶层中，未加电状态，液晶分子在第一基板1和第二基板2之间连续扭曲90°，当第一透明光栅电极层4和第二透明光栅电极层6均加载驱动电压时，液晶分子发生偏转，液晶分子长轴垂直于第一基板排列。
在具体实施时，如图7所示，对于TN型液晶光栅，第一偏光片11的透光轴与第二偏光片12的透光轴方向相互垂直，第一偏光片11将入射光转变为线偏振光射入液晶层3，当对于第一透明光栅电极层4和第二透明光栅电极层6未加载驱动信号的区域，液晶层3中的液晶分子未发生偏转，线偏振光经过液晶层3后偏振方向旋转90°，可以透过第二偏光片12，因此液晶分子不发生偏转的区域对应透光区；而对于第一透明光栅电极层4和第二透明光 栅电极层6加载驱动信号的区域，液晶层3中的液晶分子发生偏转，线偏振光经过液晶层3后偏振方向未发生变化，不可透过第二偏光片12，因此液晶分子发生偏转的区域对应暗态区。
需要说明的是，本公开实施例提供的液晶光栅是以TN型液晶光栅为例进行说明的，当然不限于此。
如图8所示，图8为当本公开实施例提供的液晶光栅应用于3D显示装置(液晶光栅与2D显示面板贴合)时的光路图，根据该光路图，由相似三角形定理可有如下关系式：
Figure PCTCN2022089370-appb-000001
Figure PCTCN2022089370-appb-000002
Figure PCTCN2022089370-appb-000003
其中，W为光栅周期(pitch)，Ws为光栅狭缝宽度，H为光栅放置高度，K为视点数，P为显示面板的像素宽度，L为观察者最佳观看距离，D为瞳孔间距，视点间距Q＝D/N，N为正整数。
将上述公式联立可得光栅主要参数如下：
Figure PCTCN2022089370-appb-000004
Figure PCTCN2022089370-appb-000005
Figure PCTCN2022089370-appb-000006
通常，光栅放置高度H一旦确定，显示面板和光栅贴合后就无法改变；此外，当显示面板确定后，像素宽度P也是定值。由上述公式可得：
Figure PCTCN2022089370-appb-000007
可以看出，在H、P一定时，通过改变光栅狭缝宽度Ws来调整最佳观看距离L；并且，由于W＝KWs，因此通过改变光栅狭缝宽度Ws，还可以调节视点数K，例如视点数K越多，可以让更多观察者同时观看。
在具体实施时，在本公开实施例提供的上述液晶光栅中，如图9-图12所示，图9为液晶光栅的又一种截面示意图，图10和图11为液晶光栅的两种平面示意图，图12为图10中的局部放大示意图，该液晶光栅具有光栅区AA和围绕光栅区AA设置的周边区BB；
光栅区AA包括：沿第一方向X延伸且沿第二方向Y排列的多条控制线(G11、G12……Gtae11’、G12’……)(G21、G22……Gtae21’、G22’……)，沿第二方向Y延伸且沿第一方向X排列的多条信号输入线(D11、D12……)(D21、D22……)，以及位于第一基板1和第一透明光栅电极层4之间的多个驱动晶体管(TFT1和TFT2)；驱动晶体管(TFT1和TFT2)与第一子条形电极411、第二子条形电极611一一对应；
控制线(G11、G12……Gtae11’、G12’……)(G21、G22……Gtae21’、G22’……)与驱动晶体管(TFT1和TFT2)的栅极(13和13’)同层设置，信号输入线(D11、D12……)(D21、D22……)与驱动晶体管(TFT1和TFT2)的源极(14和14’)和漏极(15和15’)同层设置；
驱动晶体管(TFT1和TFT2)的栅极(13和13’)与控制线电连接，驱动晶体管(TFT1和TFT2)的源极(14和14’)与信号输入线电连接，驱动晶体管(TFT1和TFT2)的漏极(15和15’)与第一子条形电极411或第二子条形电极611电连接。
需要说明的是，本公开实施例的图10示意的是第一透明光栅电极层4以及对应的控制线(G11、G12……Gtae11’、G12’……)、信号输入线(D11、D12……)、TFT1和第一信号引线(L11、L12……L11’、L12’……，后续介绍)的平面示意图，图11示意的是第二透明光栅电极层6以及对应的控制线(G21、G22……Gtae21’、G22’……)、信号输入线(D21、D22……)、TFT2和第二信号引线(L21、L22……L21’、L22’……，后续介绍)的平面示意图。
在具体实施时，在本公开实施例提供的上述液晶光栅中，如图9-图11所示，TFT通过G控制导通或关闭，D信号通过TFT充入或放出。
本公开实施例通过采用驱动晶体管(TFT1和TFT2)控制每条第一子条形电极411和第二子条形电极611的开关，即每条第一子条形电极411和第二子条形电极611可通过对应的TFT单独控制开关，实现透光与不透光切换，这样可搭配人眼追踪模块实时获取观看者的眼睛所在的位置，驱动模块根据人眼追踪模块获取的观看者眼睛所在的当前位置，控制当前位置对应的驱动晶体管的开关，使得液晶光栅形成交替排列的透光区和暗态区，使观看者的左眼通过液晶光栅的透光区看到显示面板显示的左眼图像，右眼通过透光区看到显示面板显示的右眼图像，可以精准控制透光区和暗态区，从而既能实现3D显示中因观看者移动中的运动视差，又能消除观看位置变化带来的摩尔纹和视图串扰。并且，当观看者位置发生改变时，通过人眼追踪模块追踪人眼位置，通过第一子条形电极411和第二子条形电极611对应的TFT单独控制开关，实时调整光栅开口和位置，可精准控制液晶光栅的狭缝宽度Ws，从而通过改变光栅狭缝宽度Ws来调整观察者最佳观看距离L以及调节视点数K，从而提供最佳的观看体验。
在具体实施时，在本公开实施例提供的上述液晶光栅中，如图9-图11所示，控制线包括第一控制线(G11、G12……Gtae11’、G12’……)和第二控制线(G21、G22……Gtae21’、G22’……)，信号输入线包括第一信号输入线(D11、D12……)和第二信号输入线(D21、D22……)，驱动晶体管包括第一驱动晶体管TFT1和第二驱动晶体管TFT2；其中，
第一驱动晶体管TFT1的栅极(13和13’)与对应的第一控制线(G11、G12……Gtae11’、G12’……)电连接，第一驱动晶体管TFT1的源极(14和14’)与对应的第一信号输入线(D11、D12……)电连接，第一驱动晶体管TFT1的漏极(15和15’)与对应的第一子条形电极411电连接；
第二驱动晶体管TFT2的栅极(13和13’)与对应的第二控制线(G21、G22……Gtae21’、G22’……)电连接，第二驱动晶体管TFT2的源极(14和 14’)与对应的第二信号输入线(D21、D22……)电连接，第二驱动晶体管TFT2的漏极(15和15’)与对应的第二子条形电极611电连接。
具体地，如图9和图10所示，第一驱动晶体管TFT1的栅极13与对应的第一控制线(G11、G12……Gtae11’、G12’……)电连接，第一驱动晶体管TFT1的源极14与对应的第一信号输入线(D11、D12……)电连接，第一驱动晶体管TFT1的漏极15与对应的第一子条形电极411电连接。
具体地，如图9和图11所示，第二驱动晶体管TFT2的栅极13’与对应的第二控制线(G21、G22……Gtae21’、G22’……)电连接，第二驱动晶体管TFT2的源极14’与对应的第二信号输入线(D21、D22……)电连接，第二驱动晶体管TFT2的漏极15’与对应的第二子条形电极611电连接。
在具体实施时，在本公开实施例提供的上述液晶光栅中，同一第一条形电极电连接的各第一驱动晶体管的栅极与同一条第一控制线电连接，具体地，如图10所示，左起第一个第一条形电极41包括的三个第一子条形电极411分别电连接的各第一驱动晶体管TFT1的栅极与第一控制线G11电连接，左起第二个第一条形电极41包括的三个第一子条形电极411分别电连接的各第一驱动晶体管TFT1的栅极与第一控制线G11电连接，左起第三个第一条形电极41包括的三个第一子条形电极411分别电连接的各第一驱动晶体管TFT1的栅极与第一控制线G11电连接；左起第四个第一条形电极41包括的三个第一子条形电极411分别电连接的各第一驱动晶体管TFT1的栅极与第一控制线G12电连接，左起第五个第一条形电极41包括的三个第一子条形电极411分别电连接的各第一驱动晶体管TFT1的栅极与第一控制线G12电连接，左起第六个第一条形电极41包括的三个第一子条形电极411分别电连接的各第一驱动晶体管TFT1的栅极与第一控制线G12电连接；依次类推……。
在具体实施时，在本公开实施例提供的上述液晶光栅中，一条第一控制线至少与一条第一条形电极电连接的各第一驱动晶体管的栅极电连接，具体地，如图10所示，第一控制线G11与左起第一至第三条第一条形电极41包括的各第一子条形电极411电连接的各第一驱动晶体管TFT1的栅极电连接； 第一控制线G12与左起第四至第六条第一条形电极41包括的各第一子条形电极411电连接的各第一驱动晶体管TFT1的栅极电连接；第一控制线G13与左起第七至第九条第一条形电极41包括的各第一子条形电极411电连接的各第一驱动晶体管TFT1的栅极电连接；依次类推……。
本公开实施例通过采用一条第一控制线至少与一条(例如三条)第一条形电极电连接的各第一驱动晶体管的栅极电连接，可以减少控制线的数量，提高透过率。
需要说明的是，本公开实施例是以一条第一控制线与三条第一条形电极电连接的各第一驱动晶体管的栅极电连接，当然，在具体实施时，一条第一控制线可以与一条、两条或更多条第一条形电极电连接的各第一驱动晶体管的栅极电连接，但是超过三条的话，第一控制线的负载可能无法满足要求，若一条第一控制线只与一条第一条形电极电连接的各第一驱动晶体管的栅极电连接，则第一控制线的数量太多。因此，本公开实施例优选一条第一控制线与两条或三条第一条形电极电连接的各第一驱动晶体管的栅极电连接。
在具体实施时，在本公开实施例提供的上述液晶光栅中，如图9和图11所示，同一第二条形电极61电连接的各第二驱动晶体管TFT2的栅极与同一条第二控制线电连接，且一条第二控制线至少与一条第二条形电极61电连接的各第二驱动晶体管TFT2的栅极电连接。具体地，图11中第二条形电极61包括的各第二子条形电极611的连接关系可以参见图10中的描述，图11中的连接关系与图10中的连接关系相同，在此不做赘述。并且，本公开实施例优选一条第二控制线与两条或三条第二条形电极电连接的各第二驱动晶体管的栅极电连接。
在具体实施时，在本公开实施例提供的上述液晶光栅中，如图10和图11所示，周边区BB包括多条第一信号引线(L11、L12……L11’、L12’……)和多条第二信号引线(L21、L22……L21’、L22’……)。
具体地，如图10所示，同一条第一条形电极(例如左起第一个第一条形电极41)电连接的各第一驱动晶体管TFT1的源极通过对应的第一信号输入 线(D11、D14、D17)与同一条第一信号引线L11电连接，不同第一条形电极(例如左起第一个第一条形电极41和第二个第一条形电极41)电连接的各第一驱动晶体管TFT1的源极通过对应的第一信号输入线(D11、D12)与不同的第一信号引线(L11、L12)电连接。
具体地，如图11所示，同一条第二条形电极(例如左起第一个第二条形电极61)电连接的各第二驱动晶体管TFT2的源极通过对应的第二信号输入线(D21、D24、D27)与同一条第二信号引线L11’电连接，不同第二条形电极(例如左起第一个第二条形电极61和第二个第二条形电极61)电连接的各第二驱动晶体管TFT2的源极通过对应的第二信号输入线(D21、D22)与不同的第二信号引线(L11’、L12’)电连接。
本公开实施例提供的图10和图11所示的结构是以同一条第一条形电极包括的各第一子条形电极与同一条第一信号引线电连接为例，即同一条第一条形电极包括的各第一子条形电极同时加载驱动电压或同时不加载驱动电压；以同一条第二条形电极包括的各第二子条形电极与同一条第二信号引线电连接，即同一条第二条形电极包括的各第二子条形电极同时加载驱动电压或同时不加载驱动电压为例；图10和图11可以实现某一列或某几列的列驱动。当然，在具体实施时，同一条第一条形电极中的各第一子条形电极电连接的各第一驱动晶体管的源极通过对应的第一信号输入线与不同条第一信号引线电连接，不同第一条形电极电连接的各第一驱动晶体管的源极通过对应的第一信号输入线与不同的第一信号引线电连接，即所有的第一子条形电极分别采用不同的第一信号引线加载驱动电压；同一条第二条形电极中的各第二子条形电极电连接的各第二驱动晶体管的源极通过对应的第二信号输入线与不同条第二信号引线电连接，不同第二条形电极电连接的各第二驱动晶体管的源极通过对应的第二信号输入线与不同的第二信号引线电连接，即所有的第二子条形电极分别采用不同的第二信号引线加载驱动电压；这样可以实现分区驱动，能够更精细的控制光栅的透光区和暗态区。
具体地，第一透明光栅电极层和第二透明光栅电极层采用分区驱动的结 构示意图和图10、图11基本相同，区别仅在于：分区驱动中所有的第一子条形电极分别与不同的第一信号引线电连接，所有的第二子条形电极分别与不同的第二信号引线电连接。
在具体实施时，在本公开实施例提供的上述液晶光栅中，如图10和图11所示，光栅区AA划分为至少一个区域(例如沿AA的中心划分为两个区域A1和A2)，针对每一区域(例如第一区域A1)，各第一条形电极41划分为多个第一组(例如左起每三个为一组)，每一第一组内的第一条形电极41数量相同(例如每一组均包括3个第一条形电极41)，且第一信号引线(L11、L12……)的数量与每一第一组内的第一条形电极41数量相同(第一信号引线的数量为3个)；各第二条形电极61划分为多个第二组(例如每一组均包括3个第二条形电极61)，每一第二组内的第二条形电极61数量相同(例如每一组均包括3个第二条形电极61)，且第二信号引线(L21、L22……)的数量与每一第二组内的第二条形电极61数量相同(第二信号引线的数量为3个)。
具体地，如图10所示，各第一组内，位置相同的第一条形电极通过同一条第一信号输入线与同一条第一信号引线电连接，例如左起第一个第一条形电极41、第四条第一条形电极41、第七条第一条形电极41……均通过第一信号输入线D11与第一信号引线L11电连接，左起第二条第一条形电极41、第五条第一条形电极41、第八条第一条形电极41……均通过第一信号输入线D12与第一信号引线L12电连接，左起第三条第一条形电极41、第六条第一条形电极41、第九条第一条形电极41……均通过第一信号输入线D13与第一信号引线L13电连接，依次类推。位置不同的第一条形电极通过不同条第一信号输入线与不同的第一信号引线电连接，例如左起第一个第一条形电极41、第二条第一条形电极41、第三条第一条形电极41分别通过第一信号输入线D11、D12、D13与对应的第一信号引线L11、L12、L13电连接，左起第四条第一条形电极41、第五条第一条形电极41、第六条第一条形电极41分别通过第一信号输入线D11、D12、D13与对应的第一信号引线L11、L12、L13 电连接，依次类推。
具体地，如图11所示，各第二组内，位置相同的第二条形电极通过同一条第二信号输入线与同一条第二信号引线电连接，例如左起第一条第二条形电极61、第四条第二条形电极61、第七条第二条形电极61……均通过第二信号输入线D21与第二信号引线L21电连接，左起第二个第二条形电极61、第五条第二条形电极61、第八条第二条形电极61……均通过第二信号输入线D22与第二信号引线L22电连接，左起第三条第二条形电极61、第六条第二条形电极61、第九条第二条形电极61……均通过第二信号输入线D23与第二信号引线L23电连接，依次类推。位置不同的第二条形电极通过不同条第二信号输入线与不同的第二信号引线电连接，例如左起第一条第二条形电极61、第二个第二条形电极61、第三条第二条形电极61分别通过第二信号输入线D21、D22、D23与对应的第二信号引线L21、L22、L23电连接，左起第四条第二条形电极61、第五条第二条形电极61、第六条第二条形电极61分别通过第二信号输入线D21、D22、D23与对应的第二信号引线L21、L22、L23电连接，依次类推。
具体地，如图10所示，位于第一区域A1内的第一控制线(G11、G12……)分别与栅极驱动电路GOA1电连接，位于第二区域A2内的第一控制线(Gtae11’、G12’……)分别与栅极驱动电路GOA2电连接，即由两个GOA单元控制第一控制线(G11、G12……Gtae11’、G12’……)按照一定时序逐行打开。
具体地，如图11所示，位于第一区域A1内的第二控制线(G21、G22……)分别与栅极驱动电路GOA1电连接，位于第二区域A2内的第二控制线(Gtae21’、G22’……)分别与栅极驱动电路GOA2电连接，即由两个GOA单元控制第二控制线(G21、G22……Gtae21’、G22’……)按照一定时序逐行打开。
在具体实施时，在本公开实施例提供的液晶光栅中，如图9所示，还包括位于驱动晶体管(TFT1和TFT2)和第一透明光栅电极层4之间的平坦层 16，第一驱动晶体管TFT1包括层叠设置的第一栅极13、第一有源层17、第一源极14和第一漏极15，第一子条形电极411通过贯穿平坦层16的过孔与第一漏极15电连接；
第二驱动晶体管TFT2包括层叠设置的第二栅极13’、第二有源层17’、第二源极14’和第二漏极15’，第二子条形电极611通过贯穿平坦层16和绝缘层5的过孔与第二漏极15’电连接；
第一栅极13与第二栅极13’同层设置，第一有源层17与第二有源层17’同层设置，第一源极14和第一漏极15与第二源极14’和第二漏极15’同层设置。这样具有相同功能的膜层可以采用一次构图工艺制作，降低制作工艺及降低制作成本。
在具体实施时，在本公开实施例提供的液晶光栅中，如图9-图11所示，第一信号引线(L11、L12……)与第一栅极13同层设置，第二信号引线(L21、L22……)与第一栅极13’同层设置。这样，只需要在形成第一栅极13、第一栅极13’时改变原有的构图图形，即可通过一次构图工艺形成第一信号引线(L11、L12……)、第二信号引线(L21、L22……)与第一栅极13、第一栅极13’的图形，不用增加单独制备第一信号引线(L11、L12……)、第二信号引线(L21、L22……)的工艺，可以简化制备工艺流程，节省生产成本，提高生产效率。
在具体实施时，在本公开实施例提供的液晶光栅中，如图9、图13和图14所示，图13和图14为图9中局部膜层示意图，还包括位于所述第一栅极13和所述第一有源层17之间的栅绝缘层18，第一信号引线L11通过贯穿栅绝缘层18的过孔与第一信号输入线D11电连接，第二信号引线L21通过贯穿栅绝缘层18的过孔与第二信号输入线D21电连接。
在具体实施时，为了统一制作工艺，如图9-图11所示，所有的TFT1和TFT2可以均为N型晶体管；当然，所有的TFT1和TFT2也可以均为P型晶体管。
下面以所有的TFT1和TFT2均为N型晶体管为例，对本公开实施例提供 的TN型液晶光栅的工作原理进行说明，时序如图15和图16所示，GOA1和GOA2同时工作，GOA1从G11到G 1n逐行打开，GOA2从G11’到G 1n’逐行打开，GOA1和GOA2电连接的序号相同的G线控制相同行的D信号。由于GOA1和GOA2的时序相同，图15和图16仅示意GOA1的工作时序，且以G1到G n表示G11到G 1n，D 1到D n表示D 11到D 1n。
若为2D显示模式(对应图15的时序)，则控制线G全部输入低电平信号(即不通电)，所有TFT均关闭，TN型液晶光栅为常白模式(可以节省功耗)，即第一透明光栅电极层4和第二透明光栅电极层6均未加载驱动信号，液晶层3中的液晶分子未发生偏转，线偏振光经过液晶层3后偏振方向旋转90°，可以透过第二偏光片12，因此液晶不发生偏转的区域对应透光区，此时TN型的液晶光栅为全透过模式(液晶光栅全部形成透光区)且透过率最大。
若为3D显示模式(对应图16的时序)，光栅狭缝位置对应的第一子条形电极411和第二子条形电极611电连接的TFT1和TFT2的栅极通过相应的控制线输入低电平信号以关闭，为透光模式，即形成透光区；其余位置的第一子条形电极411和第二子条形电极611电连接的TFT1和TFT2的栅极通过相应的控制线输入高电平信号以导通，并通过第一信号引线和第二信号引线向对应的信号输入线D加载驱动电压，驱动电压通过导通的TFT1和TFT2传输至第一子条形电极411和第二子条形电极611，为遮光模式，即形成暗态区；从而液晶光栅形成交替排列的透光区和暗态区。由于第一子条形电极411和第二子条形电极611由若干根D线周期性控制，从而呈现出等间距狭缝光栅。
综上所述，本公开实施例提供的液晶光栅，通过TFT对每根子条形电极单独充放电实现导通与关闭，搭配人眼追踪模块来精准控制光栅的狭缝和位置，既能实现3D显示中因观看者移动中的运动视差，又能消除观看位置变化带来的摩尔纹和串扰。
基于同一发明构思，本公开实施例还提供了一种用于驱动上述液晶光栅的驱动方法，如图17所示，该驱动方法包括：
S1701、在2D显示模式下，驱动液晶光栅全部形成透光区；
S1702、在3D显示模式下，驱动液晶光栅形成交替排列的透光区和暗态区。
本公开实施例提供的上述驱动方法的原理说明可以参见前述一种液晶光栅中的对2D和3D显示时的原理说明，在此不做赘述。
在具体实施时，在本公开实施例提供的上述液晶光栅的驱动方法中，如图18所示，在3D显示模式下，驱动液晶光栅形成交替排列的透光区和暗态区，具体可以包括：
S1801、获取观看者的左眼或右眼相对于液晶光栅的各透光区域的当前位置信息；
S1802、根据确定的各当前位置信息，通过相应的控制线控制当前位置信息位置处的驱动晶体管关闭，以形成透光区；控制其余位置处的驱动晶体管导通，并通过第一信号引线和第二信号引线向对应的信号输入线加载驱动电压，驱动电压通过导通的驱动晶体管传输至第一条形电极和第二条形电极，以形成暗态区。
具体地，上述在3D显示模式下，驱动液晶光栅形成交替排列的透光区和暗态区，可以参见前述一种液晶光栅中的对3D显示时的具体原理说明，在此不做赘述。
基于同一发明构思，本公开实施例还提供了一种3D显示装置，如图19所示，包括显示面板100、本公开实施例提供的上述液晶光栅200以及人眼追踪模块(未示出)；其中，
人眼追踪模块用于获取观看者的眼睛所在的位置；
根据人眼追踪模块获取的观看者眼睛所在的当前位置，控制液晶光栅200形成交替排列的透光区和暗态区，使观看者的左眼通过液晶光栅200的透光区看到显示面板100显示的左眼图像，右眼通过透光区看到显示面板100显示的右眼图像。
在具体实施时，在本公开实施例提供的上述3D显示装置，如图19所示，显示面板100可以为液晶显示面板，液晶光栅200设置于液晶显示面板(100) 的入光侧。液晶显示面板(100)可以包括相对设置的第三基板30和第四基板40，位于第三基板30和第四基板40之间的液晶层50，位于第三基板30面向液晶层50一侧的阵列基板60，位于第四基板40面向液晶层50一侧的彩膜基板70，以及位于第三基板30和第四基板40之间且位于液晶显示面板四周的封框胶层80；彩膜基板70包括黑矩阵71和彩膜层72(例如红色彩膜R、绿色彩膜G和蓝色彩膜B)，黑矩阵71具有多个开口，彩膜层72位于黑矩阵71的开口内。
如图19所示，液晶显示面板(100)和液晶光栅200通过中间玻璃90贴合在一起，贴合对位标记(mark)分别设置在阵列基板60和第二基板2上。其中玻璃90的厚度为液晶光栅200的放置高度H。
本公开实施例提供的3D显示装置，通过将液晶光栅200设置于液晶显示面板(100)的入光侧，当液晶显示面板(100)包括触控电极时，液晶光栅200不会对液晶显示面板(100)中的触控电极产生屏蔽，避免出现触控失效的问题，从而可以提高液晶显示面板(100)的触控灵敏度及准确度。
在具体实施时，本公开实施例提供的显示面板不限于液晶显示面板，例如，本公开实施例提供的显示面板可以为OLED显示面板，则液晶光栅设置于OLED显示面板的出光侧。
在具体实施时，本公开实施例提供的3D显示装置根据显示面板的类型，还可以包括本领域技术人员熟知的其它功能性膜层，在此不一一列举。
该3D显示装置可以为：手机、平板电脑、电视机、显示器、笔记本电脑、数码相框、导航仪等任何具有显示功能的产品或部件。由于该3D显示装置解决问题的原理与前述一种液晶光栅相似，因此该3D显示装置的实施可以参见上述液晶光栅的实施例，重复之处不再赘述。
本公开实施例提供的液晶光栅、其驱动方法及3D显示装置，在液晶光栅应用于3D显示装置时，通过对第一透明光栅电极层中的部分第一条形电极加载驱动电压，以及部分第一条形电极未加载驱动电压，可驱动液晶光栅形成交替排列的透光区和暗态区，使观看者的左眼通过液晶光栅的透光区看到显 示面板显示的左眼图像，右眼通过透光区看到显示面板显示的右眼图像，以实现裸眼3D显示。本公开实施例通过将至少部分第一条形电极沿第一方向上分割成独立设置的至少两个第一子条形电极，这样可以降低分割成独立设置的至少两个第一子条形电极的各第一条形电极的电阻，可以减小信号衰减和延迟，从而提高液晶光栅的性能。
尽管已描述了本发明的优选实施例，但本领域内的技术人员一旦得知了基本创造性概念，则可对这些实施例作出另外的变更和修改。所以，所附权利要求意欲解释为包括优选实施例以及落入本发明范围的所有变更和修改。
显然，本领域的技术人员可以对本发明实施例进行各种改动和变型而不脱离本发明实施例的精神和范围。这样，倘若本发明实施例的这些修改和变型属于本发明权利要求及其等同技术的范围之内，则本发明也意图包含这些改动和变型在内。

Claims (21)

  1. 一种液晶光栅，其中，包括：
    第一基板；
    第二基板，所述第二基板与所述第一基板相对设置；
    液晶层，所述液晶层位于所述第一基板与所述第二基板之间；
    第一透明光栅电极层，位于所述第一基板面向所述液晶层的一侧；所述第一透明光栅电极层包括沿第一方向延伸且沿第二方向排列的多个间隔设置的第一条形电极；其中，
    至少部分所述第一条形电极沿所述第一方向上分割成独立设置的至少两个第一子条形电极。
  2. 根据权利要求1所述的液晶光栅，其中，每一所述第一条形电极沿所述第一方向上均分割为独立设置的至少两个所述第一子条形电极。
  3. 根据权利要求1或2所述的液晶光栅，其中，还包括：位于所述第一透明光栅电极层面向所述液晶层一侧的绝缘层，以及位于所述绝缘层面向所述液晶层一侧的第二透明光栅电极层；
    所述第二透明光栅电极层包括沿所述第一方向延伸且沿所述第二方向排列的多个间隔设置的第二条形电极，所述第二条形电极在所述第一基板的正投影覆盖相邻两个所述第一条形电极之间的区域在所述第一基板的正投影；其中，
    至少部分所述第二条形电极沿所述第一方向上分割成独立设置的至少两个第二子条形电极。
  4. 根据权利要求3所述的液晶光栅，其中，每一所述第二条形电极沿所述第一方向上均分割为独立设置的至少两个所述第二子条形电极。
  5. 根据权利要求4所述的液晶光栅，其中，每一所述第二条形电极包括的所述第二子条形电极的数量与每一所述第一条形电极包括的所述第一子条形电极的数量相同。
  6. 根据权利要求4所述的液晶光栅，其中，所述第一条形电极包括的各所述第一子条形电极沿所述第一方向的长度相同，所述第二条形电极包括的各所述第二子条形电极沿所述第一方向的长度相同。
  7. 根据权利要求3-6任一项所述的液晶光栅，其中，所述液晶光栅具有光栅区和围绕所述光栅区设置的周边区；
    所述光栅区包括：沿所述第一方向延伸且沿所述第二方向排列的多条控制线，沿所述第二方向延伸且沿所述第一方向排列的多条信号输入线，以及位于所述第一基板和所述第一透明光栅电极层之间的多个驱动晶体管；所述驱动晶体管与所述第一子条形电极、所述第二子条形电极一一对应；
    所述控制线与所述驱动晶体管的栅极同层设置，所述信号输入线与所述驱动晶体管的源极和漏极同层设置；
    所述驱动晶体管的栅极与所述控制线电连接，所述驱动晶体管的源极与所述信号输入线电连接，所述驱动晶体管的漏极与所述第一子条形电极或所述第二子条形电极电连接。
  8. 根据权利要求7所述的液晶光栅，其中，所述控制线包括第一控制线和第二控制线，所述信号输入线包括第一信号输入线和第二信号输入线，所述驱动晶体管包括第一驱动晶体管和第二驱动晶体管；其中，
    所述第一驱动晶体管的栅极与所述第一控制线电连接，所述第一驱动晶体管的源极与所述第一信号输入线电连接，所述第一驱动晶体管的漏极与所述第一子条形电极电连接；
    所述第二驱动晶体管的栅极与所述第二控制线电连接，所述第二驱动晶体管的源极与所述第二信号输入线电连接，所述第二驱动晶体管的漏极与所述第二子条形电极电连接。
  9. 根据权利要求8所述的液晶光栅，其中，同一所述第一条形电极电连接的各所述第一驱动晶体管的栅极与同一条所述第一控制线电连接，且一条所述第一控制线至少与一条所述第一条形电极电连接的各所述第一驱动晶体管的栅极电连接。
  10. 根据权利要求9所述的液晶光栅，其中，同一所述第二条形电极电连接的各所述第二驱动晶体管的栅极与同一条所述第二控制线电连接，且一条所述第二控制线至少与一条所述第二条形电极电连接的各所述第二驱动晶体管的栅极电连接。
  11. 根据权利要求8-10任一项所述的液晶光栅，其中，所述周边区包括多条第一信号引线和多条第二信号引线，同一条所述第一条形电极电连接的各所述第一驱动晶体管的源极通过对应的所述第一信号输入线与同一条所述第一信号引线电连接，不同所述第一条形电极电连接的各所述第一驱动晶体管的源极通过对应的所述第一信号输入线与不同的所述第一信号引线电连接；
    同一条所述第二条形电极电连接的各所述第二驱动晶体管的源极通过对应的所述第二信号输入线与同一条所述第二信号引线电连接，不同所述第二条形电极电连接的各所述第二驱动晶体管的源极通过对应的所述第二信号输入线与不同的所述第二信号引线电连接。
  12. 根据权利要求8-10任一项所述的液晶光栅，其中，所述周边区包括多条第一信号引线和多条第二信号引线，同一条所述第一条形电极中的各所述第一子条形电极电连接的各所述第一驱动晶体管的源极通过对应的所述第一信号输入线与不同条所述第一信号引线电连接，不同所述第一条形电极电连接的各所述第一驱动晶体管的源极通过对应的所述第一信号输入线与不同的所述第一信号引线电连接；
    同一条所述第二条形电极中的各所述第二子条形电极电连接的各所述第二驱动晶体管的源极通过对应的所述第二信号输入线与不同条所述第二信号引线电连接，不同所述第二条形电极电连接的各所述第二驱动晶体管的源极通过对应的所述第二信号输入线与不同的所述第二信号引线电连接。
  13. 根据权利要求11或12所述的液晶光栅，其中，所述光栅区划分为至少一个区域，针对每一区域，各所述第一条形电极划分为多个第一组，每一所述第一组内的第一条形电极数量相同，且所述第一信号引线的数量与每一所述第一组内的第一条形电极数量相同；各所述第二条形电极划分为多个 第二组，每一所述第二组内的第二条形电极数量相同，且所述第二信号引线的数量与每一所述第二组内的第二条形电极数量相同；
    各所述第一组内，位置相同的第一条形电极通过同一条所述第一信号输入线与同一条所述第一信号引线电连接，位置不同的第一条形电极通过不同条所述第一信号输入线与不同的所述第一信号引线电连接；
    各所述第二组内，位置相同的第二条形电极通过同一条所述第二信号输入线与同一条所述第二信号引线电连接，位置不同的第二条形电极通过不同条所述第二信号输入线与不同的所述第二信号引线电连接。
  14. 根据权利要求11-13任一项所述的液晶光栅，其中，还包括位于所述驱动晶体管和所述第一透明光栅电极层之间的平坦层，所述第一驱动晶体管包括层叠设置的第一栅极、第一有源层、第一源极和第一漏极，所述第一子条形电极通过贯穿所述平坦层的过孔与所述第一漏极电连接；
    所述第二驱动晶体管包括层叠设置的第二栅极、第二有源层、第二源极和第二漏极，所述第二子条形电极通过贯穿所述平坦层和所述绝缘层的过孔与所述第二漏极电连接；
    所述第一栅极与所述第二栅极同层设置，所述第一有源层与所述第二有源层同层设置，所述第一源极和第一漏极与所述第二源极和第二漏极同层设置。
  15. 根据权利要求14所述的液晶光栅，其中，所述第一信号引线与所述第一栅极同层设置，所述第二信号引线与所述第一栅极同层设置。
  16. 根据权利要求15所述的液晶光栅，其中，还包括位于所述第一栅极和所述第一有源层之间的栅绝缘层，所述第一信号引线通过贯穿所述栅绝缘层的过孔与所述第一信号输入线电连接，所述第二信号引线通过贯穿所述栅绝缘层的过孔与所述第二信号输入线电连接。
  17. 根据权利要求1-16任一项所述的液晶光栅，其中，还包括位于所述第二基板面向所述液晶层一侧的公共电极层，所述公共电极层为整面设置的面状结构。
  18. 一种用于驱动权利要求1-17任一项所述的液晶光栅的驱动方法，其中，所述驱动方法包括：
    在2D显示模式下，驱动所述液晶光栅全部形成透光区；
    在3D显示模式下，驱动所述液晶光栅形成交替排列的透光区和暗态区。
  19. 根据权利要求18所述的液晶光栅的驱动方法，其中，在3D显示模式下，驱动所述液晶光栅形成交替排列的透光区和暗态区，具体包括：
    获取观看者的左眼或右眼相对于所述液晶光栅的各透光区域的当前位置信息；
    根据确定的各所述当前位置信息，通过相应的控制线控制所述当前位置信息位置处的驱动晶体管关闭，以形成所述透光区；控制其余位置处的驱动晶体管导通，并通过第一信号引线和第二信号引线向对应的信号输入线加载驱动电压，所述驱动电压通过导通的所述驱动晶体管传输至第一条形电极和第二条形电极，以形成暗态区。
  20. 一种3D显示装置，其中，包括显示面板、如权利要求1-17任一项所述的液晶光栅以及人眼追踪模块；其中，
    所述人眼追踪模块用于获取观看者的眼睛所在的位置；
    根据所述人眼追踪模块获取的观看者眼睛所在的当前位置，控制所述液晶光栅形成交替排列的透光区和暗态区，使观看者的左眼通过所述液晶光栅的透光区看到所述显示面板显示的左眼图像，右眼通过所述透光区看到所述显示面板显示的右眼图像。
  21. 根据权利要求20所述的3D显示装置，其中，所述显示面板为液晶显示面板，所述液晶光栅设置于所述液晶显示面板的入光侧；
    或者，所述显示面板为OLED显示面板，所述液晶光栅设置于所述OLED显示面板的出光侧。
PCT/CN2022/089370 2022-04-26 2022-04-26 液晶光栅、其驱动方法及3d显示装置 WO2023206091A1 (zh)

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Citations (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0915564A (ja) * 1995-06-30 1997-01-17 Sony Corp プラズマアドレス表示装置
CN101458412A (zh) * 2007-12-14 2009-06-17 乐金显示有限公司 电驱动液晶透镜和使用该电驱动液晶透镜的立体显示设备
CN102929048A (zh) * 2012-11-14 2013-02-13 中航华东光电有限公司 能同时兼容2d与3d的液晶狭缝光栅
CN203054398U (zh) * 2012-12-11 2013-07-10 中航华东光电有限公司 液晶光栅及2d/3d立体显示装置
CN203433240U (zh) * 2013-07-02 2014-02-12 深圳市亿思达显示科技有限公司 液晶狭缝光栅、立体显示装置
CN206057761U (zh) * 2016-09-09 2017-03-29 万维云视（上海）数码科技有限公司 一种液晶光栅、3d显示面板及显示装置
CN206863433U (zh) * 2017-06-30 2018-01-09 深圳超多维科技有限公司 一种液晶狭缝光栅及立体显示装置
CN108572489A (zh) * 2018-04-28 2018-09-25 京东方科技集团股份有限公司 液晶光栅和液晶光栅驱动方法及3d显示器

Patent Citations (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0915564A (ja) * 1995-06-30 1997-01-17 Sony Corp プラズマアドレス表示装置
CN101458412A (zh) * 2007-12-14 2009-06-17 乐金显示有限公司 电驱动液晶透镜和使用该电驱动液晶透镜的立体显示设备
CN102929048A (zh) * 2012-11-14 2013-02-13 中航华东光电有限公司 能同时兼容2d与3d的液晶狭缝光栅
CN203054398U (zh) * 2012-12-11 2013-07-10 中航华东光电有限公司 液晶光栅及2d/3d立体显示装置
CN203433240U (zh) * 2013-07-02 2014-02-12 深圳市亿思达显示科技有限公司 液晶狭缝光栅、立体显示装置
CN206057761U (zh) * 2016-09-09 2017-03-29 万维云视（上海）数码科技有限公司 一种液晶光栅、3d显示面板及显示装置
CN206863433U (zh) * 2017-06-30 2018-01-09 深圳超多维科技有限公司 一种液晶狭缝光栅及立体显示装置
CN108572489A (zh) * 2018-04-28 2018-09-25 京东方科技集团股份有限公司 液晶光栅和液晶光栅驱动方法及3d显示器

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