WO2023179842A1 - Power submodule, power module and method for producing a power module - Google Patents

Power submodule, power module and method for producing a power module Download PDF

Info

Publication number
WO2023179842A1
WO2023179842A1 PCT/EP2022/057346 EP2022057346W WO2023179842A1 WO 2023179842 A1 WO2023179842 A1 WO 2023179842A1 EP 2022057346 W EP2022057346 W EP 2022057346W WO 2023179842 A1 WO2023179842 A1 WO 2023179842A1
Authority
WO
WIPO (PCT)
Prior art keywords
power
power semiconductor
semiconductor device
submodules
cooling
Prior art date
Application number
PCT/EP2022/057346
Other languages
French (fr)
Inventor
Niko PAVLICEK
Chunlei Liu
Giovanni SALVATORE
Fabian MOHN
Original Assignee
Hitachi Energy Switzerland Ag
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Energy Switzerland Ag filed Critical Hitachi Energy Switzerland Ag
Priority to PCT/EP2022/057346 priority Critical patent/WO2023179842A1/en
Publication of WO2023179842A1 publication Critical patent/WO2023179842A1/en

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/18—High density interconnect [HDI] connectors; Manufacturing methods related thereto
    • H01L24/20—Structure, shape, material or disposition of high density interconnect preforms
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
    • H01L23/40—Mountings or securing means for detachable cooling or heating arrangements ; fixed by friction, plugs or springs
    • H01L23/4006—Mountings or securing means for detachable cooling or heating arrangements ; fixed by friction, plugs or springs with bolts or screws
    • H01L23/4012—Mountings or securing means for detachable cooling or heating arrangements ; fixed by friction, plugs or springs with bolts or screws for stacked arrangements of a plurality of semiconductor devices
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
    • H01L23/46—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements involving the transfer of heat by flowing fluids
    • H01L23/473—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements involving the transfer of heat by flowing fluids by flowing liquids
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/10—Bump connectors ; Manufacturing methods related thereto
    • H01L24/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L24/14—Structure, shape, material or disposition of the bump connectors prior to the connecting process of a plurality of bump connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
    • H01L25/10—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices having separate containers
    • H01L25/11—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices having separate containers the devices being of a type provided for in group H01L29/00
    • H01L25/115—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices having separate containers the devices being of a type provided for in group H01L29/00 the devices being arranged next to each other
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
    • H01L25/10—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices having separate containers
    • H01L25/11—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices having separate containers the devices being of a type provided for in group H01L29/00
    • H01L25/117—Stacked arrangements of devices
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/04105—Bonding areas formed on an encapsulation of the semiconductor or solid-state body, e.g. bonding areas on chip-scale packages
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/06—Structure, shape, material or disposition of the bonding areas prior to the connecting process of a plurality of bonding areas
    • H01L2224/0601—Structure
    • H01L2224/0603—Bonding areas having different sizes, e.g. different heights or widths
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/06—Structure, shape, material or disposition of the bonding areas prior to the connecting process of a plurality of bonding areas
    • H01L2224/061—Disposition
    • H01L2224/0618—Disposition being disposed on at least two different sides of the body, e.g. dual array
    • H01L2224/06181—On opposite sides of the body
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • H01L2224/13001—Core members of the bump connector
    • H01L2224/1302—Disposition
    • H01L2224/13022—Disposition the bump connector being at least partially embedded in the surface
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/14—Structure, shape, material or disposition of the bump connectors prior to the connecting process of a plurality of bump connectors
    • H01L2224/1401—Structure
    • H01L2224/1403—Bump connectors having different sizes, e.g. different diameters, heights or widths
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/18—High density interconnect [HDI] connectors; Manufacturing methods related thereto
    • H01L2224/20—Structure, shape, material or disposition of high density interconnect preforms
    • H01L2224/21—Structure, shape, material or disposition of high density interconnect preforms of an individual HDI interconnect
    • H01L2224/214—Connecting portions
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73251—Location after the connecting process on different surfaces
    • H01L2224/73267—Layer and HDI connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
    • H01L23/36—Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
    • H01L23/373—Cooling facilitated by selection of materials for the device or materials for thermal expansion adaptation, e.g. carbon
    • H01L23/3735—Laminates or multilayers, e.g. direct bond copper ceramic substrates
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/10—Bump connectors ; Manufacturing methods related thereto
    • H01L24/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L24/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/102—Material of the semiconductor or solid state bodies
    • H01L2924/1025—Semiconducting materials
    • H01L2924/10251—Elemental semiconductors, i.e. Group IV
    • H01L2924/10253—Silicon [Si]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/102—Material of the semiconductor or solid state bodies
    • H01L2924/1025—Semiconducting materials
    • H01L2924/10251—Elemental semiconductors, i.e. Group IV
    • H01L2924/10254—Diamond [C]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/102—Material of the semiconductor or solid state bodies
    • H01L2924/1025—Semiconducting materials
    • H01L2924/1026—Compound semiconductors
    • H01L2924/1027—IV
    • H01L2924/10272—Silicon Carbide [SiC]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/102—Material of the semiconductor or solid state bodies
    • H01L2924/1025—Semiconducting materials
    • H01L2924/1026—Compound semiconductors
    • H01L2924/1032—III-V
    • H01L2924/1033—Gallium nitride [GaN]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/13—Discrete devices, e.g. 3 terminal devices
    • H01L2924/1301—Thyristor
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/13—Discrete devices, e.g. 3 terminal devices
    • H01L2924/1304—Transistor
    • H01L2924/1305—Bipolar Junction Transistor [BJT]
    • H01L2924/13055—Insulated gate bipolar transistor [IGBT]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/13—Discrete devices, e.g. 3 terminal devices
    • H01L2924/1304—Transistor
    • H01L2924/1306—Field-effect transistor [FET]
    • H01L2924/13091—Metal-Oxide-Semiconductor Field-Effect Transistor [MOSFET]

Definitions

  • Power submodule Power module and method for producing a power module
  • the present disclosure relates to a power submodule , a power module and a method for producing a power module .
  • the disclosure relates to a method for producing a power submodule .
  • Embodiments of the disclosure relate to an improved power submodule and an improved power module . Further embodiments relate to a method for producing such a power submodule and for producing such a power module .
  • the power submodule is speci fied .
  • the power submodule comprises a power semiconductor device with a top side and a bottom side as well as an electrically isolating body surrounding the power semiconductor device .
  • the power submodule further comprises a top contact element with a terminal region on the top side of the power semiconductor device and an electrically conductive cooling element with a terminal region on the bottom side of the power semiconductor device .
  • the top contact element and the cooling element are in electrical contact with the power semiconductor device .
  • the terminal regions of the top contact element and of the cooling element face away from the power semiconductor device and in opposite directions in order to enable at least two such power submodules to be stacked on top of each other for a serial electrical connection .
  • the cooling element comprises a cooling structure for cooling the power semiconductor device .
  • power modules for HVDC applications with several stacked submodules are stacked above each other by using spring contact elements on the top side of a power semiconductor device . This shall ensure that , even when the power semiconductor device is destroyed, an electrical serial connection is maintained due to the spring contact element then forming a short circuit with the contact element on the bottom side of the power semiconductor device .
  • the present invention is , inter alia, based on the recognition that the spring contact elements limit heat conduction via the top side of a semiconductor device to a next cooling element in stacking direction .
  • the power module comprising one or more spring contact elements is a mechanically complex arrangement which requires many manufacturing steps and high material costs .
  • the spring contacts can be omitted . This is , inter alia, due to the electrically isolating body surrounding the power semiconductor device . Even i f the device should be destroyed, the semiconductor material cannot escape laterally so that the electrical contact between the top contact element on the top side and the cooling element on the bottom side is always maintained .
  • the top contact element of one power submodule in direct electrical and thermal contact with the cooling element of the next power submodule. This significantly improves the thermal properties of the whole power module.
  • top and bottom are not to be understood to be restrictive to directions along the gravitational direction. Instead, they may be used to characterize opposite sides or directions or the like.
  • the power semiconductor device is, e.g., a power semiconductor chip. It may be a power semiconductor switch.
  • the power submodule may comprise exactly one power semiconductor device or a plurality of power semiconductor devices which are, e.g., electrically connected to each other.
  • the power semiconductor device comprises at least one, e.g. exactly one, semiconductor body.
  • the semiconductor body may be made of Si or SiC or diamond or GaN.
  • Each power semiconductor device may be assigned an individual electrically isolating body, or all power semiconductor devices may be assigned the same electrically isolating body.
  • the electrically isolating body may be an encapsulation.
  • the isolating body is produced by transfer molding, like film-assisted transfer molding, compression molding, or injection molding.
  • the isolating body may comprise or consist of a thermoplastic or a thermosetting plastic.
  • the isolating body is a resin, e.g., with additional filler materials.
  • the isolating body may be formed in one piece.
  • the isolating body surrounds the power semiconductor device at least in lateral direction . In lateral direction, the power semiconductor device may be completely surrounded by the isolating body .
  • the isolating body may thereby be in direct contact with the power semiconductor device and may f ormf ittingly or conformally, respectively, surround the power semiconductor device .
  • the power semiconductor device may be embedded in the electrically isolating body .
  • a lateral direction is herein defined as a direction parallel to the top side and/or bottom side of the power semiconductor device .
  • a main extension plane of the cooling element and/or a top side of the cooling element may run parallel to the top/bottom side of the power semiconductor device .
  • the top side and the bottom side of the power semiconductor device are main sides of the device , being parallel to a main extension plane of the power semiconductor device , for example .
  • the top contact element herein also referred to as first contact element , may be in electrical contact with the top side .
  • the cooling element may be in electrical contact with the bottom side .
  • the bottom side of the power semiconductor device is opposite to the top side .
  • the thickness of the power semiconductor device measured as the distance between the top side and the bottom side , may be smaller than the lateral extensions of the top and bottom side , measured along the top side or bottom side .
  • the top side and the bottom side of the power semiconductor device are , e . g . , partially formed by the semiconductor body of the power semiconductor device .
  • the top contact element and the cooling element each comprise a terminal region which is foreseen for externally electrically contacting the top contact element and the cooling element and, with this, the power submodule.
  • the submodule is, e.g., configured to be operated with the top contact element and the cooling element lying on different electrical potentials.
  • the terminal regions are uncovered by the electrically isolating body. In an unmounted or unassembled state of the power submodule, the terminal regions may be exposed, i.e. freely accessible.
  • the terminal regions are, e.g., surfaces of the respective elements.
  • the top contact element and/or the cooling element may each be formed in one piece or may each be formed of several pieces.
  • Each of the top contact element and the cooling element is, e.g., formed of metal, like Al or Cu.
  • the top contact element is a solid metal block.
  • the terminal regions of the top contact element and the cooling element facing in opposite directions may each be flat and/or parallel to each other. In this way, electrically contacting the top contact element of one of the stacked power submodules with the terminal region of the next one of the stacked power submodules is particularly easy.
  • the cooling structure may be or may comprise a cooling channel and/or an arrangement of several cooling ribs and/or an arrangement of several cooling pin fins.
  • the cooling element may be a busbar.
  • the cooling element may be a carrier of the power submodule and may carry the power semiconductor device.
  • the cooling element may be a contiguous body.
  • the cooling element may have a larger lateral extension, measured parallel to the main extension plane of the cooling element , than the power semiconductor device .
  • the cooling structure comprises a cooling channel or several cooling channels for guiding a cooling fluid through the cooling element in order to cool the power semiconductor device .
  • the cooling channel may have several windings .
  • the cooling channel is s-shaped or meander-shaped .
  • the cooling channel may extend from one lateral end of the cooling element to another lateral end thereof .
  • the cooling channel may be a microchannel , e . g . with a diameter of the channel of less than 1 mm . Alternatively, a diameter of the channel is more than 1 mm .
  • the cooling fluid may be a liquid or a gas .
  • An inlet and/or an outlet of the cooling channel may each be arranged at a lateral side of the cooling element .
  • the inlet and the outlet are arranged such that two power submodules can be fluidically connected in series such that the outlet of one submodule is aligned with the inlet of the other submodule in order to form a fluid connection between the individual cooling channels .
  • the cooling elements of two power submodules may be fluidically connected in parallel such that the inlets are providable with cooling fluid of the same temperature .
  • the power submodule further comprises a further contact element , herein also referred to as second contact element , in electrical contact with the power semiconductor device .
  • the further contact element has a terminal region for externally electrically contacting the power submodule .
  • the power submodule is configured to be operated with the further contact element lying on a di f ferent electrical potential than the top contact element and/or than the cooling element .
  • the further contact element may be in electrical connection with the top side of the power semiconductor device .
  • the terminal region of the further contact element is uncovered by the electrically isolating body .
  • the terminal region of the further contact element may be exposed, i . e . freely accessible .
  • the terminal region of the further contact element may be a surface of the element for example .
  • the further contact element is formed in one piece or of several pieces . It may be formed of metal , like Al or Cu .
  • the further contact element may be a solid metal block .
  • the terminal regions of the top contact element and the further contact element are arranged on the same side of the power semiconductor device but at di f ferent heights with respect to the top side of the power semiconductor device .
  • the terminal regions of the top contact element and the further contact element are either both located in front or behind the power semiconductor device .
  • both terminal regions are located on the top side , i . e . in vertical direction behind the power semiconductor device .
  • Two elements being arranged on the same height with respect to a flat surface, like the top side of a power semiconductor device, herein means, e.g., that a plane running parallel to the surface crosses both elements.
  • two elements being located at different heights means, e.g., that each plane parallel to the surface and crossing one of the two elements does not cross the other one of the two elements .
  • the terminal regions of the top contact element and the further contact element are arranged at different heights.
  • the difference in height is at least 50 pm or at least 100 pm or at least 300 pm.
  • the terminal region of the top contact element may be positioned at a greater height than the terminal region of the further contact element.
  • the stacking of the power submodules without spring contacts is further simplified since complicated disentanglements of the top contact element and the further contact element are avoided.
  • the top contact element and/or the further contact element are embedded in the electrically isolating body.
  • the electrically isolating body may electrically isolate the top and the further contact element from each other.
  • a bottom contact element is arranged between the cooling element and the power semiconductor device.
  • the bottom contact element is electrically connected to the power semiconductor device.
  • the bottom contact element may be formed of metal, like Al or Cu.
  • the bottom contact element is a leadframe.
  • the bottom contact element may be formed in one piece or in several pieces.
  • the bottom contact element, herein also referred to as third contact element may be, e.g., a substrate with a top and bottom metallization and an isolating layer, e.g. of polymer or ceramic, in between the top and bottom metallization.
  • the bottom contact element may contact the power semiconductor device and/or its semiconductor body at the bottom side.
  • the bottom contact element and the cooling element are bonded to each other, e.g. sintered, soldered, welded or glued.
  • a bonding layer e.g. a sinter layer or solder layer or a welding layer or a glue layer, is formed between the bottom contact element and the cooling element.
  • the bonding layer may be in direct contact with both the cooling element and the bottom contact element .
  • the power semiconductor device is an electrical switch, e.g. a transistor.
  • the top contact element and the cooling element are electrically connected to the main electrodes of the power semiconductor device.
  • the main electrodes are, e.g., a cathode and an anode of the power semiconductor device.
  • the further contact element is connected to an auxiliary electrode of the power semiconductor device.
  • the auxiliary electrode is, e.g., a gate electrode.
  • the power semiconductor device is one of a MOSFET , MISFET , IGBT , BIGT or thyristor .
  • the top contact element is connected to a source electrode or emitter electrode of the power semiconductor device .
  • the further contact element may be connected to a gate electrode of the power semiconductor device .
  • the cooling element may be connected to a drain electrode or collector electrode of the power semiconductor device .
  • the source/emitter electrode and the gate electrode are located at the top side of the power semiconductor device and the drain/collector electrode are located at the bottom side of the power semiconductor device .
  • the power submodule comprises at least two power semiconductor devices . All features disclosed in connection with one power semiconductor device are also disclosed for all other semiconductor devices of the submodule .
  • each of the at least two power semiconductor devices is assigned an individual top contact element and/or an individual further contact element and/or an individual bottom contact element .
  • the at least two power semiconductor devices are assigned the same cooling element .
  • the at least two power semiconductor devices share the same cooling element .
  • the at least two power semiconductor devices are bonded onto the cooling element .
  • the cooling element thus , extends over the at least two power semiconductor devices .
  • the at least two power semiconductor devices are, e.g. arranged on a top side of the cooling element and are laterally spaced from each other.
  • the bottom side of the cooling element, opposite to its top side, may constitute a common terminal region for the at least two power semiconductor devices.
  • the power submodule further comprises at least two electrically isolating bodies. All features disclosed in connection with one electrically isolating body are also disclosed for all other electrically isolating bodies.
  • each of the at least two power semiconductor devices is assigned an individual isolating body which surrounds the assigned power semiconductor device.
  • the isolating bodies of two adjacent power semiconductor devices are laterally spaced from each other.
  • the power semiconductor devices with the individual isolating bodies may each be a so-called Chip-Scale-Package (CSP) component.
  • CSP Chip-Scale-Package
  • the footprint of each CSP component is, e.g., at most 50 % or at most 30 % greater than the footprint of the power semiconductor device thereof.
  • the footprint of the power semiconductor device is, e.g., mainly determined by the footprint of the semiconductor body thereof. For example, at least 90 % of the footprint of the power semiconductor device is attributed to the semiconductor body thereof.
  • the at least two power semiconductor devices are embedded in a common encapsulation.
  • the common encapsulation may be a thermoplastic or a thermosetting plastic, e . g . a resin .
  • the common encapsulation may be produced via molding, e . g . inj ection molding or trans fer molding or compression molding .
  • the common encapsulation is di f ferent from the electrically isolating body speci fied above .
  • Each power semiconductor device is assigned an individual electrically isolating body, whereas the common encapsulation is assigned to several power semiconductor devices .
  • the common encapsulation may be in direct contact with the electrically isolating bodies .
  • the at least two power semiconductor devices are each assigned a further individual contact element .
  • the individual further contact elements assigned to the at least two power semiconductor devices are electrically connected to each other .
  • they are connected by a connection element , herein also referred to as second connection element .
  • the second connection element may be in direct mechanical contact with the terminal regions of the further contact elements .
  • the second connection element is a leadframe or a rigid or flexible circuit board .
  • the second connection element is embedded in the common encapsulation .
  • the second connection element may be guided out of the common encapsulation, e.g. at a lateral side of the common encapsulation .
  • the common encapsulation e.g. a top side thereof, terminates flush with the terminal regions of the top contact elements.
  • the power module comprises several, i.e. two or more, power submodules according to any one of the embodiments described herein.
  • the power submodules are electrically connected to each other.
  • the power submodules are electrically connected in parallel and/or in series.
  • the power module may be adapted for processing currents of more than 10 A.
  • the power module may be a low voltage module adapted for processing voltages below 1 kV, or may be a medium voltage module adapted for processing voltages between 1 kV and 30 kV.
  • At least two power submodules are stacked above each other.
  • the stacked power submodules are, e.g., connected in series.
  • the terminal region of the top contact element of at least one of the stacked power submodules faces, and is electrically connected with, the terminal region of the cooling element of a next one of the stacked power submodules.
  • "next one” means the next one in stacking direction .
  • a cooling element is arranged on and in electrical contact with the terminal region of a top contact element of a last one of the stacked power submodules .
  • "Last one" herein means last one in stacking direction .
  • At least two power submodules are stacked above each other, said submodules are those comprising at least two power semiconductor devices to which a common cooling element is assigned .
  • These two power submodules are , e . g . , stacked directly on top of each other, i . e . without a power submodule between them .
  • the top contact elements of at least one of these stacked power submodules are electrically connected to each other by the cooling element of a next one of the stacked power submodules .
  • the terminal region of a top contact element of at least one of the stacked power submodules is in dry electrical contact with a terminal region of the cooling element of a next one of the stacked power submodules .
  • Dry electrical contact means that the terminal regions are only pressed against each other but are not bonded to each other .
  • the terminal regions adj oin each other in dry electrical contact .
  • the power module comprises a pressure arrangement which presses the stacked power submodules against each other in order to maintain the dry electrical contact .
  • the higher the pressure the higher the thermal conductivity between the terminal regions pressed against each other .
  • the pressure arrangement is , e . g . , electrically isolated from the power submodules .
  • the pressure arrangement may comprise a pin extending in stacking direction, e.g. through the submodules and the cooling elements thereof.
  • the pressure arrangement may comprise a pressure element at each longitudinal end of the pin.
  • the power submodules may be arranged between the pressure elements.
  • At least one of the pressure elements may be in threaded connection with the pin so that, when tightening the threaded connection, the power submodules are clamped between the pressure elements and are pressed against each other.
  • One pressure element being in threaded connection with the pin may be a nut.
  • the other one of the pressure elements may be a leaf spring.
  • a terminal region of a top contact element of at least one of the stacked power submodules is bonded to the terminal region of a next one of the stacked power submodules.
  • the terminal regions are directly bonded to each other, such as soldered, welded, sintered or glued.
  • a solder or sinter or welding or glue layer is arranged between the terminal regions that are bonded to each other. Ultrasonicwelding or laser-welding may be used, e.g., to bond the terminal regions .
  • the stacked power submodules are connected in a half-bridge configuration.
  • power submodules stacked above each other belong to two different sides (high side or low side) of the halfbridge .
  • a half bridge is, e.g., an electrical circuit comprising two switch structures connected in series between two DC connection points and providing an AC connection point there between .
  • the DC connection points and the AC connection point may be electrically connected to the terminals of the power module .
  • Each switch structure may comprise one or more power semiconductor devices connected in parallel .
  • the power module may be employed in an electrical converter, which, for example , may recti fy a DC voltage to be supplied to a DC link or a battery, such as a battery of an electric vehicle . It may also be possible that the inverter generates an AC voltage to be supplied to an electrical motor, such as the motor of an electric vehicle .
  • the power module may be used in automotive applications , such as electric cars , motorbikes , busses , of f-road construction vehicles , trucks and charging stations . Applications in the power grid are also possible with the power module being part of an electrical converter within a HVDC station that converts high-voltage AC to high-voltage DC and/or vice versa .
  • the power module comprises two or more power submodules , each power submodule comprising two or more power semiconductor devices connected in parallel . Two or more of the power submodules may be stacked above each other and connected in series .
  • a method for producing a power submodule is speci fied .
  • the method is , e . g . , suitable for producing a power submodule as described herein . Therefore , all features disclosed in connection with the power submodule are also disclosed for the method and vice versa .
  • the method comprises providing an arrangement with a cooling element and with at least two power semiconductor devices .
  • Each power semiconductor device has a top side and a bottom side .
  • Each power semiconductor device is assigned an individual top contact element with a terminal region, said top contact element is arranged on the top side and electrically connected to the respective power semiconductor device .
  • the power semiconductor devices are arranged, e . g . mounted, next to each other on the cooling element and are electrically connected to the cooling element , wherein the terminal regions of the top contact elements face away from the cooling element .
  • an encapsulation is applied on the cooling element so that the power semiconductor devices are at least laterally surrounded by the encapsulation .
  • the top contact elements are thereby embedded in the encapsulation .
  • the top contact elements and/or the encapsulation are partially stripped, e . g . planari zed, until the terminal regions of the top contact elements facing away from the cooling element terminate flush with the encapsulation and until the terminal regions of the top contact elements are at the same height with respect to the cooling element or a top side thereof , respectively .
  • the bottom contact elements assigned to the power semiconductor devices are electrically connected to the cooling element .
  • the bottom contact elements may be bonded to the cooling element .
  • a method for producing a power module is speci fied .
  • the method is , e . g . , suited for producing a power module according to any of the embodiments described herein . Therefore , all features disclosed in connection with the power module are also disclosed for the method for producing a power module and vice versa .
  • the method comprises a step of providing at least two power submodules according to any of the embodiments described herein and electrically connecting the power submodules to each other .
  • At least two power submodules are electrically connected in series by stacking the power submodules to be connected in series above each other and electrically connecting a top contact element of at least one of the stacked power submodules to the cooling element of a next one of the power submodules .
  • the resulting arrangement is herein also referred to as an assembly .
  • the method comprises producing several assemblies of power submodules connected in series as mentioned above . These assemblies are then connected in parallel .
  • Figures 1 and 2 show a first exemplary embodiment of the power submodule
  • Figure 3 shows a second exemplary embodiment of the power submodule
  • Figures 4 to 6 show exemplary embodiments of the power module
  • Figure 7 shows a flowchart of an exemplary embodiment of the method for producing a power submodule
  • Figure 8 shows a flowchart of an exemplary embodiment of the method for producing a power module .
  • FIG. 1 shows a first exemplary embodiment of the power submodule 200 in a cross-sectional view .
  • the power submodule comprises a power component 100 mounted on a top side of an electrically conductive cooling element 6 .
  • the power component 100 comprises a power semiconductor device 1 as well as a first 3 , a second 4 and a third 5 contact element .
  • the first contact element 4 is herein also referred to as top contact element .
  • the second contact element 5 is herein also referred to as further contact element .
  • the third contact element 5 is herein also referred to as bottom contact element .
  • the power semiconductor device 1 is, e.g., a transistor, like an IGBT or a MOSFET, or a thyristor.
  • the first 3 and the second 4 contact element are electrically connected to the top side 10 of the power semiconductor device 1 and the third contact element 5 is electrically connected to a bottom side 12 of the power semiconductor device 1.
  • the first contact element 3 is electrically connected to an emitter or source electrode of the power semiconductor device 1
  • the second contact element 4 is electrically connected to a gate electrode of the power semiconductor device 1
  • the third contact element 5 is electrically connected to a drain or collector electrode of the power semiconductor device 1.
  • the power semiconductor device 1, i.e. a semiconductor body thereof, may be based on a large bandgap material, like SiC or GaN or diamond.
  • the power semiconductor device 1 and the first 3 and second 4 contact elements are surrounded and embedded in an electrically isolating body 2.
  • the isolating body 2 is, e.g., an encapsulation produced by transfer molding or injection molding.
  • the isolating body 2 is made of a resin.
  • the contact elements 3, 4, 5 are electrically isolated from each other so that, during operation, they may lie on different electrical potentials.
  • the first 3 and the second 4 contact element are partially electrically isolated from each other via the isolating body 2.
  • Each of the contact elements 3, 4, 5 and the cooling element 6 comprises a respective terminal region 30, 40, 50, 60 in the form of a terminal surface.
  • the terminal regions 30, 40, 60 are exposed and freely accessible from outside for an external electric connection.
  • the terminal regions 30, 40 of the first 3 and second 4 contact element are arranged on the same side of the power semiconductor device 1 but at different heights with respect to the top side 10 of the power semiconductor device 1.
  • the terminal regions 50, 60 of the third contact element 5 and the cooling element 6 are arranged on a different side of the power semiconductor device 1 to the terminal regions 30, 40.
  • the first contact element 3 and the second contact element 4 both project out of a top side 20 of the electrically isolating body 2, the top side 20 of which runs essentially parallel to the top side 10 of the power semiconductor device 1.
  • the cooling element of figure 1 is, e.g., formed of metal, like Cu.
  • the cooling element 6 comprises a cooling structure 7 in the form of a cooling channel which is configured to guide a cooling liquid through the cooling element 6.
  • the cooling channel 7 may be a microchannel.
  • the cooling channel 7 extends in a meander shape through the cooling element 6 (see also figure 6) .
  • the terminal region 50 of the third contact element 5 is bonded to a top side of the cooling element 6 and thereby electrically connected to the cooling element 6.
  • a solder layer or sinter layer or glue layer 65 is formed between the third contact element 5 and the cooling element
  • the cooling element 6 has a larger lateral extension than the power component 100 .
  • the power component 100 in figure 1 is , e . g . , a so-called Chip-Scale-Package in which the footprint of the whole component 100 is mainly determined by the footprint of the power semiconductor device 1 or by the semiconductor body thereof .
  • the footprint of the whole component 100 is at most 50 % larger than the footprint of the power semiconductor device 1 .
  • Figure 2 shows the submodule 200 of figure 1 in plan view on the top side 20 of the isolating body 2 .
  • the area of the terminal region 30 of the first contact element 3 is at least 50 % of the area of the top side 10 of the power semiconductor device 1 .
  • Figure 3 shows a further exemplary embodiment of the power submodule 200 .
  • the power submodule 200 of figure 3 comprises two power components 100 , each with an individual power semiconductor device 1 , individual first 3 , second 4 and third 5 contact elements and an individual isolating body 2 .
  • Both power components 100 are mounted on the same cooling element 6 laterally next to each other and are electrically connected to the cooling element 6 each via a bond layer 65 .
  • the cooling element 6 electrically connects the third contact elements 5 of both power components 100 with each other .
  • the second contact elements 4 are also electrically connected to each other via a connection element 400 , herein also referred to as second connection element .
  • the power components 100 are both embedded in a common encapsulation 25, which is, e.g., a resin.
  • the second connection element 400 is also embedded in the encapsulation 25 and projects out of a lateral side of the common encapsulation 25.
  • the terminal regions 30 of the first contact elements 3 terminate flush with the encapsulation 25.
  • the power submodule of figure 3 may be produced as follows (see also flowchart of figure 7) .
  • a step Sl_l two power components 100 according to figure 1 are mounted on a cooling element 6, e.g. bonded to the cooling element 6.
  • the power components 100 are encapsulated with a common encapsulation 25. This may be done by transfer molding or injection molding, for example.
  • a planarization is performed in which the first contact elements 3 and/or the common encapsulation 25 are planarized until the terminal regions 30 of the first contact elements 3 terminate flush with the encapsulation 25 and are arranged at the same height with respect to the top side of the cooling element 6.
  • the encapsulation 25 is formed after the isolating bodies 2 of the power components 100, an interface is formed between the encapsulation 25 and the isolating bodies 1. This is true for both, when the encapsulation 25 is of a different material than the isolating bodies 2 or of the same material as the isolating bodies 2.
  • FIG 4 shows an exemplary embodiment of the power module 1000 in which two of the power submodules 200 of figure 3 are stacked above each other so that the first contact elements 3 of the lower power submodule 200 are electrically connected to the cooling element 6 of the upper power submodule 200.
  • a further cooling element 6 is arranged on the upper power submodule 200 and is electrically connected to the first contact elements 3 thereof .
  • the cooling elements 6 thereby electrically connect the first contact elements 3 with each other .
  • the power submodules 200 are electrically connected in series wherein, within each power submodule 200 , the power components 100 or the power semiconductor devices 1 , respectively, are electrically connected in parallel .
  • Each power submodule 200 constitutes one side of a hal f bridge .
  • the upper cooling element 6 constitutes a DC+ connection point
  • the lower cooling element 6 may constitute a DC- connection point
  • the middle cooling element 6 constitutes an AC connection point .
  • the electrical connection between the first contact elements 3 and the respective adj acent cooling element 6 is a dry electrical connection, in which the contact elements 3 adj oin the respective cooling element 6 and are pressed against it .
  • a pressure arrangement 800 is used which presses the cooling elements 6 against the adj acent first contact elements 3 .
  • the higher the pressure the better the thermal connection between the cooling elements 6 and the first contact elements 3 .
  • the large area of the first contact elements 3 and particularly the direct contact between the cooling elements 6 and the first contact elements 3 (without spring contact elements there between) heat generated by power semiconductor devices 1 can be ef ficiently transported away .
  • the pressure arrangement 800 of figure 4 comprises a leaf spring 802 connected to one longitudinal end of a pin 802 and a nut 803 connected to the other longitudinal end of the pin 802 .
  • the nut 803 is in threaded engagement with the pin 802 .
  • the pin 802 extends through the power submodules 200 . By tightening the nut 802 , the power submodules 200 are pressed against each other .
  • FIG 5 shows a further exemplary embodiment of a power module 1000 with two power submodules 200 , each comprising only one power component 100 or power semiconductor device 1 , respectively, mounted on a cooling element 6 ( see also figure 1 ) .
  • the power submodules 200 are stacked above each other and thereby electrically connected in series .
  • a cooling element 6 is arranged on the upper power submodule 200 so that the first contact element 3 of this upper power submodule 200 is electrically and thermally connected to the cooling element 6 .
  • the cooling elements 6 are not in dry contact with the adj acent first contact element 3 but are bonded to the adj acent first contact element 3 , e . g .
  • a corresponding bond layer 65 is formed between, and in direct contact , with the first contact elements 3 and the respective adj acent cooling elements 6 . Due to this bonded connection, good thermal conductivity is achieved between the first contact element 3 and the adj acent cooling element 6 .
  • the power module 1000 of figure 5 already constitutes a hal f bridge .
  • several of these hal f-bridges can be connected in parallel to form a larger power module 1000 , as shown in figure 6 .
  • FIG 6 a plan view on a cross-sectional plane indicated by the dashed line in figure 5 is shown .
  • the dashed line in figure 6 indicates the cross-sectional plane for the view of figure 5.
  • three smaller power modules 1000, also referred to as assemblies, according to figure 5 are connected in parallel to a larger power module 1000.
  • the cooling elements 6 of each plane are electrically connected to each other via a busbar 300, which is welded to the cooling elements 6.
  • the second contact elements 4 of each plane are electrically connected to each other by a PCB 400, which is press-fitted to the respective second contact elements 4.
  • cooling channels 7 of the cooling elements 6 are visible.
  • the cooling channels 7 each have a meander shape and extend in lateral direction through the respective cooling element 6.
  • Each cooling channel 7 starts at an inlet 70 of the cooling element 6 and ends at an outlet 71 of the cooling element 6.
  • the cooling elements 6 are arranged such that inlets 70 and outlets 71 of different cooling elements 6 are aligned such that they are fluidically coupled and such that one contiguous cooling channel 7 running through all three cooling elements 6 is realized.
  • step S2_l A flowchart of an exemplary embodiment of a method for producing the power module 1000 of figure 6 is shown in figure 8.
  • step S2_l two power submodules 200 according to figure 1 are connected in series by stacking them above each other and electrically connecting the first contact element 3 of the lower one with the cooling element 6 of the upper one, e.g. by soldering.
  • a small power module 1000 in halfbridge configuration is produced, which is herein also called an assembly (see, e.g., figure 5) .
  • step S2_l several such assemblies are produced, e.g. three of them.
  • the assemblies are connected in parallel by connecting, in each plane, the cooling elements 6 via a first connection element 300, e.g.

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)

Abstract

The power submodule (200) comprises a power semiconductor device (1) with a top side (10) and a bottom side (12) as well as an electrically isolating body (2) surrounding the power semiconductor device. The power submodule further comprises a top contact element (3) with a terminal region (30) on the top side of the power semiconductor device and an electrically conductive cooling element (6) with a terminal region (60) on the bottom side of the power semiconductor device. The top contact element and the cooling element are in electrical contact with the power semiconductor device. The terminal regions of the top contact element and of the cooling element face away from the power semiconductor device and in opposite directions in order to enable at least two such power submodules to be stacked on top of each other for a serial electrical connection. The cooling element comprises a cooling structure (7) for cooling the power semiconductor device.

Description

Description
Power submodule , power module and method for producing a power module
The present disclosure relates to a power submodule , a power module and a method for producing a power module .
Furthermore , the disclosure relates to a method for producing a power submodule .
There is a need for an improved power submodule , e . g . a power submodule with improved cooling properties . Furthermore , there is a need for an improved power module comprising at least one such power submodule . Furthermore , there is a need for a method of producing such a power submodule and such a power module .
Embodiments of the disclosure relate to an improved power submodule and an improved power module . Further embodiments relate to a method for producing such a power submodule and for producing such a power module .
Firstly, the power submodule is speci fied .
According to an embodiment , the power submodule comprises a power semiconductor device with a top side and a bottom side as well as an electrically isolating body surrounding the power semiconductor device . The power submodule further comprises a top contact element with a terminal region on the top side of the power semiconductor device and an electrically conductive cooling element with a terminal region on the bottom side of the power semiconductor device . The top contact element and the cooling element are in electrical contact with the power semiconductor device . The terminal regions of the top contact element and of the cooling element face away from the power semiconductor device and in opposite directions in order to enable at least two such power submodules to be stacked on top of each other for a serial electrical connection . The cooling element comprises a cooling structure for cooling the power semiconductor device .
Usually, power modules for HVDC applications with several stacked submodules are stacked above each other by using spring contact elements on the top side of a power semiconductor device . This shall ensure that , even when the power semiconductor device is destroyed, an electrical serial connection is maintained due to the spring contact element then forming a short circuit with the contact element on the bottom side of the power semiconductor device .
The present invention is , inter alia, based on the recognition that the spring contact elements limit heat conduction via the top side of a semiconductor device to a next cooling element in stacking direction . Furthermore , the power module comprising one or more spring contact elements is a mechanically complex arrangement which requires many manufacturing steps and high material costs .
With the present invention, the spring contacts can be omitted . This is , inter alia, due to the electrically isolating body surrounding the power semiconductor device . Even i f the device should be destroyed, the semiconductor material cannot escape laterally so that the electrical contact between the top contact element on the top side and the cooling element on the bottom side is always maintained . When stacking these kinds of submodules above each other, it is possible to bring the top contact element of one power submodule in direct electrical and thermal contact with the cooling element of the next power submodule. This significantly improves the thermal properties of the whole power module.
The terms "top" and "bottom" are not to be understood to be restrictive to directions along the gravitational direction. Instead, they may be used to characterize opposite sides or directions or the like.
The power semiconductor device is, e.g., a power semiconductor chip. It may be a power semiconductor switch. The power submodule may comprise exactly one power semiconductor device or a plurality of power semiconductor devices which are, e.g., electrically connected to each other. The power semiconductor device comprises at least one, e.g. exactly one, semiconductor body. The semiconductor body may be made of Si or SiC or diamond or GaN.
Each power semiconductor device may be assigned an individual electrically isolating body, or all power semiconductor devices may be assigned the same electrically isolating body. The electrically isolating body may be an encapsulation. For example, the isolating body is produced by transfer molding, like film-assisted transfer molding, compression molding, or injection molding. The isolating body may comprise or consist of a thermoplastic or a thermosetting plastic. For example, the isolating body is a resin, e.g., with additional filler materials. The isolating body may be formed in one piece. The isolating body surrounds the power semiconductor device at least in lateral direction . In lateral direction, the power semiconductor device may be completely surrounded by the isolating body . The isolating body may thereby be in direct contact with the power semiconductor device and may f ormf ittingly or conformally, respectively, surround the power semiconductor device . In other words , the power semiconductor device may be embedded in the electrically isolating body .
A lateral direction is herein defined as a direction parallel to the top side and/or bottom side of the power semiconductor device . A main extension plane of the cooling element and/or a top side of the cooling element may run parallel to the top/bottom side of the power semiconductor device .
The top side and the bottom side of the power semiconductor device are main sides of the device , being parallel to a main extension plane of the power semiconductor device , for example . The top contact element , herein also referred to as first contact element , may be in electrical contact with the top side . The cooling element may be in electrical contact with the bottom side . The bottom side of the power semiconductor device is opposite to the top side . The thickness of the power semiconductor device , measured as the distance between the top side and the bottom side , may be smaller than the lateral extensions of the top and bottom side , measured along the top side or bottom side . The top side and the bottom side of the power semiconductor device are , e . g . , partially formed by the semiconductor body of the power semiconductor device . The top contact element and the cooling element each comprise a terminal region which is foreseen for externally electrically contacting the top contact element and the cooling element and, with this, the power submodule. The submodule is, e.g., configured to be operated with the top contact element and the cooling element lying on different electrical potentials. The terminal regions are uncovered by the electrically isolating body. In an unmounted or unassembled state of the power submodule, the terminal regions may be exposed, i.e. freely accessible. The terminal regions are, e.g., surfaces of the respective elements. The top contact element and/or the cooling element may each be formed in one piece or may each be formed of several pieces. Each of the top contact element and the cooling element is, e.g., formed of metal, like Al or Cu. For example, the top contact element is a solid metal block.
The terminal regions of the top contact element and the cooling element facing in opposite directions may each be flat and/or parallel to each other. In this way, electrically contacting the top contact element of one of the stacked power submodules with the terminal region of the next one of the stacked power submodules is particularly easy.
The cooling structure may be or may comprise a cooling channel and/or an arrangement of several cooling ribs and/or an arrangement of several cooling pin fins.
The cooling element may be a busbar. The cooling element may be a carrier of the power submodule and may carry the power semiconductor device. The cooling element may be a contiguous body. The cooling element may have a larger lateral extension, measured parallel to the main extension plane of the cooling element , than the power semiconductor device .
According to a further embodiment , the cooling structure comprises a cooling channel or several cooling channels for guiding a cooling fluid through the cooling element in order to cool the power semiconductor device .
The cooling channel may have several windings . For example , the cooling channel is s-shaped or meander-shaped . The cooling channel may extend from one lateral end of the cooling element to another lateral end thereof .
The cooling channel may be a microchannel , e . g . with a diameter of the channel of less than 1 mm . Alternatively, a diameter of the channel is more than 1 mm . The cooling fluid may be a liquid or a gas .
An inlet and/or an outlet of the cooling channel may each be arranged at a lateral side of the cooling element . For example , the inlet and the outlet are arranged such that two power submodules can be fluidically connected in series such that the outlet of one submodule is aligned with the inlet of the other submodule in order to form a fluid connection between the individual cooling channels . Alternatively, the cooling elements of two power submodules may be fluidically connected in parallel such that the inlets are providable with cooling fluid of the same temperature .
According to a further embodiment , the power submodule further comprises a further contact element , herein also referred to as second contact element , in electrical contact with the power semiconductor device . The further contact element has a terminal region for externally electrically contacting the power submodule . The power submodule is configured to be operated with the further contact element lying on a di f ferent electrical potential than the top contact element and/or than the cooling element .
The further contact element may be in electrical connection with the top side of the power semiconductor device . The terminal region of the further contact element is uncovered by the electrically isolating body . In an unmounted or unassembled state of the power submodule , the terminal region of the further contact element may be exposed, i . e . freely accessible . The terminal region of the further contact element may be a surface of the element for example . The further contact element is formed in one piece or of several pieces . It may be formed of metal , like Al or Cu . The further contact element may be a solid metal block .
According to a further embodiment , the terminal regions of the top contact element and the further contact element are arranged on the same side of the power semiconductor device but at di f ferent heights with respect to the top side of the power semiconductor device .
This means that in a vertical direction pointing from the bottom side to the top side of the power semiconductor device , the terminal regions of the top contact element and the further contact element are either both located in front or behind the power semiconductor device . For example , both terminal regions are located on the top side , i . e . in vertical direction behind the power semiconductor device . Two elements being arranged on the same height with respect to a flat surface, like the top side of a power semiconductor device, herein means, e.g., that a plane running parallel to the surface crosses both elements. On the other hand, two elements being located at different heights means, e.g., that each plane parallel to the surface and crossing one of the two elements does not cross the other one of the two elements .
With respect to the top side, the terminal regions of the top contact element and the further contact element are arranged at different heights. For example, the difference in height is at least 50 pm or at least 100 pm or at least 300 pm. The terminal region of the top contact element may be positioned at a greater height than the terminal region of the further contact element.
With such a configuration, the stacking of the power submodules without spring contacts is further simplified since complicated disentanglements of the top contact element and the further contact element are avoided.
According to a further embodiment, the top contact element and/or the further contact element are embedded in the electrically isolating body. The electrically isolating body may electrically isolate the top and the further contact element from each other.
According to a further embodiment, a bottom contact element is arranged between the cooling element and the power semiconductor device. The bottom contact element is electrically connected to the power semiconductor device. The bottom contact element may be formed of metal, like Al or Cu. For example, the bottom contact element is a leadframe. The bottom contact element may be formed in one piece or in several pieces. The bottom contact element, herein also referred to as third contact element, may be, e.g., a substrate with a top and bottom metallization and an isolating layer, e.g. of polymer or ceramic, in between the top and bottom metallization. The bottom contact element may contact the power semiconductor device and/or its semiconductor body at the bottom side.
According to a further embodiment, the bottom contact element and the cooling element are bonded to each other, e.g. sintered, soldered, welded or glued. For example, a bonding layer, e.g. a sinter layer or solder layer or a welding layer or a glue layer, is formed between the bottom contact element and the cooling element. The bonding layer may be in direct contact with both the cooling element and the bottom contact element .
According to a further embodiment, the power semiconductor device is an electrical switch, e.g. a transistor.
According to a further embodiment, the top contact element and the cooling element are electrically connected to the main electrodes of the power semiconductor device. The main electrodes are, e.g., a cathode and an anode of the power semiconductor device.
According to a further embodiment, the further contact element is connected to an auxiliary electrode of the power semiconductor device. The auxiliary electrode is, e.g., a gate electrode. According to a further embodiment , the power semiconductor device is one of a MOSFET , MISFET , IGBT , BIGT or thyristor .
According to a further embodiment , the top contact element is connected to a source electrode or emitter electrode of the power semiconductor device . The further contact element may be connected to a gate electrode of the power semiconductor device . The cooling element may be connected to a drain electrode or collector electrode of the power semiconductor device . For example , the source/emitter electrode and the gate electrode are located at the top side of the power semiconductor device and the drain/collector electrode are located at the bottom side of the power semiconductor device .
According to a further embodiment , the power submodule comprises at least two power semiconductor devices . All features disclosed in connection with one power semiconductor device are also disclosed for all other semiconductor devices of the submodule .
According to at least one embodiment , each of the at least two power semiconductor devices is assigned an individual top contact element and/or an individual further contact element and/or an individual bottom contact element .
According to a further embodiment , the at least two power semiconductor devices are assigned the same cooling element . In other words , the at least two power semiconductor devices share the same cooling element . For example , the at least two power semiconductor devices are bonded onto the cooling element . The cooling element , thus , extends over the at least two power semiconductor devices . The at least two power semiconductor devices are, e.g. arranged on a top side of the cooling element and are laterally spaced from each other. The bottom side of the cooling element, opposite to its top side, may constitute a common terminal region for the at least two power semiconductor devices.
According to at least one embodiment, the power submodule further comprises at least two electrically isolating bodies. All features disclosed in connection with one electrically isolating body are also disclosed for all other electrically isolating bodies.
According to a further embodiment, each of the at least two power semiconductor devices is assigned an individual isolating body which surrounds the assigned power semiconductor device. For example, the isolating bodies of two adjacent power semiconductor devices are laterally spaced from each other.
The power semiconductor devices with the individual isolating bodies may each be a so-called Chip-Scale-Package (CSP) component. The footprint of each CSP component is, e.g., at most 50 % or at most 30 % greater than the footprint of the power semiconductor device thereof. The footprint of the power semiconductor device is, e.g., mainly determined by the footprint of the semiconductor body thereof. For example, at least 90 % of the footprint of the power semiconductor device is attributed to the semiconductor body thereof.
According to a further embodiment, the at least two power semiconductor devices, each with an individual isolating body, are embedded in a common encapsulation. For example. The common encapsulation may be a thermoplastic or a thermosetting plastic, e . g . a resin . The common encapsulation may be produced via molding, e . g . inj ection molding or trans fer molding or compression molding .
The common encapsulation is di f ferent from the electrically isolating body speci fied above . Each power semiconductor device is assigned an individual electrically isolating body, whereas the common encapsulation is assigned to several power semiconductor devices . The common encapsulation may be in direct contact with the electrically isolating bodies .
However, an interface is then formed between the electrically isolating bodies and the common encapsulation which indicates that the electrically isolating bodies and the common encapsulation have been produced independently of each other .
According to a further embodiment , the at least two power semiconductor devices are each assigned a further individual contact element .
According to a further embodiment , the individual further contact elements assigned to the at least two power semiconductor devices are electrically connected to each other . For example , they are connected by a connection element , herein also referred to as second connection element . The second connection element may be in direct mechanical contact with the terminal regions of the further contact elements . For example , the second connection element is a leadframe or a rigid or flexible circuit board .
According to a further embodiment , the second connection element is embedded in the common encapsulation . The second connection element may be guided out of the common encapsulation, e.g. at a lateral side of the common encapsulation .
According to a further embodiment, the common encapsulation, e.g. a top side thereof, terminates flush with the terminal regions of the top contact elements.
Next, the power module is specified.
According to an embodiment of the power module, the power module comprises several, i.e. two or more, power submodules according to any one of the embodiments described herein. The power submodules are electrically connected to each other. For example, the power submodules are electrically connected in parallel and/or in series.
The power module may be adapted for processing currents of more than 10 A. The power module may be a low voltage module adapted for processing voltages below 1 kV, or may be a medium voltage module adapted for processing voltages between 1 kV and 30 kV.
According to a further embodiment, at least two power submodules are stacked above each other. The stacked power submodules are, e.g., connected in series. For example, the terminal region of the top contact element of at least one of the stacked power submodules faces, and is electrically connected with, the terminal region of the cooling element of a next one of the stacked power submodules. Here and in the following, "next one" means the next one in stacking direction . According to a further embodiment , a cooling element is arranged on and in electrical contact with the terminal region of a top contact element of a last one of the stacked power submodules . "Last one" herein means last one in stacking direction .
According to a further embodiment , at least two power submodules are stacked above each other, said submodules are those comprising at least two power semiconductor devices to which a common cooling element is assigned . These two power submodules are , e . g . , stacked directly on top of each other, i . e . without a power submodule between them . For example , the top contact elements of at least one of these stacked power submodules are electrically connected to each other by the cooling element of a next one of the stacked power submodules .
According to a further embodiment , the terminal region of a top contact element of at least one of the stacked power submodules is in dry electrical contact with a terminal region of the cooling element of a next one of the stacked power submodules . Dry electrical contact means that the terminal regions are only pressed against each other but are not bonded to each other . Thus , the terminal regions adj oin each other in dry electrical contact .
According to a further embodiment , the power module comprises a pressure arrangement which presses the stacked power submodules against each other in order to maintain the dry electrical contact . The higher the pressure , the higher the thermal conductivity between the terminal regions pressed against each other . The pressure arrangement is , e . g . , electrically isolated from the power submodules . The pressure arrangement may comprise a pin extending in stacking direction, e.g. through the submodules and the cooling elements thereof. The pressure arrangement may comprise a pressure element at each longitudinal end of the pin. The power submodules may be arranged between the pressure elements. At least one of the pressure elements may be in threaded connection with the pin so that, when tightening the threaded connection, the power submodules are clamped between the pressure elements and are pressed against each other. One pressure element being in threaded connection with the pin may be a nut. The other one of the pressure elements may be a leaf spring.
According to a further embodiment, a terminal region of a top contact element of at least one of the stacked power submodules is bonded to the terminal region of a next one of the stacked power submodules. For example, the terminal regions are directly bonded to each other, such as soldered, welded, sintered or glued. Accordingly solely a solder or sinter or welding or glue layer is arranged between the terminal regions that are bonded to each other. Ultrasonicwelding or laser-welding may be used, e.g., to bond the terminal regions .
According to a further embodiment, the stacked power submodules are connected in a half-bridge configuration. For example, power submodules stacked above each other belong to two different sides (high side or low side) of the halfbridge .
A half bridge is, e.g., an electrical circuit comprising two switch structures connected in series between two DC connection points and providing an AC connection point there between . The DC connection points and the AC connection point may be electrically connected to the terminals of the power module . Each switch structure may comprise one or more power semiconductor devices connected in parallel .
The power module may be employed in an electrical converter, which, for example , may recti fy a DC voltage to be supplied to a DC link or a battery, such as a battery of an electric vehicle . It may also be possible that the inverter generates an AC voltage to be supplied to an electrical motor, such as the motor of an electric vehicle . The power module may be used in automotive applications , such as electric cars , motorbikes , busses , of f-road construction vehicles , trucks and charging stations . Applications in the power grid are also possible with the power module being part of an electrical converter within a HVDC station that converts high-voltage AC to high-voltage DC and/or vice versa .
For example , the power module comprises two or more power submodules , each power submodule comprising two or more power semiconductor devices connected in parallel . Two or more of the power submodules may be stacked above each other and connected in series .
Next , a method for producing a power submodule is speci fied . The method is , e . g . , suitable for producing a power submodule as described herein . Therefore , all features disclosed in connection with the power submodule are also disclosed for the method and vice versa .
According to an embodiment , the method comprises providing an arrangement with a cooling element and with at least two power semiconductor devices . Each power semiconductor device has a top side and a bottom side . Each power semiconductor device is assigned an individual top contact element with a terminal region, said top contact element is arranged on the top side and electrically connected to the respective power semiconductor device . The power semiconductor devices are arranged, e . g . mounted, next to each other on the cooling element and are electrically connected to the cooling element , wherein the terminal regions of the top contact elements face away from the cooling element . In a further step, an encapsulation is applied on the cooling element so that the power semiconductor devices are at least laterally surrounded by the encapsulation . For example , at least portions of the top contact elements are thereby embedded in the encapsulation . In a further step, the top contact elements and/or the encapsulation are partially stripped, e . g . planari zed, until the terminal regions of the top contact elements facing away from the cooling element terminate flush with the encapsulation and until the terminal regions of the top contact elements are at the same height with respect to the cooling element or a top side thereof , respectively .
For example , the bottom contact elements assigned to the power semiconductor devices are electrically connected to the cooling element . The bottom contact elements may be bonded to the cooling element .
Next , a method for producing a power module is speci fied . The method is , e . g . , suited for producing a power module according to any of the embodiments described herein . Therefore , all features disclosed in connection with the power module are also disclosed for the method for producing a power module and vice versa .
According to an embodiment of the method for producing a power module , the method comprises a step of providing at least two power submodules according to any of the embodiments described herein and electrically connecting the power submodules to each other .
According to a further embodiment , at least two power submodules are electrically connected in series by stacking the power submodules to be connected in series above each other and electrically connecting a top contact element of at least one of the stacked power submodules to the cooling element of a next one of the power submodules . The resulting arrangement is herein also referred to as an assembly .
According to a further embodiment , the method comprises producing several assemblies of power submodules connected in series as mentioned above . These assemblies are then connected in parallel .
Hereinafter, the power submodule , the power module , the method for producing a power submodule and the method for producing a power module will be explained in more detail with reference to the drawings on the basis of exemplary embodiments . The accompanying figures are included to provide a further understanding . In the figures , elements of the same structure and/or functionality may be referenced by the same reference signs . It is to be understood that the embodiments shown in the figures are illustrative representations and are not necessarily drawn to scale . In so far as elements or components correspond to one another in terms of their function in di f ferent figures , the description thereof is not repeated for each of the following figures . For the sake of clarity, elements might not appear with corresponding reference symbols in all figures .
Figures 1 and 2 show a first exemplary embodiment of the power submodule ,
Figure 3 shows a second exemplary embodiment of the power submodule ,
Figures 4 to 6 show exemplary embodiments of the power module ,
Figure 7 shows a flowchart of an exemplary embodiment of the method for producing a power submodule ,
Figure 8 shows a flowchart of an exemplary embodiment of the method for producing a power module .
Figure 1 shows a first exemplary embodiment of the power submodule 200 in a cross-sectional view . The power submodule comprises a power component 100 mounted on a top side of an electrically conductive cooling element 6 . The power component 100 comprises a power semiconductor device 1 as well as a first 3 , a second 4 and a third 5 contact element . The first contact element 4 is herein also referred to as top contact element . The second contact element 5 is herein also referred to as further contact element . The third contact element 5 is herein also referred to as bottom contact element . The power semiconductor device 1 is, e.g., a transistor, like an IGBT or a MOSFET, or a thyristor. The first 3 and the second 4 contact element are electrically connected to the top side 10 of the power semiconductor device 1 and the third contact element 5 is electrically connected to a bottom side 12 of the power semiconductor device 1. For example, the first contact element 3 is electrically connected to an emitter or source electrode of the power semiconductor device 1, the second contact element 4 is electrically connected to a gate electrode of the power semiconductor device 1 and the third contact element 5 is electrically connected to a drain or collector electrode of the power semiconductor device 1.
The power semiconductor device 1, i.e. a semiconductor body thereof, may be based on a large bandgap material, like SiC or GaN or diamond.
The power semiconductor device 1 and the first 3 and second 4 contact elements are surrounded and embedded in an electrically isolating body 2. The isolating body 2 is, e.g., an encapsulation produced by transfer molding or injection molding. For example, the isolating body 2 is made of a resin. The contact elements 3, 4, 5 are electrically isolated from each other so that, during operation, they may lie on different electrical potentials. The first 3 and the second 4 contact element are partially electrically isolated from each other via the isolating body 2.
Each of the contact elements 3, 4, 5 and the cooling element 6 comprises a respective terminal region 30, 40, 50, 60 in the form of a terminal surface. In the unmounted configuration of the power submodule 200 shown in figure 1, the terminal regions 30, 40, 60 are exposed and freely accessible from outside for an external electric connection.
In figure 1, the terminal regions 30, 40 of the first 3 and second 4 contact element are arranged on the same side of the power semiconductor device 1 but at different heights with respect to the top side 10 of the power semiconductor device 1. The terminal regions 50, 60 of the third contact element 5 and the cooling element 6 are arranged on a different side of the power semiconductor device 1 to the terminal regions 30, 40. The first contact element 3 and the second contact element 4 both project out of a top side 20 of the electrically isolating body 2, the top side 20 of which runs essentially parallel to the top side 10 of the power semiconductor device 1.
Due to the terminal regions 30, 40 of the first 3 and second 4 contact element being arranged at different heights, an electrical connection of several such power submodules 200 is simplified. Complicated disentanglement can be omitted.
The cooling element of figure 1 is, e.g., formed of metal, like Cu. The cooling element 6 comprises a cooling structure 7 in the form of a cooling channel which is configured to guide a cooling liquid through the cooling element 6. The cooling channel 7 may be a microchannel. For example, the cooling channel 7 extends in a meander shape through the cooling element 6 (see also figure 6) .
The terminal region 50 of the third contact element 5 is bonded to a top side of the cooling element 6 and thereby electrically connected to the cooling element 6. For example, a solder layer or sinter layer or glue layer 65 is formed between the third contact element 5 and the cooling element
6 . The cooling element 6 has a larger lateral extension than the power component 100 .
The power component 100 in figure 1 is , e . g . , a so-called Chip-Scale-Package in which the footprint of the whole component 100 is mainly determined by the footprint of the power semiconductor device 1 or by the semiconductor body thereof . For example , the footprint of the whole component 100 is at most 50 % larger than the footprint of the power semiconductor device 1 .
Figure 2 shows the submodule 200 of figure 1 in plan view on the top side 20 of the isolating body 2 . The area of the terminal region 30 of the first contact element 3 is at least 50 % of the area of the top side 10 of the power semiconductor device 1 .
Figure 3 shows a further exemplary embodiment of the power submodule 200 . In contrast to what is shown in figure 1 , the power submodule 200 of figure 3 comprises two power components 100 , each with an individual power semiconductor device 1 , individual first 3 , second 4 and third 5 contact elements and an individual isolating body 2 . Both power components 100 are mounted on the same cooling element 6 laterally next to each other and are electrically connected to the cooling element 6 each via a bond layer 65 . The cooling element 6 electrically connects the third contact elements 5 of both power components 100 with each other . The second contact elements 4 are also electrically connected to each other via a connection element 400 , herein also referred to as second connection element . In figure 3, the power components 100 are both embedded in a common encapsulation 25, which is, e.g., a resin. The second connection element 400 is also embedded in the encapsulation 25 and projects out of a lateral side of the common encapsulation 25. The terminal regions 30 of the first contact elements 3 terminate flush with the encapsulation 25.
The power submodule of figure 3 may be produced as follows (see also flowchart of figure 7) . In a step Sl_l two power components 100 according to figure 1 are mounted on a cooling element 6, e.g. bonded to the cooling element 6. Then, in a step Sl_2, the power components 100 are encapsulated with a common encapsulation 25. This may be done by transfer molding or injection molding, for example. After that, in a step Sl_3, a planarization is performed in which the first contact elements 3 and/or the common encapsulation 25 are planarized until the terminal regions 30 of the first contact elements 3 terminate flush with the encapsulation 25 and are arranged at the same height with respect to the top side of the cooling element 6.
Since the encapsulation 25 is formed after the isolating bodies 2 of the power components 100, an interface is formed between the encapsulation 25 and the isolating bodies 1. This is true for both, when the encapsulation 25 is of a different material than the isolating bodies 2 or of the same material as the isolating bodies 2.
Figure 4 shows an exemplary embodiment of the power module 1000 in which two of the power submodules 200 of figure 3 are stacked above each other so that the first contact elements 3 of the lower power submodule 200 are electrically connected to the cooling element 6 of the upper power submodule 200. A further cooling element 6 is arranged on the upper power submodule 200 and is electrically connected to the first contact elements 3 thereof . The cooling elements 6 thereby electrically connect the first contact elements 3 with each other . In this way, a configuration is achieved in which the power submodules 200 are electrically connected in series wherein, within each power submodule 200 , the power components 100 or the power semiconductor devices 1 , respectively, are electrically connected in parallel . Each power submodule 200 constitutes one side of a hal f bridge . For example , the upper cooling element 6 constitutes a DC+ connection point , the lower cooling element 6 may constitute a DC- connection point and the middle cooling element 6 constitutes an AC connection point .
In figure 4 , the electrical connection between the first contact elements 3 and the respective adj acent cooling element 6 is a dry electrical connection, in which the contact elements 3 adj oin the respective cooling element 6 and are pressed against it . For this purpose , a pressure arrangement 800 is used which presses the cooling elements 6 against the adj acent first contact elements 3 . The higher the pressure , the better the thermal connection between the cooling elements 6 and the first contact elements 3 . Hence , due to the pressure arrangement 800 , the large area of the first contact elements 3 and particularly the direct contact between the cooling elements 6 and the first contact elements 3 (without spring contact elements there between) , heat generated by power semiconductor devices 1 can be ef ficiently transported away .
The pressure arrangement 800 of figure 4 comprises a leaf spring 802 connected to one longitudinal end of a pin 802 and a nut 803 connected to the other longitudinal end of the pin 802 . The nut 803 is in threaded engagement with the pin 802 . The pin 802 extends through the power submodules 200 . By tightening the nut 802 , the power submodules 200 are pressed against each other .
Figure 5 shows a further exemplary embodiment of a power module 1000 with two power submodules 200 , each comprising only one power component 100 or power semiconductor device 1 , respectively, mounted on a cooling element 6 ( see also figure 1 ) . The power submodules 200 are stacked above each other and thereby electrically connected in series . Also here , a cooling element 6 is arranged on the upper power submodule 200 so that the first contact element 3 of this upper power submodule 200 is electrically and thermally connected to the cooling element 6 . In contrast to figure 4 , the cooling elements 6 are not in dry contact with the adj acent first contact element 3 but are bonded to the adj acent first contact element 3 , e . g . soldered or sintered or glued or welded . A corresponding bond layer 65 is formed between, and in direct contact , with the first contact elements 3 and the respective adj acent cooling elements 6 . Due to this bonded connection, good thermal conductivity is achieved between the first contact element 3 and the adj acent cooling element 6 .
The power module 1000 of figure 5 already constitutes a hal f bridge . In order to increase the power rating properties , several of these hal f-bridges can be connected in parallel to form a larger power module 1000 , as shown in figure 6 .
In figure 6 , a plan view on a cross-sectional plane indicated by the dashed line in figure 5 is shown . The dashed line in figure 6 indicates the cross-sectional plane for the view of figure 5. As can be seen, three smaller power modules 1000, also referred to as assemblies, according to figure 5 are connected in parallel to a larger power module 1000. Thereby, the cooling elements 6 of each plane are electrically connected to each other via a busbar 300, which is welded to the cooling elements 6. The second contact elements 4 of each plane are electrically connected to each other by a PCB 400, which is press-fitted to the respective second contact elements 4.
In figure 6, the cooling channels 7 of the cooling elements 6 are visible. The cooling channels 7 each have a meander shape and extend in lateral direction through the respective cooling element 6. Each cooling channel 7 starts at an inlet 70 of the cooling element 6 and ends at an outlet 71 of the cooling element 6. The cooling elements 6 are arranged such that inlets 70 and outlets 71 of different cooling elements 6 are aligned such that they are fluidically coupled and such that one contiguous cooling channel 7 running through all three cooling elements 6 is realized.
A flowchart of an exemplary embodiment of a method for producing the power module 1000 of figure 6 is shown in figure 8. In step S2_l, two power submodules 200 according to figure 1 are connected in series by stacking them above each other and electrically connecting the first contact element 3 of the lower one with the cooling element 6 of the upper one, e.g. by soldering. Thereby a small power module 1000 in halfbridge configuration is produced, which is herein also called an assembly (see, e.g., figure 5) . In step S2_l several such assemblies are produced, e.g. three of them. Then, in a step S2_2, the assemblies are connected in parallel by connecting, in each plane, the cooling elements 6 via a first connection element 300, e.g. the busbar 300, and by connecting, in each plane, the second contact elements 4 via a second connection element 400, namely the PCB 400. The embodiments shown in the Figures 1 to 8 as stated represent exemplary embodiments; therefore, they do not constitute a complete list of all embodiments. Actual arrangements may vary from the embodiments shown in terms of arrangements, devices, elements, for example.
Reference Signs
1 power semiconductor device
2 electrically isolating body
3 first/top contact element
4 second/ further contact element
5 third/bottom contact element
6 cooling element
7 cooling structure / cooling channel
10 top side of power semiconductor device 1
12 bottom side of power semiconductor device 1
20 top side of electrically isolating body 2
25 common encapsulation
30 terminal region of first contact element 3
40 terminal region of second contact element 4
50 terminal region of third contact element 5
60 terminal region of cooling element 6
65 bond layer
70 inlet
71 outlet
100 power component
200 power submodule
300 first connection element
400 second connection element
800 pressure arrangement
801 leaf spring
802 pin
803 nut
1000 power module
S l_l to S2_2 method steps

Claims

Claims
1. Power submodule (200) comprising
- a power semiconductor device (1) with a top side (10) and a bottom side ( 12 ) ,
- an electrically isolating body (2) surrounding the power semiconductor device (1) ,
- a top contact element (3) with a terminal region (30) on the top side (10) of the power semiconductor device (1) ,
- an electrically conductive cooling element (6) with a terminal region (60) on the bottom side (12) of the power semiconductor device (1) , wherein
- the top contact element (3) and the cooling element (6) are in electrical contact with the power semiconductor device
(1) ,
- the terminal regions (30, 60) of the top contact element
(3) and of the cooling element (6) both face away from the power semiconductor device (1) and in opposite directions in order to enable at least two such power submodules (200) to be stacked on top of each other for a serial electrical connection,
- the cooling element (6) comprises a cooling structure (7) for cooling the power semiconductor device (1) .
2. Power submodule (200) according to claim 1, wherein
- the cooling structure (7) comprises a cooling channel (7) for guiding a cooling fluid through the cooling element (6) in order to cool the power semiconductor device (1) .
3. Power submodule (200) according to claim 1 or 2, further comprising
- a further contact element (4) in electrical contact with the power semiconductor device (1) and having a terminal region (40) for externally electrically contacting the power submodule (200) , wherein
- the power submodule (200) is configured to be operated with the top (3) and the further (4) contact element lying at different electrical potentials,
- the top contact element (3) and the further contact element
(4) are located on the same side of the power semiconductor device (1) but at different heights with respect to the top side (10) of the power semiconductor device (1) .
4. Power submodule (200) according to any one of the preceding claims, further comprising
- a bottom contact element (5) arranged between the cooling element (6) and the power semiconductor device (1) , wherein
- the bottom contact element (5) is electrically connected to the power semiconductor device (1) ,
- the bottom contact element (5) and the cooling element (6) are bonded to each other.
5. Power submodule (200) according to any one of the preceding claims, comprising
- at least two power semiconductor devices (1) ,
- each of the at least two power semiconductor devices (1) is assigned an individual top contact element (3) ,
- the at least two power semiconductor devices (1) is assigned the same cooling element (6) .
6. Power submodule (200) according to claim 5, further comprising
- at least two electrically isolating bodies (2) , wherein
- each power semiconductor device (1) is assigned an individual isolating body (1) which surrounds the assigned power semiconductor device (1) , the at least two power semiconductor devices (1) each with an individual isolating body (2) are embedded in a common encapsulation (25) ,
- the at least two power semiconductor devices (1) are each assigned an individual further contact element (4) ,
- the individual further contact elements (4) assigned to the at least two power semiconductor devices (1) are electrically connected to each other.
7. Power module (1000) comprising
- several power submodules (200) according to any one of the preceding claims, wherein
- the power submodules (200) are electrically connected to each other.
8. Power module (1000) according to any one of the preceding claims, wherein
- at least two power submodules (200) are stacked above each other, wherein
- the terminal region (30) of a top contact element (3) of at least one of the stacked power submodules (200) faces and is electrically connected to the terminal region (60) of the cooling element (6) of a next one of the stacked power submodules (200) .
9. Power module (1000) according to claim 8, wherein
- a cooling element (6) is arranged on and in electrical contact with the terminal region (30) of a top contact element (3) of a last one of the stacked power submodules (200) .
10. Power module (1000) according to any one of claims 7 to 9, wherein - at least two power submodules (200) stacked above each other are those according to claim 5 or 6,
- the top contact elements (3) of at least one of the stacked power submodules (200) are electrically connected to each other by the cooling element (6) of a next one of the stacked submodules (200) .
11. Power module (1000) according to an one of claims 7 to
10, wherein
- the terminal region (30) of a top contact element (3) of at least one of the stacked power submodules (200) is in dry electrical contact with the terminal region (60) of the cooling element (6) of a next one of the stacked power submodules (200) ,
- a pressure arrangement (800) of the power module (1000) presses the stacked power submodules (200) against each other in order to maintain the dry electrical contact.
12. Power module (1000) according to any one of claims 7 to 11, wherein
- a terminal region (30) of a top contact element (3) of at least one of the stacked power submodules (200) is bonded to the terminal region (60) of the cooling element (6) of a next one of the stacked power submodules (200) .
13. Power module (1000) according to any one of claims 7 to
12, wherein
- the stacked power submodules (200) are connected in a halfbridge configuration,
- the power submodules (200) being stacked above each other belong to different sides of a half-bridge.
14. Method for producing a power submodule (200) comprising - providing an arrangement with
- a cooling element (6)
- at least two power semiconductor devices (1) each with a top side (10) and a bottom side (12) ,
- each power semiconductor device (1) is assigned an individual top contact element (3) with a terminal region (30) , said top contact element (3) is arranged on the top side (10) and electrically connected to the respective power semiconductor device (1) , wherein
- the power semiconductor devices (1) are arranged next to each other on the cooling element (6) and are electrically connected thereto,
- the terminal regions (30) of the top contact elements (3) face away from the cooling element (6) ;
- applying an encapsulation (25) on the cooling element (6) so that the power semiconductor devices (1) are at least surrounded by the encapsulation (25) ;
- partially stripping the top contact elements (3) and/or the encapsulation (25) until the terminal regions (30) of the top contact elements (3) facing away from the cooling element (6) terminate flush with the common encapsulation (25) and until the terminal regions (30) of the top contact elements (3) are on the same height with respect to the cooling element (6) .
15. Method for producing a power module (1000) , comprising
- providing at least two power submodules (200) according to any one of claims 1 to 6,
- electrically connecting at least two power submodules (200) in series by
- stacking the power submodules (200) to be connected in series above each other,
- electrically connecting a top contact element (3) of at least one of the stacked power submodules (200) to the cooling element (6) of a next one of the stacked power submodules (200) .
PCT/EP2022/057346 2022-03-21 2022-03-21 Power submodule, power module and method for producing a power module WO2023179842A1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
PCT/EP2022/057346 WO2023179842A1 (en) 2022-03-21 2022-03-21 Power submodule, power module and method for producing a power module

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
PCT/EP2022/057346 WO2023179842A1 (en) 2022-03-21 2022-03-21 Power submodule, power module and method for producing a power module

Publications (1)

Publication Number Publication Date
WO2023179842A1 true WO2023179842A1 (en) 2023-09-28

Family

ID=81344351

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/EP2022/057346 WO2023179842A1 (en) 2022-03-21 2022-03-21 Power submodule, power module and method for producing a power module

Country Status (1)

Country Link
WO (1) WO2023179842A1 (en)

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20070108560A1 (en) * 2005-03-30 2007-05-17 Stats Chippac Ltd. Stackable power semiconductor package system
EP3716321A1 (en) * 2019-03-29 2020-09-30 AT & S Austria Technologie & Systemtechnik Aktiengesellschaft Component carrier with embedded semiconductor component and embedded highly conductive block which are mutually coupled
WO2020250405A1 (en) * 2019-06-14 2020-12-17 株式会社メイコー Substrate with built-in component and method for manufacturing substrate with built-in component

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20070108560A1 (en) * 2005-03-30 2007-05-17 Stats Chippac Ltd. Stackable power semiconductor package system
EP3716321A1 (en) * 2019-03-29 2020-09-30 AT & S Austria Technologie & Systemtechnik Aktiengesellschaft Component carrier with embedded semiconductor component and embedded highly conductive block which are mutually coupled
WO2020250405A1 (en) * 2019-06-14 2020-12-17 株式会社メイコー Substrate with built-in component and method for manufacturing substrate with built-in component

Similar Documents

Publication Publication Date Title
CN107170718B (en) Semiconductor module
US8907477B2 (en) Unit for semiconductor device and semiconductor device
US8421235B2 (en) Semiconductor device with heat spreaders
KR100430772B1 (en) A semiconductor device
US6836006B2 (en) Semiconductor module
CN111373647B (en) Power conversion device
CN107924885B (en) Structure body
US9437508B2 (en) Method for manufacturing semiconductor device and semiconductor device
US11961780B2 (en) Semiconductor module, power conversion device, and manufacturing method of semiconductor module
US20190318999A1 (en) Semiconductor device
US20240038612A1 (en) Package with electrically insulated carrier and at least one step on encapsulant
JP7268563B2 (en) semiconductor equipment
CN114551259A (en) Method for producing a half bridge, power module for an inverter, and inverter
EP4250350A1 (en) Power component, power submodule and power module
WO2023179842A1 (en) Power submodule, power module and method for producing a power module
KR101897639B1 (en) power module
CN110858568B (en) Semiconductor device with a semiconductor device having a plurality of semiconductor chips
CN113725103A (en) Method for producing a half-bridge module, inverter, half-bridge module and inverter
CN117242569A (en) Semiconductor device and power conversion device
CN113261095A (en) Semiconductor device, method for manufacturing semiconductor device, and power conversion device
CN219350206U (en) Power semiconductor module
CN220509968U (en) Semiconductor module
US20230178460A1 (en) Lead Adapters for Semiconductor Package
EP4369394A1 (en) Power semiconductor package and method for fabricating the same
US20230197581A1 (en) Power semiconductor module and method of manufacturing the same

Legal Events

Date Code Title Description
DPE2 Request for preliminary examination filed before expiration of 19th month from priority date (pct application filed from 20040101)
121 Ep: the epo has been informed by wipo that ep was designated in this application

Ref document number: 22717535

Country of ref document: EP

Kind code of ref document: A1