WO2023149240A1 - Electronic component - Google Patents
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- WO2023149240A1 WO2023149240A1 PCT/JP2023/001748 JP2023001748W WO2023149240A1 WO 2023149240 A1 WO2023149240 A1 WO 2023149240A1 JP 2023001748 W JP2023001748 W JP 2023001748W WO 2023149240 A1 WO2023149240 A1 WO 2023149240A1
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- electrode
- main surface
- electronic component
- inductor
- external electrode
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- 239000004020 conductor Substances 0.000 claims abstract description 176
- 239000012212 insulator Substances 0.000 claims abstract description 62
- 239000003990 capacitor Substances 0.000 claims description 28
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- 102220131073 rs766853710 Human genes 0.000 description 2
- 102200067146 rs80357017 Human genes 0.000 description 2
- PNEYBMLMFCGWSK-UHFFFAOYSA-N aluminium oxide Inorganic materials [O-2].[O-2].[O-2].[Al+3].[Al+3] PNEYBMLMFCGWSK-UHFFFAOYSA-N 0.000 description 1
- 238000013459 approach Methods 0.000 description 1
- 239000005388 borosilicate glass Substances 0.000 description 1
- 230000008878 coupling Effects 0.000 description 1
- 238000010168 coupling process Methods 0.000 description 1
- 238000005859 coupling reaction Methods 0.000 description 1
- 238000003780 insertion Methods 0.000 description 1
- 230000037431 insertion Effects 0.000 description 1
- 239000011810 insulating material Substances 0.000 description 1
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- 230000004048 modification Effects 0.000 description 1
- 229920001721 polyimide Polymers 0.000 description 1
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Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01F—MAGNETS; INDUCTANCES; TRANSFORMERS; SELECTION OF MATERIALS FOR THEIR MAGNETIC PROPERTIES
- H01F17/00—Fixed inductances of the signal type
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01F—MAGNETS; INDUCTANCES; TRANSFORMERS; SELECTION OF MATERIALS FOR THEIR MAGNETIC PROPERTIES
- H01F27/00—Details of transformers or inductances, in general
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01F—MAGNETS; INDUCTANCES; TRANSFORMERS; SELECTION OF MATERIALS FOR THEIR MAGNETIC PROPERTIES
- H01F27/00—Details of transformers or inductances, in general
- H01F27/28—Coils; Windings; Conductive connections
- H01F27/29—Terminals; Tapping arrangements for signal inductances
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01G—CAPACITORS; CAPACITORS, RECTIFIERS, DETECTORS, SWITCHING DEVICES, LIGHT-SENSITIVE OR TEMPERATURE-SENSITIVE DEVICES OF THE ELECTROLYTIC TYPE
- H01G4/00—Fixed capacitors; Processes of their manufacture
- H01G4/40—Structural combinations of fixed capacitors with other electric elements, the structure mainly consisting of a capacitor, e.g. RC combinations
Definitions
- This disclosure relates to electronic components.
- Patent Document 1 Japanese Patent Application Laid-Open No. 9-246046 (Patent Document 1) describes a laminate in which a plurality of magnetic sheets provided with coil conductors are stacked, and an external device to which the coil conductor provided in the laminate is connected. A laminated inductor composed of electrodes is disclosed.
- an object of the present disclosure is to provide an electronic component that can suppress the generation of parasitic capacitance.
- An electronic component includes an insulator, an inductor, and a first external electrode.
- the inductor is constructed within the insulator and has a first conductor pattern.
- the first external electrode is electrically connected to the first conductor pattern.
- the insulator has a first main surface, a second main surface facing the first main surface, and a first side surface, a second side surface, a third side surface, and a fourth side surface connecting the first main surface and the second main surface. side.
- the first side faces the second side.
- the third side faces the fourth side.
- the first conductor pattern has a coil opening.
- the first external electrode includes a first electrode provided along the first main surface, a second electrode provided along the first side surface and electrically connected to the first electrode, and a second electrode provided along the first side surface. and a third electrode electrically connected to the first electrode.
- the first electrode has a portion that overlaps the coil opening when the first main surface is viewed in plan.
- the first external electrode does not overlap the coil opening on the second main surface when the first main surface is viewed in plan.
- the electrode of the first external electrode is not provided on the second main surface of the insulator, and the first external electrode is the second main surface when the first main surface is viewed in plan. Since the main surface does not overlap the coil opening of the first conductor pattern, it is possible to suppress the generation of parasitic capacitance between the first conductor pattern in the insulator and the second main surface.
- FIG. 1 is a perspective view of an electronic component according to Embodiment 1;
- FIG. 2 is a cross-sectional view showing the configuration inside the insulator of the electronic component according to Embodiment 1.
- FIG. 2 is an exploded plan view showing the configuration of the electronic component according to Embodiment 1;
- FIG. 1 is an equivalent circuit diagram of an electronic component according to Embodiment 1 and an equivalent circuit diagram of an electronic component according to a comparative example;
- FIG. 8A and 8B are a cross-sectional view and an equivalent circuit diagram showing the configuration inside the insulator of the electronic component according to the second embodiment;
- FIG. 8 is an exploded plan view showing the configuration of an electronic component according to Embodiment 2;
- FIG. 10 is a diagram showing a comparison of resistance components between the electronic component according to Embodiment 3 and an electronic component according to a comparative example in which a parasitic capacitance of 0.5 pF is generated;
- FIG. 10 is a diagram showing a comparison of reactance components between the electronic component according to Embodiment 3 and an electronic component according to a comparative example in which a parasitic capacitance of 0.5 pF is generated;
- FIG. 10 is a diagram showing a comparison of pass characteristics between the electronic component according to Embodiment 3 and an electronic component according to a comparative example in which a parasitic capacitance of 1 pF is generated;
- FIG. 10 is a diagram showing a comparison of resistance components between the electronic component according to Embodiment 3 and an electronic component according to a comparative example in which a parasitic capacitance of 1 pF is generated;
- FIG. 10 is a diagram showing a comparison of reactance components between the electronic component according to Embodiment 3 and an electronic component according to a comparative example in which a parasitic capacitance of 1 pF is generated;
- FIG. 1 is a perspective view of electronic component 100 according to Embodiment 1.
- the short side direction of the electronic component 100 is the X direction
- the long side direction is the Y direction
- the height direction is the Z direction.
- the electronic component 100 according to Embodiment 1 is a chip component type small coil that includes at least one conductor pattern.
- An electronic component 100 includes a rectangular parallelepiped insulator 10 in which a plurality of insulating substrates (insulator layers) on which at least one conductor pattern is formed are laminated.
- the stacking direction of the insulating substrates is the Z direction, and the direction of the arrow in FIG. 1 indicates the upper layer direction.
- the insulating substrate is made of, for example, an insulating material containing borosilicate glass as a main component, or an insulating resin such as alumina, zirconia, or polyimide resin.
- the interfaces between the insulating substrates may not be clearly defined due to processing such as baking or hardening.
- the insulator 10 has a first main surface 11 , a second main surface 12 facing the first main surface 11 , and a first side surface 21 and a second side surface 22 connecting the first main surface 11 and the second main surface 12 . , a third side 23 and a fourth side 24 .
- the first main surface 11 is positioned below the second main surface 12 in the Z direction.
- the first main surface 11 is a mounting surface to be placed on the mounting board, and when the electronic component 100 is mounted on the mounting board, the first main surface 11 faces the mounting board.
- the first main surface 11 is also referred to as a bottom surface or a back surface
- the second main surface 12 is also referred to as a top surface.
- the first side surface 21 and the second side surface 22 are provided in the longitudinal direction (Y direction) of the insulator 10 .
- the first side surface 21 faces the second side surface 22 .
- the third side surface 23 and the fourth side surface 24 are provided in the short direction (X direction) of the insulator 10 .
- the third side surface 23 faces the fourth side surface 24 .
- the electronic component 100 includes a first external electrode 31 and a second external electrode 32 electrically connected to at least one conductor pattern provided inside the insulator 10 .
- the first external electrode 31 is provided closer to the third side surface 23 than the second external electrode 32 in the longitudinal direction (Y direction) of the insulator 10 .
- the second external electrode 32 is provided closer to the fourth side surface 24 than the first external electrode 31 in the longitudinal direction (Y direction) of the insulator 10 .
- the first external electrode 31 and the second external electrode 32 are not limited to the first main surface 11, which is the bottom surface of the insulator 10, but also the first side surface 21 and the second side surface 21 connecting the first main surface 11 and the second main surface 12.
- An electrode (for example, an electrode surface) is also formed on the side surface 22 .
- the first external electrode 31 includes a first electrode 31a provided along the first main surface 11, a second electrode 31b provided along the first side surface 21, and a second electrode 31b provided along the first side surface 22. and a third electrode 31c provided along.
- the second electrode 31b and the third electrode 31c are electrically connected to the first electrode 31a through a path along the outer circumference of the insulator 10.
- the first electrode 31a, the second electrode 31b, and the third electrode 31c are designed to be at the same potential by being electrically connected through a path along the outer periphery of the insulator 10.
- the first external electrode 31 does not have electrodes along the second main surface 12 , the third side surface 23 and the fourth side surface 24 . That is, when the first external electrode 31 is viewed from the third side surface 23 side with the first main surface 11 facing downward (mounting substrate side), the first external electrode 31 is concave (U-shaped) or substantially concave ( approximately U-shaped). Strictly speaking, the end portion 310b of the second electrode 31b provided along the first side surface 21 and the end portion 310c of the third electrode 31c provided along the second side surface 22 hang on the second main surface 12. However, the conductor patterns in the insulator 10 are not directly connected to the ends 310b and 310c. Note that the first external electrode 31 may be provided on the insulator 10 so that the ends 310b and 310c do not overlap the second main surface 12 .
- the second external electrode 32 includes a fourth electrode 32a provided along the first main surface 11, a fifth electrode 32b provided along the first side surface 21, and a fourth electrode 32b provided along the second side surface 22. and a sixth electrode 32c.
- the fifth electrode 32b and the sixth electrode 32c are electrically connected to the fourth electrode 32a through a path along the outer periphery of the insulator 10. As shown in FIG. That is, the fourth electrode 32a, the fifth electrode 32b, and the sixth electrode 32c are electrically connected by a path along the outer circumference of the insulator 10, and thus have the same potential.
- the second external electrode 32 is not limited to having both the fifth electrode 32b and the sixth electrode 32c, and may have either one of the fifth electrode 32b and the sixth electrode 32c. .
- the second external electrode 32 does not have electrodes along the second main surface 12 , the third side surface 23 and the fourth side surface 24 . That is, when the second external electrode 32 is viewed from the fourth side surface 24 side with the first main surface 11 facing downward (mounting substrate side), the second external electrode 32 is concave (U-shaped) or substantially concave ( approximately U-shaped). Strictly speaking, the end portion 320b of the fifth electrode 32b provided along the first side surface 21 and the end portion 320c of the sixth electrode 32c provided along the second side surface 22 hang on the second main surface 12. However, the conductor patterns in the insulator 10 are not directly connected to the ends 320b and 320c. The second external electrode 32 may be provided on the insulator 10 so that the ends 320 b and 320 c do not overlap the second main surface 12 .
- first external electrode 31 and the second external electrode 32 have electrodes on both the first side surface 21 and the second side surface 22
- first external electrode 31 and the second external electrode 32 have electrodes on the first side surface 21 and the second external electrode 32
- second side surface 22 may have an electrode. That is, the first external electrode 31 and the second external electrode 32 are L-shaped when viewed from the third side surface 23 side or the fourth side surface 24 side with the first main surface 11 facing downward (mounting substrate side). Alternatively, it may have a substantially L-shaped shape.
- first external electrode 31 and the second external electrode 32 may have electrodes on the third side surface 23 and the fourth side surface 24 .
- Either one of the first external electrode 31 and the second external electrode 32 should not have an electrode (hereinafter also referred to as "top electrode”) along at least the second main surface 12, which is the top surface. It just needs to be configured.
- FIG. 2 is a cross-sectional view showing the configuration inside insulator 10 of electronic component 100 according to the first embodiment.
- FIG. 3 is an exploded plan view showing the configuration of electronic component 100 according to the first embodiment.
- the electronic component 100 includes an inductor L1 formed by conductor patterns K1 and K2 inside the insulator 10.
- the conductor pattern K1 or the conductor pattern K2 is an example of the "first conductor pattern" of the present disclosure.
- the conductor patterns K1 and K2 of the inductor L1 are stacked parallel to the first main surface 11 of the insulator 10 and electrically connected by the via conductors V1.
- the electronic component 100 includes insulating substrates N1 to N3 in order from the second main surface 12 side.
- conductor patterns and electrode patterns are formed by a printing method on the insulating substrates N1 to N3.
- a conductor pattern K1 forming part of the inductor L1 is formed on the insulating substrate N1.
- the conductor pattern K1 is formed so as to make about one turn counterclockwise from the upper left side of the insulating substrate N1 in the figure.
- a starting end of the conductor pattern K1 is electrically connected to the second electrode 31b of the first external electrode 31 .
- a connection portion P1 connected to the via conductor V1 is provided in the vicinity of the terminal end of the conductor pattern K1.
- a conductor pattern K2 forming part of the inductor L1 is formed on the insulating substrate N2.
- the conductor pattern K2 is formed so as to make about one turn counterclockwise from the center of the upper side of the insulating substrate N2 in the drawing.
- a connection portion P2 connected to the via conductor V1 is provided in the vicinity of the starting end of the conductor pattern K2.
- a terminal end of the conductor pattern K2 is electrically connected to the fifth electrode 32b of the second external electrode 32. As shown in FIG.
- the conductor patterns K1 and K2 are electrically connected to the second electrode 31b of the first external electrode 31 and the fourth electrode 32a of the second external electrode 32 through the via conductors V1. properly connected.
- the inductor L1 forms a coil by connecting the conductor pattern K1 and the conductor pattern K2 in series.
- the inductor L1 is not limited to forming a coil with two conductor patterns, the conductor pattern K1 and the conductor pattern K2, and may form a coil with three or more conductor patterns.
- the conductor pattern of the inductor is formed over multiple layers, if only the first electrode 31a or the fourth electrode 32a on the first main surface 11 is used, via conductors must be provided over multiple layers, and the inductor L1 or to increase the size of the electronic component while keeping the opening of the inductor L1 as it is.
- the conductor pattern of the inductor can also be formed on the first side surface 21 and the second side surface 22 without using vias. can be connected. Thereby, in electronic component 100 , a conductor pattern can be formed all over the outer frame of insulator 10 .
- the conductor pattern of the inductor can be connected to two locations on the side surface.
- the side electrodes By forming the side electrodes in this way, it becomes easier to adjust the length of the conductor pattern, and the degree of freedom in designing the conductor pattern can be improved.
- the conductor pattern of the inductor is formed all over the outer frame of the insulator to secure the inductance value.
- parasitic capacitance may occur between the conductor pattern in the insulator and, in particular, the external electrodes on the main surface overlapping the conductor pattern.
- electronic component 100 according to Embodiment 1 has electrodes on first main surface 11 that is the bottom surface and on first side surface 21 and second side surface 22 that are side surfaces.
- the first external electrode 31 and the second external electrode 32 are provided so that the second main surface 12, which is the top surface, has no electrodes.
- the first electrode 31a has a portion overlapping the coil openings of the conductor patterns K1 and K2 when the first main surface 11 is viewed from the second main surface 12 side in the Z direction. . Also, the first external electrode 31 does not overlap the coil openings of the conductor patterns K1 and K2 on the second main surface 12 when the first main surface 11 is viewed from the second main surface 12 side in the Z direction. Furthermore, the first external electrode 31 does not overlap the conductor patterns K1 and K2 on the second main surface 12 when the first main surface 11 is viewed from the second main surface 12 side in the Z direction.
- the second electrode 32a has a portion that overlaps the coil openings of the conductor patterns K1 and K2 when the first main surface 11 is viewed from the second main surface 12 side in the Z direction. .
- the second external electrode 32 does not overlap the coil openings of the conductor patterns K1 and K2 on the second main surface 12 when the first main surface 11 is viewed from the second main surface 12 side in the Z direction.
- the second external electrode 32 does not overlap the conductor patterns K1 and K2 on the second main surface 12 when the first main surface 11 is viewed from the second main surface 12 side in the Z direction.
- FIG. 4 is an equivalent circuit diagram of the electronic component 100 according to Embodiment 1 and an equivalent circuit diagram of the electronic component according to the comparative example.
- FIG. 4A shows an equivalent circuit diagram of electronic component 100 according to Embodiment 1 that does not have electrodes (top electrodes) along second main surface 12 .
- FIG. 4B shows an equivalent circuit diagram of a coil component having electrodes (top electrodes) along second main surface 12 in electronic component 100 according to Embodiment 1 as an electronic component according to a comparative example.
- the electronic component according to the comparative example has the same configuration as the electronic component 100 according to the first embodiment, except that it has a top surface electrode. 4, the first terminal T1 corresponds to the connection point of the first external electrode 31 on the mounting substrate, and the second terminal T2 corresponds to the connection point of the second external electrode 32 on the mounting substrate.
- a parallel resonance circuit is formed by the parasitic capacitance C0 and the inductor L1, and a resonance frequency at which the impedance becomes infinite occurs. Therefore, when the inductor is used at a frequency near the resonance frequency, the characteristics are different from the intended characteristics. Since the parasitic capacitance C0 is smaller than the capacitance formed by the pattern, it does not become a problem in the low frequency range, but becomes a problem in the high frequency range including the resonance frequency. In addition, since the conductor pattern must be arranged in the insulator while considering the parasitic capacitance C0 between the conductor pattern of the inductor L1 and the top electrode, the degree of freedom in designing the conductor pattern is reduced.
- the parasitic capacitance C0 does not occur between the top electrode and the conductor pattern.
- a parallel resonance circuit is not generated by the parasitic capacitance C0, and the electrical characteristics are not changed.
- the degree of freedom in designing the conductor pattern can be improved.
- the conductor pattern of the inductor L1 can be arranged so as to be as far away from the mounting board (first main surface 11) as possible and to be close to the second main surface 12 side.
- the parasitic capacitance between these external electrodes and the conductor pattern is reduced, and the frequency to be used is reduced. It can be designed so that parallel resonance does not occur in the band.
- the magnetic field generated by the inductor L1 generates an eddy current in the top electrode, which reduces the Q value of the inductor.
- a decrease in the Q value can be suppressed.
- electronic component 100 according to Embodiment 1 does not have a top surface electrode, so that it is possible to prevent parasitic capacitance from occurring between the top surface electrode and the conductor pattern. characteristics can be improved.
- Embodiment 2 An electronic component 200 according to Embodiment 2 will be described with reference to FIGS. 5 and 6.
- FIG. 2 As electronic component 200, a chip component type compact filter device in which inductor L1 and capacitor C1 are connected in series will be described.
- the electronic component 200 according to Embodiment 2 only the configuration different from that of the electronic component 100 according to Embodiment 1 will be mainly described.
- the electronic component 200 according to No. 2 is also given the same reference numerals, and the description thereof is omitted.
- FIGS. 5A and 5B are a cross-sectional view and an equivalent circuit diagram showing the configuration inside the insulator 10 of the electronic component 200 according to the second embodiment.
- FIG. 6 is an exploded plan view showing the configuration of electronic component 200 according to the second embodiment.
- electronic component 200 includes, in insulator 10, an inductor L1 configured by conductor patterns K1 and K2 and a capacitor C1 configured by electrode patterns K3 and K4. By connecting inductor L1 and capacitor C1 in series within insulator 10, electronic component 200 forms a series resonance circuit.
- the conductor pattern K1 or the conductor pattern K2 is an example of the "first conductor pattern" of the present disclosure.
- the electrode patterns K3 and K4 of the capacitor C1 are stacked below the conductor patterns K1 and K2 of the inductor L1 in the Z direction via an insulating layer. That is, the capacitor C1 is arranged closer to the first main surface 11 than the inductor L1. When the capacitor C1 is viewed from the second main surface 12 side, the electrode patterns K3 and K4 of the capacitor C1 are provided at positions that partially overlap the conductor patterns K1 and K2 in the stacking direction (Z direction).
- the electronic component 200 further includes an insulating substrate N3 and an insulating substrate N4 between the insulating substrate N2 and the first main surface 11.
- An electrode pattern K4 forming one electrode of the capacitor C1 is formed on the insulating substrate N4.
- the electrode pattern K4 is viewed in plan from the second main surface 12 side, the electrode pattern K4 is provided at a position overlapping part of the conductor patterns K1 and K2 in the stacking direction (Z direction). That is, the electrode pattern K4 is provided at a position that reduces the area overlapping the opening of the inductor L1 formed by the conductor patterns K1 and K2.
- the electrode pattern K4 is provided with a connection portion P8 that is connected to the via conductor V2. That is, the electrode pattern K4 is connected to the connection portion P3 of the conductor pattern K2 of the inductor L1 by the via conductor V2.
- An electrode pattern K3 forming the other electrode of the capacitor C1 is formed on the insulating substrate N3.
- the electrode pattern K3 is provided at a position overlapping part of the conductor patterns K1 and K2 in the stacking direction (Z direction). That is, the electrode pattern K3 is provided at a position that reduces the area overlapping the opening of the inductor L1 formed by the conductor patterns K1 and K2.
- the electrode pattern K3 is electrically connected to the fifth electrode 32b and the sixth electrode 32c of the second external electrode 32. As shown in FIG.
- the top surface electrode You may apply the structure which does not have. As a result, it is possible to prevent the occurrence of parasitic capacitance between the top electrode and the inductor L1 even in a filter device that constitutes an LC series circuit, and suppress the occurrence of parallel resonance due to the parasitic capacitance. can be done.
- FIG. 3 An electronic component 300 according to Embodiment 3 will be described with reference to FIGS. 7 to 15.
- FIG. In the third embodiment, as electronic component 300, a small chip component type filter device in which inductor L12 and capacitor C11 are connected in series and inductor L12, capacitor C11 and inductor L11 are connected in parallel will be described. .
- electronic component 300 according to Embodiment 3 only the configuration different from electronic component 100 according to Embodiment 1 and electronic component 200 according to Embodiment 2 will be mainly described.
- the same components as those of the component 100 and the electronic component 200 according to the second embodiment are denoted by the same reference numerals, and descriptions thereof are omitted.
- FIG. 7 is a cross-sectional view showing the configuration inside the insulator 10 of the electronic component 300 according to the third embodiment.
- FIG. 8 is an exploded plan view showing the configuration of electronic component 300 according to the third embodiment.
- electronic component 300 includes, in insulator 10, inductor L11 formed of conductor patterns K11 to K14, inductor L12 formed of conductor patterns K15 to K18, and electrode pattern K19. , K20.
- inductor L12 and capacitor C11 are connected in series, and inductor L12, capacitor C11, and inductor L11 are connected in parallel, whereby electronic component 300 forms a resonance circuit.
- At least one of the conductor patterns K15 to K18 is an example of the "first conductor pattern" of the present disclosure.
- the inductor L12 is an example of the “inductor” of the present disclosure
- the inductor L11 is an example of the “other inductor” of the present disclosure.
- the conductor patterns K11 to K14 of the inductor L11 are stacked parallel to the first main surface 11 of the insulator 10 and electrically connected by a plurality of via conductors.
- the conductor patterns K15 to K18 of the inductor L12 are stacked parallel to the first main surface 11 of the insulator 10 and electrically connected by a plurality of via conductors.
- the inductor L11 is arranged closer to the second main surface 12 than the inductor L12.
- the conductor patterns K15 to K18 of the inductor L12 are stacked below the conductor patterns K11 to K14 of the inductor L11 in the Z direction via an insulating layer. That is, the inductor L12 is arranged closer to the first main surface 11 than the inductor L11.
- the electrode patterns K19 and K20 of the capacitor C11 are stacked below the conductor patterns K15 to K18 of the inductor L12 in the Z direction via an insulating layer. That is, the capacitor C11 is arranged closer to the first main surface 11 than the inductors L11 and L12.
- the electronic component 300 includes insulating substrates N1 to N20 in order from the second main surface 12 side.
- conductor patterns and electrode patterns are formed by a printing method on the insulating substrates N1 to N20.
- a conductor pattern K11 forming part of the inductor L11 is formed on the insulating substrate N11.
- the conductor pattern K11 is formed so as to extend clockwise about 3/4 from the upper left side of the insulating substrate N11 in the figure.
- the starting end of the conductor pattern K11 is electrically connected to the second electrode 31b of the first external electrode 31.
- a connection portion P11 connected to the via conductor V11A and a connection portion P12 connected to the via conductor V11B are provided in the vicinity of the terminal end of the conductor pattern K11.
- a conductor pattern K12 forming part of the inductor L11 is formed on the insulating substrate N12.
- the conductor pattern K12 is formed so as to extend clockwise about 3/4 from the upper left side of the insulating substrate N12 in the drawing.
- the starting end of the conductor pattern K12 is electrically connected to the second electrode 31b of the first external electrode 31.
- a connection portion P13 connected to the via conductors V11A and V12A and a connection portion P14 connected to the via conductors V11B and V12B are provided near the end of the conductor pattern K12.
- a conductor pattern K13 forming part of the inductor L11 is formed on the insulating substrate N13.
- the conductor pattern K13 is formed so as to extend about 3/4 clockwise from the lower right side of the insulating substrate N13 in the figure.
- a connection portion P15 connected to the via conductors V12A and V13A and a connection portion P15 connected to the via conductors V12B and V13B are provided in the vicinity of the starting end of the conductor pattern K13.
- a terminal end of the conductor pattern K13 is electrically connected to the fifth electrode 32b of the second external electrode 32. As shown in FIG.
- a conductor pattern K14 forming part of the inductor L11 is formed on the insulating substrate N14.
- the conductor pattern K14 is formed so as to extend clockwise about 3/4 from the lower right side of the insulating substrate N14 in the drawing.
- a connection portion P17 connected to the via conductor V13A and a connection portion P18 connected to the via conductor V13B are provided in the vicinity of the starting end of the conductor pattern K14.
- a terminal end of the conductor pattern K14 is electrically connected to the fifth electrode 32b of the second external electrode 32. As shown in FIG.
- the inductor L11 has the conductor patterns K11 and K12 connected in parallel, the conductor patterns K13 and K14 connected in parallel, and the conductor patterns K11, K12 and the conductor patterns K13, K14 connected in series.
- a coil is formed by being connected.
- a conductor pattern K15 forming part of the inductor L12 is formed on the insulating substrate N15.
- the conductor pattern K15 is formed so as to make about one turn counterclockwise from the upper left side of the insulating substrate N15 in the figure.
- the starting end of the conductor pattern K15 is electrically connected to the second electrode 31b of the first external electrode 31.
- a connection portion P19 connected to the via conductor V14 is provided in the vicinity of the terminal end of the conductor pattern K15.
- a conductor pattern K16 forming part of the inductor L12 is formed on the insulating substrate N16.
- the conductor pattern K16 is formed so as to make about one turn counterclockwise from the upper left side of the insulating substrate N16 in the figure.
- the starting end of the conductor pattern K16 is electrically connected to the second electrode 31b of the first external electrode 31.
- a connection portion P20 connected to the via conductors V14 and V15 is provided near the end of the conductor pattern K16.
- a conductor pattern K17 forming part of the inductor L12 is formed on the insulating substrate N17.
- the conductor pattern K17 is formed so as to make about one turn counterclockwise from the upper side of the insulating substrate N17 in the figure.
- a connection portion P21 connected to the via conductors V15 and V16A is provided in the vicinity of the starting end of the conductor pattern K17.
- a connection portion P22 connected to the via conductor V16B is provided in the vicinity of the terminal end of the conductor pattern K17.
- a conductor pattern K18 forming part of the inductor L12 is formed on the insulating substrate N18.
- the conductor pattern K18 is formed so as to make about one turn counterclockwise from the upper side of the insulating substrate N18 in the figure.
- a connection portion P23 connected to the via conductor V16A is provided in the vicinity of the starting end of the conductor pattern K18.
- a connection portion P24 connected to the via conductors V16B and V17 is provided near the end of the conductor pattern K18.
- the inductor L12 has the conductor patterns K15 and K16 connected in parallel, the conductor patterns K17 and K18 connected in parallel, and the conductor patterns K15, K16 and the conductor patterns K17, K18 connected in series.
- a coil is formed by being connected.
- An electrode pattern K19 forming one electrode of the capacitor C11 is formed on the insulating substrate N19.
- the electrode pattern K19 is provided at a position overlapping part of the conductor patterns K17 and K18 in the stacking direction (Z direction). That is, the electrode pattern K19 is provided at a position that reduces the area overlapping the opening of the inductor L12 formed by the conductor patterns K17 and K18.
- the electrode pattern K19 is provided with a connection portion P25 that connects to the via conductor V17. That is, the electrode pattern K19 is connected to the connection portion P24 of the conductor pattern K18 of the inductor L12 by the via conductor V17.
- An electrode pattern K20 forming the other electrode of the capacitor C11 is formed on the insulating substrate N20.
- the electrode pattern K20 is viewed in plan from the second main surface 12 side, the electrode pattern K20 is provided at a position overlapping part of the conductor patterns K17 and K18 in the stacking direction (Z direction). That is, the electrode pattern K20 is provided at a position that reduces the area overlapping the opening of the inductor L11 formed by the conductor patterns K17 and K18.
- the electrode pattern K20 is electrically connected to the fifth electrode 32b and the sixth electrode 32c of the second external electrode 32. As shown in FIG.
- the first electrode 31a has a portion overlapping the coil openings of the conductor patterns K11 to K18 when the first main surface 11 is viewed from the second main surface 12 side in the Z direction.
- the first external electrode 31 does not overlap the coil openings of the conductor patterns K11 to K18 on the second main surface 12 when the first main surface 11 is viewed from the second main surface 12 side in the Z direction.
- the first external electrode 31 does not overlap the conductor patterns K15 to K18 on the second main surface 12 when the second main surface 12 is viewed from the second main surface 12 side in the Z direction.
- the second electrode 32a has a portion overlapping the coil openings of the conductor patterns K11 to K18 when the first main surface 11 is viewed from the second main surface 12 side in the Z direction. . Further, the second external electrode 32 does not overlap the coil openings of the conductor patterns K11 to K18 on the second main surface 12 when the first main surface 11 is viewed from the second main surface 12 side in the Z direction. Furthermore, the second external electrode 32 does not overlap the conductor patterns K11 to K18 on the second main surface 12 when the second main surface 12 is viewed from the second main surface 12 side in the Z direction.
- a configuration without a top surface electrode may also be applied to a small chip component type filter device that forms a resonant circuit, such as the electronic component 300 according to the third embodiment.
- FIG. 9 is an equivalent circuit diagram of an electronic component 300 according to Embodiment 3 and an equivalent circuit diagram of an electronic component according to a comparative example.
- FIG. 9A shows an equivalent circuit diagram of an electronic component 300 according to Embodiment 3 that does not have electrodes (top surface electrodes) along the second main surface 12, which is the top surface.
- FIG. 9B shows, as an electronic component according to a comparative example, electrodes formed on the first main surface 12 along the second main surface 12, which is the top surface, in the electronic component 300 according to the third embodiment.
- An equivalent circuit diagram of a coil component with equivalent electrodes (top electrodes) is shown. Note that the electronic component according to the comparative example has the same configuration as the electronic component 300 according to the third embodiment, except that it has a top surface electrode.
- the electronic component 300 includes a first terminal T1, an inductor L12 connected to the first terminal T1, a capacitor C11 connected in series with the inductor L12, and a second terminal T2 connected to the capacitor C11. Further, electronic component 300 includes an inductor L11 connected in parallel with inductor L12 and capacitor C11.
- the first terminal T1 corresponds to the connection point of the first external electrode 31 on the mounting substrate
- the second terminal T2 corresponds to the connection point of the second external electrode 32 on the mounting substrate.
- FIG. 9 shows an equivalent circuit diagram in which mutual inductance +M is added to each of inductor L11 and inductor L12, and mutual inductance -M is added to first terminal T1 in consideration of mutual inductance M generated.
- inductor L11 and inductor L12 may not be magnetically coupled.
- the conductor pattern in the insulator constituting the inductor L11 arranged closest to the top electrode and the external electrode A parasitic capacitance C0 may occur with the top electrode. Since a parallel resonance circuit is formed by the parasitic capacitance C0 and the inductor L11, when an electronic component is used in a frequency band that includes this parallel resonance frequency, there is a possibility that the electrical characteristics may differ from the designed values. The influence of the parasitic capacitance will be described below using an example with reference to FIGS. 10 to 15. FIG.
- FIG. 10 is a diagram showing a comparison of pass characteristics between the electronic component 300 according to Embodiment 3 and an electronic component according to a comparative example in which a parasitic capacitance of 0.5 pF is generated.
- FIG. 11 is a diagram showing a comparison of resistance components between the electronic component 300 according to Embodiment 3 and an electronic component according to a comparative example in which a parasitic capacitance of 0.5 pF is generated.
- FIG. 12 is a diagram showing a comparison of reactance components between the electronic component 300 according to Embodiment 3 and an electronic component according to a comparative example in which a parasitic capacitance of 0.5 pF is generated.
- FIG. 10 is a diagram showing a comparison of pass characteristics between the electronic component 300 according to Embodiment 3 and an electronic component according to a comparative example in which a parasitic capacitance of 0.5 pF is generated.
- FIG. 11 is a diagram showing a comparison of resistance components between the electronic component 300 according to Embodiment
- FIG. 13 is a diagram showing a comparison of pass characteristics between the electronic component 300 according to Embodiment 3 and an electronic component according to a comparative example in which a parasitic capacitance of 1 pF is generated.
- FIG. 14 is a diagram showing a comparison of resistance components between the electronic component 300 according to Embodiment 3 and an electronic component according to a comparative example in which a parasitic capacitance of 1 pF is generated.
- FIG. 15 is a diagram showing a comparison of reactance components between the electronic component 300 according to the third embodiment and an electronic component according to a comparative example in which a parasitic capacitance of 1 pF is generated.
- the horizontal axis indicates frequency.
- the vertical axes of FIGS. 10 and 13 indicate the insertion loss
- the vertical axes of FIGS. 11 and 14 indicate the resistance component
- the vertical axes of FIGS. 12 and 15 indicate the reactance component.
- the solid line indicates the filter characteristics when a parasitic capacitance of 0.5 pF is generated by the top electrode, and the broken line indicates the filter characteristics of the electronic component 300 when no parasitic capacitance is generated.
- the solid line indicates the filter characteristics when a parasitic capacitance of 1 pF is generated by the top electrode, and the broken line indicates the filter characteristics of the electronic component 300 when no parasitic capacitance is generated.
- f1 indicates, for example, 4.4 GHz, and if there is no parasitic capacitance, a resonance peak occurs due to parallel resonance of inductor L11, capacitor C11, and inductor L12. That is, it is a frequency designed to generate a resonance peak as a filter.
- f2 denotes, for example, 5.5 GHz and is the frequency used as a passband by the series resonance of inductor L12 and capacitor C11 in the absence of parasitic capacitance.
- the filter characteristics when no parasitic capacitance occurs in the electronic component 300 according to the third embodiment will be described.
- the signal is passed with low loss in the passband (for example, the band around frequency f2 in the figure), and the passband Signals can be efficiently attenuated in other attenuation bands (for example, a band near frequency f1 in the figure).
- FIG. 10 when comparing the solid line graph and the broken line graph, the peak of the attenuation band in which the signal should originally be attenuated changes from frequency f1 to frequency f1a.
- the electronic component according to the comparative example has a higher resistance component and reactance component in the passband (band around frequency f2 in the figure) than the electronic component 300 according to the third embodiment. is high, and as shown in FIG. 10, signal loss occurs in the passband (the band around frequency f2 in the figure).
- FIGS. 13-15 which will be described later, the greater the value of the parasitic capacitance, the greater the loss of such signals.
- the electronic component according to the comparative example has a pass band (frequency The resistance component and reactance component are high in the band near f2), and as shown in FIG. 13, signal loss occurs in the passband (band near frequency f2 in the figure). As the value of the parasitic capacitance increases, the frequency at which parallel resonance occurs approaches the passband (the band around frequency f2 in the figure), so the amount of signal loss increases.
- the electronic component 300 according to Embodiment 3 does not have a top surface electrode, so that it is possible to prevent parasitic capacitance from occurring between the top surface electrode and the electronic component 300 .
- the electronic component 300 can improve the filter characteristics without lowering the Q value of the inductor due to the top electrode. For example, as described with reference to FIGS. 10 to 15, unnecessary parallel resonance is not caused by the parasitic capacitance and the inductor L11, so that the passband is not narrowed and signal loss is prevented. can be prevented.
- the capacitor C11 is arranged on the mounting substrate (first main surface 11) and the inductor L11 is placed above the capacitor C11 without considering the parasitic capacitance generated between the conductor pattern of the inductor L11 and the top surface electrode. , L12, the influence of the parasitic capacitance on the filter characteristics can be reduced as much as possible.
- the inductor on the top surface side in this way, the degree of freedom in designing the conductor pattern can be improved.
- electronic component 300 according to the third embodiment does not have a top surface electrode, so that it is possible to prevent parasitic capacitance from being generated between the top surface electrode and the characteristic as a filter device. can be improved.
- 10 insulator 11 first principal surface, 12 second principal surface, 21 first side surface, 22 second side surface, 23 third side surface, 24 fourth side surface, 31 first external electrode, 32 second external electrode, 31a third 1 electrode, 31b second electrode, 31c third electrode, 32a fourth electrode, 32b fifth electrode, 32c sixth electrode, 100, 200, 300 electronic components, 310b, 310c, 320b, 320c ends.
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Abstract
An electronic component (100) comprises: an insulator (10); an inductor (L1) having a conductor pattern (K1, K2); and a first external electrode (31) electrically connected to the conductor pattern. The insulator has a first main surface (11), a second main surface (12) opposite the first main surface, and a first side surface (21), a second side surface (22), a third side surface (23), and a fourth side surface (24) that connect the first main surface and the second main surface. The conductor pattern has a coil opening. The first external electrode includes a first electrode (31a) provided along the first main surface, a second electrode (31b) provided along the first side surface and electrically connected to the first electrode, and a third electrode (31c) provided along the second side surface and electrically connected to the first electrode. When the first main surface is viewed in plan, the first electrode includes a portion that overlaps the coil opening. When the first main surface is viewed in plan, the first external electrode does not overlap the coil opening on the second main surface.
Description
本開示は、電子部品に関する。
This disclosure relates to electronic components.
従来、複数の絶縁体層を積層した絶縁体の内部にインダクタ(コイル)を設けたチップ部品型の小型の電子部品が知られている。たとえば、特開平9-246046号公報(特許文献1)には、コイル用導体が設けられた複数の磁性体シートが積み重なった積層体と、積層体内に設けられたコイル用導体が接続される外部電極とから構成される積層型のインダクタが開示されている。
Conventionally, there has been known a chip component type small electronic component in which an inductor (coil) is provided inside an insulator in which multiple insulator layers are laminated. For example, Japanese Patent Application Laid-Open No. 9-246046 (Patent Document 1) describes a laminate in which a plurality of magnetic sheets provided with coil conductors are stacked, and an external device to which the coil conductor provided in the laminate is connected. A laminated inductor composed of electrodes is disclosed.
特許文献1に開示されたインダクタのような電子部品を小型部品で実現する場合、絶縁体の外枠いっぱいにインダクタの導体パターンを形成して設計値のインダクタンス値を確保する必要がある。しかしながら、絶縁体の外枠いっぱいにインダクタの導体パターンを形成すると、絶縁体内の導体パターンと外部電極との間で寄生容量が発生し得る。特に高周波で使用する電子部品の場合、上述したような寄生容量によって電気特性が変わるなどの問題が生じるおそれがあった。
When realizing an electronic component such as the inductor disclosed in Patent Document 1 with a small component, it is necessary to form the conductor pattern of the inductor all over the outer frame of the insulator to secure the designed inductance value. However, if the conductor pattern of the inductor is formed all over the outer frame of the insulator, parasitic capacitance may occur between the conductor pattern inside the insulator and the external electrode. In particular, in the case of electronic components used at high frequencies, problems such as changes in electrical characteristics due to parasitic capacitance as described above may occur.
そこで、本開示の目的は、寄生容量の発生を抑えることができる電子部品を提供することである。
Therefore, an object of the present disclosure is to provide an electronic component that can suppress the generation of parasitic capacitance.
本開示の一形態に係る電子部品は、絶縁体と、インダクタと、第1外部電極とを備える。インダクタは、絶縁体内に構成され、第1導体パターンを有する。第1外部電極は、第1導体パターンと電気的に接続する。絶縁体は、第1主面と、第1主面と対向する第2主面と、第1主面と第2主面とを結ぶ第1側面、第2側面、第3側面、および第4側面とを有する。第1側面は、第2側面と対向する。第3側面は、第4側面と対向する。第1導体パターンは、コイル開口を有する。第1外部電極は、第1主面に沿って設けられた第1電極と、第1側面に沿って設けられ、第1電極と電気的に接続された第2電極と、第2側面に沿って設けられ、第1電極と電気的に接続された第3電極とを有する。第1電極は、第1主面を平面視したときに、コイル開口と重なる部分を有する。第1外部電極は、第1主面を平面視したときに、第2主面においてコイル開口と重ならない。
An electronic component according to one aspect of the present disclosure includes an insulator, an inductor, and a first external electrode. The inductor is constructed within the insulator and has a first conductor pattern. The first external electrode is electrically connected to the first conductor pattern. The insulator has a first main surface, a second main surface facing the first main surface, and a first side surface, a second side surface, a third side surface, and a fourth side surface connecting the first main surface and the second main surface. side. The first side faces the second side. The third side faces the fourth side. The first conductor pattern has a coil opening. The first external electrode includes a first electrode provided along the first main surface, a second electrode provided along the first side surface and electrically connected to the first electrode, and a second electrode provided along the first side surface. and a third electrode electrically connected to the first electrode. The first electrode has a portion that overlaps the coil opening when the first main surface is viewed in plan. The first external electrode does not overlap the coil opening on the second main surface when the first main surface is viewed in plan.
本開示の一形態によれば、絶縁体の第2主面には第1外部電極の電極が設けられておらず、第1外部電極は、第1主面を平面視したときに、第2主面において第1導体パターンのコイル開口と重ならないため、絶縁体内の第1導体パターンと第2主面との間において、寄生容量の発生を抑えることができる。
According to one aspect of the present disclosure, the electrode of the first external electrode is not provided on the second main surface of the insulator, and the first external electrode is the second main surface when the first main surface is viewed in plan. Since the main surface does not overlap the coil opening of the first conductor pattern, it is possible to suppress the generation of parasitic capacitance between the first conductor pattern in the insulator and the second main surface.
以下に、実施の形態に係る電子部品について、図面を参照しながら詳細に説明する。なお、図中同一または相当部分には同一符号を付してその説明は繰り返さない。
The electronic component according to the embodiment will be described in detail below with reference to the drawings. The same or corresponding parts in the drawings are denoted by the same reference numerals, and the description thereof will not be repeated.
(実施の形態1)
図1~図4を参照しながら、実施の形態1に係る電子部品100を説明する。図1は、実施の形態1に係る電子部品100の斜視図である。図1においては、電子部品100の短辺方向をX方向、長辺方向をY方向、高さ方向をZ方向としている。 (Embodiment 1)
Anelectronic component 100 according to Embodiment 1 will be described with reference to FIGS. 1 to 4. FIG. FIG. 1 is a perspective view of electronic component 100 according to Embodiment 1. FIG. In FIG. 1, the short side direction of the electronic component 100 is the X direction, the long side direction is the Y direction, and the height direction is the Z direction.
図1~図4を参照しながら、実施の形態1に係る電子部品100を説明する。図1は、実施の形態1に係る電子部品100の斜視図である。図1においては、電子部品100の短辺方向をX方向、長辺方向をY方向、高さ方向をZ方向としている。 (Embodiment 1)
An
実施の形態1に係る電子部品100は、少なくとも1つの導体パターンを備えるチップ部品型の小型のコイルである。電子部品100は、少なくとも1つの導体パターンが形成された複数の絶縁基板(絶縁体層)が積層された直方体状の絶縁体10を備える。絶縁基板の積層方向は、Z方向であり、図1においては矢印の向きが上層方向を示している。絶縁基板は、たとえば、硼珪酸ガラスを主成分とする絶縁材料、または、アルミナ、ジルコニア、およびポリイミド樹脂などの絶縁樹脂からなる。さらに、絶縁体10においては、焼成または硬化などの処理によって、複数の絶縁基板の界面が明確となっていない場合がある。
The electronic component 100 according to Embodiment 1 is a chip component type small coil that includes at least one conductor pattern. An electronic component 100 includes a rectangular parallelepiped insulator 10 in which a plurality of insulating substrates (insulator layers) on which at least one conductor pattern is formed are laminated. The stacking direction of the insulating substrates is the Z direction, and the direction of the arrow in FIG. 1 indicates the upper layer direction. The insulating substrate is made of, for example, an insulating material containing borosilicate glass as a main component, or an insulating resin such as alumina, zirconia, or polyimide resin. Furthermore, in the insulator 10, the interfaces between the insulating substrates may not be clearly defined due to processing such as baking or hardening.
絶縁体10は、第1主面11と、第1主面11と対向する第2主面12と、第1主面11と第2主面12とを結ぶ第1側面21、第2側面22、第3側面23、および第4側面24とを有する。
The insulator 10 has a first main surface 11 , a second main surface 12 facing the first main surface 11 , and a first side surface 21 and a second side surface 22 connecting the first main surface 11 and the second main surface 12 . , a third side 23 and a fourth side 24 .
図1において、第1主面11は、Z方向において第2主面12よりも下側に位置する。第1主面11は、実装基板に載置される実装面であり、電子部品100が実装基板に実装されると、第1主面11が実装基板に対向する。なお、実施の形態1においては、第1主面11を底面または裏面、第2主面12を天面ともいう。
In FIG. 1, the first main surface 11 is positioned below the second main surface 12 in the Z direction. The first main surface 11 is a mounting surface to be placed on the mounting board, and when the electronic component 100 is mounted on the mounting board, the first main surface 11 faces the mounting board. In addition, in Embodiment 1, the first main surface 11 is also referred to as a bottom surface or a back surface, and the second main surface 12 is also referred to as a top surface.
第1側面21および第2側面22は、絶縁体10の長手方向(Y方向)に設けられている。第1側面21は、第2側面22と対向する。第3側面23および第4側面24は、絶縁体10の短手方向(X方向)に設けられている。第3側面23は、第4側面24と対向する。
The first side surface 21 and the second side surface 22 are provided in the longitudinal direction (Y direction) of the insulator 10 . The first side surface 21 faces the second side surface 22 . The third side surface 23 and the fourth side surface 24 are provided in the short direction (X direction) of the insulator 10 . The third side surface 23 faces the fourth side surface 24 .
電子部品100は、絶縁体10の内部に設けられた少なくとも1つの導体パターンと電気的に接続する第1外部電極31および第2外部電極32を備える。第1外部電極31は、絶縁体10の長手方向(Y方向)において、第2外部電極32よりも第3側面23に側に設けられている。第2外部電極32は、絶縁体10の長手方向(Y方向)において、第1外部電極31よりも第4側面24側に設けられている。
The electronic component 100 includes a first external electrode 31 and a second external electrode 32 electrically connected to at least one conductor pattern provided inside the insulator 10 . The first external electrode 31 is provided closer to the third side surface 23 than the second external electrode 32 in the longitudinal direction (Y direction) of the insulator 10 . The second external electrode 32 is provided closer to the fourth side surface 24 than the first external electrode 31 in the longitudinal direction (Y direction) of the insulator 10 .
第1外部電極31および第2外部電極32は、絶縁体10の底面である第1主面11に限らず、第1主面11と第2主面12とを結ぶ第1側面21および第2側面22にも電極(たとえば、電極面)が形成されている。
The first external electrode 31 and the second external electrode 32 are not limited to the first main surface 11, which is the bottom surface of the insulator 10, but also the first side surface 21 and the second side surface 21 connecting the first main surface 11 and the second main surface 12. An electrode (for example, an electrode surface) is also formed on the side surface 22 .
具体的には、第1外部電極31は、第1主面11に沿って設けられた第1電極31aと、第1側面21に沿って設けられた第2電極31bと、第2側面22に沿って設けられた第3電極31cとを有する。第2電極31bおよび第3電極31cは、絶縁体10の外周に沿った経路で第1電極31aと電気的に接続されている。すなわち、第1電極31a、第2電極31b、および第3電極31cは、絶縁体10の外周に沿った経路で電気的に接続されることによって、同電位となるように設計されている。
Specifically, the first external electrode 31 includes a first electrode 31a provided along the first main surface 11, a second electrode 31b provided along the first side surface 21, and a second electrode 31b provided along the first side surface 22. and a third electrode 31c provided along. The second electrode 31b and the third electrode 31c are electrically connected to the first electrode 31a through a path along the outer circumference of the insulator 10. As shown in FIG. That is, the first electrode 31a, the second electrode 31b, and the third electrode 31c are designed to be at the same potential by being electrically connected through a path along the outer periphery of the insulator 10. FIG.
また、第1外部電極31は、第2主面12、第3側面23、および第4側面24に沿った電極を有していない。すなわち、第1主面11を下側(実装基板側)にして第3側面23側から第1外部電極31を見た場合、第1外部電極31は、凹型(U字型)または略凹型(略U字型)の形状を有する。厳密には、第1側面21に沿って設けられた第2電極31bの端部310bおよび第2側面22に沿って設けられた第3電極31cの端部310cが第2主面12に掛かっているが、端部310b,310cには、絶縁体10内の導体パターンが直接的に接続されることはない。なお、第1外部電極31は、端部310b,310cが第2主面12に掛かからないように絶縁体10に設けられてもよい。
Also, the first external electrode 31 does not have electrodes along the second main surface 12 , the third side surface 23 and the fourth side surface 24 . That is, when the first external electrode 31 is viewed from the third side surface 23 side with the first main surface 11 facing downward (mounting substrate side), the first external electrode 31 is concave (U-shaped) or substantially concave ( approximately U-shaped). Strictly speaking, the end portion 310b of the second electrode 31b provided along the first side surface 21 and the end portion 310c of the third electrode 31c provided along the second side surface 22 hang on the second main surface 12. However, the conductor patterns in the insulator 10 are not directly connected to the ends 310b and 310c. Note that the first external electrode 31 may be provided on the insulator 10 so that the ends 310b and 310c do not overlap the second main surface 12 .
第2外部電極32は、第1主面11に沿って設けられた第4電極32aと、第1側面21に沿って設けられた第5電極32bと、第2側面22に沿って設けられた第6電極32cとを有する。第5電極32bおよび第6電極32cは、絶縁体10の外周に沿った経路で第4電極32aと電気的に接続されている。すなわち、第4電極32a、第5電極32b、および第6電極32cは、絶縁体10の外周に沿った経路で電気的に接続されることによって、同電位となる。なお、第2外部電極32は、第5電極32bおよび第6電極32cの両方を有する場合に限らず、第5電極32bおよび第6電極32cのうちのいずれか1つを有していてもよい。
The second external electrode 32 includes a fourth electrode 32a provided along the first main surface 11, a fifth electrode 32b provided along the first side surface 21, and a fourth electrode 32b provided along the second side surface 22. and a sixth electrode 32c. The fifth electrode 32b and the sixth electrode 32c are electrically connected to the fourth electrode 32a through a path along the outer periphery of the insulator 10. As shown in FIG. That is, the fourth electrode 32a, the fifth electrode 32b, and the sixth electrode 32c are electrically connected by a path along the outer circumference of the insulator 10, and thus have the same potential. The second external electrode 32 is not limited to having both the fifth electrode 32b and the sixth electrode 32c, and may have either one of the fifth electrode 32b and the sixth electrode 32c. .
また、第2外部電極32は、第2主面12、第3側面23、および第4側面24に沿った電極を有していない。すなわち、第1主面11を下側(実装基板側)にして第4側面24側から第2外部電極32を見た場合、第2外部電極32は、凹型(U字型)または略凹型(略U字型)の形状を有する。厳密には、第1側面21に沿って設けられた第5電極32bの端部320bおよび第2側面22に沿って設けられた第6電極32cの端部320cが第2主面12に掛かっているが、端部320b,320cには、絶縁体10内の導体パターンが直接的に接続されることはない。なお、第2外部電極32は、端部320b,320cが第2主面12に掛かからないように絶縁体10に設けられてもよい。
Also, the second external electrode 32 does not have electrodes along the second main surface 12 , the third side surface 23 and the fourth side surface 24 . That is, when the second external electrode 32 is viewed from the fourth side surface 24 side with the first main surface 11 facing downward (mounting substrate side), the second external electrode 32 is concave (U-shaped) or substantially concave ( approximately U-shaped). Strictly speaking, the end portion 320b of the fifth electrode 32b provided along the first side surface 21 and the end portion 320c of the sixth electrode 32c provided along the second side surface 22 hang on the second main surface 12. However, the conductor patterns in the insulator 10 are not directly connected to the ends 320b and 320c. The second external electrode 32 may be provided on the insulator 10 so that the ends 320 b and 320 c do not overlap the second main surface 12 .
なお、第1外部電極31および第2外部電極32は、第1側面21および第2側面22のいずれにも電極を有するが、第1外部電極31および第2外部電極32は、第1側面21および第2側面22のいずれか一方のみに電極を有していてもよい。すなわち、第1外部電極31および第2外部電極32は、第1主面11を下側(実装基板側)にして第3側面23側または第4側面24側から見た場合に、L字型または略L字型の形状を有していてもよい。
Although the first external electrode 31 and the second external electrode 32 have electrodes on both the first side surface 21 and the second side surface 22 , the first external electrode 31 and the second external electrode 32 have electrodes on the first side surface 21 and the second external electrode 32 . and the second side surface 22 may have an electrode. That is, the first external electrode 31 and the second external electrode 32 are L-shaped when viewed from the third side surface 23 side or the fourth side surface 24 side with the first main surface 11 facing downward (mounting substrate side). Alternatively, it may have a substantially L-shaped shape.
また、第1外部電極31および第2外部電極32は、第3側面23および第4側面24に電極を有していてもよい。第1外部電極31および第2外部電極32のいずれか一方は、少なくとも、天面である第2主面12に沿って電極(以下、「天面電極」とも称する。)を有さないように構成されればよい。
Also, the first external electrode 31 and the second external electrode 32 may have electrodes on the third side surface 23 and the fourth side surface 24 . Either one of the first external electrode 31 and the second external electrode 32 should not have an electrode (hereinafter also referred to as "top electrode") along at least the second main surface 12, which is the top surface. It just needs to be configured.
図2は、実施の形態1に係る電子部品100の絶縁体10内の構成を示す断面図である。図3は、実施の形態1に係る電子部品100の構成を示す分解平面図である。図2および図3に示すように、電子部品100は、絶縁体10内において、導体パターンK1,K2によって構成されたインダクタL1を備える。なお、実施の形態1に係る電子部品100において、導体パターンK1または導体パターンK2は、本開示の「第1導体パターン」の一例である。インダクタL1の導体パターンK1,K2は、絶縁体10の第1主面11に対して平行に積み重なっており、ビア導体V1によって電気的に接続されている。
FIG. 2 is a cross-sectional view showing the configuration inside insulator 10 of electronic component 100 according to the first embodiment. FIG. 3 is an exploded plan view showing the configuration of electronic component 100 according to the first embodiment. As shown in FIGS. 2 and 3, the electronic component 100 includes an inductor L1 formed by conductor patterns K1 and K2 inside the insulator 10. As shown in FIGS. In addition, in the electronic component 100 according to Embodiment 1, the conductor pattern K1 or the conductor pattern K2 is an example of the "first conductor pattern" of the present disclosure. The conductor patterns K1 and K2 of the inductor L1 are stacked parallel to the first main surface 11 of the insulator 10 and electrically connected by the via conductors V1.
具体的には、図3に示すように、電子部品100は、第2主面12側から順に、絶縁基板N1~N3を備える。絶縁体10内において、導体パターンおよび電極パターンは、絶縁基板N1~N3において印刷工法で形成されている。
Specifically, as shown in FIG. 3, the electronic component 100 includes insulating substrates N1 to N3 in order from the second main surface 12 side. In the insulator 10, conductor patterns and electrode patterns are formed by a printing method on the insulating substrates N1 to N3.
絶縁基板N1には、インダクタL1の一部を構成する導体パターンK1が形成されている。導体パターンK1は、絶縁基板N1の図中左上側から左回りに約1周するように形成されている。導体パターンK1の始端は、第1外部電極31の第2電極31bと電気的に接続されている。導体パターンK1の終端の近傍には、ビア導体V1に接続する接続部P1が設けられている。
A conductor pattern K1 forming part of the inductor L1 is formed on the insulating substrate N1. The conductor pattern K1 is formed so as to make about one turn counterclockwise from the upper left side of the insulating substrate N1 in the figure. A starting end of the conductor pattern K1 is electrically connected to the second electrode 31b of the first external electrode 31 . A connection portion P1 connected to the via conductor V1 is provided in the vicinity of the terminal end of the conductor pattern K1.
絶縁基板N2には、インダクタL1の一部を構成する導体パターンK2が形成されている。導体パターンK2は、絶縁基板N2の図中上側中央から左回りに約1周するように形成されている。導体パターンK2の始端の近傍には、ビア導体V1に接続する接続部P2が設けられている。導体パターンK2の終端は、第2外部電極32の第5電極32bと電気的に接続されている。
A conductor pattern K2 forming part of the inductor L1 is formed on the insulating substrate N2. The conductor pattern K2 is formed so as to make about one turn counterclockwise from the center of the upper side of the insulating substrate N2 in the drawing. A connection portion P2 connected to the via conductor V1 is provided in the vicinity of the starting end of the conductor pattern K2. A terminal end of the conductor pattern K2 is electrically connected to the fifth electrode 32b of the second external electrode 32. As shown in FIG.
このように、電子部品100の絶縁体10内においては、導体パターンK1,K2がビア導体V1を介して第1外部電極31の第2電極31bおよび第2外部電極32の第4電極32aと電気的に接続されている。インダクタL1は、導体パターンK1と導体パターンK2とが直列接続されることによって、コイルを構成している。
Thus, in the insulator 10 of the electronic component 100, the conductor patterns K1 and K2 are electrically connected to the second electrode 31b of the first external electrode 31 and the fourth electrode 32a of the second external electrode 32 through the via conductors V1. properly connected. The inductor L1 forms a coil by connecting the conductor pattern K1 and the conductor pattern K2 in series.
なお、インダクタL1は、導体パターンK1および導体パターンK2の2つの導体パターンによってコイルを構成する場合に限らず、3つ以上の導体パターンによってコイルを構成してもよい。
It should be noted that the inductor L1 is not limited to forming a coil with two conductor patterns, the conductor pattern K1 and the conductor pattern K2, and may form a coil with three or more conductor patterns.
複数層に渡ってインダクタの導体パターンを形成する場合、第1主面11の第1電極31aまたは第4電極32aのみを用いると、複数層に渡ってビア導体を設けなければならず、インダクタL1の開口を小さくするか、インダクタL1の開口はそのままで電子部品のサイズを大きくする必要があるが、実施の形態1に係る電子部品100のように、第1主面11の第1電極31aおよび第4電極32aに加えて、絶縁体10の第1側面21および第2側面22にも電極を設けた場合は、ビアを用いることなく第1側面21および第2側面22にもインダクタの導体パターンを接続させることができる。これにより、電子部品100においては、絶縁体10の外枠いっぱいに導体パターンを形成することができる。さらに、第1側面21と第2側面22とが同電位であるため、側面の2カ所にインダクタの導体パターンを接続させることができる。このように側面電極を形成することによって、導体パターンの長さ調整がし易くなり、導体パターンの設計の自由度を向上させることができる。
When the conductor pattern of the inductor is formed over multiple layers, if only the first electrode 31a or the fourth electrode 32a on the first main surface 11 is used, via conductors must be provided over multiple layers, and the inductor L1 or to increase the size of the electronic component while keeping the opening of the inductor L1 as it is. When electrodes are provided on the first side surface 21 and the second side surface 22 of the insulator 10 in addition to the fourth electrode 32a, the conductor pattern of the inductor can also be formed on the first side surface 21 and the second side surface 22 without using vias. can be connected. Thereby, in electronic component 100 , a conductor pattern can be formed all over the outer frame of insulator 10 . Furthermore, since the first side surface 21 and the second side surface 22 are at the same potential, the conductor pattern of the inductor can be connected to two locations on the side surface. By forming the side electrodes in this way, it becomes easier to adjust the length of the conductor pattern, and the degree of freedom in designing the conductor pattern can be improved.
ここで、電子部品100のようなインダクタを備える小型の電子部品の場合、絶縁体の外枠いっぱいにインダクタの導体パターンを形成してインダクタンス値を確保する。絶縁体の外枠いっぱいにインダクタの導体パターンを形成すると、絶縁体内の導体パターンと特に導体パターンと重なりあう主面上の外部電極との間で寄生容量が発生し得る。
Here, in the case of a small electronic component having an inductor such as the electronic component 100, the conductor pattern of the inductor is formed all over the outer frame of the insulator to secure the inductance value. When the conductor pattern of the inductor is formed all over the outer frame of the insulator, parasitic capacitance may occur between the conductor pattern in the insulator and, in particular, the external electrodes on the main surface overlapping the conductor pattern.
そこで、図1を参照しながら説明したように、実施の形態1に係る電子部品100は、底面である第1主面11と、側面である第1側面21および第2側面22とにおいては電極を有する一方で、天面である第2主面12においては電極を有さないように、第1外部電極31および第2外部電極32が設けられている。
Therefore, as described with reference to FIG. 1, electronic component 100 according to Embodiment 1 has electrodes on first main surface 11 that is the bottom surface and on first side surface 21 and second side surface 22 that are side surfaces. The first external electrode 31 and the second external electrode 32 are provided so that the second main surface 12, which is the top surface, has no electrodes.
また、図3に示すように、第1電極31aは、Z方向において第2主面12側から第1主面11を平面視したときに、導体パターンK1,K2のコイル開口と重なる部分を有する。また、第1外部電極31は、Z方向において第2主面12側から第1主面11を平面視したときに、第2主面12において導体パターンK1,K2のコイル開口と重ならない。さらに、第1外部電極31は、Z方向において第2主面12側から第1主面11を平面視したときに、第2主面12において導体パターンK1,K2と重ならない。
Further, as shown in FIG. 3, the first electrode 31a has a portion overlapping the coil openings of the conductor patterns K1 and K2 when the first main surface 11 is viewed from the second main surface 12 side in the Z direction. . Also, the first external electrode 31 does not overlap the coil openings of the conductor patterns K1 and K2 on the second main surface 12 when the first main surface 11 is viewed from the second main surface 12 side in the Z direction. Furthermore, the first external electrode 31 does not overlap the conductor patterns K1 and K2 on the second main surface 12 when the first main surface 11 is viewed from the second main surface 12 side in the Z direction.
また、図3に示すように、第2電極32aは、Z方向において第2主面12側から第1主面11を平面視したときに、導体パターンK1,K2のコイル開口と重なる部分を有する。また、第2外部電極32は、Z方向において第2主面12側から第1主面11を平面視したときに、第2主面12において導体パターンK1,K2のコイル開口と重ならない。さらに、第2外部電極32は、Z方向において第2主面12側から第1主面11を平面視したときに、第2主面12において導体パターンK1,K2と重ならない。
Further, as shown in FIG. 3, the second electrode 32a has a portion that overlaps the coil openings of the conductor patterns K1 and K2 when the first main surface 11 is viewed from the second main surface 12 side in the Z direction. . In addition, the second external electrode 32 does not overlap the coil openings of the conductor patterns K1 and K2 on the second main surface 12 when the first main surface 11 is viewed from the second main surface 12 side in the Z direction. Furthermore, the second external electrode 32 does not overlap the conductor patterns K1 and K2 on the second main surface 12 when the first main surface 11 is viewed from the second main surface 12 side in the Z direction.
すなわち、第1主面11側には外部電極を設けることによって基板への実装を容易にする一方で、第2主面12側には外部電極を設けないことによって、導体パターンとの間における寄生容量の発生を抑制する。
That is, by providing the external electrodes on the first main surface 11 side, mounting on the substrate is facilitated, while by not providing the external electrodes on the second main surface 12 side, parasitics between the conductor pattern and the conductor pattern are facilitated. Suppress the generation of capacity.
図4は、実施の形態1に係る電子部品100の等価回路図および比較例に係る電子部品の等価回路図である。図4(A)には、第2主面12に沿って電極(天面電極)を有していない実施の形態1に係る電子部品100の等価回路図が示されている。図4(B)には、比較例に係る電子部品として、実施の形態1に係る電子部品100において第2主面12に沿って電極(天面電極)を有するコイル部品の等価回路図が示されている。なお、比較例に係る電子部品は、天面電極を有する点以外、実施の形態1に係る電子部品100と同じ構成を備えるものとする。また、図4において、第1端子T1は、第1外部電極31の実装基板における接続点に対応し、第2端子T2は、第2外部電極32の実装基板における接続点に対応する。
FIG. 4 is an equivalent circuit diagram of the electronic component 100 according to Embodiment 1 and an equivalent circuit diagram of the electronic component according to the comparative example. FIG. 4A shows an equivalent circuit diagram of electronic component 100 according to Embodiment 1 that does not have electrodes (top electrodes) along second main surface 12 . FIG. 4B shows an equivalent circuit diagram of a coil component having electrodes (top electrodes) along second main surface 12 in electronic component 100 according to Embodiment 1 as an electronic component according to a comparative example. It is Note that the electronic component according to the comparative example has the same configuration as the electronic component 100 according to the first embodiment, except that it has a top surface electrode. 4, the first terminal T1 corresponds to the connection point of the first external electrode 31 on the mounting substrate, and the second terminal T2 corresponds to the connection point of the second external electrode 32 on the mounting substrate.
図4(B)に示すように、天面電極を有する比較例に係る電子部品の場合、インダクタL1を構成する絶縁体10内の導体パターンと、外部電極である天面電極との間で寄生容量C0が発生し得る。特に高周波で使用する電子部品の場合、このような寄生容量C0によって電気特性が変わるなどの問題が生じるおそれがある。
As shown in FIG. 4(B), in the case of the electronic component according to the comparative example having the top electrode, parasitic currents are generated between the conductor pattern in the insulator 10 forming the inductor L1 and the top electrode, which is the external electrode. Capacitance C0 can occur. In particular, in the case of electronic components used at high frequencies, problems such as changes in electrical characteristics may occur due to the parasitic capacitance C0.
たとえば、寄生容量C0とインダクタL1とで並列共振回路が形成され、インピーダンスが無限大となる共振周波数が生じるため、インダクタを共振周波数付近の周波数で使用する場合は、狙いと異なる特性となる。寄生容量C0は、パターンで形成されるキャパシタンスに比べると小さいため、低周波域では問題とならないが、共振周波数が含まれるような高周波域では問題となる。また、インダクタL1の導体パターンと天面電極との間で寄生容量C0が発生することを考慮しながら絶縁体内で導体パターンを配置させなければならないため、導体パターンの設計の自由度が低下する。
For example, a parallel resonance circuit is formed by the parasitic capacitance C0 and the inductor L1, and a resonance frequency at which the impedance becomes infinite occurs. Therefore, when the inductor is used at a frequency near the resonance frequency, the characteristics are different from the intended characteristics. Since the parasitic capacitance C0 is smaller than the capacitance formed by the pattern, it does not become a problem in the low frequency range, but becomes a problem in the high frequency range including the resonance frequency. In addition, since the conductor pattern must be arranged in the insulator while considering the parasitic capacitance C0 between the conductor pattern of the inductor L1 and the top electrode, the degree of freedom in designing the conductor pattern is reduced.
これに対して、図4(A)に示すように、天面電極を有さない実施の形態1に係る電子部品100の場合、天面電極と導体パターンとにおける寄生容量C0が発生しないため、寄生容量C0によって並列共振回路が発生することがなく、電気特性が変化することがない。また、インダクタL1の導体パターンと天面電極との間で寄生容量が発生することを考慮する必要がないため、導体パターンの設計の自由度を向上させることができる。
On the other hand, as shown in FIG. 4A, in the case of the electronic component 100 according to the first embodiment that does not have the top electrode, the parasitic capacitance C0 does not occur between the top electrode and the conductor pattern. A parallel resonance circuit is not generated by the parasitic capacitance C0, and the electrical characteristics are not changed. In addition, since it is not necessary to consider the occurrence of parasitic capacitance between the conductor pattern of the inductor L1 and the top electrode, the degree of freedom in designing the conductor pattern can be improved.
また、実装基板(第1主面11)から極力離して第2主面12側に近づけるようにしてインダクタL1の導体パターンを配置させることもできる。第1主面11の外部電極である第1電極面31aおよび第4電極面32aと、導体パターンとをできるだけ離すことによって、これらの外部電極と導体パターンとにおける寄生容量を小さくし、使用する周波数帯において並列共振が発生しないように設計することができる。また、インダクタL1の開口部に外部電極が重なると、インダクタL1で発生した磁場により、天面電極内で渦電流が発生してインダクタのQ値が低下するが、天面電極を形成しないことによってQ値の低下を抑制することができる。このように、実施の形態1に係る電子部品100は、天面電極を有さないことによって、天面電極と導体パターンとの間において寄生容量が発生することを防止することができ、コイルとしての特性を良好にすることができる。
Also, the conductor pattern of the inductor L1 can be arranged so as to be as far away from the mounting board (first main surface 11) as possible and to be close to the second main surface 12 side. By separating the first electrode surface 31a and the fourth electrode surface 32a, which are the external electrodes of the first main surface 11, from the conductor pattern as much as possible, the parasitic capacitance between these external electrodes and the conductor pattern is reduced, and the frequency to be used is reduced. It can be designed so that parallel resonance does not occur in the band. In addition, when the external electrode overlaps the opening of the inductor L1, the magnetic field generated by the inductor L1 generates an eddy current in the top electrode, which reduces the Q value of the inductor. A decrease in the Q value can be suppressed. As described above, electronic component 100 according to Embodiment 1 does not have a top surface electrode, so that it is possible to prevent parasitic capacitance from occurring between the top surface electrode and the conductor pattern. characteristics can be improved.
(実施の形態2)
図5および図6を参照しながら、実施の形態2に係る電子部品200を説明する。実施の形態2においては、電子部品200として、インダクタL1とキャパシタC1とが直列接続されたチップ部品型の小型のフィルタ装置を説明する。なお、実施の形態2に係る電子部品200においては、実施の形態1に係る電子部品100と異なる構成のみを主に説明し、実施の形態1に係る電子部品100と同じ構成については実施の形態2に係る電子部品200においても同じ符号を付すとともに、その説明を省略する。 (Embodiment 2)
Anelectronic component 200 according to Embodiment 2 will be described with reference to FIGS. 5 and 6. FIG. In the second embodiment, as electronic component 200, a chip component type compact filter device in which inductor L1 and capacitor C1 are connected in series will be described. In the electronic component 200 according to Embodiment 2, only the configuration different from that of the electronic component 100 according to Embodiment 1 will be mainly described. The electronic component 200 according to No. 2 is also given the same reference numerals, and the description thereof is omitted.
図5および図6を参照しながら、実施の形態2に係る電子部品200を説明する。実施の形態2においては、電子部品200として、インダクタL1とキャパシタC1とが直列接続されたチップ部品型の小型のフィルタ装置を説明する。なお、実施の形態2に係る電子部品200においては、実施の形態1に係る電子部品100と異なる構成のみを主に説明し、実施の形態1に係る電子部品100と同じ構成については実施の形態2に係る電子部品200においても同じ符号を付すとともに、その説明を省略する。 (Embodiment 2)
An
図5は、実施の形態2に係る電子部品200の絶縁体10内の構成を示す断面図および等価回路図である。図6は、実施の形態2に係る電子部品200の構成を示す分解平面図である。図5および図6に示すように、電子部品200は、絶縁体10内において、導体パターンK1,K2によって構成されたインダクタL1と、電極パターンK3,K4によって構成されたキャパシタC1とを備える。絶縁体10内においてインダクタL1とキャパシタC1とが直列接続されることによって、電子部品200は、直列共振回路を構成している。なお、実施の形態2に係る電子部品200において、導体パターンK1または導体パターンK2は、本開示の「第1導体パターン」の一例である。
5A and 5B are a cross-sectional view and an equivalent circuit diagram showing the configuration inside the insulator 10 of the electronic component 200 according to the second embodiment. FIG. 6 is an exploded plan view showing the configuration of electronic component 200 according to the second embodiment. As shown in FIGS. 5 and 6, electronic component 200 includes, in insulator 10, an inductor L1 configured by conductor patterns K1 and K2 and a capacitor C1 configured by electrode patterns K3 and K4. By connecting inductor L1 and capacitor C1 in series within insulator 10, electronic component 200 forms a series resonance circuit. In addition, in the electronic component 200 according to the second embodiment, the conductor pattern K1 or the conductor pattern K2 is an example of the "first conductor pattern" of the present disclosure.
キャパシタC1の電極パターンK3,K4は、Z方向においてインダクタL1の導体パターンK1,K2よりも下側に絶縁層を介して積み重ねられている。すなわち、キャパシタC1は、インダクタL1よりも第1主面11側に配置されている。第2主面12側からキャパシタC1を平面視した場合、キャパシタC1の電極パターンK3,K4は、積層方向(Z方向)において導体パターンK1,K2の一部と重なる位置に設けられている。
The electrode patterns K3 and K4 of the capacitor C1 are stacked below the conductor patterns K1 and K2 of the inductor L1 in the Z direction via an insulating layer. That is, the capacitor C1 is arranged closer to the first main surface 11 than the inductor L1. When the capacitor C1 is viewed from the second main surface 12 side, the electrode patterns K3 and K4 of the capacitor C1 are provided at positions that partially overlap the conductor patterns K1 and K2 in the stacking direction (Z direction).
図6に示すように、電子部品200は、絶縁基板N2と第1主面11との間に絶縁基板N3および絶縁基板N4をさらに備える。絶縁基板N4には、キャパシタC1の一方の電極を構成する電極パターンK4が形成されている。第2主面12側から電極パターンK4を平面視した場合、電極パターンK4は、積層方向(Z方向)において導体パターンK1,K2の一部と重なる位置に設けられている。つまり、電極パターンK4は、導体パターンK1,K2によって構成されるインダクタL1の開口部と重なる領域を少なくする位置に設けられている。電極パターンK4には、ビア導体V2に接続する接続部P8が設けられている。すなわち、電極パターンK4は、ビア導体V2によって、インダクタL1の導体パターンK2の接続部P3に接続されている。
As shown in FIG. 6, the electronic component 200 further includes an insulating substrate N3 and an insulating substrate N4 between the insulating substrate N2 and the first main surface 11. As shown in FIG. An electrode pattern K4 forming one electrode of the capacitor C1 is formed on the insulating substrate N4. When the electrode pattern K4 is viewed in plan from the second main surface 12 side, the electrode pattern K4 is provided at a position overlapping part of the conductor patterns K1 and K2 in the stacking direction (Z direction). That is, the electrode pattern K4 is provided at a position that reduces the area overlapping the opening of the inductor L1 formed by the conductor patterns K1 and K2. The electrode pattern K4 is provided with a connection portion P8 that is connected to the via conductor V2. That is, the electrode pattern K4 is connected to the connection portion P3 of the conductor pattern K2 of the inductor L1 by the via conductor V2.
絶縁基板N3には、キャパシタC1の他方の電極を構成する電極パターンK3が形成されている。第2主面12側から電極パターンK3を平面視した場合、電極パターンK3は、積層方向(Z方向)において導体パターンK1,K2の一部と重なる位置に設けられている。つまり、電極パターンK3は、導体パターンK1,K2によって構成されるインダクタL1の開口部と重なる領域を少なくする位置に設けられている。電極パターンK3は、第2外部電極32の第5電極32bおよび第6電極32cと電気的に接続されている。
An electrode pattern K3 forming the other electrode of the capacitor C1 is formed on the insulating substrate N3. When the electrode pattern K3 is viewed from the second main surface 12 side, the electrode pattern K3 is provided at a position overlapping part of the conductor patterns K1 and K2 in the stacking direction (Z direction). That is, the electrode pattern K3 is provided at a position that reduces the area overlapping the opening of the inductor L1 formed by the conductor patterns K1 and K2. The electrode pattern K3 is electrically connected to the fifth electrode 32b and the sixth electrode 32c of the second external electrode 32. As shown in FIG.
このように、インダクタL1を含むチップ部品型の小型のコイルに限らず、実施の形態2に係る電子部品200のような共振回路を構成するチップ部品型の小型のフィルタ装置においても、天面電極を有さない構成を適用してもよい。これにより、LC直列回路を構成するフィルタ装置であっても、天面電極とインダクタL1との間で寄生容量が発生することを防止することができ、寄生容量による並列共振の発生を抑制することができる。
As described above, not only in a small chip part type coil including the inductor L1, but also in a small chip part type filter device forming a resonance circuit such as the electronic component 200 according to the second embodiment, the top surface electrode You may apply the structure which does not have. As a result, it is possible to prevent the occurrence of parasitic capacitance between the top electrode and the inductor L1 even in a filter device that constitutes an LC series circuit, and suppress the occurrence of parallel resonance due to the parasitic capacitance. can be done.
(実施の形態3)
図7~図15を参照しながら、実施の形態3に係る電子部品300を説明する。実施の形態3においては、電子部品300として、インダクタL12とキャパシタC11とが直列接続され、かつ、インダクタL12およびキャパシタC11とインダクタL11とが並列接続されたチップ部品型の小型のフィルタ装置を説明する。なお、実施の形態3に係る電子部品300においては、実施の形態1に係る電子部品100および実施の形態2に係る電子部品200と異なる構成のみを主に説明し、実施の形態1に係る電子部品100および実施の形態2に係る電子部品200と同じ構成については実施の形態3に係る電子部品300においても同じ符号を付すとともに、その説明を省略する。 (Embodiment 3)
Anelectronic component 300 according to Embodiment 3 will be described with reference to FIGS. 7 to 15. FIG. In the third embodiment, as electronic component 300, a small chip component type filter device in which inductor L12 and capacitor C11 are connected in series and inductor L12, capacitor C11 and inductor L11 are connected in parallel will be described. . In electronic component 300 according to Embodiment 3, only the configuration different from electronic component 100 according to Embodiment 1 and electronic component 200 according to Embodiment 2 will be mainly described. In the electronic component 300 according to the third embodiment, the same components as those of the component 100 and the electronic component 200 according to the second embodiment are denoted by the same reference numerals, and descriptions thereof are omitted.
図7~図15を参照しながら、実施の形態3に係る電子部品300を説明する。実施の形態3においては、電子部品300として、インダクタL12とキャパシタC11とが直列接続され、かつ、インダクタL12およびキャパシタC11とインダクタL11とが並列接続されたチップ部品型の小型のフィルタ装置を説明する。なお、実施の形態3に係る電子部品300においては、実施の形態1に係る電子部品100および実施の形態2に係る電子部品200と異なる構成のみを主に説明し、実施の形態1に係る電子部品100および実施の形態2に係る電子部品200と同じ構成については実施の形態3に係る電子部品300においても同じ符号を付すとともに、その説明を省略する。 (Embodiment 3)
An
図7は、実施の形態3に係る電子部品300の絶縁体10内の構成を示す断面図である。図8は、実施の形態3に係る電子部品300の構成を示す分解平面図である。図7および図8に示すように、電子部品300は、絶縁体10内において、導体パターンK11~K14によって構成されたインダクタL11と、導体パターンK15~K18によって構成されたインダクタL12と、電極パターンK19,K20によって構成されたキャパシタC11とを備える。絶縁体10内においてインダクタL12とキャパシタC11とが直列接続され、かつ、インダクタL12およびキャパシタC11とインダクタL11とが並列接続されることによって、電子部品300は、共振回路を構成している。なお、実施の形態3に係る電子部品300において、導体パターンK15~K18の少なくともいずれか1つは、本開示の「第1導体パターン」の一例である。また、実施の形態3に係る電子部品300において、インダクタL12は、本開示の「インダクタ」の一例であり、インダクタL11は、本開示の「他のインダクタ」の一例である。
FIG. 7 is a cross-sectional view showing the configuration inside the insulator 10 of the electronic component 300 according to the third embodiment. FIG. 8 is an exploded plan view showing the configuration of electronic component 300 according to the third embodiment. As shown in FIGS. 7 and 8, electronic component 300 includes, in insulator 10, inductor L11 formed of conductor patterns K11 to K14, inductor L12 formed of conductor patterns K15 to K18, and electrode pattern K19. , K20. In insulator 10, inductor L12 and capacitor C11 are connected in series, and inductor L12, capacitor C11, and inductor L11 are connected in parallel, whereby electronic component 300 forms a resonance circuit. Incidentally, in the electronic component 300 according to the third embodiment, at least one of the conductor patterns K15 to K18 is an example of the "first conductor pattern" of the present disclosure. Further, in the electronic component 300 according to the third embodiment, the inductor L12 is an example of the "inductor" of the present disclosure, and the inductor L11 is an example of the "other inductor" of the present disclosure.
インダクタL11の導体パターンK11~K14は、絶縁体10の第1主面11に対して平行に積み重なっており、複数のビア導体によって電気的に接続されている。インダクタL12の導体パターンK15~K18は、絶縁体10の第1主面11に対して平行に積み重なっており、複数のビア導体によって電気的に接続されている。インダクタL11は、インダクタL12よりも、第2主面12側に配置されている。
The conductor patterns K11 to K14 of the inductor L11 are stacked parallel to the first main surface 11 of the insulator 10 and electrically connected by a plurality of via conductors. The conductor patterns K15 to K18 of the inductor L12 are stacked parallel to the first main surface 11 of the insulator 10 and electrically connected by a plurality of via conductors. The inductor L11 is arranged closer to the second main surface 12 than the inductor L12.
インダクタL12の導体パターンK15~K18は、Z方向においてインダクタL11の導体パターンK11~K14よりも下側に絶縁層を介して積み重ねられている。すなわち、インダクタL12は、インダクタL11よりも第1主面11側に配置されている。キャパシタC11の電極パターンK19,K20は、Z方向においてインダクタL12の導体パターンK15~K18よりも下側に絶縁層を介して積み重ねられている。すなわち、キャパシタC11は、インダクタL11およびインダクタL12よりも第1主面11側に配置されている。
The conductor patterns K15 to K18 of the inductor L12 are stacked below the conductor patterns K11 to K14 of the inductor L11 in the Z direction via an insulating layer. That is, the inductor L12 is arranged closer to the first main surface 11 than the inductor L11. The electrode patterns K19 and K20 of the capacitor C11 are stacked below the conductor patterns K15 to K18 of the inductor L12 in the Z direction via an insulating layer. That is, the capacitor C11 is arranged closer to the first main surface 11 than the inductors L11 and L12.
具体的には、電子部品300は、第2主面12側から順に、絶縁基板N1~N20を備える。絶縁体10内において、導体パターンおよび電極パターンは、絶縁基板N1~N20において印刷工法で形成されている。
Specifically, the electronic component 300 includes insulating substrates N1 to N20 in order from the second main surface 12 side. In the insulator 10, conductor patterns and electrode patterns are formed by a printing method on the insulating substrates N1 to N20.
絶縁基板N11には、インダクタL11の一部を構成する導体パターンK11が形成されている。導体パターンK11は、絶縁基板N11の図中左上側から右回りに約3/4周するように形成されている。導体パターンK11の始端は、第1外部電極31の第2電極31bと電気的に接続されている。導体パターンK11の終端の近傍には、ビア導体V11Aに接続する接続部P11と、ビア導体V11Bに接続する接続部P12とが設けられている。
A conductor pattern K11 forming part of the inductor L11 is formed on the insulating substrate N11. The conductor pattern K11 is formed so as to extend clockwise about 3/4 from the upper left side of the insulating substrate N11 in the figure. The starting end of the conductor pattern K11 is electrically connected to the second electrode 31b of the first external electrode 31. As shown in FIG. A connection portion P11 connected to the via conductor V11A and a connection portion P12 connected to the via conductor V11B are provided in the vicinity of the terminal end of the conductor pattern K11.
絶縁基板N12には、インダクタL11の一部を構成する導体パターンK12が形成されている。導体パターンK12は、絶縁基板N12の図中左上側から右回りに約3/4周するように形成されている。導体パターンK12の始端は、第1外部電極31の第2電極31bと電気的に接続されている。導体パターンK12の終端の近傍には、ビア導体V11A,V12Aに接続する接続部P13と、ビア導体V11B,V12Bに接続する接続部P14とが設けられている。
A conductor pattern K12 forming part of the inductor L11 is formed on the insulating substrate N12. The conductor pattern K12 is formed so as to extend clockwise about 3/4 from the upper left side of the insulating substrate N12 in the drawing. The starting end of the conductor pattern K12 is electrically connected to the second electrode 31b of the first external electrode 31. As shown in FIG. A connection portion P13 connected to the via conductors V11A and V12A and a connection portion P14 connected to the via conductors V11B and V12B are provided near the end of the conductor pattern K12.
絶縁基板N13には、インダクタL11の一部を構成する導体パターンK13が形成されている。導体パターンK13は、絶縁基板N13の図中右下側から右回りに約3/4周するように形成されている。導体パターンK13の始端の近傍には、ビア導体V12A,V13Aに接続する接続部P15と、ビア導体V12B,V13Bに接続する接続部P15とが設けられている。導体パターンK13の終端は、第2外部電極32の第5電極32bと電気的に接続されている。
A conductor pattern K13 forming part of the inductor L11 is formed on the insulating substrate N13. The conductor pattern K13 is formed so as to extend about 3/4 clockwise from the lower right side of the insulating substrate N13 in the figure. A connection portion P15 connected to the via conductors V12A and V13A and a connection portion P15 connected to the via conductors V12B and V13B are provided in the vicinity of the starting end of the conductor pattern K13. A terminal end of the conductor pattern K13 is electrically connected to the fifth electrode 32b of the second external electrode 32. As shown in FIG.
絶縁基板N14には、インダクタL11の一部を構成する導体パターンK14が形成されている。導体パターンK14は、絶縁基板N14の図中右下側から右回りに約3/4周するように形成されている。導体パターンK14の始端の近傍には、ビア導体V13Aに接続する接続部P17と、ビア導体V13Bに接続する接続部P18とが設けられている。導体パターンK14の終端は、第2外部電極32の第5電極32bと電気的に接続されている。
A conductor pattern K14 forming part of the inductor L11 is formed on the insulating substrate N14. The conductor pattern K14 is formed so as to extend clockwise about 3/4 from the lower right side of the insulating substrate N14 in the drawing. A connection portion P17 connected to the via conductor V13A and a connection portion P18 connected to the via conductor V13B are provided in the vicinity of the starting end of the conductor pattern K14. A terminal end of the conductor pattern K14 is electrically connected to the fifth electrode 32b of the second external electrode 32. As shown in FIG.
このように、インダクタL11は、導体パターンK11と導体パターンK12とが並列接続され、導体パターンK13と導体パターンK14とが並列接続され、さらに、導体パターンK11,K12と導体パターンK13,K14とが直列接続されることによって、コイルを構成している。
Thus, the inductor L11 has the conductor patterns K11 and K12 connected in parallel, the conductor patterns K13 and K14 connected in parallel, and the conductor patterns K11, K12 and the conductor patterns K13, K14 connected in series. A coil is formed by being connected.
絶縁基板N15には、インダクタL12の一部を構成する導体パターンK15が形成されている。導体パターンK15は、絶縁基板N15の図中左上側から左回りに約1周するように形成されている。導体パターンK15の始端は、第1外部電極31の第2電極31bと電気的に接続されている。導体パターンK15の終端の近傍には、ビア導体V14に接続する接続部P19が設けられている。
A conductor pattern K15 forming part of the inductor L12 is formed on the insulating substrate N15. The conductor pattern K15 is formed so as to make about one turn counterclockwise from the upper left side of the insulating substrate N15 in the figure. The starting end of the conductor pattern K15 is electrically connected to the second electrode 31b of the first external electrode 31. As shown in FIG. A connection portion P19 connected to the via conductor V14 is provided in the vicinity of the terminal end of the conductor pattern K15.
絶縁基板N16には、インダクタL12の一部を構成する導体パターンK16が形成されている。導体パターンK16は、絶縁基板N16の図中左上側から左回りに約1周するように形成されている。導体パターンK16の始端は、第1外部電極31の第2電極31bと電気的に接続されている。導体パターンK16の終端の近傍には、ビア導体V14,V15に接続する接続部P20が設けられている。
A conductor pattern K16 forming part of the inductor L12 is formed on the insulating substrate N16. The conductor pattern K16 is formed so as to make about one turn counterclockwise from the upper left side of the insulating substrate N16 in the figure. The starting end of the conductor pattern K16 is electrically connected to the second electrode 31b of the first external electrode 31. As shown in FIG. A connection portion P20 connected to the via conductors V14 and V15 is provided near the end of the conductor pattern K16.
絶縁基板N17には、インダクタL12の一部を構成する導体パターンK17が形成されている。導体パターンK17は、絶縁基板N17の図中上側から左回りに約1周するように形成されている。導体パターンK17の始端の近傍には、ビア導体V15,V16Aに接続する接続部P21が設けられている。導体パターンK17の終端の近傍には、ビア導体V16Bに接続する接続部P22が設けられている。
A conductor pattern K17 forming part of the inductor L12 is formed on the insulating substrate N17. The conductor pattern K17 is formed so as to make about one turn counterclockwise from the upper side of the insulating substrate N17 in the figure. A connection portion P21 connected to the via conductors V15 and V16A is provided in the vicinity of the starting end of the conductor pattern K17. A connection portion P22 connected to the via conductor V16B is provided in the vicinity of the terminal end of the conductor pattern K17.
絶縁基板N18には、インダクタL12の一部を構成する導体パターンK18が形成されている。導体パターンK18は、絶縁基板N18の図中上側から左回りに約1周するように形成されている。導体パターンK18の始端の近傍には、ビア導体V16Aに接続する接続部P23が設けられている。導体パターンK18の終端の近傍には、ビア導体V16B,V17に接続する接続部P24が設けられている。
A conductor pattern K18 forming part of the inductor L12 is formed on the insulating substrate N18. The conductor pattern K18 is formed so as to make about one turn counterclockwise from the upper side of the insulating substrate N18 in the figure. A connection portion P23 connected to the via conductor V16A is provided in the vicinity of the starting end of the conductor pattern K18. A connection portion P24 connected to the via conductors V16B and V17 is provided near the end of the conductor pattern K18.
このように、インダクタL12は、導体パターンK15と導体パターンK16とが並列接続され、導体パターンK17と導体パターンK18とが並列接続され、さらに、導体パターンK15,K16と導体パターンK17,K18とが直列接続されることによって、コイルを構成している。
Thus, the inductor L12 has the conductor patterns K15 and K16 connected in parallel, the conductor patterns K17 and K18 connected in parallel, and the conductor patterns K15, K16 and the conductor patterns K17, K18 connected in series. A coil is formed by being connected.
絶縁基板N19には、キャパシタC11の一方の電極を構成する電極パターンK19が形成されている。第2主面12側から電極パターンK19を平面視した場合、電極パターンK19は、積層方向(Z方向)において導体パターンK17,K18の一部と重なる位置に設けられている。つまり、電極パターンK19は、導体パターンK17,K18によって構成されるインダクタL12の開口部と重なる領域を少なくする位置に設けられている。電極パターンK19には、ビア導体V17に接続する接続部P25が設けられている。すなわち、電極パターンK19は、ビア導体V17によって、インダクタL12の導体パターンK18の接続部P24に接続されている。
An electrode pattern K19 forming one electrode of the capacitor C11 is formed on the insulating substrate N19. When the electrode pattern K19 is viewed from the second main surface 12 side, the electrode pattern K19 is provided at a position overlapping part of the conductor patterns K17 and K18 in the stacking direction (Z direction). That is, the electrode pattern K19 is provided at a position that reduces the area overlapping the opening of the inductor L12 formed by the conductor patterns K17 and K18. The electrode pattern K19 is provided with a connection portion P25 that connects to the via conductor V17. That is, the electrode pattern K19 is connected to the connection portion P24 of the conductor pattern K18 of the inductor L12 by the via conductor V17.
絶縁基板N20には、キャパシタC11の他方の電極を構成する電極パターンK20が形成されている。第2主面12側から電極パターンK20を平面視した場合、電極パターンK20は、積層方向(Z方向)において導体パターンK17,K18の一部と重なる位置に設けられている。つまり、電極パターンK20は、導体パターンK17,K18によって構成されるインダクタL11の開口部と重なる領域を少なくする位置に設けられている。電極パターンK20は、第2外部電極32の第5電極32bおよび第6電極32cと電気的に接続されている。
An electrode pattern K20 forming the other electrode of the capacitor C11 is formed on the insulating substrate N20. When the electrode pattern K20 is viewed in plan from the second main surface 12 side, the electrode pattern K20 is provided at a position overlapping part of the conductor patterns K17 and K18 in the stacking direction (Z direction). That is, the electrode pattern K20 is provided at a position that reduces the area overlapping the opening of the inductor L11 formed by the conductor patterns K17 and K18. The electrode pattern K20 is electrically connected to the fifth electrode 32b and the sixth electrode 32c of the second external electrode 32. As shown in FIG.
また、図8に示すように、第1電極31aは、Z方向において第2主面12側から第1主面11を平面視したときに、導体パターンK11~K18のコイル開口と重なる部分を有する。また、第1外部電極31は、Z方向において第2主面12側から第1主面11を平面視したときに、第2主面12において導体パターンK11~K18のコイル開口と重ならない。さらに、第1外部電極31は、Z方向において第2主面12側から第2主面12を平面視したときに、第2主面12において導体パターンK15~K18と重ならない。
Further, as shown in FIG. 8, the first electrode 31a has a portion overlapping the coil openings of the conductor patterns K11 to K18 when the first main surface 11 is viewed from the second main surface 12 side in the Z direction. . In addition, the first external electrode 31 does not overlap the coil openings of the conductor patterns K11 to K18 on the second main surface 12 when the first main surface 11 is viewed from the second main surface 12 side in the Z direction. Furthermore, the first external electrode 31 does not overlap the conductor patterns K15 to K18 on the second main surface 12 when the second main surface 12 is viewed from the second main surface 12 side in the Z direction.
また、図3に示すように、第2電極32aは、Z方向において第2主面12側から第1主面11を平面視したときに、導体パターンK11~K18のコイル開口と重なる部分を有する。また、第2外部電極32は、Z方向において第2主面12側から第1主面11を平面視したときに、第2主面12において導体パターンK11~K18のコイル開口と重ならない。さらに、第2外部電極32は、Z方向において第2主面12側から第2主面12を平面視したときに、第2主面12において導体パターンK11~K18と重ならない。
Further, as shown in FIG. 3, the second electrode 32a has a portion overlapping the coil openings of the conductor patterns K11 to K18 when the first main surface 11 is viewed from the second main surface 12 side in the Z direction. . Further, the second external electrode 32 does not overlap the coil openings of the conductor patterns K11 to K18 on the second main surface 12 when the first main surface 11 is viewed from the second main surface 12 side in the Z direction. Furthermore, the second external electrode 32 does not overlap the conductor patterns K11 to K18 on the second main surface 12 when the second main surface 12 is viewed from the second main surface 12 side in the Z direction.
このように、実施の形態3に係る電子部品300のような共振回路を構成するチップ部品型の小型のフィルタ装置においても、天面電極を有さない構成を適用してもよい。
In this way, a configuration without a top surface electrode may also be applied to a small chip component type filter device that forms a resonant circuit, such as the electronic component 300 according to the third embodiment.
図9は、実施の形態3に係る電子部品300の等価回路図および比較例に係る電子部品の等価回路図である。図9(A)には、天面である第2主面12に沿って電極(天面電極)を有していない実施の形態3に係る電子部品300の等価回路図が示されている。図9(B)には、比較例に係る電子部品として、実施の形態3に係る電子部品300において天面である第2主面12に沿って第1主面12に形成されている電極と同等の電極(天面電極)を有するコイル部品の等価回路図が示されている。なお、比較例に係る電子部品は、天面電極を有する点以外、実施の形態3に係る電子部品300と同じ構成を備えるものとする。
FIG. 9 is an equivalent circuit diagram of an electronic component 300 according to Embodiment 3 and an equivalent circuit diagram of an electronic component according to a comparative example. FIG. 9A shows an equivalent circuit diagram of an electronic component 300 according to Embodiment 3 that does not have electrodes (top surface electrodes) along the second main surface 12, which is the top surface. FIG. 9B shows, as an electronic component according to a comparative example, electrodes formed on the first main surface 12 along the second main surface 12, which is the top surface, in the electronic component 300 according to the third embodiment. An equivalent circuit diagram of a coil component with equivalent electrodes (top electrodes) is shown. Note that the electronic component according to the comparative example has the same configuration as the electronic component 300 according to the third embodiment, except that it has a top surface electrode.
図9(A)に示すように、実施の形態3に係る電子部品300は、第1端子T1と、第1端子T1に接続されるインダクタL12と、インダクタL12と直列接続されるキャパシタC11と、キャパシタC11と接続される第2端子T2とを含む。さらに、電子部品300は、インダクタL12およびキャパシタC11に対して並列接続されるインダクタL11を含む。なお、第1端子T1は、第1外部電極31の実装基板における接続点に対応し、第2端子T2は、第2外部電極32の実装基板における接続点に対応する。
As shown in FIG. 9A, the electronic component 300 according to the third embodiment includes a first terminal T1, an inductor L12 connected to the first terminal T1, a capacitor C11 connected in series with the inductor L12, and a second terminal T2 connected to the capacitor C11. Further, electronic component 300 includes an inductor L11 connected in parallel with inductor L12 and capacitor C11. The first terminal T1 corresponds to the connection point of the first external electrode 31 on the mounting substrate, and the second terminal T2 corresponds to the connection point of the second external electrode 32 on the mounting substrate.
インダクタL11とインダクタL12とは、磁界結合(結合係数k)をしているため、インダクタL11とインダクタL12との間に相互インダクタンスMが発生する。図9においては、発生する相互インダクタンスMを考慮して、インダクタL11およびインダクタL12の各々に相互インダクタンス+Mを、第1端子T1に相互インダクタンス-Mを追加した等価回路図が示されている。なお、電子部品300は、インダクタL11とインダクタL12とが磁界結合していなくてもよい。
Since the inductors L11 and L12 are magnetically coupled (coupling coefficient k), a mutual inductance M is generated between the inductors L11 and L12. FIG. 9 shows an equivalent circuit diagram in which mutual inductance +M is added to each of inductor L11 and inductor L12, and mutual inductance -M is added to first terminal T1 in consideration of mutual inductance M generated. In electronic component 300, inductor L11 and inductor L12 may not be magnetically coupled.
図9(B)に示すように、天面電極を有する比較例に係る電子部品の場合、最も天面電極近くに配置されているインダクタL11を構成する絶縁体内の導体パターンと、外部電極である天面電極との間で寄生容量C0が発生し得る。この寄生容量C0とインダクタL11とで並列共振回路が形成されることから、この並列共振周波数が含まれる周波数帯域で電子部品を使用する場合、電気特性が設計値と異なる問題が生じるおそれがある。以下、図10~図15を参照しながら、一例を用いて寄生容量による影響を説明する。
As shown in FIG. 9B, in the case of the electronic component according to the comparative example having the top electrode, the conductor pattern in the insulator constituting the inductor L11 arranged closest to the top electrode and the external electrode A parasitic capacitance C0 may occur with the top electrode. Since a parallel resonance circuit is formed by the parasitic capacitance C0 and the inductor L11, when an electronic component is used in a frequency band that includes this parallel resonance frequency, there is a possibility that the electrical characteristics may differ from the designed values. The influence of the parasitic capacitance will be described below using an example with reference to FIGS. 10 to 15. FIG.
図10は、実施の形態3に係る電子部品300と0.5pFの寄生容量が発生した比較例に係る電子部品とにおける通過特性の比較を示す図である。図11は、実施の形態3に係る電子部品300と0.5pFの寄生容量が発生した比較例に係る電子部品とにおける抵抗成分の比較を示す図である。図12は、実施の形態3に係る電子部品300と0.5pFの寄生容量が発生した比較例に係る電子部品とにおけるリアクタンス成分の比較を示す図である。図13は、実施の形態3に係る電子部品300と1pFの寄生容量が発生した比較例に係る電子部品とにおける通過特性の比較を示す図である。図14は、実施の形態3に係る電子部品300と1pFの寄生容量が発生した比較例に係る電子部品とにおける抵抗成分の比較を示す図である。図15は、実施の形態3に係る電子部品300と1pFの寄生容量が発生した比較例に係る電子部品とにおけるリアクタンス成分の比較を示す図である。
FIG. 10 is a diagram showing a comparison of pass characteristics between the electronic component 300 according to Embodiment 3 and an electronic component according to a comparative example in which a parasitic capacitance of 0.5 pF is generated. FIG. 11 is a diagram showing a comparison of resistance components between the electronic component 300 according to Embodiment 3 and an electronic component according to a comparative example in which a parasitic capacitance of 0.5 pF is generated. FIG. 12 is a diagram showing a comparison of reactance components between the electronic component 300 according to Embodiment 3 and an electronic component according to a comparative example in which a parasitic capacitance of 0.5 pF is generated. FIG. 13 is a diagram showing a comparison of pass characteristics between the electronic component 300 according to Embodiment 3 and an electronic component according to a comparative example in which a parasitic capacitance of 1 pF is generated. FIG. 14 is a diagram showing a comparison of resistance components between the electronic component 300 according to Embodiment 3 and an electronic component according to a comparative example in which a parasitic capacitance of 1 pF is generated. FIG. 15 is a diagram showing a comparison of reactance components between the electronic component 300 according to the third embodiment and an electronic component according to a comparative example in which a parasitic capacitance of 1 pF is generated.
図10~図15において、横軸には周波数が示されている。また、図10および図13の縦軸には挿入損失が示され、図11および図14の縦軸には抵抗成分が示され、図12および図15の縦軸にはリアクタンス成分が示されている。
In FIGS. 10 to 15, the horizontal axis indicates frequency. The vertical axes of FIGS. 10 and 13 indicate the insertion loss, the vertical axes of FIGS. 11 and 14 indicate the resistance component, and the vertical axes of FIGS. 12 and 15 indicate the reactance component. there is
なお、図10~図12においては、天面電極によって0.5pFの寄生容量が発生した場合のフィルタ特性を実線で示し、寄生容量が発生しない場合の電子部品300におけるフィルタ特性を破線で示している。図13~図14においては、天面電極によって1pFの寄生容量が発生した場合のフィルタ特性を実線で示し、寄生容量が発生しない場合の電子部品300におけるフィルタ特性を破線で示している。図中において、f1は、たとえば4.4GHzを示し、寄生容量がない場合には、インダクタL11とコンデンサC11とインダクタL12との並列共振によって共振ピークが発生する。すなわち、フィルタとして共振ピークが発生するように設計された周波数である。f2は、たとえば5.5GHzを示し、寄生容量がない場合には、インダクタL12とコンデンサC11との直列共振によって通過帯域として使用される周波数である。
10 to 12, the solid line indicates the filter characteristics when a parasitic capacitance of 0.5 pF is generated by the top electrode, and the broken line indicates the filter characteristics of the electronic component 300 when no parasitic capacitance is generated. there is In FIGS. 13 and 14, the solid line indicates the filter characteristics when a parasitic capacitance of 1 pF is generated by the top electrode, and the broken line indicates the filter characteristics of the electronic component 300 when no parasitic capacitance is generated. In the figure, f1 indicates, for example, 4.4 GHz, and if there is no parasitic capacitance, a resonance peak occurs due to parallel resonance of inductor L11, capacitor C11, and inductor L12. That is, it is a frequency designed to generate a resonance peak as a filter. f2 denotes, for example, 5.5 GHz and is the frequency used as a passband by the series resonance of inductor L12 and capacitor C11 in the absence of parasitic capacitance.
まず、実施の形態3に係る電子部品300に関して寄生容量が発生しない場合のフィルタ特性について説明する。図10~図15に示すように、天面電極を有していない電子部品300の場合、通過帯域(たとえば、図中の周波数f2付近の帯域)においては低損失で信号を通過させ、通過帯域以外の減衰帯域(たとえば、図中の周波数f1付近の帯域)においては効率的に信号を減衰させることができている。
First, the filter characteristics when no parasitic capacitance occurs in the electronic component 300 according to the third embodiment will be described. As shown in FIGS. 10 to 15, in the case of the electronic component 300 that does not have a top surface electrode, the signal is passed with low loss in the passband (for example, the band around frequency f2 in the figure), and the passband Signals can be efficiently attenuated in other attenuation bands (for example, a band near frequency f1 in the figure).
次に、図10~図12を参照しながら、比較例に係る電子部品に関して天面電極によって0.5pFの寄生容量が発生した場合のフィルタ特性について説明する。図10に示すように、実線のグラフと破線のグラフとを比較すると、本来、信号を減衰させなければならない減衰帯域のピークが、周波数f1から周波数f1aへと変化している。また、図11および図12に示すように、比較例に係る電子部品は、実施の形態3に係る電子部品300よりも、通過帯域(図中の周波数f2付近の帯域)において抵抗成分およびリアクタンス成分が高くなっており、図10に示すように、通過帯域(図中の周波数f2付近の帯域)において信号の損失が発生している。後述する図13~図15に示すように、寄生容量の値が大きいほど、このような信号の損失量は大きくなる。
Next, filter characteristics when a parasitic capacitance of 0.5 pF is generated by the top electrode of the electronic component according to the comparative example will be described with reference to FIGS. 10 to 12. FIG. As shown in FIG. 10, when comparing the solid line graph and the broken line graph, the peak of the attenuation band in which the signal should originally be attenuated changes from frequency f1 to frequency f1a. Further, as shown in FIGS. 11 and 12, the electronic component according to the comparative example has a higher resistance component and reactance component in the passband (band around frequency f2 in the figure) than the electronic component 300 according to the third embodiment. is high, and as shown in FIG. 10, signal loss occurs in the passband (the band around frequency f2 in the figure). As shown in FIGS. 13-15, which will be described later, the greater the value of the parasitic capacitance, the greater the loss of such signals.
図13~図15を参照しながら、比較例に係る電子部品に関して天面電極によって1.0pFの寄生容量が発生した場合のフィルタ特性について説明する。図13に示すように、1pFの寄生容量が発生した比較例に係る電子部品の場合、寄生容量と、インダクタL11を構成する絶縁体内の導体パターンとによって生じる並列共振が通過帯域(たとえば、図中の周波数f3付近の帯域)において発生する。
With reference to FIGS. 13 to 15, filter characteristics when a parasitic capacitance of 1.0 pF is generated by the top surface electrode of the electronic component according to the comparative example will be described. As shown in FIG. 13, in the case of the electronic component according to the comparative example in which a parasitic capacitance of 1 pF is generated, the parallel resonance caused by the parasitic capacitance and the conductor pattern inside the insulator forming the inductor L11 occurs in the passband (for example, (band near frequency f3).
図13に示すように、実線のグラフと破線のグラフとを比較すると、寄生容量によって生じた不要な並列共振によって、本来、信号を減衰するための共振ピークが、周波数f1から周波数f1bへと大きく変化している。また、図14および図15に示すように、寄生容量によって生じた不要な並列共振によって、比較例に係る電子部品は、実施の形態3に係る電子部品300よりも、通過帯域(図中の周波数f2付近の帯域)において抵抗成分およびリアクタンス成分が高くなっており、図13に示すように、通過帯域(図中の周波数f2付近の帯域)において信号の損失が発生している。寄生容量の値が大きいほど、並列共振が生じる周波数が通過帯域(図中の周波数f2付近の帯域)に近づくため、このような信号の損失量はさらに大きくなる。
As shown in FIG. 13, comparing the solid line graph and the dashed line graph, it can be seen that the resonance peak for attenuating the signal increases from frequency f1 to frequency f1b due to unnecessary parallel resonance caused by the parasitic capacitance. is changing. In addition, as shown in FIGS. 14 and 15, the electronic component according to the comparative example has a pass band (frequency The resistance component and reactance component are high in the band near f2), and as shown in FIG. 13, signal loss occurs in the passband (band near frequency f2 in the figure). As the value of the parasitic capacitance increases, the frequency at which parallel resonance occurs approaches the passband (the band around frequency f2 in the figure), so the amount of signal loss increases.
このように、実施の形態3に係る電子部品300は、天面電極を有さないことによって、天面電極との間において寄生容量が発生することを防止することができる。これにより、電子部品300は、天面電極によってインダクタのQ値が低下することがなく、フィルタ特性を良好にすることができる。たとえば、図10~図15を参照しながら説明したように、寄生容量とインダクタL11とによって、余計な並列共振が生じることがないため、通過帯域が狭まることなく、信号の損失が発生することを防止することができる。また、インダクタL11の導体パターンと天面電極との間で寄生容量が発生することを考慮することなく、キャパシタC11を実装基板(第1主面11)に配置させるとともにキャパシタC11の上側にインダクタL11,L12を配置させることで、フィルタ特性への寄生容量の影響を極力減らすことができる。このように、天面側にインダクタを配置できることで、導体パターンの設計の自由度を向上させることができる。このように、実施の形態3に係る電子部品300は、天面電極を有さないことによって、天面電極との間において寄生容量が発生することを防止することができ、フィルタ装置としての特性を良好にすることができる。
In this way, the electronic component 300 according to Embodiment 3 does not have a top surface electrode, so that it is possible to prevent parasitic capacitance from occurring between the top surface electrode and the electronic component 300 . As a result, the electronic component 300 can improve the filter characteristics without lowering the Q value of the inductor due to the top electrode. For example, as described with reference to FIGS. 10 to 15, unnecessary parallel resonance is not caused by the parasitic capacitance and the inductor L11, so that the passband is not narrowed and signal loss is prevented. can be prevented. In addition, the capacitor C11 is arranged on the mounting substrate (first main surface 11) and the inductor L11 is placed above the capacitor C11 without considering the parasitic capacitance generated between the conductor pattern of the inductor L11 and the top surface electrode. , L12, the influence of the parasitic capacitance on the filter characteristics can be reduced as much as possible. By arranging the inductor on the top surface side in this way, the degree of freedom in designing the conductor pattern can be improved. As described above, electronic component 300 according to the third embodiment does not have a top surface electrode, so that it is possible to prevent parasitic capacitance from being generated between the top surface electrode and the characteristic as a filter device. can be improved.
今回開示された実施の形態はすべての点で例示であって制限的なものではないと考えられるべきである。本発明の範囲は、上記した説明ではなく、請求の範囲によって示され、請求の範囲と均等の意味および範囲内でのすべての変更が含まれることが意図される。
The embodiments disclosed this time should be considered illustrative in all respects and not restrictive. The scope of the present invention is indicated by the scope of the claims rather than the above description, and is intended to include all modifications within the scope and meaning equivalent to the scope of the claims.
10 絶縁体、11 第1主面、12 第2主面、21 第1側面、22 第2側面、23 第3側面、24 第4側面、31 第1外部電極、32 第2外部電極、31a 第1電極、31b 第2電極、31c 第3電極、32a 第4電極、32b 第5電極、32c 第6電極、100,200,300 電子部品、310b,310c,320b,320c 端部。
10 insulator, 11 first principal surface, 12 second principal surface, 21 first side surface, 22 second side surface, 23 third side surface, 24 fourth side surface, 31 first external electrode, 32 second external electrode, 31a third 1 electrode, 31b second electrode, 31c third electrode, 32a fourth electrode, 32b fifth electrode, 32c sixth electrode, 100, 200, 300 electronic components, 310b, 310c, 320b, 320c ends.
Claims (13)
- 絶縁体と、
前記絶縁体内に構成され、第1導体パターンを有するインダクタと、
前記第1導体パターンと電気的に接続する第1外部電極とを備え、
前記絶縁体は、第1主面と、前記第1主面と対向する第2主面と、前記第1主面と前記第2主面とを結ぶ第1側面、第2側面、第3側面、および第4側面とを有し、
前記第1側面は、前記第2側面と対向し、
前記第3側面は、前記第4側面と対向し、
前記第1導体パターンは、コイル開口を有し、
前記第1外部電極は、
前記第1主面に沿って設けられた第1電極と、
前記第1側面に沿って設けられ、前記第1電極と電気的に接続された第2電極と、
前記第2側面に沿って設けられ、前記第1電極と電気的に接続された第3電極とを有し、
前記第1電極は、前記第1主面を平面視したときに、前記コイル開口と重なる部分を有し、
前記第1外部電極は、前記第1主面を平面視したときに、前記第2主面において前記コイル開口と重ならない、電子部品。 an insulator;
an inductor configured in the insulator and having a first conductor pattern;
A first external electrode electrically connected to the first conductor pattern,
The insulator has a first main surface, a second main surface facing the first main surface, and a first side surface, a second side surface, and a third side surface connecting the first main surface and the second main surface. , and a fourth side,
The first side faces the second side,
The third side faces the fourth side,
The first conductor pattern has a coil opening,
The first external electrode is
a first electrode provided along the first main surface;
a second electrode provided along the first side surface and electrically connected to the first electrode;
a third electrode provided along the second side surface and electrically connected to the first electrode;
The first electrode has a portion that overlaps the coil opening when the first main surface is viewed in plan,
The electronic component, wherein the first external electrode does not overlap the coil opening on the second main surface when the first main surface is viewed in plan. - 前記第1外部電極は、前記第1主面を平面視したときに、前記第2主面において前記第1導体パターンと重ならない、請求項1に記載の電子部品。 The electronic component according to claim 1, wherein the first external electrode does not overlap the first conductor pattern on the second main surface when the first main surface is viewed in plan.
- 前記インダクタは、前記第1導体パターンを含む複数の導体パターンによって構成され、
前記第1外部電極は、前記第1主面を平面視したときに、前記第2主面において前記複数の導体パターンと重ならない、請求項2に記載の電子部品。 The inductor is composed of a plurality of conductor patterns including the first conductor pattern,
3. The electronic component according to claim 2, wherein said first external electrode does not overlap said plurality of conductor patterns on said second main surface when said first main surface is viewed in plan. - 前記第1外部電極は、前記第3側面および前記第4側面に沿った電極を有していない、請求項1に記載の電子部品。 The electronic component according to claim 1, wherein the first external electrode does not have electrodes along the third side surface and the fourth side surface.
- 前記第1主面を下側にして前記第3側面側から前記第1外部電極を見た場合、前記第1外部電極は、凹型または略凹型の形状を有する、請求項4に記載の電子部品。 5. The electronic component according to claim 4, wherein said first external electrode has a concave or substantially concave shape when viewed from said third side surface with said first main surface facing downward. .
- 第2外部電極をさらに備え、
前記第2外部電極は、前記第1主面に沿って設けられた第4電極を有し、
前記第2外部電極は、前記第1側面に沿って設けられ、前記第4電極と電気的に接続された第5電極、および、前記第2側面に沿って設けられ、前記第4電極と電気的に接続された第6電極のうちの少なくとも1つをさらに有する、請求項1に記載の電子部品。 further comprising a second external electrode;
The second external electrode has a fourth electrode provided along the first main surface,
The second external electrode includes a fifth electrode provided along the first side surface and electrically connected to the fourth electrode, and a fifth electrode provided along the second side surface electrically connected to the fourth electrode. 2. The electronic component of claim 1, further comprising at least one of the positively connected sixth electrodes. - 前記第2外部電極は、前記第5電極および前記第6電極の両方を有する、請求項6に記載の電子部品。 The electronic component according to claim 6, wherein the second external electrode has both the fifth electrode and the sixth electrode.
- 前記第2外部電極は、前記第3側面および前記第4側面に設けられていない、請求項6または請求項7に記載の電子部品。 The electronic component according to claim 6 or 7, wherein the second external electrode is not provided on the third side surface and the fourth side surface.
- 前記第1主面を下側にして前記第4側面側から前記第2外部電極を見た場合、前記第2外部電極は、凹型または略凹型の形状を有する、請求項8に記載の電子部品。 9. The electronic component according to claim 8, wherein said second external electrode has a concave or substantially concave shape when said second external electrode is viewed from said fourth side surface with said first main surface facing downward. .
- 前記第1主面は、実装基板に載置される面である、請求項1~請求項9のいずれか1項に記載の電子部品。 The electronic component according to any one of claims 1 to 9, wherein the first main surface is a surface to be placed on a mounting board.
- 前記絶縁体内において前記インダクタと直列に接続されたキャパシタをさらに備え、
前記キャパシタは、前記インダクタよりも前記第1主面側に配置される、請求項1~請求項10のいずれか1項に記載の電子部品。 further comprising a capacitor connected in series with the inductor within the insulator;
The electronic component according to any one of claims 1 to 10, wherein said capacitor is arranged closer to said first main surface than said inductor. - 前記絶縁体内において前記インダクタと前記キャパシタとに並列に接続された他のインダクタをさらに備え、
前記キャパシタは、前記他のインダクタよりも前記第1主面側に配置される、請求項11に記載の電子部品。 further comprising another inductor connected in parallel with the inductor and the capacitor within the insulator;
12. The electronic component according to claim 11, wherein said capacitor is arranged closer to said first main surface than said other inductor. - 前記他のインダクタは、前記インダクタよりも前記第2主面側に配置される、請求項12に記載の電子部品。 13. The electronic component according to claim 12, wherein said another inductor is arranged closer to said second main surface than said inductor.
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