WO2023141813A1 - Scheduled startup control method and electronic device - Google Patents

Scheduled startup control method and electronic device Download PDF

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Publication number
WO2023141813A1
WO2023141813A1 PCT/CN2022/074013 CN2022074013W WO2023141813A1 WO 2023141813 A1 WO2023141813 A1 WO 2023141813A1 CN 2022074013 W CN2022074013 W CN 2022074013W WO 2023141813 A1 WO2023141813 A1 WO 2023141813A1
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Prior art keywords
chip
clock
clock chip
power
electronic device
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PCT/CN2022/074013
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French (fr)
Chinese (zh)
Inventor
曹东波
衣祝松
张阳阳
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京东方科技集团股份有限公司
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Priority to PCT/CN2022/074013 priority Critical patent/WO2023141813A1/en
Priority to CN202280000076.7A priority patent/CN117561487A/en
Publication of WO2023141813A1 publication Critical patent/WO2023141813A1/en

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    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/04Generating or distributing clock signals or signals derived directly therefrom
    • G06F1/14Time supervision arrangements, e.g. real time clock

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  • the present disclosure relates to the field of electronic technology, and in particular, to a timing power-on control method and electronic equipment.
  • a clock chip (Real_Time Clock, real-time clock, abbreviated as RTC) is usually required in the electronic equipment, and the external power supply of the electronic equipment may be cut off.
  • RTC real-time clock
  • the clock chip can usually be powered by a button battery arranged on the circuit board of the electronic device, so as to ensure that the clock chip can continue to work and save time information.
  • the embodiments of the present disclosure provide a timing power-on control method, which is applied to electronic equipment, and the electronic equipment includes a system chip, a chip battery module, a first clock chip and a second clock chip, and the method includes the following step:
  • the chip battery module supplies power to the first clock chip, wherein the second clock chip is in a power-off state;
  • the first clock chip controls the chip battery module to supply power to the second clock chip;
  • the second clock chip sends a power-on control signal to the system chip according to the power-on time condition.
  • the method before the first clock chip controls the chip battery module to supply power to the second clock chip, the method further includes:
  • the second clock chip synchronizes the power-on time condition with the first clock chip
  • the first clock chip controls to disconnect the power supply of the chip battery module to the second clock chip.
  • the standby power of the first clock chip is less than the standby power of the second clock chip.
  • the second clock chip is an RK808 chip.
  • the method also includes:
  • the second clock chip sends a power-on control signal to the system chip according to the power-on time condition.
  • the method also includes:
  • the system chip reads the first clock signal of the first clock chip
  • the system chip synchronizes the first clock signal to the second clock chip.
  • the method also includes:
  • the system chip acquires a second clock signal from a time server
  • the system chip synchronizes the first clock chip according to the second clock signal.
  • embodiments of the present disclosure provide an electronic device, including a system chip, a chip battery module, a first clock chip, and a second clock chip, and the first clock chip and the second clock chip are compatible with the The system chip communication connection;
  • the chip battery module is configured to supply power to the first clock chip when the external power supply of the electronic device is disconnected, wherein the second clock chip is in a power-off state;
  • the first clock chip is configured to control the chip battery module to supply power to the second clock chip when the power-on time condition is met;
  • the second clock chip is configured to send a power-on control signal to the system chip according to the power-on time condition.
  • the chip battery module is configured to, when it is detected that the external power supply of the electronic device is disconnected, within a first preset time period, the first clock chip and the second Clock chip power supply;
  • the second clock chip is configured to, within the first preset duration, synchronize the power-on time condition with the first clock chip
  • the first clock chip is configured to control to disconnect the power supply of the chip battery module to the second clock chip after the disconnection time of the external power source reaches the first preset duration.
  • the power supply configuration of the second clock chip is:
  • the SoC is configured as:
  • the SoC is configured as:
  • the standby power of the first clock chip is less than the standby power of the second clock chip.
  • the second clock chip is an RK808 chip.
  • FIG. 1 is a schematic structural diagram of an electronic device according to an embodiment of the present disclosure
  • FIG. 2 is a flow chart of a timing start control method in an embodiment of the present disclosure
  • FIG. 3 is a flowchart of clock synchronization in an embodiment of the present disclosure
  • FIG. 4 is another flow chart of the timing power-on control method in an embodiment of the present disclosure.
  • An embodiment of the present disclosure provides a timing power-on control method, which is applied to electronic equipment.
  • the electronic device includes a system chip 101 , a chip battery module 102 , a first clock chip ( RTC1 ) 103 and a second clock chip ( RTC2 ) 104 .
  • the system chip 101 may be a chip that implements system functions such as a SOC (System on Chip, system-on-chip), a processor of an electronic device, etc.
  • the system chip 101 is used as an SOC for exemplary illustration.
  • the clock chip specifically includes a first clock chip 103 and a second clock chip 104 , and both the first clock chip 103 and the second clock chip 104 are communicatively connected to the system chip 101 .
  • the first clock chip 103 and the second clock chip 104 can communicate with the system chip 101 through a communication bus.
  • the communication bus can be a communication bus such as I 2 C, as shown in FIG. 1 , in this embodiment, I 2
  • the C communication bus specifically includes SDA (serial data line), SCL (serial clock line) and signal transmission control signal line (INT).
  • the first clock chip 103 and the second clock chip 104 can use a crystal oscillator 105 with high precision (referred to as crystal oscillator) as a clock signal source, and the crystal oscillator 105 communicates with the first clock through the clock input signal line X_IN and the clock output signal line X_OUT.
  • the chip 103 is connected to the second clock chip 104 .
  • Electronic equipment can be powered by an external power supply VCC or the chip battery module 102 .
  • the first clock chip 103 and the second clock chip 104 can be directly powered by the external power supply VCC.
  • the chip battery module 102 can not be set because of the interruption of power failure. and the second clock chip 104 for power supply.
  • the chip battery module 102 is allowed to be installed with a chip battery, so as to realize utilization, and the chip battery module 102 supplies power for the clock chip in a standby state.
  • the chip battery can be a button battery installed on the motherboard of the electronic device, etc.
  • the chip battery needs to meet the long-term working requirements, and its replacement cycle is usually one year or even several years.
  • the timing power-on control method includes the following steps:
  • Step 201 When the external power supply of the electronic device is cut off, the chip battery module supplies power to the first clock chip, wherein the second clock chip is in a power-off state.
  • the chip battery module 102 supplies power to the first clock chip 103, so that the first clock chip 103 is in the standby working state, and the second clock chip 104 is in the off state at this time. power state.
  • Step 202 When the power-on time condition is met, the first clock chip controls the chip battery module to supply power to the second clock chip.
  • Satisfying the power-on time condition refers to reaching the power-on time, so as to realize the timing power-on of the control electronic device.
  • the power-on time is preset. For example, the user can set a power-on time according to the needs, so that the electronic device Automatically boot at the boot time.
  • the second clock chip 104 in the standby state, the second clock chip 104 is in a power-off state, and when the power-on time condition is met, the first clock chip 103 controls the chip battery module 102 to supply power to the second clock chip 104, Thus, the second clock chip 104 enters the working state.
  • Step 203 When the second clock chip is powered by the chip battery module, the second clock chip sends a power-on control signal to the system chip according to the power-on time condition.
  • the second clock chip 104 After the second clock chip 104 is powered on, it can send a power-on control signal to the system chip 101 according to the power-on time condition, so as to realize the power-on of the electronic device.
  • the standby power of the first clock chip 103 is smaller than the standby power of the second clock chip 104 .
  • the first clock chip 103 does not support the function of timing power-on, therefore, must rely on the second clock chip 104 to realize the control of timing power-on, as shown in Figure 1, the second clock chip 104
  • the power-on control signal line PWRON is connected to the system chip 101 to provide a power-on control signal to the system chip 101 .
  • the second clock chip 10 can realize the function of providing a power-on control signal, but the standby power of the second clock chip 104 is also relatively high.
  • the clock chip needs to keep working continuously to provide accurate time information to the electronic equipment.
  • the working power of the clock chip can be understood as the standby power of the clock chip.
  • the second clock chip 104 is an RK808 chip, and the standby power of the RK808 chip is relatively high.
  • the replacement cycle of the chip battery in electronic equipment should be one year or even several years, but when the RK808 chip is used as the clock chip and the conventional button battery is used as the chip battery, the power of the chip battery can only support several months. usage of.
  • the RK808 chip is a highly integrated chip that can support program-controlled timing and clock signals. In some specific scenarios, due to the limitations of software and hardware requirements and the need for specific functions, the RK808 chip must be used as a clock chip, which causes battery The replacement cycle is short and it is inconvenient to use.
  • a first clock chip 103 is further provided.
  • the first clock chip 103 is a clock chip with lower standby power consumption, and the first clock chip 103 is mainly used to realize the function of standby operation. .
  • the PCF8563 chip is specifically selected as the first clock chip 103.
  • the PCF8563 chip is a clock chip with simple structure, relatively single function, and low standby power consumption. Due to its single function, it may be difficult to meet The use requirements of electronic equipment with relatively complex functions.
  • the first clock chip 103 and the second clock chip 104 are set at the same time.
  • the second clock chip 104 can provide relatively rich functions, and in the standby state, the first clock chip 103 executes the standby operation of standby power consumption.
  • the cooperation of the two clock chips not only reduces the standby power consumption, but also provides the required functions to meet more abundant usage requirements.
  • only one crystal oscillator 105 is provided, and the crystal oscillator 105 is connected with the first clock chip 103 in the manner shown in FIG. terminal, and a buffer capacitor is connected in series between the output end of the crystal oscillator 105 and the output end of the second clock chip 104, and the capacitance value of the buffer capacitor can be controlled at 10-30pF (picofarads), so that when the second clock When the chip 104 is in the dormant state, due to the existence of the buffer capacitor, the normal operation of the crystal oscillator 105 will not be affected.
  • the second clock chip 104 needs to be controlled, the crystal oscillation can be realized through a relatively large operating current in a short time.
  • the crystal oscillator 105 is connected to the second clock chip 104, so that the same crystal oscillator 105 is used to provide signals for the connection between the first clock chip 103 and the second clock chip 104.
  • first clock chip 103 and the second clock chip 104 in the technical solution of this embodiment are not limited to the above options, and in some specific scenarios, it may be necessary to use some specific clock chips with higher power consumption.
  • the second clock chip 104 which will shorten the usage time of the chip battery used to power the clock chip in the electronic device.
  • a first clock chip 103 with a single function but low power consumption is provided, and the first clock chip 103 is used for long-time standby to ensure that the time signal can be provided normally.
  • the second clock chip 104 is in a power-off state. In this way, the chip battery only needs to supply power to the first clock chip 103, which can prolong the usable time of the chip battery and prolong the replacement cycle of the chip battery.
  • the second clock chip 104 When it is necessary to realize a specific function, wake up the second clock chip 104 through the first clock chip 103, specifically, control the power on of the second clock chip 104 through the first clock chip 103, so that the second clock chip 104 with richer functions but relatively higher power consumption
  • the second clock chip 104 realizes timing power-on control, and can realize other specific functions after the electronic equipment is powered on.
  • the power-on time of the second clock chip 104 with higher standby power consumption is shorter and consumes relatively less power, which helps to prolong the replacement cycle of the chip battery.
  • the method before the first clock chip controls the chip battery module to supply power to the second clock chip, the method further includes:
  • the second clock chip synchronizes the power-on time condition with the first clock chip
  • the first clock chip controls to disconnect the power supply of the chip battery module to the second clock chip.
  • the standby power and working power of other parts of the electronic equipment are much higher than the standby power of the clock chip. Therefore, even if the external power supply VCC is disconnected, when the electronic equipment relies on the battery to work, it can be powered by the battery.
  • the clock chip supplies power. At this time, the power consumed by the clock chip is still negligible compared with other components of the electronic device such as the system chip 101 .
  • the battery stops supplying power to other components of the electronic device such as the system chip 101 and the power supply.
  • the clock chip It needs to rely on the chip battery module 102 for power supply.
  • the disconnection of the external power supply VCC refers to a state where the plug is pulled out or the external power supply VCC is directly disconnected. At this time, the electronic device cannot obtain external electric energy.
  • the first clock chip 103 and the second clock chip 104 are powered by the chip battery module 102.
  • the first preset duration can be set as required, for example, set to 2 seconds, 5 seconds and other different values, the first preset duration is used for synchronization of power-on time conditions in the first clock chip 103 and the second clock chip 104 .
  • the second clock chip 104 sends the power-on time condition to the first clock chip 103.
  • the power-on time condition can be preset by the user.
  • the user can set the electronic device to operate at 4 Automatically power on after 1 hour or automatically power on at 5 o'clock.
  • the second clock chip 104 supports the function of automatic power-on. Therefore, the power-on time condition set by the user will be saved in the second clock chip 104 and synchronized to the first clock chip 103 by the second clock chip 104 .
  • the chip battery module 102 After reaching the first preset duration, the chip battery module 102 stops supplying power to the second clock chip 104. At this time, the chip battery module 102 only supplies power to the first clock chip 103, thereby saving electric energy and prolonging the use time of the chip battery.
  • the first clock chip 103 saves the continuous working state, and executes the technical solution in the embodiment shown in FIG.
  • the module 102 supplies power to the second clock chip 104, so as to realize the timing power-on function through the second clock chip 104, which will not be repeated here.
  • the chip battery module 102 only needs to supply power to the second clock chip 104 in a short period of time, which reduces the consumption of electric energy and helps to reduce the consumption of electric energy. Extend the usage time of the chip battery.
  • the method also includes:
  • the second clock chip When the second clock chip is powered by the external power supply, the second clock chip sends a power-on control signal to the system chip according to the power-on time condition.
  • the power consumed by the second clock chip 104 during the standby process is relatively more than the power that the chip battery module 102 can provide, but compared with the power consumed by the electronic device itself during standby or working. can be almost ignored.
  • the second clock chip 104 when the external power supply VCC of the electronic device is in a connected state, even if the electronic device is in a shutdown or standby state, the second clock chip 104 can still be directly powered by the electric energy provided by the external power supply VCC, and maintain a continuous working state.
  • a power-on control signal is sent to the system chip 101 to realize the timing power-on function. During this process, the power in the chip battery module 102 will not be consumed.
  • the method further includes:
  • the system chip reads the first clock signal of the first clock chip
  • the system chip synchronizes the first clock signal to the second clock chip.
  • the first clock chip 103 is in a continuous working state, therefore, the electronic device also uses the clock provided by the first clock chip 103 as the system time, or referred to as the reference time.
  • the system chip 101 when the electronic device is turned on, the system chip 101 reads the first clock signal provided by the first clock chip 103, and uses the first clock signal as the system time.
  • a clock signal is synchronized to the second clock chip 104 . It can be understood that the system chip 101 and the second clock chip 104 of the electronic device may not be continuously powered, and the clock signal therein may be lost during the power-off process.
  • the clock synchronization operation can ensure that the first The clock of the clock chip 103 , the clock of the second clock signal and the system time of the electronic device are consistent.
  • the above clock synchronization process can be performed periodically, for example, once every 60 seconds or 30 seconds, or it can be performed regularly, for example, clock synchronization is performed at a specified time every day, for example, at 6 o'clock and 10 o'clock every day , 14 o'clock and 20 o'clock clock synchronization is performed once respectively.
  • the clock synchronization time can be set according to needs, which is not further limited in this embodiment.
  • the method also includes:
  • the system chip acquires a second clock signal from a time server
  • the system chip synchronizes the first clock chip according to the second clock signal.
  • the standard time can be obtained as the second clock signal through the time server, and synchronized based on the second clock signal
  • the clock in the first clock chip 103 makes the clock of the first clock chip 103 synchronous with the standard time, so as to further ensure the accuracy of the time when electronic devices can be controlled more accurately.
  • the steps of clock synchronization can be summarized as, after the electronic device is turned on, firstly perform the drive initialization process of the clock chip, here, the clock chip includes the above-mentioned first clock chip RTC1 and the second clock chip
  • the clock chip includes the above-mentioned first clock chip RTC1 and the second clock chip
  • RTC2 the driver initialization processing of the clock chip itself, reference may also be made to related technologies.
  • the clock of RTC1 is read.
  • the system chip reads the clock of RTC1 and uses it as the system time.
  • the clock of RTC1 is synchronized to RTC2 to calibrate the clock of RTC2.
  • the clock of RTC2 can also be periodically synchronized with the clock of RTC1 to ensure the consistency of the system time, the clock of RTC1 and the clock of RTC2.
  • the clock of RTC1 can be called directly.
  • the clock of RTC1 can be calibrated according to the standard time provided by the time server, thereby improving the accuracy of time.
  • the technical solution of this embodiment can be summarized as, when the external power supply of the electronic device is disconnected, for example, when the plug of the electronic device is unplugged, within the first preset duration, the chip battery module simultaneously The chip RTC1 and the second clock chip RTC2 are powered. At the same time, RTC2 synchronizes the power-on time condition to RTC1 within the first preset duration.
  • the chip battery module After reaching the first preset time period, the chip battery module stops supplying power to RTC2 and keeps supplying power to RTC1.
  • RTC1 continues to work and time based on the power supply of the chip battery module until the time meets the power-on time condition.
  • the battery module of the RTC1 control chip supplies power to the RTC2, and the RTC2 further sends a start-up control signal to the system chip SOC to realize timing start-up of the electronic equipment.
  • An embodiment of the present disclosure provides an electronic device.
  • the electronic device includes a system chip 101, a chip battery module 102, a first clock chip 103 and a second clock chip 104, and the first clock chip 103 and the second clock chip 104 are all compatible with the System chip 101 communication connection;
  • the chip battery module 102 is configured to supply power to the first clock chip 103 when the external power supply of the electronic device is disconnected, wherein the second clock chip 104 is in a power-off state;
  • the first clock chip 103 is configured to control the chip battery module 102 to supply power to the second clock chip 104 when the power-on time condition is met;
  • the second clock chip 104 is configured to send a power-on control signal to the system chip 101 according to the power-on time condition.
  • the chip battery module 102 is configured to supply power to the first clock chip 103 and the second clock chip 104 within a first preset duration when it is detected that the external power supply of the electronic device is disconnected;
  • the second clock chip 104 is configured to, within the first preset duration, synchronize the power-on time condition to the first clock chip 103;
  • the first clock chip 103 is configured to control to disconnect the power supply of the chip battery module 102 to the second clock chip 104 after the disconnection time of the external power source reaches a first preset duration.
  • the power supply configuration of the second clock chip 104 is:
  • the SoC 101 is configured to:
  • the SoC 101 is configured to:
  • the first clock chip 103 is synchronized according to the second clock signal.
  • the standby power of the first clock chip 103 is less than that of the second clock chip 104 .
  • the second clock chip 104 is an RK808 chip.
  • the electronic device can realize each step of the above embodiment of the timing power-on control method, and can achieve similar or identical technical effects, which will not be repeated here.

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Abstract

Provided in the present disclosure are a scheduled startup control method and an electronic device. The scheduled startup control method is applied to the electronic device. The electronic device comprises a system chip, a chip battery module, a first clock chip, and a second clock chip. The method comprises the following steps: when a startup time condition is met and the second clock chip is in a powered-off state, the first clock chip controls the chip battery module to supply power to the second clock chip; and, when the second clock chip is powered by the chip battery module, the second clock chip sends a startup control signal to the system chip according to the startup time condition.

Description

定时开机控制方法和电子设备Timing start-up control method and electronic device 技术领域technical field
本公开涉及电子技术领域,尤其涉及一种定时开机控制方法和电子设备。The present disclosure relates to the field of electronic technology, and in particular, to a timing power-on control method and electronic equipment.
背景技术Background technique
电子设备在工作过程中,可能需要使用当前的时间信息,而为了确定当前时间,电子设备中通常需要设置时钟芯片(Real_Time Clock,实时时钟,缩写为RTC),电子设备的外部电源可能存在切断状态,在外部电源切断的情况下,时钟芯片通常可以通过设置于电子设备的电路板上的纽扣电池供电,以确保时钟芯片能够持续工作并保存时间信息。Electronic equipment may need to use the current time information during the working process. In order to determine the current time, a clock chip (Real_Time Clock, real-time clock, abbreviated as RTC) is usually required in the electronic equipment, and the external power supply of the electronic equipment may be cut off. When the external power supply is cut off, the clock chip can usually be powered by a button battery arranged on the circuit board of the electronic device, so as to ensure that the clock chip can continue to work and save time information.
发明内容Contents of the invention
在其中一些方面,本公开实施例提供了一种定时开机控制方法,应用于电子设备,所述电子设备包括***芯片、芯片电池模块、第一时钟芯片和第二时钟芯片,所述方法包括以下步骤:In some aspects, the embodiments of the present disclosure provide a timing power-on control method, which is applied to electronic equipment, and the electronic equipment includes a system chip, a chip battery module, a first clock chip and a second clock chip, and the method includes the following step:
在所述电子设备的外部电源断开的情况下,所述芯片电池模块向所述第一时钟芯片供电,其中,所述第二时钟芯片处于断电状态;When the external power supply of the electronic device is disconnected, the chip battery module supplies power to the first clock chip, wherein the second clock chip is in a power-off state;
到达满足开机时间条件时,所述第一时钟芯片控制所述芯片电池模块向所述第二时钟芯片供电;When the power-on time condition is met, the first clock chip controls the chip battery module to supply power to the second clock chip;
所述第二时钟芯片根据所述开机时间条件向所述***芯片发送开机控制信号。The second clock chip sends a power-on control signal to the system chip according to the power-on time condition.
在一些实施例中,所述第一时钟芯片控制所述芯片电池模块向所述第二时钟芯片供电之前,所述方法还包括:In some embodiments, before the first clock chip controls the chip battery module to supply power to the second clock chip, the method further includes:
在检测到所述电子设备的外部电源断开的情况下,在第一预设时长内,通过所述芯片电池模块向所述第一时钟芯片和所述第二时钟芯片供电;When it is detected that the external power supply of the electronic device is disconnected, supplying power to the first clock chip and the second clock chip through the chip battery module within a first preset time period;
在所述第一预设时长内,所述第二时钟芯片向所述第一时钟芯片同步所述开机时间条件;Within the first preset duration, the second clock chip synchronizes the power-on time condition with the first clock chip;
在所述外部电源的断开时间达到所述第一预设时长之后,第一时钟芯片 控制断开所述芯片电池模块对所述第二时钟芯片的供电。After the disconnection time of the external power supply reaches the first preset duration, the first clock chip controls to disconnect the power supply of the chip battery module to the second clock chip.
在一些实施例中,所述第一时钟芯片的待机功率小于所述第二时钟芯片的待机功率。In some embodiments, the standby power of the first clock chip is less than the standby power of the second clock chip.
在一些实施例中,所述第二时钟芯片为RK808芯片。In some embodiments, the second clock chip is an RK808 chip.
在一些实施例中,所述方法还包括:In some embodiments, the method also includes:
在所述电子设备的外部电源处于连接状态下,通过所述外部电源为所述第二时钟芯片供电;When the external power supply of the electronic device is connected, supply power to the second clock chip through the external power supply;
所述第二时钟芯片根据所述开机时间条件向所述***芯片发送开机控制信号。The second clock chip sends a power-on control signal to the system chip according to the power-on time condition.
在一些实施例中,所述方法还包括:In some embodiments, the method also includes:
在所述电子设备处于开启状态下,所述***芯片读取所述第一时钟芯片的第一时钟信号;When the electronic device is turned on, the system chip reads the first clock signal of the first clock chip;
所述***芯片将所述第一时钟信号同步至所述第二时钟芯片。The system chip synchronizes the first clock signal to the second clock chip.
在一些实施例中,所述方法还包括:In some embodiments, the method also includes:
在所述电子设备处于联网状态下,所述***芯片获取来自时间服务器的第二时钟信号;When the electronic device is in a networked state, the system chip acquires a second clock signal from a time server;
所述***芯片根据所述第二时钟信号同步所述第一时钟芯片。The system chip synchronizes the first clock chip according to the second clock signal.
在其中一些方面,本公开实施例提供了一种电子设备,包括***芯片、芯片电池模块、第一时钟芯片和第二时钟芯片,所述第一时钟芯片和所述第二时钟芯片均与所述***芯片通信连接;In some aspects, embodiments of the present disclosure provide an electronic device, including a system chip, a chip battery module, a first clock chip, and a second clock chip, and the first clock chip and the second clock chip are compatible with the The system chip communication connection;
所述芯片电池模块配置为,在所述电子设备的外部电源断开的情况下,通过向所述第一时钟芯片供电,其中,所述第二时钟芯片处于断电状态;The chip battery module is configured to supply power to the first clock chip when the external power supply of the electronic device is disconnected, wherein the second clock chip is in a power-off state;
所述第一时钟芯片配置为,到达满足开机时间条件时,控制所述芯片电池模块向所述第二时钟芯片供电;The first clock chip is configured to control the chip battery module to supply power to the second clock chip when the power-on time condition is met;
在所述第二时钟芯片配置为,根据所述开机时间条件向所述***芯片发送开机控制信号。The second clock chip is configured to send a power-on control signal to the system chip according to the power-on time condition.
在一些实施例中,所述芯片电池模块配置为,在检测到所述电子设备的外部电源断开的情况下,在第一预设时长内,向所述第一时钟芯片和所述第二时钟芯片供电;In some embodiments, the chip battery module is configured to, when it is detected that the external power supply of the electronic device is disconnected, within a first preset time period, the first clock chip and the second Clock chip power supply;
所述第二时钟芯片配置为,在所述第一预设时长内,向所述第一时钟芯片同步所述开机时间条件;The second clock chip is configured to, within the first preset duration, synchronize the power-on time condition with the first clock chip;
所述第一时钟芯片配置为,在所述外部电源的断开时间达到所述第一预设时长之后,控制断开所述芯片电池模块对所述第二时钟芯片的供电。The first clock chip is configured to control to disconnect the power supply of the chip battery module to the second clock chip after the disconnection time of the external power source reaches the first preset duration.
在一些实施例中,所述第二时钟芯片供电配置为:In some embodiments, the power supply configuration of the second clock chip is:
在所述电子设备的外部电源处于连接状态下,通过所述外部电源供电;When the external power supply of the electronic device is connected, supplying power through the external power supply;
根据所述开机时间条件向所述***芯片发送开机控制信号。Sending a power-on control signal to the system chip according to the power-on time condition.
在一些实施例中,所述***芯片配置为:In some embodiments, the SoC is configured as:
在所述电子设备处于开启状态下,读取所述第一时钟芯片的第一时钟信号;When the electronic device is in an on state, read the first clock signal of the first clock chip;
将所述第一时钟信号同步至所述第二时钟芯片。synchronizing the first clock signal to the second clock chip.
在一些实施例中,所述***芯片配置为:In some embodiments, the SoC is configured as:
在所述电子设备处于联网状态下,获取来自时间服务器的第二时钟信号;Obtaining a second clock signal from a time server when the electronic device is in a networked state;
根据所述第二时钟信号同步所述第一时钟芯片。synchronizing the first clock chip according to the second clock signal.
在一些实施例中,所述第一时钟芯片的待机功率小于所述第二时钟芯片的待机功率。In some embodiments, the standby power of the first clock chip is less than the standby power of the second clock chip.
在一些实施例中,所述第二时钟芯片为RK808芯片。In some embodiments, the second clock chip is an RK808 chip.
附图说明Description of drawings
为了更清楚地说明本公开实施例的技术方案,下面将对本公开实施例描述中所需要使用的附图作简单地介绍,显而易见地,下面描述中的附图仅仅是本公开的一些实施例,对于本领域普通技术人员来讲,在不付出创造性劳动性的前提下,还可以根据这些附图获取其他的附图。In order to more clearly illustrate the technical solutions of the embodiments of the present disclosure, the following will briefly introduce the accompanying drawings that need to be used in the description of the embodiments of the present disclosure. Obviously, the accompanying drawings in the following description are only some embodiments of the present disclosure. For those skilled in the art, other drawings can also be obtained based on these drawings without any creative effort.
图1是本公开一实施例电子设备的结构示意图;FIG. 1 is a schematic structural diagram of an electronic device according to an embodiment of the present disclosure;
图2是本公开一实施例中定时开机控制方法的流程图;FIG. 2 is a flow chart of a timing start control method in an embodiment of the present disclosure;
图3是本公开一实施例中时钟同步的流程图;FIG. 3 is a flowchart of clock synchronization in an embodiment of the present disclosure;
图4是本公开一实施例中定时开机控制方法的又一流程图。FIG. 4 is another flow chart of the timing power-on control method in an embodiment of the present disclosure.
具体实施方式Detailed ways
下面将结合本公开实施例中的附图,对本公开实施例中的技术方案进行清楚、完整地描述,显然,所描述的实施例是本公开一部分实施例,而不是全部的实施例。不冲突的情况下,下述实施例及实施例中的特征可以相互组合。基于本公开中的实施例,本领域普通技术人员在没有作出创造性劳动前提下所获取的所有其他实施例,都属于本公开保护的范围。The following will clearly and completely describe the technical solutions in the embodiments of the present disclosure with reference to the accompanying drawings in the embodiments of the present disclosure. Apparently, the described embodiments are part of the embodiments of the present disclosure, not all of them. In the case of no conflict, the following embodiments and features in the embodiments can be combined with each other. Based on the embodiments in the present disclosure, all other embodiments obtained by persons of ordinary skill in the art without creative efforts fall within the protection scope of the present disclosure.
本公开实施例提供了一种定时开机控制方法,应用于电子设备。An embodiment of the present disclosure provides a timing power-on control method, which is applied to electronic equipment.
如图1所示,在其中一些实施例中,电子设备包括***芯片101、芯片电池模块102、第一时钟芯片(RTC1)103和第二时钟芯片(RTC2)104。As shown in FIG. 1 , in some embodiments, the electronic device includes a system chip 101 , a chip battery module 102 , a first clock chip ( RTC1 ) 103 and a second clock chip ( RTC2 ) 104 .
本实施例中,***芯片101可以是SOC(System on Chip,***级芯片)、电子设备的处理器等实现***功能的芯片,本实施例中以***芯片101为SOC做示例性说明。In this embodiment, the system chip 101 may be a chip that implements system functions such as a SOC (System on Chip, system-on-chip), a processor of an electronic device, etc. In this embodiment, the system chip 101 is used as an SOC for exemplary illustration.
如图1所示,时钟芯片具体包括第一时钟芯片103和第二时钟芯片104,第一时钟芯片103和第二时钟芯片104均与***芯片101通信连接。As shown in FIG. 1 , the clock chip specifically includes a first clock chip 103 and a second clock chip 104 , and both the first clock chip 103 and the second clock chip 104 are communicatively connected to the system chip 101 .
第一时钟芯片103和第二时钟芯片104可以通过通信总线与***芯片101通信连接,示例性的,通信总线可以选择I 2C等通信总线,如图1所示,本实施例中,I 2C通信总线具体包括SDA(串行数据线)、SCL(串行时钟线)和信号传输控制信号线(INT)。 The first clock chip 103 and the second clock chip 104 can communicate with the system chip 101 through a communication bus. Exemplarily, the communication bus can be a communication bus such as I 2 C, as shown in FIG. 1 , in this embodiment, I 2 The C communication bus specifically includes SDA (serial data line), SCL (serial clock line) and signal transmission control signal line (INT).
显然,实施时,还可以根据需要选择其他通信总线,本实施例中不对通信总线的具体种类做进一步限定。Obviously, during implementation, other communication buses can also be selected according to needs, and the specific types of communication buses are not further limited in this embodiment.
第一时钟芯片103和第二时钟芯片104可以采用精度较高的晶体振荡器105(简称晶振)作为时钟信号源,晶体振荡器105通过时钟输入信号线X_IN和时钟输出信号线X_OUT与第一时钟芯片103和第二时钟芯片104连接。The first clock chip 103 and the second clock chip 104 can use a crystal oscillator 105 with high precision (referred to as crystal oscillator) as a clock signal source, and the crystal oscillator 105 communicates with the first clock through the clock input signal line X_IN and the clock output signal line X_OUT. The chip 103 is connected to the second clock chip 104 .
电子设备可以通过外部电源VCC或芯片电池模块102供电。在电子设备连接外部电源VCC时,可以直接通过外部电源VCC为第一时钟芯片103和第二时钟芯片104供电。Electronic equipment can be powered by an external power supply VCC or the chip battery module 102 . When the electronic device is connected to the external power supply VCC, the first clock chip 103 and the second clock chip 104 can be directly powered by the external power supply VCC.
为了保证第一时钟芯片103和第二时钟芯片104中的时钟,不会因为断电而中断可以设置芯片电池模块102,当外部电源VCC断开时,通过芯片电池模块102为第一时钟芯片103和第二时钟芯片104供电。In order to guarantee the clock in the first clock chip 103 and the second clock chip 104, the chip battery module 102 can not be set because of the interruption of power failure. and the second clock chip 104 for power supply.
可以理解的是,芯片电池模块102上允许安装芯片电池,从而实现利用, 芯片电池模块102在待机状态下为时钟芯片供电。一般来说,芯片电池可以选用设置于电子设备的主板上等位置的纽扣电池,芯片电池需要满足长时间的工作要求,其更换周期通常在一年甚至数年。It can be understood that the chip battery module 102 is allowed to be installed with a chip battery, so as to realize utilization, and the chip battery module 102 supplies power for the clock chip in a standby state. Generally speaking, the chip battery can be a button battery installed on the motherboard of the electronic device, etc. The chip battery needs to meet the long-term working requirements, and its replacement cycle is usually one year or even several years.
如图2所示,在其中一些实施例中,该定时开机控制方法包括以下步骤:As shown in Figure 2, in some of the embodiments, the timing power-on control method includes the following steps:
步骤201:在所述电子设备的外部电源断开的情况下,所述芯片电池模块向所述第一时钟芯片供电,其中,所述第二时钟芯片处于断电状态。Step 201: When the external power supply of the electronic device is cut off, the chip battery module supplies power to the first clock chip, wherein the second clock chip is in a power-off state.
本实施例的技术方案中,在外部电源断开的情况下,通过芯片电池模块102向第一时钟芯片103供电,使得第一时钟芯片103处于待机工作状态,第二时钟芯片104此时处于断电状态。In the technical solution of this embodiment, when the external power supply is disconnected, the chip battery module 102 supplies power to the first clock chip 103, so that the first clock chip 103 is in the standby working state, and the second clock chip 104 is in the off state at this time. power state.
步骤202:到达满足开机时间条件时,所述第一时钟芯片控制所述芯片电池模块向所述第二时钟芯片供电.Step 202: When the power-on time condition is met, the first clock chip controls the chip battery module to supply power to the second clock chip.
满足开机时间条件指的是达到了开机时间,从而实现控制电子设备的定时开机,这里,开机时间是预先设置的,示例性的,用户可以根据需要设定一个开机时间,以使电子设备在达到该开机时间时自动开机。Satisfying the power-on time condition refers to reaching the power-on time, so as to realize the timing power-on of the control electronic device. Here, the power-on time is preset. For example, the user can set a power-on time according to the needs, so that the electronic device Automatically boot at the boot time.
本实施例的技术方案中,在待机状态下,第二时钟芯片104是处于断电状态的,在满足开机时间条件时,第一时钟芯片103控制芯片电池模块102向第二时钟芯片104供电,从而通过第二时钟芯片104进入工作状态。In the technical solution of this embodiment, in the standby state, the second clock chip 104 is in a power-off state, and when the power-on time condition is met, the first clock chip 103 controls the chip battery module 102 to supply power to the second clock chip 104, Thus, the second clock chip 104 enters the working state.
步骤203:在所述第二时钟芯片通过所述芯片电池模块供电的情况下,所述第二时钟芯片根据所述开机时间条件向所述***芯片发送开机控制信号。Step 203: When the second clock chip is powered by the chip battery module, the second clock chip sends a power-on control signal to the system chip according to the power-on time condition.
第二时钟芯片104在通电后,能够根据开机时间条件向***芯片101发送开机控制信号,以实现电子设备开机。After the second clock chip 104 is powered on, it can send a power-on control signal to the system chip 101 according to the power-on time condition, so as to realize the power-on of the electronic device.
需要理解的是,在其中一些实施例中,第一时钟芯片103的待机功率小于第二时钟芯片104的待机功率。It should be understood that, in some embodiments, the standby power of the first clock chip 103 is smaller than the standby power of the second clock chip 104 .
具体而言,本实施例的技术方案中,第一时钟芯片103并不支持定时开机功能,因此,必须依赖第二时钟芯片104实现定时开机的控制,如图1所示,第二时钟芯片104通过开机控制信号线PWRON与***芯片101连接,以向***芯片101提供开机控制信号。该第二时钟芯片10能够实现提供开机控制信号的功能,但是,第二时钟芯片104的待机功率也相对较高。Specifically, in the technical solution of this embodiment, the first clock chip 103 does not support the function of timing power-on, therefore, must rely on the second clock chip 104 to realize the control of timing power-on, as shown in Figure 1, the second clock chip 104 The power-on control signal line PWRON is connected to the system chip 101 to provide a power-on control signal to the system chip 101 . The second clock chip 10 can realize the function of providing a power-on control signal, but the standby power of the second clock chip 104 is also relatively high.
需要理解的是,为了确保电子设备的工作时序和工作频率稳定,需要为电子设备提供时钟信号,当电子设备断电时,时钟芯片需要保持持续工作状态,以向电子设备提供准确的时间信息,电子设备断电时,时钟芯片的工作功率即可理解为时钟芯片的待机功率。It should be understood that in order to ensure the stability of the working timing and frequency of the electronic equipment, it is necessary to provide a clock signal for the electronic equipment. When the electronic equipment is powered off, the clock chip needs to keep working continuously to provide accurate time information to the electronic equipment. When the electronic device is powered off, the working power of the clock chip can be understood as the standby power of the clock chip.
示例性的,在一个实施例中,第二时钟芯片104为RK808芯片,该RK808芯片的待机功率较高。Exemplarily, in an embodiment, the second clock chip 104 is an RK808 chip, and the standby power of the RK808 chip is relatively high.
一般情况下,电子设备中的芯片电池的更换周期应当在一年甚至数年,而在以RK808芯片作为时钟芯片且使用常规的纽扣电池作为芯片电池时,芯片电池的电量仅能支持数个月的使用。Under normal circumstances, the replacement cycle of the chip battery in electronic equipment should be one year or even several years, but when the RK808 chip is used as the clock chip and the conventional button battery is used as the chip battery, the power of the chip battery can only support several months. usage of.
RK808芯片是一种高度集成芯片,可支持程控时序和时钟信号,在某些特定场景下,由于软硬件要求的限制,以及对特定功能的需求,必须使用该RK808芯片作为时钟芯片,这导致电池更换周期较短,使用较为不便。The RK808 chip is a highly integrated chip that can support program-controlled timing and clock signals. In some specific scenarios, due to the limitations of software and hardware requirements and the need for specific functions, the RK808 chip must be used as a clock chip, which causes battery The replacement cycle is short and it is inconvenient to use.
本实施例的技术方案中,进一步设置了第一时钟芯片103,本实施例中,第一时钟芯片103为待机功耗较低的时钟芯片,第一时钟芯片103主要用于实现待机工作的功能。In the technical solution of this embodiment, a first clock chip 103 is further provided. In this embodiment, the first clock chip 103 is a clock chip with lower standby power consumption, and the first clock chip 103 is mainly used to realize the function of standby operation. .
在一个较佳的实施例中,具体选择了PCF8563芯片作为第一时钟芯片103,PCF8563芯片是一种结构简单、功能相对单一、待机功耗较低的时钟芯片,由于其功能单一,可能难以满足功能相对复杂的电子设备的使用需求。In a preferred embodiment, the PCF8563 chip is specifically selected as the first clock chip 103. The PCF8563 chip is a clock chip with simple structure, relatively single function, and low standby power consumption. Due to its single function, it may be difficult to meet The use requirements of electronic equipment with relatively complex functions.
而本实施例中,同时设置了第一时钟芯片103和第二时钟芯片104,在工作过程中,能够通过第二时钟芯片104提供相对丰富的功能,而在待机状态下,通过第一时钟芯片103执行待机功耗的待机工作。通过两个时钟芯片相配合,既降低了待机功耗,也能够提供所需的功能,满足更加丰富的使用需求。However, in this embodiment, the first clock chip 103 and the second clock chip 104 are set at the same time. During the working process, the second clock chip 104 can provide relatively rich functions, and in the standby state, the first clock chip 103 executes the standby operation of standby power consumption. The cooperation of the two clock chips not only reduces the standby power consumption, but also provides the required functions to meet more abundant usage requirements.
在其中一个实施例中,仅设置了一个晶体振荡器105,该晶体振荡器105与第一时钟芯片103按照图1所示方式连接,晶体振荡器105的输出端与第二时钟芯片104的输出端连接,且晶体振荡器105的输出端与第二时钟芯片104的输出端之间串接一个缓冲电容,缓冲电容的电容值可以控制在10~30pF(皮法),这样,当第二时钟芯片104处于休眠状态时,由于缓冲电容的存在,不会影响晶体振荡器105的正常工作,当需要控制第二时钟芯片104 时,可以在短时间内,通过相对较大的工作电流实现晶体振荡器105与第二时钟芯片104的连接,从而实现通过同一晶体振荡器105为第一时钟芯片103和第二时钟芯片104连接提供信号。In one of the embodiments, only one crystal oscillator 105 is provided, and the crystal oscillator 105 is connected with the first clock chip 103 in the manner shown in FIG. terminal, and a buffer capacitor is connected in series between the output end of the crystal oscillator 105 and the output end of the second clock chip 104, and the capacitance value of the buffer capacitor can be controlled at 10-30pF (picofarads), so that when the second clock When the chip 104 is in the dormant state, due to the existence of the buffer capacitor, the normal operation of the crystal oscillator 105 will not be affected. When the second clock chip 104 needs to be controlled, the crystal oscillation can be realized through a relatively large operating current in a short time. The crystal oscillator 105 is connected to the second clock chip 104, so that the same crystal oscillator 105 is used to provide signals for the connection between the first clock chip 103 and the second clock chip 104.
需要理解的是,本实施例的技术方案中的第一时钟芯片103和第二时钟芯片104并不局限于上述选择,在某些特定场景下,可能需要使用某些特定的功耗较高的第二时钟芯片104,这将导致电子设备中用于为时钟芯片供电的芯片电池的使用时间缩短。It should be understood that the first clock chip 103 and the second clock chip 104 in the technical solution of this embodiment are not limited to the above options, and in some specific scenarios, it may be necessary to use some specific clock chips with higher power consumption. The second clock chip 104, which will shorten the usage time of the chip battery used to power the clock chip in the electronic device.
本实施例中,通过设置一个功能较为单一但功耗较低的第一时钟芯片103,该第一时钟芯片103用于长时间的待机,以保证能够正常提供时间信号。在待机状态下,第二时钟芯片104处于断电状态,这样,芯片电池仅需要为第一时钟芯片103供电,能够延长芯片电池可以使用的时间,延长芯片电池的更换周期。In this embodiment, a first clock chip 103 with a single function but low power consumption is provided, and the first clock chip 103 is used for long-time standby to ensure that the time signal can be provided normally. In the standby state, the second clock chip 104 is in a power-off state. In this way, the chip battery only needs to supply power to the first clock chip 103, which can prolong the usable time of the chip battery and prolong the replacement cycle of the chip battery.
在需要实现特定功能时,通过第一时钟芯片103唤醒第二时钟芯片104,具体的,通过第一时钟芯片103控制第二时钟芯片104通电,以通过功能更加丰富但功耗相对较高的第二时钟芯片104实现定时开机控制,在电子设备开机之后,可以实现其他特定功能。When it is necessary to realize a specific function, wake up the second clock chip 104 through the first clock chip 103, specifically, control the power on of the second clock chip 104 through the first clock chip 103, so that the second clock chip 104 with richer functions but relatively higher power consumption The second clock chip 104 realizes timing power-on control, and can realize other specific functions after the electronic equipment is powered on.
这样,待机功耗较高的第二时钟芯片104的通电时间较短,所耗费的电量也相对较少,有助于延长芯片电池的更换周期。In this way, the power-on time of the second clock chip 104 with higher standby power consumption is shorter and consumes relatively less power, which helps to prolong the replacement cycle of the chip battery.
在其中一些实施例中,所述第一时钟芯片控制所述芯片电池模块向所述第二时钟芯片供电之前,所述方法还包括:In some of these embodiments, before the first clock chip controls the chip battery module to supply power to the second clock chip, the method further includes:
在检测到所述电子设备的外部电源断开的情况下,在第一预设时长内,通过所述芯片电池模块向所述第一时钟芯片和所述第二时钟芯片供电;When it is detected that the external power supply of the electronic device is disconnected, supplying power to the first clock chip and the second clock chip through the chip battery module within a first preset time period;
在所述第一预设时长内,所述第二时钟芯片向所述第一时钟芯片同步所述开机时间条件;Within the first preset duration, the second clock chip synchronizes the power-on time condition with the first clock chip;
在所述外部电源的断开时间达到所述第一预设时长之后,第一时钟芯片控制断开所述芯片电池模块对所述第二时钟芯片的供电。After the disconnection time of the external power supply reaches the first preset duration, the first clock chip controls to disconnect the power supply of the chip battery module to the second clock chip.
需要理解的是,***芯片101等电子设备的其他部件的待机功率和工作功率均远高于时钟芯片的待机功率,因此,即使外部电源VCC断开,电子设备依赖电池工作时,可以通过电池为时钟芯片供电,此时,时钟芯片消耗的 电能与***芯片101等电子设备的其他部件相比仍然可以忽略不计。It should be understood that the standby power and working power of other parts of the electronic equipment such as the system chip 101 are much higher than the standby power of the clock chip. Therefore, even if the external power supply VCC is disconnected, when the electronic equipment relies on the battery to work, it can be powered by the battery. The clock chip supplies power. At this time, the power consumed by the clock chip is still negligible compared with other components of the electronic device such as the system chip 101 .
为了延长电子设备的电池的使用时间,可以选择关闭电子设备,而并非控制电子设备处于休眠或待机状态,此时电池停止向***芯片101及供电等电子设备的其他部件供电,此时,时钟芯片需要依赖芯片电池模块102供电。In order to prolong the service life of the battery of the electronic device, you can choose to turn off the electronic device instead of controlling the electronic device to be in a sleep or standby state. At this time, the battery stops supplying power to other components of the electronic device such as the system chip 101 and the power supply. At this time, the clock chip It needs to rely on the chip battery module 102 for power supply.
本实施例的技术方案中,外部电源VCC断开指的是拔下插头或者直接断开外部电源VCC的状态。此时,电子设备无法获得外部的电能。In the technical solution of this embodiment, the disconnection of the external power supply VCC refers to a state where the plug is pulled out or the external power supply VCC is directly disconnected. At this time, the electronic device cannot obtain external electric energy.
在第一预设时长内,通过芯片电池模块102向第一时钟芯片103和第二时钟芯片104供电,这里,第一预设时长可以根据需要设定,例如,设定为2秒、5秒等不同的数值,该第一预设时长用于第一时钟芯片103和第二时钟芯片104中开机时间条件的同步。In the first preset duration, the first clock chip 103 and the second clock chip 104 are powered by the chip battery module 102. Here, the first preset duration can be set as required, for example, set to 2 seconds, 5 seconds and other different values, the first preset duration is used for synchronization of power-on time conditions in the first clock chip 103 and the second clock chip 104 .
在第一预设时长内,第二时钟芯片104将开机时间条件发送至第一时钟芯片103,这里,开机时间条件可以是由用户预先设定的,例如,用户可以设置该电子设备在4个小时之后自动开机或在完善5点钟自动开机。Within the first preset duration, the second clock chip 104 sends the power-on time condition to the first clock chip 103. Here, the power-on time condition can be preset by the user. For example, the user can set the electronic device to operate at 4 Automatically power on after 1 hour or automatically power on at 5 o'clock.
第二时钟芯片104支持自动开机的功能,因此,用户所设定的开机时间条件会保存在该第二时钟芯片104中,并由第二时钟芯片104同步到第一时钟芯片103中。The second clock chip 104 supports the function of automatic power-on. Therefore, the power-on time condition set by the user will be saved in the second clock chip 104 and synchronized to the first clock chip 103 by the second clock chip 104 .
在达到第一预设时长后,芯片电池模块102停止向第二时钟芯片104供电,此时,芯片电池模块102仅向第一时钟芯片103供电,从而节约电能,延长芯片电池的使用时间。After reaching the first preset duration, the chip battery module 102 stops supplying power to the second clock chip 104. At this time, the chip battery module 102 only supplies power to the first clock chip 103, thereby saving electric energy and prolonging the use time of the chip battery.
第一时钟芯片103在芯片电池模块102的供电下,保存持续工作状态,并在满足开机时间条件时,执行图2所示实施例中的技术方案,具体的,第一时钟芯片103控制芯片电池模块102向第二时钟芯片104供电,以通过第二时钟芯片104实现定时开机功能,此处不再赘述。Under the power supply of the chip battery module 102, the first clock chip 103 saves the continuous working state, and executes the technical solution in the embodiment shown in FIG. The module 102 supplies power to the second clock chip 104, so as to realize the timing power-on function through the second clock chip 104, which will not be repeated here.
这样,在电子设备的外部电源VCC断开后,芯片电池模块102仅需要在较短的时间内向第二时钟芯片104供电,减少了电能的消耗,有助于减少电能的消耗,从而有助于延长芯片电池的使用时间。In this way, after the external power supply VCC of the electronic device is disconnected, the chip battery module 102 only needs to supply power to the second clock chip 104 in a short period of time, which reduces the consumption of electric energy and helps to reduce the consumption of electric energy. Extend the usage time of the chip battery.
在其中一些实施例中,所述方法还包括:In some of these embodiments, the method also includes:
在所述电子设备的外部电源处于连接状态下,通过所述外部电源为所述第二时钟芯片供电;When the external power supply of the electronic device is connected, supply power to the second clock chip through the external power supply;
在所述第二时钟芯片通过所述外部电源供电的情况下,所述第二时钟芯片根据所述开机时间条件向所述***芯片发送开机控制信号。When the second clock chip is powered by the external power supply, the second clock chip sends a power-on control signal to the system chip according to the power-on time condition.
可以理解的是,第二时钟芯片104待机过程中所消耗的电能与芯片电池模块102所能提供的电能来说相对较多,但是与电子设备本身待机或工作过程中所消耗的电能相比则可以几乎忽略不计。It can be understood that the power consumed by the second clock chip 104 during the standby process is relatively more than the power that the chip battery module 102 can provide, but compared with the power consumed by the electronic device itself during standby or working. can be almost ignored.
本实施例中,当电子设备的外部电源VCC处于连接状态下,即使电子设备处于关机或待机状态,第二时钟芯片104仍然可以直接通过外部电源VCC提供的电能供电,并保持持续的工作状态,直到满足开机时间条件时,向***芯片101发送开机控制信号,从而实现定时开机功能,这一过程中,不会消耗芯片电池模块102中的电能。In this embodiment, when the external power supply VCC of the electronic device is in a connected state, even if the electronic device is in a shutdown or standby state, the second clock chip 104 can still be directly powered by the electric energy provided by the external power supply VCC, and maintain a continuous working state. When the power-on time condition is satisfied, a power-on control signal is sent to the system chip 101 to realize the timing power-on function. During this process, the power in the chip battery module 102 will not be consumed.
在其中一些实施例中,所述第二时钟芯片根据所述开机时间条件向所述***芯片发送开机控制信号之后,所述方法还包括:In some of these embodiments, after the second clock chip sends a power-on control signal to the system chip according to the power-on time condition, the method further includes:
在所述电子设备处于开启状态下,所述***芯片读取所述第一时钟芯片的第一时钟信号;When the electronic device is turned on, the system chip reads the first clock signal of the first clock chip;
所述***芯片将所述第一时钟信号同步至所述第二时钟芯片。The system chip synchronizes the first clock signal to the second clock chip.
本实施例的技术方案中,第一时钟芯片103处于持续工作状态,因此,该电子设备也以第一时钟芯片103所提供的时钟作为***时间,或称做基准时间。In the technical solution of this embodiment, the first clock chip 103 is in a continuous working state, therefore, the electronic device also uses the clock provided by the first clock chip 103 as the system time, or referred to as the reference time.
而为了确保电子设备定时开机的开机时间的准确性,需要保证第一时钟芯片103和第二时钟芯片104的时间是同步的。In order to ensure the accuracy of the start-up time of the electronic device's regular start-up, it is necessary to ensure that the time of the first clock chip 103 and the time of the second clock chip 104 are synchronized.
本实施例中,当电子设备处于开启状态下,***芯片101读取第一时钟芯片103所提供的第一时钟信号,将该第一时钟信号作为***时间,同时,***芯片101还将该第一时钟信号同步至第二时钟芯片104。可以理解,电子设备的***芯片101和第二时钟芯片104可能并非持续处于供电状态,而在断电过程中,其中的时钟信号可能丢失,本实施例中通过进行时钟同步操作,能够保证第一时钟芯片103的时钟、第二时钟信号的时钟和电子设备的***时间三者是一致的。In this embodiment, when the electronic device is turned on, the system chip 101 reads the first clock signal provided by the first clock chip 103, and uses the first clock signal as the system time. A clock signal is synchronized to the second clock chip 104 . It can be understood that the system chip 101 and the second clock chip 104 of the electronic device may not be continuously powered, and the clock signal therein may be lost during the power-off process. In this embodiment, the clock synchronization operation can ensure that the first The clock of the clock chip 103 , the clock of the second clock signal and the system time of the electronic device are consistent.
上述时钟同步过程可以周期性进行,例如,每60秒或30秒进行一次,也可以定时进行,例如,在每天的指定时间进行时钟同步,示例性的,在每 天的6点钟、10点钟、14点钟和20点钟各进行一次时钟同步,显然,该时钟同步的时间可以根据需要设置,本实施例中不做进一步限定。The above clock synchronization process can be performed periodically, for example, once every 60 seconds or 30 seconds, or it can be performed regularly, for example, clock synchronization is performed at a specified time every day, for example, at 6 o'clock and 10 o'clock every day , 14 o'clock and 20 o'clock clock synchronization is performed once respectively. Obviously, the clock synchronization time can be set according to needs, which is not further limited in this embodiment.
在其中一些实施例中,所述方法还包括:In some of these embodiments, the method also includes:
在所述电子设备处于联网状态下,所述***芯片获取来自时间服务器的第二时钟信号;When the electronic device is in a networked state, the system chip acquires a second clock signal from a time server;
所述***芯片根据所述第二时钟信号同步所述第一时钟芯片。The system chip synchronizes the first clock chip according to the second clock signal.
为了确保第一时钟芯片103中时钟的准确性,当电子设备处于联网状态下,例如电子设备接入互联网时,可以通过时间服务器获取标准时间作为第二时钟信号,并基于该第二时钟信号同步第一时钟芯片103中的时钟,使得第一时钟芯片103的时钟与标准时间是同步的,以进一步确保能够更加准确的控制电子设备定时开机的时间的准确性。In order to ensure the accuracy of the clock in the first clock chip 103, when the electronic device is in a networked state, for example, when the electronic device is connected to the Internet, the standard time can be obtained as the second clock signal through the time server, and synchronized based on the second clock signal The clock in the first clock chip 103 makes the clock of the first clock chip 103 synchronous with the standard time, so as to further ensure the accuracy of the time when electronic devices can be controlled more accurately.
如图3所示,本实施例中,时钟同步的步骤可以概括为,在电子设备开机后,首先进行时钟芯片的驱动初始化处理,这里,时钟芯片包括上述第一时钟芯片RTC1和第二时钟芯片RTC2,时钟芯片的驱动初始化处理的过程本身也可以参考相关技术。As shown in Figure 3, in this embodiment, the steps of clock synchronization can be summarized as, after the electronic device is turned on, firstly perform the drive initialization process of the clock chip, here, the clock chip includes the above-mentioned first clock chip RTC1 and the second clock chip For the process of RTC2, the driver initialization processing of the clock chip itself, reference may also be made to related technologies.
接下来,读取RTC1的时钟,接下来,***芯片读取RTC1的时钟,并作为***时间,同时,还将该RTC1的时钟同步至RTC2,以校准RTC2的时钟。Next, the clock of RTC1 is read. Next, the system chip reads the clock of RTC1 and uses it as the system time. At the same time, the clock of RTC1 is synchronized to RTC2 to calibrate the clock of RTC2.
工作过程中,还可以周期性根据RTC1的时钟同步RTC2的时钟,以确保***时间、RTC1的时钟和RTC2的时钟的一致性。During the working process, the clock of RTC2 can also be periodically synchronized with the clock of RTC1 to ensure the consistency of the system time, the clock of RTC1 and the clock of RTC2.
当电子设备未处于联网状态下,直接调用RTC1的时钟,当电子设备处于联网状态下,还可以根据时间服务器提供的标准时间校准RTC1的时钟,从而提高时间的准确性。When the electronic device is not connected to the Internet, the clock of RTC1 can be called directly. When the electronic device is connected to the Internet, the clock of RTC1 can be calibrated according to the standard time provided by the time server, thereby improving the accuracy of time.
如图4所示,本实施例的技术方案可以概括为,电子设备的外部电源断开时,例如拔下电子设备的插头时,在第一预设时长内,芯片电池模块同时向第一时钟芯片RTC1和第二时钟芯片RTC2供电。同时,在第一预设时长内,RTC2将开机时间条件同步至RTC1。As shown in Figure 4, the technical solution of this embodiment can be summarized as, when the external power supply of the electronic device is disconnected, for example, when the plug of the electronic device is unplugged, within the first preset duration, the chip battery module simultaneously The chip RTC1 and the second clock chip RTC2 are powered. At the same time, RTC2 synchronizes the power-on time condition to RTC1 within the first preset duration.
在达到第一预设时长后,芯片电池模块停止向RTC2供电,而保持向RTC1供电。After reaching the first preset time period, the chip battery module stops supplying power to RTC2 and keeps supplying power to RTC1.
RTC1基于芯片电池模块的供电持续工作并计时,直到时间满足开机时间条件。RTC1 continues to work and time based on the power supply of the chip battery module until the time meets the power-on time condition.
在时间满足开机时间条件时,RTC1控制芯片电池模块向RTC2供电,RTC2进一步向***芯片SOC发送开机控制信号,实现控制电子设备定时开机。When the time meets the start-up time condition, the battery module of the RTC1 control chip supplies power to the RTC2, and the RTC2 further sends a start-up control signal to the system chip SOC to realize timing start-up of the electronic equipment.
本公开实施例提供了一种电子设备。An embodiment of the present disclosure provides an electronic device.
如图1所示,该电子设备包括***芯片101、芯片电池模块102、第一时钟芯片103和第二时钟芯片104,所述第一时钟芯片103和所述第二时钟芯片104均与所述***芯片101通信连接;As shown in Figure 1, the electronic device includes a system chip 101, a chip battery module 102, a first clock chip 103 and a second clock chip 104, and the first clock chip 103 and the second clock chip 104 are all compatible with the System chip 101 communication connection;
芯片电池模块102配置为,在电子设备的外部电源断开的情况下,通过向第一时钟芯片103供电,其中,第二时钟芯片104处于断电状态;The chip battery module 102 is configured to supply power to the first clock chip 103 when the external power supply of the electronic device is disconnected, wherein the second clock chip 104 is in a power-off state;
第一时钟芯片103配置为,到达满足开机时间条件时,控制芯片电池模块102向第二时钟芯片104供电;The first clock chip 103 is configured to control the chip battery module 102 to supply power to the second clock chip 104 when the power-on time condition is met;
在第二时钟芯片104配置为,根据开机时间条件向***芯片101发送开机控制信号。The second clock chip 104 is configured to send a power-on control signal to the system chip 101 according to the power-on time condition.
在一些实施例中,芯片电池模块102配置为,在检测到电子设备的外部电源断开的情况下,在第一预设时长内,向第一时钟芯片103和第二时钟芯片104供电;In some embodiments, the chip battery module 102 is configured to supply power to the first clock chip 103 and the second clock chip 104 within a first preset duration when it is detected that the external power supply of the electronic device is disconnected;
第二时钟芯片104配置为,在第一预设时长内,向第一时钟芯片103同步开机时间条件;The second clock chip 104 is configured to, within the first preset duration, synchronize the power-on time condition to the first clock chip 103;
第一时钟芯片103配置为,在外部电源的断开时间达到第一预设时长之后,控制断开芯片电池模块102对第二时钟芯片104的供电。The first clock chip 103 is configured to control to disconnect the power supply of the chip battery module 102 to the second clock chip 104 after the disconnection time of the external power source reaches a first preset duration.
在一些实施例中,第二时钟芯片104供电配置为:In some embodiments, the power supply configuration of the second clock chip 104 is:
在电子设备的外部电源处于连接状态下,通过外部电源供电;When the external power supply of the electronic device is connected, supply power through the external power supply;
根据开机时间条件向***芯片101发送开机控制信号。Send a power-on control signal to the SoC 101 according to the power-on time condition.
在一些实施例中,***芯片101配置为:In some embodiments, the SoC 101 is configured to:
在电子设备处于开启状态下,读取第一时钟芯片103的第一时钟信号;When the electronic device is turned on, read the first clock signal of the first clock chip 103;
将第一时钟信号同步至第二时钟芯片104。Synchronize the first clock signal to the second clock chip 104 .
在一些实施例中,***芯片101配置为:In some embodiments, the SoC 101 is configured to:
在电子设备处于联网状态下,获取来自时间服务器的第二时钟信号;Obtaining a second clock signal from a time server when the electronic device is in a networked state;
根据第二时钟信号同步第一时钟芯片103。The first clock chip 103 is synchronized according to the second clock signal.
在一些实施例中,第一时钟芯片103的待机功率小于第二时钟芯片104的待机功率。In some embodiments, the standby power of the first clock chip 103 is less than that of the second clock chip 104 .
在一些实施例中,第二时钟芯片104为RK808芯片。In some embodiments, the second clock chip 104 is an RK808 chip.
本实施例的技术方案中,电子设备能够实现上述定时开机控制方法实施例的各个步骤,并能实现相似或相同的技术效果,此处不再赘述。In the technical solution of this embodiment, the electronic device can realize each step of the above embodiment of the timing power-on control method, and can achieve similar or identical technical effects, which will not be repeated here.
以上,仅为本公开的具体实施方式,但本公开的保护范围并不局限于此,任何熟悉本技术领域的技术人员在本公开揭露的技术范围内,可轻易想到变化或替换,都应涵盖在本公开的保护范围之内。因此,本公开的保护范围应以权利要求的保护范围为准。The above is only a specific embodiment of the present disclosure, but the scope of protection of the present disclosure is not limited thereto. Anyone skilled in the art can easily think of changes or substitutions within the technical scope of the present disclosure, and should cover all within the protection scope of the present disclosure. Therefore, the protection scope of the present disclosure should be determined by the protection scope of the claims.

Claims (14)

  1. 一种定时开机控制方法,应用于电子设备,所述电子设备包括***芯片、芯片电池模块、第一时钟芯片和第二时钟芯片,所述方法包括以下步骤:A timing start-up control method applied to electronic equipment, the electronic equipment comprising a system chip, a chip battery module, a first clock chip and a second clock chip, the method comprising the following steps:
    在所述电子设备的外部电源断开的情况下,所述芯片电池模块向所述第一时钟芯片供电,其中,所述第二时钟芯片处于断电状态;When the external power supply of the electronic device is disconnected, the chip battery module supplies power to the first clock chip, wherein the second clock chip is in a power-off state;
    到达满足开机时间条件时,所述第一时钟芯片控制所述芯片电池模块向所述第二时钟芯片供电;When the power-on time condition is met, the first clock chip controls the chip battery module to supply power to the second clock chip;
    所述第二时钟芯片根据所述开机时间条件向所述***芯片发送开机控制信号。The second clock chip sends a power-on control signal to the system chip according to the power-on time condition.
  2. 根据权利要求1所述的方法,其中,所述第一时钟芯片控制所述芯片电池模块向所述第二时钟芯片供电之前,所述方法还包括:The method according to claim 1, wherein before the first clock chip controls the chip battery module to supply power to the second clock chip, the method further comprises:
    在检测到所述电子设备的外部电源断开的情况下,在第一预设时长内,通过所述芯片电池模块向所述第一时钟芯片和所述第二时钟芯片供电;When it is detected that the external power supply of the electronic device is disconnected, supplying power to the first clock chip and the second clock chip through the chip battery module within a first preset time period;
    在所述第一预设时长内,所述第二时钟芯片向所述第一时钟芯片同步所述开机时间条件;Within the first preset duration, the second clock chip synchronizes the power-on time condition with the first clock chip;
    在所述外部电源的断开时间达到所述第一预设时长之后,第一时钟芯片控制断开所述芯片电池模块对所述第二时钟芯片的供电。After the disconnection time of the external power supply reaches the first preset duration, the first clock chip controls to disconnect the power supply of the chip battery module to the second clock chip.
  3. 根据权利要求1所述的方法,其中,所述第一时钟芯片的待机功率小于所述第二时钟芯片的待机功率。The method according to claim 1, wherein the standby power of the first clock chip is smaller than the standby power of the second clock chip.
  4. 根据权利要求3所述的方法,其中,所述第二时钟芯片为RK808芯片。The method according to claim 3, wherein the second clock chip is an RK808 chip.
  5. 根据权利要求1所述的方法,其中,所述方法还包括:The method according to claim 1, wherein the method further comprises:
    在所述电子设备的外部电源处于连接状态下,通过所述外部电源为所述第二时钟芯片供电;When the external power supply of the electronic device is connected, supply power to the second clock chip through the external power supply;
    所述第二时钟芯片根据所述开机时间条件向所述***芯片发送开机控制信号。The second clock chip sends a power-on control signal to the system chip according to the power-on time condition.
  6. 根据权利要求1至5中任一项所述的方法,其中,所述方法还包括:The method according to any one of claims 1 to 5, wherein the method further comprises:
    在所述电子设备处于开启状态下,所述***芯片读取所述第一时钟芯片的第一时钟信号;When the electronic device is turned on, the system chip reads the first clock signal of the first clock chip;
    所述***芯片将所述第一时钟信号同步至所述第二时钟芯片。The system chip synchronizes the first clock signal to the second clock chip.
  7. 根据权利要求6所述的方法,其中,所述方法还包括:The method according to claim 6, wherein the method further comprises:
    在所述电子设备处于联网状态下,所述***芯片获取来自时间服务器的第二时钟信号;When the electronic device is in a networked state, the system chip acquires a second clock signal from a time server;
    所述***芯片根据所述第二时钟信号同步所述第一时钟芯片。The system chip synchronizes the first clock chip according to the second clock signal.
  8. 一种电子设备,包括***芯片、芯片电池模块、第一时钟芯片和第二时钟芯片,所述第一时钟芯片和所述第二时钟芯片均与所述***芯片通信连接;An electronic device, including a system chip, a chip battery module, a first clock chip, and a second clock chip, both of the first clock chip and the second clock chip are communicatively connected to the system chip;
    所述芯片电池模块配置为,在所述电子设备的外部电源断开的情况下,通过向所述第一时钟芯片供电,其中,所述第二时钟芯片处于断电状态;The chip battery module is configured to supply power to the first clock chip when the external power supply of the electronic device is disconnected, wherein the second clock chip is in a power-off state;
    所述第一时钟芯片配置为,到达满足开机时间条件时,控制所述芯片电池模块向所述第二时钟芯片供电;The first clock chip is configured to control the chip battery module to supply power to the second clock chip when the power-on time condition is met;
    在所述第二时钟芯片配置为,根据所述开机时间条件向所述***芯片发送开机控制信号。The second clock chip is configured to send a power-on control signal to the system chip according to the power-on time condition.
  9. 根据权利要求8所述的电子设备,其中,所述芯片电池模块配置为,在检测到所述电子设备的外部电源断开的情况下,在第一预设时长内,向所述第一时钟芯片和所述第二时钟芯片供电;The electronic device according to claim 8, wherein the chip battery module is configured to, when it is detected that the external power supply of the electronic device is disconnected, within a first preset period of time, power supply for the chip and the second clock chip;
    所述第二时钟芯片配置为,在所述第一预设时长内,向所述第一时钟芯片同步所述开机时间条件;The second clock chip is configured to, within the first preset duration, synchronize the power-on time condition with the first clock chip;
    所述第一时钟芯片配置为,在所述外部电源的断开时间达到所述第一预设时长之后,控制断开所述芯片电池模块对所述第二时钟芯片的供电。The first clock chip is configured to control to disconnect the power supply of the chip battery module to the second clock chip after the disconnection time of the external power source reaches the first preset duration.
  10. 根据权利要求8所述的电子设备,其中,所述第二时钟芯片供电配置为:The electronic device according to claim 8, wherein the power supply configuration of the second clock chip is:
    在所述电子设备的外部电源处于连接状态下,通过所述外部电源供电;When the external power supply of the electronic device is connected, supplying power through the external power supply;
    根据所述开机时间条件向所述***芯片发送开机控制信号。Sending a power-on control signal to the system chip according to the power-on time condition.
  11. 根据权利要求8至10中任一项所述的电子设备,其中,所述***芯片配置为:The electronic device according to any one of claims 8 to 10, wherein the system chip is configured as:
    在所述电子设备处于开启状态下,读取所述第一时钟芯片的第一时钟信号;When the electronic device is in an on state, read the first clock signal of the first clock chip;
    将所述第一时钟信号同步至所述第二时钟芯片。synchronizing the first clock signal to the second clock chip.
  12. 根据权利要求11所述的电子设备,其中,所述***芯片配置为:The electronic device according to claim 11, wherein the system chip is configured as:
    在所述电子设备处于联网状态下,获取来自时间服务器的第二时钟信号;Obtaining a second clock signal from a time server when the electronic device is in a networked state;
    根据所述第二时钟信号同步所述第一时钟芯片。synchronizing the first clock chip according to the second clock signal.
  13. 根据权利要求8所述的电子设备,其中,所述第一时钟芯片的待机功率小于所述第二时钟芯片的待机功率。The electronic device according to claim 8, wherein the standby power of the first clock chip is smaller than the standby power of the second clock chip.
  14. 根据权利要求13所述的电子设备,其中,所述第二时钟芯片为RK808芯片。The electronic device according to claim 13, wherein the second clock chip is an RK808 chip.
PCT/CN2022/074013 2022-01-26 2022-01-26 Scheduled startup control method and electronic device WO2023141813A1 (en)

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Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1215266A (en) * 1997-09-27 1999-04-28 日本电气株式会社 High-resolution clock reconstruction used in mobile communication equipment
JP2001311786A (en) * 2000-04-28 2001-11-09 Rohm Co Ltd Rtc device
CN1678103A (en) * 2004-03-31 2005-10-05 乐金电子(中国)研究开发中心有限公司 Clock impulse device of mobile communication terminal controller
CN202887050U (en) * 2012-11-09 2013-04-17 青岛海信电器股份有限公司 Real-time clock circuit and player
CN103186164A (en) * 2012-01-03 2013-07-03 联发科技股份有限公司 Clock generator and method of generating clock signal
CN104484029A (en) * 2014-12-17 2015-04-01 英华达(南京)科技有限公司 Electronic device and power-saving management method thereof
CN113934257A (en) * 2021-10-15 2022-01-14 广州极飞科技股份有限公司 System time calculation method, device, equipment and storage medium

Patent Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1215266A (en) * 1997-09-27 1999-04-28 日本电气株式会社 High-resolution clock reconstruction used in mobile communication equipment
JP2001311786A (en) * 2000-04-28 2001-11-09 Rohm Co Ltd Rtc device
CN1678103A (en) * 2004-03-31 2005-10-05 乐金电子(中国)研究开发中心有限公司 Clock impulse device of mobile communication terminal controller
CN103186164A (en) * 2012-01-03 2013-07-03 联发科技股份有限公司 Clock generator and method of generating clock signal
CN202887050U (en) * 2012-11-09 2013-04-17 青岛海信电器股份有限公司 Real-time clock circuit and player
CN104484029A (en) * 2014-12-17 2015-04-01 英华达(南京)科技有限公司 Electronic device and power-saving management method thereof
CN113934257A (en) * 2021-10-15 2022-01-14 广州极飞科技股份有限公司 System time calculation method, device, equipment and storage medium

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