WO2023108694A1 - 显示面板及电子设备 - Google Patents

显示面板及电子设备 Download PDF

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Publication number
WO2023108694A1
WO2023108694A1 PCT/CN2021/139809 CN2021139809W WO2023108694A1 WO 2023108694 A1 WO2023108694 A1 WO 2023108694A1 CN 2021139809 W CN2021139809 W CN 2021139809W WO 2023108694 A1 WO2023108694 A1 WO 2023108694A1
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WO
WIPO (PCT)
Prior art keywords
touch
line
display
signal
area
Prior art date
Application number
PCT/CN2021/139809
Other languages
English (en)
French (fr)
Inventor
方亮
丁玎
Original Assignee
武汉华星光电半导体显示技术有限公司
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Application filed by 武汉华星光电半导体显示技术有限公司 filed Critical 武汉华星光电半导体显示技术有限公司
Priority to US17/623,545 priority Critical patent/US12039115B2/en
Publication of WO2023108694A1 publication Critical patent/WO2023108694A1/zh

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Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/01—Input arrangements or combined input and output arrangements for interaction between user and computer
    • G06F3/03—Arrangements for converting the position or the displacement of a member into a coded form
    • G06F3/041—Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means
    • G06F3/0412—Digitisers structurally integrated in a display
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/01—Input arrangements or combined input and output arrangements for interaction between user and computer
    • G06F3/03—Arrangements for converting the position or the displacement of a member into a coded form
    • G06F3/041—Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means
    • G06F3/044—Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means by capacitive means
    • G06F3/0445—Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means by capacitive means using two or more layers of sensing electrodes, e.g. using two layers of electrodes separated by a dielectric layer
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/01—Input arrangements or combined input and output arrangements for interaction between user and computer
    • G06F3/03—Arrangements for converting the position or the displacement of a member into a coded form
    • G06F3/041—Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means
    • G06F3/0416—Control or interface arrangements specially adapted for digitisers
    • G06F3/04164—Connections between sensors and controllers, e.g. routing lines between electrodes and connection pads
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/01—Input arrangements or combined input and output arrangements for interaction between user and computer
    • G06F3/03—Arrangements for converting the position or the displacement of a member into a coded form
    • G06F3/041—Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means
    • G06F3/0416—Control or interface arrangements specially adapted for digitisers
    • G06F3/0418—Control or interface arrangements specially adapted for digitisers for error correction or compensation, e.g. based on parallax, calibration or alignment
    • G06F3/04182—Filtering of noise external to the device and not generated by digitiser components
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/01—Input arrangements or combined input and output arrangements for interaction between user and computer
    • G06F3/03—Arrangements for converting the position or the displacement of a member into a coded form
    • G06F3/041—Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means
    • G06F3/044—Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means by capacitive means
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E10/00—Energy generation through renewable energy sources
    • Y02E10/50—Photovoltaic [PV] energy
    • Y02E10/549—Organic PV cells

Definitions

  • the present application relates to the field of display technology, in particular to a display panel and electronic equipment.
  • display panels mainly include liquid crystal displays, plasma display panels, organic electroluminescence, and active matrix organic electroluminescence.
  • Display panels have broad application space in vehicles, mobile phones, tablets, computers and television products.
  • the touch function has become one of the standard configurations of most display panels.
  • Capacitive touch screens are widely used. The basic principle is to use tools such as fingers or stylus to generate capacitance with the touch screen, and use The electrical signal formed by the front and rear capacitance changes is used to confirm whether the panel is touched and to confirm the touch coordinates.
  • An important touch technology of the capacitive touch panel is self-capacitance, and the touch traces of a common touch structure converge in the lower peripheral area.
  • the touch trace and the display trace are designed with the same layer of metal.
  • a signal shielding line is designed between the display trace and the touch trace.
  • the number of display and touch segments increases, the number of corresponding signal shielding lines increases, resulting in an increase in the number of pads (Pads) connected to the touch chip, resulting in an increase in the cost of the display panel and a decrease in process yield.
  • Embodiments of the present application provide a display panel and an electronic device, which are used to reduce the production cost of the display panel.
  • An embodiment of the present application provides a display panel, which has a display area and a non-display area, the non-display area includes a bending sub-area, and the display panel includes:
  • the touch signal lines are located in the display area and the non-display area;
  • the display signal lines are located in the display area and the non-display area;
  • a plurality of first-type signal shielding lines, the first-type signal shielding lines are arranged in the non-display area, and the first-type signal shielding lines are located between the touch signal line and the display signal line;
  • a plurality of first power supply lines, the first power supply lines are located in the display area and the non-display area and connected to a fixed voltage signal;
  • the first type of signal shielding line is electrically connected to the first power supply line on both sides of the bent sub-region respectively.
  • the non-display area includes a first power supply wiring sub-area, the first power supply wiring is located in the first power supply wiring sub-area, and is connected to the first power supply wiring sub-area.
  • the touch signal line and the display signal line in the part corresponding to the line sub-area are arranged at intervals, and the display signal line and the touch signal line in the part corresponding to the bending sub-area are arranged in the same layer.
  • the shielding wires of the first type of signals, the touch signal wires and at least a part of the display signal wires are arranged in the same layer.
  • the display panel includes:
  • the active layer, the first gate insulating layer, the first gate, the second gate insulating layer, the second gate and the interlayer dielectric layer are stacked in sequence, and the interlayer dielectric layer has a through hole, and the through hole is at least penetrating through the interlayer dielectric layer, the second gate insulating layer and the first gate insulating layer, and the display signal line covers at least a part of the sidewall of the through hole;
  • a first source-drain metal layer, the first source-drain metal layer is disposed on the interlayer dielectric layer, and the first source-drain metal layer includes a source, a drain, and a first part of the first power supply line ;
  • the first planarization layer covers the first source-drain metal layer and fills the through hole
  • a second source-drain metal layer, the second source-drain metal layer is located on the first planarization layer, and the second source-drain metal layer includes a connection electrode, a second part of the first power supply line, the The third portion of the first power trace, wherein the first portion of the first power trace and the second portion of the first power trace are connected through a first via hole;
  • a second planarization layer, the second planarization layer is disposed on the first planarization layer.
  • the first type of signal shielding line is electrically connected to the first power supply line through the second via hole.
  • the display panel further includes:
  • a touch chip the touch chip is located on the side of the non-display area away from the display area, the touch chip is connected to the touch signal line, and the touch chip is used for the touch
  • the signal line provides the touch signal
  • control chip the control chip is located on the side of the non-display area away from the display area, the control chip is connected to the display signal line and the first power supply line, and the first type of signal shielding line
  • the control chip is electrically connected to the control chip through the first power supply line, and the control chip is used to provide the display signal for the display signal line and the fixed voltage signal for the first power supply line.
  • the non-display area includes:
  • the second power line sub-area, the second power line sub-area is located on at least one side of the first power line sub-area, and the second power line sub-area is distributed with a plurality of second power line lines .
  • the touch signal line includes a first type touch signal line and a second type touch signal line, and the first type touch signal line passes through the first power supply line
  • the upper part of the line sub-area is connected to the touch control chip, and the second type of touch signal line is connected to the touch control chip through the upper part of the second power supply line sub-area.
  • the touch chip includes a first touch chip and a second touch chip, and the first touch chip and the second touch chip are located on the side of the control chip.
  • the first type of touch signal line and the second type of touch signal line located on one side of the center line of the display panel are connected to the first touch chip and located in the center of the display panel.
  • the first type touch signal line and the second type touch signal line on the other side of the line are connected to the second touch chip.
  • the display panel further includes:
  • a second type of signal shielding line is located in the non-display area and arranged around the display area, the first end of the second type of signal shielding line is connected to the first touch chip , the second end of the second type signal shielding wire is connected to the second touch chip.
  • the display panel further includes:
  • a plurality of touch units the touch unit is arranged in the display area, and the end of the touch signal line far away from the touch chip is connected to the touch unit, and the touch signal line is connected to the touch unit
  • the touch units are connected in one-to-one correspondence.
  • the first type of signal shielding line is arranged in parallel with the display signal line.
  • An embodiment of the present application also provides an electronic device, the electronic device has a display panel and a casing, the display panel is arranged in the casing, and the display panel includes:
  • the touch signal lines are located in the display area and the non-display area;
  • the display signal lines are located in the display area and the non-display area;
  • a plurality of first-type signal shielding lines, the first-type signal shielding lines are arranged in the non-display area, and the first-type signal shielding lines are located between the touch signal line and the display signal line;
  • a plurality of first power supply lines, the first power supply lines are located in the display area and the non-display area and connected to a fixed voltage signal;
  • the first type of signal shielding line is electrically connected to the first power supply line on both sides of the bent sub-region respectively.
  • the non-display area includes a first power line sub-area, the first power line is located in the first power line sub-area, and is connected to the first power line sub-area.
  • the touch signal line and the display signal line in the part corresponding to the line sub-area are arranged at intervals, and the display signal line and the touch signal line in the part corresponding to the bending sub-area are arranged in the same layer.
  • the shielded signal line of the first type, the touch signal line and at least a part of the display signal line are arranged in the same layer.
  • the display panel includes:
  • the active layer, the first gate insulating layer, the first gate, the second gate insulating layer, the second gate and the interlayer dielectric layer are stacked in sequence, and the interlayer dielectric layer has a through hole, and the through hole is at least penetrating through the interlayer dielectric layer, the second gate insulating layer and the first gate insulating layer, and the display signal line covers at least a part of the sidewall of the through hole;
  • a first source-drain metal layer, the first source-drain metal layer is disposed on the interlayer dielectric layer, and the first source-drain metal layer includes a source, a drain, and a first part of the first power supply line ;
  • the first planarization layer covers the first source-drain metal layer and fills the through holes
  • a second source-drain metal layer, the second source-drain metal layer is located on the first planarization layer, and the second source-drain metal layer includes a connection electrode, a second part of the first power supply line, the The third portion of the first power trace, wherein the first portion of the first power trace and the second portion of the first power trace are connected through a first via hole;
  • a second planarization layer, the second planarization layer is disposed on the first planarization layer.
  • the first type of signal shielding line is electrically connected to the first power supply line through the second via hole.
  • the display panel further includes:
  • a touch chip the touch chip is located on the side of the non-display area away from the display area, the touch chip is connected to the touch signal line, and the touch chip is used for the touch
  • the signal line provides the touch signal
  • control chip the control chip is located on the side of the non-display area away from the display area, the control chip is connected to the display signal line and the first power supply line, and the first type of signal shielding line
  • the control chip is electrically connected to the control chip through the first power supply line, and the control chip is used to provide the display signal for the display signal line and the fixed voltage signal for the first power supply line.
  • the non-display area includes:
  • the second power line sub-area, the second power line sub-area is located on at least one side of the first power line sub-area, and the second power line sub-area is distributed with a plurality of second power line lines .
  • the touch signal line includes a first type touch signal line and a second type touch signal line, and the first type touch signal line passes through the first power supply line
  • the upper part of the line sub-area is connected to the touch control chip, and the second type of touch signal line is connected to the touch control chip through the upper part of the second power supply line sub-area.
  • Embodiments of the present application provide a display panel and an electronic device.
  • the display panel includes a plurality of touch signal lines, a plurality of display signal lines, a plurality of first-type signal shielding lines, and a plurality of first power supply lines.
  • the touch signal lines are located in the display area and the non-display area.
  • the display signal line is located in the display area and the non-display area.
  • the first type of signal shielding line is disposed in the non-display area, and the first type of signal shielding line is located between the touch signal line and the display signal line.
  • the first power line is located in the display area and the non-display area, and the first power line is connected to a fixed voltage signal, wherein the first type of signal shielding line is electrically connected to the first power line on both sides of the bending sub-area.
  • the first type of signal shielding line is electrically connected to the first power line on both sides of the bending sub-area.
  • the first type of signal shielding line is connected to a fixed voltage signal, and the first type of signal shielding
  • the wires are electrically connected to the first power traces on both sides of the bent sub-area. Therefore, the first type of signal shielded wires and the first power traces have the same voltage signal, and there is no need to add pads (Pad) to shield the first signal.
  • the line is connected to the control chip or the touch chip. Further, since the first power supply line is connected to the DC signal source, the corresponding capacitance and voltage difference are constant, and the corresponding signal interference is constant. Therefore, the signal can be removed by the chip. Interference, retain valid signal data, thereby preventing signal crosstalk between display signal lines and touch signal lines. In addition, the number of pads connected to the touch control chip is reduced, thereby reducing the production cost of the display panel and improving the yield rate of the manufacturing process.
  • FIG. 1 is a schematic plan view of a display panel in the prior art
  • FIG. 2 is a schematic plan view of a display panel provided by an embodiment of the present application.
  • Figure 3 is a partially enlarged view of Figure 2;
  • Fig. 4 is the sectional view of Fig. 3 along B-B ' direction;
  • FIG. 5 is a schematic structural diagram of a display panel provided by an embodiment of the present application.
  • FIG. 6 is a schematic plan view of an electronic device according to an embodiment of the present application.
  • connection should be understood in a broad sense, for example, it can be a fixed connection or a detachable connection. Connected, or integrally connected; it may be mechanically connected or electrically connected; it may be directly connected or indirectly connected through an intermediary, and it may be the internal communication of two components. Those of ordinary skill in the art can understand the specific meanings of the above terms in this application in specific situations.
  • FIG. 1 is a schematic diagram of a planar structure of a display panel in the prior art.
  • the touch function has become one of the standard configurations of most display panels. Capacitive touch screens are widely used. The basic principle is to use tools such as fingers or stylus to generate capacitance with the touch screen, and use The electrical signal formed by the front and rear capacitance changes is used to confirm whether the panel is touched and to confirm the touch coordinates.
  • An important touch technology of a capacitive touch panel is self-capacitance. As shown in FIG. 1 , the touch traces 101 of a common touch structure of a display panel 100 meet at a lower peripheral area 100 a.
  • the touch traces 101 and the display traces 102 are designed with the same metal layer.
  • a signal shielding line 103 is designed between the display traces 102 and the touch traces 101 .
  • the number of corresponding signal shielding lines 103 increases, resulting in an increase in the number of pads (Pads) connected to the touch integrated circuit 104, resulting in an increase in the cost of the display panel 100 and poor manufacturing process. rate decreased.
  • the embodiment of the present application provides a display panel for reducing the manufacturing cost of the display panel and improving the process yield.
  • FIG. 2 is a schematic plan view of a display panel provided by an embodiment of the present application.
  • the embodiment of the present application provides a display panel 200, the display panel 200 has a display area AA and a non-display area NA, and the non-display area NA includes a bending sub-area BA.
  • the display panel 200 includes a plurality of touch signal lines 201 , a plurality of display signal lines 202 , a plurality of first-type signal shielding lines 203 a and a plurality of first power supply lines 204 .
  • the touch signal line 201 is located in the display area AA and the non-display area NA.
  • the display signal lines 202 are located in the display area AA and the non-display area NA.
  • the first type of signal shielding line 203 a is disposed in the non-display area NA, and the first type of signal shielding line 203 a is located between the touch signal line 201 and the display signal line 202 .
  • the first power supply wiring 204 is located in the display area AA and the non-display area NA, and the first power supply wiring 204 is connected to a fixed voltage signal, wherein the first type of signal shielding line 203a is connected to the first The power trace 204 is electrically connected.
  • the first type of signal shielding line 203a is connected to a fixed voltage signal, and the second type of signal shielding line
  • the first type of signal shielding line 203a is electrically connected to the first power supply line 204 on both sides of the bending sub-area BA, therefore, the first type of signal shielding line 203a and the first power supply line 204 have the same voltage signal, and no additional soldering is required.
  • the pad (Pad) connects the first signal shielding wire 203a to the control chip or the touch chip.
  • the first power supply wire 204 is connected to the DC signal source, the corresponding capacitance and voltage difference are constant, and the corresponding signal interference is constant. Therefore, signal interference can be removed by the chip, and valid signal data can be retained, thereby preventing signal crosstalk between the display signal line 202 and the touch signal line 201 .
  • non-display area NA in the embodiment of the present application may be located on at least one side of the display area AA. It should be understood that the non-display area NA in the embodiment of the present application is a routing area.
  • FIG. 3 is an enlarged view of the display panel provided in FIG. 2 in the area A1.
  • Fig. 4 is a cross-sectional view of Fig. 3 along the direction B-B'.
  • FIG. 5 is a schematic structural diagram of a display panel provided by an embodiment of the present application.
  • the non-display area NA includes the first power line sub-area VDD, the first power line 204 is located in the first power line sub-area VDD, and the touch control part corresponding to the first power line sub-area VDD
  • the signal lines 201 and the display signal lines 202 are arranged at intervals, and are arranged on the same layer as the display signal lines 202 and the touch signal lines 201 corresponding to the bending sub-area BA.
  • the first type signal shielding line 203a, the touch signal line 201 and at least a part of the display signal line 202 are arranged in the same layer.
  • a first-type signal shielding line 203 a is provided between the display signal line 202 and the touch signal line 201 to prevent signal crosstalk between the display signal line 202 and the touch signal line 201 .
  • at least part of the first-type signal shielding lines 203a, touch signal lines 201 and display signal lines 202 are arranged on the same layer, which simplifies the manufacturing process of the first-type signal shielding lines 203a, touch signal lines 201 and display signal lines 202. .
  • the display panel 200 includes a substrate 10, an active layer 11, a first gate insulating layer 12a, a first gate 13a, a second gate insulating layer 12b, a second gate 13b, an interlayer dielectric layer 14, a first A source-drain metal layer 15, a first planarization layer 16a, a second source-drain metal layer 17, and a second planarization layer 16b.
  • the interlayer dielectric layer 14 has a through hole H, and the through hole H at least penetrates the interlayer dielectric layer 14, the second gate insulating layer 12b and the first gate insulating layer 12a, and the signal line 202 covers the sidewall of the through hole H. at least partly.
  • the first source-drain metal layer 15 is disposed on the interlayer dielectric layer 14 , and the first source-drain metal layer 15 includes a source 15 a, a drain 15 b, and a first portion 204 a of the first power line 204 .
  • the first planarization layer 16 a covers the first source-drain metal layer 15 and fills the via hole H .
  • the second source-drain metal layer 17 is located on the second planarization layer 16b, and the second source-drain metal layer 17 includes the connection electrode 17a, the second part 204b of the first power line 204, and the third part of the first power line 204 204c, wherein the first portion 204a of the first power supply trace 204 is connected to the second portion 204b of the first power supply trace 204 through a first via h.
  • the second planarization layer 16b is disposed on the first planarization layer 16a, and the second planarization layer 16b covers the second source-drain metal layer.
  • the first part 204a of the first power trace 204 and the second part 204b of the first power trace 204 are connected through the first via hole h1. Since the first power trace 204 is a signal source on the entire surface, Therefore, the first power supply line 204 is arranged in layers to reduce the load (Loading). In addition, the layered arrangement of the first power line 204 and the display signal line 202 simplifies the arrangement of the data signal lines, and also reduces the frame of the display panel 200 , realizing a narrow frame design.
  • the substrate 10 includes a first flexible layer 10 a , a first barrier layer 10 b , a second flexible layer 10 c , a second barrier layer 10 d and a buffer layer 10 e which are sequentially stacked.
  • the first barrier layer 10b is used to prevent water and oxygen from penetrating through one side of the first flexible layer 10a to the structure above the first barrier layer 10b, so as to prevent damage to the display panel 200 .
  • the materials of the first barrier layer 10b, the second barrier layer 10d and the buffer layer 10e include but are not limited to silicon-containing oxide, nitride or oxynitride.
  • the material of the first barrier layer 10b is at least one of SiOx , SiNx or SiOxNy .
  • the material of the first flexible layer 10a can be the same as that of the second flexible layer 10c, which can include PI (polyimide), PET (polyethylene dicarboxylate), PEN (polyethylene naphthalate) ), PC (polycarbonate), PES (polyethersulfone), PAR (aromatic fluorotoluene containing polyarylate), or PCO (polycyclic olefin).
  • the buffer layer 10e may be a silicon nitride layer and a silicon oxide layer stacked in layers, wherein the silicon nitride layer is used to block the intrusion of water and oxygen from one side of the second flexible layer 10c, so that the film layer above the display panel 200 To cause damage, a layer of silicon oxide is used to insulate the thin-film transistors above.
  • the material of the active layer 11 may be one of InGaZnO, IZnT or InGaZnO or any combination thereof. Alternatively, the material of the active layer 11 may also be LTPO (Low Temperature Polycrystalline Oxide, low temperature polycrystalline oxide).
  • LTPO Low Temperature Polycrystalline Oxide, low temperature polycrystalline oxide
  • the materials of the first gate 13a, the second gate 13b, the first source-drain metal layer 15 and the second source-drain metal layer 17 include silver (Ag), magnesium (Mg), aluminum (Al), tungsten (W) , copper (Cu), nickel (Ni), chromium (Cr), molybdenum (Mo), titanium (Ti), platinum (Pt), tantalum (Ta), neodymium (Nd) or scandium (Sc) metals, their One or any combination of alloys, their nitrides, etc.
  • the material of the first gate insulating layer 12 a , the second gate insulating layer 12 b and the interlayer dielectric layer 14 includes one of silicon oxide, silicon nitride or silicon oxynitride or any combination thereof.
  • the material of the first planarization layer 16a and the second planarization layer 16b may be selected from silicon dioxide, nitrogen dioxide, silicon oxynitride and stacks thereof, or organic materials such as acrylic resin.
  • the via hole H penetrates the interlayer dielectric layer 14, the second gate insulating layer 12b, the first gate insulating layer 12a, the buffer layer 10e, and the second flexible layer 10c, and the display signal line 202 covers the via hole H. part of the sidewall and bottom of the via H.
  • the first type signal shielding line 203 a is located between the display signal line 202 and the touch signal line 201 , and is used to reduce the risk of crosstalk between the signals of the display signal line 202 and the touch signal line 201 .
  • the first type of signal shielding line 203a, the display signal line 202 and the touch signal line 201 can be formed through the same yellow light process, thereby simplifying the fabrication of the first type of signal shielding line 203a, the display signal line 202 and Steps of touching the signal line 201 .
  • the first type of signal shielding wire 203a is electrically connected to the first type of signal shielding wire 203a through the second via hole h2 with the first power supply wire 204 .
  • the second via hole h2 runs through the first planarization layer 16a, and the first type of signal shielding line 203a is electrically connected to the first power supply line 204 on the first source-drain metal layer 15 through the second via hole h2.
  • the first power line 204 and the source and drain layers are arranged in the same layer.
  • the source and drain of the display panel 200 are designed as double-layer source and drain, that is, when the display panel 200 includes a first source and drain metal layer and a second source and drain metal layer, the first power supply line 204 and the second The source-drain metal layer is arranged on the same layer, and is arranged on the same layer as the first source-drain metal layer or the first source-drain metal layer and the second source-drain metal layer in other regions.
  • the thin film transistor in the embodiment of the present application may be a bottom-gate thin film transistor, may also be a top-gate thin film transistor, may be a single-gate thin film transistor, or may be a double-gate thin film transistor.
  • the embodiment of the present application is described by taking a double-gate thin film transistor as an example, but not limited thereto.
  • the non-display area NA also includes a second power line sub-area VSS.
  • the second power wiring sub-area VSS is located on at least one side of the first power wiring sub-area VDD, and a plurality of second power wiring sub-areas 206 are distributed in the second power wiring sub-area VSS.
  • the touch signal lines 201 include a first type touch signal line 201a and a second type touch signal line 201b.
  • the first type touch signal line 201 a is connected to the touch chip 205 through the upper part of the first power line sub-region VDD.
  • the second type of touch signal line 201b is connected to the touch chip 205 through the upper part of the second power line sub-region VSS.
  • the first power supply wiring may be a VDD wiring (high voltage power supply wiring).
  • the second power trace can be a VSS trace (low voltage power trace)
  • the display panel 200 further includes a touch chip 205 and a control chip 207.
  • the touch chip 205 is located on the side of the non-display area NA away from the display area AA.
  • the touch chip 205 is connected to the touch signal line 201.
  • the control chip 205 is used to provide touch signals for the touch signal lines 201 .
  • the control chip 207 is located on the side of the non-display area NA away from the display area AA.
  • the control chip 207 is connected to the display signal line 202 and the first power supply line 204.
  • the first type of signal shielding line 203a passes through the first power supply line 204 and the control chip.
  • the control chip 207 is electrically connected, and the control chip 207 is used to provide a display signal for the display signal line 202 and a fixed voltage signal for the first power supply line 204 . Since the first type of signal shielding line 203a is electrically connected to the control chip 207 through the first power supply line 204, the control chip 207 is used to provide display signals for the display signal line 202 and a fixed voltage signal for the first power supply line 204, therefore, There is no need to connect the first-type signal shielding wire 203 a to the touch chip 205 , reducing the number of pads connected to the touch chip 205 , thereby reducing the production cost of the display panel 200 and improving the process yield.
  • the touch chip 205 includes a first touch chip 205a and a second touch chip 205b, and the first touch chip 205a and the second touch chip 205b are located on both sides of the control chip 207, and are located
  • the first type touch signal line 201a and the second type touch signal line 201b on one side of the center line P of the display panel 200 are connected to the first touch chip 205a, and the first type touch signal lines located on the other side of the center line P of the display panel 200
  • the signal line 201a and the second type touch signal line 201b are connected to the second touch chip 205b.
  • the touch chip 205 is respectively arranged on both sides of the control chip 207, so that the touch signal lines on the side of the center line P of the display panel 200 are connected to the same touch chip 205.
  • the length of the wire avoids the risk of short circuit of the display panel 200 .
  • the display panel 200 includes at least one touch chip 205 .
  • the number of the touch chip 205 is 1, the wires located on the same side of the display panel 200 are arranged to the other side by crossover, and connected to the same touch chip 205 .
  • the embodiment of the present application is described by taking the display panel 200 including two touch chips as an example, but it is not limited thereto.
  • the number of touch chips 205 may be one of 3, 4, 5 or 6.
  • the display panel 200 further includes a second type of signal shielding line 203b, and the second type of signal shielding line 203b is located in the non-display area NA and arranged around the display area AA.
  • the first end of the second type signal shielding wire 203b is connected to the first touch chip 205a, and the second end of the second type signal shielding wire 203b is connected to the second touch chip 205b.
  • the second type of signal shielding lines 203b are arranged around the display area AA for shielding the signal interference between the touch signal lines 201 and the peripheral display signal lines.
  • the two ends of the second type signal shielding line 203b are respectively connected to the first touch chip 205a and the second touch chip 205b, which have the same signal as the touch chip 205, so the voltage difference between the two is zero, then the two The signal between the two will not interfere.
  • the second-type signal shielding wire 203b can also be connected to the ground wire, and the peripheral circuit signal will be consumed by connecting the second-type signal shielding wire 203b to the ground without affecting the circuit to be protected.
  • the display panel 200 further includes a plurality of touch units 208 , the touch units 208 are disposed in the display area AA, and the end of the touch signal line 201 away from the touch chip 205 is connected to the touch units 208 .
  • the touch signal lines 201 are connected to the touch units 208 in a one-to-one correspondence.
  • the touch unit 208 in the embodiment of the present application may be a self-capacitive touch unit, or a mutual-capacitive touch unit.
  • the touch unit 208 leads out at least one touch signal line 201 , and the touch signal line 201 forms a touch wiring area.
  • the touch signal lines 201 in the touch wiring area are left-right symmetrical with respect to the central line P. As shown in FIG.
  • the touch wiring area corresponding to the touch sensing chain is set on the left side of the touch sensing chain.
  • the touch wiring area corresponding to the touch sensing chain is set on the right side of the touch sensing chain.
  • the touch routing area corresponding to the leftmost touch sensing chain of the central line P is set in the left frame area.
  • the touch wiring area corresponding to the touch sensor chain on the far right of the center line P is set in the right frame area.
  • the touch signal lines in the left frame area and the right frame area extend down to the lower frame area and gather in the lower frame area, and the gathered touch signal lines 201 are arranged in the second power line sub-area NA2 above.
  • the touch wiring area of the display area AA extends longitudinally to the lower frame area and gathers in the lower frame area to form a second wiring area, and the second wiring area is arranged above the first power wiring sub-area.
  • the touch wiring area corresponding to the touch sensing chain is arranged on the left side of the touch sensing chain.
  • the display area AA is located on the right side of the central line P, and the touch wiring area corresponding to the touch sensing chain is set on the right side of the touch sensing chain.
  • the touch signal wiring in the touch wiring area extends longitudinally to the lower frame area and gathers in the lower frame area to form a second wire passing area.
  • the first-type signal shielding lines 203 a are arranged parallel to the display signal lines 202 .
  • the risk of signal crosstalk between the display signal line 202 and the first type touch signal line 201a will be further reduced by the way that the first type signal shielding line 203a is arranged in parallel with the display signal line 202 .
  • the display panel 200 may be an organic light emitting diode display panel, a micro light emitting diode display panel or a miniature light emitting diode display panel, and this application does not limit the specific type of the display panel 200 .
  • FIG. 6 is a schematic plan view of an electronic device provided by an embodiment of the present application.
  • the embodiment of the present application also includes an electronic device, and the electronic device 1000 may be a display device such as a mobile phone, a tablet, a notebook computer, and a television.
  • the electronic device 1000 includes a housing 300 and a display panel disposed in the housing 300 .
  • the display panel may be the display panel 200 described in the above embodiments. For the specific structure of the display panel 200 , reference may be made to the descriptions of the foregoing embodiments, which will not be repeated here.
  • Embodiments of the present application provide a display panel and an electronic device.
  • the display panel includes a plurality of touch signal lines, a plurality of display signal lines, a plurality of first-type signal shielding lines, and a plurality of first power supply lines.
  • the touch signal lines are located in the display area and the non-display area.
  • the display signal line is located in the display area and the non-display area.
  • the first type of signal shielding line is disposed in the non-display area, and the first type of signal shielding line is located between the touch signal line and the display signal line.
  • the first power line is located in the display area and the non-display area, and the first power line is connected to a fixed voltage signal, wherein the first type of signal shielding line is electrically connected to the first power line on both sides of the bending sub-area.
  • the first type of signal shielding line is electrically connected to the first power line on both sides of the bending sub-area.
  • the first type of signal shielding line is connected to a fixed voltage signal, and the first type of signal shielding
  • the wires are electrically connected to the first power traces on both sides of the bent sub-area. Therefore, the first type of signal shielded wires and the first power traces have the same voltage signal, and there is no need to add pads (Pad) to shield the first signal.
  • the line is connected to the control chip or the touch chip. Further, since the first power supply line is connected to the DC signal source, the corresponding capacitance and voltage difference are constant, and the corresponding signal interference is constant. Therefore, the signal can be removed by the chip. Interference, retain valid signal data, thereby preventing signal crosstalk between display signal lines and touch signal lines. In addition, the number of pads connected to the touch control chip is reduced, thereby reducing the production cost of the display panel and improving the yield rate of the manufacturing process.

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Abstract

本申请公开了一种显示面板及电子设备，显示面板包括多条触控信号线、多条显示信号线、多条第一类信号屏蔽线和多条第一电源走线，第一类信号屏蔽线设置于非显示区，且第一类信号屏蔽线位于触控信号线与显示信号线之间，第一电源走线接入固定电压信号，第一类信号屏蔽线在弯折子区的两侧分别与第一电源走线电连接。

Description

显示面板及电子设备 技术领域
本申请涉及显示技术领域，尤其涉及一种显示面板及电子设备。
 背景技术
目前，显示面板主要包括液晶显示器、等离子体显示面板、有机电致发光、有源矩阵有机电致发光，显示面板在车载、手机、平板、电脑及电视产品上具有广阔的应用空间。一般说来，触控功能已成为多数显示面板的标配之一，其中电容式触控屏应用较为广泛，基本原理是使用手指或触控笔等工具与触控屏产生电容，并利用触控前后电容变化所形成的电信号来确认面板是否被触摸及确认触摸坐标。
电容式触控面板的一种重要触控技术是自容式，常见的触控结构的触控走线在下***区汇合。在弯折区，触控走线和显示走线为同层金属设计，为减少信号干扰，会在显示走线和触控走线之间设计信号屏蔽线。但是，随着显示和触控分段越多，对应需求信号屏蔽线数量增加，导致连接至触控芯片的焊盘（Pad）数量增加，导致显示面板的成本增加以及制程工艺良率降低。
故，有必要提出一种新的技术方案，以解决上述技术问题。
 技术问题
本申请实施例提供一种显示面板及电子设备，用于降低显示面板的生产成本。
 技术解决方案
本申请实施例提供一种显示面板，具有显示区和非显示区，所述非显示区包括弯折子区，所述显示面板包括：
多条触控信号线，所述触控信号线位于所述显示区和所述非显示区；
多条显示信号线，所述显示信号线位于所述显示区和所述非显示区；
多条第一类信号屏蔽线，所述第一类信号屏蔽线设置于所述非显示区，且所述第一类信号屏蔽线位于所述触控信号线与所述显示信号线之间；
多条第一电源走线，所述第一电源走线位于所述显示区和所述非显示区并接入固定电压信号；
其中，所述第一类信号屏蔽线在所述弯折子区的两侧分别与所述第一电源走线电连接。
在本申请实施例提供的显示面板中，所述非显示区包括第一电源走线子区，所述第一电源走线位于所述第一电源走线子区，与所述第一电源走线子区对应部分的所述触控信号线与所述显示信号线间隔设置，与所述弯折子区对应部分的所述显示信号线和所述触控信号线同层设置。
在本申请实施例提供的显示面板中，所述第一类信号屏蔽线、所述触控信号线与所述显示信号线的至少一部分同层设置。
在本申请实施例提供的显示面板中，所述显示面板包括：
衬底；
依次层叠设置的有源层、第一栅绝缘层、第一栅极、第二栅绝缘层、第二栅极和层间介质层，所述层间介质层具有通孔，所述通孔至少贯穿所述层间介质层、所述第二栅绝缘层和所述第一栅绝缘层，且所述显示信号线覆盖所述通孔的侧壁的至少一部分；
第一源漏金属层，所述第一源漏金属层设置在所述层间介质层上，所述第一源漏金属层包括源极、漏极、所述第一电源走线的第一部分；
第一平坦化层，所述第一平坦化层覆盖所述第一源漏金属层及填充所述通孔；
第二源漏金属层，所述第二源漏金属层位于所述第一平坦化层上，所述第二源漏金属层包括连接电极、所述第一电源走线的第二部分、所述第一电源走线的第三部分，其中，所述第一电源走线的第一部分和所述第一电源走线的第二部分通过第一过孔连接；
第二平坦化层，所述第二平坦化层设置在所述第一平坦化层上。
在本申请实施例提供的显示面板中，所述第一类信号屏蔽线通过第二过孔与所述第一电源走线电连接。
在本申请实施例提供的显示面板中，所述显示面板还包括：
触控芯片，所述触控芯片位于所述非显示区远离所述显示区的一侧，所述触控芯片接入所述触控信号线，所述触控芯片用于为所述触控信号线提供触控信号；
控制芯片，所述控制芯片位于所述非显示区远离所述显示区的一侧，所述控制芯片接入所述显示信号线和所述第一电源走线，所述第一类信号屏蔽线通过所述第一电源走线与所述控制芯片电连接，所述控制芯片用于为所述显示信号线提供显示信号以及为所述第一电源走线提供所述固定电压信号。
在本申请实施例提供的显示面板中，所述非显示区包括：
第二电源走线子区，所述第二电源走线子区位于所述第一电源走线子区的至少一侧，所述第二电源走线子区分布有多条第二电源走线。
在本申请实施例提供的显示面板中，所述触控信号线包括第一类触控信号线和第二类触控信号线，所述第一类触控信号线通过所述第一电源走线子区的上方连接至所述触控芯片，所述第二类触控信号线通过所述第二电源走线子区的上方连接至所述触控芯片。
在本申请实施例提供的显示面板中，所述触控芯片包括第一触控芯片和第二触控芯片，所述第一触控芯片和所述第二触控芯片位于所述控制芯片的两侧，位于所述显示面板的中心线一侧的所述第一类触控信号线和所述第二类触控信号线接入所述第一触控芯片，位于所述显示面板的中心线另一侧的所述第一类触控信号线和所述第二类触控信号线接入所述第二触控芯片。
在本申请实施例提供的显示面板中，所述显示面板还包括：
第二类信号屏蔽线，所述第二类信号屏蔽线位于所述非显示区，并围绕所述显示区设置，所述第二类信号屏蔽线的第一端连接所述第一触控芯片，所述第二类信号屏蔽线的第二端连接所述第二触控芯片。
在本申请实施例提供的显示面板中，所述显示面板还包括：
多个触控单元，所述触控单元设置在所述显示区，且所述触控信号线远离所述触控芯片的一端与所述触控单元连接，所述触控信号线与所述触控单元一一对应连接。
在本申请实施例提供的显示面板中，所述第一类信号屏蔽线与所述显示信号线平行设置。
本申请实施例还提供一种电子设备，所述电子设备显示面板和壳体，所述显示面板设置在所述壳体中，所述显示面板包括：
多条触控信号线，所述触控信号线位于所述显示区和所述非显示区；
多条显示信号线，所述显示信号线位于所述显示区和所述非显示区；
多条第一类信号屏蔽线，所述第一类信号屏蔽线设置于所述非显示区，且所述第一类信号屏蔽线位于所述触控信号线与所述显示信号线之间；
多条第一电源走线，所述第一电源走线位于所述显示区和所述非显示区并接入固定电压信号；
其中，所述第一类信号屏蔽线在所述弯折子区的两侧分别与所述第一电源走线电连接。
在本申请实施例提供的电子设备中，所述非显示区包括第一电源走线子区，所述第一电源走线位于所述第一电源走线子区，与所述第一电源走线子区对应部分的所述触控信号线与所述显示信号线间隔设置，与所述弯折子区对应部分的所述显示信号线和所述触控信号线同层设置。
在本申请实施例提供的电子设备中，所述第一类信号屏蔽线、所述触控信号线与所述显示信号线的至少一部分同层设置。
在本申请实施例提供的电子设备中，所述显示面板包括：
衬底；
依次层叠设置的有源层、第一栅绝缘层、第一栅极、第二栅绝缘层、第二栅极和层间介质层，所述层间介质层具有通孔，所述通孔至少贯穿所述层间介质层、所述第二栅绝缘层和所述第一栅绝缘层，且所述显示信号线覆盖所述通孔的侧壁的至少一部分；
第一源漏金属层，所述第一源漏金属层设置在所述层间介质层上，所述第一源漏金属层包括源极、漏极、所述第一电源走线的第一部分；
第一平坦化层，所述第一平坦化层覆盖所述第一源漏金属层及填充所述通孔；
第二源漏金属层，所述第二源漏金属层位于所述第一平坦化层上，所述第二源漏金属层包括连接电极、所述第一电源走线的第二部分、所述第一电源走线的第三部分，其中，所述第一电源走线的第一部分和所述第一电源走线的第二部分通过第一过孔连接；
第二平坦化层，所述第二平坦化层设置在所述第一平坦化层上。
在本申请实施例提供的电子设备中，所述第一类信号屏蔽线通过第二过孔与所述第一电源走线电连接。
在本申请实施例提供的电子设备中，所述显示面板还包括：
触控芯片，所述触控芯片位于所述非显示区远离所述显示区的一侧，所述触控芯片接入所述触控信号线，所述触控芯片用于为所述触控信号线提供触控信号；
控制芯片，所述控制芯片位于所述非显示区远离所述显示区的一侧，所述控制芯片接入所述显示信号线和所述第一电源走线，所述第一类信号屏蔽线通过所述第一电源走线与所述控制芯片电连接，所述控制芯片用于为所述显示信号线提供显示信号以及为所述第一电源走线提供所述固定电压信号。
在本申请实施例提供的电子设备中，所述非显示区包括：
第二电源走线子区，所述第二电源走线子区位于所述第一电源走线子区的至少一侧，所述第二电源走线子区分布有多条第二电源走线。
在本申请实施例提供的电子设备中，所述触控信号线包括第一类触控信号线和第二类触控信号线，所述第一类触控信号线通过所述第一电源走线子区的上方连接至所述触控芯片，所述第二类触控信号线通过所述第二电源走线子区的上方连接至所述触控芯片。
为让本申请的上述内容能更明显易懂，下文特举优选实施例，并配合所附图式，作详细说明如下。
 有益效果
本申请实施例提供一种显示面板及电子设备，显示面板包括多条触控信号线、多条显示信号线、多条第一类信号屏蔽线和多条第一电源走线。具体的，触控信号线位于显示区和非显示区。显示信号线位于显示区和非显示区。第一类信号屏蔽线设置于非显示区，且第一类信号屏蔽线位于触控信号线与显示信号线之间。第一电源走线位于显示区和非显示区，且第一电源走线接入固定电压信号，其中，第一类信号屏蔽线在弯折子区的两侧分别与第一电源走线电连接。在本申请实施例提供的显示面板中，通过在触控信号线和显示信号线202之间设置第一类信号屏蔽线，第一类信号屏蔽线接入固定电压信号，且第一类信号屏蔽线在弯折子区的两侧分别和第一电源走线电连接，因此，第一类信号屏蔽线和第一电源走线具有相同的电压信号，无需外加焊盘（Pad）将第一信号屏蔽线接入控制芯片或触控芯片内，进一步的，由于第一电源走线接入直流信号源，因此，对应的电容和电压差恒定，则对应的信号干扰恒定，因此，可以通过芯片去除信号干扰，保留有效的信号数据，从而防止显示信号线和触控信号线之间发生信号串扰。另外，减少了接入触控芯片的焊盘的数量，从而降低了显示面板的生产成本以及提高了制程工艺良率。
 附图说明
图1为现有技术的显示面板的平面结构示意图；
图2为本申请实施例提供显示面板的平面结构示意图；
图3为图2的局部放大图；
图4为图3沿B-B’方向的剖面图；
图5为本申请实施例提供的显示面板的结构示意图；
图6为本申请实施例电子设备的平面结构示意图。
 本发明的实施方式
为了使本申请的目的、技术方案和优点更加清楚，下面将结合附图对本申请作进一步地详细描述，请参照附图中的图式，其中相同的组件符号代表相同的组件，以下的说明是基于所示的本申请具体实施例，其不应被视为限制本申请未在此详述的其他具体实施例。本说明书所使用的词语“实施例”意指实例、示例或例证。
在本申请的描述中，需要说明的是，除非另有明确的规定和限定，术语“安装”、“相连”、“连接”应做广义理解，例如，可以是固定连接，也可以是可拆卸连接，或一体地连接；可以是机械连接，也可以是电连接；可以是直接相连，也可以通过中间媒介间接相连，可以是两个元件内部的连通。对于本领域的普通技术人员而言，可以具体情况理解上述术语在本申请中的具体含义。
请参阅图1，图1为现有技术中显示面板的平面结构示意图。一般说来，触控功能已成为多数显示面板的标配之一，其中电容式触控屏应用较为广泛，基本原理是使用手指或触控笔等工具与触控屏产生电容，并利用触控前后电容变化所形成的电信号来确认面板是否被触摸及确认触摸坐标。电容式触控面板的一种重要触控技术是自容式，如图1所示，显示面板100常见的触控结构的触控走线101在下***区100a汇合。在***区100a，触控走线101和显示走线102为同层金属设计，为减少信号干扰，会在显示走线102和触控走线101之间设计信号屏蔽线103。但是，随着显示和触控分段越多，对应需求信号屏蔽线103数量增加，导致连接至触控集成电路104的焊盘（Pad）数量增加，导致显示面板100的成本增加以及制程工艺良率降低。
针对现有的显示面板100的成本高以及制程工艺良率低的问题，本申请实施例提供一种显示面板，用于降低显示面板的制作成本以及提高制程工艺良率。
请参阅图2，图2为本申请实施例提供的显示面板的平面结构示意图。本申请实施例提供一种显示面板200，显示面板200具有显示区AA和非显示区NA，非显示区NA包括弯折子区BA。显示面板200包括多条触控信号线201、多条显示信号线202、多条第一类信号屏蔽线203a和多条第一电源走线204。具体的，触控信号线201位于显示区AA和非显示区NA。显示信号线202位于显示区AA和非显示区NA。第一类信号屏蔽线203a设置于非显示区NA，且第一类信号屏蔽线203a位于触控信号线201与显示信号线202之间。第一电源走线204位于显示区AA和非显示区NA，且第一电源走线204接入固定电压信号，其中，第一类信号屏蔽线203a在弯折子区BA的两侧分别与第一电源走线204电连接。
在本申请实施例提供的显示面板200中，通过在触控信号线201和显示信号线202之间设置第一类信号屏蔽线203a，第一类信号屏蔽线203a接入固定电压信号，且第一类信号屏蔽线203a在弯折子区BA的两侧分别和第一电源走线204电连接，因此，第一类信号屏蔽线203a和第一电源走线204具有相同的电压信号，无需外加焊盘（Pad）将第一信号屏蔽线203a接入控制芯片或触控芯片内，由于第一电源走线204接入直流信号源，因此，对应的电容和电压差恒定，则对应的信号干扰恒定，因此，可以通过芯片去除信号干扰，保留有效的信号数据，从而防止显示信号线202和触控信号线201之间发生信号串扰。另外，无需将第一类信号屏蔽线203a接入触控芯片，减少了接入触控芯片的焊盘的数量，从而降低了显示面板的生产成本以及提高了制程工艺良率。
需要说明的是，本申请实施例中的非显示区NA可以位于显示区AA的至少一侧。应该理解的是，本申请实施例中的非显示区NA为走线区。
请结合图2、图3、图4和图5，图3为图2提供的显示面板在A1区域的放大图。图4为图3沿B-B’方向的剖面图。图5为本申请实施例提供的显示面板的结构示意图。在一些实施例中，非显示区NA包括第一电源走线子区VDD，第一电源走线204位于第一电源走线子区VDD，与第一电源走线子区VDD对应部分的触控信号线201与显示信号线202间隔设置，与弯折子区BA对应部分的显示信号线202和触控信号线201同层设置。第一类信号屏蔽线203a、触控信号线201与显示信号线202的至少一部分同层设置。由于与弯折子区BA对应部分的显示信号线202和触控信号线201同层设置，因此，相邻间的显示信号线202和触控信号线201容易发生信号串扰的问题，因此，本申请实施例在显示信号线202和触控信号线201之间设置第一类信号屏蔽线203a，用于防止显示信号线202和触控信号线201之间发生信号串扰的问题。另外，第一类信号屏蔽线203a、触控信号线201与显示信号线202的至少一部分同层设置，简化了制作第一类信号屏蔽线203a、触控信号线201与显示信号线202的制程。
显示面板200包括衬底10、依次层叠设置的有源层11、第一栅绝缘层12a、第一栅极13a、第二栅绝缘层12b、第二栅极13b和层间介质层14、第一源漏金属层15、第一平坦化层16a、第二源漏金属层17、第二平坦化层16b。其中，层间介质层14具有通孔H，通孔H至少贯穿层间介质层14、第二栅绝缘层12b和第一栅绝缘层12a，且显示信号线202覆盖通孔H的侧壁的至少一部分。第一源漏金属层15设置在层间介质层14上，第一源漏金属层15包括源极15a、漏极15b、第一电源走线204的第一部分204a。第一平坦化层16a覆盖第一源漏金属层15及填充通孔H。第二源漏金属层17位于第二平坦化层16b上，第二源漏金属层17包括连接电极17a、第一电源走线204的第二部分204b、第一电源走线204的第三部分204c，其中，第一电源走线204的第一部分204a和第一电源走线204的第二部分204b通过第一过孔h连接。第二平坦化层16b设置在第一平坦化层16a上，且第二平坦化层16b覆盖第二源漏金属层。
本申请实施例中将第一电源走线204的第一部分204a和第一电源走线204的第二部分204b通过第一过孔h1连接，由于第一电源走线204为整面一个信号源，因此，将第一电源走线204采用分层设置，减少负载（Loading）。另外，第一电源线204和显示信号线202的分层设置，简化了数据信号线的排布，同时也减小了显示面板200的边框，实现了窄边框的设计。
在一些实施例中，衬底10包括依次层叠设置的第一柔性层10a、第一阻挡层10b、第二柔性层10c、第二阻挡层10d和缓冲层10e。第一阻挡层10b用于防止水氧通过第一柔性层10a的一侧渗透至第一阻挡层10b上面的结构，防止损坏显示面板200。在一些实施例中，第一阻挡层10b、第二阻挡层10d和缓冲层10e的材质包括但不限于含硅的氧化物、氮化物或氮氧化物。例如，第一阻挡层10b的材质为SiO x、SiN x或SiO xN y中的至少一种。第一柔性层10a的材料可以和第二柔性层10c的材料相同，其可以包括PI（聚酰亚胺）、PET（聚二甲酸乙二醇酯）、PEN（聚萘二甲酸乙二醇脂）、PC（聚碳酸酯）、PES（聚醚砜）、PAR（含有聚芳酯的芳族氟甲苯）或PCO（多环烯烃）中的至少一种。缓冲层10e可以是叠层设置的氮化硅层和氧化硅层，其中，氮化硅层的用于阻挡水氧由第二柔性层10c的一侧入侵，从而对显示面板200上方的膜层造成损害，氧化硅层用于保温上方的薄膜晶体管。
有源层11的材质可以是铟镓锌氧化物、铟锌锡氧化物或铟镓锌锡氧化物中的一种或其任意组合。或者，有源层11的材质也可以是LTPO(Low Temperature Polycrystalline Oxide，低温多晶氧化物)。第一栅极13a、第二栅极13b、第一源漏金属层15和第二源漏金属层17的材质包括如银(Ag)、镁(Mg)、铝(Al)、钨(W)、铜(Cu)、镍(Ni)、铬(Cr)、钼(Mo)、钛(Ti)、铂(Pt)、钽(Ta)、钕(Nd)或钪(Sc)的金属、它们的合金、它们的氮化物等中的一种或其任意组合。第一栅绝缘层12a、第二栅绝缘层12b和层间介质层14的材质包括氧化硅、氮化硅或氮氧化硅中的一种或其任意组合。第一平坦化层16a和第二平坦化层16b的材料可以选自二氧化硅、二氧化氮、氮氧化硅及其叠层或者有机材料，例如丙烯酸树脂。
在一些实施例中，通孔H贯穿层间介质层14、第二栅绝缘层12b、第一栅绝缘层12a、缓冲层10e和第二柔性层10c，且显示信号线202覆盖通孔H的侧壁和通孔H的底部的一部分。
第一类信号屏蔽线203a位于显示信号线202和触控信号线201之间，用于降低显示信号线202以及触控信号线201的信号发生串扰的风险。在一些实施例中，第一类信号屏蔽线203a、显示信号线202以及触控信号线201可以通过同一道黄光制程形成，从而简化了制作第一类信号屏蔽线203a、显示信号线202以及触控信号线201的步骤。
进一步的，第一类信号屏蔽线203a与第一电源走线204通过第二过孔h2与第一类信号屏蔽线203a电连接。具体的，第二过孔h2贯穿第一平坦化层16a，第一类信号屏蔽线203a通过第二过孔h2与位于第一源漏金属层15上的第一电源走线204电连接。
需要说明的是，当显示面板200的源漏极设计为单层源漏极时，第一电源走线204与源漏极层同层设置。当显示面板200的源漏极设计为双层源漏极时，即显示面板200包括第一源漏金属层和第二源漏金属层时，第一电源走线204在弯折区与第二源漏金属层同层设置，而在其他区域与第一源漏金属层或第一源漏金属层和第二源漏金属层同层设置。
需要说明的是，本申请实施例的薄膜晶体管可以是底栅型薄膜晶体管，也可以是顶栅型薄膜晶体管，可以是单栅薄膜晶体管也可以是双栅薄膜晶体管。本申请实施例以双栅薄膜晶体管为例进行阐述，但不限于此。
进一步的，请继续参考图2，非显示区NA还包括第二电源走线子区VSS。第二电源走线子区VSS位于第一电源走线子区VDD的至少一侧，第二电源走线子区VSS分布有多条第二电源走线206。触控信号线201包括第一类触控信号线201a和第二类触控信号线201b。第一类触控信号线201a通过第一电源走线子区VDD的上方连接至触控芯片205。第二类触控信号线201b通过第二电源走线子区VSS的上方连接至触控芯片205。
需要说明的是，本申请实施例中第一电源走线可以是VDD走线（高电压电源走线）。第二电源走线可以是VSS走线（低电压电源走线）
在一些实施例中，显示面板200还包括触控芯片205和控制芯片207，触控芯片205位于非显示区NA远离显示区AA的一侧，触控芯片205接入触控信号线201，触控芯片205用于为触控信号线201提供触控信号。控制芯片207位于非显示区NA远离显示区AA的一侧，控制芯片207接入显示信号线202和第一电源走线204，第一类信号屏蔽线203a通过第一电源走线204与控制芯片207电连接，控制芯片207用于为显示信号线202提供显示信号以及为第一电源走线204提供固定电压信号。由于第一类信号屏蔽线203a通过第一电源走线204与控制芯片207电连接，控制芯片207用于为显示信号线202提供显示信号以及为第一电源走线204提供固定电压信号，因此，无需将第一类信号屏蔽线203a接入触控芯片205，减少了接入触控芯片205的焊盘的数量，从而降低了显示面板200的生产成本以及提高了制程工艺良率。
在一些实施例中，触控芯片205包括第一触控芯片205a和第二触控芯片205b，第一触控芯片205a和第二触控芯片205b位于控制芯片207的两侧，位于显示面板200的中心线P一侧的第一类触控信号线201a和第二类触控信号线201b接入第一触控芯片205a，位于显示面板200的中心线P另一侧的第一类触控信号线201a和第二类触控信号线201b接入第二触控芯片205b。本申请实施例将触控芯片205分别设置在控制芯片207的两侧，使得位于显示面板200的中心线P一侧的触控信号线接入同一触控芯片205，该设置方式缩短触控信号线的长度，避免了显示面板200短路的风险。
需要说明的是，在一些实施例中，显示面板200至少包括一个触控芯片205。当触控芯片205的数量为1时，位于显示面板200同一侧的走线通过跨线的方式排布至另一侧，并接入同一触控芯片205内。本申请实施例以显示面板200包括两个触控芯片为例进行阐述，但不限于此。
当显示面板200为大屏显示面板时，触控芯片205的数量可以是3个、4个、5个或6个中的一者。
应该理解的是，本申请实施例中的中心线P是为了方便阐述而人为划分的。
在一些实施例中，显示面板200还包括第二类信号屏蔽线203b，第二类信号屏蔽线203b位于非显示区NA，并围绕显示区AA设置。第二类信号屏蔽线203b的第一端连接第一触控芯片205a，第二类信号屏蔽线203b的第二端连接第二触控芯片205b。第二类信号屏蔽线203b围绕于显示区AA设置，用于屏蔽触控信号线201与***的显示信号线的信号干扰。第二类信号屏蔽线203b的两端分别接入第一触控芯片205a和第二触控芯片205b，其与触控芯片205具有相同的信号，所以两者间的电压差为零，则两者之间的信号不会产生干扰。
在一些实施例中，第二类信号屏蔽线203b也可以与地线连接，***电路线信号会通过第二类信号屏蔽线203b连接地而被消耗，而不会影响待保护电路。
进一步的，显示面板200还包括多个触控单元208，触控单元208设置在显示区AA，且触控信号线201远离触控芯片205的一端与触控单元208连接。触控信号线201与触控单元208一一对应连接。本申请实施例的触控单元208可以是自容式触控单元，也可以是互容式触控单元。触控单元208至少引出一根触控信号线201，触控信号线201形成触控走线区。在显示区AA，触控走线区的触控信号线201关于中心线P左右对称。例如，在中心线P的左侧，触控感应链对应的触控走线区设置在触控感应链的左侧。在中心线P右侧，触控感应链对应的触控走线区设置在所述触控感应链的右侧。更详细地讲，中心线P最左侧的触控感应链对应的触控走线区设置在左边框区。中心线P最右侧的触控感应链对应的触控走线区设置在右边框区。左边框区以及所述右边框区的触控信号走线向下延伸至所述下边框区并在下边框区聚集，聚集后的触控信号走线201设置在第二电源走线子区NA2的上方。显示区AA的触控走线区纵向延伸至下边框区并在下边框区聚集形成第二过线区，第二过线区设于第一电源走线子区的上方。在显示区AA，位于中心线P的左侧，触控感应链对应的触控走线区设置在触控感应链的左侧。显示区AA，位于中心线P右侧，触控感应链对应的触控走线区设置在所述触控感应链的右侧。在显示区AA，触控走线区的触控信号走线纵向一直延伸至下边框区并在下边框区聚集形成第二过线区。
在一些实施例中，第一类信号屏蔽线203a与显示信号线202平行设置。通过第一类信号屏蔽线203a与显示信号线202平行设置的方式，将进一步降低显示信号线202和第一类触控信号线201a之间的信号串扰的风险。
需要说明的是，显示面板200可以为有机发光二极管显示面板、微型发光二极管显示面板或迷你型发光二极管显示面板，本申请对显示面板200的具体类型不作限定。
请参考图6，图6为本申请实施例提供的电子设备的平面结构示意图。本申请实施例还包括一种电子设备，电子设备1000可以为手机、平板、笔记本电脑以及电视等显示设备。电子设备1000包括壳体300和设置在壳体300中的显示面板。显示面板可以为上述实施例所述的显示面板200。显示面板200的具体结构可以参照前述实施例的描述，在此不再赘述。
本申请实施例提供一种显示面板及电子设备，显示面板包括多条触控信号线、多条显示信号线、多条第一类信号屏蔽线和多条第一电源走线。具体的，触控信号线位于显示区和非显示区。显示信号线位于显示区和非显示区。第一类信号屏蔽线设置于非显示区，且第一类信号屏蔽线位于触控信号线与显示信号线之间。第一电源走线位于显示区和非显示区，且第一电源走线接入固定电压信号，其中，第一类信号屏蔽线在弯折子区的两侧分别与第一电源走线电连接。在本申请实施例提供的显示面板中，通过在触控信号线和显示信号线202之间设置第一类信号屏蔽线，第一类信号屏蔽线接入固定电压信号，且第一类信号屏蔽线在弯折子区的两侧分别和第一电源走线电连接，因此，第一类信号屏蔽线和第一电源走线具有相同的电压信号，无需外加焊盘（Pad）将第一信号屏蔽线接入控制芯片或触控芯片内，进一步的，由于第一电源走线接入直流信号源，因此，对应的电容和电压差恒定，则对应的信号干扰恒定，因此，可以通过芯片去除信号干扰，保留有效的信号数据，从而防止显示信号线和触控信号线之间发生信号串扰。另外，减少了接入触控芯片的焊盘的数量，从而降低了显示面板的生产成本以及提高了制程工艺良率。
综上所述，虽然本申请已以优选实施例揭露如上，但上述优选实施例并非用以限制本申请，本领域的普通技术人员，在不脱离本申请的精神和范围内，均可作各种更动与润饰，因此本申请的保护范围以权利要求界定的范围为准。

Claims (20)

  1. 一种显示面板，具有显示区和非显示区，所述非显示区包括弯折子区，其中，所述显示面板包括：
    多条触控信号线，所述触控信号线位于所述显示区和所述非显示区；
    多条显示信号线，所述显示信号线位于所述显示区和所述非显示区；
    多条第一类信号屏蔽线，所述第一类信号屏蔽线设置于所述非显示区，且所述第一类信号屏蔽线位于所述触控信号线与所述显示信号线之间；
    多条第一电源走线，所述第一电源走线位于所述显示区和所述非显示区并接入固定电压信号；
    其中，所述第一类信号屏蔽线在所述弯折子区的两侧分别与所述第一电源走线电连接。
  2. 根据权利要求1所述的显示面板，其中，所述非显示区包括第一电源走线子区，所述第一电源走线位于所述第一电源走线子区，与所述第一电源走线子区对应部分的所述触控信号线与所述显示信号线间隔设置，与所述弯折子区对应部分的所述显示信号线和所述触控信号线同层设置。
  3. 根据权利要求2所述的显示面板，其中，所述第一类信号屏蔽线、所述触控信号线与所述显示信号线的至少一部分同层设置。
  4. 根据权利要求3所述的显示面板，其中，所述显示面板包括：
    衬底；
    依次层叠设置的有源层、第一栅绝缘层、第一栅极、第二栅绝缘层、第二栅极和层间介质层，所述层间介质层具有通孔，所述通孔至少贯穿所述层间介质层、所述第二栅绝缘层和所述第一栅绝缘层，且所述显示信号线覆盖所述通孔的侧壁的至少一部分；
    第一源漏金属层，所述第一源漏金属层设置在所述层间介质层上，所述第一源漏金属层包括源极、漏极、所述第一电源走线的第一部分；
    第一平坦化层，所述第一平坦化层覆盖所述第一源漏金属层及填充所述通孔；
    第二源漏金属层，所述第二源漏金属层位于所述第一平坦化层上，所述第二源漏金属层包括连接电极、所述第一电源走线的第二部分、所述第一电源走线的第三部分，其中，所述第一电源走线的第一部分和所述第一电源走线的第二部分通过第一过孔连接；
    第二平坦化层，所述第二平坦化层设置在所述第一平坦化层上。
  5. 根据权利要求4所述的显示面板，其中，所述第一类信号屏蔽线通过第二过孔与所述第一电源走线电连接。
  6. 根据权利要求1所述的显示面板，其中，所述显示面板还包括：
    触控芯片，所述触控芯片位于所述非显示区远离所述显示区的一侧，所述触控芯片接入所述触控信号线，所述触控芯片用于为所述触控信号线提供触控信号；
    控制芯片，所述控制芯片位于所述非显示区远离所述显示区的一侧，所述控制芯片接入所述显示信号线和所述第一电源走线，所述第一类信号屏蔽线通过所述第一电源走线与所述控制芯片电连接，所述控制芯片用于为所述显示信号线提供显示信号以及为所述第一电源走线提供所述固定电压信号。
  7. 根据权利要求6所述的显示面板，其中，所述非显示区包括：
    第二电源走线子区，所述第二电源走线子区位于所述第一电源走线子区的至少一侧，所述第二电源走线子区分布有多条第二电源走线。
  8. 根据权利要求7所述的显示面板，其中，所述触控信号线包括第一类触控信号线和第二类触控信号线，所述第一类触控信号线通过所述第一电源走线子区的上方连接至所述触控芯片，所述第二类触控信号线通过所述第二电源走线子区的上方连接至所述触控芯片。
  9. 根据权利要求8所述的显示面板，其中，所述触控芯片包括第一触控芯片和第二触控芯片，所述第一触控芯片和所述第二触控芯片位于所述控制芯片的两侧，位于所述显示面板的中心线一侧的所述第一类触控信号线和所述第二类触控信号线接入所述第一触控芯片，位于所述显示面板的中心线另一侧的所述第一类触控信号线和所述第二类触控信号线接入所述第二触控芯片。
  10. 根据权利要求9所述的显示面板，其中，所述显示面板还包括：
    第二类信号屏蔽线，所述第二类信号屏蔽线位于所述非显示区，并围绕所述显示区设置，所述第二类信号屏蔽线的第一端连接所述第一触控芯片，所述第二类信号屏蔽线的第二端连接所述第二触控芯片。
  11. 根据权利要求6所述的显示面板，其中，所述显示面板还包括：
    多个触控单元，所述触控单元设置在所述显示区，且所述触控信号线远离所述触控芯片的一端与所述触控单元连接，所述触控信号线与所述触控单元一一对应连接。
  12. 根据权利要求1所述的显示面板，其中，所述第一类信号屏蔽线与所述显示信号线平行设置。
  13. 一种电子设备，其中，所述电子设备显示面板和壳体，所述显示面板设置在所述壳体中，所述显示面板包括：
    多条触控信号线，所述触控信号线位于所述显示区和所述非显示区；
    多条显示信号线，所述显示信号线位于所述显示区和所述非显示区；
    多条第一类信号屏蔽线，所述第一类信号屏蔽线设置于所述非显示区，且所述第一类信号屏蔽线位于所述触控信号线与所述显示信号线之间；
    多条第一电源走线，所述第一电源走线位于所述显示区和所述非显示区并接入固定电压信号；
    其中，所述第一类信号屏蔽线在所述弯折子区的两侧分别与所述第一电源走线电连接。
  14. 根据权利要求13所述的电子设备，其中，所述非显示区包括第一电源走线子区，所述第一电源走线位于所述第一电源走线子区，与所述第一电源走线子区对应部分的所述触控信号线与所述显示信号线间隔设置，与所述弯折子区对应部分的所述显示信号线和所述触控信号线同层设置。
  15. 根据权利要求14所述的电子设备，其中，所述第一类信号屏蔽线、所述触控信号线与所述显示信号线的至少一部分同层设置。
  16. 根据权利要求15所述的电子设备，其中，所述显示面板包括：
    衬底；
    依次层叠设置的有源层、第一栅绝缘层、第一栅极、第二栅绝缘层、第二栅极和层间介质层，所述层间介质层具有通孔，所述通孔至少贯穿所述层间介质层、所述第二栅绝缘层和所述第一栅绝缘层，且所述显示信号线覆盖所述通孔的侧壁的至少一部分；
    第一源漏金属层，所述第一源漏金属层设置在所述层间介质层上，所述第一源漏金属层包括源极、漏极、所述第一电源走线的第一部分；
    第一平坦化层，所述第一平坦化层覆盖所述第一源漏金属层及填充所述通孔；
    第二源漏金属层，所述第二源漏金属层位于所述第一平坦化层上，所述第二源漏金属层包括连接电极、所述第一电源走线的第二部分、所述第一电源走线的第三部分，其中，所述第一电源走线的第一部分和所述第一电源走线的第二部分通过第一过孔连接；
    第二平坦化层，所述第二平坦化层设置在所述第一平坦化层上。
  17. 根据权利要求16所述的电子设备，其中，所述第一类信号屏蔽线通过第二过孔与所述第一电源走线电连接。
  18. 根据权利要求13所述的电子设备，其中，所述显示面板还包括：
    触控芯片，所述触控芯片位于所述非显示区远离所述显示区的一侧，所述触控芯片接入所述触控信号线，所述触控芯片用于为所述触控信号线提供触控信号；
    控制芯片，所述控制芯片位于所述非显示区远离所述显示区的一侧，所述控制芯片接入所述显示信号线和所述第一电源走线，所述第一类信号屏蔽线通过所述第一电源走线与所述控制芯片电连接，所述控制芯片用于为所述显示信号线提供显示信号以及为所述第一电源走线提供所述固定电压信号。
  19. 根据权利要求18所述的电子设备，其中，所述非显示区包括：
    第二电源走线子区，所述第二电源走线子区位于所述第一电源走线子区的至少一侧，所述第二电源走线子区分布有多条第二电源走线。
  20. 根据权利要求19所述的电子设备，其中，所述触控信号线包括第一类触控信号线和第二类触控信号线，所述第一类触控信号线通过所述第一电源走线子区的上方连接至所述触控芯片，所述第二类触控信号线通过所述第二电源走线子区的上方连接至所述触控芯片。
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