WO2023103520A1 - 显示面板的驱动方法及显示装置 - Google Patents
显示面板的驱动方法及显示装置 Download PDFInfo
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- WO2023103520A1 WO2023103520A1 PCT/CN2022/120041 CN2022120041W WO2023103520A1 WO 2023103520 A1 WO2023103520 A1 WO 2023103520A1 CN 2022120041 W CN2022120041 W CN 2022120041W WO 2023103520 A1 WO2023103520 A1 WO 2023103520A1
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
- G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
- G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
- G09G3/3611—Control of matrices with row and column drivers
- G09G3/3685—Details of drivers for data electrodes
Definitions
- the present disclosure relates to the field of display technology, and in particular, to a driving method of a display panel and a display device.
- a display such as a liquid crystal display (Liquid Crystal Display, LCD), generally includes a plurality of pixels.
- Each pixel may include: a red sub-pixel, a green sub-pixel and a blue sub-pixel.
- the display brightness of each sub-pixel is controlled, so as to display the color image by mixing the required displayed colors.
- the reference refresh frequency is not greater than the minimum value among multiple refresh frequencies of the display panel; and the target value is a positive integer;
- each of the sub-pixels is input with a corresponding polarity data voltage.
- the target value is determined according to the following formula
- k represents the target value
- f 0 represents the reference refresh frequency
- f s represents the current refresh frequency
- a b.
- after the acquisition of the display data corresponding to the current display frame and the current refresh rate, and before the determination of the target value, further includes:
- the determining the target value according to the ratio between the current refresh frequency and the reference refresh frequency specifically includes:
- the target value is determined according to a ratio between the current refresh frequency and a reference refresh frequency.
- the polarity corresponding to the data voltage input to the sub-pixels of the display panel is reversed once every display frame.
- the display panel adopts at least one of frame inversion, column inversion, row inversion and dot inversion.
- the timing controller is configured to obtain the display data corresponding to the current display frame and the current refresh rate, and determine the target value according to the ratio between the current refresh rate and the reference refresh rate; based on display frames passing the target value, control According to the rule that the polarity of the data voltage input to the sub-pixels of the display panel is reversed once, the polarity control signal is output, and the display data is output; wherein, the reference refresh frequency is not greater than that of the display panel.
- the minimum value among multiple refresh frequencies; and the target value is a positive integer;
- the source driving circuit is configured to receive the polarity control signal and the display data, and input a data voltage of a corresponding polarity to each of the sub-pixels according to the polarity control signal and the display data.
- the timing controller is further configured to:
- the target value is determined according to a ratio between the current refresh frequency and a reference refresh frequency.
- the timing controller is further configured to: when the current refresh frequency is different from the refresh frequency corresponding to the previous display frame, for the same sub-pixel, input the sub-pixel in the current display frame The polarity corresponding to the data voltage of the pixel is different from the polarity corresponding to the data voltage input to the sub-pixel in the last display frame.
- the timing controller is further configured to: when the current refresh frequency is different from the refresh frequency corresponding to the previous display frame, for the same sub-pixel, input the sub-pixel in the current display frame
- the polarity corresponding to the data voltage of the pixel is the same as the polarity corresponding to the data voltage input to the sub-pixel in the last display frame.
- FIG. 1 is a schematic structural diagram of a display device in an embodiment of the present disclosure
- FIG. 2 is a schematic structural diagram of a display panel in an embodiment of the present disclosure
- FIG. 3 is a schematic diagram of some changes when different display frames are switched at a lower refresh rate in an embodiment of the present disclosure
- FIG. 4 is a schematic diagram of other changes when different display frames are switched under a higher refresh rate in an embodiment of the present disclosure
- FIG. 5 is a flowchart of a method for driving a display panel in an embodiment of the present disclosure
- 6a is some schematic diagrams of the corresponding polarity of the data voltage input by the sub-pixel when the polarity is reversed when the display panel adopts the frame inversion mode in the embodiment of the present disclosure
- 6b is another schematic diagram of the corresponding polarity of the data voltage input by the sub-pixel when the polarity is reversed when the display panel adopts the frame inversion mode in the embodiment of the present disclosure
- Fig. 7a is some schematic diagrams of the corresponding polarity of the data voltage input by the sub-pixel when the polarity is reversed when the display panel adopts the column inversion mode in the embodiment of the present disclosure
- 7b is another schematic diagram of the corresponding polarity of the data voltage input by the sub-pixel when the polarity is reversed when the display panel adopts the column inversion mode in the embodiment of the present disclosure
- 8a is some schematic diagrams of the corresponding polarity of the data voltage input by the sub-pixel when the polarity is reversed when the display panel adopts the row inversion mode in the embodiment of the present disclosure
- 8b is another schematic diagram of the corresponding polarity of the data voltage input by the sub-pixel when the polarity is reversed when the display panel adopts the row inversion mode in the embodiment of the present disclosure
- FIG. 9a is some schematic diagrams of the corresponding polarity of the data voltage input by the sub-pixel when the polarity is reversed when the display panel adopts the dot inversion method in the embodiment of the present disclosure
- 9b is another schematic diagram of the corresponding polarity of the data voltage input by the sub-pixel when the polarity is reversed when the display panel adopts the dot inversion method in the embodiment of the present disclosure
- FIG. 10a is a timing diagram of some signals in an embodiment of the present disclosure.
- FIG. 10b is another timing diagram of signals in an embodiment of the present disclosure.
- Fig. 10c is a timing diagram of some other signals in the embodiment of the present disclosure.
- Fig. 10d is a timing diagram of some other signals in the embodiment of the present disclosure.
- Fig. 11a is a schematic diagram of some changes when different display frames are switched at 48 Hz in the embodiment of the present disclosure
- Fig. 11b is a schematic diagram of some changes when different display frames are switched at 96 Hz in the embodiment of the present disclosure
- Fig. 11c is a schematic diagram of some changes when different display frames are switched at 144 Hz in the embodiment of the present disclosure.
- the display device may include a display panel 100 and a timing controller 200 .
- the display panel 100 may include a plurality of pixel units arranged in an array, a plurality of gate lines GA (for example, GA1, GA2, GA3, GA4), a plurality of data lines DA (for example, DA1, DA2, DA3), gate
- the driving circuit 110 and the source driving circuit 120 are coupled to the gate lines GA1 , GA2 , GA3 , GA4 respectively, and the source driving circuit 120 is coupled to the data lines DA1 , DA2 , DA3 respectively.
- the timing controller 200 may input a control signal to the gate driving circuit 110 through a level shift (Level Shift) circuit, thereby driving the gate lines GA1, GA2, GA3, GA4.
- the timing controller 200 inputs signals to the source driving circuit 120 so that the source driving circuit 120 inputs data voltages to the data lines, thereby charging the sub-pixels SPX and causing the sub-pixels SPX to input corresponding data voltages to realize the screen display function.
- the number of source driving circuits 120 can be set to two, wherein one source driving circuit 120 is connected to half the number of data lines, and the other source driving circuit 120 is connected to the other half of the number of data lines.
- three, four, or more source driving circuits 120 can also be provided, which can be designed and determined according to the requirements of practical applications, and are not limited here.
- each pixel unit includes a plurality of sub-pixels SPX.
- a pixel unit may include red sub-pixels, green sub-pixels and blue sub-pixels, so that red, green and blue colors can be mixed to achieve color display.
- the pixel unit may also include red sub-pixels, green sub-pixels, blue sub-pixels and white sub-pixels, so that color mixing can be performed through red, green, blue and white to achieve color display.
- the luminous color of the sub-pixels in the pixel unit can be designed and determined according to the practical application environment, which is not limited here.
- each sub-pixel SPX includes a transistor 01 and a pixel electrode 02 .
- one row of sub-pixels SPX corresponds to one gate line
- one column of sub-pixels SPX corresponds to one data line.
- the gate of the transistor 01 is electrically connected to the corresponding gate line
- the source of the transistor 01 is electrically connected to the corresponding data line
- the drain of the transistor 01 is electrically connected to the pixel electrode 02.
- the pixel array structure of the present disclosure can also be It is a double-gate structure, that is, two gate lines are set between two adjacent rows of pixels. This arrangement can reduce half of the data lines, that is, there are data lines between two adjacent columns of pixels, and some adjacent two rows of pixels.
- the data lines are not included between the pixels in the columns, and the specific arrangement structure of the pixels and the data lines, and the arrangement of the scanning lines are not limited.
- the display panel in the embodiments of the present disclosure may be a liquid crystal display panel.
- a liquid crystal display panel generally includes an upper substrate and a lower substrate that are opposed to each other, and liquid crystal molecules encapsulated between the upper substrate and the lower substrate.
- the voltage difference can form an electric field, so that the liquid crystal molecules are under the action of the electric field to deflect.
- the liquid crystal molecules have different degrees of deflection due to electric fields of different intensities, resulting in different transmittances of the sub-pixels SPX, so that the sub-pixels SPX can achieve brightness of different gray scales, thereby realizing image display.
- the display panel in the embodiment of the present disclosure is a liquid crystal display panel
- the pixel unit includes a red sub-pixel SPX, a green sub-pixel SPX, and a blue sub-pixel SPX as an example for illustration, but readers should know that the liquid crystal display panel includes The color of the sub-pixel SPX is not limited to this.
- Grayscale generally divides the brightness change between the darkest and the brightest into several parts for easy screen brightness control.
- the displayed image consists of three colors of red, green, and blue, each of which can show different brightness levels, and the combination of red, green, and blue at different brightness levels can form different colors.
- the number of gray scale bits of the liquid crystal display panel is 6 bits
- the three colors of red, green and blue have 64 (ie 2 6 ) gray scales respectively, and the 64 gray scale values are 0-63 respectively.
- the number of gray scale digits of the liquid crystal display panel is 8 bits, and the three colors of red, green, and blue have 256 (ie, 2 8 ) gray scales respectively, and the 256 gray scale values are 0-255 respectively.
- the number of grayscale digits of the liquid crystal display panel is 10 bits, and the three colors of red, green, and blue have 1024 (ie, 2 10 ) grayscales respectively, and these 1024 grayscale values are 0-1023 respectively.
- the number of grayscale digits of the liquid crystal display panel is 12 bits, and the three colors of red, green, and blue have 4096 (ie, 2 12 ) grayscales respectively, and the 4096 grayscale values are 0-4093 respectively.
- FIG. 3 shows a schematic diagram of changes of Vda, VP, ⁇ V and LD corresponding to one sub-pixel SPX when different display frames are switched at a lower refresh rate.
- FIG. 4 is a schematic diagram showing changes of Vda, VP, ⁇ V and LD corresponding to one sub-pixel SPX when different display frames are switched at a higher refresh rate.
- Vda represents the data voltage loaded on the data line connected to the sub-pixel SPX in different display frames
- VP represents the actual charge of the pixel electrode of the sub-pixel SPX.
- ⁇ V represents the voltage difference between the data voltage actually charged in the pixel electrode of the sub-pixel SPX and the common electrode voltage
- represents the difference between the data voltage actually charged in the pixel electrode of the sub-pixel SPX and the common electrode voltage
- LD represents the brightness of the sub-pixel SPX
- Vcom represents the common electrode voltage
- the liquid crystal molecules at the sub-pixel SPX can be made to have a negative polarity, and then the polarity corresponding to the data voltage Vda2 in the sub-pixel SPX is negative.
- the common electrode voltage can be 8.3V. If a data voltage of 8.3V-16V is input into the pixel electrode of the sub-pixel SPX, the liquid crystal molecules at the sub-pixel SPX can be made positive, and the voltage of 8.3V-16V The data voltage is a data voltage corresponding to positive polarity.
- the liquid crystal molecules at the sub-pixel SPX can be negatively polarized, and the data voltage of 0.6V-8.3V is data corresponding to the negative polarity.
- Voltage Exemplarily, taking the 8-bit gray scale of 0-255 as an example, if a data voltage of 16V is input to the pixel electrode of the sub-pixel SPX, the sub-pixel SPX may correspond to the brightness of the maximum gray scale value of positive polarity. If a data voltage of 0.6V is input to the pixel electrode of the sub-pixel SPX, the sub-pixel SPX can correspond to the brightness of the maximum gray scale value of the negative polarity.
- the liquid crystal molecules have a viscous effect, in order to avoid the polarization of the liquid crystal molecules and afterimages caused by staying at the same polarity for a long time, it is possible to control the polarity of the data voltage input to the sub-pixel SPX relative to the common electrode voltage when the display frame is switched. to flip.
- the polarity corresponding to the data voltage will be reversed.
- the data voltage Vda1 input to the sub-pixel SPX in the display frame F1 corresponds to positive polarity
- the data voltage Vda2 input to the sub-pixel SPX in the display frame F2 corresponds to negative polarity.
- ⁇ V When the display frame F1 is switched to the display frame F2, ⁇ V will change from large ⁇ small ⁇ large. Generally, the larger ⁇ V is, the higher the brightness LD is. When the other display frames are switched, ⁇ V will also change from large ⁇ small ⁇ large. Therefore, when the display frame is switched, the brightness of the display panel will change from large ⁇ small ⁇ large.
- the refresh frequency of the display panel can be reduced, that is, a lower refresh frequency is used to drive the display panel to display images.
- the refresh rate of the display panel can be increased, that is, a higher refresh rate can be used to drive the display panel to display images, so as to make the images smoother. Therefore, in order to be suitable for different scenarios, the display panel can change the refresh rate, that is, the display panel can perform dynamic frame rate display.
- Ldam represents the maximum brightness of the sub-pixel SPX at different refresh frequencies.
- Lda1 represents the average brightness of the display panel at a lower refresh rate.
- Lda2 represents the average brightness of the display panel at a higher refresh rate.
- the higher the refresh rate the more times the brightness LD of the sub-pixel SPX changes from large ⁇ small ⁇ large, resulting in lower average brightness of the display panel, and Lda2 ⁇ Lda1 appears. Therefore, if the display panel displays the same picture, the brightness of the picture displayed at a lower refresh rate will be higher than the brightness of the picture displayed at a higher refresh rate.
- Embodiments of the present disclosure provide a driving method for a display panel.
- a driving method for a display panel By acquiring display data corresponding to a current display frame and a current refresh rate, and according to a ratio between the current refresh rate and a reference refresh rate, a target value can be determined.
- a target value can be determined.
- a data voltage of a corresponding polarity is input to each sub-pixel SPX according to the display data.
- the polarity inversion frequency corresponding to the data voltage input to the sub-pixel SPX at different refresh rates can be adjusted, thereby reducing the brightness difference of the display panel at different refresh rates, thereby improving the flickering problem generated during frequency conversion display.
- it can improve the problem of increased brightness of the display screen when the refresh rate of the display panel is switched from a higher refresh rate to a lower refresh rate, keep the brightness stable, and improve display quality and viewing experience.
- An embodiment of the present disclosure provides a method for driving a display panel, as shown in FIG. 5 , which may include the following steps:
- the acquired display data may include: a digital voltage form of a data voltage corresponding to each sub-pixel SPX one-to-one.
- the polarity corresponding to the data voltage input to the sub-pixel SPX of the display panel can be reversed every display frame, that is, once every display frame.
- the polarity corresponding to the data voltage input to the sub-pixel SPX of the display panel in the first display frame is positive
- the polarity corresponding to the data voltage input to the sub-pixel SPX of the display panel in the second display frame Negative polarity
- the polarity corresponding to the data voltage input to the sub-pixel SPX of the display panel in the third display frame is positive polarity
- the corresponding polarity of the data voltage input to the sub-pixel SPX of the display panel in the fourth display frame Polarity is negative.
- the polarity inversion when the display panel is driven at the reference refresh frequency can be used as a reference to determine the polarity inversion sequence when the display panel is driven at the current refresh frequency.
- the reference refresh rate may be the minimum value among multiple refresh rates of the display panel.
- the current refresh rate is any one of multiple refresh rates of the display panel.
- the range of the refresh rate of the display panel may be greater than or equal to 48 Hz, and the reference refresh rate may be 48 Hz.
- the refresh frequency of the display panel may include: 48Hz, 72Hz, 96Hz, 120Hz, 144Hz, 192Hz or higher, then the reference refresh frequency may be 48Hz, and the current refresh frequency may be 48Hz, 72Hz, 96Hz, 120Hz, 144Hz, 192Hz or one from higher school.
- the range of the refresh rate of the display panel may be greater than or equal to 30 Hz, and the reference refresh rate may be 30 Hz.
- the refresh frequency of the display panel may include: 30Hz, 45Hz, 60Hz, 75Hz, 90Hz, 105Hz, 120Hz, 135Hz, 150Hz, 170Hz, 240Hz or higher, then the reference refresh frequency may be 30Hz, and the current refresh frequency may be 0Hz , 45Hz, 60Hz, 75Hz, 90Hz, 105Hz, 120Hz, 135Hz, 150Hz, 170Hz, 240Hz or higher.
- the target value (for example, k represents the target value) is a positive integer, that is, k is an integer greater than 0.
- the polarity corresponding to the data voltage of the sub-pixel SPX charged is the same in k display frames, and at the k+1th display frame , the polarity corresponding to the data voltage charged by the sub-pixel SPX can be reversed, and in the k+1th display frame to the 2kth display frame, the polarity corresponding to the data voltage charged by the sub-pixel SPX is the same Yes, optionally, the polarity of the data voltage of the k-1 display frame is opposite to the polarity of the data voltage of the kth display frame.
- the polarity corresponding to the data voltage of the sub-pixel SPX charged may be positive in k display frames, and in the k+1th display frame to the 2kth display frame, the charged data voltage of the sub-pixel SPX
- the polarities corresponding to the data voltages may all be negative.
- the polarity corresponding to the data voltage of the sub-pixel SPX after charging can be negative in the display frames of the target value, and in the k+1th display frame to the 2kth display frame, the charged The polarities corresponding to the data voltages may all be positive.
- the polarity inversion frequency corresponding to the data voltage input to the sub-pixel SPX at different refresh rates can be adjusted, thereby reducing the brightness difference of the display panel at different refresh rates, thereby improving the flickering problem generated during frequency conversion display.
- it can improve the problem that the brightness of the display screen increases when the refresh rate of the display panel is switched from a higher refresh rate to a lower refresh rate, keep the brightness stable, and improve display quality and viewing experience.
- step S100 obtaining the display data and the current refresh rate corresponding to the current display frame
- step S200 determining the target value
- the refresh rate corresponding to the previous display frame can be obtained, and the previous refresh rate can be determined. Whether the refresh rate corresponding to the display frame is the same as the current refresh rate.
- the current refresh rate is the same as the refresh rate corresponding to the previous display frame, it means that the refresh rate of the display panel has not been switched, so that step S200 can be skipped, and the control input is directly based on the target value corresponding to the refresh rate corresponding to the previous display frame
- the polarity of the data voltage into the pixel electrode of the sub-pixel SPX is inverted.
- step S200 can be executed to determine the target value according to the ratio between the current refresh rate and the reference refresh rate. Then according to the determined target value, the polarity of the data voltage input to the pixel electrode of the sub-pixel SPX is controlled to be reversed.
- the timing controller 200 may acquire the display data corresponding to the current display frame and the current refresh frequency. And store the display data corresponding to the current display frame in the form of digital voltage. Afterwards, the refresh rate corresponding to the last display frame can be obtained. And judge whether the refresh rate corresponding to the last display frame is the same as the current refresh rate.
- the current refresh rate is the same as the refresh rate corresponding to the previous display frame, it means that the refresh rate of the display panel has not been switched, so that step S200 may not be performed, and the target value corresponding to the refresh rate corresponding to the previous display frame is directly based on the process
- the target value is a display frame, controls the rule of inverting the polarity corresponding to the data voltage input to the sub-pixel SPX of the display panel once, outputs the polarity control signal, and outputs the display data corresponding to the current display frame.
- the source drive circuit 120 may receive the polarity control signal output by the timing controller 200 determined based on the target value corresponding to the previous display frame and the display data corresponding to the current display frame, and convert the display data into an analog voltage through digital-to-analog conversion.
- the data voltage is formed, and the polarity of the data voltage is reversed according to the control signal to be provided to the data line, so that each sub-pixel SPX inputs the data voltage of the corresponding polarity.
- the timing controller 200 indicates that the refresh rate of the display panel has been switched, so that step S200 can be executed, so that according to the difference between the current refresh rate and the reference refresh rate
- the ratio determines the target value corresponding to the current display frame. Then according to the determined target value corresponding to the current display frame, based on the target value display frame, control the rule that the polarity corresponding to the data voltage input to the sub-pixel SPX of the display panel is flipped once, and output the corresponding current display frame. Polarity control signal, and output display data corresponding to the current frame.
- the source drive circuit 120 may receive the polarity control signal output by the timing controller 200 determined based on the target value corresponding to the current display frame and the display data corresponding to the current display frame, and convert the display data into an analog voltage to form The data voltage is controlled according to the polarity control signal to reverse the polarity of the data voltage to provide to the data line, so that each sub-pixel SPX inputs the data voltage of the corresponding polarity.
- the timing controller 200 inputs the data voltage of the sub-pixel SPX in the current display frame corresponding to the polarity and upper
- the data voltages corresponding to the input sub-pixel SPX of a display frame have different polarities.
- the data voltage input to the sub-pixel SPX in the last display frame corresponds to positive polarity
- the data voltage input to the sub-pixel SPX in the current display frame corresponds to negative polarity.
- the data voltage input to the sub-pixel SPX in the previous display frame corresponds to negative polarity
- the data voltage input to the sub-pixel SPX in the current display frame corresponds to positive polarity.
- the timing controller 200 may also input the polarity corresponding to the data voltage of the sub-pixel SPX in the current display frame for the same sub-pixel SPX when the current refresh frequency is different from the refresh frequency corresponding to the previous display frame.
- the polarity corresponding to the data voltage input to the sub-pixel SPX in the last display frame is the same.
- the data voltage input to the sub-pixel SPX in the previous display frame corresponds to positive polarity
- the data voltage input to the sub-pixel SPX in the current display frame corresponds to positive polarity
- the data voltage input to the sub-pixel SPX in the current display frame corresponds to positive polarity.
- the data voltage input to the sub-pixel SPX in the previous display frame corresponds to negative polarity
- the data voltage input to the sub-pixel SPX in the current display frame corresponds to negative polarity. This reduces power consumption.
- the display panel can use the frame flip method to improve the display effect of the liquid crystal molecules.
- the flip of the liquid crystal molecules is driven by an electric field to reverse the polarity.
- FIG. 6a and FIG. 6b schematically show the corresponding polarity of the data voltage input by the sub-pixel SPX when the polarity is reversed when the display panel adopts the frame inversion mode.
- Fig. 6a schematically shows the corresponding polarity of the data voltage input by each sub-pixel SPX in the display panel before inversion.
- FIG. 6b schematically shows the polarity corresponding to the data voltage input by each sub-pixel SPX in the display panel after flipping.
- the display panel can use the column inversion method to improve the display effect of the liquid crystal molecules.
- the inversion of the liquid crystal molecules is driven by an electric field to reverse the polarity.
- FIG. 7 a and FIG. 7 b schematically show the corresponding polarities of the data voltage input by the sub-pixel SPX in two adjacent display frames when the polarity is reversed when the display panel adopts the column inversion mode.
- Fig. 7a schematically shows the corresponding polarity of the data voltage input by each sub-pixel SPX in the display panel before inversion.
- FIG. 7b schematically shows the polarity corresponding to the data voltage input by each sub-pixel SPX in the display panel after inversion.
- "+” represents that the polarity corresponding to the data voltage input by the sub-pixel SPX is positive
- "-" represents that the polarity corresponding to the data voltage input by the sub-pixel SPX is negative.
- the polarities corresponding to the input data voltages in one sub-pixel SPX column are the same, and the sub-pixel SPX column whose data voltage corresponds to the positive polarity and the sub-pixel SPX column whose data voltage corresponds to the negative polarity are arranged alternately.
- the polarity corresponding to the data voltage input by the sub-pixel SPX column is positive.
- the polarity corresponding to the data voltage input by the SPX column of the sub-pixel is negative.
- the polarity corresponding to the data voltage input by the SPX column of the sub-pixel is negative.
- the polarity corresponding to the data voltage input by the SPX column of the sub-pixel is positive.
- the polarity corresponding to the data voltage input by the SPX column of the sub-pixel is positive.
- the polarity corresponding to the data voltage of the sub-pixel SPX of the display panel after charging can be as shown in FIG. 7a .
- the polarities corresponding to the data voltages of the charged sub-pixels SPX of the display panel may all be as shown in FIG. 7 b .
- the display panel can use the row inversion method to improve the display effect of the liquid crystal molecules.
- the inversion of the liquid crystal molecules is driven by an electric field to reverse the polarity.
- FIG. 8a and FIG. 8b schematically show the corresponding polarities of the data voltage input by the sub-pixel SPX in two adjacent display frames when the polarity is reversed when the display panel adopts the row inversion mode.
- Fig. 8a schematically shows the corresponding polarity of the data voltage input by each sub-pixel SPX in the display panel before inversion.
- FIG. 8 b schematically shows the polarity corresponding to the data voltage input by each sub-pixel SPX in the display panel after flipping.
- the polarity corresponding to the data voltage input by the sub-pixel SPX row is negative. And in the last display frame, the polarity corresponding to the data voltage input by the sub-pixel SPX row is negative. In the next display frame, the polarity corresponding to the data voltage input by the sub-pixel SPX row is positive.
- the polarity corresponding to the data voltage input by the sub-pixel SPX row is positive.
- the polarity corresponding to the data voltage input by the sub-pixel SPX row is negative.
- the polarity corresponding to the data voltage input by the sub-pixel SPX row is negative.
- the polarity corresponding to the data voltage input by the sub-pixel SPX row is positive.
- the polarity corresponding to the data voltage input by the sub-pixel SPX row is positive.
- the display panel can adopt a dot inversion method to improve the display effect of the liquid crystal molecules.
- the inversion of the liquid crystal molecules is driven by an electric field to reverse the polarity.
- Fig. 9a and Fig. 9b schematically show the corresponding polarity of the data voltage input by the sub-pixel SPX in two adjacent display frames when the polarity is reversed when the display panel adopts the dot inversion mode.
- Fig. 9a schematically shows the corresponding polarity of the data voltage input by each sub-pixel SPX in the display panel before inversion.
- 9 b schematically shows the polarity corresponding to the data voltage input by each sub-pixel SPX in the display panel after inversion.
- "+” represents that the polarity corresponding to the data voltage input by the sub-pixel SPX is positive
- "-" represents that the polarity corresponding to the data voltage input by the sub-pixel SPX is negative.
- the polarities corresponding to the data voltages input to every two adjacent sub-pixels SPX are different.
- the polarity corresponding to the data voltage input by the sub-pixel SPX is positive.
- the polarity corresponding to the data voltage input by the sub-pixel SPX is negative.
- the polarity corresponding to the data voltage input by the sub-pixel SPX is negative.
- the polarity corresponding to the data voltage input by the sub-pixel SPX is positive.
- the polarity corresponding to the data voltage input by the sub-pixel SPX is positive.
- the target value k can be determined according to the following formula
- k represents the target value
- f 0 represents the reference refresh rate
- f s represents the current refresh rate
- f s /f 0 represents the ratio of the current refresh rate to the reference refresh rate
- a display frame of the display may include a data refreshing period TS and a blanking time period TB.
- the signal ga1 is applied to the gate line GA1
- the signal ga2 is applied to the gate line GA2
- the signal ga3 is applied to the gate line GA3
- the signal ga4 is applied to the gate line GA4, and the gate turn-on voltage (for example, when the voltage corresponding to the high level), the corresponding transistor 01 can be controlled to be turned on, so that the corresponding data voltage is input to the pixel electrode 02 .
- the signals ga1 - ga4 are all at low level, the transistor 01 in each sub-pixel SPX is in an off state, and each pixel electrode 02 maintains the input data voltage.
- Vda' represents the data voltage loaded on the data line connected to the sub-pixel SPX when the current refresh frequency of the display panel is 48Hz
- ⁇ V' represents the actual charge of the pixel electrode of the sub-pixel SPX.
- the polarity corresponding to the data voltage of each sub-pixel SPX of the display panel after being charged may be as shown in FIG. 6a.
- the polarity corresponding to the data voltage of each sub-pixel SPX of the display panel after being charged may be as shown in FIG. 6a.
- the first display frame to the fourth display frame may refer to four adjacent display frames selected by the display panel when displaying images. That is, first, the first display frame among the four adjacent display frames appears. Afterwards, the second display frame among the four adjacent display frames appears. Afterwards, the third display frame among the four adjacent display frames appears. Afterwards, the fourth display frame among the four adjacent display frames appears.
- a display frame of the display may include a data refreshing period TS and a blanking time period TB.
- the signal ga1 is applied to the gate line GA1
- the signal ga2 is applied to the gate line GA2
- the signal ga3 is applied to the gate line GA3
- the signal ga4 is applied to the gate line GA4, and the gate turn-on voltage (for example, when the voltage corresponding to the high level), the corresponding transistor 01 can be controlled to be turned on, so that the corresponding data voltage is input to the pixel electrode 02 .
- the signals ga1 - ga4 are all at low level, the transistor 01 in each sub-pixel SPX is in an off state, and each pixel electrode 02 maintains the input data voltage.
- Vda represents the data voltage loaded on the data line connected to the sub-pixel SPX when the current refresh frequency of the display panel is 96Hz
- ⁇ V represents the current refresh frequency of the display panel is 96Hz.
- the data voltage Vda1 input to the sub-pixel SPX corresponds to the positive polarity
- the polarity corresponding to the data voltage of each sub-pixel SPX charged in the display panel can be As shown in Fig.
- the polarity corresponding to the data voltage of each sub-pixel SPX of the display panel after being charged may be as shown in FIG. 6a.
- the polarity corresponding to the data voltage of each sub-pixel SPX of the display panel after charging can be shown in the figure 6b.
- the polarity corresponding to the data voltage of each sub-pixel SPX of the display panel after being charged may be as shown in FIG. 6b.
- the polarity corresponding to the data voltage of the sub-pixel SPX of the display panel after being charged may be as shown in FIG. 6 a .
- the polarities corresponding to the charged data voltages of the sub-pixels SPX of the display panel may be as shown in FIG. 6b.
- the first display frame to the eighth display frame may refer to 8 adjacent display frames selected by the display panel when displaying images. That is, first, the first display frame among the eight adjacent display frames appears. Afterwards, the second display frame among the eight adjacent display frames appears. Afterwards, the third display frame among the eight adjacent display frames appears. Afterwards, the fourth display frame among the eight adjacent display frames appears. The rest can be deduced in the same way, and will not be repeated here.
- the current refresh frequency of the display panel is 48 Hz for the first display frame F1 and the second display frame F2. From the third display frame F3 to the sixth display frame F6, the current refresh frequency of the display panel is 96 Hz. In other words, the display panel is switched from 48Hz to 96Hz.
- the data voltage Vda1 input to the sub-pixel SPX corresponds to positive polarity
- the polarity corresponding to the data voltage of each sub-pixel SPX of the display panel after charging can be shown in FIG. 6a.
- the data voltage Vda2 input to the sub-pixel SPX corresponds to a negative polarity, and the polarity corresponding to the data voltage of each sub-pixel SPX of the display panel after charging can be shown in FIG. 6b.
- the data voltage Vda1 input to the sub-pixel SPX corresponds to positive polarity, and the polarity corresponding to the data voltage of each sub-pixel SPX of the display panel after charging can be shown in FIG. 6a.
- the fourth display frame F4 the data voltage Vda1 input to the sub-pixel SPX corresponds to positive polarity, and the polarity corresponding to the data voltage of each sub-pixel SPX of the display panel after charging can be shown in FIG. 6a.
- the data voltage Vda2 input to the sub-pixel SPX corresponds to a negative polarity
- the polarity corresponding to the data voltage of each sub-pixel SPX of the display panel after charging can be shown in FIG. 6b.
- the data voltage Vda2 input to the sub-pixel SPX corresponds to a negative polarity
- the polarity corresponding to the data voltage of each sub-pixel SPX of the display panel after charging can be shown in FIG. 6b.
- the first display frame to the sixth display frame may refer to six adjacent display frames selected by the display panel when displaying images. That is, first, the first display frame among the six adjacent display frames appears. Afterwards, the second display frame among the six adjacent display frames appears. Afterwards, the third display frame among the six adjacent display frames appears. Afterwards, the fourth display frame among the six adjacent display frames appears. The rest can be deduced in the same way, and will not be repeated here.
- a display frame of the display may include a data refreshing period TS and a blanking time period TB.
- the signal ga1 is applied to the gate line GA1
- the signal ga2 is applied to the gate line GA2
- the signal ga3 is applied to the gate line GA3
- the signal ga4 is applied to the gate line GA4, and the gate turn-on voltage (for example, when the voltage corresponding to the high level), the corresponding transistor 01 can be controlled to be turned on, so that the corresponding data voltage is input to the pixel electrode 02 .
- the signals ga1 - ga4 are all at low level, the transistor 01 in each sub-pixel SPX is in an off state, and each pixel electrode 02 maintains the input data voltage.
- Vda"' represents the data voltage loaded on the data line connected to the sub-pixel SPX when the current refresh frequency of the display panel is 144Hz
- ⁇ V"' represents that the current refresh frequency of the display panel is 144Hz.
- the voltage difference between the data voltage actually charged in the pixel electrode of the sub-pixel SPX and the common electrode voltage At 144 Hz, the voltage difference between the data voltage actually charged in the pixel electrode of the sub-pixel SPX and the common electrode voltage.
- the data voltage Vda1 input to the sub-pixel SPX corresponds to the positive polarity
- the polarity corresponding to the data voltage of each sub-pixel SPX of the display panel after being charged may be as shown in FIG. 6a.
- the polarity corresponding to the data voltage of each sub-pixel SPX of the display panel after charging can be as follows As shown in Fig.
- the polarity corresponding to the data voltage of each sub-pixel SPX of the display panel after being charged may be as shown in FIG. 6b.
- the polarity corresponding to the data voltage of each sub-pixel SPX of the display panel after charging can be as follows As shown in Fig.
- the polarity corresponding to the data voltage of each sub-pixel SPX of the display panel after being charged may be as shown in FIG. 6b.
- the polarity corresponding to the data voltage of the sub-pixel SPX of the display panel after charging may be as shown in FIG. 6 a .
- the polarity corresponding to the data voltage of the sub-pixel SPX of the display panel after being charged may be as shown in FIG. 6 b .
- the first display frame to the twelfth display frame may refer to 12 adjacent display frames selected by the display panel when displaying images. That is, firstly, the first display frame among the 12 adjacent display frames appears. Afterwards, the second display frame among the 12 adjacent display frames appears. Afterwards, the third display frame among the 12 adjacent display frames appears. Afterwards, the fourth display frame among the 12 adjacent display frames appears. The rest can be deduced in the same way, and will not be repeated here.
- FIG. 11a shows the data voltage Vda' applied to the data line connected to the sub-pixel SPX when the current refresh frequency of the display panel is 48 Hz,
- Figure 11b schematically shows the data voltage Vda" applied to the data line connected to the sub-pixel SPX when the current refresh frequency of the display panel is 96Hz, the data voltage VP" actually charged to the pixel electrode of the sub-pixel SPX, the The absolute value
- 11c shows the current
- the refresh frequency is 144Hz
- the data voltage Vda"' loaded on the data line connected to the sub-pixel SPX is the data voltage VP"' actually charged to the pixel electrode of the sub-pixel SPX
- the pixel electrode of the sub-pixel SPX is actually charged to The absolute value
- This can improve the flickering problem when displaying frequency conversion.
- it can improve the problem of increased brightness of the display screen when the refresh rate of the display panel is switched from a higher refresh rate to a lower refresh rate, keep the brightness stable, and improve display quality and viewing experience.
- the polarity corresponding to the control data voltage can be flipped once after four display frames.
- the polarity corresponding to the charged data voltage of the sub-pixel SPX of the display panel may be as shown in FIG. 6 a .
- the polarity corresponding to the data voltage of the sub-pixel SPX of the display panel after being charged may be as shown in FIG. 6 b .
- the polarities corresponding to the data voltages of the sub-pixels SPX of the display panel after being charged may be as shown in FIG. 6 a .
- the polarity corresponding to the data voltage of the sub-pixel SPX of the display panel after being charged may be as shown in FIG. 6 b .
- the rest can be deduced in the same way, and will not be repeated here. It should be noted that, the above description is only taking the first display frame to the sixteenth display frame as an example. It does not specifically refer to the first display frame to the sixteenth display frame when the display panel is actually driven.
- the first display frame to the 16th display frame may refer to 16 adjacent display frames selected when the display panel is displaying images. That is, first, the first display frame among the 16 adjacent display frames appears. Afterwards, the second display frame among the 16 adjacent display frames appears. After that, the third display frame among the 16 adjacent display frames appears. Afterwards, the fourth display frame among the 16 adjacent display frames appears. The rest can be deduced in the same way, and will not be repeated here.
- the duration of the blank time period TB can be correspondingly extended for a certain period of time, so as to achieve the purpose of reducing the refresh frequency. Under different refresh frequencies, the duration of the data refresh phase TS may be the same.
- the embodiments of the present disclosure provide some other driving methods of the display panel, which are modified with respect to the implementation manners in the above-mentioned embodiments. The following only describes the differences between this embodiment and the above-mentioned embodiments, and the similarities will not be repeated here.
- the frequency at which the polarity corresponding to the control data voltage is reversed is the same as the frequency at which the polarity corresponding to the control data voltage is reversed at 48Hz , to further improve the brightness difference within the refresh frequency range, reduce the brightness difference and flicker problems that occur when switching between different refresh frequencies, and improve the display quality and viewing experience.
- the polarity corresponding to the control data voltage can be flipped once after two display frames.
- the specific driving process in this embodiment may be basically the same as the above embodiment in which the polarity corresponding to the control data voltage is reversed once after two display frames, and will not be repeated here.
- the frequency at which the polarity corresponding to the control data voltage is reversed is the same as the frequency at which the polarity corresponding to the control data voltage is reversed at 96Hz , to further improve the brightness difference within the refresh frequency range, reduce the brightness difference and flicker problems that occur when switching between different refresh frequencies, and improve the display quality and viewing experience.
- the polarity corresponding to the control data voltage can be flipped once after three display frames.
- the specific driving process in this embodiment may be basically the same as the above-mentioned embodiment in which the polarity corresponding to the control data voltage is reversed once after three display frames, and will not be repeated here.
- the frequency at which the polarity corresponding to the control data voltage is reversed is the same as the frequency at which the polarity corresponding to the control data voltage is reversed at 144Hz , to further improve the brightness difference within the refresh frequency range, reduce the brightness difference and flicker problems that occur when switching between different refresh frequencies, and improve the display quality and viewing experience.
- the specific driving process in this embodiment can be basically the same as the above embodiment in which the polarity corresponding to the control data voltage is reversed once after four display frames, and will not be repeated here.
- the frequency at which the polarity corresponding to the control data voltage is reversed is the same as the frequency at which the polarity corresponding to the control data voltage is reversed at 192Hz , to further improve the brightness difference within the refresh frequency range, reduce the brightness difference and flicker problems that occur when switching between different refresh frequencies, and improve the display quality and viewing experience.
- Embodiments of the present disclosure provide still some driving methods of the display panel, which are modified with respect to the implementation manners in the above-mentioned embodiments. The following only describes the differences between this embodiment and the above-mentioned embodiments, and the similarities will not be repeated here.
- Embodiments of the present disclosure provide still some driving methods of the display panel, which are modified with respect to the implementation manners in the above-mentioned embodiments. The following only describes the differences between this embodiment and the above-mentioned embodiments, and the similarities will not be repeated here.
- Embodiments of the present disclosure provide still some driving methods of the display panel, which are modified with respect to the implementation manners in the above-mentioned embodiments. The following only describes the differences between this embodiment and the above-mentioned embodiments, and the similarities will not be repeated here.
- the reference refresh rate may be less than a minimum value among multiple refresh rates of the display panel.
- the current refresh rate is any one of multiple refresh rates of the display panel.
- the minimum refresh rate of the display panel is 48 Hz
- the reference refresh rate may be less than 48 Hz, such as 30 Hz. That is, when the display panel works at 30 Hz, the polarity corresponding to the data voltage input to the sub-pixels of the display panel is reversed once after one display frame.
- the display panel based on the formula k-0.5 ⁇ f s /f 0 ⁇ k+0.5 or the formula k ⁇ f s /f 0 ⁇ k+1 or the formula k-1 ⁇ f s /f 0 ⁇ k+1, determine the value of k, so that the display panel can control the polarity corresponding to the data voltage input to the sub-pixel SPX of the display panel once through k display frames at the current refresh frequency .
- Embodiments of the present disclosure provide still some driving methods of the display panel, which are modified with respect to the implementation manners in the above-mentioned embodiments. The following only describes the differences between this embodiment and the above-mentioned embodiments, and the similarities will not be repeated here.
- the target value k can be determined according to the following formula
- k represents the target value
- f 0 represents the reference refresh rate
- f s represents the current refresh rate
- f s /f 0 represents the ratio of the current refresh rate to the reference refresh rate
- a display frame of the display may include a data refreshing period TS and a blanking time period TB.
- the signal ga1 is applied to the gate line GA1
- the signal ga2 is applied to the gate line GA2
- the signal ga3 is applied to the gate line GA3
- the signal ga4 is applied to the gate line GA4, and the gate turn-on voltage (for example, when the voltage corresponding to the high level), the corresponding transistor 01 can be controlled to be turned on, so that the corresponding data voltage is input to the pixel electrode 02 .
- the signals ga1 - ga4 are all at low level, the transistor 01 in each sub-pixel SPX is in an off state, and each pixel electrode 02 maintains the input data voltage.
- Vda' represents the data voltage loaded on the data line connected to the sub-pixel SPX when the current refresh frequency of the display panel is 48Hz
- ⁇ V' represents the actual charge of the pixel electrode of the sub-pixel SPX.
- the polarity corresponding to the data voltage of each sub-pixel SPX of the display panel after being charged may be as shown in FIG. 9a.
- the polarity corresponding to the data voltage of each sub-pixel SPX of the display panel after being charged may be as shown in FIG. 9a.
- the data voltage Vda2 input to the sub-pixel SPX corresponds to a negative polarity
- the first display frame to the fourth display frame may refer to four adjacent display frames selected by the display panel when displaying images. That is, first, the first display frame among the four adjacent display frames appears. Afterwards, the second display frame among the four adjacent display frames appears. Afterwards, the third display frame among the four adjacent display frames appears. Afterwards, the fourth display frame among the four adjacent display frames appears.
- a display frame of the display may include a data refreshing period TS and a blanking time period TB.
- the signal ga1 is applied to the gate line GA1
- the signal ga2 is applied to the gate line GA2
- the signal ga3 is applied to the gate line GA3
- the signal ga4 is applied to the gate line GA4, and the gate turn-on voltage (for example, when the voltage corresponding to the high level), the corresponding transistor 01 can be controlled to be turned on, so that the corresponding data voltage is input to the pixel electrode 02 .
- the signals ga1 - ga4 are all at low level, the transistor 01 in each sub-pixel SPX is in an off state, and each pixel electrode 02 maintains the input data voltage.
- Vda represents the data voltage loaded on the data line connected to the sub-pixel SPX when the current refresh frequency of the display panel is 96Hz
- ⁇ V represents the current refresh frequency of the display panel is 96Hz.
- the data voltage Vda1 input to the sub-pixel SPX corresponds to the positive polarity
- the polarity corresponding to the data voltage of each sub-pixel SPX charged in the display panel can be As shown in Fig.
- the polarity corresponding to the data voltage of each sub-pixel SPX of the display panel after being charged may be as shown in FIG. 9a.
- the polarity corresponding to the data voltage of each sub-pixel SPX of the display panel after charging can be shown in the figure 9b.
- the polarity corresponding to the data voltage of each sub-pixel SPX of the display panel after being charged may be as shown in FIG. 9b.
- the polarity corresponding to the data voltage of the sub-pixel SPX of the display panel after being charged may be as shown in FIG. 9 a .
- the polarities corresponding to the charged data voltages of the sub-pixels SPX of the display panel may be as shown in FIG. 9b.
- the first display frame to the eighth display frame may refer to 8 adjacent display frames selected by the display panel when displaying images. That is, first, the first display frame among the eight adjacent display frames appears. Afterwards, the second display frame among the eight adjacent display frames appears. Afterwards, the third display frame among the eight adjacent display frames appears. Afterwards, the fourth display frame among the eight adjacent display frames appears. The rest can be deduced in the same way, and will not be repeated here.
- a display frame of the display may include a data refreshing period TS and a blanking time period TB.
- the signal ga1 is applied to the gate line GA1
- the signal ga2 is applied to the gate line GA2
- the signal ga3 is applied to the gate line GA3
- the signal ga4 is applied to the gate line GA4, and the gate turn-on voltage (for example, when the voltage corresponding to the high level), the corresponding transistor 01 can be controlled to be turned on, so that the corresponding data voltage is input to the pixel electrode 02 .
- the signals ga1 - ga4 are all at low level, the transistor 01 in each sub-pixel SPX is in an off state, and each pixel electrode 02 maintains the input data voltage.
- Vda"' represents the data voltage loaded on the data line connected to the sub-pixel SPX when the current refresh frequency of the display panel is 144Hz
- ⁇ V"' represents that the current refresh frequency of the display panel is 144Hz.
- the voltage difference between the data voltage actually charged in the pixel electrode of the sub-pixel SPX and the common electrode voltage At 144 Hz, the voltage difference between the data voltage actually charged in the pixel electrode of the sub-pixel SPX and the common electrode voltage.
- the data voltage Vda1 input to the sub-pixel SPX corresponds to the positive polarity
- the polarity corresponding to the data voltage of each sub-pixel SPX of the display panel after being charged may be as shown in FIG. 9a.
- the polarity corresponding to the data voltage of each sub-pixel SPX of the display panel after charging can be as follows As shown in Fig.
- the polarity corresponding to the data voltage of each sub-pixel SPX of the display panel after being charged may be as shown in FIG. 9b.
- the polarity corresponding to the data voltage of each sub-pixel SPX of the display panel after charging can be as follows As shown in Fig.
- the polarity corresponding to the data voltage of each sub-pixel SPX of the display panel after being charged may be as shown in FIG. 9b.
- the polarity corresponding to the data voltage of the sub-pixel SPX of the display panel after charging may be as shown in FIG. 9 a .
- the polarity corresponding to the data voltage of the sub-pixel SPX of the display panel after charging may be as shown in FIG. 9 b .
- the first display frame to the twelfth display frame may refer to 12 adjacent display frames selected by the display panel when displaying images. That is, firstly, the first display frame among the 12 adjacent display frames appears. Afterwards, the second display frame among the 12 adjacent display frames appears. Afterwards, the third display frame among the 12 adjacent display frames appears. Afterwards, the fourth display frame among the 12 adjacent display frames appears. The rest can be deduced in the same way, and will not be repeated here.
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Abstract
公开了一种显示面板的驱动方法及显示装置。该显示面板的驱动方法包括:获取当前显示帧对应的显示数据和当前刷新频率(S100);根据当前刷新频率和基准刷新频率之间的比值,确定目标值(S200);基准刷新频率不大于显示面板具有的多个刷新频率中的最小值;且目标值为正整数;基于经过目标值个显示帧,控制输入到显示面板的子像素中的数据电压对应的极性翻转一次的规则,根据显示数据,对各子像素输入对应极性的数据电压(S300)。
Description
相关申请的交叉引用
本申请要求在2021年12月06日提交中国专利局、申请号为202111476879.3、申请名称为“显示面板的驱动方法及显示装置”的中国专利申请的优先权,其全部内容通过引用结合在本申请中。
本公开涉及显示技术领域,特别涉及显示面板的驱动方法及显示装置。
在诸如液晶显示器(Liquid Crystal Display,LCD)等显示器中,一般包括多个像素。每个像素可以包括:红色子像素、绿色子像素以及蓝色子像素。通过控制每个子像素对应的显示数据,以控制每个子像素的显示亮度,从而混合出所需显示的色彩来显示彩色图像。
发明内容
本公开实施例提供的显示面板的驱动方法,包括:
获取当前显示帧对应的显示数据和当前刷新频率;
根据所述当前刷新频率和基准刷新频率之间的比值,确定目标值;所述基准刷新频率不大于所述显示面板具有的多个刷新频率中的最小值;且所述目标值为正整数;
基于经过所述目标值个显示帧,控制输入到所述显示面板的子像素中的数据电压对应的极性翻转一次的规则,根据所述显示数据,对各所述子像素输入对应极性的数据电压。
在一些示例中,根据如下公式,确定所述目标值;
k-a≤f
s/f
0<k+b;
其中,k代表所述目标值,0≤a≤1,0≤b≤1,f
0代表所述基准刷新频率,f
s代表所述当前刷新频率。
在一些示例中,a=0,b=1。
在一些示例中,a=b。
在一些示例中,0.5≤a≤1。
在一些示例中,在所述获取当前显示帧对应的显示数据和当前刷新频率之后,且在所述确定目标值之前,还包括:
获取上一个显示帧对应的刷新频率;
判断上一个显示帧对应的刷新频率和所述当前刷新频率是否相同;
所述根据所述当前刷新频率和基准刷新频率之间的比值,确定目标值,具体包括:
在所述当前刷新频率和上一个显示帧对应的刷新频率不同时,根据所述当前刷新频率和基准刷新频率之间的比值,确定所述目标值。
在一些示例中,在所述当前刷新频率和上一个显示帧对应的刷新频率不同时,针对同一所述子像素,在所述当前显示帧输入所述子像素的数据电压对应的极性和所述上一个显示帧输入所述子像素的数据电压对应的极性不同。
在一些示例中,在所述当前刷新频率和上一个显示帧对应的刷新频率不同时,针对同一所述子像素,在所述当前显示帧输入所述子像素的数据电压对应的极性和所述上一个显示帧输入所述子像素的数据电压对应的极性相同。
在一些示例中,所述显示面板工作在所述基准刷新频率时,输入到所述显示面板的子像素中的数据电压对应的极性,经过1个显示帧翻转一次。
在一些示例中,所述显示面板采用帧翻转方式、列翻转方式、行翻转方式以及点翻转方式中的至少一种。
本公开实施例提供的显示装置,包括:
时序控制器,被配置为获取当前显示帧对应的显示数据和当前刷新频率,根据所述当前刷新频率和基准刷新频率之间的比值,确定目标值;基于经过所述目标值个显示帧,控制输入到所述显示面板的子像素中的数据电压对应 的极性翻转一次的规则,输出极性控制信号,以及输出所述显示数据;其中,所述基准刷新频率不大于所述显示面板具有的多个刷新频率中的最小值;且所述目标值为正整数;
源极驱动电路,被配置为接收所述极性控制信号和所述显示数据,并根据所述极性控制信号和所述显示数据,对各所述子像素输入对应极性的数据电压。
在一些示例中,所述时序控制器进一步被配置为:
获取上一个显示帧对应的刷新频率;
判断上一个显示帧对应的刷新频率和所述当前刷新频率是否相同;
在所述当前刷新频率和上一个显示帧对应的刷新频率不同时,根据所述当前刷新频率和基准刷新频率之间的比值,确定所述目标值。
在一些示例中,所述时序控制器进一步被配置为:在所述当前刷新频率和上一个显示帧对应的刷新频率不同时,针对同一所述子像素,在所述当前显示帧输入所述子像素的数据电压对应的极性和所述上一个显示帧输入所述子像素的数据电压对应的极性不同。
在一些示例中,所述时序控制器进一步被配置为:在所述当前刷新频率和上一个显示帧对应的刷新频率不同时,针对同一所述子像素,在所述当前显示帧输入所述子像素的数据电压对应的极性和所述上一个显示帧输入所述子像素的数据电压对应的极性相同。
在一些示例中,所述源极驱动电路设置为多个,不同所述源极驱动电路电连接所述显示面板中不同的数据线。
图1为本公开实施例中的显示装置的结构示意图;
图2为本公开实施例中的显示面板的结构示意图;
图3为本公开实施例中较低刷新频率下,不同显示帧切换时的一些变化示意图;
图4为本公开实施例中较高刷新频率下,不同显示帧切换时的另一些变化示意图;
图5为本公开实施例中的显示面板的驱动方法的流程图;
图6a为本公开实施例中显示面板采用帧翻转方式时,子像素输入的数据电压在极性翻转时对应的极性的一些示意图;
图6b为本公开实施例中显示面板采用帧翻转方式时,子像素输入的数据电压在极性翻转时对应的极性的另一些示意图;
图7a为本公开实施例中显示面板采用列翻转方式时,子像素输入的数据电压在极性翻转时对应的极性的一些示意图;
图7b为本公开实施例中显示面板采用列翻转方式时,子像素输入的数据电压在极性翻转时对应的极性的另一些示意图;
图8a为本公开实施例中显示面板采用行翻转方式时,子像素输入的数据电压在极性翻转时对应的极性的一些示意图;
图8b为本公开实施例中显示面板采用行翻转方式时,子像素输入的数据电压在极性翻转时对应的极性的另一些示意图;
图9a为本公开实施例中显示面板采用点翻转方式时,子像素输入的数据电压在极性翻转时对应的极性的一些示意图;
图9b为本公开实施例中显示面板采用点翻转方式时,子像素输入的数据电压在极性翻转时对应的极性的另一些示意图;
图10a为本公开实施例中的一些信号时序图;
图10b为本公开实施例中的另一些信号时序图;
图10c为本公开实施例中的又一些信号时序图;
图10d为本公开实施例中的又一些信号时序图;
图11a为本公开实施例中48Hz下,不同显示帧切换时的一些变化示意图;
图11b为本公开实施例中96Hz下,不同显示帧切换时的一些变化示意图;
图11c为本公开实施例中144Hz下,不同显示帧切换时的一些变化示意图。
为使本公开实施例的目的、技术方案和优点更加清楚,下面将结合本公开实施例的附图,对本公开实施例的技术方案进行清楚、完整地描述。显然,所描述的实施例是本公开的一部分实施例,而不是全部的实施例。并且在不冲突的情况下,本公开中的实施例及实施例中的特征可以相互组合。基于所描述的本公开的实施例,本领域普通技术人员在无需创造性劳动的前提下所获得的所有其他实施例,都属于本公开保护的范围。
除非另外定义,本公开使用的技术术语或者科学术语应当为本公开所属领域内具有一般技能的人士所理解的通常意义。本公开中使用的“第一”、“第二”以及类似的词语并不表示任何顺序、数量或者重要性,而只是用来区分不同的组成部分。“包括”或者“包含”等类似的词语意指出现该词前面的元件或者物件涵盖出现在该词后面列举的元件或者物件及其等同,而不排除其他元件或者物件。“连接”或者“相连”等类似的词语并非限定于物理的或者机械的连接,而是可以包括电性的连接,不管是直接的还是间接的。
需要注意的是,附图中各图形的尺寸和形状不反映真实比例,目的只是示意说明本公开内容。并且自始至终相同或类似的标号表示相同或类似的元件或具有相同或类似功能的元件。
参见图1与图2,显示装置可以包括显示面板100以及时序控制器200。其中,显示面板100可以包括多个阵列排布的像素单元,多条栅线GA(例如,GA1、GA2、GA3、GA4)、多条数据线DA(例如,DA1、DA2、DA3)、栅极驱动电路110以及源极驱动电路120。栅极驱动电路110分别与栅线GA1、GA2、GA3、GA4耦接,源极驱动电路120分别与数据线DA1、DA2、DA3耦接。其中,时序控制器200可以通过电平转换(Level Shift)电路向栅极驱动电路110输入控制信号,从而驱动栅线GA1、GA2、GA3、GA4。时序控制器200向源极驱动电路120输入信号,以使源极驱动电路120向数据线输入数据电压,从而对子像素SPX充电,使子像素SPX输入相应的数据电压,实现画面显示功能。示例性地,源极驱动电路120可以设置为2个,其中一 个源极驱动电路120连接一半数量的数据线,另一个源极驱动电路120连接另一半数量的数据线。当然,源极驱动电路120也可以设置3个、4个、或更多个,其可以根据实际应用的需求进行设计确定,在此不作限定。
示例性地,每个像素单元包括多个子像素SPX。例如,像素单元可以包括红色子像素,绿色子像素以及蓝色子像素,这样可以通过红绿蓝进行混色,以实现彩色显示。或者,像素单元也可以包括红色子像素,绿色子像素、蓝色子像素以及白色子像素,这样可以通过红绿蓝白进行混色,以实现彩色显示。当然,在实际应用中,像素单元中的子像素的发光颜色可以根据实际应用环境来设计确定,在此不作限定。
参见图2所示,每个子像素SPX中包括晶体管01和像素电极02。其中,一行子像素SPX对应一条栅线,一列子像素SPX对应一条数据线。晶体管01的栅极与对应的栅线电连接,晶体管01的源极与对应的数据线电连接,晶体管01的漏极与像素电极02电连接,需要说明的是,本公开像素阵列结构还可以是双栅结构,即相邻两行像素之间设置两条栅极线,此排布方式可以减少一半的数据线,即包含相邻两列像素之间有的数据线,有的相邻两列像素之间不包括数据线,具体像素排布结构和数据线,扫描线的排布方式不限定。
需要说明的是,本公开实施例中的显示面板可以为液晶显示面板。示例性地,液晶显示面板一般包括对盒的上基板和下基板,以及封装在上基板和下基板之间的液晶分子。在显示画面时,由于加载在各子像素SPX的像素电极上的数据电压和公共电极上的公共电极电压之间具有电压差,该电压差可以形成电场,从而使液晶分子在该电场的作用下进行偏转。由于不同强度的电场使液晶分子的偏转程度不同,从而导致子像素SPX的透过率不同,以使子像素SPX实现不同灰阶的亮度,进而实现画面显示。
下面均以本公开实施例中的显示面板为液晶显示面板,且像素单元包括红色子像素SPX、绿色子像素SPX、蓝色子像素SPX为例进行说明,但是读者应知,液晶显示面板中包括的子像素SPX的颜色并不局限于此。
灰阶,一般是将最暗与最亮之间的亮度变化区分为若干份,以便于进行屏幕亮度管控。例如,以显示的图像由红、绿、蓝三种颜色组成,其中每一个颜色都可以显现出不同的亮度级别,并且不同亮度层次的红、绿、蓝组合起来,可以形成不同的色彩。例如,液晶显示面板的灰阶位数为6bit,则红、绿、蓝这三种颜色分别具有64(即2
6)个灰阶,这64个灰阶值分别为0~63。液晶显示面板的灰阶位数为8bit,则红、绿、蓝这三种颜色分别具有256(即2
8)个灰阶,这256个灰阶值分别为0~255。液晶显示面板的灰阶位数为10bit,则红、绿、蓝这三种颜色分别具有1024(即2
10)个灰阶,这1024个灰阶值分别为0~1023。液晶显示面板的灰阶位数为12bit,则红、绿、蓝这三种颜色分别具有4096(即2
12)个灰阶,这4096个灰阶值分别为0~4093。
示例性地,图3示意出了较低刷新频率下,不同显示帧切换时,一个子像素SPX对应的Vda、VP、ΔV以及LD的变化示意图。图4示意出了较高刷新频率下,不同显示帧切换时,一个子像素SPX对应的Vda、VP、ΔV以及LD的变化示意图。结合图3与图4所示,以一个子像素SPX为例,Vda代表不同显示帧中加载到该子像素SPX连接的数据线上的数据电压,VP代表该子像素SPX的像素电极实际充入的数据电压,ΔV代表该子像素SPX的像素电极实际充入的数据电压与公共电极电压之间电压差,|ΔV|代表该子像素SPX的像素电极实际充入的数据电压与公共电极电压之间电压差的绝对值,LD代表该子像素SPX的亮度,Vcom代表公共电极电压。其中,在该子像素SPX的像素电极中输入的数据电压Vda1大于公共电极电压Vcom时,可以使该子像素SPX处的液晶分子为正极性,则该子像素SPX中的数据电压Vda1对应的极性为正极性。在子像素SPX的像素电极中输入的数据电压Vda2小于公共电极电压Vcom时,可以使该子像素SPX处的液晶分子为负极性,则该子像素SPX中的数据电压Vda2对应的极性为负极性。例如,公共电极电压可以为8.3V,若在该子像素SPX的像素电极中输入了8.3V~16V的数据电压,可以使该子像素SPX处的液晶分子为正极性,则8.3V~16V的数据电压为对应正极性的数据电压。若在该子像素SPX的像素电极中输入了0.6V~8.3V 的数据电压,可以使该子像素SPX处的液晶分子为负极性,则0.6V~8.3V的数据电压为对应负极性的数据电压。示例性地,以8bit的0~255灰阶为例,若在子像素SPX的像素电极中输入16V的数据电压时,该子像素SPX可以对应正极性的最大灰阶值的亮度。若在子像素SPX的像素电极中输入0.6V的数据电压时,该子像素SPX可以对应负极性的最大灰阶值的亮度。
由于液晶分子具有粘滞效应,因此为了避免长时间处于同一极性导致液晶分子产生极化导致残像的问题,可以在显示帧切换时,控制输入子像素SPX的数据电压相对公共电极电压的极性进行翻转。结合图3所示,以一个子像素SPX为例,在显示帧进行切换时,数据电压对应的极性会进行翻转。例如,在显示帧F1中输入到子像素SPX中的数据电压Vda1对应正极性,在显示帧F2中输入到子像素SPX中的数据电压Vda2对应负极性。在显示帧F1切换至显示帧F2时,ΔV会由大→小→大变化。通常,ΔV越大,亮度LD越高。其余显示帧切换时,也会出现ΔV由大→小→大的变化。因此,在显示帧切换时,显示面板的亮度会产生由大→小→大的变化。
在某些应用场景下,为了节省显示面板的功耗,可以将显示面板的刷新频率降低,即采用较低刷新频率来驱动显示面板显示画面。在另外一些场景下,例如:执行高频游戏时,可以将显示面板的刷新频率提高,即采用较高刷新频率来驱动显示面板显示画面,以使画面更为流畅。因此,为了适用于不同的场景,显示面板可以变换刷新频率,即显示面板可以执行动态帧频显示。然而,结合图3与图4所示,Ldam代表不同刷新频率下子像素SPX的最大亮度。Lda1代表在较低刷新频率下,显示面板的平均亮度。Lda2代表在较高刷新频率下,显示面板的平均亮度。对于不同刷新频率下,相同时间内,刷新频率越高,子像素SPX的亮度LD由大→小→大变化的次数越多,导致显示面板的平均亮度越低,则出现Lda2<Lda1。因此,若显示面板显示同一画面时,较低刷新频率下显示的画面的亮度会高于较高刷新频率下显示的画面的亮度。
为了使显示面板在不同刷新频率切换时,保持亮度稳定,避免出现切换 刷新频率时导致显示画面的亮度出现差异,提高显示面板的显示品质,提高观看体验。本公开实施例提供了显示面板的驱动方法,通过获取当前显示帧对应的显示数据和当前刷新频率,并根据当前刷新频率和基准刷新频率之间的比值,可以确定出目标值。这样可以基于经过目标值个显示帧,控制输入到显示面板的子像素SPX中的数据电压对应的极性翻转一次的规则,根据显示数据,对各子像素SPX输入对应极性的数据电压。这样可以调整不同刷新率下的输入到子像素SPX中的数据电压对应的极性的翻转频率,从而可以降低不同刷新频率下显示面板的亮度差异,进而改善变频显示时产生的闪烁问题。尤其是,可以改善显示面板的刷新频率从较高刷新频率切换为较低刷新频率时,显示画面亮度增加的问题,保持亮度稳定,提高显示品质和观看体验。
本公开实施例提供了显示面板的驱动方法,如图5所示,可以包括如下步骤:
S100、获取当前显示帧对应的显示数据和当前刷新频率。
需要说明的是,获取到的显示数据可以包括:每一个子像素SPX一一对应的数据电压的数字电压形式。
S200、根据当前刷新频率和基准刷新频率之间的比值,确定目标值。
示例性地,显示面板工作在基准刷新频率下时,输入到显示面板的子像素SPX中的数据电压对应的极性可以逐个显示帧进行翻转,即经过1个显示帧翻转一次。例如,在第1个显示帧输入到显示面板的子像素SPX中的数据电压对应的极性为正极性,在第2个显示帧输入到显示面板的子像素SPX中的数据电压对应的极性为负极性,在第3个显示帧输入到显示面板的子像素SPX中的数据电压对应的极性为正极性,在第4个显示帧输入到显示面板的子像素SPX中的数据电压对应的极性为负极性。这样可以将显示面板在基准刷新频率下进行驱动时的极性翻转作为基准,以确定显示面板在当前刷新频率下进行驱动时的极性翻转次序。
示例性地,基准刷新频率可以为显示面板具有的多个刷新频率中的最小 值。当前刷新频率为显示面板具有的多个刷新频率中的任意一个。
例如,显示面板具有的刷新频率的范围可以为大于或等于48Hz,则基准刷新频率可以为48Hz。例如,显示面板具有的刷新频率可以包括:48Hz、72Hz、96Hz、120Hz、144Hz、192Hz或更高,则基准刷新频率可以为48Hz,当前刷新频率可以为48Hz、72Hz、96Hz、120Hz、144Hz、192Hz或更高中的一个。
例如,显示面板具有的刷新频率的范围可以为大于或等于30Hz,则基准刷新频率可以为30Hz。例如,显示面板具有的刷新频率可以包括:30Hz、45Hz、60Hz、75Hz、90Hz、105Hz、120Hz、135Hz、150Hz、170Hz、240Hz或更高,则基准刷新频率可以为30Hz,当前刷新频率可以为0Hz、45Hz、60Hz、75Hz、90Hz、105Hz、120Hz、135Hz、150Hz、170Hz、240Hz或更高中的一个。
示例性地,该目标值(例如,以k代表目标值)为正整数,即k为大于0的整数。
S300、基于经过目标值个显示帧,控制输入到显示面板的子像素SPX中的数据电压对应的极性翻转一次的规则,根据显示数据,对各子像素SPX输入对应极性的数据电压。也就是说,以一个子像素SPX为例,在当前刷新频率下,该子像素SPX充电后的数据电压对应的极性在k个显示帧内是相同的,在第k+1个显示帧时,该子像素SPX充电后的数据电压对应的极性可以进行翻转,并在第k+1个显示帧至第2k个显示帧中,该子像素SPX充电后的数据电压对应的极性是相同的,可选的,在k-1个显示帧的数据电压的极性和第k个显示帧的数据电压的极性相反。例如,该子像素SPX充电后的数据电压对应的极性在k个显示帧内可以均为正极性,在第k+1个显示帧至第2k个显示帧中,该子像素SPX充电后的数据电压对应的极性可以均为负极性。或者,该子像素SPX充电后的数据电压对应的极性在目标值个显示帧内可以均为负极性,在第k+1个显示帧至第2k个显示帧中,该子像素SPX充电后的数据电压对应的极性可以均为正极性。这样可以调整不同刷新率下的输入到子像素SPX中的数据电压对应的极性的翻转频率,从而可以降低不同刷新频率下显示面板的亮度差异,进而改善变频显示时产生的闪烁问题。尤其是,可以改 善显示面板的刷新频率从较高刷新频率切换为较低刷新频率时,显示画面亮度增加的问题,保持亮度稳定,提高显示品质和观看体验。
在本公开实施例中,在步骤S100:获取当前显示帧对应的显示数据和当前刷新频率之后,且在步骤S200:确定目标值之前,可以获取上一个显示帧对应的刷新频率,并判断上一个显示帧对应的刷新频率和当前刷新频率是否相同。在当前刷新频率和上一个显示帧对应的刷新频率相同时,说明显示面板的刷新频率未切换,这样可以不用进行步骤S200,而直接根据上一个显示帧对应的刷新频率对应的目标值,控制输入到子像素SPX的像素电极中的数据电压的极性进行翻转。在当前刷新频率和上一个显示帧对应的刷新频率不同时,说明显示面板的刷新频率进行了切换,这样可以执行步骤S200,从而根据当前刷新频率和基准刷新频率之间的比值,确定目标值。之后再根据确定出的该目标值,控制输入到子像素SPX的像素电极中的数据电压的极性进行翻转。
在本公开实施例中,时序控制器200可以获取当前显示帧对应的显示数据和当前刷新频率。并将当前显示帧对应的显示数据以数字电压的形式进行存储。之后,可以获取上一个显示帧对应的刷新频率。并判断上一个显示帧对应的刷新频率和当前刷新频率是否相同。在当前刷新频率和上一个显示帧对应的刷新频率相同时,说明显示面板的刷新频率未切换,这样可以不用进行步骤S200,而直接根据上一个显示帧对应的刷新频率对应的目标值,基于经过该目标值个显示帧,控制输入到显示面板的子像素SPX中的数据电压对应的极性翻转一次的规则,输出极性控制信号,以及输出当前显示帧对应的显示数据。源极驱动电路120可以接收时序控制器200输出的基于上一个显示帧对应的目标值确定出的极性控制信号和当前显示帧对应的显示数据,将显示数据通过数模转换处理为模拟电压后形成数据电压,并根据性控制信号控制数据电压的极性翻转以提供给数据线,以使各子像素SPX输入对应极性的数据电压。
并且,时序控制器200在当前刷新频率和上一个显示帧对应的刷新频率 不同时,说明显示面板的刷新频率进行了切换,这样可以执行步骤S200,从而根据当前刷新频率和基准刷新频率之间的比值,确定出当前显示帧对应的目标值。之后再根据确定出的当前显示帧对应的目标值,基于经过目标值个显示帧,控制输入到显示面板的子像素SPX中的数据电压对应的极性翻转一次的规则,输出对应当前显示帧的极性控制信号,以及输出对应当前帧的显示数据。源极驱动电路120可以接收时序控制器200输出的基于当前显示帧对应的目标值确定出的极性控制信号和当前显示帧对应的显示数据,将显示数据通过数模转换处理为模拟电压后形成数据电压,并根据性控制信号控制数据电压的极性翻转以提供给数据线,以使各子像素SPX输入对应极性的数据电压。
在本公开实施例中,时序控制器200在当前刷新频率和上一个显示帧对应的刷新频率不同时,针对同一子像素SPX,在当前显示帧输入子像素SPX的数据电压对应的极性和上一个显示帧输入子像素SPX的数据电压对应的极性不同。例如,上一个显示帧输入子像素SPX的数据电压对应正极性,则当前显示帧输入子像素SPX的数据电压对应负极性。或者,上一个显示帧输入子像素SPX的数据电压对应负极性,则当前显示帧输入子像素SPX的数据电压对应正极性。这样可以在刷新频率切换时,控制液晶分子的极性翻转一次,提高液晶分子翻转的频率。
当然,在具体实施时,时序控制器200也可以在当前刷新频率和上一个显示帧对应的刷新频率不同时,针对同一子像素SPX,在当前显示帧输入子像素SPX的数据电压对应的极性和上一个显示帧输入子像素SPX的数据电压对应的极性相同。例如,上一个显示帧输入子像素SPX的数据电压对应正极性,则当前显示帧输入子像素SPX的数据电压对应正极性。或者,上一个显示帧输入子像素SPX的数据电压对应负极性,则当前显示帧输入子像素SPX的数据电压对应负极性。这样可以降低功耗。
为追求更好的显示效果,提高液晶的性能,显示面板可以采用帧翻转方式,提高液晶分子的显示效果,在实际使用过程中,对液晶分子的翻转采用 电场驱动,使其极性发生翻转。示例性地,图6a与图6b示意出了显示面板采用帧翻转方式时,子像素SPX输入的数据电压在极性翻转时对应的极性。图6a示意出了翻转前显示面板中各子像素SPX输入的数据电压对应的极性。图6b示意出了翻转后显示面板中各子像素SPX输入的数据电压对应的极性。其中,以“+”代表子像素SPX输入的数据电压对应的极性为正极性,“-”代表子像素SPX输入的数据电压对应的极性为负极性。例如,在帧翻转方式中,可以在上一个显示帧内,使每一个子像素SPX输入的数据电压对应的极性均为正极性。在下一个显示帧内,使每一个子像素SPX输入的数据电压对应的极性均为负极性。例如,在帧翻转方式中,在当前刷新频率下,在第1个显示帧至第k个显示帧内,显示面板的子像素SPX充电后的数据电压对应的极性可以均如图6a所示。在第k+1个显示帧至第2k个显示帧中,显示面板的子像素SPX充电后的数据电压对应的极性可以均如图6b所示。
为追求更好的显示效果,提高液晶的性能,显示面板可以采用列翻转方式,提高液晶分子的显示效果,在实际使用过程中,对液晶分子的翻转采用电场驱动,使其极性发生翻转。示例性地,图7a与图7b示意出了显示面板采用列翻转方式时,相邻两个显示帧中,子像素SPX输入的数据电压在极性翻转时对应的极性。图7a示意出了翻转前显示面板中各子像素SPX输入的数据电压对应的极性。图7b示意出了翻转后显示面板中各子像素SPX输入的数据电压对应的极性。其中,以“+”代表子像素SPX输入的数据电压对应的极性为正极性,“-”代表子像素SPX输入的数据电压对应的极性为负极性。例如,在列翻转方式中,一个子像素SPX列中输入的数据电压对应的极性是相同,并且数据电压对应正极性的子像素SPX列和数据电压对应负极性的子像素SPX列交替排列。其中,针对同一个子像素SPX列,在上一个显示帧,该子像素SPX列输入的数据电压对应的极性为正极性。在下一个显示帧,该子像素SPX列输入的数据电压对应的极性则为负极性。以及在上一个显示帧,该子像素SPX列输入的数据电压对应的极性为负极性。在下一个显示帧,该子像素SPX列输入的数据电压对应的极性则为正极性。例如,在列翻转方式 中,在当前刷新频率下,在第1个显示帧至第k个显示帧内,显示面板的子像素SPX充电后的数据电压对应的极性可以均如图7a所示。在第k+1个显示帧至第2k个显示帧中,显示面板的子像素SPX充电后的数据电压对应的极性可以均如图7b所示。
为追求更好的显示效果,提高液晶的性能,显示面板可以采用行翻转方式,提高液晶分子的显示效果,在实际使用过程中,对液晶分子的翻转采用电场驱动,使其极性发生翻转。示例性地,图8a与图8b示意出了显示面板采用行翻转方式时,相邻两个显示帧中,子像素SPX输入的数据电压在极性翻转时对应的极性。图8a示意出了翻转前显示面板中各子像素SPX输入的数据电压对应的极性。图8b示意出了翻转后显示面板中各子像素SPX输入的数据电压对应的极性。其中,以“+”代表子像素SPX输入的数据电压对应的极性为正极性,“-”代表子像素SPX输入的数据电压对应的极性为负极性。例如,在行翻转方式中,一个子像素SPX行中输入的数据电压对应的极性是相同,并且数据电压对应正极性的子像素SPX行和数据电压对应负极性的子像素SPX行交替排列。其中,针对同一个子像素SPX行,在上一个显示帧,该子像素SPX行输入的数据电压对应的极性为正极性。在下一个显示帧,该子像素SPX行输入的数据电压对应的极性则为负极性。以及在上一个显示帧,该子像素SPX行输入的数据电压对应的极性为负极性。在下一个显示帧,该子像素SPX行输入的数据电压对应的极性则为正极性。例如,在行翻转方式中,在当前刷新频率下,在第1个显示帧至第k个显示帧内,显示面板的子像素SPX充电后的数据电压对应的极性可以均如图8a所示。在第k+1个显示帧至第2k个显示帧中,显示面板的子像素SPX充电后的数据电压对应的极性可以均如图8b所示。
为追求更好的显示效果,提高液晶的性能,显示面板可以采用点翻转方式,提高液晶分子的显示效果,在实际使用过程中,对液晶分子的翻转采用电场驱动,使其极性发生翻转。示例性地,图9a与图9b示意出了显示面板采用点翻转方式时,相邻两个显示帧中,子像素SPX输入的数据电压在极性 翻转时对应的极性。图9a示意出了翻转前显示面板中各子像素SPX输入的数据电压对应的极性。图9b示意出了翻转后显示面板中各子像素SPX输入的数据电压对应的极性。其中,以“+”代表子像素SPX输入的数据电压对应的极性为正极性,“-”代表子像素SPX输入的数据电压对应的极性为负极性。例如,在点翻转方式中,每相邻两个子像素SPX中输入的数据电压对应的极性是不同的。其中,针对同一个子像素SPX,在上一个显示帧,该子像素SPX输入的数据电压对应的极性为正极性。在下一个显示帧,该子像素SPX输入的数据电压对应的极性则为负极性。以及在上一个显示帧,该子像素SPX输入的数据电压对应的极性为负极性。在下一个显示帧,该子像素SPX输入的数据电压对应的极性则为正极性。例如,在点翻转方式中,在当前刷新频率下,在第1个显示帧至第k个显示帧内,显示面板的子像素SPX充电后的数据电压对应的极性可以均如图9a所示。在第k+1个显示帧至第2k个显示帧中,显示面板的子像素SPX充电后的数据电压对应的极性可以均如图9b所示。
下面以显示面板采用帧翻转方式为例进行说明。
在本公开实施例中,可以根据如下公式,确定目标值k;
k-a≤f
s/f
0<k+b;
其中,k代表目标值,0≤a≤1,0≤b≤1,f
0代表基准刷新频率,f
s代表当前刷新频率,f
s/f
0代表当前刷新频率与基准刷新频率的比值。
示例性地,可以使a=0,b=1,则目标值k变化为:k≤f
s/f
0<k+1。例如,在显示面板具有的刷新频率可以包括:48Hz、72Hz、96Hz、120Hz、144Hz、192Hz或更高时,f
0=48Hz,则k≤f
s/48Hz<k+1。
在一些示例中,在f
s=48Hz时,则有1≤48Hz/48Hz<1+1,则可以使k=1。则在显示面板的当前刷新频率为48Hz,可以经过1个显示帧控制数据电压对应的极性进行翻转一次。结合图10a所示,显示器的一个显示帧可以包括数据刷新阶段TS和空白时间(Blanking Time)阶段TB。在数据刷新阶段TS,对栅线GA1加载信号ga1,对栅线GA2加载信号ga2,对栅线GA3加载信号ga3,对栅线GA4加载信号ga4,在信号ga1~ga4中出现栅极开启电压(例如 高电平对应的电压)时,可以控制对应的晶体管01导通,以使相应的数据电压输入到像素电极02上。在空白时间阶段TB中,信号ga1~ga4均为低电平,每个子像素SPX中的晶体管01均处于截止状态,各像素电极02保持输入的数据电压。以一个子像素SPX为例,Vda’代表在显示面板的当前刷新频率为48Hz时,加载到该子像素SPX连接的数据线上的数据电压,ΔV’代表该子像素SPX的像素电极实际充入的数据电压与公共电极电压之间电压差。其中,第1个显示帧F1内,输入该子像素SPX的数据电压Vda1对应正极性,则ΔV’=Vda1-Vcom。并且,显示面板的各子像素SPX充电后的数据电压对应的极性可以如图6a所示。第2个显示帧F2内,输入该子像素SPX的数据电压Vda2对应负极性,则ΔV’=Vda2-Vcom,并且显示面板的各子像素SPX充电后的数据电压对应的极性可以如图6b所示。第3个显示帧内,输入该子像素SPX的数据电压Vda1对应正极性,则ΔV’=Vda1-Vcom。并且,显示面板的各子像素SPX充电后的数据电压对应的极性可以如图6a所示。第4个显示帧内,输入该子像素SPX的数据电压Vda2对应负极性,则ΔV’=Vda2-Vcom,并且显示面板的各子像素SPX充电后的数据电压对应的极性可以如图6b所示。其余以此类推,在此不作赘述。需要说明的是,上述仅是以第1个显示帧至第4个显示帧为例进行说明的。其并不是具体指显示面板在实际驱动时的第1个显示帧至第4个显示帧。而是第1个显示帧至第4个显示帧可以指显示面板在显示画面时,选取的4个相邻的显示帧。即,首先,这4个相邻的显示帧中的第1个显示帧出现。之后,这4个相邻的显示帧中的第2个显示帧出现。之后,这4个相邻的显示帧中的第3个显示帧出现。之后,这4个相邻的显示帧中的第4个显示帧出现。
在一些示例中,在f
s=96Hz时,则有2≤96Hz/48Hz<2+1,则可以使k=2。则在显示面板的当前刷新频率为96Hz时,可以经过2个显示帧控制数据电压对应的极性进行翻转一次。结合图10b所示,显示器的一个显示帧可以包括数据刷新阶段TS和空白时间(Blanking Time)阶段TB。在数据刷新阶段TS,对栅线GA1加载信号ga1,对栅线GA2加载信号ga2,对栅线GA3加载信号 ga3,对栅线GA4加载信号ga4,在信号ga1~ga4中出现栅极开启电压(例如高电平对应的电压)时,可以控制对应的晶体管01导通,以使相应的数据电压输入到像素电极02上。在空白时间阶段TB中,信号ga1~ga4均为低电平,每个子像素SPX中的晶体管01均处于截止状态,各像素电极02保持输入的数据电压。以一个子像素SPX为例,Vda”代表在显示面板的当前刷新频率为96Hz时,加载到该子像素SPX连接的数据线上的数据电压,ΔV”代表在显示面板的当前刷新频率为96Hz时,该子像素SPX的像素电极实际充入的数据电压与公共电极电压之间电压差。其中,第1个显示帧F1内,输入该子像素SPX的数据电压Vda1对应正极性,则ΔV”=Vda1-Vcom。并且,显示面板的各子像素SPX充电后的数据电压对应的极性可以如图6a所示。第2个显示帧F2内,输入该子像素SPX的数据电压Vda1对应正极性,则ΔV”=Vda1-Vcom。并且,显示面板的各子像素SPX充电后的数据电压对应的极性可以如图6a所示。第3个显示帧F3内,输入该子像素SPX的数据电压Vda2对应负极性,则ΔV”=Vda2-Vcom。并且,显示面板的各子像素SPX充电后的数据电压对应的极性可以如图6b所示。第4个显示帧F4内,输入该子像素SPX的数据电压Vda2对应负极性,则ΔV”=Vda2-Vcom。并且,显示面板的各子像素SPX充电后的数据电压对应的极性可以如图6b所示。并且,第5个显示帧和第6个显示帧内,显示面板的子像素SPX充电后的数据电压对应的极性可以如图6a所示。第7个显示帧和第8个显示帧内,显示面板的子像素SPX充电后的数据电压对应的极性可以如图6b所示。其余以此类推,在此不作赘述。需要说明的是,上述仅是以第1个显示帧至第8个显示帧为例进行说明的。其并不是具体指显示面板在实际驱动时的第1个显示帧至第8个显示帧。而是第1个显示帧至第8个显示帧可以指显示面板在显示画面时,选取的8个相邻的显示帧。即,首先,这8个相邻的显示帧中的第1个显示帧出现。之后,这8个相邻的显示帧中的第2个显示帧出现。之后,这8个相邻的显示帧中的第3个显示帧出现。之后,这8个相邻的显示帧中的第4个显示帧出现。其余以此类推,在此不作赘述。
以及,结合图10d,第1个显示帧F1和第2个显示帧F2,显示面板的当前刷新频率为48Hz。第3个显示帧F3至第6个显示帧F6,显示面板的当前刷新频率为96Hz。也就是说,显示面板由48Hz切换到了96Hz。其中,第1个显示帧F1内,输入该子像素SPX的数据电压Vda1对应正极性,显示面板的各子像素SPX充电后的数据电压对应的极性可以如图6a所示。第2个显示帧F2内,输入该子像素SPX的数据电压Vda2对应负极性,显示面板的各子像素SPX充电后的数据电压对应的极性可以如图6b所示。第3个显示帧F3内,输入该子像素SPX的数据电压Vda1对应正极性,显示面板的各子像素SPX充电后的数据电压对应的极性可以如图6a所示。第4个显示帧F4内,输入该子像素SPX的数据电压Vda1对应正极性,显示面板的各子像素SPX充电后的数据电压对应的极性可以如图6a所示。第5个显示帧F5内,输入该子像素SPX的数据电压Vda2对应负极性,显示面板的各子像素SPX充电后的数据电压对应的极性可以如图6b所示。第6个显示帧F6内,输入该子像素SPX的数据电压Vda2对应负极性,显示面板的各子像素SPX充电后的数据电压对应的极性可以如图6b所示。需要说明的是,上述仅是以第1个显示帧至第6个显示帧为例进行说明的。其并不是具体指显示面板在实际驱动时的第1个显示帧至第6个显示帧。而是第1个显示帧至第6个显示帧可以指显示面板在显示画面时,选取的6个相邻的显示帧。即,首先,这6个相邻的显示帧中的第1个显示帧出现。之后,这6个相邻的显示帧中的第2个显示帧出现。之后,这6个相邻的显示帧中的第3个显示帧出现。之后,这6个相邻的显示帧中的第4个显示帧出现。其余以此类推,在此不作赘述。
在一些示例中,在f
s=144Hz时,则有3≤144Hz/48Hz<3+1,则可以使k=3。则在显示面板的当前刷新频率为144Hz时,可以经过3个显示帧控制数据电压对应的极性进行翻转一次。结合图10c所示,显示器的一个显示帧可以包括数据刷新阶段TS和空白时间(Blanking Time)阶段TB。在数据刷新阶段TS,对栅线GA1加载信号ga1,对栅线GA2加载信号ga2,对栅线GA3加载信号ga3,对栅线GA4加载信号ga4,在信号ga1~ga4中出现栅极开启电压(例 如高电平对应的电压)时,可以控制对应的晶体管01导通,以使相应的数据电压输入到像素电极02上。在空白时间阶段TB中,信号ga1~ga4均为低电平,每个子像素SPX中的晶体管01均处于截止状态,各像素电极02保持输入的数据电压。以一个子像素SPX为例,Vda”’代表在显示面板的当前刷新频率为144Hz时,加载到该子像素SPX连接的数据线上的数据电压,ΔV”’代表在显示面板的当前刷新频率为144Hz时,该子像素SPX的像素电极实际充入的数据电压与公共电极电压之间电压差。其中,第1个显示帧F1内,输入该子像素SPX的数据电压Vda1对应正极性,则ΔV”’=Vda1-Vcom。并且,显示面板的各子像素SPX充电后的数据电压对应的极性可以如图6a所示。第2个显示帧F2内,输入该子像素SPX的数据电压Vda1对应正极性,则ΔV”’=Vda1-Vcom。并且,显示面板的各子像素SPX充电后的数据电压对应的极性可以如图6a所示。第3个显示帧F3内,输入该子像素SPX的数据电压Vda1对应正极性,则ΔV”’=Vda1-Vcom。并且,显示面板的各子像素SPX充电后的数据电压对应的极性可以如图6a所示。第4个显示帧F4内,输入该子像素SPX的数据电压Vda2对应负极性,则ΔV”’=Vda2-Vcom。并且,显示面板的各子像素SPX充电后的数据电压对应的极性可以如图6b所示。第5个显示帧F5内,输入该子像素SPX的数据电压Vda2对应负极性,则ΔV”’=Vda2-Vcom。并且,显示面板的各子像素SPX充电后的数据电压对应的极性可以如图6b所示。第6个显示帧F6内,输入该子像素SPX的数据电压Vda2对应负极性,则ΔV”’=Vda2-Vcom。并且,显示面板的各子像素SPX充电后的数据电压对应的极性可以如图6b所示。以及,第7个显示帧至第9个显示帧内,显示面板的子像素SPX充电后的数据电压对应的极性可以如图6a所示。第10个显示帧至第12个显示帧内,显示面板的子像素SPX充电后的数据电压对应的极性可以如图6b所示。其余以此类推,在此不作赘述。需要说明的是,上述仅是以第1个显示帧至第12个显示帧为例进行说明的。其并不是具体指显示面板在实际驱动时的第1个显示帧至第12个显示帧。而是第1个显示帧至第12个显示帧可以指显示面板在显示画面时,选取的12个相邻的显 示帧。即,首先,这12个相邻的显示帧中的第1个显示帧出现。之后,这12个相邻的显示帧中的第2个显示帧出现。之后,这12个相邻的显示帧中的第3个显示帧出现。之后,这12个相邻的显示帧中的第4个显示帧出现。其余以此类推,在此不作赘述。
结合图11a至图11b所示,以一个子像素SPX为例,图11a示意出了在显示面板的当前刷新频率为48Hz时,加载到该子像素SPX连接的数据线上的数据电压Vda’,该子像素SPX的像素电极实际充入的数据电压VP’,该子像素SPX的像素电极实际充入的数据电压与公共电极电压之间电压差ΔV’的绝对值|ΔV’|,以及该子像素SPX的亮度LD’。图11b示意出了在显示面板的当前刷新频率为96Hz时,加载到该子像素SPX连接的数据线上的数据电压Vda”,该子像素SPX的像素电极实际充入的数据电压VP”,该子像素SPX的像素电极实际充入的数据电压与公共电极电压之间电压差ΔV”的绝对值|ΔV”|,以及该子像素SPX的亮度LD”。图11c示意出了在显示面板的当前刷新频率为144Hz时,加载到该子像素SPX连接的数据线上的数据电压Vda”’,该子像素SPX的像素电极实际充入的数据电压VP”’,该子像素SPX的像素电极实际充入的数据电压与公共电极电压之间电压差ΔV”’的绝对值|ΔV”’|,以及该子像素SPX的亮度LD”’。通过图11a至图11c可知,通过调整输入到子像素SPX中的数据电压的极性,可以使144Hz、96Hz下输入到子像素SPX中的数据电压的极性的翻转频率,尽可能与48Hz下输入到子像素SPX中的数据电压的极性的翻转频率相同。这样可以使144Hz、96Hz以及48Hz下,|ΔV’|、|ΔV”|以及|ΔV”’|由大→小→大的变化频率差异较小,从而可以使显示面板的亮度由大→小→大的变化频率也差异较小,进而可以使平均亮度Lda’、Lda”、Lda”’也差异较小,甚至使平均亮度Lda’、Lda”、Lda”’基本相同。这样可以改善变频显示时产生的闪烁问题。尤其是,可以改善显示面板的刷新频率从较高刷新频率切换为较低刷新频率时,显示画面亮度增加的问题,保持亮度稳定,提高显示品质和观看体验。
在一些示例中,在f
s=192Hz时,则有4≤192Hz/48Hz<4+1,则可以使k=4。 则在显示面板的当前刷新频率为192Hz时,可以经过4个显示帧控制数据电压对应的极性进行翻转一次。例如,第1个显示帧至第4个显示帧内,显示面板的子像素SPX充电后的数据电压对应的极性可以如图6a所示。第5个显示帧至第8个显示帧内,显示面板的子像素SPX充电后的数据电压对应的极性可以如图6b所示。第9个显示帧至第12个显示帧内,显示面板的子像素SPX充电后的数据电压对应的极性可以如图6a所示。第13个显示帧至第16个显示帧内,显示面板的子像素SPX充电后的数据电压对应的极性可以如图6b所示。其余以此类推,在此不作赘述。需要说明的是,上述仅是以第1个显示帧至第16个显示帧为例进行说明的。其并不是具体指显示面板在实际驱动时的第1个显示帧至第16个显示帧。而是第1个显示帧至第16个显示帧可以指显示面板在显示画面时,选取的16个相邻的显示帧。即,首先,这16个相邻的显示帧中的第1个显示帧出现。之后,这16个相邻的显示帧中的第2个显示帧出现。之后,这16个相邻的显示帧中的第3个显示帧出现。之后,这16个相邻的显示帧中的第4个显示帧出现。其余以此类推,在此不作赘述。
需要说明的是,若相较于48Hz,则96Hz、144Hz、192Hz可以作为较高刷新频率,48Hz可以作为较低刷新频率。若相较于96Hz,则144Hz、192Hz可以作为较高刷新频率,48Hz、96Hz可以作为较低刷新频率。若相较于144Hz,则192Hz可以作为较高刷新频率,48Hz、96Hz、144Hz可以作为较低刷新频率。并且,相较于较高刷新频率,在较低刷新频率下,可以通过将空白时间阶段TB的时长相应的延长一定时间,以达到降低刷新频率的目的。而不同刷新频率下,数据刷新阶段TS的时长可以相同。
本公开实施例提供了另一些显示面板的驱动方法,其针对上述实施例中的实施方式进行了变形。下面仅说明本实施例与上述实施例的区别之处,其相同之处在此不作赘述。
在本公开实施例中,在f
0=48Hz时,若48Hz<f
s<96Hz,则有1<f
s/48Hz<1+1,则可以使k=1。则在显示面板的当前刷新频率f
s满足48Hz<f
s<96Hz时,可以经过1个显示帧控制数据电压对应的极性进行翻转一次。本实施例中的具体 驱动过程,可以与上述经过1个显示帧控制数据电压对应的极性进行翻转一次的实施例基本相同,在此不作赘述。这样可以在显示面板的当前刷新频率f
s满足48Hz<f
s<96Hz范围内时,使其控制数据电压对应的极性进行翻转的频率与48Hz下控制数据电压对应的极性进行翻转的频率相同,进一步改善该刷新频率范围内的亮度差异,降低不同刷新频率切换时出现的亮度差异和闪烁的问题,提高显示品质和观看体验。
在本公开实施例中,在f
0=48Hz时,若96Hz<f
s<144Hz,则有2<f
s/48Hz<2+1,则可以使k=2。则在显示面板的当前刷新频率f
s满足96Hz<f
s<144Hz时,可以经过2个显示帧控制数据电压对应的极性进行翻转一次。本实施例中的具体驱动过程,可以与上述经过2个显示帧控制数据电压对应的极性进行翻转一次的实施例基本相同,在此不作赘述。这样可以在显示面板的当前刷新频率f
s满足96Hz<f
s<144Hz范围内时,使其控制数据电压对应的极性进行翻转的频率与96Hz下控制数据电压对应的极性进行翻转的频率相同,进一步改善该刷新频率范围内的亮度差异,降低不同刷新频率切换时出现的亮度差异和闪烁的问题,提高显示品质和观看体验。
在本公开实施例中,在f
0=48Hz时,若144Hz<f
s<192Hz,则有3<f
s/48Hz<3+1,则可以使k=3。则在显示面板的当前刷新频率f
s满足144Hz<f
s<192Hz时,可以经过3个显示帧控制数据电压对应的极性进行翻转一次。本实施例中的具体驱动过程,可以与上述经过3个显示帧控制数据电压对应的极性进行翻转一次的实施例基本相同,在此不作赘述。这样可以在显示面板的当前刷新频率f
s满足144Hz<f
s<192Hz范围内时,使其控制数据电压对应的极性进行翻转的频率与144Hz下控制数据电压对应的极性进行翻转的频率相同,进一步改善该刷新频率范围内的亮度差异,降低不同刷新频率切换时出现的亮度差异和闪烁的问题,提高显示品质和观看体验。
在本公开实施例中,在f
0=48Hz时,若f
s>192Hz,可以根据k<f
s/48Hz<k+1的原则,确定k的具体值。例如,192Hz<f
s<240Hz,4<f
s/48Hz<4+1,则可以使k=4。则可以经过4个显示帧控制数据电压对应的极性进行翻转一次。本实 施例中的具体驱动过程,可以与上述经过4个显示帧控制数据电压对应的极性进行翻转一次的实施例基本相同,在此不作赘述。这样可以在显示面板的当前刷新频率f
s满足192Hz<f
s<240Hz范围内时,使其控制数据电压对应的极性进行翻转的频率与192Hz下控制数据电压对应的极性进行翻转的频率相同,进一步改善该刷新频率范围内的亮度差异,降低不同刷新频率切换时出现的亮度差异和闪烁的问题,提高显示品质和观看体验。
本公开实施例提供了又一些显示面板的驱动方法,其针对上述实施例中的实施方式进行了变形。下面仅说明本实施例与上述实施例的区别之处,其相同之处在此不作赘述。
在本公开实施例中,可以使a=b,则k-a≤f
s/f
0<k+a,且0<a≤1。例如,可以使a=1,则k-1≤f
s/f
0<k+1,从而可以基于公式k-1≤f
s/f
0<k+1,确定k的数值,以使显示面板在当前刷新频率下,可以经过k个显示帧控制输入到显示面板的子像素SPX中的数据电压对应的极性翻转一次。
本公开实施例提供了又一些显示面板的驱动方法,其针对上述实施例中的实施方式进行了变形。下面仅说明本实施例与上述实施例的区别之处,其相同之处在此不作赘述。
在本公开实施例中,在本公开实施例中,可以使a=b,则k-a≤f
s/f
0<k+a,且0.5≤a≤1。例如,可以使a=0.5,则k-0.5≤f
s/f
0<k+0.5,从而可以基于公式k-0.5≤f
s/f
0<k+0.5,确定k的数值,以使显示面板在当前刷新频率下,可以经过k个显示帧控制输入到显示面板的子像素SPX中的数据电压对应的极性翻转一次。
示例性地,在f
0=48Hz时,若48Hz≤f
s<72Hz,则有1-0.5<f
s/48Hz<1+0.5,则可以使k=1。则在显示面板的当前刷新频率f
s满足48Hz<f
s<72Hz时,可以经过1个显示帧控制数据电压对应的极性进行翻转一次。本实施例中的具体驱动过程,可以参见上述实施例,在此不作赘述。
示例性地,在f
0=48Hz时,若72Hz≤f
s<120Hz,则有2-0.5<f
s/48Hz<2+0.5,则可以使k=2。则在显示面板的当前刷新频率f
s满足72Hz≤f
s<120Hz时,可 以经过2个显示帧控制数据电压对应的极性进行翻转一次。本实施例中的具体驱动过程,可以参见上述实施例,在此不作赘述。
示例性地,在f
0=48Hz时,若120Hz≤f
s<168Hz,则有3-0.5<f
s/48Hz<3+0.5,则可以使k=3。则在显示面板的当前刷新频率f
s满足120Hz≤f
s<168Hz时,可以经过3个显示帧控制数据电压对应的极性进行翻转一次。本实施例中的具体驱动过程,可以参见上述实施例,在此不作赘述。
本公开实施例提供了又一些显示面板的驱动方法,其针对上述实施例中的实施方式进行了变形。下面仅说明本实施例与上述实施例的区别之处,其相同之处在此不作赘述。
在本公开实施例中,基准刷新频率可以小于显示面板具有的多个刷新频率中的最小值。并且,当前刷新频率为显示面板具有的多个刷新频率中的任意一个。例如,显示面板的最小刷新频率为48Hz时,则基准刷新频率可以小于48Hz,例如为30Hz。即显示面板工作在30Hz时,输入到显示面板的子像素中的数据电压对应的极性,经过1个显示帧翻转一次。
在本公开实施例中,在本公开实施例中,可以使基于公式k-0.5≤f
s/f
0<k+0.5或公式k≤f
s/f
0<k+1或公式k-1≤f
s/f
0<k+1,确定k的数值,以使显示面板在当前刷新频率下,可以经过k个显示帧控制输入到显示面板的子像素SPX中的数据电压对应的极性翻转一次。
示例性地,以显示面板的最小刷新频率为48Hz为例,在f
0=30Hz时,若48Hz≤f
s<60Hz,则有1≤f
s/30Hz<2,则可以使k=1。则在显示面板的当前刷新频率f
s满足48Hz≤f
s<60Hz时,可以经过1个显示帧控制数据电压对应的极性进行翻转一次。本实施例中的具体驱动过程,可以参见上述实施例,在此不作赘述。
示例性地,以显示面板的最小刷新频率为48Hz为例,在f
0=30Hz时,若60Hz≤f
s<90Hz,则有2≤f
s/30Hz<3,则可以使k=2。则在显示面板的当前刷新频率f
s满足60Hz≤f
s<90Hz时,可以经过2个显示帧控制数据电压对应的极性进行翻转一次。本实施例中的具体驱动过程,可以参见上述实施例,在 此不作赘述。
示例性地,以显示面板的最小刷新频率为48Hz为例,在f
0=30Hz时,若90Hz≤f
s<120Hz,则有3≤f
s/30Hz<4,则可以使k=3。则在显示面板的当前刷新频率f
s满足90Hz≤f
s<120Hz时,可以经过3个显示帧控制数据电压对应的极性进行翻转一次。本实施例中的具体驱动过程,可以参见上述实施例,在此不作赘述。
示例性地,以显示面板的最小刷新频率为48Hz为例,在f
0=30Hz时,若120Hz≤f
s<144Hz,则有4≤f
s/30Hz<5,则可以使k=4。则在显示面板的当前刷新频率f
s满足120Hz≤f
s<144Hz时,可以经过4个显示帧控制数据电压对应的极性进行翻转一次。本实施例中的具体驱动过程,可以参见上述实施例,在此不作赘述。
本公开实施例提供了又一些显示面板的驱动方法,其针对上述实施例中的实施方式进行了变形。下面仅说明本实施例与上述实施例的区别之处,其相同之处在此不作赘述。
下面以显示面板采用点翻转方式为例进行说明。
在本公开实施例中,可以根据如下公式,确定目标值k;
k-a≤f
s/f
0<k+b;
其中,k代表目标值,0≤a≤1,0≤b≤1,f
0代表基准刷新频率,f
s代表当前刷新频率,f
s/f
0代表当前刷新频率与基准刷新频率的比值。
示例性地,可以使a=0,b=1,则目标值k变化为:k≤f
s/f
0<k+1。例如,在显示面板具有的刷新频率可以包括:48Hz、72Hz、96Hz、120Hz、144Hz、192Hz或更高时,f
0=48Hz,则k≤f
s/48Hz<k+1。
在一些示例中,在f
s=48Hz时,则有1≤48Hz/48Hz<1+1,则可以使k=1。则在显示面板的当前刷新频率为48Hz,可以经过1个显示帧控制数据电压对应的极性进行翻转一次。结合图10a所示,显示器的一个显示帧可以包括数据刷新阶段TS和空白时间(Blanking Time)阶段TB。在数据刷新阶段TS,对栅线GA1加载信号ga1,对栅线GA2加载信号ga2,对栅线GA3加载信号 ga3,对栅线GA4加载信号ga4,在信号ga1~ga4中出现栅极开启电压(例如高电平对应的电压)时,可以控制对应的晶体管01导通,以使相应的数据电压输入到像素电极02上。在空白时间阶段TB中,信号ga1~ga4均为低电平,每个子像素SPX中的晶体管01均处于截止状态,各像素电极02保持输入的数据电压。以一个子像素SPX为例,Vda’代表在显示面板的当前刷新频率为48Hz时,加载到该子像素SPX连接的数据线上的数据电压,ΔV’代表该子像素SPX的像素电极实际充入的数据电压与公共电极电压之间电压差。其中,第1个显示帧F1内,输入该子像素SPX的数据电压Vda1对应正极性,则ΔV’=Vda1-Vcom。并且,显示面板的各子像素SPX充电后的数据电压对应的极性可以如图9a所示。第2个显示帧F2内,输入该子像素SPX的数据电压Vda2对应负极性,则ΔV’=Vda2-Vcom,并且显示面板的各子像素SPX充电后的数据电压对应的极性可以如图9b所示。第3个显示帧内,输入该子像素SPX的数据电压Vda1对应正极性,则ΔV’=Vda1-Vcom。并且,显示面板的各子像素SPX充电后的数据电压对应的极性可以如图9a所示。第4个显示帧内,输入该子像素SPX的数据电压Vda2对应负极性,则ΔV’=Vda2-Vcom,并且显示面板的各子像素SPX充电后的数据电压对应的极性可以如图9b所示。其余以此类推,在此不作赘述。需要说明的是,上述仅是以第1个显示帧至第4个显示帧为例进行说明的。其并不是具体指显示面板在实际驱动时的第1个显示帧至第4个显示帧。而是第1个显示帧至第4个显示帧可以指显示面板在显示画面时,选取的4个相邻的显示帧。即,首先,这4个相邻的显示帧中的第1个显示帧出现。之后,这4个相邻的显示帧中的第2个显示帧出现。之后,这4个相邻的显示帧中的第3个显示帧出现。之后,这4个相邻的显示帧中的第4个显示帧出现。
在一些示例中,在f
s=96Hz时,则有2≤96Hz/48Hz<2+1,则可以使k=2。则在显示面板的当前刷新频率为96Hz时,可以经过2个显示帧控制数据电压对应的极性进行翻转一次。结合图10b所示,显示器的一个显示帧可以包括数据刷新阶段TS和空白时间(Blanking Time)阶段TB。在数据刷新阶段TS, 对栅线GA1加载信号ga1,对栅线GA2加载信号ga2,对栅线GA3加载信号ga3,对栅线GA4加载信号ga4,在信号ga1~ga4中出现栅极开启电压(例如高电平对应的电压)时,可以控制对应的晶体管01导通,以使相应的数据电压输入到像素电极02上。在空白时间阶段TB中,信号ga1~ga4均为低电平,每个子像素SPX中的晶体管01均处于截止状态,各像素电极02保持输入的数据电压。以一个子像素SPX为例,Vda”代表在显示面板的当前刷新频率为96Hz时,加载到该子像素SPX连接的数据线上的数据电压,ΔV”代表在显示面板的当前刷新频率为96Hz时,该子像素SPX的像素电极实际充入的数据电压与公共电极电压之间电压差。其中,第1个显示帧F1内,输入该子像素SPX的数据电压Vda1对应正极性,则ΔV”=Vda1-Vcom。并且,显示面板的各子像素SPX充电后的数据电压对应的极性可以如图9a所示。第2个显示帧F2内,输入该子像素SPX的数据电压Vda1对应正极性,则ΔV”=Vda1-Vcom。并且,显示面板的各子像素SPX充电后的数据电压对应的极性可以如图9a所示。第3个显示帧F3内,输入该子像素SPX的数据电压Vda2对应负极性,则ΔV”=Vda2-Vcom。并且,显示面板的各子像素SPX充电后的数据电压对应的极性可以如图9b所示。第4个显示帧F4内,输入该子像素SPX的数据电压Vda2对应负极性,则ΔV”=Vda2-Vcom。并且,显示面板的各子像素SPX充电后的数据电压对应的极性可以如图9b所示。并且,第5个显示帧和第6个显示帧内,显示面板的子像素SPX充电后的数据电压对应的极性可以如图9a所示。第7个显示帧和第8个显示帧内,显示面板的子像素SPX充电后的数据电压对应的极性可以如图9b所示。其余以此类推,在此不作赘述。需要说明的是,上述仅是以第1个显示帧至第8个显示帧为例进行说明的。其并不是具体指显示面板在实际驱动时的第1个显示帧至第8个显示帧。而是第1个显示帧至第8个显示帧可以指显示面板在显示画面时,选取的8个相邻的显示帧。即,首先,这8个相邻的显示帧中的第1个显示帧出现。之后,这8个相邻的显示帧中的第2个显示帧出现。之后,这8个相邻的显示帧中的第3个显示帧出现。之后,这8个相邻的显示帧中的第4个显示帧出 现。其余以此类推,在此不作赘述。
在一些示例中,在f
s=144Hz时,则有3≤144Hz/48Hz<3+1,则可以使k=3。则在显示面板的当前刷新频率为144Hz时,可以经过3个显示帧控制数据电压对应的极性进行翻转一次。结合图10c所示,显示器的一个显示帧可以包括数据刷新阶段TS和空白时间(Blanking Time)阶段TB。在数据刷新阶段TS,对栅线GA1加载信号ga1,对栅线GA2加载信号ga2,对栅线GA3加载信号ga3,对栅线GA4加载信号ga4,在信号ga1~ga4中出现栅极开启电压(例如高电平对应的电压)时,可以控制对应的晶体管01导通,以使相应的数据电压输入到像素电极02上。在空白时间阶段TB中,信号ga1~ga4均为低电平,每个子像素SPX中的晶体管01均处于截止状态,各像素电极02保持输入的数据电压。以一个子像素SPX为例,Vda”’代表在显示面板的当前刷新频率为144Hz时,加载到该子像素SPX连接的数据线上的数据电压,ΔV”’代表在显示面板的当前刷新频率为144Hz时,该子像素SPX的像素电极实际充入的数据电压与公共电极电压之间电压差。其中,第1个显示帧F1内,输入该子像素SPX的数据电压Vda1对应正极性,则ΔV”’=Vda1-Vcom。并且,显示面板的各子像素SPX充电后的数据电压对应的极性可以如图9a所示。第2个显示帧F2内,输入该子像素SPX的数据电压Vda1对应正极性,则ΔV”’=Vda1-Vcom。并且,显示面板的各子像素SPX充电后的数据电压对应的极性可以如图9a所示。第3个显示帧F3内,输入该子像素SPX的数据电压Vda1对应正极性,则ΔV”’=Vda1-Vcom。并且,显示面板的各子像素SPX充电后的数据电压对应的极性可以如图9a所示。第4个显示帧F4内,输入该子像素SPX的数据电压Vda2对应负极性,则ΔV”’=Vda2-Vcom。并且,显示面板的各子像素SPX充电后的数据电压对应的极性可以如图9b所示。第5个显示帧F5内,输入该子像素SPX的数据电压Vda2对应负极性,则ΔV”’=Vda2-Vcom。并且,显示面板的各子像素SPX充电后的数据电压对应的极性可以如图9b所示。第6个显示帧F6内,输入该子像素SPX的数据电压Vda2对应负极性,则ΔV”’=Vda2-Vcom。并且,显示面板的各子像素SPX充电后 的数据电压对应的极性可以如图9b所示。以及,第7个显示帧至第9个显示帧内,显示面板的子像素SPX充电后的数据电压对应的极性可以如图9a所示。第10个显示帧至第12个显示帧内,显示面板的子像素SPX充电后的数据电压对应的极性可以如图9b所示。其余以此类推,在此不作赘述。需要说明的是,上述仅是以第1个显示帧至第12个显示帧为例进行说明的。其并不是具体指显示面板在实际驱动时的第1个显示帧至第12个显示帧。而是第1个显示帧至第12个显示帧可以指显示面板在显示画面时,选取的12个相邻的显示帧。即,首先,这12个相邻的显示帧中的第1个显示帧出现。之后,这12个相邻的显示帧中的第2个显示帧出现。之后,这12个相邻的显示帧中的第3个显示帧出现。之后,这12个相邻的显示帧中的第4个显示帧出现。其余以此类推,在此不作赘述。
其余翻转方式的原理与上述实施例基本相同,在此不作赘述。
显然,本领域的技术人员可以对本公开进行各种改动和变型而不脱离本公开的精神和范围。这样,倘若本公开的这些修改和变型属于本公开权利要求及其等同技术的范围之内,则本公开也意图包含这些改动和变型在内。
Claims (15)
- 一种显示面板的驱动方法,包括:获取当前显示帧对应的显示数据和当前刷新频率;根据所述当前刷新频率和基准刷新频率之间的比值,确定目标值;所述基准刷新频率不大于所述显示面板具有的多个刷新频率中的最小值;且所述目标值为正整数;基于经过所述目标值个显示帧,控制输入到所述显示面板的子像素中的数据电压对应的极性翻转一次的规则,根据所述显示数据,对各所述子像素输入对应极性的数据电压。
- 如权利要求1所述的驱动方法,其中,根据如下公式,确定所述目标值;k-a≤f s/f 0<k+b;其中,k代表所述目标值,0≤a≤1,0≤b≤1,f 0代表所述基准刷新频率,f s代表所述当前刷新频率。
- 如权利要求2所述的驱动方法,其中,a=0,b=1。
- 如权利要求2所述的驱动方法,其中,a=b。
- 如权利要求4所述的驱动方法,其中,0.5≤a≤1。
- 如权利要求1-5任一项所述的驱动方法,其中,在所述获取当前显示帧对应的显示数据和当前刷新频率之后,且在所述确定目标值之前,还包括:获取上一个显示帧对应的刷新频率;判断上一个显示帧对应的刷新频率和所述当前刷新频率是否相同;所述根据所述当前刷新频率和基准刷新频率之间的比值,确定目标值,具体包括:在所述当前刷新频率和上一个显示帧对应的刷新频率不同时,根据所述当前刷新频率和基准刷新频率之间的比值,确定所述目标值。
- 如权利要求6所述的驱动方法,其中,在所述当前刷新频率和上一个 显示帧对应的刷新频率不同时,针对同一所述子像素,在所述当前显示帧输入所述子像素的数据电压对应的极性和所述上一个显示帧输入所述子像素的数据电压对应的极性不同。
- 如权利要求6所述的驱动方法,其中,在所述当前刷新频率和上一个显示帧对应的刷新频率不同时,针对同一所述子像素,在所述当前显示帧输入所述子像素的数据电压对应的极性和所述上一个显示帧输入所述子像素的数据电压对应的极性相同。
- 如权利要求1-7任一项所述的驱动方法,其中,所述显示面板工作在所述基准刷新频率时,输入到所述显示面板的子像素中的数据电压对应的极性,经过1个显示帧翻转一次。
- 如权利要求1-7任一项所述的驱动方法,其中,所述显示面板采用帧翻转方式、列翻转方式、行翻转方式以及点翻转方式中的至少一种。
- 一种显示装置,包括:时序控制器,被配置为获取当前显示帧对应的显示数据和当前刷新频率,根据所述当前刷新频率和基准刷新频率之间的比值,确定目标值;基于经过所述目标值个显示帧,控制输入到所述显示面板的子像素中的数据电压对应的极性翻转一次的规则,输出极性控制信号,以及输出所述显示数据;其中,所述基准刷新频率不大于所述显示面板具有的多个刷新频率中的最小值;且所述目标值为正整数;源极驱动电路,被配置为接收所述极性控制信号和所述显示数据,并根据所述极性控制信号和所述显示数据,对各所述子像素输入对应极性的数据电压。
- 如权利要求11所述的显示装置,其中,所述时序控制器进一步被配置为:获取上一个显示帧对应的刷新频率;判断上一个显示帧对应的刷新频率和所述当前刷新频率是否相同;在所述当前刷新频率和上一个显示帧对应的刷新频率不同时,根据所述 当前刷新频率和基准刷新频率之间的比值,确定所述目标值。
- 如权利要求12所述的显示装置,其中,所述时序控制器进一步被配置为:在所述当前刷新频率和上一个显示帧对应的刷新频率不同时,针对同一所述子像素,在所述当前显示帧输入所述子像素的数据电压对应的极性和所述上一个显示帧输入所述子像素的数据电压对应的极性不同。
- 如权利要求12所述的显示装置,其中,所述时序控制器进一步被配置为:在所述当前刷新频率和上一个显示帧对应的刷新频率不同时,针对同一所述子像素,在所述当前显示帧输入所述子像素的数据电压对应的极性和所述上一个显示帧输入所述子像素的数据电压对应的极性相同。
- 如权利要求11-14任一项所述的显示装置,其中,所述源极驱动电路设置为多个,不同所述源极驱动电路电连接所述显示面板中不同的数据线。
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JP4111785B2 (ja) * | 2001-09-18 | 2008-07-02 | シャープ株式会社 | 液晶表示装置 |
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CN105304048B (zh) * | 2015-11-18 | 2018-03-30 | 深圳市华星光电技术有限公司 | 液晶显示装置的动态驱动方法 |
CN105319786B (zh) * | 2015-11-26 | 2018-06-19 | 深圳市华星光电技术有限公司 | 具有低切换频率的数据线驱动极性的阵列基板 |
CN105448256B (zh) * | 2015-12-22 | 2019-04-05 | 昆山龙腾光电有限公司 | 液晶显示装置及其驱动方法 |
CN105629606A (zh) * | 2016-01-13 | 2016-06-01 | 深圳市华星光电技术有限公司 | 液晶显示面板及其驱动方法 |
CN106773420B (zh) * | 2017-02-06 | 2019-11-05 | 京东方科技集团股份有限公司 | 一种阵列基板、显示装置及其驱动方法 |
CN113284470B (zh) * | 2021-05-26 | 2023-04-25 | 惠科股份有限公司 | 一种公共电压补偿方法及液晶显示装置 |
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US20140225881A1 (en) * | 2011-08-12 | 2014-08-14 | Sharp Kabushiki Kaisha | Display device |
CN104115216A (zh) * | 2012-02-20 | 2014-10-22 | 夏普株式会社 | 驱动装置和显示装置 |
CN107615369A (zh) * | 2015-06-05 | 2018-01-19 | 夏普株式会社 | 控制装置、显示装置、控制方法、及控制程序 |
CN114120933A (zh) * | 2021-12-06 | 2022-03-01 | 京东方科技集团股份有限公司 | 显示面板的驱动方法及显示装置 |
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