WO2023097575A1

WO2023097575A1 - Devices and methods for wirelesscommunication in a wireless network

Info

Publication number: WO2023097575A1
Application number: PCT/CN2021/134846
Authority: WO
Inventors: Avner Epstein; Yaron Ben-Arie; Qing Zhou; Shimon SHILO; Doron Ezri
Original assignee: Huawei Technologies Co.,Ltd.
Priority date: 2021-12-01
Filing date: 2021-12-01
Publication date: 2023-06-08

Abstract

A wireless transceiver is provided for transmitting to each of a plurality of wireless receivers one or more data packets. The wireless transceivercomprisesa processing circuitry configured to generate for each wireless receiver the one or more data packets and to allocate a downlink transmission data rate for each wireless receiver. The wireless transceiver further comprisesa buffer memory configured to store the one or more data packets, wherein the processing circuitry is further configured to dynamically allocate to each of the plurality of wireless receivers a memory portion of the buffer memory based on the respective downlink transmission data rate. The wireless transceiver further comprises a communication interface configured to obtain the one or more data packets for each wireless receiver from the buffer memory and to transmit the one or more data packets to the respective wireless receiver with the respective downlink transmission data rate.

Description

Devices and methods for wirelesscommunication in a wireless network

TECHNICAL FIELD

The present disclosure relates to wireless communications. More specifically, the present disclosure relates to devices and methods for wireless communication in a wireless communication network.

BACKGROUND

IEEE802.11-based WLANs (also referred to as Wi-Fi networks) have become popular at an unprecedented rate. The upcoming IEEE802.11 be standard requires an ultra-high air rate of 23Gbps. In order to handle such an ultra-high air rate it is likely that the MAC-PHY structure of a wireless transceiver is going to be very complex and may require a high level of internal buffering to store data from an external host memory on its way to be transmitted as well as in the opposite direction when receiving data over the air. In a multi-user scenario with a variable transmission/reception capacity per wireless receiver, i.e. user, it is a challenging task to allocate the right, yet efficient amount of a buffer memory of the wireless transceiver with minimal buffering per userand no overruns or underruns of the buffer memory.

SUMMARY

It is an objective to provide an improved wireless transceiverfor wireless communication in a wireless network, in particular an IEEE 802.11 based wireless communication network, i.e. a Wi-Fi network, as well as a corresponding method.

The foregoing and other objectives are achieved by the subject matter of the independent claims. Further implementation forms are apparent from the dependent claims, the description and the figures.

According to a first aspect a wireless transceiver is provided for transmitting to each of a plurality of wireless receivers one or more data packets in a wireless communication network. The wireless communication network may be a WLAN in accordance with the 802.11 framework of standards, i.e. a Wi-Fi network. The wireless transceiver may be an access point, AP, and the plurality of wireless receivers may be a respective non-AP station of the WLAN.

The wireless transceiver comprisesa processing circuitry configured to generate for each wireless receiver the one or more data packets and to allocate a downlink transmission data rate for each wireless receiver. The wireless transceiver further comprises a physical buffer memory configured to store the one or more data packets for each wireless receiver. The processing circuitry is further configured to dynamically allocate to each of the plurality of wireless receivers a respective memory portion of the buffer memory based on the respective downlink transmission data rate. The wireless transceiver further comprises a PHY layer communication interface configured to obtain the one or more data packets for each wireless receiver from the buffer memory and to transmit the one or more data packets to the respective wireless receiver with the respective downlink transmission data rate during a current transmission session.

Thus, a wireless transceiver is provided with an efficient, adaptive, low-cost and minimal buffer memory with an adaptive size per wireless receiver (herein also referred to as user) according to its rate for the upcoming transmission, which may be an OFDMA or MU-MIMO packet. The wireless transceiver makes beneficial use of the fact that the MAC layer of the wireless transceiver generally defines the structure of the next multi-user packet to be transmitted or received, in particular the number of wireless receivers, i.e. users, their transmission data rates and the respective amount of data.

In a further possible implementation form, the processing circuitry of the wireless transceiver is further configured to implement for each of the plurality of wireless receivers a respective transmission chain, wherein each transmission chain is configured to generate the one or more data packets for the respective wireless receiver. The processing circuitry may be configured to operate these different transmission chains substantially in parallel.

In a further possible implementation form, the buffer memory is configured to store the one or more data packets for each wireless receiver as a MAC protocol data unit, MPDU, or a MAC service data unit, MSDU. Thus, the buffer memory may receive the one or more data packets from the MAC layer of the wireless transceiver.

In a further possible implementation form, the communication interface of the wireless transceiver is configured to transmit the one or more data packets to the respective wireless receiver, i.e. user with the respective downlink transmission data rate as a Physical protocol data unit, PPDU, or a Physical service data unit, PSDU. Thus, the buffer memory may provide the one or more data packets to the PHY layer of the wireless transceiver.

In a further possible implementation form, the buffer memory comprises a fixed size memory.

In a further possible implementation form, the wireless transceiver further comprises a main memory (also referred to as host memory) and a communication bus, wherein the buffer memory is configured to receive the one or more data packets for each wireless receiver from the main memory via the communication bus.

In a further possible implementation form, the buffer memory is configured to receive the one or more data packets for each wireless receiver from the main memory via the communication bus in accordance with the respective downlink transmission data rate.

In a further possible implementation form, the communication interface is further configured to obtain the one or more data packets for each wireless receiver from the buffer memory in a sequence based on an order of the plurality of wireless receivers.

In a further possible implementation form, the communication interface is configured to obtain the one or more data packets for each wireless receiver from the buffer memory in a sequence based on an order of the plurality of wireless receivers and the respective downlink transmission data rate for each wireless receiver.

In a further possible implementation form, the processing circuitry is configured to generate a vector defining the order of the plurality of wireless receivers and the respective downlink transmission data rate for each wireless receiver.

In a further possible implementation form, the wireless transceiver is a wireless access point, AP, wherein the communication interface is further configured to obtain one or more further uplink data packets from each of the wireless receivers, e.g. non-AP stations.

In a further possible implementation form, the buffer memory of the wireless transceiver is further configured to store the one or more further data packets, wherein the processing circuitry is further configured to dynamically allocate to each of the plurality of wireless receivers a respective further memory portion of the buffer memory based on a respective uplinktransmission data rateallocatedto each wireless receiver.

In a further possible implementation form, the processing circuitry of the wireless transceiver is further configured to allocate the respective uplink transmission data rate to each of the plurality of wireless receivers.

According to a second aspect a method is provided for transmitting to each of a plurality of wireless receivers, i.e. users one or more data packets. The method comprises the steps of:

generating for each wireless receiver the one or more data packets and to allocate a downlink transmission data rate for each wireless receiver;

storing the one or more data packets for each wireless receiver in a buffer memory, wherein a respective memory portion of the buffer memory is allocated to each of the plurality of wireless receivers based on the respective downlink transmission data rate;

obtaining the one or more data packets for each wireless receiver from the buffer memory and transmitting the one or more data packets to the respective wireless receiver with the respective downlink transmission data rate during a current transmission session.

The method according to the second aspect of the present disclosure can be performed by thewireless transceiveraccording to the first aspect of the present disclosure. Thus, further features of the method according to the second aspect of the present disclosure result directly from the functionality of the wireless transceiveraccording to the first aspect of the present disclosure as well as its different implementation forms described above and below.

According to a third aspect a computer program product is provided, comprising a computer-readable storage medium for storing program code which causes a computer or a processor to perform the method according to the second aspect, when the program code is executed by the computer or the processor.

Details of one or more embodiments are set forth in the accompanying drawings and the description below. Other features, objects, and advantages will be apparent from the description, drawings, and claims.

BRIEF DESCRIPTION OF THE DRAWINGS

In the following, embodiments of the present disclosure are described in more detail with reference to the attached figures and drawings, in which:

Fig. 1 shows an exemplary wireless communication system including a wireless transceiver in the form of an AP and a plurality of non-AP stations according to an embodiment;

Fig. 2a shows a schematic diagram illustrating an exemplary buffer memory allocation implemented by a wireless transceiver according to an embodiment;

Fig. 2b shows a schematic diagram illustrating components of a wireless transceiver according to an embodiment, including a buffer memory;

Fig. 3 shows a schematic diagram illustrating a further exemplary buffer memory allocation implemented by a wireless transceiver according to an embodiment;

Fig. 4 shows a table illustrating a different transmission patterns implemented by a wireless transceiver according to an embodiment to transmit to a different number of wireless receivers with different data rates; and

Fig. 5 shows a flow diagram illustrating steps of a method of transmitting to each of a plurality of wireless receivers, i.e. users one or more data packets.

In the following, identical reference signs refer to identical or at least functionally equivalent features.

DETAILED DESCRIPTION OF THE EMBODIMENTS

In the following description, reference is made to the accompanying figures, which form part of the disclosure, and which show, by way of illustration, specific aspects of embodiments of the present disclosure or specific aspects in which embodiments of the present disclosure may be used. It is understood that embodiments of the present disclosure may be used in other aspects and comprise structural or logical changes not depicted in the figures. The following detailed description, therefore, is not to be taken in a limiting sense, and the scope of the present disclosure is defined by the appended claims.

For instance, it is to be understood that a disclosure in connection with a described method may also hold true for a corresponding device or system configured to perform the method and vice versa. For example, if one or a plurality of specific method steps are described, a corresponding device may include one or a plurality of units, e.g. functional units, to perform the described one or plurality of method steps (e.g. one unit performing the one or plurality of steps, or a plurality of units each performing one or more of the plurality of steps) , even if such one or more units are not explicitly described or illustrated in the figures. On the other hand, for example, if a specific apparatus is described based on one or a plurality of units, e.g. functional units, a corresponding method may include one step to perform the functionality of the one or plurality of units (e.g. one step performing the functionality of the one or plurality of units, or a plurality of steps each performing the functionality of one or more of the plurality of units) , even if such one or plurality of steps are not explicitly described or illustrated in the figures. Further, it is understood that the features of the various exemplary embodiments and/or aspects described herein may be combined with each other, unless specifically noted otherwise.

Figure 1 shows a wireless communication system 100 including wireless transceiver 110 in the form of an access point (AP) 110 configured to communicate with a plurality of wireless receivers (or users) 120, in the form of associated non-AP stations 120, which together may define a BSS.

As illustrated in figure 1 and as will be described in more detail below, the wireless transceiver in the form of the AP 110 comprises a processing circuitry or processor 111 and a communication interface 113, in particular a communication interface 113 in accordance with the 802.11 standards. The processing circuitry 111 may be implemented in hardware and/or software and may comprise digital circuitry, or both analog and digital circuitry. Digital circuitry may comprise components such as application-specific integrated circuits (ASICs) , field-programmable arrays (FPGAs) , digital signal processors (DSPs) , or general-purpose processors. As will be described in more detail below, the AP 110 further comprise a buffer memory 115. The AP 110 may comprise one or more further memories configured to store executable program code which, when executed by the processing circuitry 111, causes the AP 110 to perform the functions and methods described herein.

Likewise, the non-AP stations 120 may comprise a processing circuitry or processor 121 and a communication interface 123, in particular a communication interface 123 in accordance with the 802.11 standards. The processing circuitry 121 may be implemented in hardware and/or software and may comprise digital circuitry, or both analog and digital circuitry. Digital circuitry may comprise components such as application-specific integrated circuits (ASICs) , field-programmable arrays (FPGAs) , digital signal processors (DSPs) , or general-purpose processors. As will be described in more detail below, each non-AP station 120 comprises a buffer memory 125. In addition to the buffer memory 125 each non-AP station 120 may comprise one or more further memories configured to store executable program code which, when executed by the processing circuitry 121, causes eachnon-AP station 120 to perform the functions and methods described herein.

In the following an embodiment will be described of the wireless transceiver implemented as the AP 110 under further reference to figures 2a, 2b, 3 and 4. As will be appreciated, however, the wireless transceiver according to an embodiment may be also implemented as one of the plurality of non-AP stations 120.

As already described above, the wireless transceiver in the form of the AP 110 is configuredto transmit to each of the plurality of wireless receivers, i.e. users 120 one or more data packets. The processing circuitry 111 of the AP is configured to generate for each wireless receiver 120 the one or more data packets and to allocate a downlink transmission data rate for each wireless receiver 120. In an embodiment, the processing circuitry 111 of the wireless transceiver 110 is configured to implement for each of the plurality of wireless receivers 120 a respective transmission chain, wherein each transmission chain is configured to generate the one or more data packets for the respective wireless receiver 120. The processing circuitry 111 may be configured to operate these different transmission chains substantially in parallel.

The buffer memory 115 of the wireless transceiver in the form of the AP 110 is configured to store the one or more data packets for each wireless receiver 120. In anembodiment, the buffer memory 115 is a fixed size memory 115. The processing circuitry 111 of the wireless transceiver 110is further configured to allocate to each of the plurality of wireless receivers, i.e. users120 a memory portion 115a-n of the buffer memory 115 based on the respective downlink transmission data rate. The communication interface 113 of the wireless transceiver 110is configured to obtain the one or more data packets for each wireless receiver, i.e. user 120 from the buffer memory 115 and to transmit the one or more data packets to the respective wireless receiver, i.e. user 120 with the respective downlink transmission data rate.

In an embodiment, the buffer memory 115 is configured to store the one or more data packets for each wireless receiver 120 as a MAC protocol data unit, MPDU, or a MAC service data unit, MSDU. Thus, the buffer memory 115 may receive the one or more data packets from the MAC layer of the wireless transceiver 110. In an embodiment, the communication interface 113 of the wireless transceiver 110 is configured to transmit the one or more data packets to the respective wireless receiver, i.e. user 120 with the respective downlink transmission data rate as a Physical protocol data unit, PPDU, or a Physical service data unit, PSDU. Thus, the buffer memory 115 may provide the one or more data packets to the PHY layer of the wireless transceiver 110.

An exemplary allocation of a plurality of memory portions 115a-n of the buffer memory 115 to 64 wireless receivers, i.e. users 120 is illustrated in figure 2a. In the example shown in figure 2a, the processing circuitry 111 of the wireless transceiver 110 allocates the largest memory portion of the buffer memory 115 to the wireless receiver, i.e. user 3 having the largest downlink transmission data rate. A similar example for the allocation of the memory portions 115a-n of the buffer memory 115 to the 64 wireless receivers, i.e. users 120 is illustrated in figure 3. In the example shown in figure 3, the processing circuitry 111 of the wireless transceiver 110 allocates the largest memory portions of the buffer memory 115 to the wireless receivers, i.e.

users

3, 4 and 62 having the largest downlink transmission data rate, while the smallest memory portions of the buffer memory 115 are allocated to the wireless receivers, i.e. users 2, 61 and 63 having the smallest downlink transmission data rate.

Figure 2b shows a schematic diagram illustrating a further embodiment of the wireless transceiver 110. In the embodiment shown in figure 2b, the wireless transceiver 110 comprises in addition to the buffer memory 115 with the plurality of memory portions 115a-n (referred to as low-level transmission, LLTX, user buffers in figure 2b) allocated to each wireless receiver, i.e. user and the communication interface 113, a direct memory access, DMA, unit 116 for accessing a host memory of the wireless transceiver 110, a LLTX unit 117, a security unit 118 as well as LDPC encoders 119. One or more of these additional units may be implemented by the processing circuitry 111 of the wireless transceiver 110. The LLTX unit 117 performs several tasks on each incoming 802.3 MSDU, including but not limited to, packet header conversion from 802.3 header in the MSDU to 802.11 header, thus the MSDU becomes an MPDU. The security unit 118 encrypts each MPDU payload by AES encryption protocol, as defined in the 802.11 standard. The LDPC encoders 119 code each MPDU with Forward Error Correction code to enable better detection and error recovery in the receiving side. In an embodiment, the buffer memory 115 is configured to receive the one or more data packets for each wireless receiver 120 from the host ormain memory via a communication bus. In an embodiment, the buffer memory 115 is configured to receive the one or more data packets for each wireless receiver 120 from the main memory via the communication bus in accordance with the respective downlink transmission data rate. As will be appreciated, while figure 2b shows an embodiment of the wireless transceiver 110 for the transmission case, in a reception embodiment of the wireless transceiver 110 the LDPC encoders 119 are replaced by LDPC decoders and the LLTX unit 117 is replaced by a LLRX unit configured to essentially perform the inverse operations of the LLTX unit 117.

In an embodiment, the communication interface 113 is further configured to obtain the one or more data packets for each wireless receiver 120 from the buffer memory 115 in a sequence based on an order of the plurality of wireless receivers 120. In an embodiment, the communication interface 113 is configured to obtain the one or more data packets for each wireless receiver 120 from the buffer memory 120 in a sequence based on an order of the plurality of wireless receivers 120 and the respective downlink transmission data rate for each wireless receiver 120. In an embodiment, the processing circuitry 111 is configured to generate a vector defining the order of the plurality of wireless receivers 120 and the respective downlink transmission data rate for each wireless receiver 120, as will be described in more detail below under further reference to figure 4.

Figure 4 shows a table illustrating different transmission patterns implemented by the wireless transceiver 110 according to an embodiment to transmit to a different number of wireless receivers 120 with different data rates. As already described above and illustrated in figure 4, the buffer memory 115 for all users 120is dynamically partitioned between all users 120 according to their downlink transmission rate. The table shown in figure 4 illustrates in its different rows different transmission scenarios for the AP 110, namely a transmission to a single user 120 (e.g. user "0" ) , a transmission to eight users (as an example, for simplicity –while the real number of users may be higher or lower) 120 (e.g. users "0" to "7" ) with the same downlink transmission data rate, a transmission to six users 120 (e.g. users "0" to "5" ) with a higher downlink transmission data rate for two of these users (namely users "0" and "1" ) , and a transmission to five users 120 (e.g. users "0" to "4" ) with a higher downlink transmission data rate for one of these users (namely user "0" ) . The respective rows of the table shown in figure 4 further illustrate in what order (which may be defined by subsequent time slots) the data packets may be obtained from the buffer memory 115 and transmitted by the communication interface 113 to the user (s) 120 to achieve the respective downlink transmission data rate for each of the users 120.

As illustrated in the second row of the table shown in figure 4, for the single user transmission scenario all transmission slots may be used for the single user "0" that receives data packets at the full rate. This transmission pattern may be represented by a vector (0, 0, 0, 0, 0, 0, 0, 0) .

For the transmission to eight users 120 (e.g. users "0" to "7" ) with the same downlink transmission data rate (shown in the third two of the table) each of the exemplary eight time slots may be used for transmitting to a different one of the eight users 120. This transmission pattern may be represented by a vector (0, 1, 2, 3, 4, 5, 6, 7) . This results in a transmission rate for each of the users 120 being 1/8 of the full rate.

Forthe transmission to six users 120 (e.g. users "0" to "5" ) with a higher downlink transmission data rate for two of these users (namely users "0" and "1" ) , thetransmission pattern defined by the vector (0, 2, 1, 3, 0, 4, 1, 5) may be used.

For the transmission to five users 120 (e.g. users "0" to "4" ) with a higher downlink transmission data rate for one of these users (namely user "0" ) , the transmission pattern defined by the vector (0, 0, 0, 0, 1, 2, 3, 4) may be used, or the vector (0, 1, 0, 2, 0, 3, 0, 4) may also be used

Thus, as will be appreciated, the transmission order for the users 120 may be defined by a vector, wherein the components of the vector comprise an identifier of a respective user 120. In this way the users’ rate may be expressed by the number of times an identifier appears in this vector. As will be further appreciated, the users 120 for each transmission scenario illustrated in the table shown in figure 4 are scanned from "0" to "7" using a weighted round robin scheme. In an embodiment, this weighted round robin (WRR) scheme may be implemented by the wireless transceiver 110 for reading data for each user 120 from the main memory, MAC layer processing for each user 120 and/or reading data for each user 120 from the buffer memory 115.

As will be appreciated, the embodiments of the

wireless transceiver

110, 120 described above relate to the transmission case, e.g. the downlink transmission case for the AP 110 for transmitting the one or more data packets to the non-AP stations 120. However, as already mentioned above, in an embodiment, the communication interface 113 is further configured to obtain one or more uplink data packets from each of the wireless receivers, e.g. non-AP stations 120. In an embodiment, the uplink or reception processing path of the wireless transceiver may be implemented in parallel and similar to the downlink or transmission processing path illustrated in figure 2b. As already described above, in such an embodiment, the LDPC encoders 119 are replaced by LDPC decoders and the LLTX unit 117 is replaced by a LLRX unit configured to essentially perform the inverse operations of the LLTX unit 117.

In an embodiment, the buffer memory 115 of the AP 110 is further configured to store the one or more uplink data packets, wherein the processing circuitry 111 is further configured to dynamically allocate to each of the plurality of non-AP stations120 a respective further memory portion of the buffer memory 115 based on a respective uplink transmission data rate allocated to each non-AP station 120. In an embodiment, the processing circuitry 111 of the AP 110 is further configured to allocate the respective uplink transmission data rate to each of the plurality of non-AP stations 120.

Fig. 5 is a flow diagram illustrating a method 500for transmitting one or more data packets to each of a plurality of wireless receivers, such as the plurality of non-AP stations 120 or a plurality of APs as the AP 110 shown in figure 1. The method 500 comprisesa step 501 of generating for each

wireless receiver

110, 120 the one or more data packets and allocating a downlink transmission data rate for each

wireless receiver

110, 120. Furthermore, the method 500 comprises a step 503 of storing, i.e. buffering the one or more data packets for each

wireless receiver

110, 120 in the

buffer memory

115, 125 of the

wireless receiver

110, 120. As already described above, a memory portion 115a-n of the

buffer memory

115, 125 is allocated to each of the plurality of

wireless receivers

110, 120 based on the respective downlink transmission data rate. The method 500 further comprises a step 505 of obtaining the one or more data packets for each

wireless receiver

110, 120 from the

buffer memory

115, 125. Moreover, the method 500 comprises a step 507 of transmitting the one or more data packets to the

respective wireless receiver

110, 120 with the respective downlink transmission data rate.

As the method 500 can be implemented by the AP 110 or each of the non-AP stations 120, further features of the method 500 result directly from the functionality of the AP 110 and the non-AP stations 120 and their different embodiments described above and below.

The person skilled in the art will understand that the "blocks" ( "units" ) of the various figures (method and apparatus) represent or describe functionalities of embodiments of the present disclosure (rather than necessarily individual "units" in hardware or software) and thus describe equally functions or features of apparatus embodiments as well as method embodiments (unit = step) .

In the several embodiments provided in the present application, it should be understood that the disclosed system, apparatus, and method may be implemented in other manners. For example, the described embodiment of an apparatus is merely exemplary. For example, the unit division is merely logical function division and may be another division in an actual implementation. For example, a plurality of units or components may be combined or integrated into another system, or some features may be ignored or not performed. In addition, the displayed or discussed mutual couplings or direct couplings or communication connections may be implemented by using some interfaces. The indirect couplings or communication connections between the apparatuses or units may be implemented in electronic, mechanical, or other forms.

The units described as separate parts may or may not be physically separate, and parts displayed as units may or may not be physical units, may be located in one position, or may be distributed on a plurality of network units. Some or all of the units may be selected according to actual needs to achieve the objectives of the solutions of the embodiments.

In addition, functional units in the embodiments disclosed herein may be integrated into one processing unit, or each of the units may exist alone physically, or two or more units are integrated into one unit.

Claims

A wireless transceiver (110, 120) for transmitting to each of a plurality of wireless receivers (110, 120) one or more data packets, wherein the wireless transceiver (110, 120) comprises:

a processing circuitry (111, 121) configured to generate for each wireless receiver (110, 120) the one or more data packets and toallocatea downlink transmission data rate for each wireless receiver (110, 120) ;

a buffer memory (115, 125) configured to store the one or more data packets for each wireless receiver (110, 120) , wherein the processing circuitry (111, 121) is further configured toallocate to each of the plurality of wireless receivers a memory portion of the buffer memory (115, 125) based on the respective downlink transmission data rate; and

a communication interface (113, 123) configured to obtain the one or more data packets for each wireless receiver from the buffer memory (115, 125) and to transmit the one or more data packets to the respective wireless receiver (110, 120) with the respective downlink transmission data rate.
The wireless transceiver (110, 120) of claim 1, wherein the processing circuitry (111, 121) is configured to implement for each of the plurality of wireless receivers (110, 120) a respective transmission chain, wherein each transmission chain is configured to generate the one or more data packets for the respective wireless receiver (110, 120) .
The wireless transceiver (110, 120) of claim 1 or 2, wherein the buffer memory (115, 125) is configured to store the one or more data packets for each wireless receiver (110, 120) as a MAC protocol data unit, MPDU, or a MAC service data unit, MSDU.
The wireless transceiver (110, 120) of any one of the preceding claims, wherein the communication interface (113, 123) is configured to transmit the one or more data packets to the respective wireless receiver (110, 120) with the respective downlink transmission data rate as a Physical protocol data unit, PPDU, or a Physical service data unit, PSDU.
The wireless transceiver (110, 120) of any one of the preceding claims, wherein the buffer memory (115, 125) comprises a fixed size memory.
The wireless transceiver (110, 120) of any one of the preceding claims, wherein the wireless transceiver (110, 120) further comprises a main memory and a communication bus and wherein the buffermemory (115, 125) isconfigured to receivethe one or more data packets for each wireless receiver (110, 120) from the main memory via the communication bus.
The wireless transceiver (110, 120) of claim 6, wherein the buffer memory (115, 125) isconfigured to receive the one or more data packets for each wireless receiver (110, 120) from the main memory via the communication bus in accordance with the respective downlink transmission data rate.
The wireless transceiver (110, 120) of any one of the preceding claims, wherein thecommunication interface (113, 123) is configured to obtain the one or more data packets for each wireless receiver (110, 120) from the buffer memory (115, 125) in a sequence based on an order of the plurality of wireless receivers (110, 120) .
The wireless transceiver (110, 120) of claim 7, wherein the communication interface (113, 123) is configured to obtain the one or more data packets for each wireless receiver (110, 120) from the buffer memory (115, 125) in a sequence based on an order of the plurality of wireless receivers (110, 120) and the respective downlink transmission data rate for each wireless receiver (110, 120) .
The wireless transceiver (110, 120) of claim 9, wherein the processing circuitry (111, 121) is configured to generate a vector defining the order of the plurality of wireless receivers (110, 120) and the respective downlink transmission data rate for each wireless receiver (110, 120) .
The wireless transceiver (110, 120) of any one of the preceding claims, wherein the wireless transceiver (110, 120) is a wireless access point, AP, (110) or a wireless non-AP station (120) in compliance with the 802.11 standards.
The wireless transceiver (110) of any one of the preceding claims, wherein the wireless transceiver (110) is a wireless access point, AP, (110) and wherein the communication interface (113) is configured to obtain one or more further data packets from each of the wireless receivers (120) .
The wireless transceiver (110) of claim 12, wherein the buffer memory (115) is further configured to store the one or more further data packets and wherein the processing circuitry (111) is further configured to allocate to each of the plurality of wireless receivers (120) a further memory portion of the buffer memory (115) based on a respective uplinktransmission data rateallocatedto each wireless receiver (120) .
The wireless transceiver (110) of claim 13, wherein the processing circuitry (111) is further configured to allocate the respective uplink transmission data rate to each of the plurality of wireless receivers (120) .
A method (500) for transmitting to each of a plurality of wireless receivers (110, 120) one or more data packets, wherein the method (500) comprises:

generating (501) for each wireless receiver (110, 120) the one or more data packets and allocating a downlink transmission data rate for each wireless receiver (110, 120) ;

storing (503) the one or more data packets for each wireless receiver (110, 120) in a buffer memory (115, 125) , wherein a memory portion of the buffer memory (115, 125) is allocated to each of the plurality of wireless receivers (110, 120) based on the respective downlink transmission data rate;

obtaining (505) the one or more data packets for each wireless receiver (110, 120) from the buffer memory (115, 125) ; and

transmitting (507) the one or more data packets to the respective wireless receiver (110, 120) with the respective downlink transmission data rate.
A computer program product comprising a computer-readable storage medium for storing program code which causes a computer or a processor to perform the method (500) of claim 15, when the program code is executed by the computer or the processor.