WO2023093202A1 - 摄像***及无人设备 - Google Patents

摄像***及无人设备 Download PDF

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Publication number
WO2023093202A1
WO2023093202A1 PCT/CN2022/117260 CN2022117260W WO2023093202A1 WO 2023093202 A1 WO2023093202 A1 WO 2023093202A1 CN 2022117260 W CN2022117260 W CN 2022117260W WO 2023093202 A1 WO2023093202 A1 WO 2023093202A1
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WIPO (PCT)
Prior art keywords
substrate
camera system
repeaters
branch line
repeater
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PCT/CN2022/117260
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English (en)
French (fr)
Inventor
许海
钟岳
孙涛
蔡小川
Original Assignee
北京三快在线科技有限公司
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Publication of WO2023093202A1 publication Critical patent/WO2023093202A1/zh

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    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04B—TRANSMISSION
    • H04B7/00—Radio transmission systems, i.e. using radiation field
    • H04B7/14—Relay systems
    • H04B7/15—Active relay systems
    • H04B7/155—Ground-based stations
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04B—TRANSMISSION
    • H04B7/00—Radio transmission systems, i.e. using radiation field
    • H04B7/14—Relay systems
    • H04B7/15—Active relay systems
    • H04B7/155—Ground-based stations
    • H04B7/15528—Control of operation parameters of a relay station to exploit the physical medium
    • H04B7/15542—Selecting at relay station its transmit and receive resources
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N23/00—Cameras or camera modules comprising electronic image sensors; Control thereof
    • H04N23/50—Constructional details
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N5/00—Details of television systems
    • H04N5/222—Studio circuitry; Studio devices; Studio equipment
    • H04N5/262—Studio circuits, e.g. for mixing, switching-over, change of character of image, other special effects ; Cameras specially adapted for the electronic generation of special effects
    • H04N5/268—Signal distribution or switching
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N5/00—Details of television systems
    • H04N5/76—Television signal recording
    • H04N5/765—Interface circuits between an apparatus for recording and another apparatus
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02T—CLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO TRANSPORTATION
    • Y02T50/00—Aeronautics or air transport
    • Y02T50/40—Weight reduction

Definitions

  • the present application relates to the field of camera technology, in particular to a camera system and unmanned equipment.
  • Cameras are widely used as visual perception sensors in drones, unmanned vehicles and many intelligent robot products.
  • a multi-processor system is usually set up. How to realize the cooperative use of the camera and the multi-processor has become an urgent problem to be solved.
  • the application provides a camera system and unmanned equipment, and the technical solution is as follows.
  • the embodiment of the present application provides a camera system, including a camera and a circuit assembly, the camera is provided with a MIPI CSI-2 output interface, and the circuit assembly includes:
  • Substrate described substrate is provided with input interface, is connected with described MIPI CSI-2 output interface;
  • a repeater arranged on the substrate, and the repeater is connected to the input interface
  • the repeater is also used to connect more than two processors.
  • traces are formed on the substrate; more than two repeaters are respectively connected to the input interfaces through the traces .
  • the wiring includes a first branch line, a second branch line and a third branch line; the first end of the first branch line is connected to the input interface ; The second end of the first branch line is respectively connected to the repeater through the second branch line and the third branch line.
  • the length of the first branch line is less than or equal to 80 mm.
  • the length of the second branch line and/or the third branch line is less than or equal to 2 mm.
  • the two repeaters are located on the same side of the substrate.
  • the two repeaters are respectively located on opposite sides of the substrate along the thickness direction.
  • metal vias are further provided on the substrate, and corresponding pins between the two repeaters are connected through the metal vias.
  • the distance between the center of the metal via hole and the pin of the repeater is less than 1mm.
  • lead wires are further formed on the substrate; the repeater is connected to the processor through the lead wires.
  • the input interface is a point-to-point high-speed serial interface.
  • a connector is provided on the substrate, the connector includes a plurality of input interfaces, and the connector is connected to the MIPI CSI-2 output interface.
  • the embodiment of the present application also provides an unmanned device, which includes the camera system described in any one of the above.
  • the video signal collected by the camera is transmitted to the processor through the repeater, and the repeater plays the role of relay and bridging, which can completely protect the video signal, and each processing
  • the device can receive the same image data stably at the same time.
  • a small device such as an unmanned device, there is no need to convert the MIPI CSI-2 output interface, which can achieve lower transmission delay, and its hardware structure is simple and integrated. higher.
  • Fig. 1 is a schematic diagram of the camera system provided by the embodiment of the present application.
  • FIG. 2 is a schematic diagram of circuit components in a camera system provided by an embodiment of the present application.
  • Fig. 3 is a schematic diagram of circuit components in a camera system provided by another embodiment of the present application.
  • Fig. 4 is a schematic diagram of circuit components in a camera system provided by another embodiment of the present application.
  • CSI-2 Camera Serial Interface-2, second-generation camera serial interface
  • MIPI Mobile Industry Processor Interface, mobile industry processor interface
  • CSI-2 Camera Serial Interface-2, second-generation camera serial interface
  • the requirement that the processor needs to collect image data from the same camera at the same time can be solved by using the following solutions.
  • a bridge chip to convert the serial interface of the camera, such as MIPI CSI-2 interface, into a high-speed digital video interface, such as FPD-Link (Flat Panel Display Link, flat panel display link) interface; or into a low-voltage differential signal interface , such as LVDS (Low-Voltage Differential Signaling, low-voltage differential signal) interface, and then use a dedicated chip to achieve separation.
  • FPD-Link Full Panel Display Link, flat panel display link
  • LVDS Low-Voltage Differential Signaling, low-voltage differential signal
  • the processor also needs to use a bridge chip to convert the above-mentioned FPD-Link interface or LVDS interface to MIPI CSI-2 interface.
  • This solution requires multiple transfers in hardware implementation, which is not only relatively complicated, but also has high hardware cost, which is not conducive to integration and cannot meet the high integration requirements of small devices, such as unmanned devices.
  • the conversion or bridging of the interface standard usually needs to analyze the data packets of the MIPI CSI-2 protocol and repackage and send them. In this process, it is easy to introduce errors that are difficult to find, and the accuracy of the timing And consistency is also easily affected, and the compatibility and stability of the scheme are poor.
  • the circuit assembly provided by the embodiment of the present application can solve the above-mentioned technical problems, and the camera system including the circuit assembly and the unmanned equipment including the camera system can also solve the above-mentioned technical problems.
  • FIG. 1 is a schematic diagram of a camera system provided by an embodiment of the present application.
  • an embodiment of the present application provides a camera system that is applied to an unmanned device.
  • the camera system includes a camera 200, and the camera 200 is provided with a MIPI CSI-2 output interface 201.
  • the MIPI CSI-2 output interface 201 is a standard point-to-point high-speed serial interface.
  • the video signal is transmitted to the processor 3 for video signal processing.
  • the camera system also includes a circuit assembly 100 including a substrate 1 and a repeater 2 .
  • the substrate 1 is provided with an input interface 11, which is connected with the MIPI CSI-2 output interface 201.
  • the repeater 2 is arranged on the substrate 1 , and the repeater 2 is connected to the input interface 11 , and the repeater 2 is also used to connect two or more processors 3 .
  • the video signal collected by the camera 200 is transmitted to the processor 3 through the repeater 2, and the repeater 2 plays the role of relay and bridging, which can completely protect the video signal, and each processor 3 can receive the same image stably at the same time Data, for a small device such as an unmanned device, there is no need to convert the MIPI CSI-2 output interface 201, which can achieve lower transmission delay, and its hardware structure is simple to implement and has a higher degree of integration.
  • any repeater 2 can be connected to the input interface 11 through the wiring 5 , and any repeater 2 can also be connected to the processor 3 through the outgoing line 7 .
  • the repeater 2 includes but not limited to: Re-timer (retimer), Re-driver (redriver) and so on.
  • the above two or more repeaters 2 are respectively connected to the input interface 11 through the wiring 5 .
  • the above-mentioned repeater 2 can be set in each connection route to realize the connection between the camera 200 and more than two processors 3 , and each connection route is the route between the input interface 11 and each processor 3 .
  • the wires 5 can be directly processed and formed on the substrate 1 to realize signal transmission. It is easier to realize the processing technology of directly forming the wiring 5 on the substrate 1 .
  • the substrate 1 is a PCB (Printed Circuit Board, printed circuit board), and the wiring 5 is directly processed on the substrate 1, that is, the wiring 5 is printed on the PCB.
  • a connector 4 is provided on the substrate 1, the connector 4 includes a plurality of input interfaces 11, and the connector 4 is connected to a MIPI CSI-2 output interface 201. That is to say, realize the connection between multiple input interfaces 11 and MIPI CSI-2 output interface 201 by connector 4.
  • connector 4 can refer to Fig. 4, and one end of this connector 4 comprises pin, and this pin is used for being connected with MIPI CSI-2 output interface 201, and the other end of this connector 4 comprises a plurality of input interfaces 11.
  • the embodiment of the present application does not limit the number of input interfaces 11 , no matter whether the input interface 11 is directly arranged on the substrate 1 or on the connector 4 , the number of the input interfaces 11 can be one or more.
  • the any input interface 11 may be a point-to-point high-speed serial interface.
  • the input interfaces 11 may be connected to the repeaters 2 in a one-to-one correspondence. In other embodiments, if the number of input interfaces 11 is less than the number of repeaters 2, or the number of input interfaces 11 is equal to or greater than the number of repeaters 2, but the number of input interfaces 11 used is less than If the number of repeaters 2 is large, there will be a situation where one input interface 11 needs to be connected to more than two repeaters 2. In this case, the input interface 11 can be connected to more than two repeaters 2 through wiring 5. See The following figure 2 corresponds to the description.
  • Fig. 2 is a schematic diagram of circuit components in a camera system provided by an embodiment of the present application.
  • the routing 5 includes a first branch line 51 , the second branch line 52 and the third branch line 53 .
  • the first end of the first branch line 51 is connected to the input interface 11
  • the second end of the first branch line 51 is connected to the repeater 2 through the second branch line 52 and the third branch line 53 respectively.
  • the OA segment is the first branch line 51
  • the OB segment is the second branch line 52
  • the OC segment is the third branch line 53
  • the routing 5 forms a branch at point O.
  • the repeater 2 can compensate the influence of the bifurcation of the trace 5 on the signal to ensure that the signal after the fork of the trace 5 can be received correctly.
  • a processor 3 can receive pictures stably for a long time, without error frames and frame loss, and the images are accurate and synchronized.
  • the RX Equalization (Receiver Equalization, receiver equalization) function of the repeater 2 can be used to supplement the influence of the bifurcation of the wiring 5 on the signal.
  • the repeater 2 isolates the input side (camera 200 to repeater 2) and the output side (repeater 2 to processor 3), and the drive capacity can be set independently on the output side, and the output side will not receive input side effects.
  • the first branch line 51 , the second branch line 52 and the third branch line 53 may be distributed in a T-shape, and the second branch line 52 and the third branch line 53 are symmetrically arranged to make the length of each branch line shorter.
  • two repeaters 2 are arranged along the width direction Y of the substrate 1 , and the repeaters 2 and the input interface 11 may be arranged along the length direction X of the substrate 1 .
  • the length of the first branch line 51 is less than or equal to 80 mm.
  • the distance between the bifurcation point O between the input interface 11 and the repeater 2 is set as small as possible, that is, OA ⁇ 80mm, and this distance can also make the bifurcation point O as close as possible to the side of the repeater 2 position to ensure that the distance after the bifurcation is as small as possible, and the impact of signal reflection will be smaller.
  • the length of the second branch line 52 and/or the third branch line 53 is less than or equal to 2mm, that is, OB ⁇ 2mm, and/or, OC ⁇ 2mm.
  • the distance from the bifurcation point O to the repeater 2 is small, thereby ensuring the accuracy of signal transmission.
  • repeaters 2 There are many ways to arrange the above-mentioned repeaters 2 on the substrate 1. As shown in FIG. 1 on the same side. On the same side of the substrate 1, two repeaters 2 can be placed side by side, and after such placement, the wiring 5 between the two repeaters 2 can be designed to be short. In the embodiment shown in FIG. 2 , two repeaters 2 are arranged along the width direction Y of the substrate 1 .
  • Fig. 3 is a schematic diagram of circuit components in an imaging system provided by another embodiment of the present application. side. That is to say, in the embodiment shown in FIG. 3 , two repeaters 2 are distributed on the front and back sides of the substrate 1 . Optionally, along the thickness direction of the substrate 1 , the projections of the two repeaters 2 coincide. Such a distribution method can make the pins with the same function closer in space, and the signals can be connected to the pins of the chip through a very short trace 5 after being separated.
  • FIG. 2 and FIG. 3 both show the case where the number of repeaters 2 is two, and the case where the number of repeaters 2 is at least three will be described below.
  • the wiring 5 may include a fourth branch line and at least three fifth branch lines, the first end of the fourth branch line is connected to the input interface 11, and the first end of the fourth branch line The two ends are respectively connected to the repeater 2 through the fifth branch line, and at least three repeaters 2 correspond to at least three fifth branch lines one by one.
  • At least three fifth branch lines may be arranged symmetrically.
  • the length of the fourth branch is less than or equal to 80mm
  • the length of at least one fifth branch among the at least three fifth branches is less than or equal to 2mm
  • the lengths of different fifth branches may be the same or different.
  • At least three repeaters 2 may be arranged along the length direction X of the substrate 1 with the input interface 11 .
  • at least three repeaters 2 are located on the same side of the substrate 1 , and at least three repeaters 2 may be arranged along the width direction Y of the substrate 1 , such as placed side by side.
  • at least three repeaters 2 are located on opposite sides of the substrate 1 along the thickness direction Z, and the embodiment of the present application does not limit the number of repeaters 2 included on each side.
  • the projections of at least one pair of repeaters 2 coincide.
  • Fig. 4 is a schematic diagram of circuit components in a camera system provided by another embodiment of the present application.
  • the circuit assembly 100 is a double-layer circuit board, and two repeaters 2 are distributed on the front and back sides of the substrate 1 .
  • the projections on the substrate 1 do not coincide, or the projections of the two repeaters 2 in the thickness direction of the substrate 1 coincide.
  • both repeaters 2 have been shown to make the illustration clearer.
  • two repeaters 2 are respectively located on the front and back sides of the substrate 1 , and the connector 4 located on the substrate 1 is used to connect with the MIPI CSI-2 output interface 201 of the camera 200 .
  • each input interface 11 is connected to the repeater 2 through the wiring 5 formed on the substrate 1 .
  • metal vias 6 are formed on the substrate 1 , corresponding pins between the two repeaters 2 located on the front and back sides of the substrate 1 may be connected through the metal vias 6 .
  • the above-mentioned metal via 6 is formed in the middle of the two repeaters 2, and a signal bifurcation is formed at the position of the metal via 6.
  • the center of the metal via 6 and the center of the repeater 2 The distance between the pins is less than 1 mm, so that the length of the trace 5 passed by the signal after separation is relatively short.
  • FIG. 4 shows the case where the number of repeaters 2 is two, and the case where the number of repeaters 2 is at least three will be described below.
  • the circuit assembly 100 is a double-layer circuit board, and at least three repeaters 2 are distributed on the front and back sides of the substrate 1 .
  • the projections of the at least three repeaters 2 in the thickness direction of the substrate 1 may or may not overlap.
  • the substrate 1 includes a connector 4, and the connector 4 includes a plurality of input interfaces 11, such as 6 input interfaces 11, and each input interface 11 is connected to the repeater 2 through a wiring 5 formed on the substrate 1 superior.
  • the metal vias 6 are formed on the substrate 1 , corresponding pins between at least three repeaters 2 on the front and back sides of the substrate 1 can be connected through the metal vias 6 .
  • each input interface 11 is connected to the metal via 6, and the metal via 6 is connected to at least three pins of the repeater 2, so that the connection between the input interface 11 and the middle is realized through the wiring 5 and the metal via 6.
  • the distance between a point on the metal via 6 and a pin of at least one repeater 2 among the at least three repeaters 2 is less than 1 mm.
  • the point is the center of the metal via 6 , or a point on the edge of the metal via 6 , which is not limited here.
  • the substrate 1 is formed with lead wires 7. Regardless of whether the repeaters 2 are two or at least three as shown in FIG. 7 Connect processor 3.
  • the connector 4 corresponds to six input interfaces 11 , and each input interface 11 is connected to the processor 3 through the lead wire 7 .
  • the input interface 11 is connected to the processor 3 through the lead-out line 7, including: the input interface 11 is connected to the repeater 2 through the trace 5 and the metal via 6, and the repeater 2 is connected to the processor through the lead-out line 7 3 connections.
  • the lead wires 7 are directly formed on the substrate 1 to further simplify the structure and process of the circuit assembly 100 . Wherein, when the substrate 1 is a PCB, the lead wires 7 are printed on the PCB.
  • the camera system shown in Fig. 1 and the camera system shown in Fig. 2 to Fig. 4 are aimed at
  • the circuit assembly 100 has undergone a function test and a performance test, and the test results of the two tests are as follows.
  • the test result of the function test is that, in the above-mentioned test scenario, the function of the circuit component 100 forking the video signal collected by the camera 200 is normal, and different processors 3 can receive pictures stably for a long time without error frames and loss of frames. Frames, images can be accurately synchronized.
  • the test result of the performance test is that, under the above-mentioned test scenario, the MIPI CSI-2 D-PHY CTS (Conformance Test Suite, conformance test suite) test is carried out at the output end of the repeater 2 in the circuit assembly 100, and all Pass (All Pass) result.
  • D-PHY is a physical layer (Physics) provided by MIPI.
  • An embodiment of the present application also provides a drone, which includes the camera system provided in any embodiment of the present application.
  • the embodiment of the present application also provides an unmanned vehicle and an intelligent robot, and the unmanned vehicle and the intelligent robot respectively include the camera system provided in any embodiment of the application. That is to say, the embodiment of the present application provides an unmanned device, which includes but not limited to the above-mentioned unmanned aerial vehicle, unmanned vehicle and intelligent robot, and the unmanned device includes the camera provided by any embodiment of the present application system.
  • the output signal separation of the camera is realized on a multi-processor hardware platform.
  • the data output by the same camera can be collected at the same time, and different processors can obtain image data at the same time, which is more friendly to algorithms with high real-time requirements.

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Abstract

提供了一种摄像***及无人设备，其中，该摄像***包括摄像机和电路组件，摄像机上设置有MIPI CSI-2输出接口，电路组件包括基板和中继器。基板上设置有输入接口，与MIPI CSI-2输出接口连接。中继器设置在基板上，且中继器与输入接口连接，中继器还用于连接两个以上的处理器。

Description

摄像***及无人设备
本申请要求于2021年11月26日提交的申请号为202111423384.4、申请名称为“无人机摄像***及无人机”的中国专利申请的优先权，其全部内容通过引用结合在本申请中。
技术领域
本申请涉及摄像技术领域，尤其涉及一种摄像***及无人设备。
背景技术
无人机、无人车和很多智能机器人产品中普遍使用摄像头作为视觉感知传感器。为了保证***的可靠性和功能的可拓展性，通常会设置多处理器***。如何实现摄像头与多处理器的配合使用，成为亟待解决的问题。
发明内容
本申请提供了一种摄像***及无人设备，技术方案如下。
本申请实施例提供了一种摄像***，包括摄像机和电路组件，所述摄像机上设置有MIPI CSI-2输出接口，所述电路组件包括：
基板，所述基板上设置有输入接口，与所述MIPI CSI-2输出接口连接；
中继器，设置在所述基板上，且所述中继器与所述输入接口连接；
所述中继器还用于连接两个以上的处理器。
在一种可能的实现方式中，所述中继器为两个以上；所述基板上还形成有走线；两个以上的所述中继器通过所述走线分别与所述输入接口连接。
在一种可能的实现方式中，所述中继器为两个；所述走线包括第一支线、第二支线和第三支线；所述第一支线的第一端连接于所述输入接口；所述第一支线的第二端分别通过所述第二支线和所述第三支线连接所述中继器。
在一种可能的实现方式中，所述第一支线的长度小于或等于80mm。
在一种可能的实现方式中，所述第二支线和/或所述第三支线的长度小于或等于2mm。
在一种可能的实现方式中，两个所述中继器位于所述基板的同一侧。
在一种可能的实现方式中，两个所述中继器分别位于所述基板的沿厚度方向的相对两侧。
在一种可能的实现方式中，沿所述基板的厚度方向，两个所述中继器的投影重合。
在一种可能的实现方式中，所述基板上还设置有金属过孔，两个所述中继器之间相对应的引脚通过所述金属过孔连接。
在一种可能的实现方式中，所述金属过孔的中心与所述中继器的引脚之间的距离小于1mm。
在一种可能的实现方式中，所述基板上还形成有引出线；所述中继器通过所述引出线连接所述处理器。
在一种可能的实现方式中，所述输入接口为点对点高速串行接口。
在一种可能的实现方式中，基板上设置有连接器，所述连接器包括多个输入接口，所述连接器与所述MIPI CSI-2输出接口连接。
本申请实施例还提供了一种无人设备，其中，包括上述任一项所述的摄像***。
本申请实施例提供的摄像***及无人设备中，摄像机采集的视频信号通过中继器传输到处理器，中继器起到中继和桥接作用，能够对视频信号进行完整的保护，各个处理器能够同时稳定地接收相同的图像数据，对于无人设备这种小型设备而言，无需对MIPI CSI-2输出接口进行转换，能够实现更低的传输延迟，而且其硬件结构实现简单，集成度更高。
应当理解的是，以上的一般描述和后文的细节描述仅是示例性的，并不能限制本申请。
附图说明
图1是本申请实施例提供的摄像***的示意图；
图2是本申请一种实施例提供的摄像***中电路组件的示意图；
图3是本申请另一种实施例提供的摄像***中电路组件的示意图；
图4是本申请再一种实施例提供的摄像***中电路组件的示意图。
附图标记：
100-电路组件；1-基板；11-输入接口；2-中继器；3-处理器；4-连接器；5- 走线；51-第一支线；52-第二支线；53-第三支线；6-金属过孔；7-引出线；200-摄像机；201-MIPI CSI-2输出接口。
此处的附图被并入说明书中并构成本说明书的一部分，示出了符合本申请的实施例，并与说明书一起用于解释本申请的原理。
具体实施方式
为了更好的理解本申请的技术方案，下面结合附图对本申请实施例进行详细描述。
在摄像头MIPI(Mobile Industry Processor Interface，移动产业处理器接口)CSI-2(Camera Serial Interface-2，第二代摄像机串行接口)输出接口为标准的点对点高速串行接口的情况下，针对多个处理器需要同时采集同一个摄像头图像数据的需求，可以采用以下几个方案来解决。
1、采用具有并行接口的摄像头，利用并行接口进行信号分离，进而可以连接多个处理器。但是，此种方案仅适用于少数特定的、能够支持并行接口的处理器，而且并行接口的速率低，无法适配高分辨率的摄像头，不具有普遍的适用性。随着能够支持并行接口的处理器越来越少，此种方案有被淘汰的趋势。
2、采用桥接芯片将摄像头的串行接口，例如MIPI CSI-2接口，转为高速数字视频接口，例如FPD-Link(Flat Panel Display Link，平面显示器链接)接口；或者转为低电压差分信号接口，例如LVDS(Low-Voltage Differential Signaling，低电压差分信号)接口，再利用专用芯片实现分离。处理器接收时还需要再采用桥接芯片将上述FPD-Link接口或LVDS接口转换至MIPI CSI-2接口。该方案在硬件的实现上需要多重转接，不仅相对复杂，而且硬件成本较高，其不利于集成，无法满足小型设备，例如无人设备的高集成度要求。
3、利用可编程逻辑门阵列(Field Programmable Gate Array,FPGA)对摄像头的数据进行分离，但是FPGA的开发难度较高，FPGA可选型号有限，针对不同的摄像头和摄像头图像的规格，需要有针对性地进行适配和调试，不具有通用性。硬件生产需要增加FPGA固件下载环节，摄像头更换或图像规格更新也需要对FPGA固件进行更新，其操作流程相对复杂。
此外，上述方案中，对接口标准的转换或桥接，在实现时，通常需要对MIPI CSI-2协议的数据包进行解析并重新打包发送，这个过程中容易引入难以发现的错误，时序的精准性和一致性也容易被影响，方案的兼容性和稳定性较差。
本申请实施例提供的电路组件能够解决上述技术问题，则包括有电路组件的摄像***、包括有摄像***的无人设备也能够解决上述技术问题。
图1是本申请实施例提供的摄像***的示意图，如图1所示，本申请实施例提供了一种摄像***，应用于无人设备。该摄像***包括摄像机200，摄像机200上设置有MIPI CSI-2输出接口201，本实施例中，该MIPI CSI-2输出接口201是一个标准的点对点高速串行接口。通过MIPI CSI-2输出接口201将视频信号传输到处理器3进行视频信号处理。
摄像***还包括电路组件100，该电路组件100包括基板1和中继器2。其中，基板1上设置有输入接口11，与MIPI CSI-2输出接口201连接。中继器2设置在基板1上，且中继器2与输入接口11连接，中继器2还用于连接两个以上的处理器3。
摄像机200采集的视频信号通过中继器2传输到处理器3，中继器2起到中继和桥接作用，能够对视频信号进行完整的保护，各个处理器3能够同时稳定地接收相同的图像数据，对于无人设备这种小型设备而言，无需对MIPI CSI-2输出接口201进行转换，能够实现更低的传输延迟，而且其硬件结构实现简单，集成度更高。
本申请实施例不限定中继器2的数量，该中继器2的数量可以为1个，也可以为两个以上。示例性地，无论中继器2的数量为几个，任意一个中继器2可以通过走线5与输入接口11连接，任意一个中继器2还可以通过引出线7与处理器3连接。
请继续参照图1，在一种可能的实施方式中，中继器2为两个以上，基板1上形成有走线5。示例性地，中继器2包括但不限于：Re-timer(重定时器)、Re-driver(重驱动器)等等。上述两个以上的中继器2通过走线5分别与输入接口11连接。可以在各个连接路线中设置上述中继器2，以实现对摄像机200与两个以上处理器3的连接，各个连接路线也即是输入接口11与各个处理器3之间的路线。另外，可以在基板1上直接加工形成走线5，来实现信号传输。直接在基板1上形成走线5的加工工艺更容易实现。示例性地，该基板1为PCB(Printed Circuit Board，印制电路板)，在基板1上直接加工形成走线5，也即是将走线5印制于PCB上。
在示例性实施例中，基板1上设置有连接器4，连接器4包括多个输入接口11，连接器4与MIPI CSI-2输出接口201连接。也就是说，通过连接器4实现 多个输入接口11与MIPI CSI-2输出接口201之间的连接。示例性地，连接器4可以参见图4，该连接器4的一端包括引脚，该引脚用于与MIPI CSI-2输出接口201连接，而该连接器4的另一端包括多个输入接口11。
本申请实施例不限定输入接口11的数量，无论输入接口11是直接设置于基板1上，还是设置于连接器4上，该输入接口11的数量均可以为一个或者多个。示例性地，对于任意一个输入接口11而言，该任意一个输入接口11可以为点对点高速串行接口。
在一些实施方式中，如果输入接口11的数量等于或大于中继器2的数量，则输入接口11可以与中继器2一一对应的连接。而在另一些实施方式中，如果输入接口11的数量小于中继器2的数量，或是输入接口11的数量等于或大于中继器2的数量、但所使用的输入接口11的数量小于中继器2的数量，则会存在一个输入接口11需要连接两个以上的中继器2的情况，此种情况下输入接口11可以通过走线5与两个以上的中继器2连接，参见如下的图2对应的说明。
图2是本申请一种实施例提供的摄像***中电路组件的示意图，如图2所示，在一种可能的实施方式中，中继器2为两个，走线5包括第一支线51、第二支线52和第三支线53。其中，第一支线51的第一端连接于输入接口11，第一支线51的第二端分别通过第二支线52和第三支线53连接中继器2。从图2中可以看出，OA段为第一支线51，OB段为第二支线52，OC段为第三支线53，走线5在O点形成分叉。
将走线5设置为多条支线，以形成分叉结构，中继器2能够补偿走线5分叉对信号带来的影响，以保证走线5分叉后的信号能够被正确接收，两个处理器3可以长时间稳定收图，无错帧和丢帧，图像准确且同步。示例性地，可以利用中继器2的RX Equalization(Receiver Equalization，接收端均衡)功能来补充走线5分叉对信号带来的影响。此外，中继器2将输入侧(摄像机200到中继器2)和输出侧(中继器2到处理器3)相隔离，在输出侧能够单独设定驱动能力，输出侧不会受到输入侧的影响。另外，第一支线51、第二支线52和第三支线53可以分布成T字形，且第二支线52和第三支线53对称布置，以使各支线的长度更短。
示例性地，在本实施例中，两个中继器2沿基板1的宽度方向Y布置，且中继器2可以与输入接口11沿基板1的长度方向X布置。
在一种可能的实施方式中，第一支线51的长度小于或等于80mm。本实施 例中，设置输入接口11与中继器2之间的分叉点O的距离尽可能小，即，OA≤80mm，该距离还能够使分叉点O尽量地靠近中继器2的位置，以保证分叉后的距离尽量小，那么信号反射带来的影响也就越小。
此外，还可以设置第二支线52和/或第三支线53的长度小于或等于2mm，即，OB≤2mm，和/或，OC≤2mm。分叉点O到中继器2的距离较小，从而保证了信号传输的准确性。
上述中继器2在基板1上的布置方式有多种，如图2所示，在一种实现方式中，根据电路组件100上其他元件的分布设计，可以设置两个中继器2位于基板1的同一侧。在基板1的同侧，两个中继器2可以并排放置，且这样放置后，两个中继器2之间的走线5可以设计的较短。图2所示的实施例中，两个中继器2沿着基板1的宽度方向Y布置。
图3是本申请另一种实施例提供的摄像***中电路组件的示意图，如图3所示，在该实施例中，两个中继器2分别位于基板1的沿厚度方向Z的相对两侧。也就是说，在图3所示的实施例中，两个中继器2分布在基板1的正反两面。可选地，沿基板1的厚度方向，两个中继器2的投影重合。这样的分布方式，能够使得相同功能的引脚在空间上的距离更近，信号分开后经过非常短的走线5就可以连接到芯片的引脚。
以上的图2和图3均示出了中继器2的数量为2个的情况，下面对中继器2的数量为至少三个的情况进行说明。
可选地，中继器2的数量为至少三个时，走线5可以包括第四支线和至少三个第五支线，第四支线的第一端连接于输入接口11，第四支线的第二端分别通过第五支线连接中继器2，至少三个中继器2与至少三个第五支线一一对应。
示例性地，至少三个第五支线可以对称布置。示例性地，第四支线的长度小于或等于80mm，至少三个第五支线中的至少一个第五支线的长度小于或等于2mm，不同第五支线的长度可以相同或不同。
示例性地，至少三个中继器2可以与输入接口11沿基板1的长度方向X布置。在一些实施方式中，至少三个中继器2位于基板1的同侧，至少三个中继器2可以沿基板1的宽度方向Y布置，比如并排放置。在另一些实施方式中，至少三个中继器2位于基板1的沿厚度方向Z的相对两侧，本申请实施例不限定每侧包括的中继器2的数量。可选地，沿基板1的厚度方向，至少一对中继器2的投影重合。
图4是本申请再一种实施例提供的摄像***中电路组件的示意图。在其他的实施例中，如图4所示，该电路组件100是双层电路板，两个中继器2分布在基板1的正反两面，示例性地，二者在基板1的厚度方向上的投影不重合，或者，两个中继器2在基板1的厚度方向上的投影重合。在图4中，两个中继器2均已示出，以使得图示更清楚。实际上，两个中继器2分别位于基板1的正反两面，位于基板1上的连接器4用于与摄像机200的MIPI CSI-2输出接口201相连。示例性地，本实施例中，连接器4的右侧具有6个输入接口11，每个输入接口11均通过形成在基板1上的走线5连接到中继器2上。可选地，在基板1上形成有金属过孔6的情况下，位于基板1正反两面的两个中继器2之间相对应的引脚可以通过金属过孔6连接。
上述金属过孔6形成在两个中继器2的中间位置，在金属过孔6的位置形成信号分叉，在一种可能的实施方式中，金属过孔6的中心与中继器2的引脚之间的距离小于1mm，以使信号分开后经过的走线5长度较短。
以上的图4示出了中继器2的数量为2个的情况，下面对中继器2的数量为至少三个的情况进行说明。其中，电路组件100是双层电路板，至少三个中继器2分布在基板1的正反两面。至少三个中继器2在基板1的厚度方向上的投影可以重合，也可以不重合。
示例性地，基板1包括连接器4，连接器4包括多个输入接口11，比如6个输入接口11，每个输入接口11均通过形成在基板1上的走线5连接到中继器2上。示例性地，当基板1上形成有金属过孔6时，位于基板1正反两面的至少三个中继器2之间相对应的引脚可以通过金属过孔6连接。则，每个输入接口11均与金属过孔6连接，金属过孔6又与至少三个中继器2的引脚连接，从而通过走线5和金属过孔6实现了输入接口11与中继器2之间的连接。在一种实现方式中，金属过孔6上的一点与至少三个中继器2中的至少一个中继器2的引脚之间的距离小于1mm。例如，该点为金属过孔6的中心，或是金属过孔6的边缘上的一点，在此不作限定。
请继续参照图4，在一种可能的实施方式中，基板1上形成有引出线7，无论中继器2是图4所示的两个，还是至少三个，中继器2通过引出线7连接处理器3。本实施例中，连接器4对应6个输入接口11，各输入接口11均分别通过引出线7连接至处理器3。示例性地，输入接口11通过引出线7连接至处理器3，包括：输入接口11通过走线5、金属过孔6与中继器2连接，中继器2 再通过引出线7与处理器3连接。引出线7直接形成于基板1，以进一步简化电路组件100的结构和加工过程。其中，当基板1为PCB时，引出线7印制于该PCB上。
本申请实施例在链路速度(lane rate)为1.5Gbps(Giga Bits Per Second，千兆位每秒)的测试场景下，针对图1所示的摄像***，以及图2至图4所示的电路组件100进行了功能测试和性能测试，这两种测试的测试结果如下。
功能测试的测试结果为，在上述的测试场景下，电路组件100针对摄像机200采集的视频信号进行分叉的功能的正常，不同的处理器3均可以长时间稳定收图，无错帧和丢帧，图像能够准确同步。
性能测试的测试结果为，在上述的测试场景下，在电路组件100中的中继器2的输出端进行MIPI CSI-2 D-PHY CTS(Conformance Test Suite，一致性测试套件)测试，得到全部通过(All Pass)的结果。其中，D-PHY为MIPI提供的一种物理层(Physics)。
本申请实施例还提供了一种无人机，其包括本申请任意实施例提供的摄像***。此外，本申请实施例还提供了一种无人车和一种智能机器人，该无人车和智能机器人分别包括本申请任意实施例提供的摄像***。也即是，本申请实施例提供了一种无人设备，该无人设备包括但不限于上述的无人机、无人车和智能机器人，该无人设备包括本申请任意实施例提供的摄像***。
本申请实施例提供的无人机中，以及本申请实施例提供的无人车和智能机器人中，在多处理器硬件平台上实现摄像机的输出信号分离，对于两个以上的处理器而言，可以同时采集同一颗摄像头输出的数据，不同的处理器能够得到同一时刻的图像数据，对实时性要求较高的算法更加友好。
需要指出的是，本专利申请文件的一部分包含受著作权保护的内容。除了对专利局的专利文件或记录的专利文档内容制作副本以外，著作权人保留著作权。

Claims (14)

  1. 一种摄像***，其中，包括摄像机(200)和电路组件(100)，所述摄像机(200)上设置有MIPI CSI-2输出接口(201)，所述电路组件(100)包括：
    基板(1)，所述基板(1)上设置有输入接口(11)，与所述MIPI CSI-2输出接口(201)连接；
    中继器(2)，设置在所述基板(1)上，且所述中继器(2)与所述输入接口(11)连接；
    所述中继器(2)还用于连接两个以上的处理器(3)。
  2. 根据权利要求1所述的摄像***，其中，所述中继器(2)为两个以上；
    所述基板(1)上还形成有走线(5)；
    两个以上的所述中继器(2)通过所述走线(5)分别与所述输入接口(11)连接。
  3. 根据权利要求2所述的摄像***，其中，所述中继器(2)为两个；
    所述走线(5)包括第一支线(51)、第二支线(52)和第三支线(53)；
    所述第一支线(51)的第一端连接于所述输入接口(11)；
    所述第一支线(51)的第二端分别通过所述第二支线(52)和所述第三支线(53)连接所述中继器(2)。
  4. 根据权利要求3所述的摄像***，其中，所述第一支线(51)的长度小于或等于80mm。
  5. 根据权利要求3所述的摄像***，其中，所述第二支线(52)和/或所述第三支线(53)的长度小于或等于2mm。
  6. 根据权利要求3所述的摄像***，其中，两个所述中继器(2)位于所述基板(1)的同一侧。
  7. 根据权利要求3所述的摄像***，其中，两个所述中继器(2)分别位于 所述基板(1)的沿厚度方向的相对两侧。
  8. 根据权利要求7所述的摄像***，其中，沿所述基板(1)的厚度方向，两个所述中继器(2)的投影重合。
  9. 根据权利要求7所述的摄像***，其中，所述基板(1)上还设置有金属过孔(6)，两个所述中继器(2)之间相对应的引脚通过所述金属过孔(6)连接。
  10. 根据权利要求9所述的摄像***，其中，所述金属过孔(6)的中心与所述中继器(2)的引脚之间的距离小于1mm。
  11. 根据权利要求1-10任一项所述的摄像***，其中，所述基板(1)上还形成有引出线(7)；
    所述中继器(2)通过所述引出线(7)连接所述处理器(3)。
  12. 根据权利要求1-10任一项所述的摄像***，其中，所述输入接口(11)为点对点高速串行接口。
  13. 根据权利要求1-10任一项所述的摄像***，其中，所述基板(1)上设置有连接器(4)，所述连接器(4)包括多个输入接口(11)，所述连接器(4)与所述MIPI CSI-2输出接口(201)连接。
  14. 一种无人设备，其中，包括权利要求1-13任一项所述的摄像***。
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