WO2023065382A1 - 一种非制冷红外探测器的像素级封装结构及其制作方法 - Google Patents

一种非制冷红外探测器的像素级封装结构及其制作方法 Download PDF

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WO2023065382A1
WO2023065382A1 PCT/CN2021/126704 CN2021126704W WO2023065382A1 WO 2023065382 A1 WO2023065382 A1 WO 2023065382A1 CN 2021126704 W CN2021126704 W CN 2021126704W WO 2023065382 A1 WO2023065382 A1 WO 2023065382A1
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layer
pixel
getter
unit
integrated circuit
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PCT/CN2021/126704
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English (en)
French (fr)
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刘继伟
胡汉林
陈文礼
史杰
赵文广
王金华
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烟台睿创微纳技术股份有限公司
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Publication of WO2023065382A1 publication Critical patent/WO2023065382A1/zh

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
    • H01L27/144—Devices controlled by radiation
    • H01L27/146—Imager structures
    • H01L27/14601—Structural or functional details thereof
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
    • H01L27/144—Devices controlled by radiation
    • H01L27/146—Imager structures
    • H01L27/14601—Structural or functional details thereof
    • H01L27/14618—Containers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
    • H01L27/144—Devices controlled by radiation
    • H01L27/146—Imager structures
    • H01L27/14601—Structural or functional details thereof
    • H01L27/14625—Optical elements or arrangements associated with the device
    • H01L27/14629—Reflectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
    • H01L27/144—Devices controlled by radiation
    • H01L27/146—Imager structures
    • H01L27/14665—Imagers using a photoconductor layer
    • H01L27/14669—Infrared imagers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
    • H01L27/144—Devices controlled by radiation
    • H01L27/146—Imager structures
    • H01L27/14683—Processes or apparatus peculiar to the manufacture or treatment of these devices or parts thereof

Definitions

  • the present application relates to the technical field of infrared imaging, in particular to a pixel-level packaging structure of an uncooled infrared detector and a manufacturing method thereof.
  • pixel-level packaging is the packaging of a single pixel or a series of pixels on the bottom CMOS (Complementary Metal Oxide Semiconductor, Complementary Metal Oxide Semiconductor) integrated circuit substrate wafer
  • CMOS Complementary Metal Oxide Semiconductor, Complementary Metal Oxide Semiconductor
  • MEMS Micro-Electro-Mechanical System, micro-electromechanical system
  • the getter is a necessary material to ensure the normal operation of the pixel-level packaging structure of the uncooled infrared detector.
  • the getter layer is generally arranged on the upper surface of the integrated circuit substrate and corresponds to the infrared sensor unit. That is, the getter layer is located under the microbolometer, and the cracked and uneven structure on the surface of the getter layer will reduce the reflectivity of the getter layer. The better the getter performance, the more obvious the cracked and uneven structure on the surface.
  • the getter layer will absorb infrared radiation, reduce the reflection of infrared radiation, and then affect the absorption of infrared radiation by the infrared sensor unit, thereby affecting the performance of the pixel-level packaging structure of the uncooled infrared detector; due to the characteristics of the pixel-level packaging process , the getter layer arranged in the pixel cavity should resist the influence of oxidation during the process of releasing the organic glue. The process of releasing the organic glue will reduce the reflectivity of the getter and affect the detection accuracy of the infrared detector.
  • the purpose of the present application is to provide a pixel-level packaging structure of an uncooled infrared detector and a manufacturing method thereof, so as to improve the performance of the pixel-level packaging structure of an uncooled infrared detector.
  • the present application provides a pixel-level packaging structure of an uncooled infrared detector, including:
  • the pixel device includes a pixel unit and a getter unit disposed on one side of the pixel unit, the getter unit includes a getter layer disposed on the upper surface of the integrated circuit substrate, a support layer disposed on the support A sealing layer on the upper surface of the layer; the cavity in the getter unit communicates with the cavity of the pixel unit;
  • the pixel device includes a getter layer and a reflective layer disposed on the upper surface of the integrated circuit substrate, and an infrared sensor unit disposed above the reflective layer and corresponding to the reflective layer.
  • the anti-reflection layer arranged on the upper surface of the sealing layer.
  • the material of the anti-reflection layer is zinc sulfide or germanium.
  • the thickness of the supporting layer is between 750nm and 1250nm, including endpoint values.
  • the sealing layer is made of germanium or zinc sulfide.
  • the thickness of the reflective layer is Include endpoint values.
  • the thickness of the getter layer is Include endpoint values.
  • the present application also provides a method for manufacturing a pixel-level packaging structure of an uncooled infrared detector, including:
  • the pixel device includes a pixel unit and a getter unit arranged on one side of the pixel unit, and the getter unit includes a getter layer arranged on the upper surface of the integrated circuit substrate, a supporting layer arranged on the The sealing layer on the upper surface of the support layer; the cavity in the getter unit communicates with the cavity of the pixel unit; or, the pixel device includes a getter layer and a getter layer on the upper surface of the integrated circuit substrate.
  • the reflective layer is arranged above the reflective layer and corresponds to the infrared sensor unit of the reflective layer.
  • the pixel device formed on the upper surface of the integrated circuit substrate includes:
  • the etching is carried out in two steps, the first step is to etch the depth to the upper surface of the inter-pixel channel, and the second step is to etch between the non-pixel Etching the channel area, the etching depth reaches the upper surface of the integrated circuit substrate;
  • a sealing layer is formed on the upper surface of the supporting layer, and the sealing layer fills the release hole.
  • the sealing layer after the sealing layer is formed on the upper surface of the support layer, it further includes:
  • An anti-reflection layer is formed on the upper surface of the sealing layer.
  • a pixel-level packaging structure of an uncooled infrared detector includes: an integrated circuit substrate and a pixel device arranged on the upper surface of the integrated circuit substrate; the pixel device includes a pixel unit and is arranged on the pixel A getter unit on one side of the unit, the getter unit includes a getter layer arranged on the upper surface of the integrated circuit substrate, a support layer, and a sealing layer arranged on the upper surface of the support layer; in the getter unit The cavity of the pixel unit communicates with the cavity of the pixel unit; or, the pixel device includes a getter layer and a reflective layer disposed on the upper surface of the integrated circuit substrate, disposed above the reflective layer and connected to the reflective The layer corresponds to the infrared sensor unit.
  • the pixel-level packaging structure in this application includes an integrated circuit substrate and a pixel device arranged on the upper surface of the integrated circuit substrate.
  • the pixel device includes two structures.
  • One pixel device includes a pixel unit and a getter device arranged on one side of the pixel unit. unit, the getter unit includes a getter layer, a support layer, and a sealing layer, and the cavity in the getter unit communicates with the cavity of the pixel unit, that is, the getter layer is not arranged in the pixel unit.
  • another pixel device includes a getter layer and a reflective layer, which are located on the reflective layer
  • the infrared sensor unit above and corresponding to the reflective layer that is, the getter layer does not correspond to the infrared sensor unit, will not affect the absorption of infrared radiation by the infrared sensor unit, and improve the performance of the pixel-level packaging structure, and, due to the The infrared sensor unit corresponds to the reflective layer, not the getter layer.
  • the getter layer When the getter layer is affected by oxidation, the reflectivity is reduced, and the reflectivity is reduced due to the obvious uneven structure of the surface, it will not affect the infrared sensor unit. cause an impact, thereby improving the precision of the pixel-level packaging structure.
  • the present application also provides a method for manufacturing a pixel-level packaging structure of an uncooled infrared detector with the above-mentioned advantages.
  • FIG. 1 is a schematic diagram of a pixel-level packaging structure of an uncooled infrared detector provided in an embodiment of the present application;
  • Fig. 2 is a top view of a pixel-level packaging structure of an uncooled infrared detector shown in Fig. 1;
  • Fig. 3 is a structural schematic diagram of a pixel unit array in another uncooled infrared detector pixel-level packaging structure shown in Fig. 4;
  • Fig. 4 is a top view of another pixel-level packaging structure of an uncooled infrared detector provided by an embodiment of the present application;
  • Fig. 5 is a schematic structural diagram of a getter unit in another pixel-level packaging structure of an uncooled infrared detector shown in Fig. 4;
  • FIG. 6 is a flowchart of a method for manufacturing a pixel-level packaging structure of an uncooled infrared detector provided in an embodiment of the present application
  • FIG. 7 to 16 are process flow diagrams of the B-B section of the pixel-level packaging structure of the uncooled infrared detector in FIG. 2 .
  • the getter layer corresponds to the infrared sensor unit, and the getter layer can absorb infrared radiation, which affects the absorption of infrared radiation by the infrared sensor unit, thereby affecting The performance of the pixel-level packaging structure of the uncooled infrared detector; in addition, due to the characteristics of the pixel-level packaging process, the getter layer set in the pixel cavity must resist the influence of oxidation during the release of the organic glue; the cracks on the surface of the getter layer The uneven structure will reduce the reflectivity of the getter layer. The better the getter performance, the more obvious the cracked uneven structure on the surface.
  • the process of releasing the organic glue will reduce the reflectivity of the getter layer.
  • Zirconium-based and titanium-based getters For example, the release process will reduce the reflectivity of the getter by about 10%, which will affect the detection accuracy of the infrared detector.
  • the pixel device includes a pixel unit and a getter unit arranged on one side of the pixel unit, the getter unit includes a getter layer 2 arranged on the upper surface of the integrated circuit substrate 1, a support layer 8, and is arranged on the upper surface of the integrated circuit substrate 1.
  • the pixel device includes a getter layer 2 and a reflective layer 3 disposed on the upper surface of the integrated circuit substrate 1, an infrared sensor unit 5 disposed above the reflective layer 3 and corresponding to the reflective layer 3 .
  • the integrated circuit substrate 1 is a CMOS integrated circuit substrate 1 .
  • the two structures of the pixel device are respectively introduced below.
  • the pixel device includes a getter layer 2 and a reflective layer 3 disposed on the upper surface of the integrated circuit substrate 1, disposed above the reflective layer 3 and in contact with the The reflective layer 3 corresponds to the infrared sensor unit 5 .
  • the infrared sensor unit 5 includes a thermosensitive thin film that can convert thermal signals into electrical signals, which can be vanadium oxide, amorphous silicon, titanium oxide and the like.
  • the pixel device also includes electrode connecting posts 12 arranged on the upper surface of the integrated circuit substrate 1 , a supporting layer 8 , and a sealing layer 10 arranged on the upper surface of the supporting layer 8 .
  • electrode connecting posts 12 arranged on the upper surface of the integrated circuit substrate 1
  • supporting layer 8 arranged on the upper surface of the supporting layer 8 .
  • sealing layer 10 arranged on the upper surface of the supporting layer 8 .
  • the thickness of the support layer 8 may be between 750nm and 1250nm, including the endpoint values.
  • the material of the support layer 8 may be ⁇ -Si.
  • a pixel device includes one or more release holes 9, and the width of the release holes 9 is generally 200nm-500nm.
  • the pixel devices are interconnected, and the getter layer 2 is arranged at the gap between the pixel devices.
  • the number of pixel devices shown in FIG. 1 is two.
  • the material of the getter layer 2 includes but not limited to low-temperature active materials with zirconium and titanium as the main components, and getters with strong getter performance.
  • the shape of the getter layer 2 can be made into regular or irregular shapes.
  • the size of the agent layer 2 depends on the pixel device.
  • the thickness of the getter layer 2 can be between Include endpoint values such as wait.
  • the material of the reflective layer 3 is metal, and the specific material can be selected by oneself, which is not limited in this application.
  • the thickness of the reflective layer 3 can be Include endpoint values such as wait.
  • the pixel-level packaging structure of the uncooled infrared detector also includes:
  • the anti-reflection layer 11 disposed on the upper surface of the sealing layer 10 .
  • the material of the anti-reflection layer 11 is not limited, and can be set by itself.
  • the material of the anti-reflection layer 11 is germanium, or the material of the anti-reflection layer 11 is zinc sulfide.
  • the material of the sealing layer 10 is not specifically limited in this application, and can be set by itself.
  • the material of the sealing layer 10 is zinc sulfide, or the material of the sealing layer 10 is germanium or the like.
  • the thickness of the sealing layer 10 is generally between 100nm and 3000nm, and the thickness of the antireflection layer 11 is generally between 100nm and 3000nm.
  • the pixel device includes a getter layer 2 and a reflective layer 3, and an infrared sensor unit 5 disposed above the reflective layer 3 and corresponding to the reflective layer 3, that is, the getter layer 2 is not in contact with the infrared sensor unit 5.
  • the infrared sensor unit 5 will not affect the absorption of infrared radiation by the infrared sensor unit 5, and improve the performance of the pixel-level packaging structure, and, since the reflective layer 3 is not the getter layer 2 corresponding to the infrared sensor unit 5, when the getter When the agent layer 2 is affected by oxidation, the reflectivity decreases, and when the reflectivity decreases due to the obvious uneven structure on the surface, it will not affect the infrared sensor unit 5, thereby improving the precision of the pixel-level packaging structure.
  • the pixel device includes a pixel unit 13 and a getter unit 14 arranged on one side of the pixel unit.
  • FIG. 3 is a schematic structural view of an array of pixel units 13 in this embodiment.
  • the pixel unit 13 includes a reflective layer 3 and an electrode connecting column 12 disposed on the upper surface of the integrated circuit substrate 1, and a support layer 8 is disposed above the reflective layer 3 and connected with the reflective layer 3.
  • the infrared sensor unit 5 corresponding to the reflective layer 3 is provided on the sealing layer 10 on the upper surface of the support layer 8 , and the release hole 9 on the support layer 8 is filled by the sealing layer 10 .
  • the infrared sensor unit 5 includes a thermosensitive thin film that can convert thermal signals into electrical signals, which can be vanadium oxide, amorphous silicon, titanium oxide and the like.
  • the pixel unit 13 does not include the getter layer 2 .
  • the material of the reflective layer 3 is metal, and the specific material can be selected, which is not limited in this application.
  • the thickness of the reflective layer 3 can be Include endpoint values such as wait.
  • the schematic diagram of the structure of the getter unit 14 in this embodiment is shown in Figure 5.
  • the getter unit includes a getter layer 2 arranged on the upper surface of the integrated circuit substrate 1, a support layer 8, and a sealing layer arranged on the upper surface of the support layer 8. 10.
  • the cavity in the getter unit communicates with the cavity of the pixel unit.
  • holes 9 need to be formed on the support layer 8 to release the sacrificial material. It should be noted that the release holes 9 are filled with the sealing layer 10 to make the encapsulation structure hermetically sealed.
  • the getter layer 2 is arranged in the getter unit without the infrared sensor unit 5 , and the getter unit and the pixel unit communicate with each other.
  • the thickness of the getter layer 2 can be between Include endpoint values such as wait.
  • the material of the getter layer 2 includes, but is not limited to, low-temperature active materials mainly composed of zirconium and titanium, and materials with strong getter properties.
  • the thickness of the support layer 8 may be between 750nm and 1250nm, inclusive.
  • the material of the support layer 8 may be ⁇ -Si.
  • Both a pixel unit and a getter unit include two release holes 9, and the width of the release holes 9 is generally 200nm-500nm.
  • the pixel-level packaging structure of the uncooled infrared detector also includes:
  • the anti-reflection layer 11 disposed on the upper surface of the sealing layer 10 .
  • the material of the anti-reflection layer 11 is not limited, and can be set by itself.
  • the material of the anti-reflection layer 11 is germanium, or the material of the anti-reflection layer 11 is zinc sulfide or the like.
  • the material of the sealing layer is germanium
  • the material of the antireflection layer is zinc sulfide
  • the material of the antireflection layer is germanium.
  • the material of the sealing layer 10 is not specifically limited in this application, and can be set by itself.
  • the material of the sealing layer 10 is zinc sulfide, or the material of the sealing layer 10 is germanium.
  • the pixel device includes a pixel unit and a getter unit arranged on one side of the pixel unit.
  • the getter unit includes a getter layer 2, a supporting layer 8, and a sealing layer 10, and the cavity in the getter unit and the pixel unit The cavities are connected, that is, the getter layer 2 is not set in the pixel unit. While achieving the gettering performance, it will not absorb infrared radiation, that is, it will not affect the pixel unit, and the pixel level will be improved.
  • the performance of the packaging structure improves the accuracy of the pixel-level packaging structure.
  • the present application also provides a flowchart of a method for manufacturing a pixel-level packaging structure of an uncooled infrared detector, including:
  • Step S101 preparing an integrated circuit substrate.
  • the integrated circuit substrate is a CMOS integrated circuit substrate.
  • Step S102 forming a pixel device on the upper surface of the integrated circuit substrate
  • the pixel device includes a pixel unit and a getter unit arranged on one side of the pixel unit, and the getter unit includes a getter layer arranged on the upper surface of the integrated circuit substrate, a supporting layer arranged on the The sealing layer on the upper surface of the support layer; the cavity in the getter unit communicates with the cavity of the pixel unit; or, the pixel device includes a getter layer and a getter layer on the upper surface of the integrated circuit substrate.
  • the reflective layer is arranged above the reflective layer and corresponds to the infrared sensor unit of the reflective layer.
  • Fig. 6 is a flow chart of a method for manufacturing a pixel-level packaging structure of an uncooled infrared detector provided in an embodiment of the present application, including:
  • Step S201 preparing an integrated circuit substrate.
  • Step S202 depositing a reflective layer to be processed on the upper surface of the integrated circuit substrate, and patterning the reflective layer to be processed to form a reflective layer.
  • Step S203 depositing a getter layer to be processed on the upper surface of the integrated circuit substrate, and patterning the getter layer to be processed to form a getter layer.
  • the getter layer 2 and the reflective layer 3 are located on the upper surface of the integrated circuit substrate 1 .
  • the thickness of the getter layer 2 can be in Include endpoint values.
  • the thickness of reflective layer 3 can be in Include endpoint values.
  • Step S204 forming a first sacrificial layer on the area of the upper surface of the integrated circuit substrate not covered by the getter layer and the reflective layer, and the upper surfaces of the getter layer and the reflective layer.
  • the first sacrificial layer 4 covers the getter layer 2 , the reflective layer 3 and the area of the upper surface of the integrated circuit substrate 1 not covered by the getter layer 2 and the reflective layer 3 .
  • the first sacrificial layer 4 is an organic sacrificial layer, the material of the first sacrificial layer 4 can be polyimide or amorphous carbon, and the thickness of the first sacrificial layer 4 is between 1.5 ⁇ m and 2.5 ⁇ m.
  • Step S205 Etching the first sacrificial layer to form a groove, and forming an electrode connection post in the groove.
  • Step S206 forming an infrared sensor unit at a position corresponding to the reflective layer on the upper surface of the first sacrificial layer.
  • the infrared sensor unit 5 is located on the upper surface of the first sacrificial layer 4.
  • the infrared sensor unit 5 includes a thermosensitive film that can convert thermal signals into electrical signals, which can be vanadium oxide, amorphous silicon, titanium oxide wait.
  • Step S207 forming a second sacrificial layer on the upper surface of the first sacrificial layer not covered by the infrared sensing unit and the upper surface of the infrared sensing unit.
  • the second sacrificial layer 6 covers the infrared sensing unit 5 and the first sacrificial layer 4 .
  • the material of the second sacrificial layer 6 can be SiO 2 , SiN, etc., and the thickness of the second sacrificial layer 6 is between 1.0 ⁇ m and 2 ⁇ m.
  • Step S208 Etching the first sacrificial layer and the second sacrificial layer to form support grooves; wherein, the etching is performed in two steps, the first step is to etch the depth to the upper surface of the inter-pixel channel, and the second step is to etch The channel area between the picture elements is etched, and the etching depth reaches the upper surface of the integrated circuit substrate.
  • the support groove 7 is formed after etching, and the function of the support groove 7 is to form a support layer.
  • the etching is carried out in two steps.
  • the first step is to etch the depth to the upper surface of the inter-pixel channel.
  • the first step is to etch the depth to D1.
  • the depth is D2, as shown in Figure 12, which is a schematic diagram of the A-A section in Figure 1, and Figure 12 shows two pixels on the left and right of the dotted line.
  • Half the length of the getter layer is X1
  • half the length of the channel between pixels is X2
  • the height of the channel between pixels is Y1
  • the thickness of the getter layer is Y2
  • X2 is 1.5 to 3 times of X1
  • Y1 is 1.5 of Y2 ⁇ 3 times.
  • Step S209 forming a support layer in the support groove, and etching the support layer to form release holes.
  • the thickness of the support layer 8 can be between 750nm and 1250nm, including the endpoint value.
  • the material of the support layer can be ⁇ -Si; each pixel device is etched on the top of the support layer 8 to form two release
  • the hole 9, as shown in FIG. 14 has a release hole width of 200 nm to 500 nm.
  • the support layer material is also deposited in the support groove 7, which belongs to the support layer.
  • Step S210 releasing the first sacrificial layer and the second sacrificial layer through the releasing hole.
  • the first sacrificial layer and the second sacrificial layer are released, as shown in FIG. 15 .
  • Step S211 forming a sealing layer on the upper surface of the support layer, the sealing layer filling the release hole.
  • the thickness of the sealing layer 10 is generally between 100 nm and 3000 nm, and the material of the sealing layer 10 can be zinc sulfide or germanium.
  • Fig. 6 to Fig. 16 are the process flow charts of the B-B section in Fig. 2, and the electrode connecting post does not exist in the B-B section.
  • the pixel device includes a getter layer and a reflective layer, and the infrared sensor unit arranged above the reflective layer and corresponding to the reflective layer, that is, the getter
  • the layer does not correspond to the infrared sensor unit, it will not affect the absorption of infrared radiation by the infrared sensor unit, and improve the performance of the pixel-level packaging structure, and, because the reflective layer corresponds to the infrared sensor unit, it is not a getter layer , when the getter layer is affected by oxidation, the reflectivity is reduced, and the reflectivity is reduced due to the obvious uneven structure of the surface, it will not affect the infrared sensor unit, thereby improving the accuracy of the pixel-level packaging structure.
  • the sealing layer after the sealing layer is formed on the upper surface of the support layer, it further includes:
  • An anti-reflection layer is formed on the upper surface of the sealing layer.
  • the material of the anti-reflection layer is germanium or zinc sulfide, and the thickness of the anti-reflection layer is generally between 100nm and 3000nm.
  • the transmittance of infrared radiation can be increased, and the performance of the pixel-level packaging structure of the uncooled infrared detector can be improved.
  • the getter unit includes a getter layer arranged on the upper surface of the integrated circuit substrate, a supporting layer, and a sealing layer arranged on the upper surface of the supporting layer;
  • the manufacturing method of the pixel-level packaging structure of the uncooled infrared detector is similar to the process of the above steps S201 to S210, the difference is that the reflective layer in the pixel unit and the getter unit.
  • the presence or absence and position of the getter layer can be adjusted according to the structural schematic diagrams shown in FIG. 3 and FIG. 5 , and the preparation process will not be described in detail in this application.
  • each embodiment in this specification is described in a progressive manner, each embodiment focuses on the difference from other embodiments, and the same or similar parts of each embodiment can be referred to each other.
  • the description is relatively simple, and for the related information, please refer to the description of the method part.

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Abstract

一种非制冷红外探测器的像素级封装结构及其制作方法，包括集成电路基板和设于集成电路基板上表面的像素器件；像素器件包括像素单元和设于像素单元一侧的吸气单元，吸气单元包括设于集成电路基板上表面的吸气剂层，支撑层，设于支撑层上表面的密封层；吸气单元中的空腔与像素单元的空腔连通；或者，像素器件包括设于集成电路基板上表面的吸气剂层和反射层，设于反射层上方且与反射层相对应的红外传感器单元。像素器件包括像素单元和设于像素单元一侧的吸气单元，吸气剂层并不设于像素单元中；或者像素器件中吸气剂层不与红外传感器单元对应，避免吸气剂层对红外传感器单元的影响，提升非制冷红外探测器性能。

Description

一种非制冷红外探测器的像素级封装结构及其制作方法
本申请要求于2021年10月19日提交中国专利局、申请号为202111217019.8、发明名称为“一种非制冷红外探测器的像素级封装结构及其制作方法”的中国专利申请的优先权，其全部内容通过引用结合在本申请中。
技术领域
本申请涉及红外成像技术领域，特别是涉及一种非制冷红外探测器的像素级封装结构及其制作方法。
背景技术
像素级封装作为***非制冷红外焦平面探测器的封装技术，是对单个像素或一系列像素的封装，在底部CMOS(Complementary Metal Oxide Semiconductor，互补金属氧化物半导体)集成电路基板晶圆上进行MEMS(Micro-Electro-Mechanical System，微机电***)制造工艺，相比晶圆级封装，像素级封装可以节省一片晶圆的设计和加工，同时不需要键合过程，极大的简化了制作过程，节省工艺时间。
吸气剂是保证非制冷红外探测器的像素级封装结构正常工作的必要材料，在像素级封装结构中，吸气剂层一般设置在集成电路基板上表面，且与红外传感器单元相对应，也即吸气剂层位于微测辐射热计的下方，吸气剂层表面呈现裂纹凹凸不平结构会降低吸气剂层的反射率，吸气性能越好，表面呈裂纹凹凸不平结构越明显，因此吸气剂层会对红外辐射产生吸收效果，降低红外辐射的反射，进而影响红外传感器单元对红外辐射的吸收，从而影响非制冷红外探测器的像素级封装结构的性能；由于像素级封装工艺特点，设置在像素腔内的吸气剂层要抵抗释放有机胶过程中氧化的影响，释放有机胶过程会降低吸气剂的反射率，影响红外探测器的检测精度。
因此，如何解决上述技术问题应是本领域技术人员重点关注的。
发明内容
本申请的目的是提供一种非制冷红外探测器的像素级封装结构及其制作方法，以提升非制冷红外探测器的像素级封装结构的性能。
为解决上述技术问题，本申请提供一种非制冷红外探测器的像素级封装结构，包括：
集成电路基板和设于所述集成电路基板上表面的像素器件；
所述像素器件包括像素单元和设于所述像素单元一侧的吸气单元，所述吸气单元包括设于所述集成电路基板上表面的吸气剂层，支撑层，设于所述支撑层上表面的密封层；所述吸气单元中的空腔与所述像素单元的空腔连通；
或者，所述像素器件包括设于所述集成电路基板上表面的吸气剂层和反射层，设于所述反射层上方且与所述反射层相对应的红外传感器单元。
可选的，还包括：
设于所述密封层上表面的增透层。
可选的，所述增透层的材料为硫化锌或者锗。
可选的，所述支撑层的厚度在750nm～1250nm之间，包括端点值。
可选的，所述密封层的材料为锗或者硫化锌。
可选的，所述反射层的厚度在
Figure PCTCN2021126704-appb-000001
包括端点值。
可选的，所述吸气剂层的厚度在
Figure PCTCN2021126704-appb-000002
包括端点值。
本申请还提供一种非制冷红外探测器的像素级封装结构制作方法，包括：
准备集成电路基板；
在所述集成电路基板的上表面形成像素器件；
其中，所述像素器件包括像素单元和设于所述像素单元一侧的吸气单元，所述吸气单元包括设于所述集成电路基板上表面的吸气剂层，支撑层，设于所述支撑层上表面的密封层；所述吸气单元中的空腔与所述像素单元的空腔连通；或者，所述像素器件包括设于所述集成电路基板上表面的吸气剂层和反射层，设于所述反射层上方且与所述反射层相对应的红外传感器单元。
可选的，当所述像素器件包括设于所述集成电路基板上表面的吸气剂层和反射层，设于所述反射层上方且与所述反射层相对应的红外传感器单元时，在所述集成电路基板的上表面形成像素器件包括：
在所述集成电路基板的上表面沉积待处理反射层，并对所述待处理反射层进行图形化处理，形成反射层；
在所述集成电路基板的上表面沉积待处理吸气剂层，并对所述待处理吸气剂层进行图形化处理，形成吸气剂层；
在所述集成电路基板的上表面未被所述吸气剂层和所述反射层覆盖的区域、所述吸气剂层和所述反射层的上表面形成第一牺牲层；
刻蚀所述第一牺牲层形成凹槽，并在所述凹槽中形成电极连接柱；
在所述第一牺牲层的上表面对应所述反射层的位置形成红外传感器单元；
在所述第一牺牲层的上表面未被所述红外传感单元覆盖的区域以及所述红外传感单元的上表面形成第二牺牲层；
刻蚀所述第一牺牲层和所述第二牺牲层形成支撑槽；其中，刻蚀分两步进行，第一步刻蚀深度到像元间通道上表面，第二步在非像元间通道区域刻蚀，刻蚀深度到所述集成电路基板的上表面；
在所述支撑槽中形成支撑层，刻蚀所述支撑层形成释放孔；
通过所述释放孔释放所述第一牺牲层和所述第二牺牲层；
在所述支撑层的上表面形成密封层，所述密封层填充所述释放孔。
可选的，在所述支撑层的上表面形成密封层之后，还包括：
在所述密封层的上表面形成增透层。
本申请所提供的一种非制冷红外探测器的像素级封装结构，包括：集成电路基板和设于所述集成电路基板上表面的像素器件；所述像素器件包括像素单元和设于所述像素单元一侧的吸气单元，所述吸气单元包括设于所述集成电路基板上表面的吸气剂层，支撑层，设于所述支撑层上表面的密封层；所述吸气单元中的空腔与所述像素单元的空腔连通；或者，所述像素器件包括设于所述集成电路基板上表面的吸气剂层和反射层，设于所述反射层上方且与所述反射层相对应的红外传感器单元。
可见，本申请中的像素级封装结构包括集成电路基板和设于集成电路基板上表面的像素器件，像素器件包括两种结构，一种像素器件包括像素单元和设于像素单元一侧的吸气单元，吸气单元包括吸气剂层，支撑层，密封层，且吸气单元中的空腔与像素单元的空腔连通，也即吸气剂层并不设于像素单元中，在实现吸气性能的同时，并不会对红外辐射产生吸收效果，即不会对像素单元产生影响，提升像素级封装结构的性能；另一种像素器件包括吸气剂层和反射层，设于反射层上方且与反射层相对应的红外传感器单元，即吸气剂层并不与红外传感器单元相对应，不会影响红外传感器单元对红外辐射的吸收，提升像素级封装结构的性能，并且，由于与红外传感器单元相对应的是反射层，并不是吸气剂层，当吸气剂层受到氧化影响，反射率降低，以及表面明显凹凸不平的结构导致反射率降低时，并不会对红外传感器单元造成影响，从而提升像素级封装结构的精度。
此外，本申请还提供一种具有上述优点的非制冷红外探测器的像素级封装结构制作方法。
附图说明
为了更清楚的说明本申请实施例或现有技术的技术方案，下面将对实施例或现有技术描述中所需要使用的附图作简单的介绍，显而易见地，下面描述中的附图仅仅是本申请的一些实施例，对于本领域普通技术人员来讲，在不付出创造性劳动的前提下，还可以根据这些附图获得其他的附图。
图1为本申请实施例所提供的一种非制冷红外探测器的像素级封装结构的示意图；
图2为图1所示的一种非制冷红外探测器的像素级封装结构的俯视图；
图3为图4所示的另一种非制冷红外探测器的像素级封装结构中像素单元阵列的结构示意图；
图4为本申请实施例所提供的另一种非制冷红外探测器的像素级封装结构的俯视图；
图5为图4所示的另一种非制冷红外探测器的像素级封装结构中吸气单元的结构示意图；
图6为本申请实施例所提供的一种非制冷红外探测器的像素级封装结构制作方法的流程图；
图7至图16为图2中非制冷红外探测器的像素级封装结构B-B截面的工艺流程图。
具体实施方式
为了使本技术领域的人员更好地理解本申请方案，下面结合附图和具体实施方式对本申请作进一步的详细说明。显然，所描述的实施例仅仅是本申请一部分实施例，而不是全部的实施例。基于本申请中的实施例，本领域普通技术人员在没有做出创造性劳动前提下所获得的所有其他实施例，都属于本申请保护的范围。
在下面的描述中阐述了很多具体细节以便于充分理解本发明，但是本发明还可以采用其他不同于在此描述的其它方式来实施，本领域技术人员可以在不违背本发明内涵的情况下做类似推广，因此本发明不受下面公开的具体实施例的限制。
正如背景技术部分所述，目前在像素级封装结构中，吸气剂层与红外传感器单元相对应，吸气剂层会对红外辐射产生吸收效果，影响红外传感器单元对红外辐射的吸收，从而影响非制冷红外探测器的像素级封装结构的性能；另外，由于像素级封装工艺特点，设置在像素腔内的吸气剂层要抵抗释放有机胶过程中氧化的影响；吸气剂层表面的裂纹凹凸不平结构会降低吸气剂层的反射率，吸气性能越好，表面呈裂纹凹凸不平结构越明显，释放有机胶过程会降低吸气剂的反射率，以锆基和钛基吸气剂为例，释放过程会使吸气剂反射率降低10％左右，影响红外探测器的检测精度。
有鉴于此，本申请提供了一种非制冷红外探测器的像素级封装结构，请参考图1至图4，包括：
集成电路基板1和设于所述集成电路基板1上表面的像素器件；
所述像素器件包括像素单元和设于所述像素单元一侧的吸气单元，所述吸气单元包括设于所述集成电路基板1上表面的吸气剂层2，支撑层8，设于所述支撑层8上表面的密封层10；所述吸气单元中的空腔与所述像素单元 的空腔连通；
或者，所述像素器件包括设于所述集成电路基板1上表面的吸气剂层2和反射层3，设于所述反射层3上方且与所述反射层3相对应的红外传感器单元5。
其中，集成电路基板1为COMS集成电路基板1。
下面对像素器件的两种结构分别进行介绍。
对于图1和图2所示的非制冷红外探测器的像素级封装结构，像素器件包括设于集成电路基板1上表面的吸气剂层2和反射层3，设于反射层3上方且与反射层3相对应的红外传感器单元5。其中，红外传感器单元5包括可以将热信号转化为电信号的热敏薄膜，可以为氧化钒，非晶硅，氧化钛等。
需要指出的是，像素器件还包括设于所述集成电路基板1上表面的电极连接柱12，支撑层8，设于所述支撑层8上表面的密封层10。电极连接柱12、支撑层8、密封层10的具体设置可参考相关技术。
其中，所述支撑层8的厚度可以在750nm～1250nm之间，包括端点值。支撑层8的材料可以为α-Si。
在制备过程中，需要在支撑层8上开孔形成释放孔9，以便释放牺牲材料，需要指出的是，释放孔9被密封层10填充，使得封装结构密封。一个像素器件中包括一个或者多个释放孔9，释放孔9宽度一般在200nm～500nm。
像素器件之间是互通的，吸气剂层2设置在像素器件间隙位置，图1中示出的像素器件的数量为两个。
吸气剂层2的材料包括但不限于锆、钛为主要成分的低温激活材料，吸气性能强的吸气剂，吸气剂层2的形状可以制作成规则形状或不规则形状，吸气剂层2的大小视像素器件而定。
为了保证吸气性能，同时节约吸气剂材料，控制制作成本，所述吸气剂层2的厚度可以在
Figure PCTCN2021126704-appb-000003
包括端点值，例如
Figure PCTCN2021126704-appb-000004
Figure PCTCN2021126704-appb-000005
等。
反射层3的材料为金属，具体的材料可自行选择，本申请不进行限定。所述反射层3的厚度可以在
Figure PCTCN2021126704-appb-000006
包括端点值，例如
Figure PCTCN2021126704-appb-000007
Figure PCTCN2021126704-appb-000008
等。
进一步的，为了增加红外辐射的透过率，提升非制冷红外探测器的像素级封装结构的性能，非制冷红外探测器的像素级封装结构还包括：
设于所述密封层10上表面的增透层11。
需要说明的是，本申请中对增透层11的材料不做限定，可自行设置。例如，所述增透层11的材料为锗，或者，所述增透层11的材料为硫化锌。
还需要说明的是，本申请中对密封层10的材料不做具体限定，可自行设置。例如，所述密封层10的材料为硫化锌，或者，密封层10的材料为锗等等。
密封层10的厚度一般在100nm～3000nm之间，增透层11的厚度一般在100nm～3000nm之间。
本实施例中像素器件包括吸气剂层2和反射层3，设于反射层3上方且与反射层3相对应的红外传感器单元5，即吸气剂层2并不与红外传感器单元5相对应，不会影响红外传感器单元5对红外辐射的吸收，提升像素级封装结构的性能，并且，由于与红外传感器单元5相对应的是反射层3，并不是吸气剂层2，当吸气剂层2受到氧化影响，反射率降低，以及表面明显凹凸不平的结构导致反射率降低时，并不会对红外传感器单元5造成影响，从而提升像素级封装结构的精度。
对于图4所示的非制冷红外探测器的像素级封装结构，像素器件包括像素单元13和设于像素单元一侧的吸气单元14，吸气单元14包括设于集成电路基板1上表面的吸气剂层2，支撑层8，设于支撑层8上表面的密封层10；吸气单元中的空腔与像素单元的空腔连通。
图3为本实施例中的像素单元13阵列的结构示意图，像素单元13包括设于集成电路基板1上表面的反射层3和电极连接柱12，支撑层8，设于反射层3上方且与反射层3相对应的红外传感器单元5，设于支撑层8上表面的密封层10，支撑层8上的释放孔9被密封层10填充。其中，红外传感器单元5包括可以将热信号转化为电信号的热敏薄膜，可以为氧化钒，非晶硅，氧化钛等。像素单元13中并不包括吸气剂层2。
反射层3的材料为金属，具体的材料可行选择，本申请不进行限定。所 述反射层3的厚度可以在
Figure PCTCN2021126704-appb-000009
包括端点值，例如
Figure PCTCN2021126704-appb-000010
Figure PCTCN2021126704-appb-000011
等。
本实施例中吸气单元14的结构示意图如图5所示，吸气单元包括设于集成电路基板1上表面的吸气剂层2，支撑层8，设于支撑层8上表面的密封层10。吸气单元中的空腔与像素单元的空腔连通。在制备过程中，需要在支撑层8上开孔形成释放孔9，以便释放牺牲材料，需要指出的是，释放孔9被密封层10填充，使得封装结构密封。
吸气剂层2设置在没有红外传感器单元5的吸气单元中，吸气单元与像素单元之间相互连通。
为了保证吸气性能，同时节约吸气剂材料，控制制作成本，所述吸气剂层2的厚度可以在
Figure PCTCN2021126704-appb-000012
包括端点值，例如
Figure PCTCN2021126704-appb-000013
Figure PCTCN2021126704-appb-000014
等。吸气剂层2的材料包括但不限于锆、钛为主要成分的低温激活材料，吸气性能强的材料。
所述支撑层8的厚度可以在750nm～1250nm之间，包括端点值。支撑层8的材料可以为α-Si。一个像素单元和一个吸气单元中均包括两个释放孔9，释放孔9宽度一般在200nm～500nm。
为了增加红外辐射的透过率，提升非制冷红外探测器的像素级封装结构的性能，非制冷红外探测器的像素级封装结构还包括：
设于所述密封层10上表面的增透层11。
需要说明的是，本申请中对增透层11的材料不做限定，可自行设置。例如，所述增透层11的材料为锗，或者，所述增透层11的材料为硫化锌等等。当密封层的材料为锗时，增透层的材料为硫化锌；当密封层的材料为硫化锌时，增透层的材料为锗。
还需要说明的是，本申请中对密封层10的材料不做具体限定，可自行设置。例如，所述密封层10的材料为硫化锌，或者，密封层10的材料为锗。
本实施例中像素器件包括像素单元和设于像素单元一侧的吸气单元，吸气单元包括吸气剂层2，支撑层8，密封层10，且吸气单元中的空腔与像素单元的空腔连通，也即吸气剂层2并不设于像素单元中，在实现吸气性能的同时，并不会对红外辐射产生吸收效果，即不会对像素单元产生影响， 提升像素级封装结构的性能，提升像素级封装结构的精度。
需要强调的是，单一像素器件的真空失效就会造成整个像素级封装结的失效，本申请中根据文献Latest improvements in microbolometer thin film packaging，在2014年Atomic Energy and Alternative Energies Commission研究人员根据镀膜材料，工艺和镀膜参数的调整，可以保证无因真空失效造成的像素盲元。
本申请还提供一种非制冷红外探测器的像素级封装结构制作方法的流程图，包括：
步骤S101：准备集成电路基板。
集成电路基板为CMOS集成电路基板。
步骤S102：在所述集成电路基板的上表面形成像素器件；
其中，所述像素器件包括像素单元和设于所述像素单元一侧的吸气单元，所述吸气单元包括设于所述集成电路基板上表面的吸气剂层，支撑层，设于所述支撑层上表面的密封层；所述吸气单元中的空腔与所述像素单元的空腔连通；或者，所述像素器件包括设于所述集成电路基板上表面的吸气剂层和反射层，设于所述反射层上方且与所述反射层相对应的红外传感器单元。
当所述像素器件包括设于所述集成电路基板上表面的吸气剂层和反射层，设于所述反射层上方且与所述反射层相对应的红外传感器单元时，请参考图6，图6为本申请实施例所提供的一种非制冷红外探测器的像素级封装结构制作方法的流程图，包括：
步骤S201：准备集成电路基板。
步骤S202：在所述集成电路基板的上表面沉积待处理反射层，并对所述待处理反射层进行图形化处理，形成反射层。
步骤S203：在所述集成电路基板的上表面沉积待处理吸气剂层，并对所述待处理吸气剂层进行图形化处理，形成吸气剂层。
本步骤请参考图7，吸气剂层2和反射层3位于集成电路基板1的上表面。 吸气剂层2的厚度可以在
Figure PCTCN2021126704-appb-000015
包括端点值。反射层3的厚度可以在
Figure PCTCN2021126704-appb-000016
包括端点值。
步骤S204：在所述集成电路基板的上表面未被所述吸气剂层和所述反射层覆盖的区域、所述吸气剂层和所述反射层的上表面形成第一牺牲层。
本步骤请参考图8，第一牺牲层4覆盖吸气剂层2、反射层3和集成电路基板1的上表面未被吸气剂层2和反射层3覆盖的区域。
第一牺牲层4为有机牺牲层，第一牺牲层4的材料可采用聚酰亚胺或者非晶碳，第一牺牲层4厚度在1.5μm～2.5μm之间。
步骤S205：刻蚀所述第一牺牲层形成凹槽，并在所述凹槽中形成电极连接柱。
步骤S206：在所述第一牺牲层的上表面对应所述反射层的位置形成红外传感器单元。
本步骤请参考图9，红外传感器单元5位于第一牺牲层4的上表面，红外传感器单元5包括可以将热信号转化为电信号的热敏薄膜，可以为氧化钒，非晶硅，氧化钛等。
步骤S207：在所述第一牺牲层的上表面未被所述红外传感单元覆盖的区域以及所述红外传感单元的上表面形成第二牺牲层。
请参考图10，第二牺牲层6覆盖红外传感单元5和第一牺牲层4。第二牺牲层6的材料可采用SiO 2，SiN等，第二牺牲层6的厚度为1.0μm～2μm之间。
步骤S208：刻蚀所述第一牺牲层和所述第二牺牲层形成支撑槽；其中，刻蚀分两步进行，第一步刻蚀深度到像元间通道上表面，第二步在非像元间通道区域刻蚀，刻蚀深度到所述集成电路基板的上表面。
请参考图11，刻蚀后形成支撑槽7，支撑槽7的作用是形成支撑层。
刻蚀分两步进行，第一步刻蚀深度到像元间通道上表面，第一步刻蚀深度为D1，第二步在非像元间通道区域刻蚀深度到集成电路基板，刻蚀深度为D2，如图12所示，图12为图1中A-A截面的示意图，图12中示出虚线左右两个像元。吸气剂层一半的长度为X1，像元间通道一半的长度X2，像元间通道高度为Y1，吸气剂层的厚度为Y2，X2是X1的1.5～3倍，Y1是Y2的1.5～3倍。
步骤S209：在所述支撑槽中形成支撑层，刻蚀所述支撑层形成释放孔。
本步骤请参考图13，支撑层8的厚度可以在750nm～1250nm之间，包括端点值，支撑层的材料可以为α-Si；在支撑层8顶部对每一个像素器件刻蚀形成两个释放孔9，如图14所示，释放孔宽度200nm～500nm。
需要指出的是，支撑槽7中同样沉积有支撑层材料，属于支撑层。
步骤S210：通过所述释放孔释放所述第一牺牲层和所述第二牺牲层。
释放第一牺牲层和第二牺牲层，如图15所示。
步骤S211：在所述支撑层的上表面形成密封层，所述密封层填充所述释放孔。
本步骤请参考图16，密封层10的厚度一般在100nm～3000nm之间，密封层10的材料可以为硫化锌，或者锗。
需要指出的是，图6至图16为图2中B-B截面的工艺流程图，电极连接柱在B-B截面中并不存在。
本实施例中制得的非制冷红外探测器的像素级封装结构中，像素器件包括吸气剂层和反射层，设于反射层上方且与反射层相对应的红外传感器单元，即吸气剂层并不与红外传感器单元相对应，不会影响红外传感器单元对红外辐射的吸收，提升像素级封装结构的性能，并且，由于与红外传感器单元相对应的是反射层，并不是吸气剂层，当吸气剂层受到氧化影响，反射率降低，以及表面明显凹凸不平的结构导致反射率降低时，并不会对红外传感器单元造成影响，从而提升像素级封装结构的精度。
进一步的，在本申请的一个实施例中，在所述支撑层的上表面形成密封层之后，还包括：
在所述密封层的上表面形成增透层。
增透层的材料为锗或者硫化锌，增透层的厚度一般在100nm～3000nm之间。
本实施例中通过设置增透层，可以增加红外辐射的透过率，提升非制冷红外探测器的像素级封装结构的性能。
当像素器件包括像素单元和设于像素单元一侧的吸气单元，吸气单元 包括设于集成电路基板上表面的吸气剂层，支撑层，设于支撑层上表面的密封层；吸气单元中的空腔与像素单元的空腔连通时，非制冷红外探测器的像素级封装结构制作方法与上述步骤S201至S210的过程类似，区别之处在于，像素单元和吸气单元中反射层和吸气剂层的有无和位置，具体根据图3和图5所示的结构示意图进行调整即可，本申请中对制备过程不再进行详细阐述。
本说明书中各个实施例采用递进的方式描述，每个实施例重点说明的都是与其它实施例的不同之处，各个实施例之间相同或相似部分互相参见即可。对于实施例公开的装置而言，由于其与实施例公开的方法相对应，所以描述的比较简单，相关之处参见方法部分说明即可。
以上对本申请所提供的非制冷红外探测器的像素级封装结构及其制作方法进行了详细介绍。本文中应用了具体个例对本申请的原理及实施方式进行了阐述，以上实施例的说明只是用于帮助理解本申请的方法及其核心思想。应当指出，对于本技术领域的普通技术人员来说，在不脱离本申请原理的前提下，还可以对本申请进行若干改进和修饰，这些改进和修饰也落入本申请权利要求的保护范围内。

Claims (10)

  1. 一种非制冷红外探测器的像素级封装结构，其特征在于，包括：
    集成电路基板和设于所述集成电路基板上表面的像素器件；
    所述像素器件包括像素单元和设于所述像素单元一侧的吸气单元，所述吸气单元包括设于所述集成电路基板上表面的吸气剂层，支撑层，设于所述支撑层上表面的密封层；所述吸气单元中的空腔与所述像素单元的空腔连通；
    或者，所述像素器件包括设于所述集成电路基板上表面的吸气剂层和反射层，设于所述反射层上方且与所述反射层相对应的红外传感器单元。
  2. 如权利要求1所述的非制冷红外探测器的像素级封装结构，其特征在于，还包括：
    设于所述密封层上表面的增透层。
  3. 如权利要求2所述的非制冷红外探测器的像素级封装结构，其特征在于，所述增透层的材料为硫化锌或者锗。
  4. 如权利要求1所述的非制冷红外探测器的像素级封装结构，其特征在于，所述支撑层的厚度在750nm～1250nm之间，包括端点值。
  5. 如权利要求1所述的非制冷红外探测器的像素级封装结构，其特征在于，所述密封层的材料为锗或者硫化锌。
  6. 如权利要求1所述的非制冷红外探测器的像素级封装结构，其特征在于，所述反射层的厚度在
    Figure PCTCN2021126704-appb-100001
    包括端点值。
  7. 如权利要求1至6任一项所述的非制冷红外探测器的像素级封装结构，其特征在于，所述吸气剂层的厚度在
    Figure PCTCN2021126704-appb-100002
    包括端点值。
  8. 一种非制冷红外探测器的像素级封装结构制作方法，其特征在于，包括：
    准备集成电路基板；
    在所述集成电路基板的上表面形成像素器件；
    其中，所述像素器件包括像素单元和设于所述像素单元一侧的吸气单元，所述吸气单元包括设于所述集成电路基板上表面的吸气剂层，支撑层，设于所述支撑层上表面的密封层；所述吸气单元中的空腔与所述像素单元 的空腔连通；或者，所述像素器件包括设于所述集成电路基板上表面的吸气剂层和反射层，设于所述反射层上方且与所述反射层相对应的红外传感器单元。
  9. 如权利要求8所述的非制冷红外探测器的像素级封装结构制作方法，其特征在于，当所述像素器件包括设于所述集成电路基板上表面的吸气剂层和反射层，设于所述反射层上方且与所述反射层相对应的红外传感器单元时，在所述集成电路基板的上表面形成像素器件包括：
    在所述集成电路基板的上表面沉积待处理反射层，并对所述待处理反射层进行图形化处理，形成反射层；
    在所述集成电路基板的上表面沉积待处理吸气剂层，并对所述待处理吸气剂层进行图形化处理，形成吸气剂层；
    在所述集成电路基板的上表面未被所述吸气剂层和所述反射层覆盖的区域、所述吸气剂层和所述反射层的上表面形成第一牺牲层；
    刻蚀所述第一牺牲层形成凹槽，并在所述凹槽中形成电极连接柱；
    在所述第一牺牲层的上表面对应所述反射层的位置形成红外传感器单元；
    在所述第一牺牲层的上表面未被所述红外传感单元覆盖的区域以及所述红外传感单元的上表面形成第二牺牲层；
    刻蚀所述第一牺牲层和所述第二牺牲层形成支撑槽；其中，刻蚀分两步进行，第一步刻蚀深度到像元间通道上表面，第二步在非像元间通道区域刻蚀，刻蚀深度到所述集成电路基板的上表面；
    在所述支撑槽中形成支撑层，刻蚀所述支撑层形成释放孔；
    通过所述释放孔释放所述第一牺牲层和所述第二牺牲层；
    在所述支撑层的上表面形成密封层，所述密封层填充所述释放孔。
  10. 如权利要求9所述的非制冷红外探测器的像素级封装结构制作方法，其特征在于，在所述支撑层的上表面形成密封层之后，还包括：
    在所述密封层的上表面形成增透层。
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