WO2023026716A1 - アクティブバランサー - Google Patents
アクティブバランサー Download PDFInfo
- Publication number
- WO2023026716A1 WO2023026716A1 PCT/JP2022/027503 JP2022027503W WO2023026716A1 WO 2023026716 A1 WO2023026716 A1 WO 2023026716A1 JP 2022027503 W JP2022027503 W JP 2022027503W WO 2023026716 A1 WO2023026716 A1 WO 2023026716A1
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- active balancer
- cells
- current
- switching element
- voltage
- Prior art date
Links
- 238000001514 detection method Methods 0.000 claims abstract description 44
- 239000003990 capacitor Substances 0.000 claims abstract description 12
- 230000009467 reduction Effects 0.000 abstract description 2
- 238000010586 diagram Methods 0.000 description 11
- 238000007599 discharging Methods 0.000 description 3
- 238000000034 method Methods 0.000 description 3
- HBBGRARXTFLTSG-UHFFFAOYSA-N Lithium ion Chemical compound [Li+] HBBGRARXTFLTSG-UHFFFAOYSA-N 0.000 description 2
- 229910001416 lithium ion Inorganic materials 0.000 description 2
- 230000006866 deterioration Effects 0.000 description 1
- 239000003792 electrolyte Substances 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 230000036962 time dependent Effects 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02J—CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
- H02J7/00—Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries
- H02J7/02—Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries for charging batteries from ac mains by converters
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01M—PROCESSES OR MEANS, e.g. BATTERIES, FOR THE DIRECT CONVERSION OF CHEMICAL ENERGY INTO ELECTRICAL ENERGY
- H01M10/00—Secondary cells; Manufacture thereof
- H01M10/42—Methods or arrangements for servicing or maintenance of secondary cells or secondary half-cells
- H01M10/44—Methods for charging or discharging
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01M—PROCESSES OR MEANS, e.g. BATTERIES, FOR THE DIRECT CONVERSION OF CHEMICAL ENERGY INTO ELECTRICAL ENERGY
- H01M10/00—Secondary cells; Manufacture thereof
- H01M10/42—Methods or arrangements for servicing or maintenance of secondary cells or secondary half-cells
- H01M10/48—Accumulators combined with arrangements for measuring, testing or indicating the condition of cells, e.g. the level or density of the electrolyte
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02J—CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
- H02J7/00—Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries
- H02J7/0013—Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries acting upon several batteries simultaneously or sequentially
- H02J7/0014—Circuits for equalisation of charge between batteries
- H02J7/0016—Circuits for equalisation of charge between batteries using shunting, discharge or bypass circuits
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
- Y02E60/00—Enabling technologies; Technologies with a potential or indirect contribution to GHG emissions mitigation
- Y02E60/10—Energy storage using batteries
Definitions
- the present invention relates to an active balancer.
- the present invention relates to an active balancer for controlling charging and discharging by connecting to a battery module including a plurality of cells connected in series.
- Battery modules in which multiple cells are connected in series, are widely used as secondary batteries for supplying power at high voltage.
- variations in the state of charge occur during repeated charging and discharging. Variation in the state of charge reduces the effective capacity of the entire battery module, and causes deterioration of individual cells due to overcharge and overdischarge.
- a balance control device that is, a balancer, is required for performing charge/discharge control for each cell and equalizing the charged state of the cells.
- Balancers include active balancers and passive balancers. In recent years, active balancers that regeneratively charge discharge from high-voltage cells to low-voltage cells are often used.
- the active balancer has multiple switching elements for switching the direction of power supplied to the cells.
- a soft switching method is known as a method for efficiently turning on and off a switching element.
- the soft switching method has an LC resonance circuit consisting of an inductance element and a capacitor for determining switching timing.
- the active balancer controls current or voltage sinusoidally by this LC resonance circuit, and switches each switching element on and off when either the current or voltage flowing through the switching element is substantially zero. This can reduce switching loss and noise.
- Patent Document 1 discloses a power storage device that reduces the burden on cells when equalizing cell voltages, including a series resonance circuit including a reactor and a capacitor, and a power storage control device that controls the connection state between the cells and the series resonance circuit. , and the power storage control device transmits and receives energy between cells via a series resonance circuit.
- Fig. 8 shows a circuit diagram showing an example of a circuit configuration for a conventional active balancer to equalize the charged states of two cells.
- each active balancer in order to detect the resonance of the voltage and current of the LC resonance circuit, each active balancer includes four voltage detection circuits M1, M2, M3, and M4, and C Therefore, one current detection circuit shown in .
- the present invention has been made in view of the above problems to be solved, and provides a novel resonance circuit configuration for an active balancer, thereby reducing the size and cost of the entire active balancer. It is an issue.
- the invention according to claim 1 relates to an active balancer that equalizes the voltages of a plurality of cells connected in series.
- the active balancer of the present invention comprises capacitors and inductances arranged between a plurality of cells, a plurality of switching elements for switching connection states between the plurality of cells, and a detection circuit for detecting the voltage of the switching elements. I have.
- the active balancer of the present invention is characterized in that the detection circuit detects voltage resonance and current resonance of the switching element.
- two switching elements are arranged in parallel for one cell, and one detection circuit is arranged for each switching element to detect the current and voltage of the switching element. By doing so, it is preferable to detect the voltage resonance and the current resonance of the switching element.
- the configuration of the detection circuit can be simplified more than before by the configuration in which the detection circuit detects both voltage resonance and current resonance of the switching element. As a result, it is possible to provide a smaller active balancer at a lower cost.
- FIG. 1 is a circuit diagram outlining the basic circuit configuration of an active balancer according to an embodiment of the present invention.
- FIG. 2 is a diagram showing, by arrows, the path of current through the active balancer of the present invention when the active balancer of the present invention charges from the lower cell to the upper cell.
- FIG. 3 is a diagram showing, with arrows, the path of current through the active balancer of the present invention when the active balancer of the present invention charges from the upper cell to the lower cell in the figure.
- FIG. 4 is a diagram showing, by arrows, current paths through the active balancer of the present invention when the active balancer of the present invention charges from the upper cell to the lower cell.
- FIG. 1 is a circuit diagram outlining the basic circuit configuration of an active balancer according to an embodiment of the present invention.
- FIG. 2 is a diagram showing, by arrows, the path of current through the active balancer of the present invention when the active balancer of the present invention charges from the lower cell to the upper cell.
- FIG. 5 is a diagram showing, with arrows, current paths through the active balancer of the present invention when the active balancer of the present invention charges from the upper cell to the lower cell in the figure.
- FIG. 6 is a diagram showing examples of voltage waveforms and current waveforms detected by the detection circuit of the active balancer of the present invention.
- FIG. 7 is a diagram showing an example of voltage waveforms and current waveforms detected by the detection circuit of the active balancer of the present invention.
- FIG. 8 is a circuit diagram outlining the basic circuit configuration of a conventional active balancer.
- FIG. 1 shows an outline of the circuit configuration of an active balancer 1 of the present invention when performing charge/discharge control of two cells 11 and 12 connected in series.
- the active balancer 1 of this embodiment includes a capacitor 2 and an inductance 3 arranged between the cells 11 and 12 and a plurality of switching elements Q 1 , Q 2 , and Q 3 for switching connection states between the cells 11 and 12 . , Q 4 and detection circuits M 1 , M 2 , M 3 , M 4 for detecting the current and voltage of the switching elements.
- the cells 11 and 12 for which the active balancer 1 performs charge/discharge control are composed of a positive electrode, a negative electrode, and an electrolyte filled between the electrodes, and are secondary batteries that can be repeatedly charged and discharged.
- a cell is also defined as a series connection of two or more batteries with a positive terminal and a negative terminal disposed at the terminal end portions. Power can be supplied to an external load from the terminals of the cell.
- the cells 11 and 12 are preferably lithium ion batteries, lithium ion capacitors, or electrolytic double layer capacitors.
- the active balancer 1 of the present embodiment performs control such that the power of one of the cells 11 and 12 having a higher state of charge is temporarily stored in the capacitor and redistributed to the other cell having a lower state of charge.
- the switching elements Q 1 , Q 2 , Q 3 and Q 4 of the active balancer 1 form a switching half bridge circuit.
- a capacitor that temporarily stores the power of the cell is connected to the cells 11 and 12 via a half bridge circuit.
- Transistors are generally used as the switching elements Q 1 , Q 2 , Q 3 and Q 4 .
- the switching elements most preferably used are MOSFETs.
- the capacitor 2 and the inductance 3 constitute an LC series circuit.
- voltage resonance and current resonance occur, the current and voltage change in the form of sinusoidal functions, and there occurs a timing at which either the current or the voltage becomes zero.
- FIG. 2 is a diagram showing an example of a path of current passing through the active balancer 1 when the active balancer 1 of the present embodiment charges the cells 11 from the cells 12 with thick arrows.
- the switching elements Q1 and Q3 are turned on, and the switching elements Q2 and Q4 are turned off.
- the number of detection circuits can be reduced by treating the switching element as a shunt resistor and providing a single detection circuit with both current and voltage detection functions.
- the switching elements Q 1 , Q 2 , Q 3 , Q 4 generate large power losses when switched on and off when the current and voltage are not zero. Therefore, the active balancer 1 switches the switching elements Q 1 , Q 2 , Q 3 , and Q 4 on and off at the timing when either the current or the voltage becomes zero, that is, when the zero cross is detected. Losses can be greatly reduced.
- Detecting circuits M1 , M2 , M3 and M4 corresponding to the switching elements Q1 , Q2 , Q3 and Q4 on a one-to-one basis are used to detect the ON/OFF switching timing.
- Operational amplifiers (operational amplifiers) OP1 , OP2 , OP3 , OP4 are connected in parallel to the respective switching elements Q1 , Q2 , Q3 , Q4 .
- Circuits M 1 , M 2 , M 3 , M 4 are connected.
- a detection circuit M 1 detects the source-drain voltage of the switching element Q 1 .
- a detection circuit M 2 detects the source-drain current of the switching element Q 2 .
- the detection circuit M 2 can also detect the source-drain voltage of the switching element Q 2 .
- a detection circuit M3 detects the source-drain current of the switching element Q3 .
- the detection circuit M 3 can also detect the source-drain voltage of the switching element Q 3 .
- a detection circuit M4 detects the source-drain voltage of the switching element Q4 .
- detection accuracy can be improved by providing the detection circuits M 2 and M 3 for current detection with operational amplifiers such as operational amplifiers.
- On/off switching timings of the switching elements are determined based on the detection result of the detection circuit, and the gate voltages G 1 , G 2 , G 3 and G of the switching elements Q 1 , Q 2 , Q 3 and Q 4 are determined. 4 is controlled by control means not shown.
- FIG. 6 shows examples of voltage waveforms and current waveforms detected by the detection circuits M 1 , M 2 , M 3 , and M 4 when the active balancer 1 of this embodiment charges the cells 12 to 11
- the detection FIG. 10 shows control results of the gate voltage for switching performed in response to the results
- FIG. 7 shows examples of voltage waveforms and current waveforms detected by the detection circuits M 1 , M 2 , M 3 , and M 4 when the active balancer 1 of this embodiment charges the cells 11 to 12
- FIG. 10 shows control results of the gate voltage for switching performed in response to the results
- I_L indicates the time-dependent change in the current flowing through the coil 3, which is the inductance, detected by the detection circuit M2 .
- G 1 shows the time-varying waveform of the gate voltage G 1 applied to the switching element Q 1 by the control circuit.
- VQ 1 shows the time variation of the source-drain voltage of the switching element Q 1 measured by the detection circuit M 1 .
- G 2 shows the time-varying waveform of the gate voltage G 2 applied to the switching element Q 2 by the control circuit.
- VQ 2 shows the time variation of the source-drain voltage of the switching element Q 1 measured by the detection circuit M 2 .
- G3 shows the time-varying waveform of the gate voltage G3 applied to the switching element Q3 by the control circuit.
- VQ 3 shows the time variation of the source-drain voltage of the switching element Q 3 measured by the detection circuit M 3 .
- G4 shows the time-varying waveform of the gate voltage G4 applied to the switching element Q4 by the control circuit.
- VQ 4 shows the time variation of the source-drain voltage of the switching element Q 4 measured by the detection circuit M 4 .
- the gate voltage G 1 of the switching element Q 1 is set at the timing when the source-drain voltage of the switching element Q 1 becomes zero.
- switching between ON and OFF is performed at the timing when the current of the coil 3 becomes zero.
- the gate voltage G 2 of the switching element Q 2 is switched on and off at the timing when the source-drain voltage of the switching element Q 2 becomes zero or the current becomes zero.
- the gate voltage G 3 of the switching element Q 3 is switched on and off at the timing when the source-drain voltage of the switching element Q 3 becomes zero or the current becomes zero.
- the gate voltage G4 of the switching element Q4 is switched so that the ON and OFF timings of the switching element Q3 are reversed.
- FIG. 3 to 5 are diagrams showing current paths through the active balancer 1 when the active balancer 1 of the present embodiment charges the cells 11 to 12 with thick arrows.
- the active balancer 1 changes the current path in three ways shown in FIGS. 3 to 5 by controlling the switching elements on and off.
- the switching timing of the switching element is the timing at which the source-drain voltage of the switching element becomes zero, or the timing at which the current in the coil 3 becomes zero, as in the case of charging the cell 11 from the cell 12 . 3 to 5, the current value flowing through the inductor 3 and the current value flowing through the switching element are also equal. Therefore, by treating the switching element as a shunt resistor and arranging the current detection circuit, it is possible to detect both the current and the voltage with one detection circuit.
- the period A indicated by the letter A in FIG. 7 starts when the current in the coil 3 becomes zero and continues until the source-drain voltage of the switching element Q4 becomes zero.
- the active balancer 1 turns on the switching elements Q1 and Q3 and turns off the switching elements Q2 and Q4 .
- the current path through the active balancer 1 during period A is shown in FIG.
- a period B following the period A in FIG. 7 continues until the current in the coil 3 becomes zero.
- the active balancer 1 turns on the switching elements Q 1 , Q 3 , and Q 4 during the period B, and turns off the switching element Q 2 .
- the current path through the active balancer 1 during period B is shown in FIG.
- Period C following period B in FIG. 7 continues until the timing when the source-drain voltage of switching element Q 4 becomes zero.
- the active balancer 1 turns on the switching elements Q 2 and Q 4 and turns off the switching elements Q 1 and Q 3 .
- the current path through the active balancer 1 during period C is shown in FIG.
- a period D following the period C in FIG. 7 continues until the current in the coil 3 becomes zero again.
- the active balancer 1 turns on the switching elements Q 1 , Q 3 , and Q 4 and turns off the switching element Q 2 as in the period B.
- the path of the current passing through the active balancer 1 during the period D is the same path shown in FIG.
- the active balancer of the present embodiment for example, when performing charge/discharge control of two cells connected in series, controls both current and voltage in one-to-one correspondence with switching elements.
- efficient switching control can be performed with reduced power loss during switching.
- the switching control can be sufficiently performed with a smaller number of detection circuits. miniaturization and cost reduction can be achieved.
- the active balancer of the present invention can also be applied to equalize the voltages of more cells. For example, when equalizing the voltages of four cells, three active balancers are used to form a multistage hierarchical structure, so that the voltages can be equalized when charging and discharging are repeated. can.
- the active balancer according to the present invention is suitably mounted on various types of vehicles that use secondary batteries as well as any industrial equipment.
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- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Chemical & Material Sciences (AREA)
- Chemical Kinetics & Catalysis (AREA)
- Electrochemistry (AREA)
- General Chemical & Material Sciences (AREA)
- Charge And Discharge Circuits For Batteries Or The Like (AREA)
Abstract
Description
2 コンデンサ
3 インダクタンス(コイル)
11,12 セル
Q1,Q2,Q3,Q4 スイッチング素子
M1,M2,M3,M4 検出回路
OP1,OP2,OP3,OP4 オペアンプ
Claims (2)
- 直列に接続された複数のセルの電圧を均等化するアクティブバランサーであって、
前記アクティブバランサーは、
複数の前記セルとの間に配置されたコンデンサおよびインダクタンスと、
複数の前記セルの間の接続状態を切り替える複数のスイッチング素子と、
前記スイッチング素子の電圧を検出する検出回路と、
を備えており、
前記検出回路が、前記スイッチング素子の電圧共振と電流共振とを検出することを特徴とするアクティブバランサー。 - 一個の前記セルに対して、二個の前記スイッチング素子が並列に配置され、
それぞれの前記スイッチング素子に対して、検出回路が一個ずつ配置されて、前記スイッチング素子の電流と電圧を検出することで、前記スイッチング素子の電圧共振と電流共振とを検出することを特徴とする請求項1記載のアクティブバランサー。
Priority Applications (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN202280049260.0A CN117751504A (zh) | 2021-08-26 | 2022-07-13 | 主动平衡器 |
EP22861007.7A EP4395116A1 (en) | 2021-08-26 | 2022-07-13 | Active balancer |
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2021137879A JP2023032026A (ja) | 2021-08-26 | 2021-08-26 | アクティブバランサー |
JP2021-137879 | 2021-08-26 |
Publications (1)
Publication Number | Publication Date |
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WO2023026716A1 true WO2023026716A1 (ja) | 2023-03-02 |
Family
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Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
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PCT/JP2022/027503 WO2023026716A1 (ja) | 2021-08-26 | 2022-07-13 | アクティブバランサー |
Country Status (4)
Country | Link |
---|---|
EP (1) | EP4395116A1 (ja) |
JP (1) | JP2023032026A (ja) |
CN (1) | CN117751504A (ja) |
WO (1) | WO2023026716A1 (ja) |
Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2012034446A (ja) * | 2010-07-28 | 2012-02-16 | Toshiba Corp | 蓄電装置及びエネルギバランス調整方法 |
JP2014528692A (ja) * | 2011-10-12 | 2014-10-27 | 日本テキサス・インスツルメンツ株式会社 | バッテリ及び他の電源に対するインダクタベースのアクティブ均衡化 |
WO2015045660A1 (ja) * | 2013-09-26 | 2015-04-02 | ソニー株式会社 | 蓄電装置、蓄電制御装置および蓄電制御方法 |
JP2019537409A (ja) * | 2016-10-12 | 2019-12-19 | オッポ広東移動通信有限公司 | バッテリ管理回路と方法、バランス回路と方法及び被充電機器 |
-
2021
- 2021-08-26 JP JP2021137879A patent/JP2023032026A/ja active Pending
-
2022
- 2022-07-13 EP EP22861007.7A patent/EP4395116A1/en active Pending
- 2022-07-13 WO PCT/JP2022/027503 patent/WO2023026716A1/ja active Application Filing
- 2022-07-13 CN CN202280049260.0A patent/CN117751504A/zh active Pending
Patent Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2012034446A (ja) * | 2010-07-28 | 2012-02-16 | Toshiba Corp | 蓄電装置及びエネルギバランス調整方法 |
JP2014528692A (ja) * | 2011-10-12 | 2014-10-27 | 日本テキサス・インスツルメンツ株式会社 | バッテリ及び他の電源に対するインダクタベースのアクティブ均衡化 |
WO2015045660A1 (ja) * | 2013-09-26 | 2015-04-02 | ソニー株式会社 | 蓄電装置、蓄電制御装置および蓄電制御方法 |
JP2015065795A (ja) | 2013-09-26 | 2015-04-09 | ソニー株式会社 | 蓄電装置、蓄電制御装置および蓄電制御方法 |
JP2019537409A (ja) * | 2016-10-12 | 2019-12-19 | オッポ広東移動通信有限公司 | バッテリ管理回路と方法、バランス回路と方法及び被充電機器 |
Also Published As
Publication number | Publication date |
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JP2023032026A (ja) | 2023-03-09 |
CN117751504A (zh) | 2024-03-22 |
EP4395116A1 (en) | 2024-07-03 |
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