WO2022267437A1 - 谐波检测方法、装置、变频器及存储介质 - Google Patents

谐波检测方法、装置、变频器及存储介质 Download PDF

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Publication number
WO2022267437A1
WO2022267437A1 PCT/CN2022/070149 CN2022070149W WO2022267437A1 WO 2022267437 A1 WO2022267437 A1 WO 2022267437A1 CN 2022070149 W CN2022070149 W CN 2022070149W WO 2022267437 A1 WO2022267437 A1 WO 2022267437A1
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Prior art keywords
component
harmonic
harmonic component
phase
detection
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PCT/CN2022/070149
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English (en)
French (fr)
Inventor
陈俊桦
洪伟鸿
王豪浩
周超
彭国彬
钟明胜
Original Assignee
合肥美的暖通设备有限公司
广东美的暖通设备有限公司
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Application filed by 合肥美的暖通设备有限公司, 广东美的暖通设备有限公司 filed Critical 合肥美的暖通设备有限公司
Priority to EP22826948.6A priority Critical patent/EP4310518A1/en
Publication of WO2022267437A1 publication Critical patent/WO2022267437A1/zh
Priority to US18/387,804 priority patent/US20240069080A1/en

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Classifications

    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/40Testing power supplies
    • G01R31/42AC power supplies
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R23/00Arrangements for measuring frequencies; Arrangements for analysing frequency spectra
    • G01R23/16Spectrum analysis; Fourier analysis
    • G01R23/165Spectrum analysis; Fourier analysis using filters
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R23/00Arrangements for measuring frequencies; Arrangements for analysing frequency spectra
    • G01R23/16Spectrum analysis; Fourier analysis
    • G01R23/165Spectrum analysis; Fourier analysis using filters
    • G01R23/167Spectrum analysis; Fourier analysis using filters with digital filters
    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02MAPPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00Details of apparatus for conversion
    • H02M1/12Arrangements for reducing harmonics from ac input or output
    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02MAPPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00Details of apparatus for conversion
    • H02M1/14Arrangements for reducing ripples from dc input or output
    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02MAPPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M5/00Conversion of ac power input into ac power output, e.g. for change of voltage, for change of frequency, for change of number of phases
    • H02M5/40Conversion of ac power input into ac power output, e.g. for change of voltage, for change of frequency, for change of number of phases with intermediate conversion into dc
    • H02M5/42Conversion of ac power input into ac power output, e.g. for change of voltage, for change of frequency, for change of number of phases with intermediate conversion into dc by static converters
    • H02M5/44Conversion of ac power input into ac power output, e.g. for change of voltage, for change of frequency, for change of number of phases with intermediate conversion into dc by static converters using discharge tubes or semiconductor devices to convert the intermediate dc into ac
    • H02M5/453Conversion of ac power input into ac power output, e.g. for change of voltage, for change of frequency, for change of number of phases with intermediate conversion into dc by static converters using discharge tubes or semiconductor devices to convert the intermediate dc into ac using devices of a triode or transistor type requiring continuous application of a control signal
    • H02M5/458Conversion of ac power input into ac power output, e.g. for change of voltage, for change of frequency, for change of number of phases with intermediate conversion into dc by static converters using discharge tubes or semiconductor devices to convert the intermediate dc into ac using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only
    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02MAPPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00Details of apparatus for conversion
    • H02M1/0003Details of control, feedback or regulation circuits
    • H02M1/0009Devices or circuits for detecting current in a converter

Definitions

  • the application belongs to the technical field of frequency converter (Variable-frequency Drive, VFD), and in particular relates to a harmonic detection method, device, frequency converter and storage medium.
  • VFD Very-frequency Drive
  • a typical structure of a frequency converter applied to a three-phase AC motor is an AC-DC-AC frequency conversion system composed of a rectifier, a DC bus capacitor and an inverter.
  • the DC bus capacitor plays the role of storing electric energy to provide voltage and filter harmonics in this system.
  • the voltage of the DC bus capacitor can reflect the operating conditions of the power grid, capacitors and loads, so it can be used as an important indicator for evaluating the operating status of the system.
  • the sampling signal of the DC bus voltage is usually mathematically transformed by the Fourier transform method.
  • the processing process of the Fourier transform method needs to rely on a large number of sampling signals and The calculation process is cumbersome, resulting in a high load on the processor, and it is difficult to configure a suitable processor.
  • One of the purposes of the embodiments of the present application is to provide a harmonic detection method, device, frequency converter, and storage medium to solve the Fourier transform method used in the prior art for harmonic detection of the DC bus voltage.
  • the process needs to rely on a large number of sampling signals and the calculation process is cumbersome, resulting in excessive load on the processor, and it is difficult to configure a suitable processor.
  • the first aspect of the embodiments of the present application provides a harmonic detection method, including:
  • the voltage amplitude of the harmonic component is obtained and output.
  • a second aspect of the embodiments of the present application provides a harmonic detection device, including:
  • the ripple component acquisition module is used to acquire the ripple component of the DC bus voltage
  • a harmonic component acquisition module configured to acquire a harmonic component of the DC bus voltage according to the ripple component
  • an orthogonal component acquisition module configured to acquire an orthogonal component of the harmonic component according to the harmonic component
  • a characteristic parameter acquisition module configured to acquire a characteristic parameter of the harmonic component according to the quadrature component, where the characteristic parameter includes a phase
  • a voltage amplitude acquisition module configured to acquire and output the voltage amplitude of the harmonic component according to the quadrature component and the phase of the harmonic component.
  • the third aspect of the embodiments of the present application provides a frequency converter, including a rectifier, an inverter, a memory, a processor, and a computer program stored in the memory and operable on the processor, and the rectifier is used for
  • the inverter is connected to the DC bus, the inverter is used to connect to the DC bus and the motor respectively, and the processor implements the steps of the harmonic detection method described in the first aspect of the embodiment of the present application when executing the computer program.
  • the fourth aspect of the embodiment of the present application provides a computer-readable storage medium, the computer-readable storage medium stores a computer program, and when the computer program is executed by a processor, the implementation of the first aspect of the embodiment of the present application is achieved. Steps of the harmonic detection method.
  • the harmonic detection method obtained by the first aspect of the embodiment of the present application obtains the ripple component of the DC bus voltage; according to the ripple component, obtains the harmonic component of the DC bus voltage; according to the harmonic component, obtains the positive value of the harmonic component AC component; according to the quadrature component, the characteristic parameters of the harmonic component are obtained, and the characteristic parameters include the phase; according to the phase of the quadrature component and the harmonic component, the voltage amplitude of the harmonic component is obtained and output, which can be based on the sampled DC bus voltage , effectively detect the voltage amplitude of the harmonic component in the DC bus voltage, the sampling amount is small and the calculation process is simple, so that the processor load is low, and it is easy to configure a suitable processor.
  • Fig. 1 is a schematic flow chart of the harmonic detection method provided by the embodiment of the present application.
  • Fig. 2 is a schematic diagram of the frequency response curve of the notch filter provided by the embodiment of the present application.
  • Fig. 3 is a first structural schematic diagram of a harmonic detection device provided by an embodiment of the present application.
  • Fig. 4 is a second structural schematic diagram of the harmonic detection device provided by the embodiment of the present application.
  • Fig. 5 is a schematic diagram of the logic structure of the second-order generalized integrator provided by the embodiment of the present application.
  • FIG. 6 is a schematic diagram of a logical structure of a phase-locked loop provided by an embodiment of the present application.
  • Fig. 7 is a schematic diagram of the logic structure of the amplitude feedback regulator provided by the embodiment of the present application.
  • Fig. 8 is a schematic structural diagram of a frequency converter provided by an embodiment of the present application.
  • the term “if” may be construed, depending on the context, as “when” or “once” or “in response to determining” or “in response to detecting “.
  • the phrase “if determined” or “if [the described condition or event] is detected” may be construed, depending on the context, to mean “once determined” or “in response to the determination” or “once detected [the described condition or event] ]” or “in response to detection of [described condition or event]”.
  • references to "one embodiment” or “some embodiments” or the like in the specification of the present application means that a particular feature, structure, or characteristic described in connection with the embodiment is included in one or more embodiments of the present application.
  • appearances of the phrases “in one embodiment,” “in some embodiments,” “in other embodiments,” “in other embodiments,” etc. in various places in this specification are not necessarily All refer to the same embodiment, but mean “one or more but not all embodiments” unless specifically stated otherwise.
  • the terms “including”, “comprising”, “having” and variations thereof mean “including but not limited to”, unless specifically stated otherwise.
  • the embodiment of the present application provides a harmonic detection method, which can be executed by the processor of the frequency converter when running the corresponding computer program, and is used to detect the voltage amplitude and phase of the harmonic component in the DC bus voltage connected to the frequency converter.
  • the sampling amount of the DC bus voltage is small and the calculation process is simple, which can effectively reduce the load of the processor, thereby reducing the configuration difficulty of the processor.
  • the harmonic detection method provided by the embodiment of the present application includes the following steps S101 to S105:
  • Step S101 acquiring the ripple component of the DC bus voltage.
  • the DC bus voltage in the DC bus can be sampled through the voltage sampling module.
  • the sampling cycle can be set as real-time sampling or sampling once every preset time interval according to actual needs.
  • the preset time is two adjacent sampling cycles time interval between.
  • the voltage sampling module may be an analog-to-digital converter (Analog to Digital Converter, ADC).
  • step S101 includes:
  • the DC bus voltage is sampled according to the sampling period through the voltage sampling module.
  • the frequency converter can automatically sample the DC bus voltage according to the sampling period during the working process, or the user can input sampling instructions through the human-computer interaction device of the frequency converter according to actual needs, or through the user terminal connected to the frequency converter through communication Send a sampling command to the frequency converter to control the frequency converter to start sampling the DC bus voltage.
  • the human-computer interaction device of the frequency converter may include at least one of physical buttons, touch sensors, gesture recognition sensors and voice recognition units, so that users can Enter commands.
  • Physical keys and touch sensors can be set anywhere on the inverter, such as the control panel.
  • the touch mode of the physical key may specifically be pressing or toggling.
  • the touch mode of the touch sensor may specifically be pressing or touching.
  • the gesture recognition sensor can be arranged at any position outside the casing of the frequency converter.
  • the gestures used to control the frequency converter can be customized by the user according to actual needs or the factory default settings can be used.
  • the speech recognition unit may include a microphone and a speech recognition chip, or may only include a microphone and the speech recognition function may be realized by the processor of the frequency converter.
  • the voice used to control the frequency converter can be customized by the user according to actual needs or the factory default settings can be used.
  • the user terminal can be a mobile phone, a smart bracelet, a tablet computer, a notebook computer, a netbook, a personal digital assistant (Personal Digital Assistant, PDA), a computer, a server, etc., which have wireless or wired communication functions and can communicate with the inverter Connected computing devices to enable remote monitoring of the harmonic components of the grid.
  • the embodiment of the present application does not impose any limitation on the specific type of the user terminal.
  • the user can control the user terminal to send instructions to the inverter through any human-computer interaction mode supported by the user terminal.
  • the human-computer interaction mode supported by the user terminal may be the same as that of the frequency converter, and will not be repeated here.
  • the frequency converter is applied to air-conditioning equipment
  • the user terminal may specifically be a computing device applied to an air-conditioning centralized control system.
  • step S101 includes:
  • the difference between the DC bus voltage and the DC component is obtained to obtain the ripple component of the DC bus voltage.
  • low-pass filtering can be performed on the DC bus voltage to remove the high-frequency components, so as to obtain the DC components containing low-frequency components.
  • the DC bus voltage can be filtered through a low-pass filter, and the low-pass filter can select a filter device with a corresponding cut-off frequency according to actual needs, for example, a first-order low-pass filter.
  • the cut-off frequency of the low-pass filter needs to be low enough to ensure that high-frequency components can be accurately filtered out to obtain a DC component.
  • the expression of the transfer function of the low-pass filter is as follows:
  • H 1 ⁇ c1 /(s 1 + ⁇ c1 )
  • H 1 represents the transfer function of the low-pass filter
  • ⁇ c1 represents the cut-off frequency of the low-pass filter
  • s 1 represents the s term of the low-pass filter
  • the part of the DC bus voltage that removes the DC component is the ripple component, and the ripple component can be obtained by calculating the difference between the DC bus voltage and the DC component.
  • the difference between the DC bus voltage and the DC component may be calculated by a first subtractor, which may be a differential amplifier.
  • Step S102 according to the ripple component, obtain the harmonic component of the DC bus voltage.
  • the ripple component can be further filtered to obtain the harmonic component.
  • the ripple component can be filtered by a notch filter to obtain a desired harmonic component of any frequency, for example, a 2-fold harmonic component and a 6-fold harmonic component.
  • step S102 includes:
  • the ripple component is filtered by a notch filter to obtain the first harmonic component of the DC bus voltage
  • the difference between the ripple component and the first harmonic component is obtained to obtain the second harmonic component of the DC bus voltage.
  • only a harmonic component of one frequency, that is, the first harmonic component may be obtained; or two kinds of frequency harmonic components, that is, the first harmonic component and the second harmonic component may be obtained.
  • the first harmonic component and the second harmonic component can be one of the 2-octave harmonic component and the 6-octave harmonic component respectively, that is, the 2-octave harmonic component can be obtained first through the notch filter, and then calculated
  • the difference between the ripple component and the 2-fold harmonic component can be used to obtain the 6-fold harmonic component; the 6-fold harmonic component can also be obtained first through the notch filter, and then the ripple component and the 6-fold harmonic component can be calculated
  • the difference between the wave components is obtained to obtain the 6th harmonic component.
  • the difference between the ripple component and the first harmonic component may be calculated by a second subtractor, which may be a differential amplifier.
  • the expression of the transfer function of the notch filter is as follows:
  • H 2 (s 2 2 + ⁇ c2 2 )/( s 2 2 +2 s ⁇ c2 /Q+ ⁇ c2 2 )
  • H 2 represents the transfer function of the notch filter
  • ⁇ c2 represents the cut-off frequency of the notch filter
  • s 2 represents the s term of the notch filter
  • Q represents the quality factor of the notch filter
  • the frequency response curve of the notch filter is exemplarily shown; wherein, the cut-off frequency ⁇ c2 of the notch filter is the frequency corresponding to the lowest point of the frequency response curve, and the notch filter
  • the quality factor Q of the frequency response curve determines the steepness of the concave part, and the purpose of blocking a specific frequency is achieved by rapidly reducing the gain near the cutoff frequency.
  • the harmonic component includes a first harmonic component and a second harmonic component
  • step S102 includes:
  • the harmonic component of the k+1th detection period is filtered by the notch filter according to the first gain of the k+1th detection period to obtain the harmonic component of the DC bus voltage of the k+1th detection period.
  • the gain of the notch filter can be set to a fixed value according to actual needs.
  • the kth detection period can be the previous detection period, the k+1th detection period can be the current detection period, and the gain of the notch filter in the current detection period can be calculated according to the frequency of the harmonic component obtained in the previous detection period ;
  • the kth detection cycle can also be the current detection cycle, and the k+1th detection cycle can also be the next detection cycle, and can be calculated according to the frequency of the harmonic component obtained in the current detection cycle Gain of the notch filter.
  • the kth detection period covers the kth sampling period, that is, the DC bus voltage sampling operation of the kth sampling period is completed in the kth detection period.
  • Step S103 According to the harmonic component, an orthogonal component of the harmonic component is obtained.
  • the quadrature component includes a direct-axis component and a quadrature-axis component, and the quadrature component can be obtained by a second-order generalized integrator.
  • the harmonic components include the first harmonic component and the second harmonic component
  • two second-order generalized integrators are required to obtain the quadrature component of the first harmonic component and the quadrature component of the second harmonic component respectively .
  • step S103 includes:
  • the quadrature component of the harmonic component is obtained according to the harmonic component through the second-order generalized integrator.
  • the expression of the transfer function of the direct-axis component output by the second-order generalized integrator is as follows:
  • H ⁇ represents the transfer function of the direct axis component
  • the phase of the direct axis component is the same as that of the harmonic component
  • represents the angular velocity of the harmonic component
  • s ⁇ represents the s term of the second-order generalized integrator corresponding to the direct axis component
  • k represents the gain of the second-order generalized integrator
  • H ⁇ represents the transfer function of the quadrature axis component
  • the phase of the quadrature axis component is 90 degrees behind the phase of the harmonic component
  • s ⁇ represents the s term of the second-order generalized integrator corresponding to the quadrature axis component.
  • the angular velocity of the harmonic component is the product of the frequency of the harmonic component and the circumference ratio. Since the frequency of the power grid may change, the frequency of the harmonic component of the DC bus voltage will change. Therefore, the frequency of the harmonic component in the current detection cycle is determined by the frequency of the harmonic component obtained in the previous detection cycle. The frequency of the harmonic component in the period is determined by the frequency of the harmonic component obtained in the current detection period.
  • step S103 includes:
  • the quadrature component of the harmonic component of the k+1th detection period is obtained through the second-order generalized integrator according to the second gain of the k+1th detection period and the harmonic component of the k+1th detection period.
  • the gain of the second-order generalized integrator can be set to a fixed value according to actual needs.
  • the kth detection period can be the previous detection period
  • the k+1th detection period can be the current detection period
  • the frequency of the second-order generalized integrator in the current detection period can be calculated according to the frequency of the harmonic component obtained in the previous detection period Gain; similarly, the kth detection cycle can also be the current detection cycle, and the k+1th detection cycle can also be the next detection cycle, and the next detection cycle can be calculated according to the frequency of the harmonic component obtained in the current detection cycle Gain of a second-order generalized integrator in the middle.
  • the harmonic component includes a first harmonic component and a second harmonic component
  • step S103 includes:
  • the quadrature component of the second harmonic component is obtained according to the second harmonic component through the second second-order generalized integrator.
  • the second gain includes a third gain and a fourth gain
  • step S103 includes:
  • Step S104 according to the quadrature component, obtain the characteristic parameter of the harmonic component, and the characteristic parameter includes the phase.
  • the characteristic parameter may also include frequency, and the frequency and phase of the harmonic component may be obtained through a phase-locked loop.
  • the harmonic components include the first harmonic component and the second harmonic component, it is necessary to obtain the frequency and phase of the first harmonic component and the frequency and phase of the second harmonic component respectively through two phase-locked loops.
  • the frequency of the harmonic component obtained through the phase-locked loop in the current detection cycle can be used to input the notch filter and the second-order generalized integrator respectively in the next detection cycle to calculate the gains of the two, so as to filter the notch
  • the gains of the controller and the second-order generalized integrator are feedback-controlled, so as to realize the tracking of the grid frequency.
  • the phase can be output to the user terminal, so that the user terminal can know the phase of the grid harmonic, and then generate a curve of the voltage amplitude of the harmonic with the phase change according to the phase.
  • step S104 includes:
  • the frequency and phase of the harmonic component are obtained through a phase-locked loop.
  • the phase-locked loop adjusts the frequency or angular velocity of the harmonic component by detecting the q-axis component of the quadrature component.
  • the q-axis component is the embodiment of the phase error on the voltage. Therefore, the phase error is adjusted to 0 through a proportional integrator (PI) in the phase-locked loop.
  • the output of the proportional integrator is the frequency of the harmonic component.
  • a limiter is also used to limit the variation range of the frequency of the harmonic component output by the proportional integrator.
  • the expression for the q-axis component of the quadrature component is as follows:
  • u q represents the q-axis component
  • u ⁇ represents the direct-axis component
  • u ⁇ represents the quadrature-axis component
  • represents the phase (ie angle) of the q-axis component.
  • the phase of the q-axis component is obtained by converting the frequency of the harmonic component output by the phase-locked loop into an angular velocity and integrating it.
  • step S104 includes:
  • the frequency and phase of the harmonic component of the k+1th detection period are obtained through the phase-locked loop according to the phase of the harmonic component of the kth detection period and the quadrature component of the k+1th detection period, k is any positive integer.
  • the kth detection cycle can be the previous detection cycle
  • the k+1th detection cycle can be the current detection cycle, which can be based on the phase of the harmonic component obtained in the previous detection cycle and the quadrature component of the current detection cycle , to calculate the frequency and phase of the harmonic component in the current detection cycle
  • the kth detection cycle can also be the current detection cycle
  • the k+1th detection cycle can also be the next detection cycle, which can be obtained according to the current detection cycle
  • the phase of the harmonic component and the quadrature component of the next detection cycle calculate the frequency and phase of the harmonic component in the next detection cycle.
  • the harmonic components include a first harmonic component and a second harmonic component
  • step S104 includes:
  • the frequency and phase of the second harmonic component are acquired through the second phase-locked loop according to the quadrature component of the second harmonic component.
  • the harmonic components include a first harmonic component and a second harmonic component
  • step S104 includes:
  • the first harmonic component of the k+1th detection period is obtained.
  • the frequency and phase of , k is any positive integer;
  • the second harmonic component of the k+1th detection period is obtained frequency and phase.
  • Step S105 according to the phases of the quadrature component and the harmonic component, obtain and output the voltage amplitude of the harmonic component.
  • the voltage amplitude of the harmonic component can be obtained through the amplitude feedback regulator, and the amplitude feedback regulator can be realized through the amplitude lock loop (MLL).
  • the harmonic components include the first harmonic component and the second harmonic component
  • two amplitude feedback regulators are required to obtain the voltage amplitude of the first harmonic component and the voltage amplitude of the second harmonic component respectively .
  • the voltage amplitude can be output to the user terminal, so that the user terminal can evaluate the three-phase unbalance degree of the power grid according to the voltage amplitude.
  • step S105 includes:
  • the voltage amplitude of the harmonic component is obtained and output through the amplitude feedback regulator.
  • the voltage amplitude of the harmonic component can be obtained by dividing the phase of the phase-locked loop output by the sine or cosine of the corresponding angle, but considering that the sine signal and cosine signal have zero-crossing points, the The calculation error is too large. Therefore, an amplitude feedback regulator is used to eliminate the division link in the calculation to improve the calculation accuracy of the voltage amplitude.
  • the feedback regulation of the voltage amplitude in the amplitude feedback regulator is based on the error voltage, and the voltage amplitude is adjusted through a proportional integrator.
  • the calculation formula of the error voltage is as follows:
  • u err represents the error voltage
  • abs represents the sign of the absolute value
  • u amp represents the voltage amplitude
  • u ⁇ represents the direct axis component
  • u ⁇ represents the quadrature axis component
  • represents the phase of the q axis component.
  • step S105 includes:
  • the voltage amplitude of the harmonic component of the kth detection period is output, and k is any positive integer.
  • the kth detection cycle can be the previous detection cycle
  • the k+1th detection cycle can be the current detection cycle, and can be based on the voltage amplitude of the harmonic component obtained in the previous detection cycle and the positive value of the current detection cycle.
  • AC component and phase calculate and output the voltage amplitude of the harmonic component in the current detection cycle; similarly, the kth detection cycle can also be the current detection cycle, and the k+1th detection cycle can also be the next detection cycle, which can be based on The voltage amplitude of the harmonic component obtained in the current detection cycle, the quadrature component and the phase of the next detection cycle, and the voltage amplitude of the harmonic component in the next detection cycle are calculated and output.
  • the harmonic components include a first harmonic component and a second harmonic component
  • step S105 includes:
  • the voltage amplitude of the second harmonic component is acquired and output through the second amplitude feedback regulator.
  • the harmonic components include a first harmonic component and a second harmonic component
  • step S105 includes:
  • the quadrature component of the first harmonic component of the k+1th detection period and the first The phase of the harmonic component is to obtain and output the voltage amplitude of the first harmonic component of the k+1th detection cycle, k is any positive integer;
  • the quadrature component of the second harmonic component of the k+1th detection period and the second The phase of the harmonic component is used to obtain and output the voltage amplitude of the second harmonic component in the k+1th detection cycle.
  • the harmonic component includes 2 times frequency harmonic component and 6 times frequency harmonic component, 2 times frequency (that is, 2 times the grid frequency) corresponds to the negative sequence component on the grid side, and 6 times frequency (that is, 6 times the grid frequency) Frequency) corresponds to the positive sequence component of the power grid, the ratio of the voltage amplitude of the 2-fold frequency harmonic component to the voltage amplitude of the 6-fold frequency harmonic component can reflect the proportion of the negative sequence component to the positive sequence component in the power grid, that is It can reflect the three-phase voltage imbalance of the power grid.
  • the user terminal After the user terminal obtains the 2-fold harmonic component and the 6-fold harmonic component, it calculates the voltage amplitude of the 2-fold harmonic component and the 6-fold harmonic
  • the ratio of the voltage amplitude of the component can evaluate the three-phase voltage unbalance of the power grid.
  • the formula for calculating the ratio of the voltage amplitude of the 2-fold harmonic component to the voltage amplitude of the 6-fold harmonic component is as follows:
  • K f (U 2nd /U 6th )*100%
  • K f represents the ratio of the voltage amplitude of the 2-octave harmonic component to the voltage amplitude of the 6-octave harmonic component
  • U 2nd represents the voltage amplitude of the 2-octave harmonic component
  • U 6th represents the 6-octave harmonic The voltage amplitude of the wave component.
  • the harmonic detection method provided by the embodiment of the present application can effectively detect the voltage amplitude of the harmonic component in the DC bus voltage according to the sampled DC bus voltage, the sampling amount is small and the calculation process is simple, so that the processor load is low and the configuration is easy.
  • processor by outputting the voltage amplitude of the 2-fold harmonic component and the voltage amplitude of the 6-fold harmonic component in the DC bus voltage to the user terminal, the user terminal can The proportion of the voltage amplitude of the component can evaluate the three-phase voltage unbalance of the power grid, so as to realize the effective monitoring of the three-phase voltage unbalance of the power grid by the user.
  • the embodiment of the present application also provides a harmonic detection device, which is applied to a frequency converter and used to execute the method steps in the above method embodiments.
  • the appliance can be a virtual appliance in the frequency converter, run by the frequency converter's processor, or it can be the frequency converter itself.
  • the harmonic detection device 100 provided in the embodiment of the present application includes:
  • the ripple component acquisition module 10 is used to acquire the ripple component of the DC bus voltage
  • the harmonic component acquisition module 20 is used to acquire the harmonic component of the DC bus voltage according to the ripple component;
  • Orthogonal component acquisition module 30 for obtaining the orthogonal component of the harmonic component according to the harmonic component
  • the characteristic parameter obtaining module 40 is used for obtaining the characteristic parameter of the harmonic component according to the quadrature component, and the characteristic parameter includes a phase;
  • the voltage amplitude acquisition module 50 is configured to acquire and output the voltage amplitude of the harmonic component according to the phases of the quadrature component and the harmonic component.
  • the harmonic detection device 100 also includes:
  • the voltage sampling module is used for sampling the DC bus voltage according to the sampling period.
  • the ripple component acquisition module 10 includes:
  • a low-pass filter 11 configured to perform low-pass filtering on the DC bus voltage to obtain a DC component U DC of the DC bus voltage
  • the first subtractor 12 is used to obtain the difference between the DC bus voltage and the DC component to obtain the ripple component u ripple of the DC bus voltage.
  • the harmonic component acquisition module 20 includes:
  • a notch filter 21 configured to filter the ripple component to obtain the first harmonic component u 6th of the DC bus voltage
  • the second subtractor 22 is configured to obtain the difference between the ripple component and the first harmonic component to obtain the second harmonic component u 2rd of the DC bus voltage.
  • the orthogonal component acquisition module 30 includes:
  • the first second-order generalized integrator 31 is used to obtain the orthogonal component u ⁇ of the first harmonic component u 6th according to the first harmonic component u 6th ;
  • the second second-order generalized integrator 32 is configured to obtain an orthogonal component u ⁇ of the second harmonic component u 2rd according to the second harmonic component u 2rd .
  • the characteristic parameters also include frequency
  • the characteristic parameter acquisition module 40 includes:
  • the first phase-locked loop 41 is used to obtain the frequency f 6th and phase ⁇ 6th of the first harmonic component u 6th according to the quadrature component u ⁇ of the first harmonic component u 6th ;
  • the second phase-locked loop 42 is used to obtain the frequency f 2rd and the phase ⁇ 2rd of the second harmonic component u 2rd according to the quadrature component u ⁇ of the second harmonic component u 2rd .
  • the voltage amplitude acquisition module 50 includes:
  • the first magnitude feedback regulator 51 obtains and outputs the voltage amplitude U 6th of the first harmonic component u 6th according to the frequency f 6th and phase ⁇ 6th of the first harmonic component u 6th ;
  • the second amplitude feedback regulator 52 obtains and outputs the voltage amplitude U 2rd of the second harmonic component u 2rd according to the frequency f 2rd and phase ⁇ 2rd of the second harmonic component u 2rd .
  • the characteristic parameters also include frequency
  • the notch filter 21 is used for:
  • the first gain of the k+1th detection period is obtained, k is an integer greater than or equal to 1;
  • the harmonic component of the k+1 detection cycle is filtered according to the first gain of the k+1 detection cycle to obtain the harmonic component of the DC bus voltage in the k+1 detection cycle.
  • FIG. 5 an exemplary logic structure of a second-order generalized integrator is shown, which includes two subtractors 501 , a gain unit 502 , two multipliers 503 , two integrators 504 and a constant gain unit 505 .
  • the logic structure of the first generalized integrator and the second generalized integrator is the same as that of the generalized integrator shown in Fig. 5, the difference is that the input and output signals of the first generalized integrator are the same as the first harmonic Components correspond, and the input and output signals of the first generalized integrator correspond to the second harmonic components.
  • FIG. 6 it exemplarily shows the logic structure of the phase-locked loop, which includes a sine generator (-sin) 601, an adder 602, a subtractor 603, a proportional integrator (PI) 604, and a limiter 605 , low pass filter (LPF) 606, constant gain unit (2 ⁇ ) 607, integrator (1/S) 608 and cosine generator (cos) 609.
  • the logic structure of the first phase-locked loop and the second phase-locked loop is the same as the logic structure of the phase-locked loop shown in Figure 6, the difference is that the input and output signals of the first phase-locked loop and the first harmonic The component corresponds, and the input and output signals of the second phase-locked loop correspond to the second harmonic component.
  • FIG. 7 it exemplarily shows the logic structure of the amplitude feedback regulator, which includes a cosine generator (cos) 701, two multipliers 702, four absolute value units (abs) 703, two Subtractor 704 , Adder 705 , Proportional Integrator (PI) 706 and Sine Generator (sin) 707 .
  • cos cosine generator
  • ab absolute value units
  • ab absolute value units
  • Subtractor 704 two Subtractor 704
  • Adder 705 Adder 705
  • PI Proportional Integrator
  • sin Sine Generator
  • the logic structure of the first amplitude feedback regulator and the second amplitude feedback regulator is the same as the logic structure of the amplitude feedback regulator shown in Fig. 7, the difference is that the input of the first amplitude feedback regulator The sum output signal corresponds to the first harmonic component, and the input and output signals of the second amplitude feedback regulator correspond to the second harmonic component.
  • each component in the above device may be a software program unit, or may be realized by different logic circuits integrated in a processor or independent physical components connected to the processor, or may be realized by multiple distributed processors.
  • the embodiment of the present application also provides a frequency converter 200, including: a rectifier 201, an inverter 202, at least one processor 203 (only one processor is shown in FIG. 8 ), a memory 204 and stored in A computer program 205 in the memory 204 and capable of running on at least one processor 203, the rectifier 201 is used to connect to the DC bus 300, the inverter 202 is used to connect to the DC bus 300 and the motor 400 respectively, and the processor 202 executes the computer program At 205, the steps in the above embodiments of the harmonic detection method are implemented.
  • frequency converters can include, but are not limited to, finishers, inverters, processors, and memory, and can include analog-to-digital converters, low-pass filters, subtractors, notch filters, second-order generalized device, phase-locked loop, amplitude-locked loop, subtractor, etc.
  • Fig. 8 is only an example of a frequency converter, and does not constitute a limitation to the frequency converter, and may include more or less components than those shown in the figure, or combine some components, or different components, such as , may also include input and output devices, network access devices, etc.
  • the input and output devices may include the aforementioned human-computer interaction devices, and may also include a display screen for displaying the working parameters of the frequency converter.
  • the network access device may include a communication module, which is used for the frequency converter to communicate with the aforementioned user terminal.
  • the inverter is used to convert DC power into AC power, which can be composed of three-phase inverter bridge arm, logic control circuit and filter circuit.
  • the processor can be a central processing unit (Central Processing Unit, CPU), and the processor can also be other general-purpose processors, digital signal processors (Digital Signal Processor, DSP), application-specific integrated circuits (Application Specific Integrated Circuit, ASIC), off-the-shelf programmable gate array (Field-Programmable Gate Array, FPGA) or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, etc.
  • a general-purpose processor may be a microprocessor, or the processor may be any conventional processor, or the like.
  • the memory may be an internal storage unit of the frequency converter in some embodiments, such as a hard disk or memory of the frequency converter.
  • the memory may also be an external storage device of the frequency converter, for example, a plug-in hard disk equipped on the frequency converter, a smart memory card (Smart Media Card, SMC), a secure digital (Secure Digital, SD) card, Flash Card (Flash Card), etc.
  • the memory may also include both an internal storage unit of the frequency converter and an external storage device.
  • the memory is used to store operating systems, application programs, boot loaders (Boot Loader), data, and other programs, such as program codes of computer programs.
  • the memory can also be used to temporarily store data that has been output or will be output.
  • the display screen can be a thin film transistor liquid crystal display (Thin Film Transistor Liquid Crystal Display, TFT-LCD), a liquid crystal display (Liquid Crystal Display, LCD), organic electroluminesence display (Organic Electroluminesence Display, OLED), quantum dot light emitting diode (Quantum Dot Light Emitting Diodes, QLED) display, seven-segment or eight-segment digital tube, etc.
  • TFT-LCD Thi Film Transistor Liquid Crystal Display
  • LCD liquid crystal display
  • organic electroluminesence display Organic Electroluminesence Display, OLED
  • quantum dot light emitting diode Quantum Dot Light Emitting Diodes, QLED
  • the communication module can be set as any device capable of direct or indirect long-distance wired or wireless communication with the client according to actual needs.
  • the communication module can provide wireless local area networks (Wireless Local Area Networks, WLAN) (such as Wi-Fi network), Bluetooth, Zigbee, mobile communication network, Global Navigation Satellite System (Global Navigation Satellite System, GNSS), FM (Frequency Modulation, FM), near field communication technology (Near Field Communication, NFC), infrared technology (Infrared, IR) and other communication solutions.
  • the communication module may include an antenna, and the antenna may have only one array element, or may be an antenna array including multiple array elements.
  • the communication module can receive electromagnetic waves through the antenna, frequency-modulate and filter the electromagnetic wave signals, and send the processed signals to the processor.
  • the communication module can also receive the signal to be sent from the processor, frequency-modulate and amplify it, and convert it into electromagnetic wave and radiate it through the antenna.
  • the low-pass filter can select any type of filter whose cutoff frequency meets the requirements according to actual needs, for example, a Butterworth filter (Butterworth filter) or a Chebyshev filter.
  • the analog-to-digital converter can select any type of analog-to-digital converter whose sampling accuracy meets the requirements according to actual needs, for example, parallel comparison type, successive approximation type or double integral type analog-to-digital converter.
  • the sampling precision of the analog-to-digital converter is determined by its resolution, and the resolution can be selected according to actual needs, for example, eight bits, twelve bits or twenty-four bits.
  • the user can switch the resolution of the analog-to-digital converter through the inverter or the human-computer interaction device of the user terminal according to actual needs, so as to adapt to different application scenarios.
  • the embodiment of the present application also provides a computer-readable storage medium, in which a computer program is stored, and when the computer program is executed by a processor, the steps in the foregoing method embodiments can be realized.
  • An embodiment of the present application provides a computer program product.
  • the frequency converter can implement the steps in the foregoing method embodiments.
  • the integrated modules are realized in the form of software function modules and sold or used as independent products, they can be stored in a computer-readable storage medium. Based on this understanding, all or part of the processes in the methods of the above-mentioned embodiments in the present application can be completed by instructing related hardware through computer programs.
  • the computer programs can be stored in a computer-readable storage medium, and the computer programs can be processed When executed by the controller, the steps in the above-mentioned method embodiments can be realized.
  • the computer program includes computer program code, and the computer program code may be in the form of source code, object code, executable file or some intermediate form.
  • the computer-readable medium may at least include: any entity or device capable of carrying computer program codes to a frequency converter, a recording medium, a computer memory, a read-only memory (ROM, Read-Only Memory), Random Access Memory (RAM, Random Access Memory), electrical carrier signal, telecommunication signal, and software distribution medium.
  • ROM Read-only memory
  • RAM Random Access Memory
  • electrical carrier signal telecommunication signal
  • software distribution medium Such as U disk, mobile hard disk, magnetic disk or CD, etc.
  • modules and algorithm steps of the examples described in conjunction with the embodiments disclosed herein can be implemented by electronic hardware, or a combination of computer software and electronic hardware. Whether these functions are executed by hardware or software depends on the specific application and design constraints of the technical solution. Those skilled in the art may use different methods to implement the described functions for each specific application, but such implementation should not be regarded as exceeding the scope of the present application.
  • the disclosed devices and methods may be implemented in other ways.
  • the device embodiments described above are only illustrative.
  • the division of the modules is only a logical function division. In actual implementation, there may be other division methods.
  • multiple modules or components can be combined or May be integrated into another system, or some features may be ignored, or not implemented.
  • the mutual coupling or direct coupling or communication connection shown or discussed may be through some interfaces, and the indirect coupling or communication connection of devices or modules may be in electrical, mechanical or other forms.
  • the modules described as separate components may or may not be physically separated, and the components displayed as modules may or may not be physical modules, that is, they may be located in one place, or may be distributed to multiple network modules. Part or all of the modules can be selected according to actual needs to achieve the purpose of the solution of this embodiment.

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Abstract

一种谐波检测方法、装置(100)、变频器(200)及存储介质,谐波检测方法包括获取直流母线电压的纹波分量(S101);根据纹波分量,获取直流母线电压的谐波分量(S102);根据谐波分量,获取谐波分量的正交分量(S103);根据正交分量,获取谐波分量的特性参数,特性参数包括相位(S104);根据正交分量和谐波分量的相位,获取谐波分量的电压幅值并输出(S105)。谐波检测方法能够根据采样的直流母线电压,有效检测直流母线电压中谐波分量的电压幅值,采样量少且计算过程简单,使得处理器(203)负荷低,容易配置合适的处理器(203)。

Description

谐波检测方法、装置、变频器及存储介质
本申请要求于2021年06月21日在中国国家专利局提交的、申请号为202110688450.4、发明名称为“谐波检测方法、装置、变频器及存储介质”的中国专利申请的优先权,其全部内容通过引用结合在本申请中。
技术领域
本申请属于变频器(Variable-frequency Drive,VFD)技术领域,尤其涉及一种谐波检测方法、装置、变频器及存储介质。
背景技术
应用于三相交流电机的变频器的一种典型结构为由整流器、直流母线电容和逆变器组成的交直交变频***。直流母线电容在该***中起到了存储电能以提供电压和滤除谐波的功能。直流母线电容的电压能够反映出电网、电容器和负载的运行情况,因此能够作为***运行状态评估的重要指标。
现有技术中,针对直流母线电压的谐波检测方法,通常是通过傅里叶变换方法对直流母线电压的采样信号进行数学变换,傅里叶变换方法的处理过程需要依赖于大量的采样信号并且计算过程繁琐,导致处理器的负荷过高,难以配置合适的处理器。
技术问题
本申请实施例的目的之一在于:提供一种谐波检测方法、装置、变频器及存储介质,以解决现有技术中用于对直流母线电压进行谐波检测的傅里叶变换方法,处理过程需要依赖于大量的采样信号并且计算过程繁琐,导致处理器的负荷过高,难以配置合适的处理器的问题。
技术解决方案
为了解决上述技术问题,本申请实施例采用的技术方案是:
本申请实施例的第一方面提供一种谐波检测方法,包括:
获取直流母线电压的纹波分量;
根据所述纹波分量,获取所述直流母线电压的谐波分量;
根据所述谐波分量,获取所述谐波分量的正交分量;
根据所述正交分量,获取所述谐波分量的特性参数,所述特性参数包括相位;
根据所述正交分量和所述谐波分量的相位,获取所述谐波分量的电压幅值并输出。
本申请实施例的第二方面提供一种谐波检测装置,包括:
纹波分量获取模块,用于获取直流母线电压的纹波分量;
谐波分量获取模块,用于根据所述纹波分量,获取所述直流母线电压的谐波分量;
正交分量获取模块,用于根据所述谐波分量,获取所述谐波分量的正交分量;
特性参数获取模块,用于根据所述正交分量,获取所述谐波分量的特性参数,所述特性参数包括相位;
电压幅值获取模块,用于根据所述正交分量和所述谐波分量的相位,获取所述谐波分量的电压幅值并输出。
本申请实施例的第三方面提供一种变频器,包括整流器、逆变器、存储器、处理器以及存储在所述存储器中并可在所述处理器上运行的计算机程序,所述整流器用于与直流母线连接,所述逆变器用于分别与所述直流母线和电机连接,所述处理器执行所述计算机程序时实现本申请实施例的第一方面所述谐波检测方法的步骤。
本申请实施例的第四方面提供一种计算机可读存储介质,所述计算机可读存储介质存储有计算机程序,所述计算机程序被处理器执行时实现如本申请实施例的第一方面所述谐波检测方法的步骤。
有益效果
本申请实施例的第一方面提供的谐波检测方法,通过获取直流母线电压的纹波分量;根据纹波分量,获取直流母线电压的谐波分量;根据谐波分量,获取谐波分量的正交分量;根据正交分量,获取谐波分量的特性参数,特性参数包括相位;根据正交分量和谐波分量的相位,获取谐波分量的电压幅值并输出,能够根据采样的直流母线电压,有效检测直流母线电压中谐波分量的电压幅值,采样量少且计算过程简单,使得处理器负荷低,容易配置合适的处理器。
可以理解的是,上述第二方面至第四方面的有益效果可以参见上述第一方面中的相关描述,在此不再赘述。
附图说明
为了更清楚地说明本申请实施例中的技术方案,下面将对实施例或现有技术描述中所需要使用的附图作简单地介绍,显而易见地,下面描述中的附图仅仅是本申请的一些实施例,对于本领域普通技术人员来讲,在不付出创造性劳动的前提下,还可以根据这些附图获得其他的附图。
图1是本申请实施例提供的谐波检测方法的流程示意图;
图2是本申请实施例提供的陷波滤波器的频率响应曲线的示意图;
图3是本申请实施例提供的谐波检测装置的第一种结构示意图;
图4是本申请实施例提供的谐波检测装置的第二种结构示意图;
图5是本申请实施例提供的二阶广义积分器的逻辑结构示意图;
图6是本申请实施例提供的锁相环的逻辑结构示意图;
图7是本申请实施例提供的幅值反馈调节器的逻辑结构示意图;
图8是本申请实施例提供的变频器的结构示意图。
本发明的实施方式
以下描述中,为了说明而不是为了限定,提出了诸如特定***结构、技术之类的具体细节,以便透彻理解本申请实施例。然而,本领域的技术人员应当清楚,在没有这些具体细节的其它实施例中也可以实现本申请。在其它情况中,省略对众所周知的***、装置、电路以及方法的详细说明,以免不必要的细节妨碍本申请的描述。
应当理解,当在本申请说明书和所附权利要求书中使用时,术语“包括”指示所描述特征、整体、步骤、操作、元素和/或组件的存在,但并不排除一个或多个其它特征、整体、步骤、操作、元素、组件和/或其集合的存在或添加。
还应当理解,在本申请说明书和所附权利要求书中使用的术语“和/或”是指相关联列出的项中的一个或多个的任何组合以及所有可能组合,并且包括这些组合。
如在本申请说明书和所附权利要求书中所使用的那样,术语“如果”可以依据上下文被解释为“当...时”或“一旦”或“响应于确定”或“响应于检测到”。类似地,短语“如果确定”或“如果检测到[所描述条件或事件]”可以依据上下文被解释为意指“一旦确定”或“响应于确定”或“一旦检测到[所描述条件或事件]”或“响应于检测到[所描述条件或事件]”。
另外,在本申请说明书和所附权利要求书的描述中,术语“第一”、“第二”、“第三”等仅用于区分描述,而不能理解为指示或暗示相对重要性。
在本申请说明书中描述的参考“一个实施例”或“一些实施例”等意味着在本申请的一个或多个实施例中包括结合该实施例描述的特定特征、结构或特点。由此,在本说明书中的不同之处出现的语句“在一个实施例中”、“在一些实施例中”、“在其他一些实施例中”、“在另外一些实施例中”等不是必然都参考相同的实施例,而是意味着“一个或多个但不是所有的实施例”,除非是以其他方式另外特别强调。术语“包括”、“包含”、“具有”及它们的变形都意味着“包括但不限于”,除非是以其他方式另外特别强调。
本申请实施例提供一种谐波检测方法,可以由变频器的处理器在运行对应的计算机程序时执行,用于检测变频器接入的直流母线电压中谐波分量的电压幅值和相位,在检测过程中对直流母线电压的采样量少且计算过程简单,可以有效降低处理器的负荷,从而降低处理器的配置难度。
如图1所示,本申请实施例提供的谐波检测方法,包括如下步骤S101至S105:
步骤S101、获取直流母线电压的纹波分量。
在应用中,可以通过电压采样模块对直流母线中的直流母线电压进行采样,采样周期可以根据实际需要设置为实时采样或每间隔预设时间采样一次,预设时间即为相邻两个采样周期之间的时间间隔。电压采样模块可以是模数转换器(Analog to Digital Converter,ADC)。
在一个实施例中,步骤S101之前包括:
通过电压采样模块按照采样周期对直流母线电压进行采样。
在应用中,变频器可以在工作过程中按照采样周期自动采样直流母线电压,也可以由用户根据实际需要通过变频器的人机交互器件输入采样指令,或者,通过与变频器通信连接的用户终端向变频器发送采样指令,以控制变频器开始采样直流母线电压。
在应用中,变频器的人机交互器件可以包括实体按键、触控传感器、手势识别传感器和语音识别单元中的至少一种,使得用户可以通过对应的触控方式、手势操控方式或语音控制方式输入指令。实体按键和触控传感器可以设置于变频器的任意位置,例如,控制面板。对实体按键的触控方式具体可以是按压或拨动。对触控传感器的触控方式具体可以为按压或触摸等。手势识别传感器可以设置在变频器的壳体外部的任意位置。用于控制变频器的手势可以由用户根据实际需要自定义设置或者采用出厂时的默认设置。语音识别单元可以包括麦克风和语音识别芯片,也可以仅包括麦克风并由变频器的处理器来实现语音识别功能。用于控制变频器的语音可以由用户根据实际需要自定义设置或者采用出厂时的默认设置。
在应用中,用户终端可以是手机、智能手环、平板电脑、笔记本电脑、上网本、个人数字助理(Personal Digital Assistant,PDA)、计算机、服务器等具有无线或有线通信功能,能够与变频器进行通信连接的计算设备,以实现对电网的谐波分量远程监控。本申请实施例对用户终端的具体类型不作任何限制。用户可以通过用户终端所支持的任意人机交互方式控制用户终端向变频器发送指令。用户终端所支持的人机交互方式可以与变频器相同,此处不再赘述。当变频器应用于空调设备时,用户终端具体可以是应用于空调集控***的计算设备。
在一个实施例中,步骤S101包括:
通过低通滤波器对直流母线电压进行低通滤波,得到直流母线电压的直流分量;
获取直流母线电压与直流分量的差值,得到直流母线电压的纹波分量。
在应用中,可以对直流母线电压进行低通滤波,去除其中的高频分量,以获得包含低频分量的直流分量。可以通过低通滤波器对直流母线电压进行滤波,低通滤波器可以根据实际需要选择具有相应截止频率的滤波器件,例如,一阶低通滤波器。低通滤波器的截止频率需要足够低,以保证能够准确滤除高频分量,以获得直流分量。
在一个实施例中,低通滤波器的传递函数的表达式如下:
H 1c1/(s 1c1)
其中,H 1表示低通滤波器的传递函数,ω c1表示低通滤波器的截止频率,s 1表示低通滤波器的s项。
在应用中,直流母线电压中去除直流分量的部分即为纹波分量,通过计算直流母线电压与直流分量的差值,即可获得纹波分量。可以通过第一减法器来计算直流母线电压和直流分量的差值,第一减法器可以是差分放大器。
步骤S102、根据纹波分量,获取直流母线电压的谐波分量。
在应用中,可以进一步对纹波分量进行滤波,以获得其中的谐波分量。可以通过陷波滤波器对纹波分量进行滤波,以获得需要的任意频率谐波分量,例如,2倍频谐波分量和6倍频谐波分量。
在一个实施例中,步骤S102包括:
通过陷波滤波器对纹波分量进行滤波,得到直流母线电压的第一谐波分量;
获取纹波分量与第一谐波分量的差值,得到直流母线电压的第二谐波分量。
在应用中,可以仅获取一种频率的谐波分量,也即第一谐波分量;也可以获取两种频率的谐波分量,也即第一谐波分量和第二谐波分量。第一谐波分量和第二谐波分量可以分别是2倍频谐波分量和6倍频谐波分量中的一个,也即可以通过陷波滤波器先获取2倍频谐波分量,再计算纹波分量与2倍频谐波分量之间的差值,得到6倍频谐波分量;也可以通过陷波滤波器先获取6倍频谐波分量,再计算纹波分量与6倍频谐波分量之间的差值,得到6倍频谐波分量。可以通过第二减法器来计算纹波分量与第一谐波分量之间的差值,第二减法器可以是差分放大器。
在一个实施例中,陷波滤波器的传递函数的表达式如下:
H 2=(s 2 2c2 2)/( s 2 2+2 sω c2/Q+ω c2 2)
其中,H 2表示陷波滤波器的传递函数,ω c2表示陷波滤波器的截止频率,s 2表示陷波滤波器的s项,Q表示陷波滤波器的品质因数。
如图2所示,示例性的示出了陷波滤波器的频率响应曲线;其中,陷波滤波器的截止频率ω c2为频率响应曲线下凹处的最低点对应的频率,陷波滤波器的品质因数Q决定了频率响应曲线下凹处的陡峭程度,通过截止频率附近增益的迅速降低达到阻断特定频率的目的。
在一个实施例中,谐波分量包括第一谐波分量和第二谐波分量,步骤S102包括:
通过陷波滤波器根据第k检测周期的谐波分量的频率,获取第k+1检测周期的第一增益,k为大于或等于1的整数;
通过陷波滤波器根据第k+1检测周期的第一增益对第k+1检测周期的谐波分量进行滤波,得到第k+1检测周期的直流母线电压的谐波分量。
在应用中,陷波滤波器的增益可以根据实际需要设置为一个固定值。第k检测周期可以为上一检测周期,第k+1检测周期可以为当前检测周期,可以根据在上一检测周期中获得的谐波分量的频率,计算当前检测周期中陷波滤波器的增益;同理,第k检测周期也可以为当前检测周期,第k+1检测周期也可以为下一检测周期,可以根据在当前检测周期中获得的谐波分量的频率,计算下一检测周期中陷波滤波器的增益。第k检测周期涵盖第k采样周期,也即在第k检测周期中完成第k采样周期的直流母线电压采样操作。
步骤S103、根据谐波分量,获取谐波分量的正交分量。
在应用中,正交分量包括直轴分量和交轴分量,可以通过二阶广义积分器来获取正交分量。当谐波分量包括第一谐波分量和第二谐波分量时,需要分别通过两个二阶广义积分器来分别获取第一谐波分量的正交分量和第二谐波分量的正交分量。
在一个实施例中,步骤S103包括:
通过二阶广义积分器根据谐波分量,获取谐波分量的正交分量。
在一个实施例中,二阶广义积分器输出的直轴分量的传递函数的表达式如下:
H α=kωs α/(s α 2+ kωs α2)
其中,H α表示直轴分量的传递函数,直轴分量的相位与谐波分量的相位相同,ω表示谐波分量的角速度,s α表示与直轴分量对应的二阶广义积分器的s项,k表示二阶广义积分器的增益;
二阶广义积分器输出的交轴分量的传递函数的表达式如下:
H β=kω 2/(s β 2+ kωs β2)
其中,H β表示交轴分量的传递函数,交轴分量的相位比谐波分量的相位滞后90度,s β表示与交轴分量对应的二阶广义积分器的s项。
在应用中,谐波分量的角速度为谐波分量的频率与圆周率的乘积。由于电网频率可能发生变化,导致直流母线电压的谐波分量的频率发生改变,因此,当前检测周期中谐波分量的频率,由上一检测周期中获得的谐波分量的频率决定,下一检测周期中谐波分量的频率,由当前检测周期中获得的谐波分量的频率决定。
在一个实施例中,步骤S103包括:
通过二阶广义积分器根据第k检测周期的谐波分量的频率,获取第k+1检测周期的第二增益,k为任意正整数;
通过二阶广义积分器根据第k+1检测周期的第二增益和第k+1检测周期的谐波分量,获取第k+1检测周期的谐波分量的正交分量。
在应用中,二阶广义积分器的增益可以根据实际需要设置为一个固定值。第k检测周期可以为上一检测周期,第k+1检测周期可以为当前检测周期,可以根据在上一检测周期中获得的谐波分量的频率,计算当前检测周期中二阶广义积分器的增益;同理,第k检测周期也可以为当前检测周期,第k+1检测周期也可以为下一检测周期,可以根据在当前检测周期中获得的谐波分量的频率,计算下一检测周期中二阶广义积分器的增益。
在一个实施例中,谐波分量包括第一谐波分量和第二谐波分量,步骤S103包括:
通过第一二阶广义积分器根据第一谐波分量,获取第一谐波分量的正交分量;
通过第二二阶广义积分器根据第二谐波分量,获取第二谐波分量的正交分量。
在一个实施例中,第二增益包括第三增益和第四增益,步骤S103包括:
通过第一二阶广义积分器根据第k检测周期的第一谐波分量的频率,获取第k+1检测周期的第三增益,k为任意正整数;
通过第一二阶广义积分器根据第k+1检测周期的第三增益和第k+1检测周期的第一谐波分量,获取第k+1检测周期的第一谐波分量的正交分量;
通过第二二阶广义积分器根据第k检测周期的第二谐波分量的频率,获取第k+1检测周期的第四增益;
通过第二二阶广义积分器根据第k+1检测周期的第四增益和第k+1检测周期的第二谐波分量,获取第k+1检测周期的第二谐波分量的正交分量。
步骤S104、根据正交分量,获取谐波分量的特性参数,特性参数包括相位。
在应用中,特性参数还可以包括频率,可以通过锁相环来获取谐波分量的频率和相位。当谐波分量包括第一谐波分量和第二谐波分量时,需要分别通过两个锁相环来分别获取第一谐波分量的频率和相位以及第二谐波分量的频率和相位。在当前检测周期中通过锁相环获取的谐波分量的频率,即可在下一检测周期中用于分别输入陷波滤波器和二阶广义积分器来计算二者增益,以分别对陷波滤波器和二阶广义积分器的增益进行反馈控制,从而实现对电网频率的跟踪。相位可以输出至用户终端,以使得用户终端可以获知电网谐波的相位,进而根据该相位生成谐波的电压幅值随相位变化的曲线。
在一个实施例中,步骤S104包括:
通过锁相环根据正交分量,获取谐波分量的频率和相位。
在应用中,锁相环通过检测正交分量的q轴分量来对谐波分量的频率或角速度进行调节。q轴分量是相位误差在电压上的体现,因此,锁相环中通过一个比例积分器(PI)将该相位误差调节为0,比例积分器的输出为谐波分量的频率,锁相环中还通过一个限幅器来限制比例积分器输出的谐波分量的频率的变化幅度。
在一个实施例中,正交分量的q轴分量的表达式如下:
u q=-u αsinθ+u βcosθ
其中,u q表示q轴分量,u α表示直轴分量,u β表示交轴分量,θ表示q轴分量的相位(即角度)。
在应用中,q轴分量的相位通过锁相环输出的谐波分量的频率转换为角速度并积分获得。
在一个实施例中,步骤S104包括:
通过锁相环根据第k检测周期的谐波分量的相位和第k+1检测周期的正交分量,获取第k+1检测周期的谐波分量的频率和相位,k为任意正整数。
在应用中,第k检测周期可以为上一检测周期,第k+1检测周期可以为当前检测周期,可以根据在上一检测周期中获得的谐波分量的相位和当前检测周期的正交分量,计算当前检测周期中谐波分量的频率和相位;同理,第k检测周期也可以为当前检测周期,第k+1检测周期也可以为下一检测周期,可以根据在当前检测周期中获得的谐波分量的相位和下一检测周期的正交分量,计算下一检测周期中谐波分量的频率和相位。
在一个实施例中,谐波分量包括第一谐波分量和第二谐波分量,步骤S104包括:
通过第一锁相环根据第一谐波分量的正交分量,获取第一谐波分量的频率和相位;
通过第二锁相环根据第二谐波分量的正交分量,获取第二谐波分量的频率和相位。
在一个实施例中,谐波分量包括第一谐波分量和第二谐波分量,步骤S104包括:
通过第一锁相环根据第k检测周期的第一谐波分量的相位和第k+1检测周期的第一谐波分量的正交分量,获取第k+1检测周期的第一谐波分量的频率和相位,k为任意正整数;
通过第二锁相环根据第k检测周期的第二谐波分量的相位和第k+1检测周期的第二谐波分量的正交分量,获取第k+1检测周期的第二谐波分量的频率和相位。
步骤S105、根据正交分量和谐波分量的相位,获取谐波分量的电压幅值并输出。
在应用中,可以通过幅值反馈调节器来获取谐波分量的电压幅值,幅值反馈调节器可以通过锁幅环(MLL)来实现。当谐波分量包括第一谐波分量和第二谐波分量时,需要分别通过两个幅值反馈调节器来分别获取第一谐波分量的电压幅值以及第二谐波分量的电压幅值。电压幅值可以输出至用户终端,以使得用户终端根据电压幅值评估电网的三相不平衡度。
在一个实施例中,步骤S105包括:
通过幅值反馈调节器根据正交分量和谐波分量的相位,获取谐波分量的电压幅值并输出。
在应用中,可以通过将锁相环输出的相位除以对应角度的正弦或余弦,以获得谐波分量的电压幅值,但是考虑到正弦信号和余弦信号存在过零点,会导致电压幅值的计算误差过大,因此,采用一个幅值反馈调节器,来消除计算中的除法环节,以提高电压幅值的计算精度。幅值反馈调节器中电压幅值的反馈调节基于误差电压,通过比例积分器调节电压幅值。
在一个实施例中,误差电压的计算公式如下:
u err=(abs(u α)-abs(u amp*cosθ))+ (abs(u β)-abs(u amp*sinθ))
其中,u err表示误差电压,abs表示求绝对值符号,u amp表示电压幅值,u α表示直轴分量,u β表示交轴分量,θ表示q轴分量的相位。
在一个实施例中,步骤S105包括:
通过幅值反馈调节器根据第k检测周期的谐波分量的电压幅值、第k+1检测周期的正交分量和第k+1检测周期的谐波分量的相位,获取第k+1检测周期的谐波分量的电压幅值并输出,k为任意正整数。
在应用中,第k检测周期可以为上一检测周期,第k+1检测周期可以为当前检测周期,可以根据在上一检测周期中获得的谐波分量的电压幅值、当前检测周期的正交分量和相位,计算当前检测周期中谐波分量的电压幅值并输出;同理,第k检测周期也可以为当前检测周期,第k+1检测周期也可以为下一检测周期,可以根据在当前检测周期中获得的谐波分量的电压幅值、下一检测周期的正交分量和相位,计算下一检测周期中谐波分量的电压幅值并输出。
在一个实施例中,谐波分量包括第一谐波分量和第二谐波分量,步骤S105包括:
通过第一幅值反馈调节器根据第一谐波分量的正交分量和相位,获取第一谐波分量的电压幅值并输出;
通过第二幅值反馈调节器根据第二谐波分量的正交分量和相位,获取第二谐波分量的电压幅值并输出。
在一个实施例中,谐波分量包括第一谐波分量和第二谐波分量,步骤S105包括:
通过第一幅值反馈调节器根据第k检测周期的第一谐波分量的电压幅值、第k+1检测周期的第一谐波分量的正交分量和第k+1检测周期的第一谐波分量的相位,获取第k+1检测周期的第一谐波分量的电压幅值并输出,k为任意正整数;
通过第二幅值反馈调节器根据第k检测周期的第二谐波分量的电压幅值、第k+1检测周期的第二谐波分量的正交分量和第k+1检测周期的第二谐波分量的相位,获取第k+1检测周期的第二谐波分量的电压幅值并输出。
在应用中,谐波分量包括2倍频谐波分量和6倍频谐波分量,2倍频(也即2倍电网频率)对应于电网侧负序成分,6倍频(也即6倍电网频率)对应于电网正序成分,2倍频谐波分量的电压幅值与6倍频谐波分量的电压幅值的比例大小,可以体现电网中负序成分占正序成分的比例,也即可以体现电网的三相电压不平衡度,因此,用户终端获取到2倍频谐波分量和6倍频谐波分量之后,通过计算2倍频谐波分量的电压幅值与6倍频谐波分量的电压幅值的比例,可以评估电网的三相电压不平衡度。
在一个实施例中,2倍频谐波分量的电压幅值与6倍频谐波分量的电压幅值的比例计算公式如下:
K f=(U 2nd/U 6th)*100%
其中,K f表示2倍频谐波分量的电压幅值与6倍频谐波分量的电压幅值的比例,U 2nd表示2倍频谐波分量的电压幅值,U 6th表示6倍频谐波分量的电压幅值。
本申请实施例提供的谐波检测方法,能够根据采样的直流母线电压,有效检测直流母线电压中谐波分量的电压幅值,采样量少且计算过程简单,使得处理器负荷低,容易配置合适的处理器;通过将直流母线电压中2倍频谐波分量的电压幅值和6倍频谐波分量的电压幅值输出至用户终端,使得用户终端可以根据电压幅值与6倍频谐波分量的电压幅值的比例,评估电网的三相电压不平衡度,从而实现用户对电网的三相电压不平衡度的有效监控。
应理解,上述实施例中各步骤的序号的大小并不意味着执行顺序的先后,各过程的执行顺序应以其功能和内在逻辑确定,而不应对本申请实施例的实施过程构成任何限定。
本申请实施例还提供一种谐波检测装置,应用于变频器,用于执行上述方法实施例中的方法步骤。该装置可以是变频器中的虚拟装置(virtual appliance),由变频器的处理器运行,也可以是变频器本身。
如图3所示,本申请实施例提供的谐波检测装置100包括:
纹波分量获取模块10,用于获取直流母线电压的纹波分量;
谐波分量获取模块20,用于根据纹波分量,获取直流母线电压的谐波分量;
正交分量获取模块30,用于根据谐波分量,获取谐波分量的正交分量;
特性参数获取模块40,用于根据正交分量,获取谐波分量的特性参数,特性参数包括相位;
电压幅值获取模块50,用于根据正交分量和谐波分量的相位,获取谐波分量的电压幅值并输出。
在一个实施例中,谐波检测装置100还包括:
电压采样模块,用于按照采样周期对直流母线电压进行采样。
如图4所示,在一个实施例中,纹波分量获取模块10包括:
低通滤波器11,用于对直流母线电压进行低通滤波,得到直流母线电压的直流分量U DC
第一减法器12,用于获取直流母线电压与直流分量的差值,得到直流母线电压的纹波分量u ripple
在一个实施例中,谐波分量获取模块20包括:
陷波滤波器21,用于对纹波分量进行滤波,得到直流母线电压的第一谐波分量u 6th
第二减法器22,用于获取纹波分量与第一谐波分量的差值,得到直流母线电压的第二谐波分量u 2rd
在一个实施例中,正交分量获取模块30包括:
第一二阶广义积分器31,用于根据第一谐波分量u 6th,获取第一谐波分量u 6th的正交分量u αβ
第二二阶广义积分器32,用于根据第二谐波分量u 2rd,获取第二谐波分量u 2rd的正交分量u αβ
在一个实施例中,特性参数还包括频率,特性参数获取模块40包括:
第一锁相环41,用于根据第一谐波分量u 6th的正交分量u αβ,获取第一谐波分量u 6th的频率f 6th和相位θ 6th
第二锁相环42,用于根据第二谐波分量u 2rd的正交分量u αβ,获取第二谐波分量u 2rd的频率f 2rd和相位θ 2rd
在一个实施例中,电压幅值获取模块50包括:
第一幅值反馈调节器51,根据第一谐波分量u 6th的频率f 6th和相位θ 6th,获取第一谐波分量u 6th的电压幅值U 6th并输出;
第二幅值反馈调节器52,根据第二谐波分量u 2rd的频率f 2rd和相位θ 2rd,获取第二谐波分量u 2rd的电压幅值U 2rd并输出。
在一个实施例中,特性参数还包括频率,陷波滤波器21用于:
根据第k检测周期的谐波分量的频率,获取第k+1检测周期的第一增益,k为大于或等于1的整数;
根据第k+1检测周期的第一增益对第k+1检测周期的谐波分量进行滤波,得到第k+1检测周期的直流母线电压的谐波分量。
如图5所示,示例性的示出了二阶广义积分器的逻辑结构,其包括两个减法器501、增益单元502、两个乘法器503、两个积分器504和常数增益单元505。
在应用中,第一广义积分器和第二广义积分器的逻辑结构与图5所示的广义积分器的逻辑结构相同,区别在于,第一广义积分器的输入和输出信号与第一谐波分量对应,第一广义积分器的输入和输出信号与第二谐波分量对应。
如图6所示,示例性的示出了锁相环的逻辑结构,其包括正弦发生器(-sin)601、加法器602、减法器603、比例积分器(PI)604、限幅器605、低通滤波器(LPF)606、常数增益单元(2π)607、积分器(1/S)608和余弦发生器(cos)609。
在应用中,第一锁相环和第二锁相环的逻辑结构与图6所示的锁相环的逻辑结构相同,区别在于,第一锁相环的输入和输出信号与第一谐波分量对应,第二锁相环的输入和输出信号与第二谐波分量对应。
如图7所示,示例性的示出了幅值反馈调节器的逻辑结构,其包括余弦发生器(cos)701、两个乘法器702、四个求绝对值单元(abs)703、两个减法器704、加法器705、比例积分器(PI)706和正弦发生器(sin)707。
在应用中,第一幅值反馈调节器和第二幅值反馈调节器的逻辑结构与图7所示的幅值反馈调节器的逻辑结构相同,区别在于,第一幅值反馈调节器的输入和输出信号与第一谐波分量对应,第二幅值反馈调节器的输入和输出信号与第二谐波分量对应。
在应用中,上述装置中的各部件可以为软件程序单元,也可以通过处理器中集成的不同逻辑电路或与处理器连接的独立物理部件实现,还可以通过多个分布式处理器实现。
如图8所示,本申请实施例还提供一种变频器200,包括:整流器201、逆变器202、至少一个处理器203(图8中仅示出一个处理器)、存储器204以及存储在存储器204中并可在至少一个处理器203上运行的计算机程序205,整流器201用于与直流母线300连接,逆变器202用于分别与直流母线300和电机400连接,处理器202执行计算机程序205时实现上述各个谐波检测方法实施例中的步骤。
在应用中,变频器可包括,但不仅限于,整理器、逆变器、处理器以及存储器,还可以包括模数转换器、低通滤波器、减法器、陷波滤波器、二阶广义积分器、锁相环、锁幅环、减法器等。本领域技术人员可以理解,图8仅仅是变频器的举例,并不构成对变频器的限定,可以包括比图示更多或更少的部件,或者组合某些部件,或者不同的部件,例如,还可以包括输入输出设备、网络接入设备等。输入输出设备可以包括前述人机交互器件,还可以包括显示屏,用于显示变频器的工作参数。网络接入设备可以包括通信模块,用于变频器与前述的用户终端进行通信。
在应用中,逆变器用于把直流电能转变成交流电的装置,其可以由三相逆变桥臂、逻辑控制电路和滤波电路组成。
在应用中,处理器可以是中央处理单元(Central Processing Unit,CPU),该处理器还可以是其他通用处理器、数字信号处理器(Digital Signal Processor,DSP)、专用集成电路(Application Specific Integrated Circuit,ASIC)、现成可编程门阵列(Field-Programmable Gate Array,FPGA)或者其他可编程逻辑器件、分立门或者晶体管逻辑器件、分立硬件组件等。通用处理器可以是微处理器或者该处理器也可以是任何常规的处理器等。
在应用中,存储器在一些实施例中可以是变频器的内部存储单元,例如变频器的硬盘或内存。存储器在另一些实施例中也可以是变频器的外部存储设备,例如,变频器上配备的插接式硬盘,智能存储卡(Smart Media Card,SMC),安全数字(Secure Digital,SD)卡,闪存卡(Flash Card)等。存储器还可以既包括变频器的内部存储单元也包括外部存储设备。存储器用于存储操作***、应用程序、引导装载程序(Boot Loader)、数据以及其他程序等,例如计算机程序的程序代码等。存储器还可以用于暂时存储已经输出或者将要输出的数据。
在应用中,显示屏可以为薄膜晶体管液晶显示屏(Thin Film Transistor Liquid Crystal Display,TFT-LCD)、液晶显示屏( Liquid Crystal Display,LCD)、有机电激光显示屏(Organic Electroluminesence Display,OLED)、量子点发光二极管(Quantum Dot Light Emitting Diodes,QLED)显示屏,七段或八段数码管等。
在应用中,通信模块可以根据实际需要设置为任意能够与客户端直接或间接进行远距离有线或无线通信的器件,例如,通信模块可以提供应用在网络设备上的包括无线局域网(Wireless Localarea Networks,WLAN)(如Wi-Fi网络),蓝牙,Zigbee,移动通信网络,全球导航卫星***(Global Navigation Satellite System,GNSS),调频(Frequency Modulation,FM),近距离无线通信技术(Near Field Communication,NFC),红外技术(Infrared,IR)等通信的解决方案。通信模块可以包括天线,天线可以只有一个阵元,也可以是包括多个阵元的天线阵列。通信模块可以通过天线接收电磁波,将电磁波信号调频以及滤波处理,将处理后的信号发送到处理器。通信模块还可以从处理器接收待发送的信号,对其进行调频、放大,经天线转为电磁波辐射出去。
在应用中,低通滤波器可以根据实际需要选择截止频率符合要求的任意类型的滤波器,例如,巴特沃斯滤波器(Butterworth filter)或切比雪夫滤波器。
在应用中,模数转换器可以根据实际需要选择采样精度符合要求的任意类型的模数转换器,例如,并联比较型、逐次逼近型或双积分型模数转换器。模数转换器的采样精度由其分辨率决定,分辨率可以根据实际需要进行选择,例如,八位、十二位或二十四位。当选用分辨率可切换的模数转换器时,用户可以根据实际需要,通过变频器或用户终端的人机交互器件,切换模数转换器的分辨率,以适应不同的应用场景。
需要说明的是,上述装置/模块之间的信息交互、执行过程等内容,由于与本申请方法实施例基于同一构思,其具体功能及带来的技术效果,具体可参见方法实施例部分,此处不再赘述。
所属领域的技术人员可以清楚地了解到,为了描述的方便和简洁,仅以上述各功能模块的划分进行举例说明,实际应用中,可以根据需要将上述功能分配由不同的功能模块完成,即将所述装置的内部结构划分成不同的功能模块,以完成以上描述的全部或者部分功能。实施例中的各功能模块可以集成在一个处理模块中,也可以是各个模块单独物理存在,也可以两个或两个以上模块集成在一个模块中,上述集成的模块既可以采用硬件的形式实现,也可以采用软件功能模块的形式实现。另外,各功能模块的具体名称也只是为了便于相互区分,并不用于限制本申请的保护范围。上述***中模块的具体工作过程,可以参考前述方法实施例中的对应过程,在此不再赘述。
本申请实施例还提供了一种计算机可读存储介质,计算机可读存储介质中存储有计算机程序,计算机程序被处理器所执行时可实现上述各个方法实施例中的步骤。
本申请实施例提供了一种计算机程序产品,当计算机程序产品在变频器上运行时,使得变频器可实现上述各个方法实施例中的步骤。
所述集成的模块如果以软件功能模块的形式实现并作为独立的产品销售或使用时,可以存储在一个计算机可读取存储介质中。基于这样的理解,本申请实现上述实施例方法中的全部或部分流程,可以通过计算机程序来指令相关的硬件来完成,计算机程序可存储于一计算机可读存储介质中,该计算机程序在被处理器执行时,可实现上述各个方法实施例的步骤。其中,所述计算机程序包括计算机程序代码,所述计算机程序代码可以为源代码形式、对象代码形式、可执行文件或某些中间形式等。所述计算机可读介质至少可以包括:能够将计算机程序代码携带到变频器的任何实体或装置、记录介质、计算机存储器、只读存储器(ROM,Read-Only Memory)、随机存取存储器(RAM,Random Access Memory)、电载波信号、电信信号以及软件分发介质。例如U盘、移动硬盘、磁碟或者光盘等。
在上述实施例中,对各个实施例的描述都各有侧重,某个实施例中没有详述或记载的部分,可以参见其它实施例的相关描述。
本领域普通技术人员可以意识到,结合本文中所公开的实施例描述的各示例的模块及算法步骤,能够以电子硬件、或者计算机软件和电子硬件的结合来实现。这些功能究竟以硬件还是软件方式来执行,取决于技术方案的特定应用和设计约束条件。专业技术人员可以对每个特定的应用来使用不同方法来实现所描述的功能,但是这种实现不应认为超出本申请的范围。
在本申请所提供的实施例中,应该理解到,所揭露的装置和方法,可以通过其它的方式实现。例如,以上所描述的装置实施例仅仅是示意性的,例如,所述模块的划分,仅仅为一种逻辑功能划分,实际实现时可以有另外的划分方式,例如多个模块或组件可以结合或者可以集成到另一个***,或一些特征可以忽略,或不执行。另一点,所显示或讨论的相互之间的耦合或直接耦合或通讯连接可以是通过一些接口,装置或模块的间接耦合或通讯连接,可以是电性,机械或其它的形式。
所述作为分离部件说明的模块可以是或者也可以不是物理上分开的,作为模块显示的部件可以是或者也可以不是物理模块,即可以位于一个地方,或者也可以分布到多个网络模块上。可以根据实际的需要选择其中的部分或者全部模块来实现本实施例方案的目的。
以上所述实施例仅用以说明本申请的技术方案,而非对其限制;尽管参照前述实施例对本申请进行了详细的说明,本领域的普通技术人员应当理解:其依然可以对前述各实施例所记载的技术方案进行修改,或者对其中部分技术特征进行等同替换;而这些修改或者替换,并不使相应技术方案的本质脱离本申请各实施例技术方案的精神和范围,均应包含在本申请的保护范围之内。

Claims (12)

  1. 一种谐波检测方法,其特征在于,包括:
    获取直流母线电压的纹波分量;
    根据所述纹波分量,获取所述直流母线电压的谐波分量;
    根据所述谐波分量,获取所述谐波分量的正交分量;
    根据所述正交分量,获取所述谐波分量的特性参数,所述特性参数包括相位;
    根据所述正交分量和所述谐波分量的相位,获取所述谐波分量的电压幅值并输出。
  2. 如权利要求1所述的谐波检测方法,其特征在于,所述根据所述纹波分量,获取所述直流母线电压的谐波分量,包括:
    通过陷波滤波器对所述纹波分量进行滤波,得到所述直流母线电压的第一谐波分量;
    获取所述纹波分量与所述第一谐波分量的差值,得到所述直流母线电压的第二谐波分量。
  3. 如权利要求2所述的谐波检测方法,其特征在于,所述特性参数还包括频率,所述根据所述纹波分量,获取所述直流母线电压的谐波分量,包括:
    通过陷波滤波器根据第k检测周期的第二谐波分量的频率,获取第k+1检测周期的第一增益,k为任意正整数;
    通过所述陷波滤波器根据所述第k+1检测周期的第一增益对第k+1检测周期的谐波分量进行滤波,得到第k+1检测周期的直流母线电压的第一谐波分量。
  4. 如权利要求1所述的谐波检测方法,其特征在于,所述根据所述谐波分量,获取所述谐波分量的正交分量,包括:
    通过二阶广义积分器根据所述谐波分量,获取所述谐波分量的正交分量。
  5. 如权利要求1或4所述的谐波检测方法,其特征在于,所述特性参数还包括频率,所述根据所述谐波分量,获取所述谐波分量的正交分量,包括:
    通过二阶广义积分器根据第k检测周期的谐波分量的频率,获取第k+1检测周期的第二增益,k为任意正整数;
    通过所述二阶广义积分器根据所述第k+1检测周期的第二增益和第k+1检测周期的谐波分量,获取第k+1检测周期的谐波分量的正交分量。
  6. 如权利要求1所述的谐波检测方法,其特征在于,所述根据所述正交分量,获取所述谐波分量的特性参数,包括:
    通过锁相环根据所述正交分量,获取所述谐波分量的特性参数。
  7. 如权利要求1或6所述的谐波检测方法,其特征在于,所述根据所述正交分量,获取所述谐波分量的特性参数,包括:
    通过锁相环根据第k检测周期的谐波分量的相位和第k+1检测周期的正交分量,获取第k+1检测周期的谐波分量的特性参数,k为任意正整数。
  8. 如权利要求1所述的谐波检测方法,其特征在于,所述根据所述正交分量和所述谐波分量的相位,获取所述谐波分量的电压幅值并输出,包括:
    通过幅值反馈调节器根据所述正交分量和所述谐波分量的相位,获取所述谐波分量的电压幅值并输出。
  9. 如权利要求1或8所述的谐波检测方法,其特征在于,所述根据所述正交分量和所述谐波分量的相位,获取所述谐波分量的电压幅值并输出,包括:
    通过幅值反馈调节器根据第k检测周期的谐波分量的电压幅值、第k+1检测周期的正交分量和第k+1检测周期的谐波分量的相位,获取第k+1检测周期的谐波分量的电压幅值并输出,k为任意正整数。
  10. 一种谐波检测装置,其特征在于,包括:
    纹波分量获取模块,用于获取直流母线电压的纹波分量;
    谐波分量获取模块,用于根据所述纹波分量,获取所述直流母线电压的谐波分量;
    正交分量获取模块,用于根据所述谐波分量,获取所述谐波分量的正交分量;
    特性参数获取模块,用于根据所述正交分量,获取所述谐波分量的特性参数,所述特性参数包括相位;
    电压幅值获取模块,用于根据所述正交分量和所述谐波分量的相位,获取所述谐波分量的电压幅值并输出。
  11. 一种变频器,其特征在于,包括整流器、逆变器、存储器、处理器以及存储在所述存储器中并可在所述处理器上运行的计算机程序,所述整流器用于与直流母线连接,所述逆变器用于分别与所述直流母线和电机连接,所述处理器执行所述计算机程序时实现如权利要求1至9任一项所述谐波检测方法的步骤。
  12. 一种计算机可读存储介质,所述计算机可读存储介质存储有计算机程序,所述计算机程序被处理器执行时实现如权利要求1至9任一项所述谐波检测方法的步骤。
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