WO2022183766A1 - 阵列基板及其制备方法、触控显示装置 - Google Patents

阵列基板及其制备方法、触控显示装置 Download PDF

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Publication number
WO2022183766A1
WO2022183766A1 PCT/CN2021/129974 CN2021129974W WO2022183766A1 WO 2022183766 A1 WO2022183766 A1 WO 2022183766A1 CN 2021129974 W CN2021129974 W CN 2021129974W WO 2022183766 A1 WO2022183766 A1 WO 2022183766A1
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Prior art keywords
touch
conductive layer
transparent conductive
signal lines
electrodes
Prior art date
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PCT/CN2021/129974
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English (en)
French (fr)
Inventor
苏秋杰
尹晓峰
陈东川
廖燕平
李承珉
邵喜斌
Original Assignee
京东方科技集团股份有限公司
北京京东方显示技术有限公司
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Application filed by 京东方科技集团股份有限公司, 北京京东方显示技术有限公司 filed Critical 京东方科技集团股份有限公司
Priority to US17/915,498 priority Critical patent/US20230118806A1/en
Publication of WO2022183766A1 publication Critical patent/WO2022183766A1/zh

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    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/01—Input arrangements or combined input and output arrangements for interaction between user and computer
    • G06F3/03—Arrangements for converting the position or the displacement of a member into a coded form
    • G06F3/041—Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means
    • G06F3/0412—Digitisers structurally integrated in a display
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/124—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/01—Input arrangements or combined input and output arrangements for interaction between user and computer
    • G06F3/03—Arrangements for converting the position or the displacement of a member into a coded form
    • G06F3/041—Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means
    • G06F3/0416—Control or interface arrangements specially adapted for digitisers
    • G06F3/04164—Connections between sensors and controllers, e.g. routing lines between electrodes and connection pads
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/01—Input arrangements or combined input and output arrangements for interaction between user and computer
    • G06F3/03—Arrangements for converting the position or the displacement of a member into a coded form
    • G06F3/041—Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means
    • G06F3/044—Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means by capacitive means
    • G06F3/0443—Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means by capacitive means using a single layer of sensing electrodes
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/01—Input arrangements or combined input and output arrangements for interaction between user and computer
    • G06F3/03—Arrangements for converting the position or the displacement of a member into a coded form
    • G06F3/041—Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means
    • G06F3/044—Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means by capacitive means
    • G06F3/0445—Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means by capacitive means using two or more layers of sensing electrodes, e.g. using two layers of electrodes separated by a dielectric layer
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/1259—Multistep manufacturing methods
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2203/00—Indexing scheme relating to G06F3/00 - G06F3/048
    • G06F2203/041—Indexing scheme relating to G06F3/041 - G06F3/045
    • G06F2203/04103—Manufacturing, i.e. details related to manufacturing processes specially suited for touch sensitive devices
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2203/00—Indexing scheme relating to G06F3/00 - G06F3/048
    • G06F2203/041—Indexing scheme relating to G06F3/041 - G06F3/045
    • G06F2203/04107—Shielding in digitiser, i.e. guard or shielding arrangements, mostly for capacitive touchscreens, e.g. driven shields, driven grounds
    • G—PHYSICS
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    • G06F—ELECTRIC DIGITAL DATA PROCESSING
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    • G06F3/01—Input arrangements or combined input and output arrangements for interaction between user and computer
    • G06F3/03—Arrangements for converting the position or the displacement of a member into a coded form
    • G06F3/041—Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means
    • G06F3/044—Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means by capacitive means
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/04—Structural and physical details of display devices
    • G09G2300/0421—Structural details of the set of electrodes
    • G09G2300/0426—Layout of electrodes and connections
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/2007—Display of intermediate tones
    • G09G3/2074—Display of intermediate tones using sub-pixels
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611—Control of matrices with row and column drivers
    • G09G3/3622—Control of matrices with row and column drivers using a passive matrix
    • G09G3/3629—Control of matrices with row and column drivers using a passive matrix using liquid crystals having memory effects, e.g. ferroelectric liquid crystals
    • G09G3/364—Control of matrices with row and column drivers using a passive matrix using liquid crystals having memory effects, e.g. ferroelectric liquid crystals with use of subpixels

Definitions

  • This article relates to, but is not limited to, the field of display technology, especially an array substrate, a method for preparing the same, and a touch display device.
  • the touch screen saves space and is easy to carry, as well as better human-computer interaction.
  • capacitive touch screens are widely used due to their advantages of strong sensitivity and multi-touch capability.
  • the in-cell touch structure includes two methods: self-capacitance touch and mutual-capacitance touch.
  • the in-cell touch screen has a higher integration level and is lighter and thinner, so it has a wide application prospect.
  • Embodiments of the present disclosure provide an array substrate, a method for manufacturing the same, and a touch display device.
  • an embodiment of the present disclosure provides an array substrate, including: a base substrate, a plurality of first signal lines, a plurality of second signal lines, a plurality of touch signal lines, a first signal line disposed on the base substrate a transparent conductive layer and a second transparent conductive layer.
  • the first transparent conductive layer and the second transparent conductive layer are located on a side of the plurality of touch signal lines away from the base substrate.
  • the touch signal line is connected to at least one touch sensing block, the touch sensing block includes a plurality of touch electrodes connected to and spaced apart from each other, and the first transparent conductive layer or the second transparent conductive layer includes the plurality of touch electrodes.
  • the plurality of first signal lines and the plurality of second signal lines intersect to form a plurality of sub-pixel regions, and the sub-pixel regions include opening regions; the touch signal lines and the opening regions of the at least one sub-pixel region are located on the substrate.
  • the orthographic projections on the base substrate overlap.
  • the plurality of touch signal lines and the plurality of second signal lines are of the same layer structure, and the plurality of touch signal lines extend along the extending direction of the plurality of second signal lines .
  • the first transparent conductive layer is located on a side of the second transparent conductive layer close to the base substrate.
  • the orthographic projection of the first transparent conductive layer on the base substrate covers the orthographic projection of the touch signal line on the base substrate.
  • an organic insulating layer is disposed between the film layer where the touch signal lines are located and the first transparent conductive layer.
  • the thickness of the organic insulating layer is about 1 to 3 microns.
  • the first transparent conductive layer includes: a plurality of touch electrodes
  • the second transparent conductive layer includes: a plurality of pixel electrodes; or, the first transparent conductive layer includes: a plurality of A pixel electrode, the second transparent conductive layer includes: a plurality of touch electrodes.
  • the touch electrode or the pixel electrode located on the second transparent conductive layer has a plurality of slits, and the extending direction of the slits intersects with the extending direction of the touch signal line.
  • At least one touch sensing block includes: a plurality of touch electrode groups arranged in sequence; at least one touch electrode group includes: a plurality of touch electrodes spaced apart and electrically connecting the plurality of touch electrodes The first connection unit of the touch electrode.
  • the touch sensing block further includes: a second connection unit located between adjacent touch electrode groups and electrically connected to the adjacent touch electrode groups.
  • the first connection unit includes: a first connection line and a first connection electrode.
  • the first connection line and the first signal line are of the same layer structure, the first connection electrode is located in the second transparent conductive layer, and the first connection electrode is configured to connect the first connection line and the the touch electrodes.
  • the second connection unit includes: a second connection electrode; the second connection electrode is located on the second transparent conductive layer.
  • the second connection unit further includes: a third connection electrode; the third connection electrode and the touch signal line are of the same layer structure, and the second connection electrode is configured to connect a phase The adjacent touch electrode group and the third connection electrode.
  • the array substrate further includes: a plurality of switching elements located on the base substrate, at least one switching element is located between adjacent second signal lines and touch signal lines.
  • an embodiment of the present disclosure provides a touch display device including the above-mentioned array substrate.
  • the touch display device further includes: at least one first touch control circuit and at least one second touch control circuit.
  • the array substrate includes: a first touch area and a second touch area located on one side of the first touch area; the first touch control circuit is located in the first touch area away from the second touch area On one side of the touch area, the first touch control circuit is connected to the touch sensing block in the first touch area through a touch signal line; the second touch control circuit is located in the second touch control circuit The touch area is away from the side of the first touch area, and the second touch control circuit is connected to the touch sensing block in the second touch area through a touch signal line.
  • an embodiment of the present disclosure provides a method for preparing an array substrate, which is used for preparing the above-mentioned array substrate.
  • the preparation method includes: forming a plurality of first signal lines, a plurality of A second signal line, a plurality of touch signal lines, a first transparent conductive layer, and a second transparent conductive layer.
  • the first transparent conductive layer and the second transparent conductive layer are located on a side of the plurality of touch signal lines away from the base substrate.
  • the touch signal line is connected to at least one touch sensing block, the touch sensing block includes a plurality of touch electrodes connected to and spaced apart from each other, and the first transparent conductive layer or the second transparent conductive layer includes the plurality of touch electrodes.
  • the plurality of first signal lines and the plurality of second signal lines intersect to form a plurality of sub-pixel regions, and the sub-pixel regions include opening regions; the touch signal lines and the opening regions of the at least one sub-pixel region are located on the substrate.
  • the orthographic projections on the base substrate overlap.
  • forming a plurality of first signal lines, a plurality of second signal lines, a plurality of touch signal lines, a first transparent conductive layer and a second transparent conductive layer on the base substrate comprising: forming a first conductive layer on the base substrate, the first conductive layer including a plurality of first signal lines; forming a second conductive layer on the side of the first conductive layer away from the base substrate
  • the second conductive layer includes: a plurality of second signal lines and a plurality of touch signal lines; a first transparent conductive layer and a second transparent conductive layer are sequentially formed on the side of the second conductive layer away from the base substrate Transparent conductive layer.
  • the first transparent conductive layer includes a plurality of touch electrodes
  • the second transparent conductive layer includes a plurality of pixel electrodes
  • the first transparent conductive layer includes a plurality of pixel electrodes
  • the second transparent conductive layer includes Multiple touch electrodes.
  • FIG. 1 is a schematic diagram of a touch control structure of a touch display device
  • FIG. 2A is a schematic top view of an array substrate according to at least one embodiment of the disclosure.
  • FIG. 2B is a schematic top view of the array substrate after forming the first conductive layer in FIG. 2A;
  • FIG. 2C is a schematic top view of the array substrate after the semiconductor layer is formed in FIG. 2A;
  • 2D is a schematic top view of the array substrate after forming the second conductive layer in FIG. 2A;
  • FIG. 2E is a schematic top view of the array substrate after forming the first transparent conductive layer in FIG. 2A;
  • FIG. 2F is a schematic top view of the array substrate after the third insulating layer is formed in FIG. 2A;
  • 3A is a schematic partial cross-sectional view along the P-P direction in FIG. 2A;
  • 3B is a schematic partial cross-sectional view along the Q-Q direction in FIG. 2A;
  • FIG. 4A is another schematic top view of an array substrate according to at least one embodiment of the disclosure.
  • FIG. 4B is a schematic top view of the array substrate after forming the second conductive layer in FIG. 4A;
  • FIG. 4C is a schematic top view of the array substrate after the first transparent conductive layer is formed in FIG. 4A;
  • 4D is a schematic top view of the array substrate after the third insulating layer is formed in FIG. 4A;
  • 5A is a schematic partial cross-sectional view along the P-P direction in FIG. 4A;
  • 5B is a schematic partial cross-sectional view along the R-R direction in FIG. 4A;
  • FIG. 6 is a schematic diagram of a touch control structure of a touch display device according to at least one embodiment of the disclosure.
  • ordinal numbers such as “first”, “second”, and “third” are set to avoid confusion of constituent elements, rather than to limit the quantity.
  • "Plurality” in this disclosure means a quantity of two or more.
  • the terms “installed”, “connected” and “connected” should be construed broadly unless otherwise expressly specified and limited. For example, it may be a fixed connection, or a detachable connection, or an integral connection; it may be a mechanical connection, or an electrical connection; it may be a direct connection, or an indirect connection through an intermediate piece, or an internal communication between two elements.
  • installed should be construed broadly unless otherwise expressly specified and limited. For example, it may be a fixed connection, or a detachable connection, or an integral connection; it may be a mechanical connection, or an electrical connection; it may be a direct connection, or an indirect connection through an intermediate piece, or an internal communication between two elements.
  • a transistor refers to an element including at least three terminals of a gate electrode, a drain electrode, and a source electrode.
  • a transistor has a channel region between a drain electrode (drain electrode terminal, drain region or drain) and a source electrode (source electrode terminal, source region or source), and current can flow through the drain electrode, the channel region, and the source electrode .
  • the channel region refers to a region through which current mainly flows.
  • one of the electrodes is called the first electrode, and the other electrode is called the second electrode.
  • the first electrode may be the source electrode or the drain electrode, and the second electrode may be It is a drain electrode or a source electrode, and the gate electrode of the transistor is called a gate electrode.
  • the functions of the "source electrode” and the “drain electrode” may be interchanged when using transistors of opposite polarities or when the direction of the current changes during circuit operation. Therefore, in the present disclosure, “source electrode” and “drain electrode” may be interchanged with each other.
  • electrically connected includes the case where constituent elements are connected together by elements having some electrical function.
  • the "element having a certain electrical effect” is not particularly limited as long as it can transmit electrical signals between the connected constituent elements.
  • Examples of “elements having some electrical function” include not only electrodes and wirings, but also switching elements such as transistors, resistors, inductors, capacitors, other elements having one or more functions, and the like.
  • parallel refers to a state in which the angle formed by two straight lines is -10° or more and 10° or less, and thus can include a state in which the angle is -5° or more and 5° or less.
  • perpendicular refers to a state in which the angle formed by two straight lines is 80° or more and 100° or less, and therefore can include a state in which an angle of 85° or more and 95° or less is included.
  • FIG. 1 is a schematic diagram of a touch control structure of a touch display device.
  • the touch display device shown in FIG. 1 may be an in-cell touch display device using a self-capacitive touch technology.
  • the touch control structure includes a plurality of touch sensing blocks (as self-capacitance electrodes) 101 arranged in an array, and a plurality of touch sensing blocks 101 electrically connected to the touch sensing blocks 101 respectively.
  • touch signal line 102 .
  • the black dots in Figure 1 represent electrical connections.
  • the touch control circuit 103 is located on one side of the touch area 100 of the touch display device.
  • the touch signal line 102 electrically connects the touch sensing block 101 to the touch control circuit 103 .
  • the touch object for example, a human finger
  • the capacitance of the touch sensing block 101 at the touch point will change.
  • the touch control circuit 103 detects the touch by detecting the touch sensing.
  • the change in self-capacitance of block 101 is used to determine the touch location.
  • each touch sensing block needs to be connected to a touch signal line, a plurality of touch signal lines need to be connected to the touch control circuit.
  • the number of touch signal lines is large, there are problems of difficulty in routing and heavy load.
  • the routing of the touch signal lines also affects the pixel aperture ratio.
  • the touch structure shown in FIG. 1 is applied to a large-size touch display device (eg, a touch display device with 8K resolution)
  • the data of the touch sensing block and the touch signal line are both If there are many, the load of the touch display device is relatively large, which will affect the performance of the touch display device.
  • a large number of touch signal lines are connected to the touch control circuit, which will cause difficulty in fan-out wiring and affect the pixel aperture ratio.
  • At least one embodiment of the present disclosure provides an array substrate, comprising: a base substrate, a plurality of first signal lines, a plurality of second signal lines, a plurality of touch signal lines, and a first transparent conductive line disposed on the base substrate layer and a second transparent conductive layer.
  • the first transparent conductive layer and the second transparent conductive layer are located on one side of the plurality of touch signal lines away from the base substrate.
  • the touch signal line is connected to at least one touch sensing block, the touch sensing block includes a plurality of touch electrodes connected to and spaced apart from each other, and the first transparent conductive layer or the second transparent conductive layer includes the plurality of touch electrodes electrode.
  • a plurality of first signal lines and a plurality of second signal lines intersect to form a plurality of sub-pixel regions.
  • the sub-pixel area includes an opening area.
  • the touch signal line overlaps with the orthographic projection of the opening region of the at least one sub-pixel region on the base substrate.
  • the routing of the touch signal lines is facilitated.
  • the touch signal lines by arranging the touch signal lines on the side of the first transparent conductive layer and the second transparent conductive layer close to the base substrate, the pixel aperture ratio can be improved.
  • the array substrate of this embodiment may adopt a self-capacitive touch technology.
  • the array substrate includes pixel electrodes and common electrodes, and the common electrodes are multiplexed as touch electrodes.
  • the common electrode signal is provided to the common electrode through the touch signal line to realize the display function; in the touch stage, the touch signal detected by the common electrode is transmitted through the touch signal line to realize the touch function.
  • each touch sensing block may include a plurality of common electrodes that are multiplexed as touch electrodes, for example, may include common electrodes of tens by tens of sub-pixels.
  • the touch signal line connected to the touch sensing block can be connected to a driving integrated circuit that integrates display and touch functions.
  • the touch display device including the array substrate of this embodiment may be a liquid crystal display device.
  • the touch display device may include the array substrate of this embodiment, an opposite substrate, and a liquid crystal layer disposed between the array substrate and the opposite substrate.
  • the touch display device may be an Advanced Super Dimension Switch (ADS, Advanced Super Dimension Switch) type display device, or may be a High-Advanced Dimension Switch (HADS, High-Advanced Dimension Switch) type of touch display device.
  • ADS Advanced Super Dimension Switch
  • HADS High-Advanced Dimension Switch
  • the pixel electrodes and the common electrodes included in the array substrate are used to generate an electric field for controlling the deflection of liquid crystal molecules in the liquid crystal layer.
  • this embodiment does not limit this.
  • the plurality of touch signal lines and the plurality of second signal lines are of the same layer structure, and the plurality of touch signal lines extend along the extending direction of the plurality of second signal lines.
  • the second signal line is a data line
  • the first signal line is a gate line.
  • this embodiment does not limit this.
  • the second signal line is a gate line
  • the first signal line is a data line.
  • the first transparent conductive layer is located on a side of the second transparent conductive layer close to the base substrate.
  • the orthographic projection of the first transparent conductive layer on the base substrate covers the orthographic projection of the touch signal line on the base substrate.
  • the touch signal line is shielded by the first transparent conductive layer, which can improve the pixel aperture ratio and transmittance.
  • an organic insulating layer is disposed between the film layer where the touch signal lines are located and the first transparent conductive layer. In this exemplary embodiment, by disposing an organic insulating layer between the film layer where the touch signal lines are located and the first transparent conductive layer, the capacitance between the touch signal lines and the first transparent conductive layer can be reduced.
  • the thickness of the organic insulating layer is about 1 to 3 microns.
  • the thickness of the organic insulating layer may be about 1 micrometer, or 2 micrometers. However, this embodiment does not limit this.
  • the first transparent conductive layer includes a plurality of touch electrodes
  • the second transparent conductive layer includes a plurality of pixel electrodes; or the first transparent conductive layer includes a plurality of pixel electrodes, and the second transparent conductive layer includes a plurality of pixel electrodes.
  • the conductive layer includes: a plurality of touch electrodes.
  • this embodiment does not limit this.
  • the touch electrodes or pixel electrodes located in the second transparent conductive layer have a plurality of slits, and the extending direction of the slits intersects with the extending direction of the touch signal lines.
  • At least one touch sensing block includes: a plurality of touch electrode groups arranged in sequence. At least one touch electrode group includes: a plurality of touch electrodes spaced apart and a first connection unit electrically connecting the plurality of touch electrodes. The touch sensing block further includes: a second connection unit located between adjacent touch electrode groups and electrically connected to the adjacent touch electrode groups.
  • a plurality of touch electrodes are connected to form a touch electrode group, and a plurality of touch electrode groups are connected to form a touch sensing block.
  • one touch electrode group may include touch electrodes corresponding to a plurality of sub-pixels of one pixel unit. However, this embodiment does not limit this.
  • the first connection unit includes: a first connection line and a first connection electrode.
  • the first connection line and the first signal line are of the same layer structure
  • the first connection electrode is located in the second transparent conductive layer
  • the first connection electrode is configured to connect the first connection line and the touch electrodes.
  • the first connection line and the gate line may be of the same layer structure and have the same extension direction.
  • the touch electrodes are located on the second transparent conductive layer, and the first connection electrodes and the touch electrodes may be integral structures.
  • the touch electrodes are located on the first transparent conductive layer, and the first connection electrodes located on the second transparent conductive layer can connect the first connection lines and the touch electrodes. However, this embodiment does not limit this.
  • the second connection unit includes: a second connection electrode; and the second connection electrode is located on the second transparent conductive layer.
  • the touch electrodes are located on the second transparent conductive layer, and the second connection can be integrated with the touch electrodes. However, this embodiment does not limit this.
  • the second connection unit includes: a second connection electrode and a third connection electrode.
  • the second connection electrode is located on the second transparent conductive layer.
  • the third connection electrodes and the touch signal lines are of the same layer structure, and the second connection electrodes are configured to connect the adjacent touch electrode groups and the third connection electrodes.
  • the array substrate further includes: a plurality of switching elements located on the base substrate, at least one switching element is located between adjacent second signal lines and touch signal lines.
  • the switching elements are transistors.
  • the switching element may include a control electrode, an active layer, a first electrode and a second electrode. The control electrode of the switching element can be connected to the gate line, the first electrode is connected to the data line, and the second electrode is connected to the pixel electrode.
  • the switching element is configured to provide a signal of the data line to the pixel electrode under the control of the gate line.
  • a touch display device in which the array substrate provided by the present exemplary embodiment is included in the ADS type and adopts the self-capacitance touch technology is used as an example for description.
  • a touch display device may include the array substrate provided in this exemplary embodiment, an opposite substrate, and a liquid crystal layer disposed between the array substrate and the opposite substrate.
  • the pixel electrodes and the common electrodes included in the array substrate can generate an electric field for controlling the deflection of liquid crystal molecules in the liquid crystal layer.
  • the opposing substrate may include at least a base substrate and a black matrix.
  • FIG. 2A is a schematic top view of an array substrate according to at least one embodiment of the disclosure.
  • FIG. 2B is a schematic top view of the array substrate after the first conductive layer is formed in FIG. 2A .
  • FIG. 2C is a schematic top view of the array substrate after the semiconductor layer is formed in FIG. 2A .
  • FIG. 2D is a schematic top view of the array substrate after forming the second conductive layer in FIG. 2A .
  • FIG. 2E is a schematic top view of the array substrate after the first transparent conductive layer is formed in FIG. 2A .
  • FIG. 2F is a schematic top view of the array substrate after the third insulating layer is formed in FIG. 2A .
  • FIG. 3A is a schematic partial cross-sectional view along the P-P direction in FIG. 2A .
  • FIG. 3B is a schematic partial cross-sectional view along the Q-Q direction in FIG. 2A .
  • the illustration of this example illustrates three sub-pixel regions and partial structures
  • the array substrate includes a base substrate 10 and a plurality of first signal lines 21 and a plurality of second signal lines 41 disposed on the base substrate 10 .
  • the plurality of first signal lines 21 are located on the first conductive layer, extend along the first direction X, and are sequentially arranged along the second direction Y different from the first direction X.
  • the plurality of second signal lines 41 are located in the second conductive layer, extend along the second direction Y, and are sequentially arranged along the first direction X.
  • the first direction X and the second direction Y intersect, for example, the first direction X and the second direction Y are perpendicular to each other.
  • the second conductive layer is located on the side of the first conductive layer away from the base substrate 10 .
  • a plurality of first signal lines 21 and a plurality of second signal lines 41 intersect to form a plurality of sub-pixel regions.
  • the area defined by the intersection of adjacent first signal lines 21 and adjacent second signal lines 41 is a sub-pixel area.
  • the sub-pixel area includes an opening area and a non-opening area surrounding the opening area.
  • the non-open area is an area blocked by the black matrix of the opposite substrate of the array substrate, and the open area is an area not blocked by the black matrix. Both the adjacent first signal line 21 and the second signal line 41 are located in the non-open area.
  • the array substrate of this embodiment is used to realize the display function, the opening area of each sub-pixel area is configured for display, and the non-open area surrounds the opening area and does not display.
  • this embodiment does not limit this.
  • the array substrate may be used to implement other functions.
  • the orthographic projection of the second signal line 41 on the base substrate 10 intersects the orthographic projection of the first signal line 21 on the base substrate 10 .
  • the first signal line 21 has a first width at a position overlapping with the second signal line 41
  • the first signal line 21 has a second width at a position between adjacent second signal lines 41 .
  • Both the first width and the second width are dimensions of the first signal line 21 in the second direction Y.
  • the first width is smaller than the second width.
  • the first signal line 21 may be a gate line
  • the second signal line 22 may be a data line.
  • this embodiment does not limit this.
  • the first signal line may be a data line
  • the second data line may be a gate line.
  • the array substrate further includes a plurality of touch signal lines 42 and a plurality of touch sensing blocks.
  • the plurality of touch sensing blocks and the plurality of touch signal lines 42 are connected in a one-to-one correspondence. However, this embodiment does not limit this.
  • the plurality of touch signal lines 42 extend along the extending direction of the second signal lines 41 (ie, the second direction Y), and extend along the first signal lines 21
  • the extending directions (ie, the first direction X) of are arranged in sequence.
  • the orthographic projection of one touch signal line 42 on the base substrate 10 is located between the orthographic projections of two adjacent second signal lines 41 on the base substrate 10 .
  • the plurality of touch signal lines 42 may be located in the second conductive layer and have the same layer structure as the plurality of second signal lines 41 . As shown in FIG. 2A , the touch signal line 42 is located in the middle of the two second signal lines 41 adjacent to the touch signal line 42 .
  • the distance between the touch signal line 42 and the second signal lines 41 adjacent to both sides may be approximately the same.
  • the difference between the electric fields on both sides of the second signal line 41 can be reduced, which is beneficial to prevent the touch signal line 42 from affecting the display effect.
  • the first signal line 21 has a plurality of hollow parts 210 .
  • the plurality of hollow parts 210 are arranged along the first direction X.
  • the orthographic projection of the touch signal line 42 on the base substrate 10 overlaps with the orthographic projection of the hollow portion 210 of the first signal line 21 on the base substrate 10 .
  • the hollow portion 210 is an opening passing through the first signal line 21 .
  • the length of the hollow portion 210 along the first direction X is greater than the length of the touch signal line 42 along the first direction X.
  • the hollow portion 210 may be rectangular. However, this embodiment does not limit this.
  • the touch signal lines 42 overlap with the orthographic projections of the opening regions of the sub-pixel regions on the base substrate 10 .
  • the opening area of the sub-pixel area is provided with pixel electrodes 61 and touch electrodes 51 .
  • the touch electrodes 51 are multiplexed as common electrodes. In the display stage, the touch electrodes 51 are used as common electrodes, and a common electrode signal is applied.
  • a plurality of touch electrodes 51 isolated from each other are connected to each other to form a touch sensing block.
  • the touch electrodes 51 isolated from each other in a plurality of sub-pixel regions can be connected to each other to form a touch sensing block.
  • the touch sensing block may include: a plurality of touch electrode groups arranged in sequence, and a second touch electrode group located between adjacent touch electrode groups and electrically connected to the adjacent touch electrode groups connection unit.
  • At least one touch electrode group includes a plurality of touch electrodes 51 spaced apart and a first connection unit electrically connecting the plurality of touch electrodes 51 .
  • the touch electrodes 51 disposed in the three sub-pixel regions of one pixel unit can be connected to form one touch electrode group.
  • the number of touch electrodes included in one touch electrode group is not limited.
  • the first connection unit includes: a first connection line 22 and a first connection electrode 62 .
  • the first connection line 22 and the first signal line 21 are disposed on the same layer, and the first connection line 22 extends along the extending direction of the first signal line 21 (ie, the first direction X).
  • the orthographic projection of the first connection line 22 on the base substrate intersects with the orthographic projection of the second signal line 41 on the base substrate 10 .
  • the first connection lines 22 have a third width at positions overlapping with the second signal lines 41
  • the first connection lines 22 have a fourth width at positions between adjacent second signal lines 41 .
  • Both the third width and the fourth width are the dimensions of the first connection line 22 in the second direction Y.
  • the third width is smaller than the fourth width.
  • the third width may be smaller than the first width.
  • the orthographic projections of the first connection lines 22 and the touch signal lines 42 on the base substrate 10 overlap.
  • the touch signal line 42 can be connected to the first connection line 22 through the first via K1 , so as to realize the touch signal line 42 and the corresponding touch sense. connection of the test block.
  • this embodiment does not limit this.
  • the first connection electrode 62 is located on the second transparent conductive layer.
  • the orthographic projection of the first connection electrode 62 on the base substrate 10 overlaps with the orthographic projection of the first connection line 22 on the base substrate 10
  • the orthographic projection of the first connection electrode 62 on the base substrate 10 overlaps with the touch
  • the orthographic projections of the electrodes 51 on the base substrate 10 also overlap.
  • the first connection electrodes 62 are electrically connected to the touch electrodes 51 and the first connection lines 22 through the third via holes K3 .
  • the first connection electrode 62 may be rectangular. However, this embodiment does not limit this. In this example, the electrical connection between the touch electrodes 51 and the first connection wires 22 is achieved through the first connection electrodes 62 , and the electrical connection between the plurality of touch electrodes 51 is achieved through the first connection wires 22 .
  • the second connection unit includes: a second connection electrode 63 and a third connection electrode 45 .
  • the third connection electrodes 45 may be located in the second conductive layer, and the third connection electrodes 45 may be located between the touch signal lines 42 and the adjacent second signal lines 41 .
  • the orthographic projection of the third connection electrode 45 on the base substrate 10 may overlap with the orthographic projection of the first signal line 21 on the base substrate 10 , or may overlap with the orthographic projection of the first connection line 22 on the base substrate 10 There is overlap.
  • the first signal line 21 has a fifth width at a position overlapping the third connection electrode 45, and the fifth width is smaller than the first width.
  • the fifth width is the dimension of the first connection line 21 along the second direction Y.
  • the fifth width may be less than or approximately equal to the second width.
  • the second connection electrode 63 may be located on the second transparent conductive layer.
  • the second connection electrodes 63 may be connected to the third connection electrodes 45 and the touch electrodes 51 through the fourth via holes K4 .
  • the third connection electrode 45 may extend from one sub-pixel area to another sub-pixel area in the second direction Y, and within a single sub-pixel area, the third connection electrode 45 and The electrical connection of the touch electrodes 51 realizes the electrical connection of adjacent touch electrode groups.
  • the touch sensing block is formed by using the first connection unit and the second connection unit to electrically connect the plurality of touch electrodes 51 spaced apart from each other, so that the touch sensing block has a network structure, so that the touch The control sensing block has smaller resistance.
  • the orthographic projection of the touch electrodes 51 located on the first transparent conductive layer on the base substrate 10 covers the touch signals Orthographic projection of line 42 on base substrate 10 . That is, in the opening area of the sub-pixel area, the touch electrodes 51 can shield the touch signal lines 42, so as to prevent the edges of the touch signal lines 42 from forming a messy electric field with the pixel electrodes 61 of the second transparent conductive layer, and avoid causing dark Field and pixel aperture ratio losses.
  • the array substrate further includes: a plurality of switching elements. At least one switch element is located between adjacent second signal lines 41 and touch signal lines 42 . At least one switch element and the third connection electrode 45 are located on opposite sides of the touch signal line 42 .
  • the switching element may be a thin film transistor (TFT, Thin Film Transistor).
  • the switching element may include a gate electrode, an active layer 31 , a first electrode 43 and a second electrode 44 .
  • the control electrode of the switching element can be integrated with the first signal line 21, that is, the overlapping region of the first signal line 21 and the active layer 31 can be used as the control electrode.
  • the first pole 43 of the switching element may be connected to the second signal line 42 , for example, may be integrally formed with the second signal line 42 .
  • the second electrode 44 of the switching element is electrically connected to the pixel electrode 61 .
  • the active layer 31 may include a channel region, a first doping region and a second doping region.
  • the channel region may not be doped with impurities and have semiconductor characteristics.
  • the first doped region and the second doped region may be on both sides of the channel region, and are doped with impurities and thus have conductivity. Impurities can vary depending on the type of transistor.
  • the array substrate in a plane perpendicular to the array substrate, includes: a first conductive layer, a semiconductor layer, a second conductive layer and a second conductive layer, which are sequentially arranged on the base substrate 10 layer, a first transparent conductive layer and a second transparent conductive layer.
  • a first insulating layer 11 is provided between the first conductive layer and the semiconductor layer
  • a second insulating layer 12 is provided between the second conductive layer and the first transparent conductive layer
  • the first transparent conductive layer and the second transparent conductive layer are provided
  • a third insulating layer 13 is provided therebetween.
  • the first insulating layer 11 and the third insulating layer 13 may be inorganic insulating layers
  • the second insulating layer 12 may be an organic insulating layer.
  • the technical solution of this embodiment is further described below with reference to FIGS. 2A to 3B through the preparation process of the array substrate of this exemplary embodiment.
  • the "patterning process” mentioned in this embodiment includes processes such as depositing a film layer, coating photoresist, mask exposure, developing, etching and stripping photoresist.
  • Deposition can be selected from any one or more of sputtering, evaporation, chemical vapor deposition, coating can be selected from any one or more of spray coating and spin coating, and etching can be selected from dry etching. and any one or more of wet engraving.
  • “Film” refers to a thin film made of a material on a substrate by a deposition or coating process.
  • the "thin film” may also be referred to as a "layer”. If the "thin film” needs a patterning process or a photolithography process in the whole manufacturing process, it is called a "thin film” before the patterning process, and a “layer” after the patterning process.
  • a “layer” after a patterning process or a photolithography process contains at least one "pattern”.
  • a and B are arranged in the same layer means that A and B are simultaneously formed through the same patterning process.
  • the same layer does not always mean that the thickness of the layer or the height of the layer is the same in the cross-sectional view.
  • the orthographic projection of A includes the orthographic projection of B means that the orthographic projection of B falls within the range of the orthographic projection of A, or the orthographic projection of A covers the orthographic projection of B.
  • the preparation process of the array substrate of this embodiment includes the following steps (1) to (7).
  • the base substrate 10 may be a transparent substrate, for example, a quartz substrate, a glass substrate, or an organic resin substrate. However, this embodiment does not limit this.
  • a first conductive film is deposited on the base substrate 10 , and the first conductive film is patterned through a patterning process to form a first conductive layer, as shown in FIG. 2B .
  • the first conductive layer includes: the control electrode of the switching element, the first signal line 21 and the first connection line 22 .
  • the control electrode of the switching element is integrated with the first signal line 21 .
  • the first signal lines 21 and the first connection lines 22 both extend along the first direction X, and are sequentially arranged along the second direction Y.
  • the first signal line 21 has a plurality of hollow parts 210 , and the plurality of hollow parts 210 are arranged in sequence along the first direction X. As shown in FIG.
  • the hollow portion 210 is an opening passing through the first signal line 21 .
  • the width of the first signal line 21 at the position overlapping with the second signal line 41 is smaller than the width at the position between two adjacent second signal lines 41 , which can reduce the difference between the first signal line 21 and the second signal line 41 .
  • the width of the first connection line 22 at the position overlapping with the second connection line 41 is smaller than the width of the position between two adjacent second signal lines 41 , which can reduce the difference between the first connection line 22 and the second signal line 41 . Overlap area to reduce the load on the array substrate.
  • a first insulating film and a semiconductor film are sequentially deposited on the base substrate 10 forming the aforementioned structure, and the semiconductor film is patterned through a patterning process to form a first insulating layer 11 and disposed on the first insulating layer
  • the semiconductor layer pattern on 11 is shown in FIG. 2C.
  • a plurality of first via holes K1 are formed on the first insulating layer 11 , and the first insulating layer 11 in the plurality of first via holes K1 is etched away to expose the surface of the first connection line 22 .
  • the semiconductor layer includes the active layer 31 of the switching element.
  • the active layer 31 may include: a channel region, a first doped region and a second doped region.
  • the channel region may not be doped with impurities and have semiconductor characteristics.
  • the first doped region and the second doped region may be on both sides of the channel region, and are doped with impurities and thus have conductivity. Impurities may vary depending on the type of transistor (eg, N-type or P-type).
  • the semiconductor thin film may use amorphous indium gallium zinc oxide (a-IGZO), zinc oxynitride (ZnON), indium zinc tin oxide (IZTO), amorphous silicon (a-Si), polycrystalline silicon (p One or more materials such as -Si), hexathiophene, polythiophene, etc., that is, the embodiments of the present disclosure are applicable to transistors manufactured based on oxide (Oxide) technology, silicon technology, and organic technology. However, this embodiment does not limit this.
  • a second conductive film is deposited on the base substrate 10 forming the aforementioned structure, and the second conductive film is patterned through a patterning process to form a second conductive layer, as shown in FIG. 2D .
  • the second conductive layer includes: a plurality of data lines 41 and a plurality of touch signal lines 42 , a first electrode 43 and a second electrode 44 of the switching element, and a third connection electrode 45 .
  • the plurality of data lines 41 and the plurality of touch signal lines 42 both extend along the second direction Y and are arranged along the first direction X at intervals.
  • Data signal lines 41 are arranged on both sides of the touch signal line 42 .
  • the switch element is located between the data signal line 41 and the adjacent touch signal line 42 .
  • the third connection electrodes 45 are arranged between the touch signal lines 42 and the adjacent data signal lines 41 , and the third connection electrodes 45 and the switching elements are located on opposite sides of one touch signal line 42 .
  • the first pole 43 of the switching element overlaps and is directly connected to the first doped region of the active layer 31
  • the second pole 44 overlaps and is directly connected to the second doped region of the active layer 31 .
  • the first pole 43 of the switching element and the adjacent data line 43 may be integrally formed.
  • the switch element is located between the data line 43 and the adjacent touch signal line 42 .
  • One end of the third connection electrode 45 is located in a sub-pixel region formed by the intersection of the first signal line 21 and the second signal line 41 , and the other end extends across the first signal line 21 and the first connection line 22 to another sub-pixel region Inside.
  • the second insulating film is coated on the base substrate on which the aforementioned structure is formed, and the second insulating layer 12 is formed by masking, exposing and developing the second insulating film.
  • the first transparent conductive layer includes: a plurality of touch electrodes 51 .
  • the touch electrodes 51 are located in the sub-pixel region, and can cover the opening region of the sub-pixel region.
  • the second insulating layer 12 may be an organic material such as polyimide, acrylic, or polyethylene terephthalate.
  • the thickness of the second insulating layer 12 may be about 1 to 3 microns.
  • the dielectric constant of the second insulating layer 12 may be 1/2 of that of the inorganic material SiNx.
  • this embodiment does not limit this.
  • by arranging the second insulating layer made of an organic material the capacitance between the touch signal line 42 and the touch electrode 51 of the first transparent conductive layer can be advantageously reduced.
  • the common electrodes are multiplexed as touch electrodes, and a common electrode signal is applied to the common electrodes in the display stage to realize the display function, and the touch signal is applied to the common electrodes in the touch stage to realize the touch function.
  • a common electrode signal is applied to the common electrodes in the display stage to realize the display function
  • the touch signal is applied to the common electrodes in the touch stage to realize the touch function.
  • a third insulating film is deposited on the base substrate 10 forming the aforementioned structure, and a pattern of the third insulating layer 13 is formed by patterning the third insulating film, as shown in FIG. 2F .
  • a plurality of second via holes K2 , a plurality of third via holes K3 and a plurality of fourth via holes K4 are formed on the third insulating layer 13 .
  • the third insulating layer 13 and the second insulating layer 12 in the plurality of second via holes K2 are etched away, exposing the surface of the second pole 44 of the switching element.
  • the at least one third via hole K3 includes a first half hole and a second half hole.
  • the third insulating layer 13, the second insulating layer 12 and the first insulating layer 11 in the first half hole are etched away, exposing the surface of the first connection line 22, and the third insulating layer 13 in the second half hole is etched away. It is etched away to expose the surface of the touch electrode 51 .
  • the at least one fourth via hole K4 includes a third half hole and a fourth half hole.
  • the third insulating layer 13 and the second insulating layer 12 in the third half hole are etched away, exposing the surface of the third connection line 45, and the third insulating layer 13 in the fourth half hole is etched away, exposing the surface The surface of the touch electrode 51 .
  • a second transparent conductive film is deposited on the base substrate 10 forming the aforementioned structure, and a second transparent conductive layer is formed by patterning the second transparent conductive film, as shown in FIG. 2A .
  • the second transparent conductive layer includes a plurality of pixel electrodes 61 , a first connection electrode 62 and a second connection electrode 63 .
  • the pixel electrode 61 is connected to the second pole 44 of the switching element through the second via hole K2.
  • the first connection electrode 62 is connected to the first connection line 22 through the first half hole of the third via hole K3 , and is connected to the touch electrode 51 through the second half hole of the third via hole K3 .
  • first connection electrodes 62 are electrically connected to the first connection lines 22 and the touch electrodes 51 through the third via holes.
  • the second connection electrode 63 is connected to the third connection electrode 45 through the third half hole of the fourth via hole K4 , and is connected to the touch electrode 51 through the fourth half hole of the fourth via hole K4 . That is, the second connection electrodes 63 are electrically connected to the touch electrodes 51 and the third connection electrodes 45 through the fourth via holes K4 .
  • connection electrode 45 One end of the third connection electrode 45 is connected to a touch electrode 51 in a touch electrode group through a second connection electrode 63 in a sub-pixel area, and the other end of the third connection electrode 45 is in another sub-pixel area
  • a second connection electrode 63 is connected to a touch electrode 51 in an adjacent touch electrode group of the aforementioned touch electrode group.
  • the connection between adjacent touch electrode groups can be realized through the second connection electrodes 63 and the third connection electrodes 45
  • the touch electrode groups can be realized through the first connection electrodes 62 and the first connection lines 33 . Connections between multiple touch electrodes within.
  • the pixel electrode 61 has a plurality of slits.
  • a plurality of slits penetrate the pixel electrode 61 .
  • the extending direction of the plurality of slits intersects the second direction Y.
  • the pixel electrode 61 has slits in two different directions, thereby forming a dual domain structure.
  • this embodiment does not limit this.
  • the pixel electrode may form a single-domain or multi-domain structure.
  • the first insulating layer 11 and the third insulating layer 13 may adopt any one or more of silicon oxide (SiOx), silicon nitride (SiNx), and silicon oxynitride (SiON). , which can be single layer, multi-layer or composite layer.
  • the first conductive thin film and the second conductive thin film may adopt a metal material such as any one or more of silver (Ag), copper (Cu), aluminum (Al), titanium (Ti), and molybdenum (Mo), or
  • the alloy materials of the above metals such as aluminum neodymium alloy (AlNd) or molybdenum niobium alloy (MoNb), can be a single-layer structure, or a multi-layer composite structure, such as Ti/Al/Ti and the like.
  • the first transparent conductive film and the second transparent conductive film can be made of transparent conductive materials such as indium tin oxide (ITO) or indium zinc oxide (IZO). However, this embodiment does not limit this.
  • the touch electrodes 51 are located between the base substrate 10 and the pixel electrodes 61 .
  • the touch electrodes 51 have a sheet-like electrode structure without slits, and each touch electrode 51 has a larger area, which is beneficial to enhance touch performance. Since the touch electrodes 51 are closer to the base substrate 10 and have a larger area, a double-sided touch mode can be realized. In other words, in the front touch mode, the touch object (for example, the user's finger) can be touched from the side of the base substrate 10 where the touch electrodes 51 are provided; in the back touch mode, the touch object can be touched from the substrate 10 . The side of the base substrate 10 that is not provided with the touch electrodes 51 is touched.
  • the structure of the display substrate and the manufacturing process of the display substrate according to the embodiments of the present disclosure are merely illustrative. In some exemplary embodiments, corresponding structures may be changed and patterning processes may be increased or decreased according to actual needs.
  • the touch electrodes located in the first transparent conductive layer can be directly electrically connected to the third connection electrodes in the second conductive layer through the via holes provided on the second insulating layer, so as to realize the electrical connection between the touch electrode groups. connect.
  • the first connection electrodes may be respectively connected to the first connection lines and the touch electrodes through two independent via holes. However, this embodiment does not limit this.
  • the aperture ratio loss area is only The touch signal line blocks the area, which is beneficial to improve the difficulty of routing and the limited aperture ratio of many touch signal lines.
  • the touch signal line is shielded by the first transparent conductive layer, so that the dark field and aperture ratio loss caused by the messy electric field can be avoided.
  • an organic insulating layer between the first transparent conductive layer and the touch signal line, the capacitance between the first transparent conductive layer and the touch signal line can be reduced.
  • FIG. 4A is another schematic top view of an array substrate according to at least one embodiment of the disclosure.
  • FIG. 4B is a top view of the array substrate after forming the second conductive layer in FIG. 4A .
  • FIG. 4C is a top view of the array substrate after the first transparent conductive layer is formed in FIG. 4A .
  • FIG. 4D is a top view of the array substrate after the third insulating layer is formed in FIG. 4A .
  • FIG. 5A is a schematic partial cross-sectional view along the P-P direction in FIG. 4A .
  • FIG. 5B is a schematic partial cross-sectional view along the R-R direction in FIG. 4A .
  • the illustration of this example illustrates three sub-pixel regions and partial structures of the remaining sub-pixel regions.
  • the array substrate in a plane perpendicular to the array substrate, includes: a first conductive layer, a semiconductor layer, a second conductive layer and a second conductive layer, which are sequentially arranged on the base substrate 10 . layer, a first transparent conductive layer and a second transparent conductive layer.
  • a first insulating layer 11 is provided between the first conductive layer and the semiconductor layer
  • a second insulating layer 12 is provided between the second conductive layer and the first transparent conductive layer
  • the first transparent conductive layer and the second transparent conductive layer are provided
  • a third insulating layer 13 is provided therebetween.
  • the first insulating layer 11 and the third insulating layer 13 may be inorganic insulating layers, and the second insulating layer 12 may be an organic insulating layer.
  • the first conductive layer includes a plurality of first signal lines 21 and a plurality of first connection lines 22 .
  • the semiconductor layer includes the active layer 31 of the switching element.
  • the second conductive layer includes: a plurality of second signal lines 41 , a plurality of touch signal lines 42 , a first pole 43 and a second pole 44 of the switching element.
  • the first transparent conductive layer includes: a plurality of pixel electrodes 52 .
  • the orthographic projection of the pixel electrode 52 on the base substrate 10 covers the orthographic projection of the touch signal line 42 on the base substrate 10, so as to shield the touch signal line 42 and avoid clutter
  • the electric field causes dark field and aperture ratio losses.
  • the second transparent conductive layer includes: a plurality of touch electrodes 64 , fourth connection electrodes 65 and second connection electrodes 66 .
  • a plurality of fifth via holes K5 and a plurality of sixth via holes K6 are opened on the third insulating layer 13 .
  • the at least one fifth via hole K5 includes a fifth half hole and a sixth half hole.
  • the third insulating layer 13 and the second insulating layer 12 in the fifth half-hole are etched away, exposing the second pole 44 of the switching element.
  • the third insulating layer 13 in the sixth half hole is etched away, exposing the pixel electrode 52 .
  • the fourth connection electrode 65 is connected to the second pole 44 of the switching element through the fifth half hole of the fifth via hole K5 , and is connected to the pixel electrode 52 through the sixth half hole of the fifth via hole K5 . That is, the fourth connection electrode 65 realizes the electrical connection between the pixel electrode 52 and the second electrode 44 of the switching element through the fifth via hole K5.
  • the third insulating layer 13 , the second insulating layer 12 and the first insulating layer 11 in the sixth via hole K6 are etched away to expose the surface of the first connection line 22 .
  • the touch electrodes 64 may be electrically connected to the first connection lines 22 through the sixth via holes K6.
  • the first connection electrodes and the touch electrodes 64 may have an integral structure.
  • the second connection electrodes 66 are integrally formed with two adjacent touch electrodes 64 to achieve electrical connection between adjacent touch electrode groups.
  • the pixel electrodes 52 are located between the base substrate 10 and the touch electrodes 64 .
  • the touch electrodes 64 have a plurality of slits. The extending direction of the plurality of slits intersects the second direction Y.
  • the touch electrodes 64 have slits in two different directions, thereby forming a dual-domain structure.
  • this embodiment does not limit this.
  • the touch electrodes can form a single-domain or multi-domain structure.
  • the aperture ratio loss area is only The touch signal line blocks the area, which is beneficial to improve the difficulty of routing and the limited aperture ratio of many touch signal lines.
  • the touch signal line is shielded by the first transparent conductive layer, so that the dark field and aperture ratio loss caused by the messy electric field can be avoided.
  • an organic insulating layer between the first transparent conductive layer and the touch signal line, the capacitance between the first transparent conductive layer and the touch signal line can be reduced.
  • At least one embodiment of the present disclosure further provides a method for preparing an array substrate, which is used for preparing the above-mentioned array substrate.
  • the above preparation method includes: forming a plurality of first signal lines, a plurality of second signal lines, a plurality of touch signal lines, a first transparent conductive layer and a second transparent conductive layer on a base substrate. Wherein, the first transparent conductive layer and the second transparent conductive layer are located on the side of the plurality of touch signal lines away from the base substrate.
  • the touch signal lines are connected with at least one touch sensing block, and the touch sensing block includes a plurality of touch electrodes connected to and spaced apart from each other.
  • the first transparent conductive layer or the second transparent conductive layer includes the plurality of touch electrodes.
  • a plurality of first signal lines and a plurality of second signal lines intersect to form a plurality of sub-pixel regions, and the sub-pixel regions include opening regions.
  • the touch signal line overlaps with the orthographic projection of the opening region of the at least one sub-pixel region on the base substrate.
  • forming a plurality of first signal lines, a plurality of second signal lines, a plurality of touch signal lines, a first transparent conductive layer and a second transparent conductive layer on the base substrate includes: The first conductive layer is formed on the base substrate; the second conductive layer is formed on the side of the first conductive layer away from the base substrate; the first transparent conductive layer and the the second transparent conductive layer.
  • the first conductive layer includes a plurality of first signal lines.
  • the second conductive layer includes: a plurality of second signal lines and a plurality of touch signal lines.
  • the first transparent conductive layer includes a plurality of touch electrodes, and the second transparent conductive layer includes a plurality of pixel electrodes; or, the first transparent conductive layer includes a plurality of pixel electrodes, and the second transparent conductive layer includes a plurality of touch electrodes.
  • At least one embodiment of the present disclosure further provides a touch display device including the above-mentioned array substrate.
  • the touch display device of this embodiment further includes: at least one first touch control circuit and at least one second touch control circuit.
  • the array substrate includes: a first touch area and a second touch area located on one side of the first touch area.
  • the first touch control circuit is located on the side of the first touch area away from the second touch area, and the first touch control circuit is connected to the touch sensing block in the first touch area through a touch signal line;
  • the second touch control circuit The touch control circuit is located on a side of the second touch area away from the first touch area, and the second touch control circuit is connected to the touch sensing block in the second touch area through a touch signal line.
  • the touch display device includes: an array substrate, a first touch control circuit 703 , and a second touch control circuit 704 .
  • the array substrate includes: a first touch area 700a and a second touch area 700b located on one side of the first touch area 700a.
  • the first touch area 700a is the upper half touch area of the touch display device
  • the second touch area 700b is the lower half touch area of the touch display device.
  • the first touch control circuit 703 is located on the side of the first touch area 700a away from the second touch area 700b.
  • the first touch control circuit 703 uses the touch signal line 702 and the touch sense in the first touch area 700a.
  • Block 701 is connected.
  • the second touch control circuit 704 is located on the side of the second touch area 700b away from the first touch area 700a.
  • the second touch control circuit 704 is connected to the touch sensing block 701 in the second touch area 700b through the touch signal line 702 .
  • the first touch control circuit and the second touch control circuit may both be touch and display driver integration (TDDI, Touch and Display Driver Integration) circuits.
  • the touch display device may include: an array substrate, an opposite substrate, and a liquid crystal layer disposed between the array substrate and the opposite substrate.
  • the pixel electrodes and common electrodes (multiplexed as touch electrodes) included in the array substrate are used to generate an electric field for controlling the deflection of liquid crystal molecules in the liquid crystal layer.
  • the opposing substrate may include a base substrate, and a black matrix disposed on the base substrate. However, this embodiment does not limit this.
  • the touch display device may be any product with touch and display functions, such as liquid crystal panel, electronic paper, mobile phone, tablet computer, television, monitor, notebook computer, digital photo frame, navigator, etc. part.
  • the touch display device provided in this embodiment adopts the double-side driving method.
  • the load of the touch signal line includes resistance and capacitance, and the resistance of the touch signal line is proportional to the length of the touch signal line.
  • the maximum length of the touch signal line from the touch control circuit is, for example, L.
  • the maximum length of the touch signal line from the touch control circuit can be L/2, so that the resistance of the touch signal line is reduced by 50%.
  • the touch display device requires M/N touch control circuits .
  • M/N touch control circuits should be evenly arranged on one side, while in the bilateral driving mode of this embodiment, M/N touch control circuits can be arranged On both sides of the touch area, for example, only M/2N touch control circuits need to be arranged on each side.
  • M/2N first touch control circuits are arranged on the side of the first touch area away from the second touch area, and M/2N first touch control circuits are arranged at the side of the second touch area away from the first touch area. M/2N second touch control circuits. In this way, the difficulty of fan-out routing of the touch signal lines can be reduced.
  • the shape of each touch sensing block is close to a square, for example, the side length is about 6.5 mm to 7.0 mm, then the entire touch display
  • the device may include about 45,000 touch sensing blocks, that is, 45,000 touch signal lines need to be drawn.
  • the touch display device provided in this embodiment can improve the difficulty of routing and the limited pixel aperture ratio caused by the large number of touch signal lines.

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Abstract

一种阵列基板，包括：衬底基板、设置在衬底基板上的多个第一信号线、多个第二信号线、多个触控信号线、第一透明导电层和第二透明导电层。第一透明导电层和第二透明导电层位于触控信号线远离衬底基板的一侧。触控信号线与至少一个触控感测块连接，触控感测块包括彼此连接且间隔开的多个触控电极，第一透明导电层或第二透明导电层包括所述多个触控电极。多个第一信号线和多个第二信号线交叉形成多个子像素区域，子像素区域包括开口区域。触控信号线与至少一个子像素区域的开口区域在衬底基板上的正投影存在交叠。

Description

阵列基板及其制备方法、触控显示装置
本申请要求于2021年3月5日提交中国专利局、申请号为202110247058.6、发明名称为“阵列基板及其制备方法、触控显示装置”的中国专利申请的优先权，其内容应理解为通过引用的方式并入本申请中。
技术领域
本文涉及但不限于显示技术领域，尤指一种阵列基板及其制备方法、触控显示装置。
背景技术
触控屏在我们身边随处可见。触控屏节省了空间便于携带，还有更好的人机交互性。在各类触控屏中，电容式触控屏具有较强的灵敏度、可实现多点触控等优点而被广泛应用。为了减小面板厚度，内嵌式(In cell)触控结构受到了广泛关注，内嵌式触控结构包括自电容触控和互电容触控两种方式。内嵌式触控屏具有较高的集成度、更加轻薄，因此具有广泛的应用前景。
发明内容
以下是对本文详细描述的主题的概述。本概述并非是为了限制权利要求的保护范围。
本公开实施例提供了一种阵列基板及其制备方法、触控显示装置。
一方面，本公开实施例提供一种阵列基板，包括：衬底基板、设置在所述衬底基板上的多个第一信号线、多个第二信号线、多个触控信号线、第一透明导电层和第二透明导电层。所述第一透明导电层和第二透明导电层位于所述多个触控信号线远离所述衬底基板的一侧。所述触控信号线与至少一个触控感测块连接，所述触控感测块包括彼此连接且间隔开的多个触控电极，所述第一透明导电层或第二透明导电层包括所述多个触控电极。所述多个第一信号线和多个第二信号线交叉形成多个子像素区域，所述子像素区域包括 开口区域；所述触控信号线与至少一个子像素区域的开口区域在所述衬底基板上的正投影存在交叠。
在一些示例性实施方式中，所述多个触控信号线与多个第二信号线为同层结构，所述多个触控信号线沿着所述多个第二信号线的延伸方向延伸。
在一些示例性实施方式中，所述第一透明导电层位于所述第二透明导电层靠近所述衬底基板的一侧。在所述子像素区域内，所述第一透明导电层在所述衬底基板上的正投影覆盖所述触控信号线在所述衬底基板上的正投影。
在一些示例性实施方式中，所述触控信号线所在膜层与所述第一透明导电层之间设置有机绝缘层。
在一些示例性实施方式中，所述有机绝缘层的厚度约为1微米至3微米。
在一些示例性实施方式中，所述第一透明导电层包括：多个触控电极，所述第二透明导电层包括：多个像素电极；或者，所述第一透明导电层包括：多个像素电极，所述第二透明导电层包括：多个触控电极。
在一些示例性实施方式中，位于所述第二透明导电层的触控电极或像素电极具有多个缝隙，所述缝隙的延伸方向与所述触控信号线的延伸方向交叉。
在一些示例性实施方式中，至少一个触控感测块包括：依次排列的多个触控电极组；至少一个触控电极组包括：间隔开的多个触控电极以及电连接所述多个触控电极的第一连接单元。所述触控感测块还包括：位于相邻的触控电极组之间且电连接相邻的触控电极组的第二连接单元。
在一些示例性实施方式中，所述第一连接单元包括：第一连接线和第一连接电极。所述第一连接线与所述第一信号线为同层结构，所述第一连接电极位于所述第二透明导电层，所述第一连接电极配置为连接所述第一连接线与所述触控电极。
在一些示例性实施方式中，所述第二连接单元包括：第二连接电极；所述第二连接电极位于所述第二透明导电层。
在一些示例性实施方式中，所述第二连接单元还包括：第三连接电极；所述第三连接电极与所述触控信号线为同层结构，所述第二连接电极配置为连接相邻的触控电极组和第三连接电极。
在一些示例性实施方式中，所述阵列基板还包括：位于所述衬底基板上的多个开关元件，至少一个开关元件位于相邻的第二信号线和触控信号线之间。
另一方面，本公开实施例提供一种触控显示装置，包括如上所述的阵列基板。
在一些示例性实施方式中，所述触控显示装置还包括：至少一个第一触控控制电路和至少一个第二触控控制电路。所述阵列基板包括：第一触控区域和位于所述第一触控区域一侧的第二触控区域；所述第一触控控制电路位于所述第一触控区域远离所述第二触控区域的一侧，所述第一触控控制电路通过触控信号线与所述第一触控区域内的触控感测块连接；所述第二触控控制电路位于所述第二触控区域远离所述第一触控区域的一侧，所述第二触控控制电路通过触控信号线与所述第二触控区域内的触控感测块连接。
另一方面，本公开实施例提供一种阵列基板的制备方法，用于制备如上所述的阵列基板，所述制备方法包括：在所述衬底基板上形成多个第一信号线、多个第二信号线、多个触控信号线、第一透明导电层以及第二透明导电层。其中，所述第一透明导电层和第二透明导电层位于所述多个触控信号线远离所述衬底基板的一侧。所述触控信号线与至少一个触控感测块连接，所述触控感测块包括彼此连接且间隔开的多个触控电极，所述第一透明导电层或第二透明导电层包括所述多个触控电极。所述多个第一信号线和多个第二信号线交叉形成多个子像素区域，所述子像素区域包括开口区域；所述触控信号线与至少一个子像素区域的开口区域在所述衬底基板上的正投影存在交叠。
在一些示例性实施方式中，所述在所述衬底基板上形成多个第一信号线、多个第二信号线、多个触控信号线、第一透明导电层以及第二透明导电层，包括：在所述衬底基板上形成第一导电层，所述第一导电层包括多个第一信号线；在所述第一导电层远离所述衬底基板的一侧形成第二导电层，所述第二导电层包括：多个第二信号线和多个触控信号线；在所述第二导电层远离所述衬底基板的一侧依次形成第一透明导电层和第二透明导电层。所述第一透明导电层包括多个触控电极，所述第二透明导电层包括多个像素电极，或 者，所述第一透明导电层包括多个像素电极，所述第二透明导电层包括多个触控电极。
在阅读并理解了附图和详细描述后，可以明白其他方面。
附图说明
附图用来提供对本公开技术方案的进一步理解，并且构成说明书的一部分，与本公开的实施例一起用于解释本公开的技术方案，并不构成对本公开的技术方案的限制。附图中一个或多个部件的形状和大小不反映真实比例，目的只是示意说明本公开内容。
图1为一种触控显示装置的触控结构的示意图；
图2A为本公开至少一实施例的阵列基板的俯视示意图；
图2B为图2A中形成第一导电层后的阵列基板的俯视示意图；
图2C为图2A中形成半导体层后的阵列基板的俯视示意图；
图2D为图2A中形成第二导电层后的阵列基板的俯视示意图；
图2E为图2A中形成第一透明导电层后的阵列基板的俯视示意图；
图2F为图2A中形成第三绝缘层后的阵列基板的俯视示意图；
图3A为图2A中沿P-P方向的局部剖面示意图；
图3B为图2A中沿Q-Q方向的局部剖面示意图；
图4A为本公开至少一实施例的阵列基板的另一俯视示意图；
图4B为图4A中形成第二导电层后的阵列基板的俯视示意图；
图4C为图4A中形成第一透明导电层后的阵列基板的俯视示意图；
图4D为图4A中形成第三绝缘层后的阵列基板的俯视示意图；
图5A为图4A中沿P-P方向的局部剖面示意图；
图5B为图4A中沿R-R方向的局部剖面示意图；
图6为本公开至少一实施例的触控显示装置的触控结构的示意图。
具体实施方式
下面将结合附图对本公开的实施例进行详细说明。实施方式可以以多个不同形式来实施。所属技术领域的普通技术人员可以很容易地理解一个事实，就是方式和内容可以在不脱离本公开的宗旨及其范围的条件下被变换为一种或多种形式。因此，本公开不应该被解释为仅限定在下面的实施方式所记载的内容中。在不冲突的情况下，本公开中的实施例及实施例中的特征可以相互任意组合。
在附图中，有时为了明确起见，夸大表示了一个或多个构成要素的大小、层的厚度或区域。因此，本公开的一个方式并不一定限定于该尺寸，附图中多个部件的形状和大小不反映真实比例。此外，附图示意性地示出了理想的例子，本公开的一个方式不局限于附图所示的形状或数值等。
本公开中的“第一”、“第二”、“第三”等序数词是为了避免构成要素的混同而设置，而不是为了在数量方面上进行限定的。本公开中的“多个”表示两个或两个以上的数量。
在本公开中，为了方便起见，使用“中部”、“上”、“下”、“前”、“后”、“竖直”、“水平”、“顶”、“底”、“内”、“外”等指示方位或位置关系的词句以参照附图说明构成要素的位置关系，仅是为了便于描述本说明书和简化描述，而不是指示或暗示所指的装置或元件必须具有特定的方位、以特定的方位构造和操作，因此不能理解为对本公开的限制。构成要素的位置关系根据描述构成要素的方向适当地改变。因此，不局限于在说明书中说明的词句，根据情况可以适当地更换。
在本公开中，除非另有明确的规定和限定，术语“安装”、“相连”、“连接”应做广义理解。例如，可以是固定连接，或可拆卸连接，或一体地连接；可以是机械连接，或电连接；可以是直接相连，或通过中间件间接相连，或两个元件内部的连通。对于本领域的普通技术人员而言，可以根据情况理解上述术语在本公开中的含义。
在本公开中，晶体管是指至少包括栅电极、漏电极以及源电极这三个端子的元件。晶体管在漏电极(漏电极端子、漏区域或漏极)与源电极(源电极端子、源区域或源极)之间具有沟道区域，并且电流能够流过漏电极、沟 道区域以及源电极。在本公开中，沟道区域是指电流主要流过的区域。
在本公开中，为区分晶体管除栅电极之外的两极，将其中一个电极称为第一极，另一电极称为第二极，第一极可以为源电极或者漏电极，第二极可以为漏电极或源电极，另外，将晶体管的栅电极称为控制极。在使用极性相反的晶体管的情况或电路工作中的电流方向变化的情况等下，“源电极”及“漏电极”的功能有时互相调换。因此，在本公开中，“源电极”和“漏电极”可以互相调换。
在本公开中，“电连接”包括构成要素通过具有某种电作用的元件连接在一起的情况。“具有某种电作用的元件”只要可以进行连接的构成要素间的电信号的传输，就对其没有特别的限制。“具有某种电作用的元件”的例子不仅包括电极和布线，而且还包括晶体管等开关元件、电阻器、电感器、电容器、其它具有一种或多种功能的元件等。
在本公开中，“平行”是指两条直线形成的角度为-10°以上且10°以下的状态，因此，可以包括该角度为-5°以上且5°以下的状态。另外，“垂直”是指两条直线形成的角度为80°以上且100°以下的状态，因此，可以包括85°以上且95°以下的角度的状态。
本公开中的“约”、“大致”，是指不严格限定界限，允许工艺和测量误差范围内的情况。
图1为一种触控显示装置的触控结构示意图。图1所示的触控显示装置可以为采用自电容式触控技术的内嵌式触控显示装置。如图1所示，在内嵌式触控显示装置中，触控结构包括阵列排列的多个触控感测块(作为自电容电极)101、以及分别与触控感测块101电连接的触控信号线102。图1中的黑色圆点表示电连接。触控控制电路103位于触控显示装置的触控区域100的一侧。触控信号线102将触控感测块101电连接至触控控制电路103。在进行触控时，触摸物(例如，人的手指)触碰触控显示装置，位于触摸点处的触控感测块101的电容会发生变化，触控控制电路103通过检测触控感测块101的自电容变化情况来确定触摸位置。
由于每个触控感测块都要连接触控信号线，多个触控信号线都要连接到触控控制电路。当触控信号线的数量较多时，存在走线困难和负载大的问题。 而且，触控信号线的走线还会对像素开口率产生影响。在一些实施例中，当图1所示的触控结构应用于大尺寸触控显示装置(例如，8K分辨率的触控显示设备)时，触控感测块和触控信号线的数据都较多，导致触控显示装置的负载较大，会影响触控显示装置的性能。而且，数量较多的触控信号线连接触控控制电路，会造成扇出走线困难，并影响像素开口率。
本公开至少一实施例提供一种阵列基板，包括：衬底基板、设置在衬底基板上的多个第一信号线、多个第二信号线、多个触控信号线、第一透明导电层以及第二透明导电层。第一透明导电层和第二透明导电层位于多个触控信号线远离衬底基板的一侧。触控信号线与至少一个触控感测块连接，触控感测块包括彼此连接且间隔开的多个触控电极，第一透明导电层或第二透明导电层包括所述多个触控电极。多个第一信号线和多个第二信号线交叉形成多个子像素区域。子像素区域包括开口区域。触控信号线与至少一个子像素区域的开口区域在衬底基板上的正投影存在交叠。
本实施例提供的阵列基板，通过设置触控信号线与子像素区域的开口区域在衬底基板上的正投影存在交叠，方便触控信号线的走线排布。而且，通过将触控信号线设置在第一透明导电层和第二透明导电层靠近衬底基板的一侧，可以提高像素开口率。
在一些示例性实施方式中，本实施例的阵列基板可以采用自电容式触控技术。阵列基板包括像素电极和公共电极，公共电极被复用为触控电极。在显示阶段，通过触控信号线给公共电极提供公共电极信号，以实现显示功能；在触控阶段，利用触控信号线传输公共电极检测到的触控信号，以实现触控功能。在一些示例中，每个触控感测块可以包括多个被复用为触控电极的公共电极，例如可以包括几十乘以几十个子像素的公共电极。与触控感测块连接的触控信号线可以连接到集成显示和触控功能的驱动集成电路上。
在一些示例性实施方式中，包括本实施例的阵列基板的触控显示装置可以为液晶显示装置。触控显示装置可以包括本实施例的阵列基板、对置基板以及设置在阵列基板和对置基板之间的液晶层。在一些示例中，触控显示装置可以为高级超维场开关(ADS，Advanced Super Dimension Switch)类型的显示装置，或者，可以为高开口率高级超维场开关(HADS，High-Advanced  Dimension Switch)类型的触控显示装置。阵列基板包括的像素电极和公共电极用于产生控制液晶层中液晶分子偏转的电场。然而，本实施例对此并不限定。
在一些示例性实施方式中，多个触控信号线与多个第二信号线为同层结构，多个触控信号线沿着多个第二信号线的延伸方向延伸。在一些示例中，第二信号线为数据线，第一信号线为栅线。然而，本实施例对此并不限定。例如，第二信号线为栅线，第一信号线为数据线。本示例性实施方式中，通过设置触控信号线与第二信号线为同层结构，可以方便触控信号线的排布。
在一些示例性实施方式中，第一透明导电层位于第二透明导电层靠近衬底基板的一侧。在子像素区域内，第一透明导电层在衬底基板上的正投影覆盖触控信号线在衬底基板上的正投影。在本示例性实施方式中，在子像素区域内，利用第一透明导电层对触控信号线进行遮蔽，可以提高像素开口率和透过率。
在一些示例性实施方式中，触控信号线所在膜层与第一透明导电层之间设置有机绝缘层。本示例性实施方式中，通过在触控信号线所在膜层和第一透明导电层之间设置有机绝缘层，可以降低触控信号线与第一透明导电层之间的电容。
在一些示例性实施方式中，有机绝缘层的厚度约为1微米至3微米。例如，有机绝缘层的厚度可以约为1微米，或2微米。然而，本实施例对此并不限定。
在一些示例性实施方式中，第一透明导电层包括：多个触控电极，第二透明导电层包括：多个像素电极；或者，第一透明导电层包括：多个像素电极，第二透明导电层包括：多个触控电极。然而，本实施例对此并不限定。
在一些示例性实施方式中，位于第二透明导电层的触控电极或像素电极具有多个缝隙，缝隙的延伸方向与触控信号线的延伸方向交叉。
在一些示例性实施方式中，至少一个触控感测块包括：依次排列的多个触控电极组。至少一个触控电极组包括：间隔开的多个触控电极以及电连接多个触控电极的第一连接单元。触控感测块还包括：位于相邻的触控电极组 之间且电连接相邻的触控电极组的第二连接单元。在本示例性实施方式中，多个触控电极连接形成触控电极组，多个触控电极组连接形成触控感测块。例如，一个触控电极组可以包括与一个像素单元的多个子像素对应的触控电极。然而，本实施例对此并不限定。
在一些示例性实施方式中，第一连接单元包括：第一连接线和第一连接电极。第一连接线与第一信号线为同层结构，第一连接电极位于第二透明导电层，第一连接电极配置为连接第一连接线与触控电极。在一些示例中，第一连接线可以与栅线为同层结构，且具有相同的延伸方向。在一些示例中，触控电极位于第二透明导电层，第一连接电极与触控电极可以为一体结构。在一些示例中，触控电极位于第一透明导电层，位于第二透明导电层的第一连接电极可以连接第一连接线和触控电极。然而，本实施例对此并不限定。
在一些示例性实施方式中，第二连接单元包括：第二连接电极；第二连接电极位于第二透明导电层。在一些示例中，触控电极位于第二透明导电层，第二连接可以与触控电极为一体结构。然而，本实施例对此并不限定。
在一些示例性实施方式中，第二连接单元包括：第二连接电极和第三连接电极。第二连接电极位于第二透明导电层。第三连接电极与触控信号线为同层结构，第二连接电极配置为连接相邻的触控电极组和第三连接电极。
在一些示例性实施方式中，阵列基板还包括：位于衬底基板上的多个开关元件，至少一个开关元件位于相邻的第二信号线和触控信号线之间。在一些示例中，开关元件为晶体管。开关元件可以包括控制极、有源层、第一极和第二极。开关元件的控制极可以与栅线连接，第一极与数据线连接，第二极与像素电极连接。开关元件配置为在栅线的控制下，向像素电极提供数据线的信号。
下面通过多个示例对本实施例的方案进行举例说明。以本示例性实施例提供的阵列基板包括在ADS类型且采用自电容触控技术的触控显示装置为例进行说明。例如，触控显示装置可以包括本示例性实施例提供的阵列基板、对置基板、以及设置在阵列基板和对置基板之间的液晶层。阵列基板包括的像素电极和公共电极可以产生控制液晶层中液晶分子偏转的电场。对置基板可以至少包括衬底基板以及黑矩阵。
图2A为本公开至少一实施例的阵列基板的俯视示意图。图2B为图2A中形成第一导电层后的阵列基板的俯视示意图。图2C为图2A中形成半导体层后的阵列基板的俯视示意图。图2D为图2A中形成第二导电层后的阵列基板的俯视示意图。图2E为图2A中形成第一透明导电层后的阵列基板的俯视示意图。图2F为图2A中形成第三绝缘层后的阵列基板的俯视示意图。图3A为图2A中沿P-P方向的局部剖面示意图。图3B为图2A中沿Q-Q方向的局部剖面示意图。本示例的图示中示意了三个子像素区域以及其余子像素区域的部分结构。
在一些示例性实施方式中，如图2A至图3B所示，阵列基板包括：衬底基板10以及设置在衬底基板10上的多个第一信号线21和多个第二信号线41。多个第一信号线21位于第一导电层，沿第一方向X延伸，并沿不同于第一方向X的第二方向Y依次排列。多个第二信号线41位于第二导电层，沿第二方向Y延伸，并沿第一方向X依次排列。第一方向X与第二方向Y交叉，例如，第一方向X与第二方向Y相互垂直。第二导电层位于第一导电层远离衬底基板10的一侧。多条第一信号线21和多条第二信号线41交叉形成多个子像素区域。相邻的第一信号线21和相邻的第二信号线41相互交叉限定的区域为子像素区域。子像素区域包括开口区域和围绕开口区域的非开口区域。在一些示例中，非开口区域为被阵列基板的对置基板的黑矩阵遮挡的区域，开口区域为未被黑矩阵遮挡的区域。相邻的第一信号线21和第二信号线41都位于非开口区域中。在一些示例中，本实施例的阵列基板用于实现显示功能，每个子像素区域的开口区域配置于进行显示，非开口区域围绕开口区域且不进行显示。然而，本实施例对此并不限定。在一些示例中，阵列基板可以用于实现其他功能。
在一些示例性实施方式中，如图2A至图3B所示，第二信号线41在衬底基板10上的正投影与第一信号线21在衬底基板10上的正投影相交。例如，第一信号线21在与第二信号线41交叠的位置处具有第一宽度，第一信号线21在相邻的第二信号线41之间的位置处具有第二宽度。第一宽度和第二宽度均为第一信号线21在第二方向Y上的尺寸。第一宽度小于第二宽度。通过使第一信号线21在与第二信号线41交叠的位置处具有较小的宽度，有利 于减小第一信号线21和第二信号线41的交叠面积，以减小阵列基板的负载。
在一些示例性实施方式中，第一信号线21可以为栅线，第二信号线22可以为数据线。然而，本实施例对此并不限定。例如，第一信号线可以为数据线，第二数据线可以为栅线。
在一些示例性实施方式中，如图2A所示，阵列基板还包括多个触控信号线42和多个触控感测块。在一些示例中，多个触控感测块和多个触控信号线42一一对应连接。然而，本实施例对此并不限定。
在一些示例性实施方式中，如图2A至图3B所示，多个触控信号线42沿第二信号线41的延伸方向(即第二方向Y)延伸，并沿着第一信号线21的延伸方向(即第一方向X)依次排列。一个触控信号线42在衬底基板10上的正投影位于相邻两个第二信号线41在衬底基板10上的正投影之间。多个触控信号线42可以位于第二导电层中，与多个第二信号线41为同层结构。如图2A所示，触控信号线42位于与触控信号线42相邻的两个第二信号线41的中间。例如，触控信号线42与两侧相邻的第二信号线41之间的间距可以大致相同。通过将触控信号线42设置在两侧相邻第二信号线41的中间，可以减小第二信号线41两侧的电场之间的差异，有利于避免触控信号线42影响显示效果。
在一些示例性实施方式中，如图2A至图3B所示，第一信号线21具有多个镂空部210。多个镂空部210沿第一方向X排布。触控信号线42在衬底基板10上的正投影与第一信号线21的镂空部210在衬底基板10上的正投影存在交叠。镂空部210为贯穿第一信号线21的开口。通过设置镂空部210，可以减小触控信号线42与第一信号线21的交叠面积，从而减小阵列基板的负载。在一些示例中，镂空部210沿第一方向X上的长度大于触控信号线42沿第一方向X的长度。例如，镂空部210可以为矩形。然而，本实施例对此并不限定。
在一些示例性实施方式中，如图2A至图3B所示，触控信号线42与子像素区域的开口区域在衬底基板10上的正投影存在交叠。子像素区域的开口区域设置有像素电极61和触控电极51。触控电极51被复用为公共电极。在显示阶段，触控电极51作为公共电极，被施加公共电极信号。相互隔离的多 个触控电极51彼此连接形成一个触控感测块。例如，多个子像素区域内的彼此隔离的触控电极51可以彼此连接形成一个触控感测块。
在一些示例性实施方式中，触控感测块可以包括：依次排列的多个触控电极组、以及位于相邻的触控电极组之间且电连接相邻的触控电极组的第二连接单元。至少一个触控电极组包括：间隔开的多个触控电极51以及电连接多个触控电极51的第一连接单元。在一些示例中，以一个像素单元包括三个子像素为例，设置在一个像素单元的三个子像素区域内的触控电极51可以连接形成一个触控电极组。然而，本实施例对于一个触控电极组包括的触控电极的数目并不限定。
在一些示例性实施方式中，如图2A至图2D所示，第一连接单元包括：第一连接线22和第一连接电极62。第一连接线22与第一信号线21同层设置，且第一连接线22沿着第一信号线21的延伸方向(即第一方向X)延伸。第一连接线22在衬底基板上的正投影与第二信号线41在衬底基板10上的正投影相交。例如，第一连接线22在与第二信号线41交叠的位置处具有第三宽度，第一连接线22在相邻的第二信号线41之间的位置处具有第四宽度。第三宽度和第四宽度均为第一连接线22在第二方向Y上的尺寸。第三宽度小于第四宽度。通过使第一连接线22在与第二信号线41交叠的位置处具有较小的宽度，有利于减小第一连接线22和第二信号线41的交叠面积，以减小阵列基板的负载。在一些示例中，第三宽度可以小于第一宽度。
在一些示例性实施方式中，如图2A和图2D所示，第一连接线22与触控信号线42在衬底基板10上的正投影交叠。在第一连接线22与触控信号线42的交叠位置，触控信号线42可以通过第一过孔K1与第一连接线22连接，以实现触控信号线42与对应的触控感测块的连接。然而，本实施例对此并不限定。
在一些示例性实施方式中，如图2A所示，第一连接电极62位于第二透明导电层。第一连接电极62在衬底基板10上的正投影与第一连接线22在衬底基板10上的正投影存在交叠，第一连接电极62在衬底基板10上的正投影与触控电极51在衬底基板10上的正投影也存在交叠。第一连接电极62通过第三过孔K3与触控电极51和第一连接线22电连接。在一些示例中，第一 连接电极62可以为矩形。然而，本实施例对此并不限定。本示例中，通过第一连接电极62实现触控电极51与第一连接线22之间的电连接，通过第一连接线22实现多个触控电极51之间的电连接。
在一些示例性实施方式中，如图2A至图2D所示，第二连接单元包括：第二连接电极63和第三连接电极45。第三连接电极45可以位于第二导电层，第三连接电极45可以位于触控信号线42和相邻的第二信号线41之间。第三连接电极45在衬底基板10上的正投影可以与第一信号线21在衬底基板10上的正投影交叠，也可以与第一连接线22在衬底基板10上的正投影存在交叠。第一信号线21在与第三连接电极45交叠的位置处具有第五宽度，第五宽度小于第一宽度。第五宽度为第一连接线21沿第二方向Y上的尺寸。例如，第五宽度可以小于或约等于第二宽度。然而，本实施例对此并不限定。第二连接电极63可以位于第二透明导电层。第二连接电极63可以通过第四过孔K4与第三连接电极45和触控电极51连接。在本示例中，第三连接电极45可以在第二方向Y上从一个子像素区域延伸到另一个子像素区域，在单个子像素区域内，通过第二连接电极63实现第三连接电极45和触控电极51的电连接，从而实现相邻的触控电极组的电连接。在本示例中，利用第一连接单元和第二连接单元电连接彼此隔开的多个触控电极51的方式形成触控感测块，使得触控感测块具有网络状结构，从而使得触控感测块具有较小的电阻。
在一些示例性实施方式中，如图2A至图2E所示，在子像素区域的开口区域内，位于第一透明导电层的触控电极51在衬底基板10上的正投影覆盖触控信号线42在衬底基板10上的正投影。即，在子像素区域的开口区域内，触控电极51可以将触控信号线42屏蔽，从而避免触控信号线42的边缘与第二透明导电层的像素电极61形成凌乱电场，避免造成暗场和像素开口率损失。
在一些示例性实施方式中，如图2A所示，阵列基板还包括：多个开关元件。至少一个开关元件位于相邻的第二信号线41和触控信号线42之间。至少一个开关元件与第三连接电极45位于触控信号线42的相对两侧。开关元件可以为薄膜晶体管(TFT，Thin Film Transistor)。开关元件可以包括控制极、有源层31、第一极43和第二极44。开关元件的控制极可以与第一信 号线21为一体结构，即第一信号线21的与有源层31的交叠区域可以作为控制极。开关元件的第一极43可以与第二信号线42连接，例如可以与第二信号线42为一体结构。开关元件的第二极44电连接像素电极61。有源层31可以包括沟道区、第一掺杂区和第二掺杂区。沟道区可以不掺杂杂质，并具有半导体特性。第一掺杂区和第二掺杂区可以在沟道区的两侧，并且掺杂有杂质，并因此具有导电性。杂质可以根据晶体管的类型而变化。
在一些示例性实施方式中，如图3A和图3B所示，在垂直于阵列基板的平面内，阵列基板包括：依次设置在衬底基板10上的第一导电层、半导体层、第二导电层、第一透明导电层和第二透明导电层。其中，第一导电层和半导体层之间设置有第一绝缘层11，第二导电层与第一透明导电层之间设置有第二绝缘层12，第一透明导电层与第二透明导电层之间设置有第三绝缘层13。在一些示例中，第一绝缘层11和第三绝缘层13可以为无机绝缘层，第二绝缘层12可以为有机绝缘层。
下面参照图2A至图3B通过本示例性实施例的阵列基板的制备过程进一步说明本实施例的技术方案。本实施例中所说的“构图工艺”包括沉积膜层、涂覆光刻胶、掩模曝光、显影、刻蚀和剥离光刻胶等处理。沉积可以采用选自溅射、蒸镀、化学气相沉积中的任意一种或多种，涂覆可以采用选自喷涂和旋涂中的任意一种或多种，刻蚀可以采用选自干刻和湿刻中的任意一种或多种。“薄膜”是指将某一种材料在基底上利用沉积或涂覆工艺制作出的一层薄膜。若在整个制作过程当中该“薄膜”无需构图工艺或光刻工艺，则该“薄膜”还可以称为“层”。若在整个制作过程当中该“薄膜”还需构图工艺或光刻工艺，则在构图工艺前称为“薄膜”，构图工艺后称为“层”。经过构图工艺或光刻工艺后的“层”中包含至少一个“图案”。
本公开中所说的“A和B同层设置”是指，A和B通过同一次构图工艺同时形成。“相同层”不总是意味着层的厚度或层的高度在截面图中是相同的。“A的正投影包含B的正投影”是指，B的正投影落入A的正投影范围内，或者A的正投影覆盖B的正投影。
本实施例的阵列基板的制备过程包括以下步骤(1)至步骤(7)。
(1)、提供衬底基板。
在一些示例性实施方式中，衬底基板10可以为透明基底，例如，石英基底、玻璃基底或有机树脂基底。然而，本实施例对此并不限定。
(2)、形成第一导电层。
在一些示例性实施方式中，在衬底基板10上沉积第一导电薄膜，通过构图工艺对第一导电薄膜进行构图，形成第一导电层，如图2B所示。第一导电层包括：开关元件的控制极、第一信号线21和第一连接线22。开关元件的控制极与第一信号线21为一体结构。第一信号线21和第一连接线22均沿第一方向X延伸，并沿着第二方向Y依次排布。在一些示例中，第一信号线21具有多个镂空部210，多个镂空部210沿第一方向X依次排布。镂空部210为贯穿第一信号线21的开口。通过设置镂空部210可以减小第一信号线21与触控信号线42的交叠面积，以减小阵列基板的负载。第一信号线21在与第二信号线41交叠位置处的宽度小于两个相邻第二信号线41之间位置处的宽度，可以减小第一信号线21与第二信号线41的交叠面积，以减小阵列基板的负载。第一连接线22在与第二连接线41交叠位置处的宽度小于两个相邻第二信号线41之间位置处的宽度，可以减小第一连接线22与第二信号线41的交叠面积，以减小阵列基板的负载。
(3)、形成半导体层。
在一些示例性实施方式中，在形成前述结构的衬底基板10上依次沉积第一绝缘薄膜和半导体薄膜，通过构图工艺对半导体薄膜进行构图，形成第一绝缘层11以及设置在第一绝缘层11上的半导体层图案，如图2C所示。在一些示例中，第一绝缘层11上开设有多个第一过孔K1，多个第一过孔K1内的第一绝缘层11被刻蚀掉，暴露出第一连接线22的表面。
在一些示例性实施方式中，半导体层包括开关元件的有源层31。有源层31可以包括：沟道区、第一掺杂区和第二掺杂区。沟道区可以不掺杂杂质，并具有半导体特性。第一掺杂区和第二掺杂区可以在沟道区的两侧，并且掺杂有杂质，并因此具有导电性。杂质可以根据晶体管的类型(例如，N型或P型)而变化。在一些示例中，半导体薄膜可以采用非晶态氧化铟镓锌材料(a-IGZO)、氮氧化锌(ZnON)、氧化铟锌锡(IZTO)、非晶硅(a-Si)、多晶硅(p-Si)、六噻吩、聚噻吩等一种或多种材料，即本公开实施例适用 于基于氧化物(Oxide)技术、硅技术以及有机物技术制造的晶体管。然而，本实施例对此并不限定。
(4)、形成第二导电层。
在一些示例性实施方式中，在形成前述结构的衬底基板10上沉积第二导电薄膜，通过构图工艺对第二导电薄膜进行构图，形成第二导电层，如图2D所示。第二导电层包括：多条数据线41和多条触控信号线42、开关元件的第一极43和第二极44、以及第三连接电极45。多条数据线41和多条触控信号线42均沿第二方向Y延伸，且沿着第一方向X间隔排布。触控信号线42两侧均排布有数据信号线41。开关元件位于数据信号线41和相邻的触控信号线42之间。第三连接电极45排布在触控信号线42和相邻的数据信号线41之间，且第三连接电极45和开关元件位于一个触控信号线42的相对两侧。开关元件的第一极43与有源层31的第一掺杂区交叠并直接连接，第二极44与有源层31的第二掺杂区交叠并直接连接。开关元件的第一极43与相邻的数据线43可以为一体结构。开关元件位于数据线43和相邻的触控信号线42之间。第三连接电极45的一端位于第一信号线21和第二信号线41交叉形成的一个子像素区域内，另一端横跨第一信号线21和第一连接线22延伸到另一个子像素区域内。
(5)、形成第二绝缘层和第一透明导电层。
在一些示例性实施方式中，在形成前述结构的衬底基板涂覆第二绝缘薄膜，通过对第二绝缘薄膜进行掩模、曝光和显影，形成第二绝缘层12。
随后，在形成前述结构的衬底基板10上沉积第一透明导电薄膜，通过构图工艺对第一透明导电薄膜进行构图，形成第一透明导电层，如图2E所示。第一透明导电层包括：多个触控电极51。触控电极51位于子像素区域内，且可以覆盖子像素区域的开口区域。
在一些示例性实施方式中，第二绝缘层12可以采用聚酰亚胺、亚克力或聚对苯二甲酸乙二醇酯等有机材料。在一些示例中，第二绝缘层12的厚度可以约为1微米至3微米。第二绝缘层12的介电常数可以为无机材料SiNx的1/2。然而，本实施例对此并不限定。本示例性实施方式，通过设置采用有机材料制备的第二绝缘层，可以有利于降低触控信号线42与第一透明导电层的 触控电极51之间的电容。
在本示例性实施方式中，公共电极复用为触控电极，在显示阶段对公共电极施加公共电极信号以实现显示功能，在触控阶段对公共电极施加触控信号以实现触控功能。如此一来，无需额外制作触控电极所在的膜层，从而可以节省制作工艺且减小阵列基板的厚度。
(6)、形成第三绝缘层。
在一些示例性实施方式中，在形成前述结构的衬底基板10上沉积第三绝缘薄膜，通过对第三绝缘薄膜进行构图，形成第三绝缘层13图案，如图2F所示。第三绝缘层13上形成有多个第二过孔K2、多个第三过孔K3和多个第四过孔K4。多个第二过孔K2内的第三绝缘层13和第二绝缘层12被刻蚀掉，暴露出开关元件的第二极44的表面。至少一个第三过孔K3包括第一半孔和第二半孔。第一半孔内的第三绝缘层13、第二绝缘层12和第一绝缘层11被刻蚀掉，暴露出第一连接线22的表面，第二半孔内的第三绝缘层13被刻蚀掉，暴露出触控电极51的表面。至少一个第四过孔K4包括：第三半孔和第四半孔。第三半孔内的第三绝缘层13和第二绝缘层12被刻蚀掉，暴露出第三连接线45的表面，第四半孔内的第三绝缘层13被刻蚀掉，暴露出触控电极51的表面。
(7)、形成第二透明导电层。
在一些示例性实施方式中，在形成前述结构的衬底基板10上沉积第二透明导电薄膜，通过对第二透明导电薄膜进行构图，形成第二透明导电层，如图2A所示。第二透明导电层包括：多个像素电极61、第一连接电极62和第二连接电极63。像素电极61通过第二过孔K2与开关元件的第二极44连接。第一连接电极62通过第三过孔K3的第一半孔与第一连接线22连接，通过第三过孔K3的第二半孔与触控电极51连接。即，第一连接电极62通过第三过孔实现与第一连接线22和触控电极51的电连接。第二连接电极63通过第四过孔K4的第三半孔与第三连接电极45连接，通过第四过孔K4的第四半孔与触控电极51连接。即，第二连接电极63通过第四过孔K4实现与触控电极51与第三连接电极45的电连接。第三连接电极45的一端在一个子像素区域内通过一个第二连接电极63与一个触控电极组内的一个触控电极51 连接，第三连接电极45的另一端在另一个子像素区域内通过一个第二连接电极63与前述触控电极组的相邻触控电极组内的一个触控电极51连接。在本示例性实施方式中，通过第二连接电极63和第三连接电极45可以实现相邻触控电极组之间的连接，通过第一连接电极62和第一连接线33实现触控电极组内的多个触控电极之间的连接。
在一些示例性实施方式中，像素电极61具有多个狭缝。多个狭缝贯穿像素电极61。多个狭缝的延伸方向与第二方向Y交叉。像素电极61具有两种不同方向的狭缝，从而形成双畴结构。然而，本实施例对此并不限定。例如，像素电极可以形成单畴或多畴结构。
在一些示例性实施方式中，第一绝缘层11和第三绝缘层13可以采用硅氧化物(SiOx)、硅氮化物(SiNx)和氮氧化硅(SiON)中的任意一种或更多种，可以是单层、多层或复合层。第一导电薄膜和第二导电薄膜可以采用金属材料，例如银(Ag)、铜(Cu)、铝(Al)、钛(Ti)和钼(Mo)中的任意一种或更多种，或上述金属的合金材料，如铝钕合金(AlNd)或钼铌合金(MoNb)，可以是单层结构，或者多层复合结构，如Ti/Al/Ti等。第一透明导电薄膜和第二透明导电薄膜可以采用氧化铟锡(ITO)或氧化铟锌(IZO)等透明导电材料。然而，本实施例对此并不限定。
在本示例性实施方式中，触控电极51位于衬底基板10和像素电极61之间。触控电极51为片状电极结构，不具有狭缝，每个触控电极51具有更大的面积，有利于增强触控性能。由于触控电极51距离衬底基板10更近且具有更大的面积，可以实现双侧触控的模式。换言之，在正面触控模式中，触控物(例如用户的手指)可以从衬底基板10设置有触控电极51的一侧进行触控；在背面触控模式中，触控物可以从衬底基板10未设置触控电极51的一侧进行触控。
本公开实施例的显示基板的结构及其制备过程仅仅是一种示例性说明。在一些示例性实施方式中，可以根据实际需要变更相应结构以及增加或减少构图工艺。例如，位于第一透明导电层中的触控电极可以通过设置在第二绝缘层上的过孔直接与第二导电层中的第三连接电极电连接，以实现触控电极组之间的电连接。又如，第一连接电极可以通过两个独立过孔分别与第一连 接线和触控电极连接。然而，本实施例对此并不限定。
本示例性实施例提供的阵列基板，通过设置触控信号线穿过子像素区域的开口区域，且一个子像素区域的开口区域仅穿过一个触控信号线，使得开口率损失区域仅为被触控信号线挡住区域，有利于改善较多触控信号线存在的走线困难和开口率受限情况。而且，通过第一透明导电层对触控信号线进行遮挡，可以避免凌乱电场造成暗场和开口率损失。另外，通过在第一透明导电层和触控信号线之间设置有机绝缘层，可以降低第一透明导电层和触控信号线之间的电容。
图4A为本公开至少一实施例的阵列基板的另一俯视示意图。图4B为图4A中形成第二导电层后的阵列基板的俯视意图。图4C为图4A中形成第一透明导电层后的阵列基板的俯视图。图4D为图4A中形成第三绝缘层后的阵列基板的俯视图。图5A为图4A中沿P-P方向的局部剖面示意图。图5B为图4A中沿R-R方向的局部剖面示意图。本示例的图示中示意了三个子像素区域以及其余子像素区域的部分结构。
在一些示例性实施方式中，如图4A至图5B所示，在垂直于阵列基板的平面内，阵列基板包括：依次设置在衬底基板10上的第一导电层、半导体层、第二导电层、第一透明导电层和第二透明导电层。其中，第一导电层和半导体层之间设置有第一绝缘层11，第二导电层与第一透明导电层之间设置有第二绝缘层12，第一透明导电层与第二透明导电层之间设置有第三绝缘层13。在一些示例中，第一绝缘层11和第三绝缘层13可以为无机绝缘层，第二绝缘层12可以为有机绝缘层。如图4A和图4B所示，第一导电层包括：多个第一信号线21和多个第一连接线22。半导体层包括开关元件的有源层31。第二导电层包括：多个第二信号线41、多个触控信号线42、开关元件的第一极43和第二极44。
在一些示例性实施方式中，如图4A和图4C所示，第一透明导电层包括：多个像素电极52。在子像素区域的开口区域内，像素电极52在衬底基板10上的正投影覆盖触控信号线42在衬底基板10上的正投影，以实现对触控信号线42的遮蔽，避免凌乱电场造成暗场和开口率损失。第二透明导电层包括：多个触控电极64、第四连接电极65和第二连接电极66。在本示例中，第三 绝缘层13上开设有多个第五过孔K5和多个第六过孔K6。至少一个第五过孔K5包括第五半孔和第六半孔。第五半孔内的第三绝缘层13和第二绝缘层12被刻蚀掉，暴露出开关元件的第二极44。第六半孔内的第三绝缘层13被刻蚀掉，暴露出像素电极52。第四连接电极65通过第五过孔K5的第五半孔与开关元件的第二极44连接，通过第五过孔K5的第六半孔与像素电极52连接。即第四连接电极65通过第五过孔K5实现像素电极52和开关元件的第二极44的电连接。第六过孔K6内的第三绝缘层13、第二绝缘层12和第一绝缘层11被刻蚀掉，暴露出第一连接线22的表面。触控电极64可以通过第六过孔K6与第一连接线22电连接。换言之，在本示例中，第一连接电极可以与触控电极64为一体结构。在本示例中，第二连接电极66与相邻两个触控电极64为一体结构，以实现相邻触控电极组的电连接。
在一些示例性实施方式中，像素电极52位于衬底基板10和触控电极64之间。触控电极64具有多个狭缝。多个狭缝的延伸方向与第二方向Y交叉。触控电极64具有两种不同方向的狭缝，从而形成双畴结构。然而，本实施例对此并不限定。例如，触控电极可以形成单畴或多畴结构。
本示例性实施例提供的阵列基板，通过设置触控信号线穿过子像素区域的开口区域，且一个子像素区域的开口区域仅穿过一个触控信号线，使得开口率损失区域仅为被触控信号线挡住区域，有利于改善较多触控信号线存在的走线困难和开口率受限情况。而且，通过第一透明导电层对触控信号线进行遮挡，可以避免凌乱电场造成暗场和开口率损失。另外，通过在第一透明导电层和触控信号线之间设置有机绝缘层，可以降低第一透明导电层和触控信号线之间的电容。
本示例性实施例的阵列基板的其余结构可以参照前述实施例的描述，故于此不再赘述。
本实施方式所示的结构(或方法)可以与其它实施方式所示的结构(或方法)适当地组合。
本公开至少一实施例还提供一种阵列基板的制备方法，用于制备如上所述的阵列基板。上述制备方法包括：在衬底基板上形成多个第一信号线、多个第二信号线、多个触控信号线、第一透明导电层以及第二透明导电层。其 中，第一透明导电层和第二透明导电层位于多个触控信号线远离衬底基板的一侧。触控信号线与至少一个触控感测块连接，触控感测块包括彼此连接且间隔开的多个触控电极。第一透明导电层或第二透明导电层包括所述多个触控电极。多个第一信号线和多个第二信号线交叉形成多个子像素区域，子像素区域包括开口区域。触控信号线与至少一个子像素区域的开口区域在衬底基板上的正投影存在交叠。
在一些示例性实施方式中，在衬底基板上形成多个第一信号线、多个第二信号线、多个触控信号线、第一透明导电层以及第二透明导电层，包括：在衬底基板上形成第一导电层；在第一导电层远离衬底基板的一侧形成第二导电层；在第二导电层远离所述衬底基板的一侧依次形成第一透明导电层和第二透明导电层。第一导电层包括多个第一信号线。第二导电层包括：多个第二信号线和多个触控信号线。第一透明导电层包括多个触控电极，第二透明导电层包括多个像素电极；或者，第一透明导电层包括多个像素电极，第二透明导电层包括多个触控电极。
关于本实施例的制备方法的详细说明可以参照前述实施例，故于此不再赘述。
本公开至少一实施例还提供一种触控显示装置，包括如上所述的阵列基板。
在一些示例性实施方式中，本实施例的触控显示装置还包括：至少一个第一触控控制电路和至少一个第二触控控制电路。阵列基板包括：第一触控区域和位于第一触控区域一侧的第二触控区域。第一触控控制电路位于第一触控区域远离第二触控区域的一侧，第一触控控制电路通过触控信号线与第一触控区域内的触控感测块连接；第二触控控制电路位于第二触控区域远离所述第一触控区域的一侧，第二触控控制电路通过触控信号线与第二触控区域内的触控感测块连接。
图6为本公开至少一实施例的触控显示装置的触控结构的示意图。如图6所示，触控显示装置包括：阵列基板、第一触控控制电路703、第二触控控制电路704。阵列基板包括：第一触控区域700a和位于第一触控区域700a一侧的第二触控区域700b。例如，第一触控区域700a为触控显示装置的上 半触控区域，第二触控区域700b为触控显示装置的下半触控区域。第一触控控制电路703位于第一触控区域700a远离第二触控区域700b的一侧，第一触控控制电路703通过触控信号线702与第一触控区域700a内的触控感测块701连接。第二触控控制电路704位于第二触控区域700b远离第一触控区域700a的一侧。第二触控控制电路704通过触控信号线702与第二触控区域700b内的触控感测块701连接。在一些示例中，第一触控控制电路和第二触控控制电路可以均为触控与显示驱动器集成(TDDI，Touch and Display Driver Integration)电路。
在一些示例性实施方式中，触控显示装置可以包括：阵列基板、对置基板以及设置在阵列基板和对置基板之间的液晶层。阵列基板包括的像素电极和公共电极(被复用为触控电极)用于产生控制液晶层中液晶分子偏转的电场。在一些示例中，对置基板可以包括衬底基板、以及设置在衬底基板上的黑矩阵。然而，本实施例对此并不限定。
在一些示例性实施方式中，触控显示装置可以为：液晶面板、电子纸、手机、平板电脑、电视机、显示器、笔记本电脑、数码相框、导航仪等任何具有触控和显示功能的产品或部件。
相较于图1所示的单边驱动方式的触控结构，本实施例提供的触控显示装置采用双边驱动方式。触控信号线的负载包括电阻和电容两部分，触控信号线的电阻与触控信号线的长度成正比。在图1所示的单边驱动方式下，触控信号线距离触控控制电路的最大长度例如为L，在触控显示装置的尺寸一致的情况下，采用本实施例的双边驱动方式下，触控信号线距离触控控制电路的最大长度可以为L/2，使得触控信号线的电阻下降50％。
在一些示例性实施方式中，假设触控显示装置包括M个触控感测块，每个触控控制电路具有N个触控信号通道，则触控显示装置需要M/N个触控控制电路。在图1所示的单边驱动方式下，M/N个触控控制电路要均匀排布在一侧，而在本实施例的双边驱动方式下，M/N个触控控制电路可以排布在触控区域的两侧，例如，每侧仅需排布M/2N个触控控制电路。在一些示例中，第一触控区域远离第二触控区域的一侧排布有M/2N个第一触控控制电路，第二触控区域远离第一触控区域的一侧排布有M/2N个第二触控控制电 路。如此一来，可以降低触控信号线的扇出走线难度。
在一些示例性实施方式中，以触控显示装置为86寸的8K产品为例，每个触控感测块的形状接近正方形，例如边长约为6.5毫米至7.0毫米，则整个触控显示装置可以包括约45000个触控感测块，即需要引出45000个触控信号线。8K产品的分辨率为7680*4320，横向一共有7680*3＝23040个子像素。在采用图1所示的单边驱动方式下，则每个子像素区域中要穿过两根触控信号线；而采用本实施例提供的双边驱动方式，则第一触控区域和第二触控区域分别只需排布45000/2＝22500根触控信号线，这样每个子像素区域中只需要穿过一根触控信号线即可，可以极大地提升像素开口率。
本实施例提供的触控显示装置，可以改善触控信号线数量较多存在的走线困难和像素开口率受限的情况。
本公开中的附图只涉及本公开涉及到的结构，其他结构可参考通常设计。在不冲突的情况下，本公开的实施例及实施例中的特征可以相互组合以得到新的实施例。
本领域的普通技术人员应当理解，可以对本公开的技术方案进行修改或者等同替换，而不脱离本公开技术方案的精神和范围，均应涵盖在本公开的权利要求的范围当中。

Claims (16)

  1. 一种阵列基板，包括：
    衬底基板、设置在所述衬底基板上的多个第一信号线、多个第二信号线、多个触控信号线、第一透明导电层和第二透明导电层；所述第一透明导电层和第二透明导电层位于所述多个触控信号线远离所述衬底基板的一侧；
    所述触控信号线与至少一个触控感测块连接，所述触控感测块包括彼此连接且间隔开的多个触控电极，所述第一透明导电层或第二透明导电层包括所述多个触控电极；
    所述多个第一信号线和多个第二信号线交叉形成多个子像素区域，所述子像素区域包括开口区域；所述触控信号线与至少一个子像素区域的开口区域在所述衬底基板上的正投影存在交叠。
  2. 根据权利要求1所述的阵列基板，其中，所述多个触控信号线与多个第二信号线为同层结构，所述多个触控信号线沿着所述多个第二信号线的延伸方向延伸。
  3. 根据权利要求1所述的阵列基板，其中，所述第一透明导电层位于所述第二透明导电层靠近所述衬底基板的一侧；在所述子像素区域内，所述第一透明导电层在所述衬底基板上的正投影覆盖所述触控信号线在所述衬底基板上的正投影。
  4. 根据权利要求3所述的阵列基板，其中，所述触控信号线所在膜层与所述第一透明导电层之间设置有机绝缘层。
  5. 根据权利要求4所述的阵列基板，其中，所述有机绝缘层的厚度约为1微米至3微米。
  6. 根据权利要求3所述的阵列基板，其中，所述第一透明导电层包括：多个触控电极，所述第二透明导电层包括：多个像素电极；或者，所述第一透明导电层包括：多个像素电极，所述第二透明导电层包括：多个触控电极。
  7. 根据权利要求6所述的阵列基板，其中，位于所述第二透明导电层的触控电极或像素电极具有多个缝隙，所述缝隙的延伸方向与所述触控信号线 的延伸方向交叉。
  8. 根据权利要求6所述的阵列基板，其中，至少一个触控感测块包括：依次排列的多个触控电极组；至少一个触控电极组包括：间隔开的多个触控电极以及电连接所述多个触控电极的第一连接单元；
    所述触控感测块还包括：位于相邻的触控电极组之间且电连接相邻的触控电极组的第二连接单元。
  9. 根据权利要求8所述的阵列基板，其中，所述第一连接单元包括：第一连接线和第一连接电极；所述第一连接线与所述第一信号线为同层结构，所述第一连接电极位于所述第二透明导电层，所述第一连接电极配置为连接所述第一连接线与所述触控电极。
  10. 根据权利要求8所述的阵列基板，其中，所述第二连接单元包括：第二连接电极；所述第二连接电极位于所述第二透明导电层。
  11. 根据权利要求10所述的阵列基板，其中，所述第二连接单元还包括：第三连接电极；所述第三连接电极与所述触控信号线为同层结构，所述第二连接电极配置为连接相邻的触控电极组和第三连接电极。
  12. 根据权利要求1所述的阵列基板，还包括：位于所述衬底基板上的多个开关元件，至少一个开关元件位于相邻的第二信号线和触控信号线之间。
  13. 一种触控显示装置，包括如权利要求1至12中任一项所述的阵列基板。
  14. 根据权利要求13所述的触控显示装置，还包括：至少一个第一触控控制电路和至少一个第二触控控制电路；
    所述阵列基板包括：第一触控区域和位于所述第一触控区域一侧的第二触控区域；所述第一触控控制电路位于所述第一触控区域远离所述第二触控区域的一侧，所述第一触控控制电路通过触控信号线与所述第一触控区域内的触控感测块连接；所述第二触控控制电路位于所述第二触控区域远离所述第一触控区域的一侧，所述第二触控控制电路通过触控信号线与所述第二触控区域内的触控感测块连接。
  15. 一种阵列基板的制备方法，用于制备如权利要求1至12中任一项所 述的阵列基板，所述制备方法包括：
    在所述衬底基板上形成多个第一信号线、多个第二信号线、多个触控信号线、第一透明导电层以及第二透明导电层；
    其中，所述第一透明导电层和第二透明导电层位于所述多个触控信号线远离所述衬底基板的一侧；所述触控信号线与至少一个触控感测块连接，所述触控感测块包括彼此连接且间隔开的多个触控电极，所述第一透明导电层或第二透明导电层包括所述多个触控电极；
    所述多个第一信号线和多个第二信号线交叉形成多个子像素区域，所述子像素区域包括开口区域；所述触控信号线与至少一个子像素区域的开口区域在所述衬底基板上的正投影存在交叠。
  16. 根据权利要求15所述的制备方法，其中，所述在所述衬底基板上形成多个第一信号线、多个第二信号线、多个触控信号线、第一透明导电层以及第二透明导电层，包括：
    在所述衬底基板上形成第一导电层，所述第一导电层包括多个第一信号线；
    在所述第一导电层远离所述衬底基板的一侧形成第二导电层，所述第二导电层包括：多个第二信号线和多个触控信号线；
    在所述第二导电层远离所述衬底基板的一侧依次形成第一透明导电层和第二透明导电层；所述第一透明导电层包括多个触控电极，所述第二透明导电层包括多个像素电极，或者，所述第一透明导电层包括多个像素电极，所述第二透明导电层包括多个触控电极。
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