WO2022161332A1 - Method for processing dft having base of number of points that is multiple of 12, device, apparatus, and storage medium - Google Patents

Method for processing dft having base of number of points that is multiple of 12, device, apparatus, and storage medium Download PDF

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Publication number
WO2022161332A1
WO2022161332A1 PCT/CN2022/073624 CN2022073624W WO2022161332A1 WO 2022161332 A1 WO2022161332 A1 WO 2022161332A1 CN 2022073624 W CN2022073624 W CN 2022073624W WO 2022161332 A1 WO2022161332 A1 WO 2022161332A1
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discrete fourier
fourier transform
round
point
coefficient
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PCT/CN2022/073624
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French (fr)
Chinese (zh)
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顾明飞
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展讯半导体(成都)有限公司
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Publication of WO2022161332A1 publication Critical patent/WO2022161332A1/en

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    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F17/00—Digital computing or data processing equipment or methods, specially adapted for specific functions
    • G06F17/10—Complex mathematical operations
    • G06F17/14—Fourier, Walsh or analogous domain transformations, e.g. Laplace, Hilbert, Karhunen-Loeve, transforms
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode

Definitions

  • the present invention relates to the technical field of communications, and in particular, to a method, device, device and storage medium for processing a 12-multiple point discrete Fourier transform (DFT).
  • DFT discrete Fourier transform
  • the NR (New Radio) system is the fifth generation mobile communication system (5G) led by the 3rd Generation Partnership Project (3GPP), which involves orthogonal frequency division multiplexing of discrete Fourier transform spread spectrum A modulation technique for multiple access (DFT-S-OFDM), which requires the use of a multi-point, non-exponential-of-two Fourier transform processor.
  • 5G fifth generation mobile communication system
  • 3GPP 3rd Generation Partnership Project
  • DFT-S-OFDM discrete Fourier transform spread spectrum A modulation technique for multiple access
  • the technical problem solved by the present invention is that it is difficult to implement a Fourier transform processor that is not a power of 2 exponential power.
  • an embodiment of the present invention provides a method for processing the discrete Fourier transform of a multiple of 12 points, including:
  • the 12-multiple points are decomposed based on the prime factor algorithm, so as to obtain the following first decomposition formula and second decomposition formula based on several coefficients:
  • m is the number of coefficients
  • N is a multiple of 12 points
  • n is the order of the input data in the discrete Fourier transform and is greater than or equal to 0 but less than N
  • ni is the order of n coefficients and have corresponding
  • the value range of , ai is the first decomposition parameter corresponding to ni
  • k is the order of the output data in the discrete Fourier transform and is greater than or equal to 0 but less than N
  • ki is the coefficient of k and has the corresponding
  • the value range of , bi is the second decomposition parameter corresponding to ki;
  • the number of possible values of the coefficients from n0 to nm is used as the small-point base, and m+1 rounds of operations are performed. In each round of operation, the small-point base discrete Fourier transform is performed to obtain the calculation result. The value satisfies the first decomposition;
  • the calculation result is stored in the storage address of the memory as the output data in each round, wherein the storage address includes the storage block number and the relative storage address, which is selected by the following formula:
  • bank_sel is the storage block number
  • bank_addr is the relative storage address
  • ci and di are the first adjustment parameter and the second adjustment parameter respectively;
  • the final output data of the discrete Fourier transform is obtained based on the second decomposition.
  • the above method includes, the memory receives and stores the initial input data of discrete Fourier transform and the output data in each round of operation, and obtains the initial input data in the first round of operation and performs small-point base discrete Fourier transform. , in each subsequent round of operations, the output data of the previous round of operations is obtained as the input data of this round of operations to perform small-point base discrete Fourier transform.
  • the above method includes storing the output data in each round of operation at the storage address where the input data in the round of operation is stored.
  • the above method includes, in each round of operation, making the coefficients with the number of possible values as the small point base take values within their value ranges, and making some of the remaining coefficients take values within their ranges and/or Or ping-pong values, and traverse the remaining coefficients in the remaining coefficients to perform a small-point base discrete Fourier transform to obtain the calculation result.
  • the first adjustment parameters corresponding to the coefficients whose value ranges are 2, 3, 4, and 5 are 6, 4, 3, and 2, respectively.
  • the calculation formula of the relative storage address includes multiple items about n0 to nm, wherein the second adjustment parameter corresponding to the coefficient whose first value range is 3 is 0, and the first value range is 4.
  • the second adjustment parameter corresponding to the coefficient is 0, the first second adjustment parameter that is not 0 is 1, and the other second adjustment parameters that are not 0 are the items that are immediately preceding and the second adjustment parameter is not 0.
  • obtaining the final output data of the discrete Fourier transform based on the second decomposition formula includes obtaining the value of the coefficient of k based on the second decomposition formula, and obtaining the value of the corresponding coefficient of n based on the value of the coefficient of k. , calculate the storage address of the output data based on the value of the coefficient of n, the calculation formula of the storage block number and the calculation formula of the relative storage address, and obtain the final output data based on the storage address.
  • the embodiment of the present invention also provides a device for processing discrete Fourier transform, including a memory and a processing module, the memory is suitable for receiving and storing the initial input data of the discrete Fourier transform and the output data in each round of operation, and the processing module is suitable for receiving and storing the discrete Fourier transform. in the steps of executing the above-mentioned method for processing the discrete Fourier transform of 12-multiple points.
  • the above-mentioned device is included in a network device or a user equipment.
  • the processing module includes a first submodule, a second submodule and a third submodule, wherein the first submodule is adapted to perform 1 5-point or 1 4-point or 2 3-point or 3 2-point Discrete Fourier Transform, the second sub-module is adapted to perform 1 5-point or 1 4-point or 2 3-point or 3 2-point discrete Fourier transforms, and the third module is adapted to perform a 4-point discrete Fourier transform Lie transform.
  • the embodiment of the present invention further provides a storage medium, on which computer instructions are stored, and when the computer instructions are run, the steps of the above-mentioned method for processing a 12-multiple point discrete Fourier transform as a basis are executed.
  • An embodiment of the present invention also provides a device for processing a discrete Fourier transform with a multiple of 12 points, including:
  • the decomposition module is adapted to decompose the 12-multiple points based on the prime factor algorithm, thereby obtaining the following first decomposition formula and second decomposition formula based on several coefficients:
  • m is the number of coefficients
  • N is a multiple of 12 points
  • n is the order of the input data in the discrete Fourier transform and is greater than or equal to 0 but less than N
  • ni is the order of n coefficients and have corresponding
  • the value range of , ai is the first decomposition parameter corresponding to ni
  • k is the order of the output data in the discrete Fourier transform and is greater than or equal to 0 but less than N
  • ki is the coefficient of k and has the corresponding
  • the value range of , bi is the second decomposition parameter corresponding to ki;
  • an operation module which is suitable for performing m+1 rounds of operations using the number of possible values of coefficients n0 to nm as the small-point basis, and in each round of operation, performs discrete Fourier transform on the small-point basis to obtain the calculation result, Wherein, the value of each coefficient satisfies the first decomposition formula;
  • the storage module is adapted to store the calculation result as the output data in each round at the storage address of the memory, wherein the storage address includes the storage block number and the relative storage address determined by the following formula:
  • bank_sel is the storage block number
  • bank_addr is the relative storage address
  • ci and di are the first adjustment parameter and the second adjustment parameter respectively;
  • An acquisition module adapted to acquire the final output data of the discrete Fourier transform based on the second decomposition.
  • the storage module is adapted to receive and store the initial input data of the discrete Fourier transform and the output data in each round of operation, obtain the initial input data in the first round of operation and carry out the small-point base discrete Fourier transform, In subsequent rounds of operation, the output data of the previous round of operation is obtained as the input data of this round of operation to perform small-point base discrete Fourier transform.
  • the storage module is adapted to store the output data in each round of operation at the storage address where the input data in the round of operation is stored.
  • the operation module is adapted to, in each round of operation, make the coefficients with the number of possible values as the small-point number base take values within their value ranges, and make some coefficients in the remaining coefficients take values within their ranges and/or Or ping-pong values, and traverse the remaining coefficients in the remaining coefficients to perform a small-point base discrete Fourier transform to obtain the calculation result.
  • the obtaining module is adapted to: obtain the value of the coefficient of k based on the second decomposition formula, obtain the value of the corresponding coefficient of n based on the value of the coefficient of k, obtain the value of the coefficient of n based on the value of the coefficient, the storage block number.
  • the calculation formula and the calculation formula of the relative storage address calculate the storage address of the output data, and obtain the final output data based on the storage address.
  • the 12-multiple points are decomposed to obtain the first decomposition formula and the second decomposition formula based on several coefficients.
  • the number of possible values is used as a small point base to perform m+1 rounds of operations, and the calculation results are stored in the storage address of the memory as the output data in each round, so as to obtain the final output data of the discrete Fourier transform; this technology
  • the solution can greatly reduce the complexity of DFT implementation, significantly reduce the consumption of computing and storage resources, and effectively meet the requirements of 5G for ultra-low latency characteristics.
  • the memory includes multiple storage blocks (banks), and the storage block number is selected by bank_sel; this can increase the concurrency of operations, thereby significantly reducing processing time and operation delay.
  • the output data in each round of operation is stored in the storage address where the input data is stored in the round of operation, so that the storage address of the memory is co-located in the process of discrete Fourier transform. used, so that memory addresses can be efficiently multiplexed.
  • FIG. 1 is a flowchart of a method in which a processing basis is a 12-multiple point discrete Fourier transform in an embodiment of the present invention
  • FIG. 2 is a schematic structural diagram of a device for processing discrete Fourier transform in an embodiment of the present invention
  • FIG. 3 is a schematic structural diagram of a processing module in an embodiment of the present invention.
  • FIG. 4 is a schematic structural diagram of an apparatus in which the processing basis is a 12-multiple point discrete Fourier transform according to an embodiment of the present invention.
  • FIG. 1 shows a flowchart of a method 100 for processing a discrete Fourier transform with a multiple of 12 points according to an embodiment of the present invention.
  • the discrete Fourier transform can be expressed by the following formula:
  • N is the number of points
  • n and k are between 0 and N-1
  • x(n) is the input data of the discrete Fourier transform
  • X(k) is the output data of the discrete Fourier transform
  • N is a multiple of 12 points.
  • Method 100 includes steps 110 , 120 , 130 and 140 .
  • the 12-multiple points may be decomposed based on a prime factor algorithm.
  • N 1 and N 2 can still continue to decompose until the decomposed factors include only 5, 3, 4, and 2.
  • N is decomposed to obtain the first decomposition formula and the second decomposition formula based on several coefficients, which are respectively expressed by the following formulas (4) and (5):
  • m is the number of coefficients
  • N is a multiple of 12 points
  • n is the order of the input data in the discrete Fourier transform and is greater than or equal to 0 but less than N
  • ni is the coefficient of order n and has a corresponding value range
  • ai is the first decomposition parameter corresponding to ni
  • k is the order of the output data in the discrete Fourier transform and is greater than or equal to 0 but less than N
  • ki is the coefficient of k and has a corresponding value range
  • bi is the corresponding value to ki
  • the second decomposition parameter of is the number of coefficients
  • the coefficients n0 to nm are the indices of the decomposed factors, and the value ranges of the coefficients n0 to nm are related to the values of the corresponding factors. For example, if the factor corresponding to the coefficient ni is 1, the value range of ni is 0 to 1. -1.
  • the decomposition may be performed in the order of factors 5, 3, 4, and 2, so that the decomposition steps are simplified and effective.
  • step 120 m+1 rounds of operations can be performed with the number of possible values of the coefficients n0 to nm as the small-point basis; As a result, the value of each coefficient satisfies the first decomposition formula.
  • the coefficients whose number of possible values can be used as the decimal point base can take values within their value ranges, and some of the remaining coefficients can take values within their ranges and/or ping-pong values.
  • Small-point base discrete Fourier transform includes the following three cases.
  • ni takes a value in its value range (0 to P-1), and the coefficient nq (its value range is 0 to Q) can be taken out of the remaining coefficients except ni -1), so as to realize Q small-point discrete Fourier transforms with P as the basis at a time.
  • ni takes a value within its value range (0 to P-1), and in the remaining coefficients except ni, the value of the coefficient nr can be taken in a ping-pong manner, so as to achieve Do 2 small-point discrete Fourier transforms with base P at a time.
  • ni takes a value within its value range (0 to P-1), and the coefficient ns can be taken out of the remaining coefficients except ni (its value range is 0 to P-1).
  • S-1) and take the value of the coefficient nt through the ping-pong method, so as to achieve 2S small-point discrete Fourier transforms with the basis as P at a time.
  • the remaining coefficients in the remaining coefficients are traversed to perform the discrete Fourier transform of the small-point basis, thereby obtaining the calculation result.
  • all combinations of the values of the respective coefficients in the remaining coefficients may be covered by a nested loop (eg, a nested loop based on a for statement).
  • Small point base discrete Fourier transform can be performed by the processing module.
  • the processing module may include three sub-modules to perform discrete Fourier transform of small-point basis respectively, wherein the first sub-module performs one 5-point or one 4-point or two 3-point or three 2-point Discrete Fourier Transform, the second sub-module performs 1 5-point or 1 4-point or 2 3-point or 3 2-point discrete Fourier transforms, and the third sub-module performs 1 4-point discrete Fourier transform .
  • the processing process of the discrete Fourier transform of the small point base is ordered and simplified.
  • the small-point base discrete Fourier transform can be completed by the first sub-module and the second sub-module; when the first sub-module and the second sub-module can no longer provide 4-point discrete Fourier transform (ie the first sub-module and the second sub-module have provided a 4-point discrete Fourier transform but still need a 4-point discrete Fourier transform for operation), it can be executed by the third sub-module.
  • the calculation result may be stored in the storage address of the memory as the output data in each round.
  • the memory receives and stores the initial input data x(n) of the discrete Fourier transform; the output data in each round of operation is also returned to the memory for storage, and is used as the input data of the next round of operation.
  • the output data in each round of operation can be stored in the storage of the input data in this round of operation for co-location write-back. After one round of operation, the N data are updated, so that the storage address can be efficiently stored. reuse.
  • the initial input data x(n) is obtained from the memory and the discrete Fourier transform of the small point base is performed; in the subsequent rounds of operation, the output data of the previous round of operation is obtained as the input data of this round of operation, Thereby, the discrete Fourier transform of the small point base is performed.
  • the memory may include one, two or more, for example, two or more memories are provided for ping-pong values.
  • Each memory may include multiple storage blocks, for example, 12 storage blocks; this can increase the concurrency of operations, thereby significantly reducing processing time and operation delay.
  • the calculation result can be stored in the storage address of the memory as the output data in each round, wherein the storage address includes the storage block number and the relative storage address, which can be selected by the following formula:
  • bank_sel is the storage block number
  • bank_addr is the relative storage address
  • ci and di are the first adjustment parameter and the second adjustment parameter, respectively.
  • the first adjustment parameter and the second adjustment parameter may be determined based on the setting rule.
  • the first adjustment parameters corresponding to the coefficients whose value ranges are 2, 3, 4, and 5 in formula (6) are 6, 4, 3, and 2, respectively;
  • the polynomials of nm can be arranged from front to back in the order of n0, n1, ..., nm, wherein the second adjustment parameter corresponding to the coefficient whose first value range is 3 is 0, and the first value range is
  • the second adjustment parameter corresponding to the coefficient of 4 is 0, the first second adjustment parameter that is not 0 is 1, and the other second adjustment parameters that are not 0 are the ones that are immediately preceding and the second adjustment parameter is not 0.
  • the final output data X(k) of the discrete Fourier transform may be obtained based on the second decomposition formula.
  • k can take a value between 0 and N-1, and based on each value of k, the value of the coefficient of k is obtained according to the second decomposition formula (ie, formula (5)).
  • the corresponding value of the coefficient of n can be obtained based on the value of the coefficient of k.
  • n and k can be expressed by the following formulas:
  • n (648n0+1080n1+360n2+120n3+40n4+810n5+405n6)mod 3240 (8)
  • the value range of n0 is 0 to 4, the value range of n1 is 0 to 2, the value range of n2 is 0 to 2, the value range of n3 is 0 to 2, and the value range of n4 is 0 to 2.
  • the value range of n5 is 0 to 3, the value range of n6 is 0 to 1;
  • the value range of k0 is 0 to 4, the value range of k1 is 0 to 2, and the value range of k2 is 0 to 1 2.
  • the value range of k3 is 0 to 2
  • the value range of k4 is 0 to 2
  • the value range of k5 is 0 to 3
  • the value range of k6 is 0 to 1.
  • the first adjustment parameter and the second adjustment parameter in the calculation formula of the storage block number and the calculation formula of the relative storage address can be determined by setting rules; when the base is 3240, the storage block number and The relative storage address can be selected by the following formula:
  • bank_sel (6n6+3n5+4n4+4n3+4n2+4n1+2n0)mod 12 (10)
  • bank_addr 135n6+0n5+45n4+15n3+5n2+0n1+n0 (11)
  • n0 round take 5 values of n0 from 0 to 4, take the values of n5 as (0, 1) and (2, 3) and perform ping-pong values, so as to realize the discrete Fourier transform of 2 bases of 5 at a time of parallel operations.
  • n6, n4, n3, n2, and n1 are traversed and selected as follows:
  • n1 round take the three values of n1 from 0 to 2, and take the value of n5 from 0 to 3, so as to realize the parallel operation of four base-3 discrete Fourier transforms at a time.
  • n6, n4, n3, n2, and n0 are traversed and selected as follows:
  • n2, n3, and n4 rounds The processing of the n2, n3, and n4 rounds is similar to that of the n1 round.
  • n5 round 4 values of n5 are taken from 0 to 3, and 3 values of n1 are taken from 0 to 2, so as to realize a parallel operation of 3 base-4 discrete Fourier transforms at a time.
  • n6, n4, n3, n2, and n0 are traversed and selected in the following manner:
  • n6 round take the 2 values of n6 from 0 to 1, take the value of n1 as (0, 1, 2), take the value of n5 as (0, 2) and (1, 3) and perform ping-pong values, thus It realizes the parallel operation of 6 base-2 discrete Fourier transforms at a time.
  • n4, n3, n2, and n0 are traversed and selected as follows:
  • the final output data of the 3240-based discrete Fourier transform can be obtained based on the second decomposition formula (ie, formula (9)).
  • the first adjustment parameter and the second adjustment parameter in the calculation formula of the storage block number and the calculation formula of the relative storage address can be determined by setting rules;
  • the block number and relative storage address can be selected by the following formula.
  • bank_sel (3n5+3n4+3n3+3n2+3n1+4n0)mod 12
  • bank_addr 64n5+16n4+4n3+n2+0n1+0n0;
  • bank_sel (6n5+3n4+4n3+2n2+2n1+2n0)mod 12
  • bank_addr 125n5+0n4+0n3+25n2+5n1+n0;
  • bank_sel (3n6+4n5+4n4+4n3+4n2+4n1+4n0)mod 12
  • bank_addr 0n6+81n5+27n4+9n3+3n2+1n1+0n0;
  • bank_sel (3n5+3n4+3n3+4n2+4n1+2n0)mod 12
  • bank_addr 60n5+15n4+0n3+5n2+0n1+n0;
  • bank_sel (3n5+4n4+4n3+4n2+2n1+2n0)mod 12
  • bank_addr 0n5+75n4+25n3+0n2+5n1+n0;
  • bank_sel (6n6+3n5+3n4+4n3+4n2+4n1+4n0)mod 12
  • bank_addr 108n6+27n5+0n4+9n3+3n2+n1+0n0;
  • bank_sel (6n5+3n4+3n3+4n2+6n1+2n0)mod 12
  • bank_addr 100n5+25n4+0n3+0n2+5n1+n0;
  • bank_sel (3n5+3n4+3n3+3n2+4n1+4n0)mod 12
  • bank_addr 48n5+12n4+3n3+0n2+n1+0n0;
  • bank_sel (3n5+3n4+4n3+4n2+4n1+2n0)mod 12
  • bank_addr 45n5+0n4+15n3+5n2+0n1+n0;
  • bank_sel (6n6+3n5+4n4+4n3+4n2+4n1+4n0)mod 12
  • bank_addr 81n6+0n5+27n4+9n3+3n2+n1+0n0;
  • bank_sel (6n5+3n4+3n3+3n2+4n1+2n0)mod 12
  • bank_addr 80n5+20n4+5n3+0n2+0n1+n0;
  • bank_sel (6n5+3n4+4n3+4n2+2n1+2n0)mod 12
  • bank_addr 75n5+0n4+25n3+0n2+5n1+n0;
  • bank_sel (3n5+3n4+3n3+4n2+4n1+4n0)mod 12
  • bank_addr 36n5+9n4+0n3+3n2+n1+0n0;
  • bank_sel (3n5+4n4+4n3+4n2+4n1+2n0)mod 12
  • bank_addr 0n5+45n4+15n3+5n2+0n1+n0;
  • bank_sel (6n5+3n4+3n3+3n2+3n1+4n0)mod 12
  • bank_addr 64n5+16n4+4n3+n2+0n1+0n0;
  • bank_addr 0n4+0n3+25n2+5n1+n0;
  • bank_sel (6n5+3n4+3n3+4n2+4n1+2n0)mod 12
  • bank_addr 60n5+15n4+0n3+5n2+0n1+n0;
  • bank_sel (3n5+3n4+4n3+4n2+4n1+4n0)mod 12
  • bank_addr 27n5+0n4+9n3+3n2+n1+0n0;
  • bank_addr 25n4+0n3+0n2+5n1+n0;
  • bank_sel (6n5+3n4+3n3+3n2+4n1+4n0)mod 12
  • bank_addr 48n5+12n4+3n3+0n2+n1+0n0;
  • bank_sel (6n5+3n4+4n3+4n2+4n1+2n0)mod 12
  • bank_addr 45n5+0n4+15n3+5n2+0n1+n0;
  • bank_sel (3n5+4n4+4n3+4n2+4n1+4n0)mod 12
  • bank_addr 0n5+27n4+9n3+3n2+n1+0n0;
  • bank_addr 20n4+5n3+0n2+0n1+n0;
  • bank_sel (3n4+4n3+4n2+2n1+2n0)mod 12
  • bank_addr 0n4+25n3+0n2+5n1+n0;
  • bank_sel (6n5+3n4+3n3+4n2+4n1+4n0)mod 12
  • bank_addr 36n5+9n4+0n3+3n2+n1+0n0;
  • bank_addr 16n4+4n3+n2+0n1+0n0;
  • bank_addr 15n4+0n3+5n2+0n1+n0;
  • bank_sel (6n5+3n4+4n3+4n2+4n1+4n0)mod 12
  • bank_addr 27n5+0n4+9n3+3n2+n1+0n0;
  • bank_sel (6n4+3n3+4n2+2n1+2n0)mod 12
  • bank_addr 25n4+0n3+0n2+5n1+n0;
  • bank_addr 12n4+3n3+0n2+n1+0n0;
  • bank_addr 0n4+15n3+5n2+0n1+n0;
  • bank_sel (6n4+3n3+3n2+4n1+2n0)mod 12
  • bank_addr 20n4+5n3+0n2+0n1+n0;
  • bank_addr 9n4+0n3+3n2+n1+0n0;
  • bank_addr 16n4+4n3+n2+0n1+0n0;
  • bank_addr 15n4+0n3+5n2+0n1+n0;
  • bank_addr 0n4+9n3+3n2+n1+0n0;
  • bank_addr 0n3+0n2+5n1+n0;
  • bank_addr 12n4+3n3+0n2+n1+0n0;
  • bank_addr 5n3+0n2+0n1+n0;
  • bank_addr 9n4+0n3+3n2+n1+0n0;
  • bank_addr 4n3+n2+0n1+0n0;
  • bank_addr 0n3+5n2+0n1+n0;
  • bank_addr 3n3+0n2+n1+0n0;
  • bank_addr 5n3+0n2+0n1+n0;
  • bank_addr 0n3+3n2+n1+0n0;
  • bank_addr 4n3+n2+0n1+0n0;
  • bank_addr 3n3+0n2+n1+0n0;
  • bank_addr 0n2+0n1+n0;
  • bank_addr n2+0n1+0n0;
  • bank_addr 0n2+n1+0n0;
  • bank_addr n2+0n1+0n0;
  • bank_addr 0n1+0n0.
  • the embodiment of the present invention also provides a device for processing discrete Fourier transform.
  • the device for processing discrete Fourier transform is a modulator in a 5G system, which uses DFT-S-OFDM modulation technology to convert the time domain signal to the frequency domain for expansion, and then go through a fast Fourier transform Inverse transform (IFFT) transform to transmit the signal.
  • IFFT Inverse transform
  • the device for processing discrete Fourier transform may be included in a network device or user equipment (User Equipment, UE), and belong to one of the components.
  • UE User Equipment
  • the apparatus 200 for processing discrete Fourier transforms includes a memory and a processing module 220 .
  • the memory may include one, two or more.
  • a memory 210 is included for receiving and storing the initial input data of the discrete Fourier transform and the output data in each round of operation, and outputting the data to the processing module 220; another memory 215 may also be included, which is connected with the memory 210 is used together for ping-pong values.
  • Each memory may include multiple storage blocks, for example, 12 storage blocks; this can increase the concurrency of operations, thereby significantly reducing processing time and operation delay.
  • the processing module 220 receives the data output from the memory, performs discrete Fourier transform on a small-point basis, and can perform the steps of the above-mentioned method for processing a basis of 12-multiple point discrete Fourier transform.
  • the processing module 220 may include three sub-modules to perform discrete Fourier transform on a small-point basis respectively, wherein the first sub-module 221 performs 1 5-point or 1 4-point or 2 3-point or 3 a 2-point discrete Fourier transform, the second sub-module 222 performs a 5-point or a 4-point or two 3-point or three 2-point discrete Fourier transforms, and the third sub-module 223 performs a 4-point discrete Fourier transform Discrete Fourier Transform.
  • the processing process of the discrete Fourier transform of the small point base is ordered and simplified.
  • the small-point base discrete Fourier transform can be completed by the first sub-module and the second sub-module; when the first sub-module and the second sub-module can no longer provide 4-point discrete Fourier transform (ie the first sub-module and the second sub-module have provided a 4-point discrete Fourier transform but still need a 4-point discrete Fourier transform for operation), it can be executed by the third sub-module.
  • the embodiment of the present invention further provides a storage medium, on which computer instructions are stored, and when the computer instructions run, the steps of the above-mentioned method for discrete Fourier transform with a 12-multiple point as the processing basis are performed.
  • the embodiment of the present invention also provides an apparatus for processing the discrete Fourier transform of 12 multiples of points.
  • the apparatus 300 for processing a 12-multiple point discrete Fourier transform includes a decomposition module 310 , an operation module 320 , a storage module 330 and an acquisition module 340 .
  • the decomposition module 310 can decompose the 12-multiple points based on the prime factor algorithm, so as to obtain the following first decomposition formula and second decomposition formula based on several coefficients:
  • m is the number of coefficients
  • N is a multiple of 12 points
  • n is the order of the input data in the discrete Fourier transform and is greater than or equal to 0 but less than N
  • ni is the order of n coefficients and have corresponding
  • the value range of , ai is the first decomposition parameter corresponding to ni
  • k is the order of the output data in the discrete Fourier transform and is greater than or equal to 0 but less than N
  • ki is the coefficient of k and has the corresponding
  • the value range of , bi is the second decomposition parameter corresponding to ki.
  • the operation module 320 can respectively perform m+1 rounds of operations using the number of possible values of the coefficients n0 to nm as the small-point basis, and in each round of operation, perform discrete Fourier transform on the small-point basis to obtain the calculation result, wherein, The value of each coefficient satisfies the first decomposition formula.
  • the storage module 330 can store the calculation result in the storage address of the memory as the output data in each round, wherein the storage address includes the storage block number and the relative storage address determined by the following formula:
  • bank_sel is the storage block number
  • bank_addr is the relative storage address
  • ci and di are the first adjustment parameter and the second adjustment parameter, respectively.
  • the obtaining module 340 may obtain the final output data of the discrete Fourier transform based on the second decomposition.
  • the storage module 330 can receive and store the initial input data of the discrete Fourier transform and the output data in each round of operation, and obtain the initial input data in the first round of operation and perform the small-point base discrete Fourier transform , in each subsequent round of operations, the output data of the previous round of operations is obtained as the input data of this round of operations to perform small-point base discrete Fourier transform.
  • the storage module 330 may store the output data in each round of operation at the storage address where the input data in the round of operation is stored.
  • the operation module 320 may, in each round of operation, make the coefficients with the number of possible values as the small-point base take values within their value ranges, and make some coefficients in the remaining coefficients take values within their ranges and sum up / or ping-pong values, and traverse the remaining coefficients in the remaining coefficients to perform small-point base discrete Fourier transform, thereby obtaining the calculation result.
  • the obtaining module 340 may obtain the value of the coefficient of k based on the second decomposition formula, obtain the value of the corresponding coefficient of n based on the value of the coefficient of k, and obtain the value of the coefficient of n based on the value of the coefficient and the storage block number.
  • the calculation formula and the calculation formula of the relative storage address calculate the storage address of the output data, and obtain the final output data based on the storage address.
  • modules and their relationships in the device whose processing basis is 12-multiple-point discrete Fourier transform can refer to the above description of the method for processing the 12-multiple-point discrete Fourier transform method, which will not be repeated here. .
  • each technical solution can be applied to 3G, 4G, 5G systems and systems such as the public land mobile communication network (Public Land Mobile Network, PLMN) evolved in the future, wherein the 5G system includes two kinds of networking, That is, Non-Standalone (NSA) and Standalone (SA).
  • PLMN Public Land Mobile Network
  • NSA Non-Standalone
  • SA Standalone
  • the UE may be an access terminal, a subscriber unit, a subscriber station, a mobile station, a mobile station (Mobile Station, built as an MS), a remote station, a remote terminal, a mobile device, a user terminal, and a terminal device (Terminal).
  • UE can also be a cellular phone, a cordless phone, a Session Initiation Protocol (IP) phone, a Wireless Local Loop (WLL) station, a Personal Digital Processing (Personal) Digital Assistant, PDA), handheld devices with wireless communication capabilities, computing devices or other processing devices connected to wireless modems, in-vehicle devices, wearable devices, UEs in future 5G networks or UEs in future evolved PLMNs, etc.
  • IP Session Initiation Protocol
  • WLL Wireless Local Loop
  • PDA Personal Digital Processing
  • the network device may be a device deployed in a radio access network (Radio Access Network, RAN) to provide a wireless communication function, including but not limited to 3G, 4G, 5G systems and future evolved
  • a radio access network Radio Access Network, RAN
  • the equipment that provides base station functions in the PLMN system for example, the equipment that provides base station functions in 3G networks includes Node Bs (NodeBs), and the equipment that provides base station functions in 4G networks includes evolved Node Bs (evolved NodeBs, eNBs).
  • Network Wireless Local Area Networks, WLAN
  • WLAN wireless Local Area Networks
  • WLAN wireless Local Area Networks
  • 5G NR devices that provide base station functions gNB
  • ng-eNB evolving Node B
  • the processor may be a central processing unit (Central Processing Unit, CPU), and the processor may also be other general-purpose processors, digital signal processors (Digital Signal Processors, DSP), application-specific integrated circuits ( Application Specific Integrated Circuit, ASIC), off-the-shelf Programmable Gate Array (Field Programmable Gate Array, FPGA), other programmable logic devices, discrete gate or transistor logic devices, or discrete hardware components, etc.
  • a general purpose processor may be a microprocessor or the processor may be any conventional processor or the like.
  • the memory may be volatile memory or non-volatile memory, or may include both volatile and non-volatile memory.
  • the non-volatile memory may be a read-only memory (Read-Only Memory, ROM), a programmable read-only memory (Programmable ROM, PROM), an erasable programmable read-only memory (Erasable PROM, EPROM), an electrically programmable read-only memory (Erasable PROM, EPROM). Erase programmable read-only memory (Electrically EPROM, EEPROM) or flash memory.
  • Volatile memory may be Random Access Memory (RAM), which acts as an external cache.
  • RAM Static Random Access Memory
  • DRAM Dynamic Random Access Memory
  • SDRAM Synchronous DRAM
  • SDRAM Double data rate synchronous dynamic random access memory
  • Double Data Rate SDRAM DDR SDRAM
  • enhanced SDRAM ESDRAM
  • synchronous link dynamic random access memory Synchlink DRAM, SLDRAM
  • Direct Rambus RAM Direct Rambus RAM
  • the storage medium includes a U disk, a removable hard disk, a ROM, a RAM, a non-volatile memory (Non-volatile), a non-transitory (Non-transitory) memory, a magnetic disk or an optical disk, etc. medium of program code.
  • each module/unit included in each device and product described in the above embodiments it may be a software module/unit, a hardware module/unit, or a part of a software module/unit and a part of a hardware module/unit .
  • each module/unit included therein may be implemented by hardware such as circuits, or at least some of the modules/units may be implemented by a software program.
  • the remaining (if any) part of the modules/units can be implemented by hardware such as circuits; for each device and product applied to or integrated in the chip module, the modules/units contained therein can be They are all implemented by hardware such as circuits, and different modules/units can be located in the same component of the chip module (such as chips, circuit modules, etc.) or in different components, or at least some of the modules/units can be implemented by software programs.
  • the software program runs on the processor integrated inside the chip module, and the remaining (if any) part of the modules/units can be implemented by hardware such as circuits; for each device and product applied to or integrated in the terminal, each module contained in it
  • the units/units may all be implemented in hardware such as circuits, and different modules/units may be located in the same component (eg, chip, circuit module, etc.) or in different components in the terminal, or at least some of the modules/units may be implemented by software programs Realization, the software program runs on the processor integrated inside the terminal, and the remaining (if any) part of the modules/units can be implemented in hardware such as circuits.

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Abstract

Provided in embodiments of the present invention are a method for processing a discrete Fourier transform having a base of a number of points that is a multiple of 12, a device, an apparatus, and a storage medium. The method comprises decomposing the number of points that is a multiple of 12 on the basis of the prime factor algorithm, and thereby obtaining a first decomposition expression and a second decomposition expression based on a plurality of coefficients; performing m+1 rounds of computation respectively using the number of possible values of each coefficient n0 to nm as small point bases, and during each round of computation, performing a small point base discrete Fourier transformation and obtaining a calculation result, wherein a value of each coefficient satisfies the first decomposition expression; taking the calculation results as output data for each round, and storing said data at storage addresses of a memory, wherein each storage address comprises a storage block number and a relative storage address; and obtaining final output data of the discrete Fourier transform on the basis of the second decomposition expression. A technical solution of an embodiment of the present invention can greatly reduce the complexity of implementing a discrete Fourier transform, and the consumption of computational and storage resources is significantly reduced.

Description

处理基为12倍数点DFT的方法、设备、装置及存储介质Method, apparatus, device and storage medium for processing 12-multiple point DFT
本申请要求于2021年1月29日提交中国专利局、申请号为202110130538.4、发明名称为“处理基为12倍数点DFT的方法、设备、装置及存储介质”的中国专利申请的优先权，其全部内容通过引用结合在本申请中。This application claims the priority of the Chinese patent application filed on January 29, 2021, with the application number of 202110130538.4 and the invention titled “Method, Apparatus, Device and Storage Medium for Processing DFT of 12 Multiples of Points”. The entire contents of this application are incorporated by reference.
技术领域technical field
本发明涉及通信技术领域，尤其涉及一种处理基为12倍数点离散傅里叶变换(DFT)的方法、设备、装置及存储介质。The present invention relates to the technical field of communications, and in particular, to a method, device, device and storage medium for processing a 12-multiple point discrete Fourier transform (DFT).
背景技术Background technique
NR(New Radio)***为由第三代合作伙伴计划(3rd Generation Partnership Project，3GPP)主导的第五代移动通信***(5G)，其中涉及离散傅里叶变换扩频的正交频分复用多址接入(DFT-S-OFDM)的调制技术，这需要采用多个点数的、非2指数次幂的傅里叶变换处理器。The NR (New Radio) system is the fifth generation mobile communication system (5G) led by the 3rd Generation Partnership Project (3GPP), which involves orthogonal frequency division multiplexing of discrete Fourier transform spread spectrum A modulation technique for multiple access (DFT-S-OFDM), which requires the use of a multi-point, non-exponential-of-two Fourier transform processor.
但是，在满足5G的超低时延特性以及资源消耗尽可能少等要求的情形下，非2指数次幂的傅里叶变换处理器比较难以实现。However, in the case of meeting the requirements of 5G's ultra-low latency characteristics and as little resource consumption as possible, it is difficult to implement a Fourier transform processor that is not a power of 2.
发明内容SUMMARY OF THE INVENTION
本发明解决的技术问题是非2指数次幂的傅里叶变换处理器比较难以实现等问题。The technical problem solved by the present invention is that it is difficult to implement a Fourier transform processor that is not a power of 2 exponential power.
为解决上述技术问题，本发明实施例提供一种处理基为12倍数点离散傅里叶变换的方法，包括：In order to solve the above-mentioned technical problems, an embodiment of the present invention provides a method for processing the discrete Fourier transform of a multiple of 12 points, including:
基于素因子算法将12倍数点分解，从而获得如下基于若干个系数的第一分解式和第二分解式：The 12-multiple points are decomposed based on the prime factor algorithm, so as to obtain the following first decomposition formula and second decomposition formula based on several coefficients:
Figure PCTCN2022073624-appb-000001
Figure PCTCN2022073624-appb-000001
Figure PCTCN2022073624-appb-000002
Figure PCTCN2022073624-appb-000002
其中，m为系数的个数，N为12倍数点，第一分解式中n为离散傅里叶变换中输入数据的序并且大于或等于0而小于N，ni为序n的系数并且具有相应的取值范围，ai为与ni对应的第一分解参数，第二分解式中k为离散傅里叶变换中输出数据的序并且大于或等于0而小于N，ki为k的系数并且具有相应的取值范围，bi为与ki对应的第二分解参数；Among them, m is the number of coefficients, N is a multiple of 12 points, in the first decomposition formula, n is the order of the input data in the discrete Fourier transform and is greater than or equal to 0 but less than N, ni is the order of n coefficients and have corresponding The value range of , ai is the first decomposition parameter corresponding to ni, in the second decomposition formula k is the order of the output data in the discrete Fourier transform and is greater than or equal to 0 but less than N, ki is the coefficient of k and has the corresponding The value range of , bi is the second decomposition parameter corresponding to ki;
分别将系数n0至nm的可取值个数作为小点数基而进行m+1轮运算，在每轮运算中，进行小点数基离散傅里叶变换而得到计算结果，其中，各系数的取值满足第一分解式；The number of possible values of the coefficients from n0 to nm is used as the small-point base, and m+1 rounds of operations are performed. In each round of operation, the small-point base discrete Fourier transform is performed to obtain the calculation result. The value satisfies the first decomposition;
将计算结果作为每轮中的输出数据而存储于存储器的存储地址，其中，存储地址包括存储块号和相对存储地址，其通过如下公式选择：The calculation result is stored in the storage address of the memory as the output data in each round, wherein the storage address includes the storage block number and the relative storage address, which is selected by the following formula:
Figure PCTCN2022073624-appb-000003
Figure PCTCN2022073624-appb-000003
Figure PCTCN2022073624-appb-000004
Figure PCTCN2022073624-appb-000004
其中，bank_sel为存储块号，bank_addr为相对存储地址，ci和di分别为第一调节参数和第二调节参数；Wherein, bank_sel is the storage block number, bank_addr is the relative storage address, ci and di are the first adjustment parameter and the second adjustment parameter respectively;
基于第二分解式获取离散傅里叶变换的最终输出数据。The final output data of the discrete Fourier transform is obtained based on the second decomposition.
可选地，上述方法包括，存储器接收并且存储离散傅里叶变换的初始输入数据以及每轮运算中的输出数据，在第一轮运算中获取初始输入数据而进行小点数基离散傅里叶变换，在后续各轮运算中获取前一轮运算的输出数据而作为该轮运算的输入数据以进行小点数基离 散傅里叶变换。Optionally, the above method includes, the memory receives and stores the initial input data of discrete Fourier transform and the output data in each round of operation, and obtains the initial input data in the first round of operation and performs small-point base discrete Fourier transform. , in each subsequent round of operations, the output data of the previous round of operations is obtained as the input data of this round of operations to perform small-point base discrete Fourier transform.
可选地，上述方法包括将每轮运算中的输出数据存储于该轮运算中输入数据所存储的存储地址。Optionally, the above method includes storing the output data in each round of operation at the storage address where the input data in the round of operation is stored.
可选地，上述方法包括，在每轮运算中，使可取值个数作为小点数基的系数在其取值范围内取值，使其余系数中的部分系数在其范围内取值和/或乒乓取值，并且遍历其余系数中的剩余系数以进行小点数基离散傅里叶变换，从而得到计算结果。Optionally, the above method includes, in each round of operation, making the coefficients with the number of possible values as the small point base take values within their value ranges, and making some of the remaining coefficients take values within their ranges and/or Or ping-pong values, and traverse the remaining coefficients in the remaining coefficients to perform a small-point base discrete Fourier transform to obtain the calculation result.
可选地，在存储块号的计算公式中，取值范围为2、3、4、5的系数所对应的第一调节参数分别为6、4、3、2。Optionally, in the calculation formula of the storage block number, the first adjustment parameters corresponding to the coefficients whose value ranges are 2, 3, 4, and 5 are 6, 4, 3, and 2, respectively.
可选地，相对存储地址的计算公式包括关于n0至nm的多项，其中，第一个取值范围为3的系数所对应的第二调节参数为0，第一个取值范围为4的系数所对应的第二调节参数为0，第一个不为0的第二调节参数为1，其余不为0的第二调节参数为其前面紧邻的、第二调节参数不为0的项中相应系数可取值的个数与相应第二调节参数的乘积。Optionally, the calculation formula of the relative storage address includes multiple items about n0 to nm, wherein the second adjustment parameter corresponding to the coefficient whose first value range is 3 is 0, and the first value range is 4. The second adjustment parameter corresponding to the coefficient is 0, the first second adjustment parameter that is not 0 is 1, and the other second adjustment parameters that are not 0 are the items that are immediately preceding and the second adjustment parameter is not 0. The product of the number of possible values of the corresponding coefficient and the corresponding second adjustment parameter.
可选地，基于第二分解式获取离散傅里叶变换的最终输出数据包括，基于第二分解式获取k的系数的取值，基于k的系数的取值获取对应的n的系数的取值，基于n的系数的取值、存储块号的计算公式和相对存储地址的计算公式计算输出数据的存储地址，以及基于存储地址获取最终输出数据。Optionally, obtaining the final output data of the discrete Fourier transform based on the second decomposition formula includes obtaining the value of the coefficient of k based on the second decomposition formula, and obtaining the value of the corresponding coefficient of n based on the value of the coefficient of k. , calculate the storage address of the output data based on the value of the coefficient of n, the calculation formula of the storage block number and the calculation formula of the relative storage address, and obtain the final output data based on the storage address.
本发明实施例还提供一种处理离散傅里叶变换的设备，包括存储器和处理模块，存储器适于接收并且存储离散傅里叶变换的初始输入数据以及每轮运算中的输出数据，处理模块适于执行上述处理基为12倍数点离散傅里叶变换的方法的步骤。The embodiment of the present invention also provides a device for processing discrete Fourier transform, including a memory and a processing module, the memory is suitable for receiving and storing the initial input data of the discrete Fourier transform and the output data in each round of operation, and the processing module is suitable for receiving and storing the discrete Fourier transform. in the steps of executing the above-mentioned method for processing the discrete Fourier transform of 12-multiple points.
可选地，上述设备包括于网络设备或者用户设备。Optionally, the above-mentioned device is included in a network device or a user equipment.
可选地，处理模块包括第一子模块、第二子模块和第三子模块，其中，第一子模块适于执行1个5点或1个4点或2个3点或3个2 点离散傅里叶变换，第二子模块适于执行1个5点或1个4点或2个3点或3个2点离散傅里叶变换，第三模块适于执行1个4点离散傅里叶变换。Optionally, the processing module includes a first submodule, a second submodule and a third submodule, wherein the first submodule is adapted to perform 1 5-point or 1 4-point or 2 3-point or 3 2-point Discrete Fourier Transform, the second sub-module is adapted to perform 1 5-point or 1 4-point or 2 3-point or 3 2-point discrete Fourier transforms, and the third module is adapted to perform a 4-point discrete Fourier transform Lie transform.
本发明实施例还提供一种存储介质，其上存储有计算机指令，计算机指令运行时执行上述处理基为12倍数点离散傅里叶变换的方法的步骤。The embodiment of the present invention further provides a storage medium, on which computer instructions are stored, and when the computer instructions are run, the steps of the above-mentioned method for processing a 12-multiple point discrete Fourier transform as a basis are executed.
本发明实施例还提供一种处理基为12倍数点离散傅里叶变换的装置，包括：An embodiment of the present invention also provides a device for processing a discrete Fourier transform with a multiple of 12 points, including:
分解模块，其适于基于素因子算法将12倍数点分解，从而获得如下基于若干个系数的第一分解式和第二分解式：The decomposition module is adapted to decompose the 12-multiple points based on the prime factor algorithm, thereby obtaining the following first decomposition formula and second decomposition formula based on several coefficients:
Figure PCTCN2022073624-appb-000005
Figure PCTCN2022073624-appb-000005
Figure PCTCN2022073624-appb-000006
Figure PCTCN2022073624-appb-000006
其中，m为系数的个数，N为12倍数点，第一分解式中n为离散傅里叶变换中输入数据的序并且大于或等于0而小于N，ni为序n的系数并且具有相应的取值范围，ai为与ni对应的第一分解参数，第二分解式中k为离散傅里叶变换中输出数据的序并且大于或等于0而小于N，ki为k的系数并且具有相应的取值范围，bi为与ki对应的第二分解参数；Among them, m is the number of coefficients, N is a multiple of 12 points, in the first decomposition formula, n is the order of the input data in the discrete Fourier transform and is greater than or equal to 0 but less than N, ni is the order of n coefficients and have corresponding The value range of , ai is the first decomposition parameter corresponding to ni, in the second decomposition formula k is the order of the output data in the discrete Fourier transform and is greater than or equal to 0 but less than N, ki is the coefficient of k and has the corresponding The value range of , bi is the second decomposition parameter corresponding to ki;
运算模块，其适于分别将系数n0至nm的可取值个数作为小点数基而进行m+1轮运算，在每轮运算中，进行小点数基离散傅里叶变换而得到计算结果，其中，各系数的取值满足第一分解式；an operation module, which is suitable for performing m+1 rounds of operations using the number of possible values of coefficients n0 to nm as the small-point basis, and in each round of operation, performs discrete Fourier transform on the small-point basis to obtain the calculation result, Wherein, the value of each coefficient satisfies the first decomposition formula;
存储模块，其适于将计算结果作为每轮中的输出数据而存储于存储器的存储地址，其中，存储地址包括通过如下公式确定的存储块号和相对存储地址：The storage module is adapted to store the calculation result as the output data in each round at the storage address of the memory, wherein the storage address includes the storage block number and the relative storage address determined by the following formula:
Figure PCTCN2022073624-appb-000007
Figure PCTCN2022073624-appb-000007
Figure PCTCN2022073624-appb-000008
Figure PCTCN2022073624-appb-000008
其中，bank_sel为存储块号，bank_addr为相对存储地址，ci和di分别为第一调节参数和第二调节参数；Wherein, bank_sel is the storage block number, bank_addr is the relative storage address, ci and di are the first adjustment parameter and the second adjustment parameter respectively;
获取模块，其适于基于第二分解式获取离散傅里叶变换的最终输出数据。An acquisition module adapted to acquire the final output data of the discrete Fourier transform based on the second decomposition.
可选地，存储模块适于接收并且存储离散傅里叶变换的初始输入数据以及每轮运算中的输出数据，在第一轮运算中获取初始输入数据而进行小点数基离散傅里叶变换，在后续各轮运算中获取前一轮运算的输出数据而作为该轮运算的输入数据以进行小点数基离散傅里叶变换。Optionally, the storage module is adapted to receive and store the initial input data of the discrete Fourier transform and the output data in each round of operation, obtain the initial input data in the first round of operation and carry out the small-point base discrete Fourier transform, In subsequent rounds of operation, the output data of the previous round of operation is obtained as the input data of this round of operation to perform small-point base discrete Fourier transform.
可选地，存储模块适于将每轮运算中的输出数据存储于该轮运算中输入数据所存储的存储地址。Optionally, the storage module is adapted to store the output data in each round of operation at the storage address where the input data in the round of operation is stored.
可选地，运算模块适于在每轮运算中，使可取值个数作为小点数基的系数在其取值范围内取值，使其余系数中的部分系数在其范围内取值和/或乒乓取值，并且遍历其余系数中的剩余系数以进行小点数基离散傅里叶变换，从而得到计算结果。Optionally, the operation module is adapted to, in each round of operation, make the coefficients with the number of possible values as the small-point number base take values within their value ranges, and make some coefficients in the remaining coefficients take values within their ranges and/or Or ping-pong values, and traverse the remaining coefficients in the remaining coefficients to perform a small-point base discrete Fourier transform to obtain the calculation result.
可选地，获取模块适于：基于第二分解式获取k的系数的取值，基于k的系数的取值获取对应的n的系数的取值，基于n的系数的取值、存储块号的计算公式和相对存储地址的计算公式计算输出数据的存储地址，以及基于存储地址获取最终输出数据。Optionally, the obtaining module is adapted to: obtain the value of the coefficient of k based on the second decomposition formula, obtain the value of the corresponding coefficient of n based on the value of the coefficient of k, obtain the value of the coefficient of n based on the value of the coefficient, the storage block number. The calculation formula and the calculation formula of the relative storage address calculate the storage address of the output data, and obtain the final output data based on the storage address.
与现有技术相比，本发明实施例的技术方案具有以下有益效果。Compared with the prior art, the technical solutions of the embodiments of the present invention have the following beneficial effects.
例如，在本发明的实施例中，对于基为12倍数点离散傅里叶变换，将12倍数点分解，从而获得基于若干个系数的第一分解式和第二分解式，分别将各个系数的可取值个数作为小点数基而进行m+1轮运算，并且将计算结果作为每轮中的输出数据而存储于存储器的存储地址，从而获取离散傅里叶变换的最终输出数据；该技术方案可以 极大地降低DFT实现的复杂度，显著地减少对计算和存储资源的消耗，并且有效地满足5G关于超低时延特性的要求。For example, in the embodiment of the present invention, for the discrete Fourier transform of the 12-multiple points as the basis, the 12-multiple points are decomposed to obtain the first decomposition formula and the second decomposition formula based on several coefficients. The number of possible values is used as a small point base to perform m+1 rounds of operations, and the calculation results are stored in the storage address of the memory as the output data in each round, so as to obtain the final output data of the discrete Fourier transform; this technology The solution can greatly reduce the complexity of DFT implementation, significantly reduce the consumption of computing and storage resources, and effectively meet the requirements of 5G for ultra-low latency characteristics.
又例如，在本发明的实施例中，存储器包括多个存储块(bank)，而存储块号通过bank_sel选择；这可以增大运算的并发度，从而显著地减少处理时间，降低运算时延。For another example, in the embodiment of the present invention, the memory includes multiple storage blocks (banks), and the storage block number is selected by bank_sel; this can increase the concurrency of operations, thereby significantly reducing processing time and operation delay.
又例如，在本发明的实施例中，将每轮运算中的输出数据存储于该轮运算中输入数据所存储的存储地址，使得在离散傅里叶变换的过程中存储器的存储地址被同址使用，从而使得存储地址能够高效地复用。For another example, in the embodiment of the present invention, the output data in each round of operation is stored in the storage address where the input data is stored in the round of operation, so that the storage address of the memory is co-located in the process of discrete Fourier transform. used, so that memory addresses can be efficiently multiplexed.
附图说明Description of drawings
图1为本发明实施例中处理基为12倍数点离散傅里叶变换的方法的流程图；1 is a flowchart of a method in which a processing basis is a 12-multiple point discrete Fourier transform in an embodiment of the present invention;
图2为本发明实施例中处理离散傅里叶变换的设备的结构示意图；2 is a schematic structural diagram of a device for processing discrete Fourier transform in an embodiment of the present invention;
图3为本发明实施例中处理模块的结构示意图；3 is a schematic structural diagram of a processing module in an embodiment of the present invention;
图4为本发明实施例中处理基为12倍数点离散傅里叶变换的装置的结构示意图。FIG. 4 is a schematic structural diagram of an apparatus in which the processing basis is a 12-multiple point discrete Fourier transform according to an embodiment of the present invention.
具体实施方式Detailed ways
为了使本发明的上述目的、特征和优点能够更为明显易懂，下面结合附图对本发明的具体实施例做详细的说明。In order to make the above objects, features and advantages of the present invention more clearly understood, specific embodiments of the present invention will be described in detail below with reference to the accompanying drawings.
图1示出了本发明实施例一种处理基为12倍数点离散傅里叶变换的方法100的流程图。FIG. 1 shows a flowchart of a method 100 for processing a discrete Fourier transform with a multiple of 12 points according to an embodiment of the present invention.
离散傅里叶变换可以通过如下公式表示：The discrete Fourier transform can be expressed by the following formula:
Figure PCTCN2022073624-appb-000009
Figure PCTCN2022073624-appb-000009
其中，N为点数，n和k均在0至N-1之间取值，x(n)为离散傅里叶变换的输入数据，X(k)为离散傅里叶变换的输出数据。Among them, N is the number of points, both n and k are between 0 and N-1, x(n) is the input data of the discrete Fourier transform, and X(k) is the output data of the discrete Fourier transform.
在本发明的实施例中，N为12倍数点。In the embodiment of the present invention, N is a multiple of 12 points.
具体而言，5G NR标准的DFT-S-OFDM技术中离散傅里叶变换的点数具有多种，其中的一部分为12的倍数，有53种，包括：12、24、36、48、60、72、96、108、120、144、180、192、216、240、288、300、324、360、384、432、480、540、576、600、648、720、768、864、900、960、972、1080、1152、1200、1296、1440、1500、1536、1620、1728、1800、1920、1944、2160、2304、2400、2592、2700、2880、2916，3000、3072、3240。Specifically, there are various points of discrete Fourier transform in the DFT-S-OFDM technology of the 5G NR standard, some of which are multiples of 12, and there are 53 types, including: 12, 24, 36, 48, 60, 72, 96, 108, 120, 144, 180, 192, 216, 240, 288, 300, 324, 360, 384, 432, 480, 540, 576, 600, 648, 720, 768, 864, 900, 960, 972, 1080, 1152, 1200, 1296, 1440, 1500, 1536, 1620, 1728, 1800, 1920, 1944, 2160, 2304, 2400, 2592, 2700, 2880, 2916, 3000, 3072, 3240.
方法100包括步骤110、120、130和140。 Method 100 includes steps 110 , 120 , 130 and 140 .
在步骤110的执行中，可以基于素因子算法将12倍数点分解。In the execution of step 110, the 12-multiple points may be decomposed based on a prime factor algorithm.
具体而言，根据素因子算法(PFA)，N可以被分解为互素的二个数，即N＝N 1N 2，其中，N 1和N 2互素；并且，n、k可以通过如下公式表示： Specifically, according to the Prime Factor Algorithm (PFA), N can be decomposed into two co-prime numbers, namely N=N 1 N 2 , where N 1 and N 2 are co-prime; and, n and k can be determined by the following The formula says:
Figure PCTCN2022073624-appb-000010
Figure PCTCN2022073624-appb-000010
Figure PCTCN2022073624-appb-000011
Figure PCTCN2022073624-appb-000011
N 1和N 2中的至少一者仍可以继续分解，直至分解的因子仅包括5、3、4、2。此时，N被分解，从而获得基于若干个系数的第一分解式和第二分解式，分别通过如下公式(4)和(5)表示： At least one of N 1 and N 2 can still continue to decompose until the decomposed factors include only 5, 3, 4, and 2. At this time, N is decomposed to obtain the first decomposition formula and the second decomposition formula based on several coefficients, which are respectively expressed by the following formulas (4) and (5):
Figure PCTCN2022073624-appb-000012
Figure PCTCN2022073624-appb-000012
Figure PCTCN2022073624-appb-000013
Figure PCTCN2022073624-appb-000013
其中，m为系数的个数，N为12倍数点，n为离散傅里叶变换中输入 数据的序并且大于或等于0而小于N，ni为序n的系数并且具有相应的取值范围，ai为与ni对应的第一分解参数，k为离散傅里叶变换中输出数据的序并且大于或等于0而小于N，ki为k的系数并且具有相应的取值范围，bi为与ki对应的第二分解参数。Among them, m is the number of coefficients, N is a multiple of 12 points, n is the order of the input data in the discrete Fourier transform and is greater than or equal to 0 but less than N, ni is the coefficient of order n and has a corresponding value range, ai is the first decomposition parameter corresponding to ni, k is the order of the output data in the discrete Fourier transform and is greater than or equal to 0 but less than N, ki is the coefficient of k and has a corresponding value range, bi is the corresponding value to ki The second decomposition parameter of .
系数n0到nm分别为所分解的各因子的索引，系数n0到nm的取值范围分别与对应因子的数值相关，例如，系数ni对应的因子为I，则ni的取值范围为0至I-1。The coefficients n0 to nm are the indices of the decomposed factors, and the value ranges of the coefficients n0 to nm are related to the values of the corresponding factors. For example, if the factor corresponding to the coefficient ni is 1, the value range of ni is 0 to 1. -1.
在本发明的实施例中，可以按照因子5、3、4、2的先后顺序进行分解，以使得分解的步骤简化而有效。In the embodiment of the present invention, the decomposition may be performed in the order of factors 5, 3, 4, and 2, so that the decomposition steps are simplified and effective.
在步骤120的执行中，可以分别将系数n0至nm的可取值个数作为小点数基而进行m+1轮运算；在每轮运算中，进行小点数基离散傅里叶变换而得到计算结果，其中，各系数的取值满足第一分解式。During the execution of step 120, m+1 rounds of operations can be performed with the number of possible values of the coefficients n0 to nm as the small-point basis; As a result, the value of each coefficient satisfies the first decomposition formula.
在每轮运算中，可以使可取值个数作为小点数基的系数在其取值范围内取值，使其余系数中的部分系数在其范围内取值和/或乒乓取值。In each round of operation, the coefficients whose number of possible values can be used as the decimal point base can take values within their value ranges, and some of the remaining coefficients can take values within their ranges and/or ping-pong values.
小点数基离散傅里叶变换包括如下三种情形。Small-point base discrete Fourier transform includes the following three cases.
在情形一下，于第ni轮运算中，ni在其取值范围(0至P-1)内取值，除ni之外的其余系数中，可以取出系数nq(其取值范围为0至Q-1)的值，从而实现一次做Q个基为P的小点数离散傅里叶变换。In this case, in the nith round of operation, ni takes a value in its value range (0 to P-1), and the coefficient nq (its value range is 0 to Q) can be taken out of the remaining coefficients except ni -1), so as to realize Q small-point discrete Fourier transforms with P as the basis at a time.
在情形二下，于第ni轮运算中，ni在其取值范围(0至P-1)内取值，除ni之外的其余系数中，可以通过乒乓方式取系数nr的值，从而实现一次做2个基为P的小点数离散傅里叶变换。In case 2, in the nith round of operation, ni takes a value within its value range (0 to P-1), and in the remaining coefficients except ni, the value of the coefficient nr can be taken in a ping-pong manner, so as to achieve Do 2 small-point discrete Fourier transforms with base P at a time.
在情形三下，于第ni轮运算中，ni在其取值范围(0至P-1)内取值，除ni之外的其余系数中，可以取出系数ns(其取值范围为0至S-1)的值、并且通过乒乓方式取系数nt的值，从而实现一次做2S个基为P的小点数离散傅里叶变换。In case 3, in the nith round of operation, ni takes a value within its value range (0 to P-1), and the coefficient ns can be taken out of the remaining coefficients except ni (its value range is 0 to P-1). S-1) and take the value of the coefficient nt through the ping-pong method, so as to achieve 2S small-point discrete Fourier transforms with the basis as P at a time.
接着，遍历其余系数中的剩余系数以进行小点数基离散傅里叶变换，从而得到计算结果。Next, the remaining coefficients in the remaining coefficients are traversed to perform the discrete Fourier transform of the small-point basis, thereby obtaining the calculation result.
在具体实施中，对其余系数中的剩余系数，可以通过嵌套循环(例如基于for语句的嵌套循环)覆盖剩余系数中各个系数取值的所有组合方式。In a specific implementation, for the remaining coefficients in the remaining coefficients, all combinations of the values of the respective coefficients in the remaining coefficients may be covered by a nested loop (eg, a nested loop based on a for statement).
可以通过处理模块进行小点数基离散傅里叶变换。Small point base discrete Fourier transform can be performed by the processing module.
在具体实施中，处理模块可以包括三个子模块而分别进行小点数基离散傅里叶变换，其中，第一子模块执行1个5点或1个4点或2个3点或3个2点离散傅里叶变换，第二子模块执行1个5点或1个4点或2个3点或3个2点离散傅里叶变换，第三子模块执行1个4点离散傅里叶变换。In a specific implementation, the processing module may include three sub-modules to perform discrete Fourier transform of small-point basis respectively, wherein the first sub-module performs one 5-point or one 4-point or two 3-point or three 2-point Discrete Fourier Transform, the second sub-module performs 1 5-point or 1 4-point or 2 3-point or 3 2-point discrete Fourier transforms, and the third sub-module performs 1 4-point discrete Fourier transform .
通过该三个子模块的设置，使得小点数基离散傅里叶变换的处理过程有序并且简化。例如，可以通过第一子模块和第二子模块完成小点数基离散傅里叶变换；在第一子模块和第二子模块无法再提供4点离散傅里叶变换时(即第一子模块和第二子模块均已提供了1个4点离散傅里叶变换但仍需1个4点离散傅里叶变换进行运算时)，可以再通过第三子模块来执行。Through the setting of the three sub-modules, the processing process of the discrete Fourier transform of the small point base is ordered and simplified. For example, the small-point base discrete Fourier transform can be completed by the first sub-module and the second sub-module; when the first sub-module and the second sub-module can no longer provide 4-point discrete Fourier transform (ie the first sub-module and the second sub-module have provided a 4-point discrete Fourier transform but still need a 4-point discrete Fourier transform for operation), it can be executed by the third sub-module.
在步骤130的执行中，可以将计算结果作为每轮中的输出数据而存储于存储器的存储地址。In the execution of step 130, the calculation result may be stored in the storage address of the memory as the output data in each round.
存储器接收和存储离散傅里叶变换的初始输入数据x(n)；每轮运算中的输出数据也回传到存储器进行存储，并且作为下一轮运算的输入数据。The memory receives and stores the initial input data x(n) of the discrete Fourier transform; the output data in each round of operation is also returned to the memory for storage, and is used as the input data of the next round of operation.
可以将每轮运算中的输出数据存储于该轮运算中输入数据所存储的存储，以进行同址回写，在一轮运算结束后，N个数据都完成了更新，从而使得存储地址能够高效地复用。The output data in each round of operation can be stored in the storage of the input data in this round of operation for co-location write-back. After one round of operation, the N data are updated, so that the storage address can be efficiently stored. reuse.
在第一轮运算中从存储器获取初始输入数据x(n)而进行小点数基离散傅里叶变换；在后续各轮运算中获取前一轮运算的输出数据以 作为该轮运算的输入数据，从而进行小点数基离散傅里叶变换。In the first round of operation, the initial input data x(n) is obtained from the memory and the discrete Fourier transform of the small point base is performed; in the subsequent rounds of operation, the output data of the previous round of operation is obtained as the input data of this round of operation, Thereby, the discrete Fourier transform of the small point base is performed.
存储器可以包括一个、二个或多个，例如，设置二个或者多个存储器以用于乒乓取值。The memory may include one, two or more, for example, two or more memories are provided for ping-pong values.
每个存储器可以包括多个存储块，例如，12个存储块；这可以增大运算的并发度，从而显著地减少处理时间，降低运算时延。Each memory may include multiple storage blocks, for example, 12 storage blocks; this can increase the concurrency of operations, thereby significantly reducing processing time and operation delay.
可以将计算结果作为每轮中的输出数据而存储于存储器的存储地址，其中，存储地址包括存储块号和相对存储地址，可以通过如下公式选择：The calculation result can be stored in the storage address of the memory as the output data in each round, wherein the storage address includes the storage block number and the relative storage address, which can be selected by the following formula:
Figure PCTCN2022073624-appb-000014
Figure PCTCN2022073624-appb-000014
Figure PCTCN2022073624-appb-000015
Figure PCTCN2022073624-appb-000015
其中，bank_sel为存储块号，bank_addr为相对存储地址，ci和di分别为第一调节参数和第二调节参数。Wherein, bank_sel is the storage block number, bank_addr is the relative storage address, and ci and di are the first adjustment parameter and the second adjustment parameter, respectively.
可以基于设置规则确定第一调节参数和第二调节参数。The first adjustment parameter and the second adjustment parameter may be determined based on the setting rule.
在一些实施例中，公式(6)中取值范围为2、3、4、5的系数所对应的第一调节参数分别为6、4、3、2；公式(7)中关于系数n0至nm的多项可以按照n0、n1、……、nm的顺序从前向后排列，其中，第一个取值范围为3的系数所对应的第二调节参数为0，第一个取值范围为4的系数所对应的第二调节参数为0，第一个不为0的第二调节参数为1，其余不为0的第二调节参数为其前面紧邻的、第二调节参数不为0的项中相应系数可取值的个数与相应第二调节参数的乘积。In some embodiments, the first adjustment parameters corresponding to the coefficients whose value ranges are 2, 3, 4, and 5 in formula (6) are 6, 4, 3, and 2, respectively; The polynomials of nm can be arranged from front to back in the order of n0, n1, ..., nm, wherein the second adjustment parameter corresponding to the coefficient whose first value range is 3 is 0, and the first value range is The second adjustment parameter corresponding to the coefficient of 4 is 0, the first second adjustment parameter that is not 0 is 1, and the other second adjustment parameters that are not 0 are the ones that are immediately preceding and the second adjustment parameter is not 0. The product of the number of possible values of the corresponding coefficient in the term and the corresponding second adjustment parameter.
通过设置第一调节参数和第二调节参数，可以使得数据能够分散存储于存储器中，避免了数据存储时的地址冲突。By setting the first adjustment parameter and the second adjustment parameter, data can be scattered and stored in the memory, thereby avoiding address conflict during data storage.
在步骤140的执行中，可以基于第二分解式获取离散傅里叶变换的最终输出数据X(k)。In the execution of step 140, the final output data X(k) of the discrete Fourier transform may be obtained based on the second decomposition formula.
具体而言，k可以在0至N-1之间取值，基于k的各个取值，根据第二分解式(即公式(5))获取k的系数的取值。Specifically, k can take a value between 0 and N-1, and based on each value of k, the value of the coefficient of k is obtained according to the second decomposition formula (ie, formula (5)).
在离散傅里叶变换中，由于k的系数与n的系数具有对应关系，因此，基于k的系数的取值可以获取对应的n的系数的取值。In the discrete Fourier transform, since the coefficient of k has a corresponding relationship with the coefficient of n, the corresponding value of the coefficient of n can be obtained based on the value of the coefficient of k.
基于n的系数的取值、存储块号的计算公式(即公式(6))和相对存储地址的计算公式(即公式(7))计算输出数据的存储地址，以及基于存储地址获取最终输出数据X(k)。Calculate the storage address of the output data based on the value of the coefficient of n, the calculation formula of the storage block number (ie formula (6)) and the calculation formula of the relative storage address (ie formula (7)), and obtain the final output data based on the storage address. X(k).
以下描述基为3240离散傅里叶变换的运算过程。The following describes the operation process based on the 3240 discrete Fourier transform.
可以基于素因子算法将3240按照5、3、4、2的先后顺序进行分解，即，3240＝5*3*3*3*3*4*2；系数n0到n6分别为因子5、3、3、3、3、4、2的索引，对应的取值范围分别为0至4、0至2、0至2、0至2、0至2、0至3、0至1。3240 can be decomposed in the order of 5, 3, 4, and 2 based on the prime factor algorithm, that is, 3240=5*3*3*3*3*4*2; coefficients n0 to n6 are factors 5, 3, The indices of 3, 3, 3, 4, and 2, and the corresponding value ranges are 0 to 4, 0 to 2, 0 to 2, 0 to 2, 0 to 2, 0 to 3, and 0 to 1, respectively.
序n和k可以通过如下公式表示：The order n and k can be expressed by the following formulas:
n＝(648n0+1080n1+360n2+120n3+40n4+810n5+405n6)mod 3240    (8)n=(648n0+1080n1+360n2+120n3+40n4+810n5+405n6)mod 3240 (8)
k＝(1296k0+3160k1+3000k2+2520k3+1080k4+2025k5+1620k6)mod 3240    (9)k=(1296k0+3160k1+3000k2+2520k3+1080k4+2025k5+1620k6)mod 3240 (9)
其中，n0的取值范围为0至4，n1的取值范围为0至2，n2的取值范围为0至2，n3的取值范围为0至2，n4的取值范围为0至2，n5的取值范围为0至3，n6的取值范围为0至1；k0的取值范围为0至4，k1的取值范围为0至2，k2的取值范围为0至2，k3的取值范围为0至2，k4的取值范围为0至2，k5的取值范围为0至3，k6的取值范围为0至1。The value range of n0 is 0 to 4, the value range of n1 is 0 to 2, the value range of n2 is 0 to 2, the value range of n3 is 0 to 2, and the value range of n4 is 0 to 2. 2, the value range of n5 is 0 to 3, the value range of n6 is 0 to 1; the value range of k0 is 0 to 4, the value range of k1 is 0 to 2, and the value range of k2 is 0 to 1 2. The value range of k3 is 0 to 2, the value range of k4 is 0 to 2, the value range of k5 is 0 to 3, and the value range of k6 is 0 to 1.
可以设置12个存储块以进行并发运算。12 memory blocks can be set for concurrent operations.
如前文所述，可以通过设置规则确定存储块号的计算公式和相对存储地址的计算公式中的第一调节参数和第二调节参数；基为3240 时，离散傅里叶变换中存储块号和相对存储地址可以通过如下公式选择：As mentioned above, the first adjustment parameter and the second adjustment parameter in the calculation formula of the storage block number and the calculation formula of the relative storage address can be determined by setting rules; when the base is 3240, the storage block number and The relative storage address can be selected by the following formula:
bank_sel＝(6n6+3n5+4n4+4n3+4n2+4n1+2n0)mod 12      (10)bank_sel=(6n6+3n5+4n4+4n3+4n2+4n1+2n0)mod 12 (10)
bank_addr＝135n6+0n5+45n4+15n3+5n2+0n1+n0        (11)bank_addr=135n6+0n5+45n4+15n3+5n2+0n1+n0 (11)
需要经过7轮(依次从n0轮到n6轮)以完成基为3240离散傅里叶变换的运算。It needs to go through 7 rounds (sequentially from n0 rounds to n6 rounds) to complete the operation of the base 3240 discrete Fourier transform.
在n0轮，取n0的5个值0到4，取n5的值为(0,1)和(2,3)并且进行乒乓取值，从而实现一次进行2个基为5离散傅里叶变换的并行运算。In the n0 round, take 5 values of n0 from 0 to 4, take the values of n5 as (0, 1) and (2, 3) and perform ping-pong values, so as to realize the discrete Fourier transform of 2 bases of 5 at a time of parallel operations.
具体而言，通过如下方式对n6、n4、n3、n2、n1的5个值进行遍历选取：Specifically, the 5 values of n6, n4, n3, n2, and n1 are traversed and selected as follows:
Figure PCTCN2022073624-appb-000016
Figure PCTCN2022073624-appb-000016
在如上{}处，基于n0和n5而取出2组5个值进行基为5离散傅里叶变换，共进行3240/10＝324次运算，每次运算包括2组基为5离散傅里叶变换。At {} above, based on n0 and n5, 2 groups of 5 values are taken out to perform a 5-based discrete Fourier transform, and a total of 3240/10=324 operations are performed, and each operation includes 2 groups of 5-based discrete Fourier transforms transform.
将各系数(n0至n6)每次选取的值代入公式(10)和(11)而获得存储地址(包括存储块号和相对存储地址)，并且将该次运算的输出数据存储于该存储地址。Substitute the selected value of each coefficient (n0 to n6) into formulas (10) and (11) to obtain the storage address (including the storage block number and relative storage address), and store the output data of this operation in the storage address. .
在n1轮，取n1的3个值0到2，取n5的值0到3，从而实现一次进行4个基为3离散傅里叶变换的并行运算。In the n1 round, take the three values of n1 from 0 to 2, and take the value of n5 from 0 to 3, so as to realize the parallel operation of four base-3 discrete Fourier transforms at a time.
具体而言，通过如下方式对n6、n4、n3、n2、n0的5个值进行遍历选取：Specifically, the 5 values of n6, n4, n3, n2, and n0 are traversed and selected as follows:
Figure PCTCN2022073624-appb-000017
Figure PCTCN2022073624-appb-000017
在如上{}处，基于n1和n5而取出4组3个值进行基为3离散傅里叶变换，共进行3240/12＝270次、每次4个基为3离散傅里叶变换。At {} above, based on n1 and n5, 4 groups of 3 values are taken out to perform a 3-based discrete Fourier transform, and a total of 3240/12=270 times are performed, and each 4 basis is a 3-based discrete Fourier transform.
将各系数(n0至n6)每次选取的值代入公式(10)和(11)而获得存储地址(包括存储块号和相对存储地址)，并且将该次运算的输出数据存储于该存储地址。Substitute the selected value of each coefficient (n0 to n6) into formulas (10) and (11) to obtain the storage address (including the storage block number and relative storage address), and store the output data of this operation in the storage address. .
n2、n3、n4轮与n1轮的处理过程类似。The processing of the n2, n3, and n4 rounds is similar to that of the n1 round.
在n5轮，取n5的4个值0到3，取n1的3个值0到2，从而实现一次进行3个基为4离散傅里叶变换的并行运算。In the n5 round, 4 values of n5 are taken from 0 to 3, and 3 values of n1 are taken from 0 to 2, so as to realize a parallel operation of 3 base-4 discrete Fourier transforms at a time.
具体而言，通过如下方式对n6、n4、n3、,n2、n0的5个值进行遍历选取：Specifically, the 5 values of n6, n4, n3, n2, and n0 are traversed and selected in the following manner:
Figure PCTCN2022073624-appb-000018
Figure PCTCN2022073624-appb-000018
Figure PCTCN2022073624-appb-000019
Figure PCTCN2022073624-appb-000019
在如上{}处，基于n5和n1而取出3组4个值进行基为4离散傅里叶变换，共进行3240/12＝270次、每次3个基为4离散傅里叶变换。At {} above, based on n5 and n1, 3 groups of 4 values are taken out to perform a 4-based discrete Fourier transform, and a total of 3240/12=270 times are performed, and each 3 basis is a 4-based discrete Fourier transform.
将各系数(n0至n6)每次选取的值代入公式(10)和(11)而获得存储地址(包括存储块号和相对存储地址)，并且将该次运算的输出数据存储于该存储地址。Substitute the selected value of each coefficient (n0 to n6) into formulas (10) and (11) to obtain the storage address (including the storage block number and relative storage address), and store the output data of this operation in the storage address. .
在n6轮，取n6的2个值0到1，取n1的值为(0,1,2)，取n5的值为(0,2)和(1,3)并且进行乒乓取值，从而实现一次进行6个基为2离散傅里叶变换的并行运算。In the n6 round, take the 2 values of n6 from 0 to 1, take the value of n1 as (0, 1, 2), take the value of n5 as (0, 2) and (1, 3) and perform ping-pong values, thus It realizes the parallel operation of 6 base-2 discrete Fourier transforms at a time.
具体而言，通过如下方式对n4、n3、n2、n0的4个值进行遍历选取：Specifically, the 4 values of n4, n3, n2, and n0 are traversed and selected as follows:
Figure PCTCN2022073624-appb-000020
Figure PCTCN2022073624-appb-000020
在如上{}处，基于n6、n1和n5而取出6组2个值进行基为2离散傅里叶变换，共进行3240/12＝270次运算，每次运算包括6组基为2离散傅里叶变换。At {} above, based on n6, n1, and n5, 6 groups of 2 values are taken out to perform a base-2 discrete Fourier transform, and a total of 3240/12=270 operations are performed, and each operation includes 6 groups of base-2 discrete Fourier transforms Lie transform.
将各系数(n0至n6)每次选取的值代入公式(10)和(11)而获得存储地址(包括存储块号和相对存储地址)，并且将该次运算的输出数据存储于该存储地址。Substitute the selected value of each coefficient (n0 to n6) into formulas (10) and (11) to obtain the storage address (including the storage block number and relative storage address), and store the output data of this operation in the storage address. .
完成以上7轮运算后，可以基于第二分解式(即公式(9))获取基为3240离散傅里叶变换的最终输出数据。After the above 7 rounds of operations are completed, the final output data of the 3240-based discrete Fourier transform can be obtained based on the second decomposition formula (ie, formula (9)).
上文描述基为3240离散傅里叶变换的运算过程，应理解，基为其他12倍数点离散傅里叶变换具有类似的运算过程。The above describes the operation process of the 3240 discrete Fourier transform as the basis, and it should be understood that the basis is other 12-multiple point discrete Fourier transforms with a similar operation process.
如前文所述，可以通过设置规则确定存储块号的计算公式和相对存储地址的计算公式中的第一调节参数和第二调节参数；基为其他12倍数点时，离散傅里叶变换中存储块号和相对存储地址可以通过如下公式选择。As mentioned above, the first adjustment parameter and the second adjustment parameter in the calculation formula of the storage block number and the calculation formula of the relative storage address can be determined by setting rules; The block number and relative storage address can be selected by the following formula.
3072点：3072 points:
bank_sel＝(3n5+3n4+3n3+3n2+3n1+4n0)mod 12，bank_sel=(3n5+3n4+3n3+3n2+3n1+4n0)mod 12,
bank_addr＝64n5+16n4+4n3+n2+0n1+0n0；bank_addr=64n5+16n4+4n3+n2+0n1+0n0;
3000点：3000 points:
bank_sel＝(6n5+3n4+4n3+2n2+2n1+2n0)mod 12，bank_sel=(6n5+3n4+4n3+2n2+2n1+2n0)mod 12,
bank_addr＝125n5+0n4+0n3+25n2+5n1+n0；bank_addr=125n5+0n4+0n3+25n2+5n1+n0;
2916点：2916 points:
bank_sel＝(3n6+4n5+4n4+4n3+4n2+4n1+4n0)mod 12，bank_sel=(3n6+4n5+4n4+4n3+4n2+4n1+4n0)mod 12,
bank_addr＝0n6+81n5+27n4+9n3+3n2+1n1+0n0；bank_addr=0n6+81n5+27n4+9n3+3n2+1n1+0n0;
2880点：2880 points:
bank_sel＝(3n5+3n4+3n3+4n2+4n1+2n0)mod 12，bank_sel=(3n5+3n4+3n3+4n2+4n1+2n0)mod 12,
bank_addr＝60n5+15n4+0n3+5n2+0n1+n0；bank_addr=60n5+15n4+0n3+5n2+0n1+n0;
2700点：2700 points:
bank_sel＝(3n5+4n4+4n3+4n2+2n1+2n0)mod 12，bank_sel=(3n5+4n4+4n3+4n2+2n1+2n0)mod 12,
bank_addr＝0n5+75n4+25n3+0n2+5n1+n0；bank_addr=0n5+75n4+25n3+0n2+5n1+n0;
2592点：2592 points:
bank_sel＝(6n6+3n5+3n4+4n3+4n2+4n1+4n0)mod 12，bank_sel=(6n6+3n5+3n4+4n3+4n2+4n1+4n0)mod 12,
bank_addr＝108n6+27n5+0n4+9n3+3n2+n1+0n0；bank_addr=108n6+27n5+0n4+9n3+3n2+n1+0n0;
2400点：2400 points:
bank_sel＝(6n5+3n4+3n3+4n2+6n1+2n0)mod 12，bank_sel=(6n5+3n4+3n3+4n2+6n1+2n0)mod 12,
bank_addr＝100n5+25n4+0n3+0n2+5n1+n0；bank_addr=100n5+25n4+0n3+0n2+5n1+n0;
2304点：2304 points:
bank_sel＝(3n5+3n4+3n3+3n2+4n1+4n0)mod 12，bank_sel=(3n5+3n4+3n3+3n2+4n1+4n0)mod 12,
bank_addr＝48n5+12n4+3n3+0n2+n1+0n0；bank_addr=48n5+12n4+3n3+0n2+n1+0n0;
2106点：2106 points:
bank_sel＝(3n5+3n4+4n3+4n2+4n1+2n0)mod 12，bank_sel=(3n5+3n4+4n3+4n2+4n1+2n0)mod 12,
bank_addr＝45n5+0n4+15n3+5n2+0n1+n0；bank_addr=45n5+0n4+15n3+5n2+0n1+n0;
1944点：1944 points:
bank_sel＝(6n6+3n5+4n4+4n3+4n2+4n1+4n0)mod 12，bank_sel=(6n6+3n5+4n4+4n3+4n2+4n1+4n0)mod 12,
bank_addr＝81n6+0n5+27n4+9n3+3n2+n1+0n0；bank_addr=81n6+0n5+27n4+9n3+3n2+n1+0n0;
1920点：1920 points:
bank_sel＝(6n5+3n4+3n3+3n2+4n1+2n0)mod 12，bank_sel=(6n5+3n4+3n3+3n2+4n1+2n0)mod 12,
bank_addr＝80n5+20n4+5n3+0n2+0n1+n0；bank_addr=80n5+20n4+5n3+0n2+0n1+n0;
1800点：1800 points:
bank_sel＝(6n5+3n4+4n3+4n2+2n1+2n0)mod 12，bank_sel=(6n5+3n4+4n3+4n2+2n1+2n0)mod 12,
bank_addr＝75n5+0n4+25n3+0n2+5n1+n0；bank_addr=75n5+0n4+25n3+0n2+5n1+n0;
1728点：1728 points:
bank_sel＝(3n5+3n4+3n3+4n2+4n1+4n0)mod 12，bank_sel=(3n5+3n4+3n3+4n2+4n1+4n0)mod 12,
bank_addr＝36n5+9n4+0n3+3n2+n1+0n0；bank_addr=36n5+9n4+0n3+3n2+n1+0n0;
1620点：1620 points:
bank_sel＝(3n5+4n4+4n3+4n2+4n1+2n0)mod 12，bank_sel=(3n5+4n4+4n3+4n2+4n1+2n0)mod 12,
bank_addr＝0n5+45n4+15n3+5n2+0n1+n0；bank_addr=0n5+45n4+15n3+5n2+0n1+n0;
1536点：1536 points:
bank_sel＝(6n5+3n4+3n3+3n2+3n1+4n0)mod 12，bank_sel=(6n5+3n4+3n3+3n2+3n1+4n0)mod 12,
bank_addr＝64n5+16n4+4n3+n2+0n1+0n0；bank_addr=64n5+16n4+4n3+n2+0n1+0n0;
1500点：1500 points:
bank_sel＝(3n4+4n3+2n2+2n1+2n0)mod 12，bank_sel=(3n4+4n3+2n2+2n1+2n0)mod 12,
bank_addr＝0n4+0n3+25n2+5n1+n0；bank_addr=0n4+0n3+25n2+5n1+n0;
1440点：1440 points:
bank_sel＝(6n5+3n4+3n3+4n2+4n1+2n0)mod 12，bank_sel=(6n5+3n4+3n3+4n2+4n1+2n0)mod 12,
bank_addr＝60n5+15n4+0n3+5n2+0n1+n0；bank_addr=60n5+15n4+0n3+5n2+0n1+n0;
1296点：1296 points:
bank_sel＝(3n5+3n4+4n3+4n2+4n1+4n0)mod 12，bank_sel=(3n5+3n4+4n3+4n2+4n1+4n0)mod 12,
bank_addr＝27n5+0n4+9n3+3n2+n1+0n0；bank_addr=27n5+0n4+9n3+3n2+n1+0n0;
1200点：1200 points:
bank_sel＝(3n4+3n3+4n2+2n1+2n0)mod 12，bank_sel=(3n4+3n3+4n2+2n1+2n0)mod 12,
bank_addr＝25n4+0n3+0n2+5n1+n0；bank_addr=25n4+0n3+0n2+5n1+n0;
1152点：1152 points:
bank_sel＝(6n5+3n4+3n3+3n2+4n1+4n0)mod 12，bank_sel=(6n5+3n4+3n3+3n2+4n1+4n0)mod 12,
bank_addr＝48n5+12n4+3n3+0n2+n1+0n0；bank_addr=48n5+12n4+3n3+0n2+n1+0n0;
1080点：1080 points:
bank_sel＝(6n5+3n4+4n3+4n2+4n1+2n0)mod 12，bank_sel=(6n5+3n4+4n3+4n2+4n1+2n0)mod 12,
bank_addr＝45n5+0n4+15n3+5n2+0n1+n0；bank_addr=45n5+0n4+15n3+5n2+0n1+n0;
972点：972 points:
bank_sel＝(3n5+4n4+4n3+4n2+4n1+4n0)mod 12，bank_sel=(3n5+4n4+4n3+4n2+4n1+4n0)mod 12,
bank_addr＝0n5+27n4+9n3+3n2+n1+0n0；bank_addr=0n5+27n4+9n3+3n2+n1+0n0;
960点：960 points:
bank_sel＝(3n4+3n3+3n2+4n1+2n0)mod 12，bank_sel=(3n4+3n3+3n2+4n1+2n0)mod 12,
bank_addr＝20n4+5n3+0n2+0n1+n0；bank_addr=20n4+5n3+0n2+0n1+n0;
900点：900 points:
bank_sel＝(3n4+4n3+4n2+2n1+2n0)mod 12，bank_sel=(3n4+4n3+4n2+2n1+2n0)mod 12,
bank_addr＝0n4+25n3+0n2+5n1+n0；bank_addr=0n4+25n3+0n2+5n1+n0;
864点：864 points:
bank_sel＝(6n5+3n4+3n3+4n2+4n1+4n0)mod 12，bank_sel=(6n5+3n4+3n3+4n2+4n1+4n0)mod 12,
bank_addr＝36n5+9n4+0n3+3n2+n1+0n0；bank_addr=36n5+9n4+0n3+3n2+n1+0n0;
768点：768 points:
bank_sel＝(3n4+3n3+3n2+3n1+4n0)mod 12，bank_sel=(3n4+3n3+3n2+3n1+4n0)mod 12,
bank_addr＝16n4+4n3+n2+0n1+0n0；bank_addr=16n4+4n3+n2+0n1+0n0;
720点：720 points:
bank_sel＝(3n4+3n3+4n2+4n1+2n0)mod 12，bank_sel=(3n4+3n3+4n2+4n1+2n0)mod 12,
bank_addr＝15n4+0n3+5n2+0n1+n0；bank_addr=15n4+0n3+5n2+0n1+n0;
648点：648 points:
bank_sel＝(6n5+3n4+4n3+4n2+4n1+4n0)mod 12，bank_sel=(6n5+3n4+4n3+4n2+4n1+4n0)mod 12,
bank_addr＝27n5+0n4+9n3+3n2+n1+0n0；bank_addr=27n5+0n4+9n3+3n2+n1+0n0;
600点：600 points:
bank_sel＝(6n4+3n3+4n2+2n1+2n0)mod 12，bank_sel=(6n4+3n3+4n2+2n1+2n0)mod 12,
bank_addr＝25n4+0n3+0n2+5n1+n0；bank_addr=25n4+0n3+0n2+5n1+n0;
576点：576 points:
bank_sel＝(3n4+3n3+3n2+4n1+4n0)mod 12，bank_sel=(3n4+3n3+3n2+4n1+4n0)mod 12,
bank_addr＝12n4+3n3+0n2+n1+0n0；bank_addr=12n4+3n3+0n2+n1+0n0;
540点：540 points:
bank_sel＝(3n4+4n3+4n2+4n1+2n0)mod 12，bank_sel=(3n4+4n3+4n2+4n1+2n0)mod 12,
bank_addr＝0n4+15n3+5n2+0n1+n0；bank_addr=0n4+15n3+5n2+0n1+n0;
480点：480 points:
bank_sel＝(6n4+3n3+3n2+4n1+2n0)mod 12，bank_sel=(6n4+3n3+3n2+4n1+2n0)mod 12,
bank_addr＝20n4+5n3+0n2+0n1+n0；bank_addr=20n4+5n3+0n2+0n1+n0;
432点：432 points:
bank_sel＝(3n4+3n3+4n2+4n1+4n0)mod 12，bank_sel=(3n4+3n3+4n2+4n1+4n0)mod 12,
bank_addr＝9n4+0n3+3n2+n1+0n0；bank_addr=9n4+0n3+3n2+n1+0n0;
384点：384 points:
bank_sel＝(6n4+3n3+3n2+3n1+4n0)mod 12，bank_sel=(6n4+3n3+3n2+3n1+4n0)mod 12,
bank_addr＝16n4+4n3+n2+0n1+0n0；bank_addr=16n4+4n3+n2+0n1+0n0;
360点：360 points:
bank_sel＝(6n4+3n3+4n2+4n1+2n0)mod 12，bank_sel=(6n4+3n3+4n2+4n1+2n0)mod 12,
bank_addr＝15n4+0n3+5n2+0n1+n0；bank_addr=15n4+0n3+5n2+0n1+n0;
324点：324 points:
bank_sel＝(3n4+4n3+4n2+4n1+4n0)mod 12，bank_sel=(3n4+4n3+4n2+4n1+4n0)mod 12,
bank_addr＝0n4+9n3+3n2+n1+0n0；bank_addr=0n4+9n3+3n2+n1+0n0;
300点：300 points:
bank_sel＝(3n3+4n2+2n1+2n0)mod 12，bank_sel=(3n3+4n2+2n1+2n0)mod 12,
bank_addr＝0n3+0n2+5n1+n0；bank_addr=0n3+0n2+5n1+n0;
288点：288 points:
bank_sel＝(6n4+3n3+3n2+4n1+4n0)mod 12，bank_sel=(6n4+3n3+3n2+4n1+4n0)mod 12,
bank_addr＝12n4+3n3+0n2+n1+0n0；bank_addr=12n4+3n3+0n2+n1+0n0;
240点：240 points:
bank_sel＝(3n3+3n2+4n1+2n0)mod 12，bank_sel=(3n3+3n2+4n1+2n0)mod 12,
bank_addr＝5n3+0n2+0n1+n0；bank_addr=5n3+0n2+0n1+n0;
216点：216 points:
bank_sel＝(6n4+3n3+4n2+4n1+4n0)mod 12，bank_sel=(6n4+3n3+4n2+4n1+4n0)mod 12,
bank_addr＝9n4+0n3+3n2+n1+0n0；bank_addr=9n4+0n3+3n2+n1+0n0;
192点：192 points:
bank_sel＝(3n3+3n2+3n1+4n0)mod 12，bank_sel=(3n3+3n2+3n1+4n0)mod 12,
bank_addr＝4n3+n2+0n1+0n0；bank_addr=4n3+n2+0n1+0n0;
180点：180 points:
bank_sel＝(3n3+4n2+4n1+2n0)mod 12，bank_sel=(3n3+4n2+4n1+2n0)mod 12,
bank_addr＝0n3+5n2+0n1+n0；bank_addr=0n3+5n2+0n1+n0;
144点：144 points:
bank_sel＝(3n3+3n2+4n1+4n0)mod 12，bank_sel=(3n3+3n2+4n1+4n0)mod 12,
bank_addr＝3n3+0n2+n1+0n0；bank_addr=3n3+0n2+n1+0n0;
120点：120 points:
bank_sel＝(6n3+3n2+4n1+2n0)mod 12，bank_sel=(6n3+3n2+4n1+2n0)mod 12,
bank_addr＝5n3+0n2+0n1+n0；bank_addr=5n3+0n2+0n1+n0;
108点：108 o'clock:
bank_sel＝(3n3+4n2+4n1+4n0)mod 12，bank_sel=(3n3+4n2+4n1+4n0)mod 12,
bank_addr＝0n3+3n2+n1+0n0；bank_addr=0n3+3n2+n1+0n0;
96点：96 o'clock:
bank_sel＝(6n3+3n2+3n1+4n0)mod 12，bank_sel=(6n3+3n2+3n1+4n0)mod 12,
bank_addr＝4n3+n2+0n1+0n0；bank_addr=4n3+n2+0n1+0n0;
72点：72 o'clock:
bank_sel＝(6n3+3n2+4n1+4n0)mod 12，bank_sel=(6n3+3n2+4n1+4n0)mod 12,
bank_addr＝3n3+0n2+n1+0n0；bank_addr=3n3+0n2+n1+0n0;
60点：60 points:
bank_sel＝(3n2+4n1+2n0)mod 12，bank_sel=(3n2+4n1+2n0)mod 12,
bank_addr＝0n2+0n1+n0；bank_addr=0n2+0n1+n0;
48点：48:00
bank_sel＝(3n2+3n1+4n0)mod 12，bank_sel=(3n2+3n1+4n0)mod 12,
bank_addr＝n2+0n1+0n0；bank_addr=n2+0n1+0n0;
36点：36:00
bank_sel＝(3n2+4n1+4n0)mod 12，bank_sel=(3n2+4n1+4n0)mod 12,
bank_addr＝0n2+n1+0n0；bank_addr=0n2+n1+0n0;
24点：24:00:
bank_sel＝(6n2+3n1+4n0)mod 12，bank_sel=(6n2+3n1+4n0)mod 12,
bank_addr＝n2+0n1+0n0；bank_addr=n2+0n1+0n0;
12点：12 o'clock:
bank_sel＝(3n1+4n0)mod 12，bank_sel=(3n1+4n0)mod 12,
bank_addr＝0n1+0n0。bank_addr=0n1+0n0.
本发明实施例还提供一种处理离散傅里叶变换的设备。The embodiment of the present invention also provides a device for processing discrete Fourier transform.
在一些实施例中，处理离散傅里叶变换的设备为5G***中的调制器，其使用DFT-S-OFDM调制技术，将时域信号转换到频域进行扩展，然后再经过快速傅里叶逆变换(IFFT)变换来发送信号。In some embodiments, the device for processing discrete Fourier transform is a modulator in a 5G system, which uses DFT-S-OFDM modulation technology to convert the time domain signal to the frequency domain for expansion, and then go through a fast Fourier transform Inverse transform (IFFT) transform to transmit the signal.
在具体实施中，处理离散傅里叶变换的设备可以包括于网络设备或者用户设备(User Equipment，UE)内，而属于其中的一个部件。In a specific implementation, the device for processing discrete Fourier transform may be included in a network device or user equipment (User Equipment, UE), and belong to one of the components.
在图2所示的实施例中，处理离散傅里叶变换的设备200包括存储器和处理模块220。In the embodiment shown in FIG. 2 , the apparatus 200 for processing discrete Fourier transforms includes a memory and a processing module 220 .
存储器可以包括一个、二个或多个。例如，包括一个存储器210，其用于接收并且存储离散傅里叶变换的初始输入数据和每轮运算中的输出数据、并且向处理模块220输出数据；还可以包括另一个存储器215，其与存储器210一起用于乒乓取值。The memory may include one, two or more. For example, a memory 210 is included for receiving and storing the initial input data of the discrete Fourier transform and the output data in each round of operation, and outputting the data to the processing module 220; another memory 215 may also be included, which is connected with the memory 210 is used together for ping-pong values.
每个存储器可以包括多个存储块，例如，12个存储块；这可以增大运算的并发度，从而显著地减少处理时间，降低运算时延。Each memory may include multiple storage blocks, for example, 12 storage blocks; this can increase the concurrency of operations, thereby significantly reducing processing time and operation delay.
处理模块220接收存储器输出的数据，进行小点数基离散傅里叶变换，并且可以执行上述处理基为12倍数点离散傅里叶变换方法的步骤。The processing module 220 receives the data output from the memory, performs discrete Fourier transform on a small-point basis, and can perform the steps of the above-mentioned method for processing a basis of 12-multiple point discrete Fourier transform.
如图3所示，处理模块220可以包括三个子模块而分别进行小点 数基离散傅里叶变换，其中，第一子模块221执行1个5点或1个4点或2个3点或3个2点离散傅里叶变换，第二子模块222执行1个5点或1个4点或2个3点或3个2点离散傅里叶变换，第三子模块223执行1个4点离散傅里叶变换。As shown in FIG. 3 , the processing module 220 may include three sub-modules to perform discrete Fourier transform on a small-point basis respectively, wherein the first sub-module 221 performs 1 5-point or 1 4-point or 2 3-point or 3 a 2-point discrete Fourier transform, the second sub-module 222 performs a 5-point or a 4-point or two 3-point or three 2-point discrete Fourier transforms, and the third sub-module 223 performs a 4-point discrete Fourier transform Discrete Fourier Transform.
通过该三个子模块的设置，使得小点数基离散傅里叶变换的处理过程有序并且简化。例如，可以通过第一子模块和第二子模块完成小点数基离散傅里叶变换；在第一子模块和第二子模块无法再提供4点离散傅里叶变换时(即第一子模块和第二子模块均已提供了1个4点离散傅里叶变换但仍需1个4点离散傅里叶变换进行运算时)，可以再通过第三子模块来执行。Through the setting of the three sub-modules, the processing process of the discrete Fourier transform of the small point base is ordered and simplified. For example, the small-point base discrete Fourier transform can be completed by the first sub-module and the second sub-module; when the first sub-module and the second sub-module can no longer provide 4-point discrete Fourier transform (ie the first sub-module and the second sub-module have provided a 4-point discrete Fourier transform but still need a 4-point discrete Fourier transform for operation), it can be executed by the third sub-module.
在具体实施中，处理离散傅里叶变换的设备内各元件及其关系都可以参考上述关于处理基为12倍数点离散傅里叶变换方法的描述，此处不再赘述。In the specific implementation, for the components and their relationships in the device for processing discrete Fourier transform, reference may be made to the above description of the method for processing the discrete Fourier transform with a multiple of 12 points, which will not be repeated here.
本发明实施例还提供一种存储介质，其上存储有计算机指令，该计算机指令运行时执行上述处理基为12倍数点离散傅里叶变换方法的步骤。The embodiment of the present invention further provides a storage medium, on which computer instructions are stored, and when the computer instructions run, the steps of the above-mentioned method for discrete Fourier transform with a 12-multiple point as the processing basis are performed.
本发明实施例还提供一种处理基为12倍数点离散傅里叶变换的装置。The embodiment of the present invention also provides an apparatus for processing the discrete Fourier transform of 12 multiples of points.
在图4所示的实施例中，处理基为12倍数点离散傅里叶变换的装置300包括分解模块310、运算模块320、存储模块330和获取模块340。In the embodiment shown in FIG. 4 , the apparatus 300 for processing a 12-multiple point discrete Fourier transform includes a decomposition module 310 , an operation module 320 , a storage module 330 and an acquisition module 340 .
分解模块310可以基于素因子算法将12倍数点分解，从而获得如下基于若干个系数的第一分解式和第二分解式：The decomposition module 310 can decompose the 12-multiple points based on the prime factor algorithm, so as to obtain the following first decomposition formula and second decomposition formula based on several coefficients:
Figure PCTCN2022073624-appb-000021
Figure PCTCN2022073624-appb-000021
Figure PCTCN2022073624-appb-000022
Figure PCTCN2022073624-appb-000022
其中，m为系数的个数，N为12倍数点，第一分解式中n为离 散傅里叶变换中输入数据的序并且大于或等于0而小于N，ni为序n的系数并且具有相应的取值范围，ai为与ni对应的第一分解参数，第二分解式中k为离散傅里叶变换中输出数据的序并且大于或等于0而小于N，ki为k的系数并且具有相应的取值范围，bi为与ki对应的第二分解参数。Among them, m is the number of coefficients, N is a multiple of 12 points, in the first decomposition formula, n is the order of the input data in the discrete Fourier transform and is greater than or equal to 0 but less than N, ni is the order of n coefficients and have corresponding The value range of , ai is the first decomposition parameter corresponding to ni, in the second decomposition formula k is the order of the output data in the discrete Fourier transform and is greater than or equal to 0 but less than N, ki is the coefficient of k and has the corresponding The value range of , bi is the second decomposition parameter corresponding to ki.
运算模块320可以分别将系数n0至nm的可取值个数作为小点数基而进行m+1轮运算，在每轮运算中，进行小点数基离散傅里叶变换而得到计算结果，其中，各系数的取值满足第一分解式。The operation module 320 can respectively perform m+1 rounds of operations using the number of possible values of the coefficients n0 to nm as the small-point basis, and in each round of operation, perform discrete Fourier transform on the small-point basis to obtain the calculation result, wherein, The value of each coefficient satisfies the first decomposition formula.
存储模块330可以将计算结果作为每轮中的输出数据而存储于存储器的存储地址，其中，存储地址包括通过如下公式确定的存储块号和相对存储地址：The storage module 330 can store the calculation result in the storage address of the memory as the output data in each round, wherein the storage address includes the storage block number and the relative storage address determined by the following formula:
Figure PCTCN2022073624-appb-000023
Figure PCTCN2022073624-appb-000023
Figure PCTCN2022073624-appb-000024
Figure PCTCN2022073624-appb-000024
其中，bank_sel为存储块号，bank_addr为相对存储地址，ci和di分别为第一调节参数和第二调节参数。Wherein, bank_sel is the storage block number, bank_addr is the relative storage address, and ci and di are the first adjustment parameter and the second adjustment parameter, respectively.
获取模块340可以基于第二分解式获取离散傅里叶变换的最终输出数据。The obtaining module 340 may obtain the final output data of the discrete Fourier transform based on the second decomposition.
在具体实施中，存储模块330可以接收并且存储离散傅里叶变换的初始输入数据以及每轮运算中的输出数据，在第一轮运算中获取初始输入数据而进行小点数基离散傅里叶变换，在后续各轮运算中获取前一轮运算的输出数据而作为该轮运算的输入数据以进行小点数基离散傅里叶变换。In a specific implementation, the storage module 330 can receive and store the initial input data of the discrete Fourier transform and the output data in each round of operation, and obtain the initial input data in the first round of operation and perform the small-point base discrete Fourier transform , in each subsequent round of operations, the output data of the previous round of operations is obtained as the input data of this round of operations to perform small-point base discrete Fourier transform.
在具体实施中，存储模块330可以将每轮运算中的输出数据存储于该轮运算中输入数据所存储的存储地址。In a specific implementation, the storage module 330 may store the output data in each round of operation at the storage address where the input data in the round of operation is stored.
在具体实施中，运算模块320可以在每轮运算中，使可取值个数作为小点数基的系数在其取值范围内取值，使其余系数中的部分系数 在其范围内取值和/或乒乓取值，并且遍历其余系数中的剩余系数以进行小点数基离散傅里叶变换，从而得到计算结果。In a specific implementation, the operation module 320 may, in each round of operation, make the coefficients with the number of possible values as the small-point base take values within their value ranges, and make some coefficients in the remaining coefficients take values within their ranges and sum up / or ping-pong values, and traverse the remaining coefficients in the remaining coefficients to perform small-point base discrete Fourier transform, thereby obtaining the calculation result.
在具体实施中，获取模块340可以基于第二分解式获取k的系数的取值，基于k的系数的取值获取对应的n的系数的取值，基于n的系数的取值、存储块号的计算公式和相对存储地址的计算公式计算输出数据的存储地址，以及基于存储地址获取最终输出数据。In a specific implementation, the obtaining module 340 may obtain the value of the coefficient of k based on the second decomposition formula, obtain the value of the corresponding coefficient of n based on the value of the coefficient of k, and obtain the value of the coefficient of n based on the value of the coefficient and the storage block number. The calculation formula and the calculation formula of the relative storage address calculate the storage address of the output data, and obtain the final output data based on the storage address.
在具体实施中，处理基为12倍数点离散傅里叶变换的装置内的各模块及其关系都可以参考上述关于处理基为12倍数点离散傅里叶变换方法的描述，此处不再赘述。In the specific implementation, the modules and their relationships in the device whose processing basis is 12-multiple-point discrete Fourier transform can refer to the above description of the method for processing the 12-multiple-point discrete Fourier transform method, which will not be repeated here. .
在本发明的实施例中，各技术方案可以应用于3G、4G、5G***以及未来演进的共用陆地移动通信网络(Public Land Mobile Network，PLMN)等***，其中，5G***包括两种组网，即非独立组网(Non-Standalone，NSA)和独立组网(Standalone，SA)。In the embodiments of the present invention, each technical solution can be applied to 3G, 4G, 5G systems and systems such as the public land mobile communication network (Public Land Mobile Network, PLMN) evolved in the future, wherein the 5G system includes two kinds of networking, That is, Non-Standalone (NSA) and Standalone (SA).
在本发明的实施例中，UE可以为接入终端、用户单元、用户站、移动站、移动台(Mobile Station，建成MS)、远方站、远程终端、移动设备、用户终端、终端设备(Terminal Equipment)、无线通信设备或者用户代理；UE还可以为蜂窝电话、无绳电话、会话启动协议(Session Initiation Protocol，IP)电话、无线本地环路(Wireless Local Loop，WLL)站、个人数字处理(Personal Digital Assistant，PDA)、具有无线通信功能的手持设备、计算设备或连接到无线调制解调器的其它处理设备、车载设备、可穿戴设备，未来5G网络中的UE或者未来演进的PLMN中的UE等。In the embodiment of the present invention, the UE may be an access terminal, a subscriber unit, a subscriber station, a mobile station, a mobile station (Mobile Station, built as an MS), a remote station, a remote terminal, a mobile device, a user terminal, and a terminal device (Terminal). Equipment), wireless communication equipment or user agent; UE can also be a cellular phone, a cordless phone, a Session Initiation Protocol (IP) phone, a Wireless Local Loop (WLL) station, a Personal Digital Processing (Personal) Digital Assistant, PDA), handheld devices with wireless communication capabilities, computing devices or other processing devices connected to wireless modems, in-vehicle devices, wearable devices, UEs in future 5G networks or UEs in future evolved PLMNs, etc.
在本发明的实施例中，网络设备可以是一种部署在无线接入网(Radio Access Network，RAN)用以提供无线通信功能的装置，包括但不限于3G、4G、5G***以及未来演进的PLMN***中提供基站功能的设备，例如在3G网络中提供基站功能的设备包括节点B(NodeB)、在4G网络中提供基站功能的设备包括演进的节点B(evolved NodeB，eNB)、在无线局域网络(Wireless Local Area  Networks，WLAN)中提供基站功能的设备(即接入点，Access Point，AP)、5G NR中的提供基站功能的设备gNB、以及继续演进的节点B(ng-eNB)等。In the embodiment of the present invention, the network device may be a device deployed in a radio access network (Radio Access Network, RAN) to provide a wireless communication function, including but not limited to 3G, 4G, 5G systems and future evolved The equipment that provides base station functions in the PLMN system, for example, the equipment that provides base station functions in 3G networks includes Node Bs (NodeBs), and the equipment that provides base station functions in 4G networks includes evolved Node Bs (evolved NodeBs, eNBs). Network (Wireless Local Area Networks, WLAN) devices that provide base station functions (that is, access points, Access Point, AP), 5G NR devices that provide base station functions gNB, and evolving Node B (ng-eNB), etc. .
在本发明的实施例中，处理器可以为中央处理单元(Central Processing Unit，CPU)，该处理器还可以是其他通用处理器、数字信号处理器(Digital Signal Processor，DSP)、专用集成电路(Application Specific Integrated Circuit，ASIC)、现成可编程门阵列(Field Programmable Gate Array，FPGA)、其他可编程逻辑器件、分立门或晶体管逻辑器件、或者分立硬件组件等。通用处理器可以是微处理器或者该处理器也可以是任何常规的处理器等。In the embodiment of the present invention, the processor may be a central processing unit (Central Processing Unit, CPU), and the processor may also be other general-purpose processors, digital signal processors (Digital Signal Processors, DSP), application-specific integrated circuits ( Application Specific Integrated Circuit, ASIC), off-the-shelf Programmable Gate Array (Field Programmable Gate Array, FPGA), other programmable logic devices, discrete gate or transistor logic devices, or discrete hardware components, etc. A general purpose processor may be a microprocessor or the processor may be any conventional processor or the like.
在本发明的实施例中，存储器可以是易失性存储器或非易失性存储器，或可包括易失性和非易失性存储器两者。其中，非易失性存储器可以是只读存储器(Read-Only Memory，ROM)、可编程只读存储器(Programmable ROM，PROM)、可擦除可编程只读存储器(Erasable PROM，EPROM)、电可擦除可编程只读存储器(Electrically EPROM，EEPROM)或闪存。易失性存储器可以是随机存取存储器(Random Access Memory，RAM)，其用作外部高速缓存。通过示例性但不是限制性说明，许多形式的RAM可用，例如静态随机存取存储器(Static RAM，SRAM)、动态随机存取存储器(DRAM)、同步动态随机存取存储器(Synchronous DRAM，SDRAM)、双倍数据速率同步动态随机存取存储器(Double Data Rate SDRAM，DDR SDRAM)、增强型同步动态随机存取存储器(Enhanced SDRAM，ESDRAM)、同步连接动态随机存取存储器(Synchlink DRAM，SLDRAM)和直接内存总线随机存取存储器(Direct Rambus RAM，DR RAM)。In embodiments of the invention, the memory may be volatile memory or non-volatile memory, or may include both volatile and non-volatile memory. Wherein, the non-volatile memory may be a read-only memory (Read-Only Memory, ROM), a programmable read-only memory (Programmable ROM, PROM), an erasable programmable read-only memory (Erasable PROM, EPROM), an electrically programmable read-only memory (Erasable PROM, EPROM). Erase programmable read-only memory (Electrically EPROM, EEPROM) or flash memory. Volatile memory may be Random Access Memory (RAM), which acts as an external cache. By way of example and not limitation, many forms of RAM are available, such as Static Random Access Memory (SRAM), Dynamic Random Access Memory (DRAM), Synchronous DRAM (SDRAM), Double data rate synchronous dynamic random access memory (Double Data Rate SDRAM, DDR SDRAM), enhanced synchronous dynamic random access memory (Enhanced SDRAM, ESDRAM), synchronous link dynamic random access memory (Synchlink DRAM, SLDRAM) and direct Memory bus random access memory (Direct Rambus RAM, DR RAM).
在本发明的实施例中，存储介质包括U盘、移动硬盘、ROM、RAM、非挥发性存储器(Non-volatile)、非瞬态(Non-transitory)存储器、磁碟或者光盘等各种可以存储程序代码的介质。In the embodiment of the present invention, the storage medium includes a U disk, a removable hard disk, a ROM, a RAM, a non-volatile memory (Non-volatile), a non-transitory (Non-transitory) memory, a magnetic disk or an optical disk, etc. medium of program code.
关于上述实施例中描述的各个装置、产品包含的各个模块/单元， 其可以是软件模块/单元，也可以是硬件模块/单元，或者也可以部分是软件模块/单元，部分是硬件模块/单元。例如，对于应用于或集成于芯片的各个装置、产品，其包含的各个模块/单元可以都采用电路等硬件的方式实现，或者，至少部分模块/单元可以采用软件程序的方式实现，该软件程序运行于芯片内部集成的处理器，剩余的(如果有)部分模块/单元可以采用电路等硬件方式实现；对于应用于或集成于芯片模组的各个装置、产品，其包含的各个模块/单元可以都采用电路等硬件的方式实现，不同的模块/单元可以位于芯片模组的同一组件(例如芯片、电路模块等)或者不同组件中，或者，至少部分模块/单元可以采用软件程序的方式实现，该软件程序运行于芯片模组内部集成的处理器，剩余的(如果有)部分模块/单元可以采用电路等硬件方式实现；对于应用于或集成于终端的各个装置、产品，其包含的各个模块/单元可以都采用电路等硬件的方式实现，不同的模块/单元可以位于终端内同一组件(例如，芯片、电路模块等)或者不同组件中，或者，至少部分模块/单元可以采用软件程序的方式实现，该软件程序运行于终端内部集成的处理器，剩余的(如果有)部分模块/单元可以采用电路等硬件方式实现。Regarding each module/unit included in each device and product described in the above embodiments, it may be a software module/unit, a hardware module/unit, or a part of a software module/unit and a part of a hardware module/unit . For example, for each device or product applied to or integrated in a chip, each module/unit included therein may be implemented by hardware such as circuits, or at least some of the modules/units may be implemented by a software program. Running on the processor integrated inside the chip, the remaining (if any) part of the modules/units can be implemented by hardware such as circuits; for each device and product applied to or integrated in the chip module, the modules/units contained therein can be They are all implemented by hardware such as circuits, and different modules/units can be located in the same component of the chip module (such as chips, circuit modules, etc.) or in different components, or at least some of the modules/units can be implemented by software programs. The software program runs on the processor integrated inside the chip module, and the remaining (if any) part of the modules/units can be implemented by hardware such as circuits; for each device and product applied to or integrated in the terminal, each module contained in it The units/units may all be implemented in hardware such as circuits, and different modules/units may be located in the same component (eg, chip, circuit module, etc.) or in different components in the terminal, or at least some of the modules/units may be implemented by software programs Realization, the software program runs on the processor integrated inside the terminal, and the remaining (if any) part of the modules/units can be implemented in hardware such as circuits.
虽然本发明披露如上，但本发明并非限定于此。任何本领域技术人员，在不脱离本发明的精神和范围内，均可作各种更动与修改，因此本发明的保护范围应当以权利要求所限定的范围为准。Although the present invention is disclosed above, the present invention is not limited thereto. Any person skilled in the art can make various changes and modifications without departing from the spirit and scope of the present invention. Therefore, the protection scope of the present invention should be based on the scope defined by the claims.

Claims (16)

  1. 一种处理基为12倍数点离散傅里叶变换的方法，其特征在于，包括：A method for processing the discrete Fourier transform of a multiple of 12 points, comprising:
    基于素因子算法将所述12倍数点分解，从而获得如下基于若干个系数的第一分解式和第二分解式：The 12-multiple points are decomposed based on the prime factor algorithm, so as to obtain the following first decomposition formula and second decomposition formula based on several coefficients:
    Figure PCTCN2022073624-appb-100001
    Figure PCTCN2022073624-appb-100001
    Figure PCTCN2022073624-appb-100002
    Figure PCTCN2022073624-appb-100002
    其中，m为所述系数的个数，N为所述12倍数点，所述第一分解式中n为所述离散傅里叶变换中输入数据的序并且大于或等于0而小于N，ni为序n的系数并且具有相应的取值范围，ai为与ni对应的第一分解参数，所述第二分解式中k为所述离散傅里叶变换中输出数据的序并且大于或等于0而小于N，ki为k的系数并且具有相应的取值范围，bi为与ki对应的第二分解参数；Wherein, m is the number of the coefficients, N is the 12-multiple point, in the first decomposition formula n is the order of the input data in the discrete Fourier transform and is greater than or equal to 0 but less than N, ni is a coefficient of order n and has a corresponding value range, ai is the first decomposition parameter corresponding to ni, and k in the second decomposition formula is the order of the output data in the discrete Fourier transform and is greater than or equal to 0 And less than N, ki is a coefficient of k and has a corresponding value range, and bi is the second decomposition parameter corresponding to ki;
    分别将系数n0至nm的可取值个数作为小点数基而进行m+1轮运算，在每轮运算中，进行小点数基离散傅里叶变换而得到计算结果，其中，各系数的取值满足所述第一分解式；The number of possible values of the coefficients from n0 to nm is used as the small-point base, and m+1 rounds of operations are performed. In each round of operation, the small-point base discrete Fourier transform is performed to obtain the calculation result. The value satisfies the first decomposition formula;
    将所述计算结果作为每轮中的输出数据而存储于存储器的存储地址，其中，所述存储地址包括存储块号和相对存储地址，其通过如下公式选择：The calculation result is stored in the storage address of the memory as the output data in each round, wherein the storage address includes the storage block number and the relative storage address, which is selected by the following formula:
    Figure PCTCN2022073624-appb-100003
    Figure PCTCN2022073624-appb-100003
    Figure PCTCN2022073624-appb-100004
    Figure PCTCN2022073624-appb-100004
    其中，bank_sel为所述存储块号，bank_addr为所述相对存储地址，ci和di分别为第一调节参数和第二调节参数；Wherein, bank_sel is the storage block number, bank_addr is the relative storage address, and ci and di are the first adjustment parameter and the second adjustment parameter, respectively;
    基于所述第二分解式获取所述离散傅里叶变换的最终输出数据。The final output data of the discrete Fourier transform is obtained based on the second decomposition.
  2. 根据权利要求1所述的方法，其特征在于，包括：所述存储器接收并且存储所述离散傅里叶变换的初始输入数据以及每轮运算中的输出数据，在第一轮运算中获取所述初始输入数据而进行所述小点数基离散傅里叶变换，在后续各轮运算中获取前一轮运算的输出数据而作为该轮运算的输入数据以进行所述小点数基离散傅里叶变换。The method according to claim 1, characterized in that comprising: receiving and storing, by the memory, initial input data of the discrete Fourier transform and output data in each round of operation, and obtaining the data in the first round of operation The small-point base discrete Fourier transform is performed on the initial input data, and the output data of the previous round of operations are obtained in subsequent rounds of operations as the input data of the round of operations to perform the small-point base discrete Fourier transform. .
  3. 根据权利要求1所述的方法，其特征在于，包括：将每轮运算中的输出数据存储于该轮运算中输入数据所存储的存储地址。The method according to claim 1, characterized in that it comprises: storing the output data in each round of operation in a storage address where the input data in the round of operation is stored.
  4. 根据权利要求1所述的方法，其特征在于，包括：在每轮运算中，使可取值个数作为小点数基的系数在其取值范围内取值，使其余系数中的部分系数在其范围内取值和/或乒乓取值，并且遍历其余系数中的剩余系数以进行小点数基离散傅里叶变换，从而得到计算结果。The method according to claim 1, characterized in that, comprising: in each round of operation, the coefficients whose number of values can be taken as the small point base take values within their value range, and some coefficients in the remaining coefficients are It takes values within its range and/or ping-pong values, and traverses the remaining coefficients in the remaining coefficients to perform small-point base discrete Fourier transform, thereby obtaining the calculation result.
  5. 根据权利要求1所述的方法，其特征在于，在所述存储块号的计算公式中，取值范围为2、3、4、5的系数所对应的第一调节参数分别为6、4、3、2。The method according to claim 1, wherein, in the calculation formula of the storage block number, the first adjustment parameters corresponding to the coefficients whose value ranges are 2, 3, 4, and 5 are 6, 4, 5, and 5, respectively. 3, 2.
  6. 根据权利要求5所述的方法，其特征在于，所述相对存储地址的计算公式包括关于n0至nm的多项，其中，第一个取值范围为3的系数所对应的第二调节参数为0，第一个取值范围为4的系数所对应的第二调节参数为0，第一个不为0的第二调节参数为1，其余不为0的第二调节参数为其前面紧邻的、第二调节参数不为0的项中相应系数可取值的个数与相应第二调节参数的乘积。The method according to claim 5, wherein the calculation formula of the relative storage address includes a multinomial item about n0 to nm, wherein the second adjustment parameter corresponding to the first coefficient with a value range of 3 is: 0, the second adjustment parameter corresponding to the first coefficient whose value range is 4 is 0, the first second adjustment parameter that is not 0 is 1, and the other second adjustment parameters that are not 0 are the immediately preceding ones. . The product of the number of possible values of the corresponding coefficient in the item whose second adjustment parameter is not 0 and the corresponding second adjustment parameter.
  7. 根据权利要求1所述的方法，其特征在于，基于所述第二分解式获取所述离散傅里叶变换的最终输出数据包括：基于所述第二分解式获取k的系数的取值，基于k的系数的取值获取对应的n的系数的取值，基于n的系数的取值、所述存储块号的计算公式和所述相对存储地址的计算公式计算所述输出数据的存储地址，以及基于所述存储地址获取所述最终输出数据。The method according to claim 1, wherein obtaining the final output data of the discrete Fourier transform based on the second decomposition formula comprises: obtaining a value of a coefficient of k based on the second decomposition formula, The value of the coefficient of k obtains the value of the corresponding coefficient of n, and the storage address of the output data is calculated based on the value of the coefficient of n, the calculation formula of the storage block number and the calculation formula of the relative storage address, and obtaining the final output data based on the storage address.
  8. 一种处理离散傅里叶变换的设备，包括存储器和处理模块，其特征在于，所述存储器适于接收并且存储所述离散傅里叶变换的初始输入数据以及每轮运算中的输出数据，所述处理模块适于执行权利要求1至7中任一项所述方法的步骤。A device for processing discrete Fourier transform, comprising a memory and a processing module, wherein the memory is adapted to receive and store the initial input data of the discrete Fourier transform and the output data in each round of operation, so The processing module is adapted to perform the steps of the method of any one of claims 1 to 7.
  9. 根据权利要求8所述的设备，其特征在于，所述设备包括于网络设备或者用户设备。The device according to claim 8, wherein the device is included in a network device or a user equipment.
  10. 根据权利要求8所述的设备，其特征在于，所述处理模块包括第一子模块、第二子模块和第三子模块，其中，第一子模块适于执行1个5点或1个4点或2个3点或3个2点离散傅里叶变换，第二子模块适于执行1个5点或1个4点或2个3点或3个2点离散傅里叶变换，第三模块适于执行1个4点离散傅里叶变换。The device according to claim 8, wherein the processing module comprises a first sub-module, a second sub-module and a third sub-module, wherein the first sub-module is adapted to execute one 5-point or one 4-point point or 2 3-point or 3 2-point discrete Fourier transforms, the second submodule is adapted to perform 1 5-point or 1 4-point or 2 3-point or 3 2-point discrete Fourier transforms, the first The three modules are adapted to perform a 4-point discrete Fourier transform.
  11. 一种存储介质，其上存储有计算机指令，其特征在于，所述计算机指令运行时执行权利要求1至7中任一项所述方法的步骤。A storage medium having computer instructions stored thereon, characterized in that, when the computer instructions are executed, the steps of the method according to any one of claims 1 to 7 are executed.
  12. 一种处理基为12倍数点离散傅里叶变换的装置，其特征在于，包括：A device for processing the discrete Fourier transform of a multiple of 12 points, characterized in that it includes:
    分解模块，其适于基于素因子算法将所述12倍数点分解，从而获得如下基于若干个系数的第一分解式和第二分解式：A decomposition module, which is adapted to decompose the 12-multiple points based on a prime factor algorithm, so as to obtain the following first decomposition formula and second decomposition formula based on several coefficients:
    Figure PCTCN2022073624-appb-100005
    Figure PCTCN2022073624-appb-100005
    Figure PCTCN2022073624-appb-100006
    Figure PCTCN2022073624-appb-100006
    其中，m为所述系数的个数，N为所述12倍数点，所述第一分解式中n为所述离散傅里叶变换中输入数据的序并且大于或等于0而小于N，ni为序n的系数并且具有相应的取值范围，ai为与ni对应的第一分解参数，所述第二分解式中k为所述离散傅里叶变换中输出数据的序并且大于或等于0而小于N，ki为k的系数并且具有相应的取值范围，bi为与ki对应的第二分解参数；Wherein, m is the number of the coefficients, N is the 12-multiple point, in the first decomposition formula n is the order of the input data in the discrete Fourier transform and is greater than or equal to 0 but less than N, ni is a coefficient of order n and has a corresponding value range, ai is the first decomposition parameter corresponding to ni, and k in the second decomposition formula is the order of the output data in the discrete Fourier transform and is greater than or equal to 0 And less than N, ki is a coefficient of k and has a corresponding value range, and bi is the second decomposition parameter corresponding to ki;
    运算模块，其适于分别将系数n0至nm的可取值个数作为小点数 基而进行m+1轮运算，在每轮运算中，进行小点数基离散傅里叶变换而得到计算结果，其中，各系数的取值满足所述第一分解式；an operation module, which is suitable for performing m+1 rounds of operations using the number of possible values of coefficients n0 to nm as the small-point basis, and in each round of operation, performs discrete Fourier transform on the small-point basis to obtain the calculation result, Wherein, the value of each coefficient satisfies the first decomposition formula;
    存储模块，其适于将所述计算结果作为每轮中的输出数据而存储于存储器的存储地址，其中，所述存储地址包括通过如下公式确定的存储块号和相对存储地址：A storage module, which is adapted to store the calculation result in a storage address of the memory as output data in each round, wherein the storage address includes a storage block number and a relative storage address determined by the following formula:
    Figure PCTCN2022073624-appb-100007
    Figure PCTCN2022073624-appb-100007
    Figure PCTCN2022073624-appb-100008
    Figure PCTCN2022073624-appb-100008
    其中，bank_sel为所述存储块号，bank_addr为所述相对存储地址，ci和di分别为第一调节参数和第二调节参数；Wherein, bank_sel is the storage block number, bank_addr is the relative storage address, and ci and di are the first adjustment parameter and the second adjustment parameter, respectively;
    获取模块，其适于基于所述第二分解式获取所述离散傅里叶变换的最终输出数据。an acquisition module adapted to acquire the final output data of the discrete Fourier transform based on the second decomposition.
  13. 根据权利要求12所述的装置，其特征在于，所述存储模块适于接收并且存储所述离散傅里叶变换的初始输入数据以及每轮运算中的输出数据，在第一轮运算中获取所述初始输入数据而进行所述小点数基离散傅里叶变换，在后续各轮运算中获取前一轮运算的输出数据而作为该轮运算的输入数据以进行所述小点数基离散傅里叶变换。The device according to claim 12, wherein the storage module is adapted to receive and store the initial input data of the discrete Fourier transform and the output data in each round of operation, and the obtained data is obtained in the first round of operation. The initial input data is used to perform the small-point discrete Fourier transform, and in each subsequent round of operations, the output data of the previous round of operations is obtained as the input data of this round of operations to perform the small-point discrete Fourier transform. transform.
  14. 根据权利要求12所述的装置，其特征在于，所述存储模块适于将每轮运算中的输出数据存储于该轮运算中输入数据所存储的存储地址。The device according to claim 12, wherein the storage module is adapted to store the output data in each round of operation at the storage address where the input data in the round of operation is stored.
  15. 根据权利要求12所述的装置，其特征在于，所述运算模块适于在每轮运算中，使可取值个数作为小点数基的系数在其取值范围内取值，使其余系数中的部分系数在其范围内取值和/或乒乓取值，并且遍历其余系数中的剩余系数以进行小点数基离散傅里叶变换，从而得到计算结果。The device according to claim 12, wherein the operation module is adapted to, in each round of operation, make the coefficient with the number of possible values as the small-point base take a value within its value range, and make the remaining coefficients in the value range. Part of the coefficients of , take values and/or ping-pong values within their range, and traverse the remaining coefficients in the remaining coefficients to perform a small-point base discrete Fourier transform to obtain the calculation result.
  16. 根据权利要求12所述的装置，其特征在于，所述获取模块适于： 基于所述第二分解式获取k的系数的取值，基于k的系数的取值获取对应的n的系数的取值，基于n的系数的取值、所述存储块号的计算公式和所述相对存储地址的计算公式计算所述输出数据的存储地址，以及基于所述存储地址获取所述最终输出数据。The device according to claim 12, wherein the obtaining module is adapted to: obtain the value of the coefficient of k based on the second decomposition formula, and obtain the value of the coefficient of n corresponding to the value of the coefficient of k based on the value of the coefficient of k value, the storage address of the output data is calculated based on the value of the coefficient of n, the calculation formula of the storage block number and the calculation formula of the relative storage address, and the final output data is obtained based on the storage address.
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