WO2022146506A1 - Adaptive low-dropout input voltage control - Google Patents

Abstract

An example device includes: a switched mode power converter; a plurality of low-dropout regulators that operate using power received from the switched mode power converter; and circuitry configured to: obtain a respective representation of load current of each of the plurality of low-dropout regulators; determine a maximum representation of load current of the obtained representations of load current of the plurality of low-dropout regulators; and adjust an output voltage of the switched mode power converter based on the determined maximum output voltage.

Description

ADAPTIVE LOW-DROPOUT INPUT VOLTAGE CONTROL

[0001] This application claims the benefit of US Provisional Patent Application No. 63/130,959, filed 28 December 2020, the entire contents of which is incorporated herein by reference.

BACKGROUND

[0002] Computing devices may have several components that are each supplied by a separate power supply. For instance, a system on a chip (SoC) may include a central processing unit (CPU), graphical processing unit (GPU), modem, digital signal processor (DSP), etc., and a separate power supply for each of the CPU, GPU, modem, DSP, etc.

SUMMARY

[0003] This disclosure generally relates to control of an input power supply that provides power to a plurality of power supplies based on operational characteristics of the plurality of power supplies. The plurality of power supplies may include a plurality of low-dropout regulators (LDOs). Output regulation of an LDO may be maintained so long as the LDO receives an input voltage that is higher than an output voltage of the LDO plus a dropout voltage of the LDO. Where a single input power supply provides power to a plurality of LDOs, the single input power supply needs to supply an input voltage to the LDOs sufficient to maintain output regulation of all of the LDOs.

[0004] In accordance with one or more techniques of this disclosure, circuitry may adjust a voltage supplied to a plurality of LDOs from an input power supply based on a load current of the LDOs. For instance, the circuitry may obtain a respective representation of load current of each of the plurality of LDOs. The representations of load current may be dropout voltages of the plurality of LDOs. The circuitry may determine a maximum representation of load current of the obtained representations of load current of the plurality of low-dropout regulators, and adjust an output voltage of the switched mode power converter based on the determined maximum output voltage. For instance, the circuitry may reduce the voltage supplied by the input power supply to a minimal level while enabling the plurality of LDOs to maintain voltage regulation. In this way, the circuitry may enable a minimization in the power consumed while still enabling voltage regulation and ensuring dynamic performance by the LDOs. [0005] As one example, a device includes a. switched mode power converter configured to output a pow er signal; a plurality of low -dropout regulators that operate using the power signal received from the switched mode power converter; and circuitry configured to: obtain a respective representation of load current of each of the plurality of low-dropout regulators; determine a maximum representation of load current of the obtained representations of load current of the plurality of low-dropout regulators; and adjust an output voltage of the power signal output by the switched mode power converter based on the determined maximum representation of load current.

[0006] As another example, a method includes obtaining a respective representation of load current of each of a plurality of low-dropout regulators that operate using power received from a switched mode power converter; determining a maximum represen tation of load current of the obtained representations of load current of the plurality' of low-dropout regulators; and adjusting an output voltage of tire switched mode power converter based on the determined maximum representation of load current.

[0007] The details of one or more examples are set forth in the accompanying drawings and the description below. Other features, objects, and advantages will be apparent from the description and drawings, and from the claims.

BRIEF DESCRIPTION OF DRAWINGS

[0008] FIG. 1 is a conceptual diagram illustrating a system that includes a plurality of low- dropout regulators (LDOs) that operate using power received from a single input power converter, in accordance with one or more techniques of this disclosure.

[0009] FIG. 2 is a schematic diagram illustrating a system that includes a plurality of low- dropout regulators (LDOs) that operate using power received from a single input pow er converter, in accordance with one or more techniques of this disclosure.

[0010] FIG. 3 is a schematic diagram of an example dropout detector of an LDO, in accordance with one or more aspects of this disclosure,

[0011] FIG. 4 is a schematic diagram of a mapping and/or shaping block, in accordance with one or more techniques of this disclosure.

[0012] FIG. 5 is a graph illustrating example signals of a system that adjusts a voltage level of a power signal generated by an input, power converter based on operational characteristics of LDOs powered by the power signal, in accordance with one or more techniques of this disclosure. [0013] FIGS. 6A and 6B are graphs illustrating example signals of a system that adjusts a voltage level of a power signal generated by an input power converter based on operational characteristics of LDOs powered by the power signal, in accordance with one or more techniques of this disclosure.

DETAILED DESCRIPTION

[0014] FIG, 1 is a conceptual diagram illustrating a system that includes a plurality of low- dropout regulators (LDOs) that operate using power received from a single input power converter, in accordance with one or more techniques of this disclosure. A low-dropout regulator (LDO) is a voltage regulator, such as a DC linear voltage regulator, that can regulate its output voltage even when the supply voltage is close to the output voltage. As shown in FIG. 1, system 100 may include power source 102, input power converter 104, low- dropout regulators 106A-106N (collectively, “LDOs 106”), loads 108A-108N (collectively, “loads 108”), and controller 110. In some examples, one or more components of system 100 may be located on a device, such as a chip or integrated circuit, that may be included in another device. Examples of a device that may include system 100 include, but are not limited to, a mobile phone, a camera device, a tablet computer, a smart display , a laptop computer, a desktop computer, a gaming system, a media player, an e-book reader, a television platform, a vehicle infotainment system or head unit, or a wearable computing device (e.g., a computerized watch, a head mounted device such as a VR/AR headset, computerized eye wear, a computerized glove).

[0015] Power source 102 may be any component capable of providing electrical power to other components of system 100. Examples of power source 102 include, but are not limited to, batteries, solar panels, wall adapters, wireless charging receive coils, etc. As shown in FIG. 1, power source 102 may provide electrical power (e.g., unregulated direct current (DC) electrical power) to input power converter 104.

[0016] Input power converter 104 may be a power supply capable of outputting a regulated power signal to other components of system 100. Examples of input power converter 104 include switched mode power supplies (e.g., buck, boost, buck-boost, cuk, flyback, etc.). A voltage level of a power signal output by input pow er converter 104 may be adjustable. For instance, input power converter 104 may output a DC power signal to LDOs 106 at a set voltage level, such as a voltage level set by controller 110.

[0017] LDOs 106 may be low-dropout regulators configured to provide power to a corresponding load of loads 108. For instance, LDO 106A may provide a power signal to load 108A, LDO 106B may provide a power signal to load 108B, . . ., and LDO 106N may provide a power signal to load 108N. LDOs 106 may provide the power signals to loads 108 with characteristics (e.g., voltage levels) based on needs of loads 108. As such, each of LDOs 106 may provide power to a separate power rail. To maintain output regulation, the input voltage received by an LDO of LDOs 106 may need to be higher than an output of the LDO plus a dropout voltage of the LDO. The dropout voltage of an LDO may be a function of a load current of the LDO and a junction temperature of the LDO.

[0018] Loads 108 may represent various components of system 100 that consume power. Examples of loads 108 include, but are not limited to, a central processing unit (CPU), graphical processing unit (GPU), modem, digital signal processor (DSP), etc. As noted above, each of loads 108 may receive power from a separate LDO of LDOs 106.

[0019] Controller 110 may include circuitry configured to control operation of various components of sy stem 100. For instance, controller 110 may control input power converter 104 to output a power signal (e.g., to LDOs 106) at a set voltage output level. Examples of controller 110 include, but are not limited to, one or more digital signal processors (DSPs), general purpose microprocessors, application specific integrated circuits (ASICs), field programmable logic arrays (FPGAs), systems on a chip (SoC), or other equivalent integrated or discrete logic circuitry, or analog circuitry.

[0020] As noted above, to maintain output regulation, the input voltage received by an LDO of LDOs 106 may need to be higher than an output of the LDO plus a dropout voltage of the LDO. As such, controller 110 may cause input power converter 104 to output the power signal to LDOs 106 with enough headroom to accommodate a maximum dropout voltage (V_dropout-max), board direct current resistance (DCR) drop, and margin for load transient. As one specific example, controller 110 may cause input power converter 104 to output a power signal with a voltage, which may be referred to as pre-regulation voltage, to be 150-250mV higher than the LDO output voltage, even though some LDO designs could achieve lower than 100mV dropout for typical conditions.

[0021] While it may be desirable for input power converter 104 to supply LDOs 106 with a power signal having a voltage level high enough to enable LDOs 106 to maintain output regulation, it may also be desirable to minimize the voltage level of the power signal. For instance, the amount of power consumed by LDOs 106 may be linearly correlated with the voltage level difference of the power signal. As such, it is desirable for input power converter 104 to output the power signal to LDOs 106 w ith a high enough voltage level to maintain output regulation but not significantly higher. [0022] In accordance with one or more techniques of this disclosure, as opposed to controlling input power converter 104 to output the power signal with a constant (e.g., static) voltage level, controller 110 may control input power converter 104 to output the power signal with a dynamic voltage level determined based on one or more operational characteristics of LDOs 106. For instance, controller 110 may receive representations of operational characteristics from LDOs 106. Examples of operational characteristics include, but are not limited to, output current levels, dropout voltage levels, etc.

[0023] Controller 110 may determine, based on the operational characteristics, an output voltage level. For instance, controller 110 may determine an output voltage level that would enable LDOs 106 to maintain regulation while minimizing power dissipation/consumption. As one specific example, where the operational characteristics include representations of load currents of LDOs 106 (e.g., dropout voltage levels of LDOs 106), controller 110 may determine the output voltage level based on a maximum of the representations of load current. As such, controller 110 may set the output voltage level of input power converter 104 to cater to an LDO of LDOs 106 that has the highest input voltage needed need to maintain regulation. For instance, controller 110 may set the output voltage level to a minimum level to enable output regulation by LDOs 106. In this way, the techniques of this disclosure enable LDOs 106 to be provided with a power signal having a voltage level sufficient to enable LDOs 106 to maintain regulation while also minimizing power dissipation.

[0024] By way of example, the power source may be an internal battery that supplies power to a battery operated device, such as a mobile phone that includes circuitry to enable communication, a user interface, and computation. The circuitry receives power from the power source via the input power converter and low-dropout regulators, in a highly efficient manner that extends the battery life, and thus operation, of the mobile phone.

[0025] FIG. 2 is a schematic diagram illu strating a system that includes a plurality of low- dropout regulators (LDOs) that operate using power received from a single input power converter, in accordance with one or more techniques of this disclosure. As shown in FIG. 2, system 200 may include power source 202, input power converter 204, low-dropout regulators 206A-206N (collectively, “LDOs 206”), loads 208A-208N (collectively, “loads 208”), and controller 210. System 200 of FIG. 2 may be considered to be an example of system 100 of FIG. 1 . For instance, power source 202, input power converter 204, LDOs 206, loads 208, and controller 210 of system 200 of FIG. 2 may be considered to be examples of power source 102, input power converter 104, LDOs 106, loads 108, and controller 110 of system 100 of FIG. 1.

[0026] As shown in FIG. 2, each of LDOs 206 may include components configured to detect a dropout voltage, which may be referred to as a dropout detector. The dropout detectors may output the dropout voltages or their representations, which as discussed above may represent output currents to loads 208, to controller 210. Controller 210 may include components, such as a mapping block, configured to determine the needed LDO input voltage that is the output of input power converter 204 (e.g., a pre-regulation buck converter), according to the most loaded one out of all downstream LDOs 106. Both steady and dynamic load conditions of each and every LDO of LDOs 106 may be guaranteed.

[0027] FIG. 3 is a schematic diagram of an example dropout detector of an LDO, in accordance with one or more aspects of this disclosure. Where an LDO is already properly compensated, dropout detector 300 may reproduce the drive voltage V_gs of the LDO pass MOSFET. As shown in FIG. 3, dropout detector 300 may include operational transconductance amplifier (OTA) 302. In some examples, a gain of OTA 302 and output impedance accordingly may be set in accordance with Eq (1)-(3) below. In this way, the output V_{dect_n} may be the same as the value of in DC. However, this design may enable the output V_{dect_n} to have a faster rising edge, which may assist with load transient performance.

[0028] Dropout detector 300 may include at least three features. First, based on the information of pass element V_gs, the relative load current may be determined. From the relative load current, the corresponding needed headroom voltage of the LDO may be determined. In this way, different current rated LDOs may be parallelized with reduced complexity as compared to direct current sensing methods. Secondly, the V_{dect_k} may reflect the dropout situation rapidly whenever the LDO input output difference is not enough (e.g., to maintain regulation). Thirdly, the design of dropout detector 300 may ensure that the output V_{dect_k} of each LDO uniformly reflects the needed headroom voltage, to enable transparency to controller 210 (e.g., to pre-buck regulation control).

[0029] As noted above, each LDO may provide operational characteristics to controller 210. For instance, the buffered V_{dect_k} of each LDO may be fed into a maximum value selection logic of controller 210. As also noted above, controller 210, and its components, may be implemented either in analog or digital. The maximum value selection logic may select the maximum of V_{dect_k} representing the most loaded LDO rails that would need the highest headroom voltage. The maximum value selection logic may output the selected maximum of V_{dect_k} to mapping and shaping blocks to determine a reference voltage that would cause an input power converter (e.g., 104, 204) to output a power signal with a desired voltage level to LDOs (e.g., 106, 2.06).

[0030] FIG. 4 is a schematic diagram of a mapping and/or shaping block, in accordance with one or more techniques of this disclosure. Mapping and/or shaping block (MSB) 400 of FIG. 4, may be included in a controller, such as controller 110 of FIG. 1 or controller 210 of FIG. 2. As shown in FIG. 4, MSB 400 may include a reduced-size LDO FETto map the detected voltage back to load current. Read-out resistor R₂ may be selected to generate the needed headroom voltage V_{ref_ delta}. The mapping MOSFET current that may be 1/k of the LDO current and resistance R₂ may enable the maximum dropout voltage at maximum load and operating temperature.

[0031] L₂ of MSB 400 may be adopted to create overshoot for the rising edge which may overdrive the input power converter (e.g., overdrive the pre-regulation Buck). Adopting L₂ in this way may improve the whole system transient performance. C₂ may be chosen to knock down high frequency noises. Also, the time constant of R₂ * C₂ may determine the discharging time during the V_{ref_ delta} level transitions, that may filter out high frequency load steps but may have a negative impact on power savings. One example relationship between tire current I_d, R₂, and tire reference voltage may be provided by Eq (4).

[0032] The controller (e.g., 110, 210) may determine a reference voltage to feed into the input power converter (e.g., 104, 204). For instance, the controller may cause the input power converter to output a power signal with an output voltage level equal to the reference voltage. As one example, the controller may determine the reference voltage in accordance with Eq (5).

[0033] V_{LDO_max} may be the maximum output voltage of downstream LDOs. In some scenarios, the maximum output voltages of all LDOs may be the same. However, in other scenarios, the system may need different outputs of the LDOs supplied by a single input power converter, dynamically or statically. The techniques of this disclosure may be applicable to either scenario. For example, the controller may link the generated V_{ref_ delta} to the specific LDO which has output voltage lower than V_{LDO_max}, and level-shift the generated V_{ref_ delta} accordingly. V_margin may be an artificial parameter to serve two purposes: one is to ensure the system is still stable in sleep mode (all currents are close to 0); and the other is to cope with power converter ripple and other non-ideal dynamics. As such, compared to the technique of Eq. (6), the proposed adaptive control scheme would save the loss dynamically according to LDO load currents.

[0034] FIG. 5 is a graph illustrating example signals of a system that adjusts a voltage level of a power signal generated by an input power converter based on operational characteristics of LDOs powered by the power signal, in accordance with one or more techniques of this disclosure. Graph 500 illustrates simulations for two comparable cases: three 1.2V LDOs are rated 300mA, 600mA, and 1000mA respectively, which may need 180mV headroom to avoid dropout operation. The three LDOs are driven by a Buck which is set at 1.38 V, and by the proposed adaptive controlled Buck.

[0035] As can be seen in graph 500, the output of the pre-regulation Buck may change with the load current variation of LDO currents, between 1.23 and 1 ,38V. Therefore, the total LDO losses reduce from 82.8mW, if the Buck voltage is set to the fixed 1 ,38V, to 66.2mW of the proposed adaptive control, which may be a 20% savings for the specific load profile illustrated. As also can be seen, the largest saving may occur near the middle loading of each LDO rail, and savings could be as high as 50% during extended operation with middle loading.

[0036] FIGS. 6A and 6B are graphs illustrating example signals of a system that adjusts a voltage level of a power signal generated by an input power converter based on operational characteristics of LDOs powered by the power signal, in accordance with one or more techniques of this disclosure. Graphs 600A and 600B illustrate signals of a system, such as system 100 or system 200, in response to fast transient steps in LDO output. As can be seen from graphs 600A and 600B, the Buck responds to the LDO load step up by increasing the output quickly (e.g., as compared to non-dynamic control which may experience output dip). The total input power converter plus LDO loop could be treated as a cascade R/C two-pole system because both the input power converter and LDOs may be self-closed loop and compensated. A zero may be introduced (e.g., to increase system stability). In one example, the zero may be introduced by R₁/C₁ in the dropout detector (e.g., dropout detector 300 of FIG. 3), and the Eq. (3) gives the guideline of setting the zero frequency lower than the LDO bandwidth (e.g., assuming that the input power converter bandwidth is faster than the LDOs). [0037] FIG. 7 is a flowchart illustrating an example technique for controlling a single power converter that provides power to a plurality of low-dropout regulators (LDOs), in accordance with one or more techniques of this disclosure. The technique of FIG. 7 may performed by various components of a system, such as system 100 of FIG. 1.

[0038] System 100 may obtain a respective representation of load current of each of a plurality of low-dropout regulators that operate using power received from a switched mode power converter (802). For instance, controller 210 may obtain a respective representation of load current of each of low-dropout regulators 206 (e.g., that operate using power received from input power converter 204). In some examples, the respective representations of load cunent may be respective representations of dropout voltages.

[0039] System 100 may determine a maximum representation of load current of the obtained representations of load current of the plurality of low-dropout regulators (804). For instance, controller 210 may analyze the representations of load current received from low-dropout regulators 206 and select the representation with the greatest value as the maximum representation of load current.

[0040] System 100 may adjust an output voltage of the switched mode power converter based on the determined maximum representation of load current (806). For instance, controller 210 may adjust an output signal (e.g., V_{ref_buck}) that controls an output voltage level of input power converter 204. As one example, controller 210 may determ ine a reference voltage as a sum of the maximum representation of load current, a maximum output voltage of the low-dropout regulators, and a voltage margin; and adjust the output voltage of the switched mode power converter based on the determined reference voltage. In some examples, to determine the reference voltage, controller 210 may determine the reference voltage in accordance with the following equation:

where V_ref is the reference voltage, V_{LDO_max} is the maximum output voltage of the low- dropout regulators, V_{ref_ delta} is the maximum representation of load current, and V_margin is the voltage margin.

[0041] The following numbered examples may illustrate one or more aspects of this disclosure: [0042] Example 1. A device comprising: a switched mode power converter configured to output a power signal; a plurality of low -dropout regulators that operate using the power signal received from the switched mode power converter; and circuitry configured to: obtain a respective representation of load current of each of the plurality of low-dropout regulators; determine a maximum representation of load current of the obtained representations of load current of the plurality of low-dropout regulators; and adjust an output voltage of the power signal output by the switched mode power converter based on the determined maximum representation of load current.

[0043] Example 2. The device of example 1, wherein, to obtain the respective representation of load current of each of the plurality of low-dropout regulators, the circuitry is configured to: obtain a respective representation of dropout voltage of each of the plurality of low-dropout regulators.

[0044] Example 3. The device of example 1, wherein, to adjust the output voltage, the circuitry is configured to: determine a reference voltage as a sum of: the maximum representation of load current, a maximum output voltage of the low-dropout regulators, and a voltage margin; and adjust the output voltage of the sw itched mode power converter based on the determined reference voltage .

[0045] Example 4, The device of example 3, wherein, to determine the reference voltage, the circuitry is configured to determine the reference voltage in accordance with the following equation:

where V_ref is the reference voltage, V_{LDO_max} is the maximum output voltage of the low- dropout regulators, V_{ref_ delta} is the maximum representation of load current, and V_margin is the voltage margin.

[0046] Example 5. The device of example 3, wherein, to adjust the output voltage, the circuitry is configured to: cause the switched mode power converter to output the power signal with the output voltage equal to the reference voltage.

[0047] Example 6. The device of example 1, wherein the circuitry comprises one or more processors, the device further comprising a memory storing instructions that, when executed, cause the one or more processors to: determine the maximum representation of load current of the obtained representations of load current of the plurality of low-dropout regulators; and adjust the output voltage of the power signal based on the determined maximum representation of load current. [0048] Example 7. The device of example 1 , wherein the circuitry comprises discrete circuitry configured to: determine the maximum representation of load current of the obtained representations of load current of the plurality of low-dropout regulators; and adjust the output voltage of the switched mode power converter based on the determined maximum representation of load current.

[0049] Example 8. The device of example 1, further comprising: a plurality of loads, each configured to operate using a power signal from a respective low-dropout regulator of the plurality of low-dropout regulators.

[0050] Example 9. The device of example 8, wherein the plurality of loads includes one or more of a central processing unit (CPU), graphical processing unit (GPU), modem, and a digital signal processor (DSP).

[0051 ] Example 10. The device of example 1, wherein, to adjust the output voltage, the circuitry is configured to: set the output voltage to a minimum level to enable output regulation by the plurality of low-dropout regulators.

[0052] Example 11. A method comprising: obtaining a respective representation of load current of each of a plurality of low-dropout regulators that operate using power received from a switched mode power converter; determining a maximum representation of load current of the obtained representations of load current of the plurality of low-dropout regulators; and adjusting an output voltage of the switched mode power converter based on tire determined maximum representation of load current.

[0053] Example 12. The method of example 11, wherein obtaining the respective representation of load current of each of the plurality of low-dropout regulators comprises: obtaining a respective representation of dropout voltage of each of the plurality of low- dropout regulators.

[0054] Example 13. The method of example 11, wherein adjusting the output voltage comprises: determining a reference voltage as a sum of: the maximum representation of load current, a maximum output voltage of the low-dropout regulators, and a voltage margin; and adjusting the output voltage of the switched mode power converter based on the determined reference voltage.

[0055] Example 14. The method of example 13, wherein determining the reference voltage comprises determining the reference voltage in accordance with the following equation:

where V_ref is the reference voltage, V_{LDO_max} is the maximum output voltage of the low- dropout regulators, V_{ref_ delta} is the maximum representation of load current, and V_margin is the voltage margin.

[0056] The techniques described in this disclosure may be implemented, at least in part, in hardware, software, firmware, or any combination thereof. For example, various aspects of the described techniques may be implemented within one or more processors, including one or more microprocessors, digital signal processors (DSPs), application specific integrated circuits (ASICs), field programmable gate arrays (FPGAs), or any other equivalent integrated or discrete logic circuitry, as well as any combinations of such components. The term “processor” or “processing circuitry” may generally refer to any of the foregoing logic circuitry, alone or in combination with other logic circuitry, or any other equivalent circuitry. A control unit including hardware may also perform one or more of the techniques of this disclosure.

[0057] Such hardware, software, and firmware may be implemented within the same device or within separate devices to support the various techniques described in this disclosure. In addition, any of the described units, modules or components may be implemen ted together or separately as discrete but interoperable logic devices. Depiction of different features as modules or units is intended to highlight different functional aspects and does not necessarily imply that such modules or units must be realized by separate hardware, firmware, or software components. Rather, functionality associated with one or more modules or units may be performed by separate hardware, firmware, or software components, or integrated within common or separate hardware, firmware, or software components.

[0058] The techniques described in this disclosure may also be embodied or encoded in an article of manufacture including a computer-readable storage medium encoded w ith instructions. Instructions embedded or encoded in an article of manufacture including a computer-readable storage medium encoded, may cause one or more programmable processors, or other processors, to implement one or more of the techniques described herein, such as when instructions included or encoded in the computer-readable storage medium are executed by the one or more processors. Computer readable storage media may include random access memory (RAM), read only memory (ROM), programmable read only memory (PROM), erasable programmable read only memory (EPROM), electronically erasable programmable read only memory (EEPROM), flash memory, a hard disk, a compact disc ROM (CD-ROM), a floppy disk, a cassette, magnetic media, optical media, or other computer readable media. In some examples, an article of manufacture may include one or more computer-readable storage media.

[0059] In some examples, a computer-readable storage medium may include a non-transitory medium. The term “non-transitory” may indicate that the storage medium is not embodied in a carrier wave or a propagated signal. In certain examples, a non-transitory storage medium may store data that can, overtime, change (e.g., in RAM or cache).

[0060] Various aspects have been described in this disclosure. These and other aspects are within the scope of the following claims.

Claims

WHAT IS CLAIMED IS:

1. A device comprising: a switched mode power converter configured to output a power signal; a plurality of low-dropout regulators that operate using the power signal received from the switched mode power converter; and circuitry configured to: obtain a respective representation of load current of each of the plurality of low-dropout regulators; determine a maximum representation of load current of the obtained representations of load current of the plurality of low-dropout regulators; and adjust tin output voltage of the power signal output by the switched mode power converter based on the determined maximum representation of load current.

2. The device of claim 1, wherein, to obtain the respective representation of load current, of each of the plurality of low-dropout regulators, the circuitry is configured to: obtain a respective representation of dropout voltage of each of the plurality of low- dropout regulators.

3. The device of claim 1 or claim 2, wherein, to adjust the output voltage, the circuitry is configured to: determine a reference voltage as a sum of: the maximum representation of load current, a maximum output voltage of the low-dropout regulators, and a voltage margin; and adjust the output voltage of the switched mode power converter based on the determined reference voltage.

4. The device of claim 3, wherein, to determine the reference voltage, the circuitry is configured to determine the reference voltage in accordance with the following equation:

where V_ref the reference voltage, V_{LDO_max} is the maximum output voltage of the low- dropout regulators, V_{ref_ delta} is the maximum representation of load current, and V_margin is the voltage margin.

5. The device of claim 3 or claim 4, wherein, to adjust the output voltage, the circuitry is configured to: cause the switched mode power converter to output the power signal with the output voltage equal to the reference voltage.

6. The device of any of claims 1-5, wherein the circuitry comprises one or more processors, the device further comprising a memory storing instructions that, when executed, cause the one or more processors to: determine the maximum representation of load current of the obtained representations of load current of the plurality of low-dropout regulators; and adjust the output voltage of the power signal based on the determined maximum representation of load current.

7. The device of any of claims 1-6, wherein the circuitry comprises discrete circuitry configured to: determine the maximum representation of load current of the obtained representations of load current of the plurality of low-dropout regulators; and adjust the output voltage of the switched mode power converter based on the determined maximum representation of load current.

8. The device of any of claims 1-7, further comprising: a plurality of loads, each configured to operate using a power signal from a respective low-dropout regulator of the plurality of low-dropout regulators.

9. The device of claim 8, wherein the plurality of loads includes one or more of a central processing unit (CPU), graphical processing unit (GPU), modem, and a digital signal processor (DSP).

10. The device of any of claims 1-9, wherein, to adjust the output voltage, the circuitry is configured to: set the output voltage to a minimum level to enable output regulation by the plurality of low-dropout regulators.

11. A method comprising: obtaining a respective representation of load current of each of a plurality of low- dropout regulators that operate using power received from a switched mode power converter; determining a maximum representation of load current of the obtained representations of load current of the plurality of low-dropout regulators; and adjusting an output voltage of the switched mode power converter based on the determined maximum representation of load current.

12. The method of claim 11, wherein obtaining the respective representation of load current of each of the plurality of low-dropout regulators comprises: obtaining a respective representation of dropout voltage of each of the plurality of low-dropout regulators.

13. The method of claim 11 or claim 12, wherein adjusting the output voltage comprises: determining a reference voltage as a sum of: the maximum representation of load current, a maximum output voltage of the low-dropout regulators, and a voltage margin; and adjusting the output voltage of the switched mode power converter based on the determined reference voltage.

14. The method of claim 13, wherein determining the reference voltage comprises determining the reference voltage in accordance with the following equation:

where V_ref is the reference voltage, V_{LDO_max} is the maximum output voltage of the low- dropout regulators, V_{ref_ delta} is the maximum representation of load current, and V_margin is the voltage margin.

15. A computer-readable storage medium storing instructions that, when executed, cause one or more processors to perform the method of any of claims 11-14.

16. A portable device including a battery and a controller to perform the method of any of claims 11-14.