WO2022134012A1 - 显示面板和显示装置 - Google Patents

显示面板和显示装置 Download PDF

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Publication number
WO2022134012A1
WO2022134012A1 PCT/CN2020/139453 CN2020139453W WO2022134012A1 WO 2022134012 A1 WO2022134012 A1 WO 2022134012A1 CN 2020139453 W CN2020139453 W CN 2020139453W WO 2022134012 A1 WO2022134012 A1 WO 2022134012A1
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WO
WIPO (PCT)
Prior art keywords
light
layer
substrate
transmitting
display panel
Prior art date
Application number
PCT/CN2020/139453
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English (en)
French (fr)
Inventor
海晓泉
董学
王雷
陈小川
王迎姿
Original Assignee
京东方科技集团股份有限公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 京东方科技集团股份有限公司 filed Critical 京东方科技集团股份有限公司
Priority to PCT/CN2020/139453 priority Critical patent/WO2022134012A1/zh
Priority to CN202080003653.9A priority patent/CN115244591A/zh
Priority to GB2217853.7A priority patent/GB2610731A/en
Priority to US17/621,758 priority patent/US11864433B2/en
Publication of WO2022134012A1 publication Critical patent/WO2022134012A1/zh

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    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10KORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10OLED displays
    • H10K59/12Active-matrix OLED [AMOLED] displays
    • H10K59/124Insulating layers formed between TFT elements and OLED elements
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10KORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10OLED displays
    • H10K59/12Active-matrix OLED [AMOLED] displays
    • H10K59/126Shielding, e.g. light-blocking means over the TFTs
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06VIMAGE OR VIDEO RECOGNITION OR UNDERSTANDING
    • G06V10/00Arrangements for image or video recognition or understanding
    • G06V10/10Image acquisition
    • G06V10/12Details of acquisition arrangements; Constructional details thereof
    • G06V10/14Optical characteristics of the device performing the acquisition or on the illumination arrangements
    • G06V10/145Illumination specially adapted for pattern recognition, e.g. using gratings
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06VIMAGE OR VIDEO RECOGNITION OR UNDERSTANDING
    • G06V40/00Recognition of biometric, human-related or animal-related patterns in image or video data
    • G06V40/10Human or animal bodies, e.g. vehicle occupants or pedestrians; Body parts, e.g. hands
    • G06V40/12Fingerprints or palmprints
    • G06V40/13Sensors therefor
    • G06V40/1318Sensors therefor using electro-optical elements or layers, e.g. electroluminescent sensing
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09FDISPLAYING; ADVERTISING; SIGNS; LABELS OR NAME-PLATES; SEALS
    • G09F9/00Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements
    • G09F9/30Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements in which the desired character or characters are formed by combining individual elements
    • G09F9/33Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements in which the desired character or characters are formed by combining individual elements being semiconductor devices, e.g. diodes
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10KORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/60OLEDs integrated with inorganic light-sensitive elements, e.g. with inorganic solar cells or inorganic photodiodes
    • H10K59/65OLEDs integrated with inorganic image sensors
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/01Input arrangements or combined input and output arrangements for interaction between user and computer
    • G06F3/03Arrangements for converting the position or the displacement of a member into a coded form
    • G06F3/041Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means
    • G06F3/0412Digitisers structurally integrated in a display

Definitions

  • the present disclosure relates to the field of display, and in particular, to a display panel and a display device.
  • the photoelectric sensor such as a PIN photodiode
  • Light-emitting elements such as organic light-emitting diodes
  • photoelectric sensors for fingerprint recognition, the photoelectric sensors receive the light reflected from the valley or ridge position of the fingerprint and generate corresponding electrical signals; due to the difference between the valley position and the ridge position There are differences in reflections, and therefore differences in the generated electrical signals, enabling the identification of valleys and ridges.
  • the present disclosure aims to solve at least one of the technical problems existing in the prior art, and proposes a display panel and a display device.
  • an embodiment of the present disclosure provides a display panel, including:
  • a photoelectric sensing structure located on one side of the substrate
  • a light-emitting structure located on the side of the photoelectric sensing structure away from the substrate, the light-emitting structure includes: a plurality of light-emitting elements, the light-emitting elements include: a first electrode and a light-emitting layer arranged in sequence along a direction away from the substrate and the second electrode;
  • the optical path structure is located between the photoelectric sensing structure and the second electrode, and is configured to align the light located on the side of the photoelectric sensing structure away from the substrate and whose propagation direction is close to the photoelectric sensing structure direct processing;
  • the photosensor structure does not overlap or partially overlaps with the light emitting structure
  • the optical path structure In a direction perpendicular to the substrate, the optical path structure at least partially overlaps the photosensor structure.
  • the optical path structure has a plurality of light transmission channels
  • the propagation direction of the light emitted from the light-transmitting channel and directed toward the photoelectric sensing structure is at an included angle of [0°, 72°] with the normal line of the plane where the substrate is located.
  • the propagation direction of the light emitted from the light-transmitting channel and directed toward the photoelectric sensing structure is at an included angle of [0°, 20°] with the normal of the plane where the substrate is located.
  • the photoelectric sensing structure includes: a plurality of photoelectric sensors, each of which corresponds to at least one of the light transmission channels.
  • each photosensor corresponds to n of the light transmission channels, 1 ⁇ n ⁇ 10 and n is a positive integer.
  • the light path structure includes: at least one light shielding layer, a plurality of light transmission holes are provided in the light shielding layer, and the light transmission holes define a light transmission channel.
  • the at least one light-shielding layer comprises: a first light-shielding layer and a second light-shielding layer located on a side of the first light-shielding layer away from the substrate, the first light-shielding layer and the second light-shielding layer A light-transmitting layer is arranged between the light-shielding layers, the first light-shielding layer is provided with first light-transmitting holes arranged in an array, and the second light-shielding layer is provided with a one-to-one correspondence with the first light-transmitting holes The second light-transmitting hole, the first light-transmitting hole and the corresponding second light-transmitting hole define a light-transmitting channel.
  • the at least one light-shielding layer further includes: at least one third light-shielding layer located between the first light-shielding layer and the second light-shielding layer, and between each adjacent light-shielding layer a transparent layer;
  • the third light-shielding layer is provided with third light-transmitting holes corresponding to the first light-transmitting holes one-to-one, and the first light-transmitting holes correspond to the second light-transmitting holes and the third light-transmitting holes. Define the light transmission channel.
  • the number of the third light shielding layers is one.
  • the shape of the orthographic projection of the second light-transmitting hole and the first light-transmitting hole on the substrate is substantially the same;
  • the ratio of the area of the orthographic projection of the first light-transmitting hole on the substrate to the area of the orthographic projection of the second light-transmitting hole on the substrate is in the range of [0.2, 1].
  • the shape of the orthographic projection of the third light-transmitting hole and the first light-transmitting hole on the substrate is substantially the same, and the orthographic projection of the third light-transmitting hole on the substrate The area is approximately equal to the area of the orthographic projection of the first light-transmitting hole on the substrate.
  • the first light-transmitting hole, the second light-transmitting hole corresponding to the first light-transmitting hole, and the third light-transmitting hole corresponding to the first light-transmitting hole are in the The orthographic projections on the substrate overlap at least partially.
  • the orthographic projection of the first light-transmitting hole and the second light-transmitting hole corresponding to the first light-transmitting hole on the substrate completely overlaps;
  • the orthographic projections of the first light-transmitting hole and the third light-transmitting hole corresponding to the first light-transmitting hole on the substrate at least partially overlap.
  • the shape of the overlapping portion of the orthographic projection of the first light-transmitting hole and the third light-transmitting hole corresponding to the first light-transmitting hole on the substrate is a square.
  • the first light transmission hole, the second light transmission hole corresponding to the first light transmission hole, and the third light transmission hole corresponding to the first light transmission hole Orthographic projections of the holes on the substrate are respectively a first orthographic projection, a second orthographic projection and a third orthographic projection;
  • the areas of the first orthographic projection, the second orthographic projection, and the third orthographic projection are approximately equal and all are square in shape, and one of the two sides that intersect at random on the square extends along the first direction, and the other extends along the first direction.
  • the distance between the center of the first orthographic projection and the center of the third orthographic projection in the first direction and the distance in the second direction are equal.
  • the side lengths of the first orthographic projection, the second orthographic projection, and the third orthographic projection are all D, and the center of the first orthographic projection and the center of the third orthographic projection are all D.
  • the distance in the first direction and the distance in the second direction are both T, the thickness of the optical path structure is H, and the collimation angle ⁇ of the light transmission channel in the optical path structure satisfies the following relationship:
  • the value range of the collimation light-receiving angle ⁇ is [10°, 20°].
  • the arrangement periods of the first light-transmitting holes, the second light-transmitting holes, and the third light-transmitting holes are equal to P, and the thickness of the first light-shielding layer is h1, so The thickness of the second light-shielding layer is h2, the thickness of the third light-shielding layer is h3, the thickness of the light-transmitting layer located between the first light-shielding layer and the third light-shielding layer is H1, and the thickness of the light-transmitting layer located between the first light-shielding layer and the third light-shielding layer is H1.
  • the thickness of the light-transmitting layer between the second light-shielding layer and the third light-shielding layer is H2, and D, T, H, P, h1, h2, h3, H1, and H2 satisfy the following relationships:
  • the value range of P is: 5um ⁇ 20um;
  • h1 1um ⁇ 3um
  • h2 1um ⁇ 3um
  • the value range of h3 is: 1um ⁇ 3um;
  • H1 0.5um ⁇ 4um
  • the value range of H2 is: 0.5um ⁇ 4um.
  • a second planarization layer is provided on a side of the photoelectric sensing structure away from the substrate, and a material of the second planarization layer includes: a light-shielding material;
  • the second planarization layer is multiplexed into the first light shielding layer.
  • a first passivation layer is disposed between the second planarization layer and the photoelectric sensing structure.
  • a pixel defining layer is disposed on a side of the second planarization layer away from the substrate, a pixel opening is formed on the pixel defining layer, the light emitting layer is located in the pixel opening, and the The second electrode is located on the side of the pixel defining layer away from the substrate, and the material of the pixel defining layer includes: a light-shielding material;
  • the pixel definition layer is multiplexed into the second light shielding layer.
  • a filter layer is disposed between the second electrode and the pixel definition layer, the filter layer fills the second light transmission holes on the pixel definition layer, and the filter layer is configured to filter out invisible light.
  • a filter layer is disposed between the first light shielding layer and the second light shielding layer, and the filter layer is configured to filter non-visible light;
  • the filter layer is multiplexed into at least one layer of the light-transmitting layer.
  • a filling layer is disposed between the second electrode and the pixel definition layer, and the filling layer fills the second light-transmitting holes on the pixel definition layer;
  • An isolation dam surrounding the pixel opening is disposed between the filling layer and the second electrode.
  • an isolation dam is disposed between the second electrode and the pixel definition layer, and the isolation dam fills the second light-transmitting hole on the pixel definition layer and surrounds the pixel opening.
  • the filter layer includes an infrared filter layer configured to filter out infrared light.
  • the material of the third light-shielding layer includes: a black resin material.
  • the material of the third light-shielding layer includes: a metal material.
  • a second passivation layer is disposed between the third light-shielding layer and the light-transmitting layer located on the side of the third light-shielding layer close to the substrate and closest to the light-transmitting layer.
  • the photoelectric sensing structure includes: a plurality of photoelectric sensors, the photoelectric sensors include: a third electrode, a photoelectric conversion layer and a fourth electrode arranged in sequence along a direction away from the substrate;
  • the display panel further includes: a driving circuit layer, the driving circuit layer is located between the substrate and the photoelectric sensing structure, the driving circuit layer has a first transistor electrically connected to the light emitting element and a first transistor connected to the photoelectric sensor a second transistor electrically connected to the sensor;
  • the drain of the first transistor is electrically connected to the first electrode corresponding to the light-emitting element, and the drain of the second transistor is electrically connected to the third electrode corresponding to the photosensor.
  • an active layer, a first gate insulating layer, a first gate conductive layer, a second gate insulating layer, a second gate conductive layer, and an interlayer are sequentially stacked on the driving circuit layer along a direction away from the substrate.
  • a second source-drain conductive layer is disposed on a side of the first planarization layer away from the substrate, and the second source-drain conductive layer includes the third electrode.
  • a bias voltage line is provided on a side of the photoelectric sensing structure away from the substrate, the bias voltage line is electrically connected to the fourth electrode, and the bias voltage line is connected to the fourth electrode.
  • the first electrodes are arranged in the same layer.
  • an encapsulation layer and a cover plate are disposed on a side of the second electrode away from the substrate, and the cover plate is located on a side of the encapsulation layer away from the substrate.
  • a touch function layer is disposed between the encapsulation layer and the cover plate.
  • a circular polarizer is disposed between the encapsulation layer and the cover plate.
  • the photosensor structure includes a plurality of photosensors, the orthographic projections of the photosensors on the substrate and the orthographic projections of the light-emitting elements on the substrate do not overlap;
  • the substrate includes a plurality of first pixel regions arranged in an array and a plurality of second pixel regions arranged in an array, the first pixel regions and the second pixel regions alternate in both row and column directions set up;
  • the light-emitting element is located in the first pixel area, and the photosensor is located in the second pixel area.
  • the light-emitting element is an organic light-emitting diode.
  • an embodiment of the present disclosure further provides a display device, which includes: any one of the display panels provided in the above-mentioned first aspect and an outer frame for fixing the display panel.
  • FIG. 1 is a schematic cross-sectional view of a display panel according to an embodiment of the present disclosure
  • FIG. 2 is a schematic diagram of light reflected by adjacent valley positions in an embodiment of the disclosure
  • 3a is a schematic diagram of a positional relationship of a light-emitting element, a photoelectric sensor, and a light-transmitting channel in an embodiment of the disclosure
  • 3b is a schematic diagram of another positional relationship of the light-emitting element, the photoelectric sensor, and the light-transmitting channel in the embodiment of the disclosure;
  • FIG. 4 is a schematic cross-sectional view of an optical path structure in the display panel shown in FIG. 1;
  • FIG. 5 is a schematic cross-sectional view of another display panel according to an embodiment of the present disclosure.
  • FIG. 6 is a schematic cross-sectional view of an optical path structure in the display panel shown in FIG. 5;
  • FIG. 7 is a schematic cross-sectional view of an optical path structure in an embodiment of the disclosure.
  • FIG. 8 is a schematic cross-sectional view of still another display panel according to an embodiment of the present disclosure.
  • FIG. 9 is a schematic cross-sectional view of an optical path structure in the display panel shown in FIG. 8;
  • FIG. 10 is a plurality of schematic diagrams of orthographic projections of the first light-transmitting hole and its corresponding second light-transmitting hole and the third light-transmitting hole on the substrate in the alignment structure shown in FIG. 9;
  • FIG. 11 is a schematic cross-sectional view of still another display panel according to an embodiment of the present disclosure.
  • FIG. 12 is a schematic cross-sectional view of still another display panel according to an embodiment of the present disclosure.
  • FIG. 13 is a schematic cross-sectional view of still another display panel according to an embodiment of the present disclosure.
  • FIG. 14 is a flowchart of a method for fabricating a display panel according to an embodiment of the present disclosure.
  • the display panel provided by an embodiment of the present disclosure is a display panel with a display function and a texture recognition function, and the display panel includes:
  • the material of the substrate 1 may be a material such as polyimide (PI) or glass.
  • the photoelectric sensing structure is located on one side of the substrate 1; for the specific description of the photoelectric sensing structure, please refer to the following content.
  • the light-emitting structure located on the side of the photoelectric sensing structure away from the substrate 1 , includes: a plurality of light-emitting elements 3 .
  • the optical path structure 4 is located between the photoelectric sensing structure and the second electrode 303, and the optical path structure 4 is configured to perform collimation processing on the light located on the side of the photoelectric sensing structure away from the substrate and whose propagation direction is the photoelectric sensing structure .
  • the photoelectric sensing structure and the light emitting structure do not overlap or partially overlap; in the direction perpendicular to the substrate, the optical path structure 4 and the photoelectric sensor structure at least partially overlap.
  • the optical path structure 4 between the photoelectric sensing structure and the second electrode 303, a pair of light emitted from the photoelectric sensing structure side to the photoelectric sensing structure side is collimated, so that the light can be collimated. Effectively improve or even completely eliminate the problem of crosstalk of reflected light from adjacent valley/ridge positions, thereby improving imaging clarity.
  • the light-emitting element 3 is a top-emission light-emitting element 3;
  • the first electrode 301 is a reflective electrode, and its material can be a conductive material with better reflective properties, such as copper (Cu), aluminum (Al), titanium (Ti), molybdenum (Mo) and other metal materials or alloy materials;
  • the second electrode 303 is a transparent electrode, and its material can be selected from conductive materials with better transmission properties, such as indium tin oxide (ITO), indium zinc oxide (IZO) , gallium zinc oxide (GZO) and other transparent metal oxide materials.
  • ITO indium tin oxide
  • IZO indium zinc oxide
  • GZO gallium zinc oxide
  • the light-emitting element 3 can be seen as an organic light-emitting diode (OLED), and the light-emitting layer 302 is the organic light-emitting layer 302; the first electrode 301 can be used as an anode of the organic light-emitting diode, and the second electrode 303 can be used as an organic light-emitting diode. cathode of the diode.
  • organic functional film layers such as a hole injection layer and a hole transport layer can also be selectively arranged, and electrons can also be selectively arranged between the second electrode 303 and the light-emitting layer 302
  • Organic functional film layers such as injection layer and electron transport layer.
  • the photoelectric sensing structure includes: a plurality of photoelectric sensors 2 , and the photoelectric sensor 2 includes: a third electrode 201 , a photoelectric conversion layer 202 and a fourth electrode 203 arranged in sequence along a direction away from the substrate 1 .
  • the optical sensor includes: a PIN photodiode and a PN photodiode, and the working state of the optical sensor can be controlled by controlling the voltages applied to the third electrode 201 and the fourth electrode 203 .
  • the photoelectric conversion layer 202 includes a stacked P-type semiconductor layer (eg, a P-type Si layer) 202c and an N-type semiconductor layer (eg, an N-type Si layer) 202a, or includes a stacked P-type semiconductor layer 202c, an intrinsic semiconductor layer layer (eg, an intrinsic Si layer) 202b and an N-type semiconductor layer 202a.
  • the intrinsic semiconductor layer 202b is made of a-Si material
  • the P-type semiconductor layer 202c is made of a-Si doped with B ions
  • the N-type semiconductor layer 202a is made of a-Si doped with P ions.
  • the fourth electrode 203 is a transparent electrode, which can be made of transparent metal oxide materials such as indium tin oxide, indium zinc oxide, and gallium zinc oxide.
  • the first electrode 301211 is a metal electrode, which can be made of copper, aluminum, titanium, molybdenum and other metal materials or alloy materials.
  • the optical path structure 4 has a plurality of light-transmitting channels Q, and the angle between the propagation direction of the light emitted from the light-transmitting channels Q and toward the photoelectric sensing structure and the normal of the plane where the substrate 1 is located is [0 °, 72°]. That is to say, the light emitted from the photoelectric sensing structure side to the photoelectric sensing structure side can only pass through the light transmission channel Q on the optical path structure 4, and the light that can be emitted from the light transmission channel Q is small-angle light.
  • the light-transmitting channel Q refers to a channel through which light can pass through the optical path structure 4, and the light-transmitting channel Q can play the role of collimating the light rays from various angles of the photoelectric sensing structure, so that The light emitted from the first light transmission channel Q is within a certain angle range, and the difference between the maximum angle and the minimum angle in the angle range is the light receiving angle of the light transmission channel Q.
  • the light transmission channel Q refers to a channel through which light can pass through the optical path structure 4, and the light-transmitting channel Q can play the role of collimating the light rays from various angles of the photoelectric sensing structure, so that The light emitted from the first light transmission channel Q is within a certain angle range, and the difference between the maximum angle and the minimum angle in the angle range is the light receiving angle of the light transmission channel Q.
  • the light transmission channel Q For the specific description of the light transmission channel Q, reference may be made to the following specific examples.
  • FIG. 2 is a schematic diagram of light reflected from adjacent valley positions in an embodiment of the present disclosure.
  • the critical angle ⁇ 14.04° at which crosstalk occurs can be calculated. That is, the light rays whose reflection angle is greater than the critical angle ⁇ 14.04° are all crosstalk light.
  • the light reflected by the adjacent valley/ridge positions crosstalk is a large angle light, and the specific critical angle is related to the size of p0 and h0.
  • the large-angle incident light can be reflected and effectively filtered out (some small-angle light can also fail to reach the light-transmitting channel Q or reach the light-transmitting channel Q but fail to pass through. It is filtered through the light transmission channel Q), which can effectively improve or even completely eliminate the problem of crosstalk of reflected light from adjacent valley/ridge positions, thereby improving imaging clarity.
  • the optical path structure 4 is configured such that the angle between the propagation direction of the light emitted from the light transmission channel Q and toward the photoelectric sensing structure and the normal of the plane where the substrate 1 is located is at [0°, 20°] , the design can be applied to ultra-thin display panels, and can basically eliminate the problem of crosstalk caused by reflected light.
  • each photoelectric sensor 2 corresponds to one or more light transmission channels Q, and one light transmission channel corresponds to one photoelectric sensor 2 .
  • the light transmission channel Q corresponding to the photoelectric sensor 2 specifically means that when light is emitted from the photoelectric sensing structure side to the photoelectric sensing structure side, the light emitted from a certain light transmission channel Q can only reach the light transmission channel
  • the photoelectric sensor 2 corresponding to Q cannot reach other photoelectric sensors 2 .
  • one light transmission channel Q can only correspond to one photoelectric sensor 2
  • one photoelectric sensor 2 can correspond to one or more light transmission channels Q.
  • cross-section also referred to as “cross-section” of the light-transmitting channel Q parallel to the plane of the substrate 1 is constant, the more the number of light-transmitting channels Q corresponding to one photoelectric sensor 2 is, the more the photoelectric sensor 2 The larger the illumination area, the more conducive to texture recognition.
  • one photoelectric sensor 2 corresponds to n light transmission channels Q, 1 ⁇ n ⁇ 10 and n is a positive integer.
  • the orthographic projection of the photosensor 2 on the substrate 1 does not overlap the orthographic projection of the light-emitting element 3 on the substrate 1 .
  • the substrate 1 includes a plurality of first pixel regions arranged in an array and a plurality of second pixel regions arranged in an array, and the first pixel regions and the second pixel regions are alternately arranged in the row direction and the column direction;
  • the light-emitting element 3 is located in the first pixel area, and the photosensor 2 is located in the second pixel area.
  • the plurality of first pixel regions include: a red pixel region, a green pixel region and a blue pixel region, the light-emitting element 3 located in the red pixel region is a red light-emitting element R that emits red light, and the light-emitting element 3 located in the green pixel region is a red light-emitting element R that emits red light.
  • the light-emitting element 3 is a green light-emitting element G that emits green light
  • the light-emitting element 3 located in the blue pixel region is a blue light-emitting element B that emits blue light.
  • one red light-emitting element R is arranged in a red pixel area, and two independent green light-emitting elements R arranged in the column direction are arranged in a green pixel area.
  • element G one blue light-emitting element B is provided in one blue pixel region.
  • the orthographic projection of the red light-emitting element R on the substrate 1 is a convex hexagon
  • the orthographic projection of the blue light-emitting element B on the substrate 1 is a hexagon
  • the orthographic projection of the green light-emitting element G on the substrate 1 is a hexagon
  • the projection is a convex pentagon
  • the orthographic projections of the two green light-emitting elements G located in the same green pixel region on the substrate 1 are axisymmetric to each other, and the symmetry axis is parallel to the row direction.
  • the light-emitting element 3 shown in FIG. 3 a and FIG. 3 b includes a red light-emitting element R, a green light-emitting element G and a blue light-emitting element B, and the orthographic projections of the red light-emitting element R and the blue light-emitting element B on the substrate 1 It is a convex hexagon, and the orthographic projection of the green light-emitting element G on the substrate 1 is a convex pentagon, which is only an example, and does not limit the technical solution of the present disclosure.
  • the light-emitting element 3 may also be a light-emitting element that emits light of other colors (eg, a yellow light-emitting element that emits yellow light, a white light-emitting element that emits white light, etc.), and the orthographic projection of the light-emitting element 3 on the substrate 1 is also Other shapes are possible (eg, rectangle, circle, ellipse, etc.).
  • the light path structure 4 includes: at least one light shielding layer, a plurality of light transmission holes are provided in the light shielding layer, and the light transmission holes define a light transmission channel Q.
  • FIG. 4 is a schematic cross-sectional view of the light path structure in the display panel shown in FIG. 1 .
  • the light path structure 4 includes a light shielding layer 400 , and the light shielding layer 400 is provided with a plurality of Each light-transmitting hole 400a defines a light-transmitting channel Q.
  • the aperture of the light-transmitting hole 400a is d
  • the thickness of the light-shielding layer is H
  • the light-emitting angle of the light-transmitting channel Q is [0°, arctan(d/H)], that is, the light-receiving angle ⁇ of the light-transmitting channel Q is arctan(d/H).
  • the preset critical angle ⁇ for crosstalk occurrence is to basically eliminate the crosstalk problem of reflected light, arctan(d/H) ⁇ , that is, d/H ⁇ tan ⁇ , needs to be satisfied.
  • FIG. 5 is a schematic cross-sectional view of another display panel according to an embodiment of the present disclosure
  • FIG. 6 is a cross-sectional schematic view of an optical path structure in the display panel shown in FIG. 5 , as shown in FIGS.
  • the optical path structure 4 in the display panel shown in FIG. 5 is different.
  • the second light-shielding layer 402, a light-transmitting layer 411 is disposed between the first light-shielding layer 401 and the second light-shielding layer 402; the first light-shielding layer 401 is provided with first light-transmitting holes 401a arranged in an array, and the second light-shielding layer 401
  • the layer 402 is provided with first light-transmitting holes 401a corresponding to second light-transmitting holes 402a one-to-one, and the first light-transmitting holes 401a and their corresponding second light-transmitting holes 402a define a light-transmitting channel Q.
  • the orthographic projections of the first light-transmitting hole 401 a and its corresponding second light-transmitting hole 402 a on the substrate 1 completely overlap.
  • the apertures of the first light-transmitting hole 401a and the second light-transmitting hole 402a are both d, and the thickness of the optical path structure 4 is H, then the light-emitting angle of the light-transmitting channel Q is [0°, arctan(d/H)], If the preset critical angle ⁇ for crosstalk occurrence is to basically eliminate the crosstalk problem of reflected light, arctan (d/H) ⁇ , that is, d/H ⁇ tan ⁇ , needs to be satisfied.
  • the reflected light formed by the fingerprint path reflection generally also has a maximum angle ⁇ max.
  • the thickness H of the optical path structure 4 the light-transmitting layer on the light-shielding layer
  • the arrangement period P of the holes needs to satisfy: arctan(P/H) ⁇ max, that is, P/H ⁇ max.
  • FIG. 7 is a schematic cross-sectional view of an optical path structure in an embodiment of the present disclosure. As shown in FIG. Completely overlapping orthographic projections are different. In the situation shown in FIG. 7 , the first light-transmitting holes 401 a and their corresponding second light-transmitting holes 402 a are staggered, and this structure can also play a role of collimation to a certain extent. In the case shown in FIG. 7 , the apertures d of the first light-transmitting holes 401a and the second light-transmitting holes 402a, the thickness H of the optical path structure 4, and the period P of the light-transmitting holes on the light shielding layer can be set according to actual needs.
  • FIG. 8 is a schematic cross-sectional view of another display panel according to an embodiment of the present disclosure
  • FIG. 9 is a cross-sectional schematic view of an optical path structure in the display panel shown in FIG. 8
  • FIG. 10 is a first transparent view of the alignment structure shown in FIG. 9 .
  • 9 includes at least three light-shielding layers 401, 402, 403, and a light-transmitting layer is provided between every two adjacent light-shielding layers, and the light-shielding layer closest to the photoelectric sensing structure is the first light-shielding layer.
  • the first light-shielding layer 401 is provided with The first light-transmitting holes 401a arranged in an array, the second light-transmitting holes 402a corresponding to the first light-transmitting holes 401a one-to-one are provided on the second light-shielding layer 402, and the first light-transmitting holes are provided on the third light-shielding layer 402 401a corresponds to the third light-transmitting holes 403a one-to-one, and the first light-transmitting hole 401a and its corresponding second light-transmitting holes 402a and third light-transmitting holes 403a control and define a light-transmitting channel Q.
  • the number of the third light shielding layer 402 is one layer.
  • the optical path structure 4 is a laminated structure including three light shielding layers 401 , 402 and 403 .
  • the shape of the orthographic projection of the second light-transmitting hole 402a and the first light-transmitting hole 401a on the substrate 1 is substantially the same, and the area of the orthographic projection of the first light-transmitting hole on the substrate and the second light-transmitting hole are within The ratio of the area of the orthographic projection on the substrate is in the range [0.2, 1].
  • the cross-sectional shape of the first light-transmitting hole 401 a on a cross-section parallel to the plane where the substrate 1 is located is a rectangle. Further, the cross-sectional shape of the first light-transmitting hole 401a on a cross-section parallel to the plane where the substrate 1 is located is a square.
  • the orthographic shapes of the third light-transmitting holes 403 a and the first light-transmitting holes 401 a on the substrate 1 are approximately the same, and the third light-transmitting holes 403 a on the substrate 1 have approximately the same orthographic shape.
  • the orthographic projection area is approximately equal to the orthographic projection area of the first light-transmitting hole 401 a on the substrate 1 .
  • the first light-transmitting hole 401a, the second light-transmitting hole 402a and the third light-transmitting hole 401a have the same shape and the same size, so the light-shielding layers can be prepared by the same process.
  • the first light-transmitting hole 401a, the second light-transmitting hole 402a corresponding to the first light-transmitting hole 401a, and the first light-transmitting hole 401a The orthographic projections of the third light-transmitting holes 403a on the substrate 1 overlap, and the overlapping area is the area where the light-transmitting channel Q is located.
  • the orthographic projections of the first light-transmitting hole 401a and the second light-transmitting hole 402a corresponding to the first light-transmitting hole 401a on the substrate 1 completely overlap;
  • the orthographic projections of the third light-transmitting holes 403a corresponding to the first light-transmitting holes 401a on the substrate partially overlap.
  • the shape of the overlapping portion of the orthographic projection of the first light-transmitting hole 401a and the corresponding third light-transmitting hole 403a on the plane of the substrate 1 is a square.
  • the overlapping area is the area where the light transmission channel Q is located and is square.
  • the orthographic projections of the first light-transmitting hole 401 a , the second light-transmitting hole 402 a and the third light-transmitting hole 403 a on the substrate are the first orthographic projection 401 b , the first Two orthographic projections 402b and third orthographic projections 403b; the areas of the first orthographic projection 401b, the second orthographic projection 402b, and the third orthographic projection 403b are approximately the same and are all square in shape, and one of the two sides that intersect at random on the square is along the The first orthographic projection 401b and the second orthographic projection 402b are completely overlapped, and the first orthographic projection 401b and the third orthographic projection 403b are partially overlapped; the center of the first orthographic projection 401b and the third The distance of the center of the orthographic projection 403b in the first direction and the distance in the second direction are equal.
  • Part (a) of FIG. 10 illustrates that the center of the third orthographic projection 403b is located in the upper left corner of the center of the first orthographic projection 401b/second orthographic projection 402b
  • part (b) of FIG. 10 illustrates the third orthographic projection 403b
  • the center is located in the lower left corner of the center of the first orthographic projection 401b/the second orthographic projection 402b
  • the upper right corner of the center, part (d) of FIG. 10 shows that the center of the third orthographic projection 403b is located at the lower right corner of the center of the first orthographic projection 401b/second orthographic projection 402b.
  • the side lengths of the first orthographic projection 401b, the second orthographic projection 402b, and the third orthographic projection 403b are all D
  • the distance between the center of the first orthographic projection 401b and the center of the third orthographic projection 403b in the first direction and The distances in the second direction are all T
  • the thickness of the optical path structure 4 is H
  • the collimated light-receiving angle ⁇ of the light transmission channel Q in the optical path structure 4 is:
  • the value range of the collimated light-receiving angle ⁇ is [10°, 20°].
  • the light-receiving angle ⁇ can be determined by designing the values of the side length D, the distance T, and the thickness H.
  • the value range of the side length D is 4um-10um; the value range of the distance T is: 1um-3um.
  • the arrangement period of the first light-transmitting holes 401a, the second light-transmitting holes 402a, and the third light-transmitting holes 403a is equal to P
  • the thickness of the first light-shielding layer 401 is h1
  • the second light-shielding layer 402 The thickness of the light-shielding layer 402 is h2, the thickness of the third light-shielding layer 402 is h3, the thickness of the light-transmitting layer 411 located between the first light-shielding layer 401 and the third light-shielding layer 402 is H1, and the thickness of the light-transmitting layer 411 located between the second light-shielding layer 401 and the third light-shielding layer 402 is H1.
  • the thickness of the light-transmitting layer 412 between them is H2, and D, T, H, P, h1, h2, h3, H1, and H2 satisfy the following relationship:
  • H h1+h2+h3+H1+H2.
  • the value range of the arrangement period P is: 5um ⁇ 20um; the value range of the thickness h1 of the first light shielding layer 401 is: 1um ⁇ 3um; the thickness h2 of the second light shielding layer 402
  • the value range of h3 is: 1um ⁇ 3um; the value range of the thickness h3 of the third light-shielding layer 402 is: 1um ⁇ 3um; the thickness of the light-transmitting layer 411 between the first light-shielding layer 401 and the third light-shielding layer 402 is
  • the value range of H1 is: 0.5um-4um; the thickness of the light-transmitting layer 412 located between the second light-shielding layer 402 and the third light-shielding layer 402 is the value range of H2: 0.5um-4um.
  • the value of the side length D is 4um
  • the value of thickness H1, thickness H2, thickness h1, thickness h2, and thickness h3 are all 1um
  • the value of distance T is 2.5um
  • the arrangement period P of the light-transmitting holes is 10um; according to the formula (1), the light-receiving angle ⁇ 16° can be calculated.
  • the optical path structure 4 shown in FIG. 8 and FIG. 9 includes three layers of light shielding layers only serves as an example, and will not limit the technical solution of the present disclosure.
  • the number of light-shielding layers can be more than three, and the positional relationship of the light-transmitting holes on each light-shielding layer can also be adjusted according to actual needs.
  • the light-transmitting channel Q of the straight effect is sufficient, and the specific conditions will not be described one by one here.
  • a second planarization layer 11 is provided on the side of the photoelectric sensing structure away from the substrate 1 , and the material of the second planarization layer 11 includes: a light-shielding material; a second planarization layer The chemical layer 11 is multiplexed into the first light shielding layer 401 .
  • a first passivation layer 9 is provided between the second planarization layer 11 and the photoelectric sensing structure.
  • the pixel defining layer 24 is disposed on the side of the second planarization layer 11 away from the substrate 1 , the pixel defining layer 24 is formed with a pixel opening, the light emitting layer 302 is located in the pixel opening, and the second electrode 303 is located in the pixel defining
  • the material of the pixel defining layer 24 includes: a light shielding material; the pixel defining layer 24 is multiplexed into the second light shielding layer 402 .
  • a filter layer 26 is disposed between the second electrode 303 and the pixel definition layer 24, the filter layer 26 fills the second light transmission holes 402a on the pixel definition layer 24, and the filter layer 26 is configured to filter out the transmitted light Invisible light in .
  • an isolation dam 25 surrounding the pixel opening is disposed between the filter layer 26 and the second electrode 303 .
  • the isolation dam 25 is arranged between the adjacent pixel openings to prevent the problem of color mixing in the process of depositing the light-emitting layer 302 in the pixel openings by the subsequent evaporation process.
  • FIG. 11 is a schematic cross-sectional view of still another display panel according to an embodiment of the present disclosure. As shown in FIG. 11 , different from the situations shown in FIGS. 5 and 8 , the filter layer 26 in the display panel shown in FIG. 11 is located at Between the first light-shielding layer 401 and the second light-shielding layer 402, the filter layer 26 is multiplexed into at least one light-transmitting layer.
  • the light-shielding layer 26 can be multiplexed to be located between the first light-shielding layer 401 and the second light-shielding layer 402 A layer of light-transmitting layer, in this case, the corresponding drawings are not given.
  • the filter layer 26 can reuse one light-transmitting layer located between the second light-shielding layer 402 and the third light-shielding layer 402 412.
  • the filter layer 26 can also be multiplexed into a layer of light-transmitting layer 411 located between the first light-shielding layer 401 and the third light-shielding layer 402, and the corresponding drawings are not shown in this case.
  • the filter layer 26 is multiplexed into a light transmission layer between any two adjacent light shielding layers.
  • a filling layer 27 is provided between the second electrode 303 and the pixel defining layer 24 , the filling layer 27 fills the second light-transmitting holes 402 a on the pixel defining layer 24 , and the filling layer An isolation dam 25 surrounding the pixel opening is provided between 27 and the second electrode 303 .
  • the material of the filling layer 27 is a transparent resin material.
  • FIG. 12 is a schematic cross-sectional view of still another display panel provided by an embodiment of the present disclosure. As shown in FIG. 12 , it is different from the filling layer 27 used to fill the second light-transmitting holes 402 a on the pixel defining layer 24 in FIG. 11 . In the shown display panel, the filling layer 27 is not provided, but the material of the isolation dam 25 is directly used to fill the second light-transmitting holes 402 a on the pixel defining layer 24 .
  • the filter layer 26 includes an infrared filter layer configured to filter out infrared light. Under strong ambient light, most of the light passing through the finger is infrared light (wavelength range is 760nm-1mm), and the reflected light emitted by the light-emitting element 3 after being reflected by the textured surface is visible light (wavelength range is 400nm-700nm) .
  • the infrared filter layer is configured to block infrared light and allow visible light to pass through, so that the reflected light formed by the textured surface can pass through but the infrared light passing through the finger cannot pass through, thereby reducing or even reducing
  • the influence of ambient light on the photoelectric sensor 2 is completely eliminated, and the anti-glare performance of the product is improved.
  • the material of the third light-shielding layer 402 located between the first light-shielding layer 401 and the second light-shielding layer 402 includes a black resin material; a patterned ( photo) process or imprinting process to prepare the third light shielding layer 402 .
  • FIG. 8 , FIG. 11 , and FIG. 12 only illustrate one layer of the third light shielding layer 402 , and in the embodiment of the present disclosure, the number of the third light shielding layer 402 may also be multiple layers.
  • FIG. 13 is a schematic cross-sectional view of still another display panel according to an embodiment of the present disclosure.
  • the material of 402 includes: metal material.
  • the third light-shielding layer 402 located in the middle is prepared by using a metal material, which can effectively and continuously stack the number of organic layers, thereby reducing the production process requirements.
  • a second passivation layer (material is inorganic material) is provided between the third light-shielding layer 402 made of metal material and the light-transmitting layer located on the side of the third light-shielding layer 402 close to the substrate 1 and closest to the light-transmitting layer.
  • insulating materials such as silicon oxide, silicon nitride, etc.
  • the third light-shielding layer 402 when the third light-shielding layer 402 is made of metal material, the third light-shielding layer 402 may include a plurality of metal patterns that are insulated from each other, each light-emitting element 3 corresponds to one metal pattern, and the first light-emitting element 3
  • the electrodes 301 are electrically connected to the corresponding first drain electrodes 15a of the first transistors 17a through corresponding metal patterns.
  • the first electrode 301 may be connected in parallel with the corresponding metal pattern to reduce the equivalent resistance at the first electrode 301 .
  • the display panel further includes: a driving circuit layer, and the driving circuit layer is located between the substrate 1 and the photoelectric sensing structure , the driving circuit layer has a plurality of first transistors 17a corresponding to the light-emitting element 3 and a plurality of second transistors 17b corresponding to the photosensor 2; the drain of the first transistor 17a is electrically connected to the first electrode 301 in the corresponding light-emitting element 3 , the drain of the second transistor 17b is electrically connected to the third electrode 201 in the corresponding photoelectric sensor 2 .
  • the driving circuit layer includes an active layer, a first gate insulating layer 5 , a first gate conductive layer, a second gate insulating layer 6 , a second gate conductive layer, and an interlayer that are sequentially stacked along a direction away from the substrate 1 .
  • the side of the first planarization layer 8 away from the substrate 1 is further provided with a second source-drain conductive layer, and the second source-drain conductive layer includes: a third electrode 301 .
  • the first active layer includes a first active pattern 12a and a second active pattern 12b arranged in the same layer; the first gate conductive layer at least includes a first gate 13a and a second gate 13b arranged in the same layer (also can include structures such as gate lines); the second gate conductive layer at least includes electrodes 16 for capacitors (and may also include other conductive structures, such as signal traces, various electrodes, etc.), and the electrodes for capacitors can be connected to the first gate 13a.
  • a storage capacitor is formed; the source-drain conductive layer at least includes a first source electrode 14a, a first drain electrode 15a, a second source electrode 14b, and a second drain electrode 15b (which may also include structures such as data lines) arranged in the same layer.
  • the electrode 14a and the first drain 15a are electrically connected to the first active pattern 12a through vias
  • the second source 14b and the second drain 15b are electrically connected to the second active pattern 12b through vias
  • the first gate 13a , the first source 14a, the first drain 15a and the first active pattern 12a constitute the first transistor 17a, the second gate 13b, the second source 14b, the second drain 15b and the second active pattern 12b constitute The second transistor 17b
  • the second source-drain conductive layer includes a first transfer electrode 10 and a second transfer electrode, the first transfer electrode 10 and the first drain electrode 15a are electrically connected through a via hole, and the second transfer electrode and the The two drain electrodes 15b are electrically connected through via holes.
  • the second transfer electrode is reused as the third electrode 201 in the photoelectric sensor 2, and the third electrode 201 in the photoelectric sensor 2 is electrically connected to the second drain 15b of the corresponding second transistor 17b;
  • the first electrode 301 is electrically connected to the first transition electrode 10 through the via hole.
  • the first electrode 301 in the light emitting element 3 is electrically connected to the first drain electrode 15a of the corresponding first transistor 17a.
  • a bias voltage line 23 is provided on the side of the photoelectric sensing structure away from the substrate 1 , the bias voltage line 23 is electrically connected to the fourth electrode 203 , and the bias voltage line 23 is provided in the same layer as the first electrode 301 .
  • the bias voltage line 23 and the first electrode 301 can be made of metal materials or alloy materials such as copper, aluminum, titanium, molybdenum, etc.
  • an encapsulation layer and a cover plate 22 are disposed on the side of the second electrode 303 away from the substrate 1 , and the cover plate 22 is located on the side of the encapsulation layer 18 away from the substrate 1 .
  • the encapsulation layer 18 includes alternately arranged inorganic encapsulation layers and organic encapsulation layers.
  • the encapsulation layer 18 is a three-layer encapsulation structure in which an organic encapsulation layer is sandwiched between two inorganic encapsulation layers.
  • the cover plate 22 is a transparent cover plate 22, and the material of the cover plate 22 may be polyimide (PI) or glass or other materials.
  • a touch function layer 20 is disposed between the encapsulation layer 18 and the cover plate 22 .
  • the touch function layer 20 is a film structure with touch function, which can be directly formed on the cover plate 22 through a film deposition process (including thin film deposition, thin film patterning and other processes) and then passed through the optical glue 19 (OCA glue) and
  • OCA glue optical glue 19
  • the encapsulation layer 18 is fixed, or is directly formed on the encapsulation layer 18 by a film deposition process, or the preparation of the touch function layer 20 is completed on the other substrate 1 first, and then the touch function layer 20 is passed through the optical glue 19 and the cover.
  • the board 22 and the encapsulation layer 18 are fixed.
  • a circular polarizer 21 is disposed between the encapsulation layer 18 and the cover plate 22 , and the circular polarizer 21 is used to block the light reflected by the surface of the metal electrode inside the display panel to improve the display contrast.
  • the circular polarizer 21 can be fixed with other structures by the optical glue 19 .
  • the circular polarizer 21 is located on the side of the touch functional layer 20 away from the cover plate 22 . .
  • the display panel in the embodiment of the present disclosure can be prepared by adopting the following preparation process: first, an active layer, a first gate insulating layer 5 , a first gate conductive layer, a second gate insulating layer 6 , and a second gate conductive layer are sequentially formed 16.
  • some of the above steps can be adjusted according to the actual required products.
  • the steps of preparing the pixel defining layer 24 and preparing the isolation dam 25 also include preparing the light filter layer 26 , or in the process of preparing the optical path structure, a step of preparing the filter layer 26 is also included before the second light shielding layer 402 is prepared.
  • the optical path structure 4 includes multiple light-shielding layers and the light-transmitting channel Q is defined by the light-transmitting holes on the multiple-layer light-shielding layers.
  • the optical path structure 4 includes multiple light-shielding layers and the light-transmitting channel Q is defined by the light-transmitting holes on the multiple-layer light-shielding layers.
  • the optical path structure 4 includes multiple light-shielding layers and the light-transmitting channel Q is defined by the light-transmitting holes on the multiple-layer light-shielding layers.
  • the aperture corresponding to the light-transmitting channel Q is smaller than the aperture of the light-transmitting hole, and theoretically speaking, the light-transmitting channel Q is
  • the corresponding aperture can be infinitely small and is not limited by the aperture size of the light-transmitting hole.
  • the collimated light-receiving angle ⁇ of the required light-transmitting channel Q is constant, the smaller the aperture corresponding to the light-transmitting channel Q, the smaller the thickness of the light-transmitting channel Q (that is, the smaller the thickness of the optical path structure 4). , the more conducive to the thinning of the display panel.
  • optical path structure 4 shown in the above embodiments are only exemplary, and do not limit the technical solutions of the present disclosure.
  • the optical path structure 4 in the present disclosure can also adopt other structures, which are not omitted here.
  • FIG. 14 is a flowchart of a method for manufacturing a display panel provided by an embodiment of the present disclosure. As shown in FIG. 14 , the manufacturing method can be used to manufacture the display panel provided in any of the previous embodiments, and the manufacturing method includes:
  • Step S1 forming a photoelectric sensing structure on the substrate.
  • Step S2 forming an optical path structure and a light emitting structure on the side of the photoelectric sensing structure facing away from the substrate.
  • the light-emitting structure includes a plurality of light-emitting elements, the light-emitting elements include: a first electrode, a light-emitting layer and a second electrode arranged in sequence along the direction away from the substrate, and the optical path structure is located between the photoelectric sensing structure and the second electrode.
  • step S1 and step S2 For the specific description of the above step S1 and step S2, reference may be made to the corresponding content in the foregoing embodiments, and details are not repeated here.
  • an embodiment of the present disclosure also provides a display device, the display device includes the display panel provided in any of the previous embodiments and an outer frame for fixing the display panel.
  • the display panel provided in any of the previous embodiments and an outer frame for fixing the display panel.

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Abstract

一种显示面板,包括:基底(1);光电传感结构,位于基底(1)的一侧;发光结构,位于光电传感结构远离基底(1)的一侧,发光结构包括:多个发光元件(3),发光元件(3)包括:沿远离基底(1)方向依次设置的第一电极(301)、发光层(302)和第二电极(303);光路结构(4),位于光电传感结构和第二电极(303)之间,配置为对位于光电传感结构远离基底(1)一侧且传播方向为靠近光电传感结构的光线进行准直处理;在垂直于基底(1)的方向上,光电传感结构与发光结构不重叠或部分重叠;在垂直于基底(1)的方向上,光路结构(4)与光电传感器结构至少部分重叠。还提供了一种显示装置。

Description

显示面板和显示装置 技术领域
本公开涉及显示领域,特别涉及一种显示面板和显示装置。
背景技术
为减小产品厚度,部分厂商提出了将光电传感器(例如PIN光电二极管)以内嵌(In-Cell)方式集成于显示面板内部的技术方案;具体地,在显示面板内分别制备用于画面显示的发光元件(例如有机发光二极管)和用于进行指纹识别的光电传感器,光电传感器接收指纹谷部位置或脊部位置反射出的光线,并生成相应的电信号;由于谷部位置和脊部位置的反射有差异,因此生成的电信号也有差异,从而能够实现谷、脊的识别。
然而,在实际应用中发现相邻谷部位置或相邻脊部位置所反射出的光线会射入至同一光电传感器处,即产生光线串扰,最终导致成像模糊。
发明内容
本公开旨在至少解决现有技术中存在的技术问题之一,提出了一种显示面板和显示装置。
第一方面,本公开实施例提供了一种显示面板,其中,包括:
基底;
光电传感结构,位于所述基底的一侧;
发光结构,位于所述光电传感结构远离所述基底的一侧,所述发光结构包括:多个发光元件,所述发光元件包括:沿远离所述基底方向依次设置的第一电极、发光层和第二电极;
光路结构,位于所述光电传感结构和所述第二电极之间,配置为对位于所述光电传感结构远离所述基底一侧且传播方向为靠近所述光电传感结构的光线进行准直处理;
在垂直于所述基底的方向上,所述光电传感结构与发光结构不 重叠或部分重叠;
在垂直于所述基底的方向上,所述光路结构与所述光电传感器结构至少部分重叠。
在一些实施例中,所述光路结构具有多个透光通道;
从所述透光通道射出并射向所述光电传感结构的光的传播方向,与所述基底所处平面的法线的夹角处于[0°,72°]。
在一些实施例中,从所述透光通道射出并射向所述光电传感结构的光的传播方向,与所述基底所处平面的法线的夹角处于[0°,20°]。
在一些实施例中,所述光电传感结构包括:多个光电传感器,每个光电传感器对应至少一个所述透光通道。
在一些实施例中,每个光电传感器对应n个所述透光通道,1≤n≤10且n为正整数。
在一些实施例中,所述光路结构包括:至少一层遮光层,所述遮光层中设置有多个透光孔,所述透光孔限定出透光通道。
在一些实施例中,所述至少一层遮光层包括:第一遮光层和位于所述第一遮光层远离所述基底一侧的第二遮光层,所述第一遮光层与所述第二遮光层之间设置有透光层,所述第一遮光层上设置有呈阵列排布的第一透光孔,所述第二遮光层上设置有与所述第一透光孔一一对应的第二透光孔,所述第一透光孔与所对应的所述第二透光孔限定出透光通道。
在一些实施例中,所述至少一层遮光层还包括:位于所述第一遮光层和所述第二遮光层之间的至少一层第三遮光层,每相邻遮光层之间设置有透光层;
所述第三遮光层上设置有所述第一透光孔一一对应的第三透光孔,所述第一透光孔与所对应的所述第二透光孔和第三透光孔限定出透光通道。
在一些实施例中,所述第三遮光层的数量为1。
在一些实施例中,所述第二透光孔和所述第一透光孔在所述基底上的正投影的形状大致相同;
所述第一透光孔在所述基底上的正投影的面积与所述第二透光孔在所述基底上的正投影的面积的比值范围为[0.2,1]。
在一些实施例中,所述第三透光孔和所述第一透光孔在所述基底上的正投影的形状大致相同,所述第三透光孔在所述基底上的正投影的面积与所述第一透光孔在所述基底上的正投影的面积大致相等。
在一些实施例中,所述第一透光孔、与所述第一透光孔所对应的第二透光孔以及与所述第一透光孔所对应的第三透光孔在所述基底上的正投影至少部分重叠。
在一些实施例中,所述第一透光孔和与所述第一透光孔所对应的第二透光孔在所述基底上的正投影完全重叠;
所述第一透光孔和与所述第一透光孔所对应的第三透光孔在所述基底上的正投影至少部分重叠。
在一些实施例中,所述第一透光孔和与所述第一透光孔所对应的第三透光孔在所述基底上的正投影所重叠部分的形状为正方形。
在一些实施例中,所述第一透光孔、与所述第一透光孔所对应的所述第二透光孔以及与所述第一透光孔所对应的所述第三透光孔在所述基底上的正投影分别为第一正投影、第二正投影和第三正投影;
所述第一正投影、所述第二正投影和所述第三正投影的面积大致相等且形状均为正方形,正方形上任意相交两条边中其一沿第一方向延伸,另一沿第二方向延伸;
所述第一正投影的中心与所述第三正投影的中心在所述第一方向的距离和在所述第二方向上的距离相等。
在一些实施例中,所述第一正投影、所述第二正投影、所述第三正投影的边长均为D,所述第一正投影的中心与所述第三正投影的中心在第一方向上的距离以及在第二方向上的距离均为T,所述光路结构的厚度为H,所述光路结构内透光通道的准直收光角θ满足以下关系:
θ=arctan(D-T)/H;
其中,D的取值范围为4um~10um;T的取值范围为:1um~3um;
准直收光角θ的取值范围为[10°,20°]。
在一些实施例中,所述第一透光孔、所述第二透光孔和所述第三透光孔的排布周期相等且为P,所述第一遮光层的厚度为h1,所述第二遮光层的厚度为h2,所述第三遮光层的厚度为h3,位于所述第一遮光层和所述第三遮光层之间的透光层的厚度为H1,位于所述第二遮光和所述第三遮光层之间的透光层的厚度为H2,D、T、H、P、h1、h2、h3、H1、H2满足如下关系:
H/(P+D)≤(h1+h3+H1)/(D+T)≤(h2+H2)/(P-T)。
在一些实施例中,P的取值范围为:5um~20um;
h1的取值范围为:1um~3um;
h2的取值范围为:1um~3um;
h3的取值范围为:1um~3um;
H1的取值范围为:0.5um~4um;
H2的取值范围为:0.5um~4um。
在一些实施例中,所述光电传感结构远离所述基底的一侧设置有第二平坦化层,所述第二平坦化层的材料包括:遮光材料;
所述第二平坦化层复用为所述第一遮光层。
在一些实施例中,所述第二平坦化层与所述光电传感结构之间设置有第一钝化层。
在一些实施例中,所述第二平坦化层远离所述基底的一侧设置有像素界定层,所述像素界定层上形成有像素开口,所述发光层位于所述像素开口内,所述第二电极位于所述像素界定层远离所述基底的一侧,所述像素界定层的材料包括:遮光材料;
所述像素界定层复用为所述第二遮光层。
在一些实施例中,所述第二电极与所述像素界定层之间设置有滤光层,所述滤光层填充所述像素界定层上的第二透光孔,所述滤光层配置为滤除非可见光线。
在一些实施例中,所述第一遮光层与所述第二遮光层之间设置有滤光层,所述滤光层配置为滤除非可见光线;
所述滤光层复用为至少一层所述透光层。
在一些实施例中,所述第二电极与所述像素界定层之间设置有填充层,所述填充层填充所述像素界定层上的第二透光孔;
所述填充层与所述第二电极之间设置有围绕所述像素开口的隔离坝。
在一些实施例中,所述第二电极与所述像素界定层之间设置有隔离坝,所述隔离坝填充所述像素界定层上的第二透光孔且围绕所述像素开口。
在一些实施例中,所述滤光层包括:红外滤光层,配置为滤除红外光线。
在一些实施例中,在所述第一遮光层和所述第二遮光层之间设置有至少一层第三遮光层时,所述第三遮光层的材料包括:黑色树脂材料。
在一些实施例中,在所述第一遮光层和所述第二遮光层之间设置有至少一层第三遮光层时,所述第三遮光层的材料包括:金属材料。
在一些实施例中,所述第三遮光层与位于所述第三遮光层靠近所述基底一侧且最接近的所述透光层之间设置有第二钝化层。
在一些实施例中,所述光电传感结构包括:多个光电传感器,所述光电传感器包括:沿远离所述基底方向依次设置的第三电极、光电转换层和第四电极;
所述显示面板还包括:驱动电路层,所述驱动电路层位于基底与所述光电传感结构之间,所述驱动电路层具有与所述发光元件电连接的第一晶体管和与所述光电传感器电连接的第二晶体管;
所述第一晶体管的漏极与对应所述发光元件内的所述第一电极电连接,所述第二晶体管的漏极与对应所述光电传感器内的所述第三电极电连接。
在一些实施例中,所述驱动电路层沿远离所述基底方向依次层叠设置有源层、第一栅绝缘层、第一栅导电层、第二栅绝缘层、第二栅导电层、层间介质层、第一源漏导电层、第一平坦化层;
所述第一平坦化层远离所述基底的一侧设置有第二源漏导电层,所述第二源漏导电层包括所述第三电极。
在一些实施例中,所述光电传感结构远离所述基底的一侧设置有偏置电压线,所述偏置电压线与所述第四电极电连接,所述偏置电压线与所述第一电极同层设置。
在一些实施例中,所述第二电极远离所述基底一侧设置有封装层和盖板,所述盖板位于所述封装层远离所述基底的一侧。
在一些实施例中,所述封装层与所述盖板之间设置有触控功能层。
在一些实施例中,所述封装层与所述盖板之间设置有圆偏光片。
在一些实施例中,所述光电传感结构包括多个光电传感器,所述光电传感器在所述基底上的正投影与所述发光元件在所述基底上的正投影不交叠;
所述基底包括呈阵列排布的多个第一像素区域和呈阵列排布的多个第二像素区域,所述第一像素区域与所述第二像素区域在行方向和列方向上均交替设置;
所述发光元件位于所述第一像素区域内,所述光电传感器位于所述第二像素区域内。
所述发光元件为有机发光二极管。
第二方面,本公开实施例还提供了一种显示装置,其中,包括:如上述第一方面提供的任一所述显示面板和固定所述显示面板的外框。
附图说明
图1为本公开实施例提供的一种显示面板的截面示意图;
图2为本公开实施例中相邻谷部位置所反射光线的示意图;
图3a为本公开实施例中发光元件、光电传感器以及透光通道的一种位置关系示意图;
图3b为本公开实施例中发光元件、光电传感器以及透光通道的另一种位置关系示意图;
图4为图1所示显示面板中光路结构的一种截面示意图;
图5为本公开实施例提供的另一种显示面板的截面示意图;
图6为图5所示显示面板中光路结构的一种截面示意图;
图7为本公开实施例中光路结构的一种截面示意图;
图8为本公开实施例提供的又一种显示面板的截面示意图;
图9为图8所示显示面板中光路结构的一种截面示意图;
图10为图9所示准接结构中第一透光孔与其所对应的第二透光孔、第三透光孔在基底上正投影的多种示意图;
图11为本公开实施例提供的再一种显示面板的截面示意图;
图12为本公开实施例提供的再一种显示面板的截面示意图;
图13为本公开实施例提供的再一种显示面板的截面示意图;
图14为本公开实施例提供的一种显示面板的制备方法流程图。
具体实施方式
为使本领域的技术人员更好地理解本公开的技术方案,下面结合附图对本公开提供的一种显示面板及其制备方法和显示装置进行详细描述。
在下文中将参考附图更充分地描述示例实施例,但是所述示例实施例可以以不同形式来体现且不应当被解释为限于本文阐述的实施例。反之,提供这些实施例的目的在于使本公开透彻和完整,并将使本领域技术人员充分理解本公开的范围。附图中各部件的形状和大小不反应真实比例,目的只是示意说明本公开内容。
本文所使用的术语仅用于描述特定实施例,且不意欲限制本公开。如本文所使用的,单数形式“1个”和“该”也意欲包括复数形式,除非上下文另外清楚指出。还将理解的是,当本说明书中使用术语“包括”和/或“由……制成”时,指定存在所述特征、整体、步骤、操作、元件和/或组件,但不排除存在或添加1个或多个其它特征、整体、步骤、操作、元件、组件和/或其群组。在不冲突的情况下,本公开各实施例及实施例中的各特征可相互组合。
除非另外限定,否则本文所用的所有术语(包括技术和科学术语)的含义与本领域普通技术人员通常理解的含义相同。还将理解,诸如那些在常用字典中限定的那些术语应当被解释为具有与其在相关技 术以及本公开的背景下的含义一致的含义,且将不解释为具有理想化或过度形式上的含义,除非本文明确如此限定。
图1为本公开实施例提供的一种显示面板的截面示意图,如图1所示,本公开实施例所提供的显示面板为具有显示功能和纹路识别功能的显示面板,该显示面板包括:
基底1;具体地,基底1的材料可以为聚酰亚胺(PI)或玻璃等材料。
光电传感结构,光电传感结构位于基底1的一侧;对于光电传感结构的具体描述可参见后面内容。
发光结构,位于光电传感结构远离基底1的一侧,包括:多个发光元件3,发光元件3包括:沿远离基底1方向依次设置的第一电极301、发光层302和第二电极303。
光路结构4,位于光电传感结构和第二电极303之间,光路结构4配置为对位于光电传感结构远离所述基底一侧且传播方向为所述光电传感结构的光线进行准直处理。
在垂直于基底的方向上,光电传感结构与发光结构不重叠或部分重叠;在垂直于基底的方向上,光路结构4与光电传感器结构至少部分重叠。
在本公开实施例中,通过在光电传感结构和第二电极303之间设置光路结构4,一对由光电传感结构一侧射向光电传感结构一侧的光进行准直处理,可有效改善、甚至完全消除相邻谷部/脊部位置所反射光线发生串扰的问题,从而能提升成像清晰度。
在一些实施例中,发光元件3为顶发射型发光元件3;第一电极301为反射电极,其材料可以选用具有较佳反射性能的导电材料,例如铜(Cu)、铝(Al)、钛(Ti)、钼(Mo)等金属材料或者合金材料;第二电极303为透明电极,其材料可选用具有较佳透射性能的导电材料,例如氧化铟锡(ITO)、氧化铟锌(IZO)、氧化镓锌(GZO)等透明金属氧化物材料。
在一些实施例中,发光元件3具体可见为有机发光二极管(OLED),此时发光层302为有机发光层302;第一电极301可作为 有机发光二极管的阳极,第二电极303可作为有机发光二极管的阴极。在第一电极301与发光层302之间还可以选择性的设置空穴注入层、空穴传输层等有机功能膜层,在第二电极303与发光层302之间还可以选择型的设置电子注入层、电子传输层等有机功能膜层。
光电传感结构包括:多个光电传感器2,光电传感器2包括:沿远离基底1方向依次设置的第三电极201、光电转换层202和第四电极203。在一些实施例中,光学传感器包括:PIN光电二极管和PN光敏二极管,通过控制施加在第三电极201和第四电极203上的电压可以控制光学传感器的工作状态。光电转换层202包括叠层设置的P型半导体层(例如P型Si层)202c以及N型半导体层(例如N型Si层)202a,或者包括叠层设置的P型半导体层202c、本征半导体层(例如本征Si层)202b以及N型半导体层202a。示例地,本征半导体层202b为a-Si材料,P型半导体层202c为a-Si掺杂B离子的材料,N型半导体层202a为a-Si掺杂P离子的材料。
在一些实施例中,第四电极203为透明电极,可以采用氧化铟锡、氧化铟锌、氧化镓锌等透明金属氧化物材料。第一电极301211为金属电极,可采用铜、铝、钛、钼等金属材料或者合金材料。
在一些实施例中,光路结构4具有多个透光通道Q,从透光通道Q射出并射向光电传感结构的光的传播方向与基底1所处平面的法线的夹角处于[0°,72°]。也就是说,从由光电传感结构一侧射向光电传感结构一侧的光仅能从光路结构4上的透光通道Q通过,且能够从透光通道Q射出光为小角度光。
在本公开实施例中,透光通道Q是指可供光线穿过光路结构4的通道,透光通道Q可起到对射向光电传感结构的各个角度的光线进行准直的作用,使得从第一透光通道Q射出的光线处于一定的角度范围内,该角度范围中的最大角度与最小角度的差值为透光通道Q的收光角。对于透光通道Q的具体描述,可参见后面具体示例。
图2为本公开实施例中相邻谷部位置所反射光线的示意图,如图2所示,相邻谷部位置所反射出的光线恰好不发生串扰,即谷脊可以被区分开的发光角度α满足:tanα=p0/2*h0;其中,p0为纹路上 相邻谷部/脊部的中心间距,p0大小一般为0.3mm~0.45mm;h0为纹路与光电传感结构之间的距离,对于超薄产品,h0大小一般为0.4mm~0.65mm。以p0取值在0.3mm~0.45mm范围且p0取值0.4mm~0.65mm范围,可以计算出p0/2*h0的取值在0.23~0.56范围;以p0/2*h0取值为0.25为例,可以计算出发生串扰的临界角度α≈14.04°。即,反射角度大于临界角度α≈14.04°的光线都是串扰光。
基于前面分析可见,相邻谷部/脊部位置所反射光线发生串扰的光线为大角度光线,具体的临界角度与p0和h0的大小相关。在本公开实施例中,通过设置光路结构4可对大角度入射光进行反射有效滤除(部分小角度光也会因未能达到透光通道Q处或者到达透光通道Q处但未能穿过透光通道Q而被滤除),从而能可有效改善、甚至完全消除相邻谷部/脊部位置所反射光线发生串扰的问题,从而能提升成像清晰度。
在一些实施例中,光路结构4配置为:从透光通道Q射出并射向光电传感结构的光的传播方向与基底1所处平面的法线的夹角处于[0°,20°],该设计可适用于超薄显示面板中,并可基本消除反射光线发生串扰的问题。
图3a为本公开实施例中发光元件、光电传感器以及透光通道的一种位置关系示意图,图3b为本公开实施例中发光元件、光电传感器以及透光通道的另一种位置关系示意图,如图3a和图3b所示,在一些实施例中,每个光电传感器2对应1个或多个透光通道Q,1个透光通道对应1个光电传感器2。
透光通道Q与光电传感器2相对应具体是指,在光线由光电传感结构一侧射向光电传感结构一侧时,从某个透光通道Q射出的光线仅能到达该透光通道Q所对应的光电传感器2而无法到达其他光电传感器2。在本公开实施例中,1个透光通道Q仅能对应1个光电传感器2,1个光电传感器2可以对应1个或多个透光通道Q。
在透光通道Q在平行于基底1所处平面的截面(也称为“横截面”)面积一定的情况下,1个光电传感器2所对应的透光通道Q数量越多,该光电传感器2的光照面积越大,越有利于进行纹路识别。 然而,当1个光电传感器2所对应的透光通道Q数量达到一定上限时,受限于1个光电传感器2所占用面积,则随着光电传感器2所对应的透光通道Q数量的继续增多,则透光通道Q在平行于基底1所处平面的截面面积需减小;透光通道Q在平行于基底1所处平面的截面面积越小,光路结构4制备难度越大。综合对光电传感器2的光照面积以及光路结构4制备难度的考虑,本公开实施例中,1个光电传感器2对应n个透光通道Q,1≤n≤10且n为正整数。
在一些实施例中,光电传感器2在基底1上的正投影与发光元件3在基底1上的正投影不交叠。
进一步地,基底1包括呈阵列排布的多个第一像素区域和呈阵列排布的多个第二像素区域,第一像素区域与第二像素区域在行方向和列方向上均交替设置;发光元件3位于第一像素区域内,光电传感器2位于第二像素区域内。
更进一步地,多个第一像素区域包括:红色像素区域、绿色像素区域和蓝色像素区域,位于红色像素区域内的发光元件3为发出红光的红色发光元件R,位于绿色像素区域内的发光元件3为发出绿光的绿色发光元件G,位于蓝色像素区域内的发光元件3为发出蓝光的蓝色发光元件B。
继续参见图3a和图3b所示,作为1个示例,1个红色像素区域内设置有1个红色发光元件R,1个绿色像素区域内设置有沿列方向排布的两个独立的绿色发光元件G,1个蓝色像素区域内设置有1个蓝色发光元件B。
在一些实施例中,红色发光元件R在基底1上的正投影为凸六边形,蓝色发光元件B在基底1上的正投影为六边形;绿色发光元件G在基底1上的正投影为凸五边形,位于同一绿色像素区域内的两个绿色发光元件G在基底1上的正投影互为轴对称,且对称轴与行方向平行。
需要说明的是,图3a和图3b中所示发光元件3包括红色发光元件R、绿色发光元件G和蓝色发光元件B,红色发光元件R和蓝色发光元件B在基底1上的正投影为凸六边形,绿色发光元件G在基底 1上的正投影为凸五边形的情况,仅到示例性作用,其不会对本公开的技术方案产生限制。在本公开实施例中,发光元件3还可以为发出其他颜色光的发光元件(例如发出黄光的黄色发光元件、发出白光的白色发光元件等),发光元件3在基底1上的正投影还可以为其他形状(例如,矩形、圆形、椭圆等)。
在一些实施例中,光路结构4包括:至少一层遮光层,遮光层中设置有多个透光孔,透光孔限定出透光通道Q。下面将结合附图来对本公开中的光路结构进行详细描述。
图4为图1所示显示面板中光路结构的一种截面示意图,如图1和图4所示,在一些实施例中,光路结构4包括一层遮光层400,遮光层400上设置有多个透光孔400a,1个透光孔400a限定出1个透光通道Q。其中,透光孔400a的孔径为d,遮光层的厚度为H,则透光通道Q的出光角度在[0°,arctan(d/H)],即透光通道Q的收光角θ为arctan(d/H)。若预先设定的发生串扰的临界角度α,为基本消除反射光线发生串扰的问题,则需满足arctan(d/H)≤α,即d/H≤tanα。
图5为本公开实施例提供的另一种显示面板的截面示意图,图6为图5所示显示面板中光路结构的一种截面示意图,如图5和图6所示,与图1中所示显示面板内的光路结构4不同,图5所示显示面板内的光路结构4包括两层遮光层401、402,具体为第一遮光层401和位于第一遮光层401远离基底1一侧的第二遮光层402,第一遮光层401和第二遮光层402之间设置有一层透光层411;第一遮光层401上设置有呈阵列排布的第一透光孔401a,第二遮光层402上设置有第一透光孔401a一一对应的第二透光孔402a,第一透光孔401a与其所对应的第二透光孔402a限定出透光通道Q。
参见图6中所示,第一透光孔401a及其所对应的第二透光孔402a在基底1上的正投影完全重叠。其中,第一透光孔401a和第二透光孔402a的孔径均为d,光路结构4的厚度为H,则透光通道Q的出光角度在[0°,arctan(d/H)],若预先设定的发生串扰的临界角度α,为基本消除反射光线发生串扰的问题,则需满足arctan (d/H)≤α,即d/H≤tanα。
另外,经手指纹路反射所形成的反射光一般也存在1个最大角度θmax,在准直结采用2层遮光层结构时,为防止出现光线串扰,光路结构4的厚度H、遮光层上透光孔的排布周期P(相邻透光孔的中心点距离)需满足:arctan(P/H)≤θmax,即P/H≤θmax。
图7为本公开实施例中光路结构的一种截面示意图,如图7所示,与图6中所示第一透光孔401a及其所对应的第二透光孔402a在基底1上的正投影完全重叠不同,在图7所示情况中,第一透光孔401a及其所对应的第二透光孔402a错开设置,该结构也能够在一定程度上起到准直的作用。对于图7所示情况中第一透光孔401a和第二透光孔402a的孔径d、光路结构4的厚度H、遮光层上透光孔的周期P可根据实际需要来设定。
图8为本公开实施例提供的又一种显示面板的截面示意图,图9为图8所示显示面板中光路结构的一种截面示意图,图10为图9所示准接结构中第一透光孔与其所对应的第二透光孔、第三透光孔在基底上正投影的多种示意图,如图8至图10所示,与前面实施例中所示光路结构4不同,图8和图9中所示光路结构4包括至少三层遮光层401、402、403,每相邻两层遮光层之间设置有透光层,最靠近光电传感结构的遮光层为第一遮光层401,最远离光电传感结构的遮光层为第二遮光层402,位于第一遮光层401和第二遮光层402之间的遮光层为第三遮光层402;第一遮光层401上设置有呈阵列排布的第一透光孔401a,第二遮光层402上设置有第一透光孔401a一一对应的第二透光孔402a,第三遮光层402上设置有第一透光孔401a一一对应的第三透光孔403a,第一透光孔401a与其所对应的第二透光孔402a和第三透光孔403a控制限定出透光通道Q。
在一些实施例中,第三遮光层402的数量为1层。此时光路结构4为包含三层遮光层401、402、403的层叠结构。
在一些实施例中,第二透光孔402a与第一透光孔401a在基底1上的正投影形状大致相同,第一透光孔在基底上的正投影的面积与第二透光孔在基底上的正投影的面积的比值范围为[0.2,1]。
参见图8至图10所示,参见图在一些实施例中,第一透光孔401a在平行于基底1所处平面的截面上的截面形状为矩形。进一步地,第一透光孔401a在平行于基底1所处平面的截面上的截面形状为正方形。
参见图8至图10所示,在一些实施例中,第三透光孔403a与第一透光孔401a在基底1上的正投影形状大致相同,第三透光孔403a在基底1上的正投影面积与第一透光孔401a在基底1上的正投影面积大致相等。在第二透光孔402a与第一透光孔401a在基底1上的正投影形状相同、正投影面积相等的情况下,第一透光孔401a、第二透光孔402a以及第三透光孔403a三者的形状相同和尺寸均相同,因此各遮光层可采用相同的工艺进行制备。
参见图8至图10所示,在一些实施例中,第一透光孔401a、与该第一透光孔401a所对应的第二透光孔402a以及与该第一透光孔401a所对应的第三透光孔403a在基底1上的正投影存在重叠,在重叠区域即为透光通道Q所处区域。
作为一种可选实施方案,第一透光孔401a和与该第一透光孔401a所对应的第二透光孔402a在基底1上的正投影完全重叠;第一透光孔401a和与该第一透光孔401a所对应的第三透光孔403a在基底上的正投影部分重叠。
在一些实施例中,第一透光孔401a与其所对应的第三透光孔403a在基底1所处平面上的正投影所重叠的部分的形状为正方形。在图9和图10中,重叠区域为透光通道Q所处区域且呈正方形。
参见图8至图10所示,在一些实施例中,第一透光孔401a、第二透光孔402a以及第三透光孔403a在基底上的正投影分别为第一正投影401b、第二正投影402b和第三正投影403b;第一正投影401b、第二正投影402b、第三正投影403b的面积大致相等且形状均为正方形,正方形上任意相交两条边中其一沿第一方向延伸,另一沿第二方向延伸;第一正投影401b与第二正投影402b完全重叠,第一正投影401b与第三正投影403b部分重叠;第一正投影401b的中心与第三正投影403b的中心在第一方向的距离和在第二方向上的距离相等。
图10中(a)部分示意出了第三正投影403b的中心位于第一正投影401b/第二正投影402b的中心的左上角,图10中(b)部分示意出了第三正投影403b的中心位于第一正投影401b/第二正投影402b的中心的左下角,图10中(c)部分示意出了第三正投影403b的中心位于第一正投影401b/第二正投影402b的中心的右上角,图10中(d)部分示意出了第三正投影403b的中心位于第一正投影401b/第二正投影402b的中心的右下角。
进一步地,第一正投影401b、第二正投影402b、第三正投影403b的边长均为D,第一正投影401b的中心与第三正投影403b的中心在第一方向上的距离以及在第二方向上的距离均为T,光路结构4的厚度为H,光路结构4内透光通道Q的准直收光角θ为:
θ=arctan(D-T)/H…式(1)
在一些实施例中,准直收光角θ的取值范围为[10°,20°]。收光角θ可通过对边长D、距离T、厚度H取值进行设计来确定。
在一些实施例中,边长D的取值范围为4um~10um;距离T的取值范围为:1um~3um。
在实现准直效果的同时避免光线在光路结构4内发生串扰,还需合理的对透光孔的排布周期、各遮光层的厚度、各透光层的厚度、准接结构的整体厚度进行合理设计。
在一些实施例中,第一透光孔401a、第二透光孔402a和第三透光孔403a的排布周期相等且为P,第一遮光层401的厚度为h1,第二遮光层402的厚度为h2,第三遮光层402的厚度为h3,位于第一遮光层401和第三遮光层402之间的透光层411的厚度为H1,位于第二遮光和第三遮光层402之间的透光层412的厚度为H2,D、T、H、P、h1、h2、h3、H1、H2满足如下关系:
H/(P+D)≤(h1+h3+H1)/(D+T)≤(h2+H2)/(P-T)…式(2)
其中,H=h1+h2+h3+H1+H2。
更具体地,在一些实施例中,排布周期P的取值范围为:5um~20um;第一遮光层401的厚度h1的取值范围为:1um~3um;第二遮光层402的厚度h2的取值范围为:1um~3um;第三遮光层402的厚 度h3的取值范围为:1um~3um;位于第一遮光层401和第三遮光层402之间的透光层411的厚度为H1的取值范围为:0.5um~4um;位于第二遮光层402和第三遮光层402之间的透光层412的厚度为H2的取值范围为:0.5um~4um。
作为1个满足式(2)的示例,边长D的取值为4um,厚度H1、厚度H2、厚度h1、厚度h2、厚度h3的取值均为1um,距离T的取值为2.5um,透光孔的排布周期P取值为10um;根据式(1)可计算出收光角θ≈16°。
需要说明的是,图8和图9中所示光路结构4包含3层遮光层情况仅起到示例性作用,其不会对本公开的技术方案产生限制。在本公开实施例中遮光层的数量可以大于3层,各遮光层上透光孔的位置关系也可根据实际需要进行调整,仅需保证多层遮光层上的透光孔能够限定出具有准直效果的透光通道Q即可,具体情况此处不再一一举例描述。
参见图5和图8所示,在一些实施例中,光电传感结构远离基底1的一侧设置有第二平坦化层11,第二平坦化层11的材料包括:遮光材料;第二平坦化层11复用为第一遮光层401。
进一步地,在第二平坦化层11与光电传感结构之间设置有第一钝化层9。
在一些实施例中,第二平坦化层11远离基底1的一侧设置有像素界定层24,像素界定层24上形状有像素开口,发光层302位于像素开口内,第二电极303位于像素界定层24远离基底1的一侧,像素界定层24的材料包括:遮光材料;像素界定层24复用为第二遮光层402。
进一步地,第二电极303与像素界定层24之间设置有滤光层26,滤光层26填充像素界定层24上的第二透光孔402a,滤光层26配置为滤除透过光线中的非可见光线。
在一些实施例中,在滤光层26于第二电极303之间设置有围绕像素开口的隔离坝25。隔离坝25设置在相邻像素开口之间,以防止后续通过蒸镀工艺在像素开口内沉积发光层302的工序中出现混色 的问题
图11为本公开实施例提供的再一种显示面板的截面示意图,如图11所示,与图5和图8中所示情况不同,在图11所示显示面板中的滤光层26位于第一遮光层401与第二遮光层402之间,滤光层26复用为至少一层透光层。
在光路结构4仅包括两层遮光层(即,第一遮光层401和第二遮光层402)时,滤光层26可复用为位于第一遮光层401和第二遮光层402之间的一层透光层,此种情况未给出相应附图。
参见图11中所示,在光路结构4包括三层遮光层时,作为1个示例,滤光层26可复用位于第二遮光层402和第三遮光层402之间的一层透光层412。当然,滤光层26也可复用为位于第一遮光层401和第三遮光层402之间的一层透光层411,此种情况未给出相应附图。
另外,在光路结构4包括多层遮光层时,滤光层26复用为任意相邻两层遮光层之间的透光层。
在本实施例中,由于滤光层26位于第一遮光层401和第二遮光层402之间,因此需要使用其他膜层来对第二遮光层402上的第二透光孔402a进行填充,以便于后面其他膜层结构的制备。参见图11中所示,在一些实施例中,在第二电极303与像素界定层24之间设置有填充层27,填充层27填充像素界定层24上的第二透光孔402a,填充层27与第二电极303之间设置有围绕像素开口的隔离坝25。
在一些实施例中,填充层27的材料为透明树脂材料。
图12为本公开实施例提供的再一种显示面板的截面示意图,如图12所示,与图11中采用填充层27来填充像素界定层24上的第二透光孔402a不同,图12所示显示面板内未设置填充层27,而是直接采用隔离坝25的材料来填充像素界定层24上的第二透光孔402a。
参见图5、图8、图11和图12所示,在一些实施例中,滤光层26包括:红外滤光层,配置为滤除红外光线。在强环境光下,透过手指的光绝大部分为红外光(波长范围在760nm~1mm),而发光元件3射出经由纹路表面反射后形成的反射光为可见光(波长范围在400nm~700nm)。在本公开实施例中,红外滤光层配置为阻挡红外光 线且能够使得可见光透过,以使得经过纹路表面反射所形成的反射光能够通过但透过手指的红外光无法通过,从而能减弱甚至完全消除环境光对光电传感器2的影响,提升产品的抗强光性能。
参见图8、图11和图12所示,在一些实施例中,位于第一遮光层401和第二遮光层402之间的第三遮光层402的材料包括黑色树脂材料;可采用图案化(photo)工艺或压印工艺来制备第三遮光层402。需要说明的是,图8、图11和图12中仅示例性画出了一层第三遮光层402,在本公开实施例中第三遮光层402的数量也可以为多层。
在实际生产过程中发现,随着连续制备的有机层(例如遮光层和透光层)层数增多,有机层的形貌越发难以进行控制,容易导致制备出的有机层异常(例如,有机层表面不平整)。在本公开实施例中,在光路结构4采用三层遮光层加上两者透光层的结构时,若遮光层和透光层均采用有机层进行制备,则会形成5层有机层连续层叠的结构,此时对于生产工艺要求较高、生产难度较大。
为解决上述技术问题,本公开实施例还提供了相应的解决方案。图13为本公开实施例提供的再一种显示面板的截面示意图,如图13所示,与图8、图11和图12所示情况不同,图13所示像素面板中的第三遮光层402的材料包括:金属材料。此时,位于中间的第三遮光层402采用金属材料进行制备,可有效连续层叠的有机层数量,从而能降低生产工艺要求。
在本公开实施例中,采用金属材料制备的第三遮光层402与位于该第三遮光层402靠近基底1一侧且最接近的透光层之间设置有第二钝化层(材料为无机绝缘材料,例如氧化硅、氮化硅等),以避免出现由金属材料构成的第三遮光层402与由有机材料构成的透光层直接接触而导致二者粘合力低、容易产生剥离的问题。
需要说明的是,当第三遮光层402采用金属材料时,第三遮光层402可以包括彼此绝缘的多个金属图形,每1个发光元件3对应1个金属图形,发光元件3内的第一电极301通过对应的金属图形与对应的第一晶体管17a的第一漏极15a电连接。第一电极301可以与对应的金属图形之间构成并联,以降低第一电极301处的等效电阻。
继续参见图1、图5、图8、图11、图12、图13所示,在一些实施例中,显示面板还包括:驱动电路层,驱动电路层位于基底1与光电传感结构之间,驱动电路层具有与发光元件3相对应的多个第一晶体管17a和与光电传感器2多个第二晶体管17b;第一晶体管17a的漏极与对应发光元件3内的第一电极301电连接,第二晶体管17b的漏极与对应光电传感器2内的第三电极201电连接。
在一些实施例中,驱动电路层包括沿远离基底1方向依次层叠设置有源层、第一栅绝缘层5、第一栅导电层、第二栅绝缘层6、第二栅导电层、层间介质层7、第一源漏导电层、第一平坦化层8。其中,第一平坦化层8远离基底1的一侧还设置有第二源漏导电层,第二源漏导电层包括:第三电极301。
其中,第一有源层包括同层设置的第一有源图形12a和第二有源图形12b;第一栅导电层至少包括同层设置的第一栅极13a和第二栅极13b(还可以包括栅线等结构);第二栅导电层至少包括电容用电极16(还可包括其他导电结构,例如信号走线、各种电极等),电容用电极可以与第一栅极13a之间形成存储电容;源漏导电层至少包括同层设置的第一源极14a、第一漏极15a、第二源极14b、第二漏极15b(还可以包括数据线等结构),第一源极14a和第一漏极15a与第一有源图形12a通过过孔电连接,第二源极14b和第二漏极15b与第二有源图形12b通过过孔电连接,第一栅极13a、第一源极14a、第一漏极15a和第一有源图形12a构成第一晶体管17a,第二栅极13b、第二源极14b、第二漏极15b和第二有源图形12b构成第二晶体管17b;第二源漏导电层包括第一转接电极10和第二转接电极,第一转接电极10与第一漏极15a通过过孔电连接,第二转接电极与第二漏极15b通过过孔电连接。第二转接电极复用作光电传感器2内的第三电极201,此时光电传感器2内的第三电极201与对应的第二晶体管17b的第二漏极15b电连接;发光元件3内的第一电极301通过过孔与第一转接电极10通过过孔电连接,此时发光元件3内的第一电极301与对应的第一晶体管17a的第一漏极15a电连接。
在一些实施例中,光电传感结构远离基底1的一侧设置有偏置 电压线23,偏置电压线23与第四电极203电连接,偏置电压线23与第一电极301同层设置。偏置电压线23和第一电极301可采用铜、铝、钛、钼等金属材料或者合金材料来制备。
在一些实施例中,第二电极303远离基底1一侧设置有封装层和盖板22,盖板22位于封装层18远离基底1的一侧。一般而言,封装层18包括交替设置的无机封装层和有机封装层,例如封装层18为两层无机封装层中间夹持一层有机封装层的三层封装结构。盖板22为透明盖板22,盖板22的材料可以为聚酰亚胺(PI)或玻璃等材料。
在一些实施例中,封装层18与盖板22之间设置有触控功能层20。触控功能层20为具有触控功能的膜层结构,其可以通过膜层沉积工艺(包括薄膜沉积、薄膜图案化等工艺)直接形成于盖板22上然后通过光学胶19(OCA胶)与封装层18固定,或者通过膜层沉积工艺直接形成于封装层18上,或者是先在其他基底1上完成触控功能层20的制备,然后再将触控功能层20通过光学胶19与盖板22、封装层18固定。
在一些实施例中,封装层18与盖板22之间设置有圆偏光片21,圆偏光片21用于阻挡显示面板内部的金属电极表面所反射的光线,以提高显示对比度。圆偏光片21可通过光学胶19与其他结构进行固定。
需要说明的是,当封装层18与盖板22之间同时存在触控功能层20和圆偏光片21时,一般而言,圆偏光片21位于触控功能层20远离盖板22的一侧。
本公开实施例中的显示面板可采用如下制备工序来进行制备:首先,依次形成有源层、第一栅绝缘层5、第一栅导电层、第二栅绝缘层6、第二栅导电层16、层间介质层7、第一源漏导电层、第一平坦化层8、第二源漏导电层(含第三电极201)、光电转换层202、第四电极203、第一钝化层9、光路结构4、第一电极301、像素界定层24、隔离坝25、发光层302、第二电极303、封装层18;然后,再在盖板22上通过沉积或贴合工艺依次形成触控功能层20和圆偏光 片21;最后,通过贴合工艺将盖板22上的功能膜层与封装层18贴合。在实际生产过程中,可根据实际所需产品情况来对上述部分步骤进行调整。
其中,当光路结构4中存在第二遮光层402且像素界定层24复用为第二遮光层402时,在制备像素界定层24与制备隔离坝25的步骤之间还包括制备滤光层26,或者在制备光路结构过程中,在制备第二遮光层402之前还包括制备滤光层26的步骤。
需要说明的是,上述各实施例中的不同技术手段之间可以相互组合,通过组合得到的新技术方案,也应属于本公开的保护范围。
另外,上述实施例中光路结构4包括多层遮光层且通过多层遮光层上的透光孔来限定出透光通道Q的技术方案,为本公开中的优选实施方案,以光路结构4包括三层遮光层的情况为例,通过调整第一透光孔401a及其所对应的第二透光孔402a和第三透光孔403a的位置关系可以限定出1个横截面(与基底1所处平面相平行)面积小于各透光孔的横截面面积的透光通道Q;也就是说,透光通道Q所对应的孔径小于透光孔的孔径,且从理论上来说透光通道Q所对应的孔径可以无限小且不受透光孔的孔径大小的限制。在所需透光通道Q的准直收光角θ一定的情况下,透光通道Q所对应的孔径越小,则透光通道Q的厚度越小(即,光路结构4的厚度越小),越有利于显示面板的轻薄化。
当然,上述各实施例中所示光路结构4的具体结构仅起到示例性作用,其不会对本公开的技术方案产生限制,本公开中的光路结构4还可以采用其他结构,此处不再一一举例描述。
基于同一发明构思,本公开实施例还提供了一种显示面板的制备方法。图14为本公开实施例提供的一种显示面板的制备方法流程图,如图14所示,该制备方法可用于制备前面任一实施例提供的显示面板,该制备方法包括:
步骤S1、在基底上形成光电传感结构。
步骤S2、在光电传感结构背向基底的一侧形成光路结构和发光结构。
其中,发光结构包括:多个发光元件,发光元件包括:沿远离基底方向依次设置的第一电极、发光层和第二电极,光路结构位于光电传感结构和第二电极之间。
对于上述步骤S1和步骤S2的具体描述可参见前面实施例中相应内容,此处不再赘述。
基于同一发明构思,本公开实施例还提供了一种显示装置,该显示装置包括前面任一实施例提供的显示面板以及固定该显示面板的外框,对于该显示面板的具体描述可参见前面实施例中相应内容,此处不再赘述。
可以理解的是,以上实施方式仅仅是为了说明本公开的原理而采用的示例性实施方式,然而本公开并不局限于此。对于本领域内的普通技术人员而言,在不脱离本公开的精神和实质的情况下,可以做出各种变型和改进,这些变型和改进也视为本公开的保护范围。

Claims (38)

  1. 一种显示面板,其中,包括:
    基底;
    光电传感结构,位于所述基底的一侧;
    发光结构,位于所述光电传感结构远离所述基底的一侧,所述发光结构包括:多个发光元件,所述发光元件包括:沿远离所述基底方向依次设置的第一电极、发光层和第二电极;
    光路结构,位于所述光电传感结构和所述第二电极之间,配置为对位于所述光电传感结构远离所述基底一侧且传播方向为靠近所述光电传感结构的光线进行准直处理;
    在垂直于所述基底的方向上,所述光电传感结构与发光结构不重叠或部分重叠;
    在垂直于所述基底的方向上,所述光路结构与所述光电传感器结构至少部分重叠。
  2. 根据权利要求1所述的显示面板,其中,所述光路结构具有多个透光通道;
    从所述透光通道射出并射向所述光电传感结构的光的传播方向,与所述基底所处平面的法线的夹角处于[0°,72°]。
  3. 根据权利要求2所述的显示面板,其中,从所述透光通道射出并射向所述光电传感结构的光的传播方向,与所述基底所处平面的法线的夹角处于[0°,20°]。
  4. 根据权利要求2或3所述的显示面板,其中,所述光电传感结构包括:多个光电传感器,每个光电传感器对应至少一个所述透光通道。
  5. 根据权利要求4所述的显示面板,其中,每个光电传感器对 应n个所述透光通道,1≤n≤10且n为正整数。
  6. 根据权利要求1至5中任一所述的显示面板,其中,所述光路结构包括:至少一层遮光层,所述遮光层中设置有多个透光孔,所述透光孔限定出透光通道。
  7. 根据权利要求1至6中任一所述的显示面板,其中,所述至少一层遮光层包括:第一遮光层和位于所述第一遮光层远离所述基底一侧的第二遮光层,所述第一遮光层与所述第二遮光层之间设置有透光层,所述第一遮光层上设置有呈阵列排布的第一透光孔,所述第二遮光层上设置有与所述第一透光孔一一对应的第二透光孔,所述第一透光孔与所对应的所述第二透光孔限定出透光通道。
  8. 根据权利要求7所述的显示面板,其中,所述至少一层遮光层还包括:位于所述第一遮光层和所述第二遮光层之间的至少一层第三遮光层,每相邻遮光层之间设置有透光层;
    所述第三遮光层上设置有所述第一透光孔一一对应的第三透光孔,所述第一透光孔与所对应的所述第二透光孔和第三透光孔限定出透光通道。
  9. 根据权利要求8所述的显示面板,其中,所述第三遮光层的数量为1。
  10. 根据权利要求8或9所述的显示面板,其中,所述第二透光孔和所述第一透光孔在所述基底上的正投影的形状大致相同;
    所述第一透光孔在所述基底上的正投影的面积与所述第二透光孔在所述基底上的正投影的面积的比值范围为[0.2,1]。
  11. 根据权利要求8至10中任一所述的显示面板,其中,所述第三透光孔和所述第一透光孔在所述基底上的正投影的形状大致相 同,所述第三透光孔在所述基底上的正投影的面积与所述第一透光孔在所述基底上的正投影的面积大致相等。
  12. 根据权利要求11所述的显示面板,其中,所述第一透光孔、与所述第一透光孔所对应的第二透光孔以及与所述第一透光孔所对应的第三透光孔在所述基底上的正投影至少部分重叠。
  13. 根据权利要求12所述的显示面板,其中,所述第一透光孔和与所述第一透光孔所对应的第二透光孔在所述基底上的正投影完全重叠;
    所述第一透光孔和与所述第一透光孔所对应的第三透光孔在所述基底上的正投影至少部分重叠。
  14. 根据权利要求13所述的显示面板,其中,所述第一透光孔和与所述第一透光孔所对应的第三透光孔在所述基底上的正投影所重叠部分的形状为正方形。
  15. 根据权利要求13或14中所述的显示面板,其中,所述第一透光孔、与所述第一透光孔所对应的所述第二透光孔以及与所述第一透光孔所对应的所述第三透光孔在所述基底上的正投影分别为第一正投影、第二正投影和第三正投影;
    所述第一正投影、所述第二正投影和所述第三正投影的面积大致相等且形状均为正方形,正方形上任意相交两条边中其一沿第一方向延伸,另一沿第二方向延伸;
    所述第一正投影的中心与所述第三正投影的中心在所述第一方向的距离和在所述第二方向上的距离相等。
  16. 根据权利要求15所述的显示面板,其中,所述第一正投影、所述第二正投影、所述第三正投影的边长均为D,所述第一正投影的中心与所述第三正投影的中心在第一方向上的距离以及在第二方向 上的距离均为T,所述光路结构的厚度为H,所述光路结构内透光通道的准直收光角θ满足以下关系:
    θ=arctan(D-T)/H;
    其中,D的取值范围为4um~10um;T的取值范围为:1um~3um;
    准直收光角θ的取值范围为[10°,20°]。
  17. 根据权利要求16所述的显示面板,其中,所述第一透光孔、所述第二透光孔和所述第三透光孔的排布周期相等且为P,所述第一遮光层的厚度为h1,所述第二遮光层的厚度为h2,所述第三遮光层的厚度为h3,位于所述第一遮光层和所述第三遮光层之间的透光层的厚度为H1,位于所述第二遮光和所述第三遮光层之间的透光层的厚度为H2,D、T、H、P、h1、h2、h3、H1、H2满足如下关系:
    H/(P+D)≤(h1+h3+H1)/(D+T)≤(h2+H2)/(P-T)。
  18. 根据权利要求17所述的显示面板,其中,P的取值范围为:5um~20um;
    h1的取值范围为:1um~3um;
    h2的取值范围为:1um~3um;
    h3的取值范围为:1um~3um;
    H1的取值范围为:0.5um~4um;
    H2的取值范围为:0.5um~4um。
  19. 根据权利要求7至18中任一所述的显示面板,其中,所述光电传感结构远离所述基底的一侧设置有第二平坦化层,所述第二平坦化层的材料包括:遮光材料;
    所述第二平坦化层复用为所述第一遮光层。
  20. 根据权利要求19所述的显示面板,其中,所述第二平坦化层与所述光电传感结构之间设置有第一钝化层。
  21. 根据权利要求7至20所述的显示面板,其中,所述第二平坦化层远离所述基底的一侧设置有像素界定层,所述像素界定层上形成有像素开口,所述发光层位于所述像素开口内,所述第二电极位于所述像素界定层远离所述基底的一侧,所述像素界定层的材料包括:遮光材料;
    所述像素界定层复用为所述第二遮光层。
  22. 根据权利要求21所述的显示面板,其中,所述第二电极与所述像素界定层之间设置有滤光层,所述滤光层填充所述像素界定层上的第二透光孔,所述滤光层配置为滤除非可见光线。
  23. 根据权利要求21所述的显示面板,其中,所述第一遮光层与所述第二遮光层之间设置有滤光层,所述滤光层配置为滤除非可见光线;
    所述滤光层复用为至少一层所述透光层。
  24. 根据权利要求23所述的显示面板,其中,所述第二电极与所述像素界定层之间设置有填充层,所述填充层填充所述像素界定层上的第二透光孔;
    所述填充层与所述第二电极之间设置有围绕所述像素开口的隔离坝。
  25. 根据权利要求23所述的显示面板,其中,所述第二电极与所述像素界定层之间设置有隔离坝,所述隔离坝填充所述像素界定层上的第二透光孔且围绕所述像素开口。
  26. 根据权利要求22至25中任一所述的显示面板,其中,所述滤光层包括:红外滤光层,配置为滤除红外光线。
  27. 根据权利要求21至26中任一所述的显示面板,其中,在 所述第一遮光层和所述第二遮光层之间设置有至少一层第三遮光层时,所述第三遮光层的材料包括:黑色树脂材料。
  28. 根据权利要求21至26中任一所述的显示面板,其中,在所述第一遮光层和所述第二遮光层之间设置有至少一层第三遮光层时,所述第三遮光层的材料包括:金属材料。
  29. 根据权利要求28所述的显示面板,其中,所述第三遮光层与位于所述第三遮光层靠近所述基底一侧且最接近的所述透光层之间设置有第二钝化层。
  30. 根据权利要求1至29中任一所述的显示面板,其中,所述光电传感结构包括:多个光电传感器,所述光电传感器包括:沿远离所述基底方向依次设置的第三电极、光电转换层和第四电极;
    所述显示面板还包括:驱动电路层,所述驱动电路层位于基底与所述光电传感结构之间,所述驱动电路层具有与所述发光元件电连接的第一晶体管和与所述光电传感器电连接的第二晶体管;
    所述第一晶体管的漏极与对应所述发光元件内的所述第一电极电连接,所述第二晶体管的漏极与对应所述光电传感器内的所述第三电极电连接。
  31. 根据权利要求30所述的显示面板,其中,所述驱动电路层沿远离所述基底方向依次层叠设置有源层、第一栅绝缘层、第一栅导电层、第二栅绝缘层、第二栅导电层、层间介质层、第一源漏导电层、第一平坦化层;
    所述第一平坦化层远离所述基底的一侧设置有第二源漏导电层,所述第二源漏导电层包括所述第三电极。
  32. 根据权利要求31或32所述的显示面板,其中,所述光电传感结构远离所述基底的一侧设置有偏置电压线,所述偏置电压线与 所述第四电极电连接,所述偏置电压线与所述第一电极同层设置。
  33. 根据权利要求1至32中任一所述的显示面板,其中,所述第二电极远离所述基底一侧设置有封装层和盖板,所述盖板位于所述封装层远离所述基底的一侧。
  34. 根据权利要求33所述的显示面板,其中,所述封装层与所述盖板之间设置有触控功能层。
  35. 根据权利要求37或38所述的显示面板,其中,所述封装层与所述盖板之间设置有圆偏光片。
  36. 根据权利要求1至35中任一所示的显示面板,其中,所述光电传感结构包括多个光电传感器,所述光电传感器在所述基底上的正投影与所述发光元件在所述基底上的正投影不交叠;
    所述基底包括呈阵列排布的多个第一像素区域和呈阵列排布的多个第二像素区域,所述第一像素区域与所述第二像素区域在行方向和列方向上均交替设置;
    所述发光元件位于所述第一像素区域内,所述光电传感器位于所述第二像素区域内。
  37. 根据权利要求1至36中任一所述的显示面板,其中,所述发光元件为有机发光二极管。
  38. 一种显示装置,其中,包括:如上述权利要求1至37中任一所述显示面板和固定所述显示面板的外框。
PCT/CN2020/139453 2020-12-25 2020-12-25 显示面板和显示装置 WO2022134012A1 (zh)

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