WO2022124895A3 - Integrated circuit comprising a substrate, a die and an improved die attachment layer, as well as corresponding method of die bonding - Google Patents

Integrated circuit comprising a substrate, a die and an improved die attachment layer, as well as corresponding method of die bonding Download PDF

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Publication number
WO2022124895A3
WO2022124895A3 PCT/NL2021/050747 NL2021050747W WO2022124895A3 WO 2022124895 A3 WO2022124895 A3 WO 2022124895A3 NL 2021050747 W NL2021050747 W NL 2021050747W WO 2022124895 A3 WO2022124895 A3 WO 2022124895A3
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Prior art keywords
region
die
substrate
thermal expansion
expansion coefficient
Prior art date
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PCT/NL2021/050747
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French (fr)
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WO2022124895A2 (en
Inventor
John Suman Nakka
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Stichting Chip Integration Technology Centre
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Publication of WO2022124895A2 publication Critical patent/WO2022124895A2/en
Publication of WO2022124895A3 publication Critical patent/WO2022124895A3/en

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  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Die Bonding (AREA)
  • Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)

Abstract

An integrated circuit (IC) (30) is attached to a substrate (10) through an improved die attachment layer (20), whereby an IC-package is formed. The die attachment layer (20) comprises at least one first region (21) comprising a first attachment material and at least one second region (22) comprising a second attachment material different from the first attachment material, wherein the at least one first region (21) is located centrally on the substrate (10), wherein the at least one second region (22) is located eccentrically, such as at a side, at a part of a side, or at a corner, wherein the at least one first region (21) comprises at least one metal (e.g., sintered silver) and the at least one second region (22) comprises a die-attach material selected from heat assisted attach materials, pressure-based attach materials, pressure-less attach materials, thermohardening attach materials, such as epoxy resins, curing attach materials, polymer based attach materials, resin based attach materials, fibres, nanoparticles, and combinations thereof, in particular, wherein the at least one second region (22) comprises particles of dielectric material embedded in a matrix of polymeric material. A thermal expansion coefficient (TCE3) of the at least one first region (21) and a thermal expansion coefficient (TCE4) of the at least one second region (22) may be between a thermal expansion coefficient (TCE1) of the substrate (10) and a thermal expansion coefficient (TCE2) of the die (30). The thermal expansion coefficient (TCE4) of the at least one second region (22) may be between the thermal expansion coefficient (TCE3) of the at least one first region (21) and the thermal expansion coefficient (TCE1) of the substrate (10) or between the thermal expansion coefficient (TCE3) of the at least one first region (21) and the thermal expansion coefficient (TCE2) of the die (30). The elastic modulus (EM1) of the at least one first region (21) may be higher than the elastic modulus (EM2) of the at least one second region (22), wherein, preferably, the elastic modulus (EM1) of the at least one first region (21) is lower than an elastic modulus of the die (30) and wherein, preferably, the elastic modulus (EM2) of the at least one second region (22) is higher than an elastic modulus of the substrate (10), wherein the elastic moduli are each a Young's modulus, a bulk modulus, viscoelastic modulus, and/or a volumetric modulus. The attachment layer (20) may extend up to a side of the die (30), preferably forming a fillet (27). The attachment layer may comprise a cavity (28) for receiving the die (30), preferably a cavity (28) adapted to outer dimensions of the die (30). The die (30) may be a power IC or, alternatively, the integrated circuit may relate to a photonics application, with an improved heat flow from die (30) to the substrate (10), or may relate to an IC requiring precise temperature control thereof, such as a VCSEL circuit. In the manufacturing method, i.e., method of die bonding, the at least one first region (21) may be provided in the form of at least one central bar-shaped volume, optionally with one or more side branches, preferably towards every substrate corner and optionally at each longitudinal side of the substrate (10). The die (30) may be attached to the substrate (10) by applying pressure, by applying heat, by applying curing, by sintering, by diffusion, or by a combination thereof. After attaching the die (30), the first region (21) is spread out over the central region of the substrate (10), whereas the second regions (22) are slightly increased in surface are size and are positioned at the sides and corners.
PCT/NL2021/050747 2020-12-08 2021-12-08 Integrated circuit comprising improved die attachment layer WO2022124895A2 (en)

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