WO2022077224A1 - Clock synchronization method and apparatus, chip system, unmanned aerial vehicle, and terminal - Google Patents

Abstract

Provided are a clock synchronization method and apparatus, a chip system, an unmanned aerial vehicle, and a terminal. The method comprises: receiving, by means of a first subsystem in a chip system, a UTC sent by a second subsystem in the chip system and a local time of the second subsystem; and performing, on the basis of a time difference between a local time of the first subsystem and the local time of the second subsystem, clock synchronization on the local time of the first subsystem and the UTC, wherein a time delay of acquisition of the UTC by the second subsystem is less than a time delay of acquisition of the UTC by the first subsystem.

Description

时钟同步方法和装置、芯片***、无人机和终端Clock synchronization method and device, chip system, drone and terminal 技术领域technical field

本公开涉及芯片***技术领域，尤其涉及一种时钟同步方法和装置、芯片***、无人机和终端。The present disclosure relates to the technical field of chip systems, and in particular, to a clock synchronization method and device, a chip system, an unmanned aerial vehicle, and a terminal.

背景技术Background technique

芯片***中的子***在工作时，需要获取协调世界时间(Coordinated Universal Time，UTC)。在获取UTC时间时，子***会从卫星接收***获取秒脉冲(Pulse Per Second，PPS)信号，并从中断程序中获取该PPS信号对应的UTC时间。然而，有些子***的中断时延较大，导致获取UTC时间的准确度较低。When the subsystems in the chip system are working, they need to obtain Coordinated Universal Time (UTC). When obtaining the UTC time, the subsystem will obtain the Pulse Per Second (PPS) signal from the satellite receiving system, and obtain the UTC time corresponding to the PPS signal from the interrupt program. However, some subsystems have large interruption delays, resulting in lower accuracy in obtaining UTC time.

发明内容SUMMARY OF THE INVENTION

本公开提供了一种时钟同步方法和装置、芯片***、无人机和终端，能够提高芯片***中子***获取到的UTC时间的准确度。The present disclosure provides a clock synchronization method and device, a chip system, an unmanned aerial vehicle and a terminal, which can improve the accuracy of the UTC time obtained by the subsystem in the chip system.

第一方面，本公开实施例提供一种时钟同步方法，应用于芯片***中的第一子***，所述方法包括：接收所述芯片***中第二子***发送的UTC时间和所述第二子***的本地时间；基于所述第一子***的本地时间与所述第二子***的本地时间之间的时间差，对所述第一子***的本地时间与所述UTC时间进行时钟同步；其中，所述第二子***获取所述UTC时间的时延小于所述第一子***获取UTC时间的时延。In a first aspect, an embodiment of the present disclosure provides a clock synchronization method, which is applied to a first subsystem in a chip system. The method includes: receiving a UTC time sent by a second subsystem in the chip system and the second subsystem. The local time of the subsystem; based on the time difference between the local time of the first subsystem and the local time of the second subsystem, the local time of the first subsystem and the UTC time are clocked; Wherein, the delay of acquiring the UTC time by the second subsystem is smaller than the delay of acquiring the UTC time by the first subsystem.

第二方面，本公开实施例提供一种时钟同步方法，应用于芯片***中的第二子***，所述方法包括：接收卫星接收***发送的UTC时间和所述第二子***的本地时间；将所述UTC时间发送至所述芯片***中的第一子***，以使所述第一子***基于所述第一子***的本地时间与所述第二子***的本地时间之间的时间差，对所述第一子***的本地时间与所述UTC时间进行时钟同步；其中，所述第二子***获取所述UTC时间的时延小于所述第一子***获取UTC时间的时延。In a second aspect, an embodiment of the present disclosure provides a clock synchronization method, which is applied to a second subsystem in a chip system, the method comprising: receiving a UTC time sent by a satellite receiving system and a local time of the second subsystem; sending the UTC time to a first subsystem in the system-on-a-chip so that the first subsystem is based on a time difference between the local time of the first subsystem and the local time of the second subsystem , and synchronize the clock between the local time of the first subsystem and the UTC time; wherein, the delay for the second subsystem to obtain the UTC time is smaller than the delay for the first subsystem to obtain the UTC time.

第三方面，本公开实施例提供一种时钟同步装置，包括第一处理器和第一通信接口，所述第一通信接口用于接收芯片***中第二子***发送的UTC时间和所述第二 子***的本地时间；所述第一处理器用于基于所述第一子***的本地时间与所述第二子***的本地时间之间的时间差，对所述第一子***的本地时间与所述UTC时间进行时钟同步；其中，所述第二子***获取所述UTC时间的时延小于所述第一子***获取UTC时间的时延。In a third aspect, an embodiment of the present disclosure provides a clock synchronization apparatus, including a first processor and a first communication interface, where the first communication interface is configured to receive the UTC time sent by the second subsystem in the chip system and the first communication interface. The local time of the second subsystem; the first processor is configured to compare the local time of the first subsystem with the local time of the second subsystem based on the time difference between the local time of the first subsystem and the local time of the second subsystem. The UTC time is synchronized with the clock; wherein, the delay in acquiring the UTC time by the second subsystem is smaller than the delay in acquiring the UTC time by the first subsystem.

第四方面，本公开实施例提供一种时钟同步装置，包括第二处理器和第二通信接口，所述第二通信接口用于接收卫星接收***发送的UTC时间；所述第二处理器用于将所述UTC时间和所述第二子***的本地时间发送至所述芯片***中的第一子***，以使所述第一子***基于所述第一子***的本地时间与所述第二子***的本地时间之间的时间差，对所述第一子***的本地时间与所述UTC时间进行时钟同步；其中，所述第二子***获取所述UTC时间的时延小于所述第一子***获取UTC时间的时延。In a fourth aspect, an embodiment of the present disclosure provides a clock synchronization device, including a second processor and a second communication interface, where the second communication interface is used to receive UTC time sent by a satellite receiving system; the second processor is used for Send the UTC time and the local time of the second subsystem to the first subsystem in the chip system, so that the first subsystem and the first subsystem are based on the local time of the first subsystem and the first subsystem. The time difference between the local times of the two subsystems is to synchronize the local time of the first subsystem with the UTC time; wherein, the delay of the second subsystem acquiring the UTC time is less than that of the first subsystem. Delay for a subsystem to obtain UTC time.

第五方面，本公开实施例提供一种芯片***，包括：第一子***和第二子***；所述第二子***用于接收卫星接收***发送的UTC时间，并将所述UTC时间和所述第二子***的本地时间发送至所述芯片***中的第一子***；所述第一子***用于基于所述第一子***的本地时间与所述第二子***的本地时间之间的时间差，对所述第一子***的本地时间与所述UTC时间进行时钟同步；其中，所述第二子***获取所述UTC时间的时延小于所述第一子***获取UTC时间的时延。In a fifth aspect, an embodiment of the present disclosure provides a chip system, including: a first subsystem and a second subsystem; the second subsystem is configured to receive a UTC time sent by a satellite receiving system, and combine the UTC time with the second subsystem. The local time of the second subsystem is sent to the first subsystem in the chip system; the first subsystem is configured to be based on the local time of the first subsystem and the local time of the second subsystem The time difference between the local time of the first subsystem and the UTC time is synchronized with the clock; wherein, the delay of the second subsystem acquiring the UTC time is less than the time delay of the first subsystem acquiring the UTC time delay.

第六方面，本公开实施例提供一种无人机，包括：本公开任一实施例所述的芯片***；以及卫星接收***，用于将UTC时间发送至所述芯片***中的第二子***。In a sixth aspect, an embodiment of the present disclosure provides an unmanned aerial vehicle, comprising: the chip system described in any of the embodiments of the present disclosure; and a satellite receiving system for sending UTC time to a second sub-system in the chip system system.

第七方面，本公开实施例提供一种终端，包括：本公开任一实施例所述的芯片***；以及通信***，用于基于同步后的所述第一子***的本地时间，控制无人机进行飞行。In a seventh aspect, an embodiment of the present disclosure provides a terminal, including: the chip system described in any embodiment of the present disclosure; and a communication system, configured to control the unmanned aerial vehicle based on the synchronized local time of the first subsystem aircraft to fly.

第八方面，本公开实施例提供一种计算机可读存储介质，包括指令，当其在计算机上运行时，使得所述计算机执行上述第一方面所述的时钟同步方法。In an eighth aspect, an embodiment of the present disclosure provides a computer-readable storage medium, including instructions, which, when executed on a computer, cause the computer to execute the clock synchronization method described in the first aspect.

本公开实施例中，通过第二子***获取UTC时间，由于第二子***获取UTC时间的时延较小，因此，第二子***获取到的UTC时间的准确度较高；然后，再基于第一子***与第二子***的本地时间之间的时间差，对第一子***的本地时间与UTC时间进行时钟同步，从而无需第一子***从中断程序中获取UTC时间，提高了第一子***获取UTC时间的准确度。In the embodiment of the present disclosure, the UTC time is acquired by the second subsystem. Since the delay in acquiring the UTC time by the second subsystem is relatively small, the accuracy of the UTC time acquired by the second subsystem is relatively high; The time difference between the local time of the first subsystem and the second subsystem synchronizes the local time of the first subsystem with the UTC time, so that the first subsystem does not need to obtain the UTC time from the interrupt program, which improves the first subsystem. The subsystem obtains the accuracy of UTC time.

应当理解的是，以上的一般描述和后文的细节描述仅是示例性和解释性的，并 不能限制本公开。It is to be understood that the foregoing general description and the following detailed description are exemplary and explanatory only and are not restrictive of the present disclosure.

附图说明Description of drawings

为了更清楚地说明本公开实施例中的技术方案，下面将对实施例描述中所需要使用的附图作简单地介绍，显而易见地，下面描述中的附图仅仅是本公开的一些实施例，对于本领域普通技术人员来讲，在不付出创造性劳动性的前提下，还可以根据这些附图获得其他的附图。In order to illustrate the technical solutions in the embodiments of the present disclosure more clearly, the following briefly introduces the accompanying drawings used in the description of the embodiments. Obviously, the accompanying drawings in the following description are only some embodiments of the present disclosure. For those of ordinary skill in the art, other drawings can also be obtained from these drawings without creative labor.

图1是传统的时钟同步方式的示意图。FIG. 1 is a schematic diagram of a conventional clock synchronization method.

图2是本公开实施例的时钟同步方法的流程图。FIG. 2 is a flowchart of a clock synchronization method according to an embodiment of the present disclosure.

图3是本公开实施例的时钟同步方式与传统的时钟同步方式的比较示意图。FIG. 3 is a schematic diagram illustrating a comparison between a clock synchronization method according to an embodiment of the present disclosure and a conventional clock synchronization method.

图4A和图4B是本公开实施例的数据集的缓存过程示意图。4A and 4B are schematic diagrams of a caching process of a data set according to an embodiment of the present disclosure.

图5是本公开另一些实施例的时钟同步方法的流程图。FIG. 5 is a flowchart of a clock synchronization method according to other embodiments of the present disclosure.

图6是本公开实施例的时钟同步过程的时序图。FIG. 6 is a timing diagram of a clock synchronization process according to an embodiment of the present disclosure.

图7是本公开实施例的时钟同步装置的示意图。FIG. 7 is a schematic diagram of a clock synchronization apparatus according to an embodiment of the present disclosure.

图8是本公开实施例的芯片***的框图。FIG. 8 is a block diagram of a chip system according to an embodiment of the present disclosure.

图9是本公开实施例的无人机的示意图。9 is a schematic diagram of an unmanned aerial vehicle according to an embodiment of the present disclosure.

图10是本公开实施例的终端的示意图。FIG. 10 is a schematic diagram of a terminal according to an embodiment of the present disclosure.

具体实施方式Detailed ways

这里将详细地对示例性实施例进行说明，其示例表示在附图中。下面的描述涉及附图时，除非另有表示，不同附图中的相同数字表示相同或相似的要素。以下示例性实施例中所描述的实施方式并不代表与本公开相一致的所有实施方式。相反，它们仅是与如所附权利要求书中所详述的、本公开的一些方面相一致的装置和方法的例子。Exemplary embodiments will be described in detail herein, examples of which are illustrated in the accompanying drawings. Where the following description refers to the drawings, the same numerals in different drawings refer to the same or similar elements unless otherwise indicated. The implementations described in the illustrative examples below are not intended to represent all implementations consistent with this disclosure. Rather, they are merely examples of apparatus and methods consistent with some aspects of the present disclosure as recited in the appended claims.

在本公开使用的术语是仅仅出于描述特定实施例的目的，而非旨在限制本公开。在本公开公开和所附权利要求书中所使用的单数形式的“一种”、“所述”和“该”也旨在包括多数形式，除非上下文清楚地表示其他含义。还应当理解，本文中使用的术语“和/或”是指并包含一个或多个相关联的列出项目的任何或所有可能组合。The terminology used in the present disclosure is for the purpose of describing particular embodiments only and is not intended to limit the present disclosure. As used in this disclosure and the appended claims, the singular forms "a," "the," and "the" are intended to include the plural forms as well, unless the context clearly dictates otherwise. It will also be understood that the term "and/or" as used herein refers to and includes any and all possible combinations of one or more of the associated listed items.

应当理解，尽管在本公开可能采用术语第一、第二、第三等来描述各种信息，但这些信息不应限于这些术语。这些术语仅用来将同一类型的信息彼此区分开。例如，在不脱离本公开范围的情况下，第一信息也可以被称为第二信息，类似地，第二信息也可以被称为第一信息。取决于语境，如在此所使用的词语“如果”可以被解释成为“在……时”或“当……时”或“响应于确定”。It should be understood that although the terms first, second, third, etc. may be used in this disclosure to describe various pieces of information, such information should not be limited by these terms. These terms are only used to distinguish the same type of information from each other. For example, the first information may also be referred to as the second information, and similarly, the second information may also be referred to as the first information, without departing from the scope of the present disclosure. Depending on the context, the word "if" as used herein can be interpreted as "at the time of" or "when" or "in response to determining."

全球导航卫星***(Global Navigation Satellite System，GNSS)已在全球得到广泛应用，可以为用户提供全天候的实时位置、速度和时间信息。当GNSS用于授时时，会向外产生一个脉冲信号PPS信号，周期为1秒，同时通过通信链路将PPS上升沿时刻的UTC时间发送出去。Global Navigation Satellite System (GNSS) has been widely used around the world, which can provide users with all-weather real-time position, speed and time information. When GNSS is used for timing, a pulse signal PPS signal will be generated outward with a period of 1 second, and the UTC time of the rising edge of PPS will be sent out through the communication link.

芯片***中的子***在工作时，需要将该子***的本地时间与UTC时间进行时钟同步(也称为时钟对齐)，即将子***的本地时间与UTC时间对应起来。芯片***可以接收卫星接收***发送的PPS信号，然后从中断程序中读取该PPS信号对应的UTC时间。如图1所示，假设卫星接收***发送UTC时间到子***接收到UTC时间的时延记为t1，子***从中断程序中读取到UTC时间的时延记为t2，则整个过程中读取UTC时间的时延为t1+t2。芯片***中的某些子***获取UTC时间的时延较大(例如，通信链路时延较大，或者从中断程序中读取UTC的中断处理响应的时延较大)，导致获取UTC时间的准确度较低，从而导致时钟同步的准确度较低。When the subsystem in the chip system is working, it is necessary to synchronize the local time of the subsystem with the UTC time (also called clock alignment), that is, to correspond the local time of the subsystem with the UTC time. The chip system can receive the PPS signal sent by the satellite receiving system, and then read the UTC time corresponding to the PPS signal from the interrupt program. As shown in Figure 1, it is assumed that the delay from the satellite receiving system sending the UTC time to the subsystem receiving the UTC time is recorded as t1, and the delay from the subsystem reading the UTC time from the interrupt program to the UTC time is recorded as t2. Take the delay of UTC time as t1+t2. Some subsystems in the chip system have a large delay in acquiring the UTC time (for example, the communication link has a large delay, or the interrupt processing response of UTC is read from the interrupt program), which leads to the acquisition of the UTC time. is less accurate, resulting in less accurate clock synchronization.

基于此，本公开实施例提供一种时钟同步方法，应用于芯片***中的第一子***，如图2所示，所述方法包括：Based on this, an embodiment of the present disclosure provides a clock synchronization method, which is applied to a first subsystem in a chip system. As shown in FIG. 2 , the method includes:

201：接收所述芯片***中第二子***发送的UTC时间和所述第二子***的本地时间；201: Receive the UTC time sent by the second subsystem in the chip system and the local time of the second subsystem;

202：基于所述第一子***的本地时间与所述第二子***的本地时间之间的时间差，对所述第一子***的本地时间与所述UTC时间进行时钟同步；其中，所述第二子***获取所述UTC时间的时延小于所述第一子***获取UTC时间的时延。202: Based on the time difference between the local time of the first subsystem and the local time of the second subsystem, perform clock synchronization between the local time of the first subsystem and the UTC time; wherein the The delay for the second subsystem to acquire the UTC time is smaller than the delay for the first subsystem to acquire the UTC time.

本公开实施例中的第一子***和第二子***可以是任意一种子***，例如，Linux***、实时操作***(Real Time Operating System，RTOS)、磁盘操作***(Disk Operating System，DOS)、Windows***、鸿蒙***或者其他操作***，本公开对此不做限制，只需要第二子***获取所述UTC时间的时延小于第一子***获取UTC时间的时延即可。第一子***与第二子***可以通过硬件方式连接。例如，第一子*** 与第二子***可以通过导线或者其他硬件电路连接。由于采用硬件连接方式，使得第一子***与第二子***之间的通信时延可以忽略不计，从而进一步提高了第一子***获取UTC时间的准确度。The first subsystem and the second subsystem in the embodiment of the present disclosure may be any subsystem, for example, a Linux system, a real-time operating system (Real Time Operating System, RTOS), a disk operating system (Disk Operating System, DOS), Windows system, Hongmeng system or other operating systems are not limited in this disclosure, as long as the delay in acquiring the UTC time by the second subsystem is smaller than the delay in acquiring the UTC time by the first subsystem. The first subsystem and the second subsystem may be connected by hardware. For example, the first subsystem and the second subsystem may be connected by wires or other hardware circuits. Due to the hardware connection method, the communication delay between the first subsystem and the second subsystem can be ignored, thereby further improving the accuracy of the first subsystem acquiring the UTC time.

本公开实施例中所述的时钟同步，可以是对卫星接收***发送部分或全部PPS信号的UTC时间与第一子***的本地时间进行时钟同步。所述卫星接收***与第二子***也可以通过硬件方式连接。所述卫星接收***与第二子***之间的通信链路可以是串口、控制器局域网络(Controller Area Network，CAN)总线、1553B总线、通用串行总线(Universal Serial Bus，USB)等通信链路。The clock synchronization described in the embodiments of the present disclosure may be clock synchronization between the UTC time of the satellite receiving system sending part or all of the PPS signals and the local time of the first subsystem. The satellite receiving system and the second subsystem can also be connected by means of hardware. The communication link between the satellite receiving system and the second subsystem can be a serial port, a controller area network (Controller Area Network, CAN) bus, a 1553B bus, a universal serial bus (Universal Serial Bus, USB) and other communication links. road.

在一些实施例中，所述第一子***为Linux***，所述第二子***为RTOS***。RTOS***中的微控制单元(Microcontroller Unit，MCU)或者中央处理器(Central Processing Unit，CPU)可以与卫星接收***通过通信链路相连接，同时把卫星接收***发送的PPS信号引入到CPU或者MCU的外部中断，CPU或者MCU即可接收到PPS信号以及接收到该PPS信号的时刻的UTC。In some embodiments, the first subsystem is a Linux system, and the second subsystem is an RTOS system. The Microcontroller Unit (MCU) or Central Processing Unit (CPU) in the RTOS system can be connected to the satellite receiving system through a communication link, and at the same time, the PPS signal sent by the satellite receiving system is introduced into the CPU or MCU external interrupt, the CPU or MCU can receive the PPS signal and the UTC of the moment when the PPS signal is received.

本公开实施例利用卫星接收***和CPU/MCU等常见模块组成一个时钟同步***，实现简单、成本较低，可以充分利用RTOS***中断处理时间短的优势，将RTOS***的时钟差通过共享方式给到Linux***，从而提高Linux***获取到的UTC时间的准确度，使得子***上的本地时间与UTC时间的误差在2us以内，能够满足测绘等领域对高精度时间的要求。如图3所示，是本公开实施例的时钟同步方式与传统的时钟同步方式的比较示意图。假设卫星接收***与第一子***之间的传输时延以及卫星接收***与第二子***之间的传输时延均为t1，则由于第二子***从中断程序中获取UTC时间的中断响应时间t3远小于第一子***从中断程序中获取UTC时间的中断响应时间t2，从而使得第一子***获取UTC时间的时延能够缩短t4＝t2-t3。The embodiment of the present disclosure uses a satellite receiving system and common modules such as CPU/MCU to form a clock synchronization system, which is simple to implement and low in cost, and can make full use of the short interrupt processing time of the RTOS system to share the clock difference of the RTOS system to To the Linux system, the accuracy of the UTC time obtained by the Linux system is improved, so that the error between the local time on the subsystem and the UTC time is within 2us, which can meet the requirements of high-precision time in the fields of surveying and mapping. As shown in FIG. 3 , it is a schematic diagram of a comparison between a clock synchronization method according to an embodiment of the present disclosure and a conventional clock synchronization method. Assuming that the transmission delay between the satellite receiving system and the first subsystem and the transmission delay between the satellite receiving system and the second subsystem are both t1, since the second subsystem obtains the interrupt response of UTC time from the interrupt program The time t3 is far less than the interrupt response time t2 for the first subsystem to obtain the UTC time from the interrupt program, so that the delay for the first subsystem to obtain the UTC time can be shortened by t4=t2-t3.

在一些实施例中，可以将所述第一子***的本地时间与所述UTC时间和所述时间差之和对应的时间进行时钟同步。假设所述第一子***从第二子***接收到的UTC时间为utc_time，所述时间差记为delta，则与所述第一子***的本地时间对应的UTC时间记为utc_time_now＝utc_time+delta。In some embodiments, the local time of the first subsystem may be clock-synchronized with a time corresponding to the sum of the UTC time and the time difference. Assuming that the UTC time received by the first subsystem from the second subsystem is utc_time, and the time difference is recorded as delta, the UTC time corresponding to the local time of the first subsystem is recorded as utc_time_now=utc_time+delta.

一个子***的本地时间可以基于该子***中的计数器的计数值来确定。由于确定第一子***的本地时间的方式与确定第二子***的本地时间的方式相同，此处仅以第一子***为例，对确定本地时间的方式进行说明。The local time of a subsystem can be determined based on the count value of a counter in the subsystem. Since the method of determining the local time of the first subsystem is the same as the method of determining the local time of the second subsystem, the method of determining the local time is only described here by taking the first subsystem as an example.

可以获取所述第一子***的计数器的第一计数值，基于所述第一计数值确定所述第一子***的本地时间。第一子***的计数器可以按照固定的时间间隔进行计数，例如，每检测到一个目标信号的跳变沿(上升沿或者下降沿)，就进行一次计数。可以根据上述第一计数值和计数的时间间隔来确定本地时间。例如，假设第一计数值为k时的本地时间为t _k，则第一计数值为k+p时的本地时间为t _k+p*t0，其中，t0表示计数的时间间隔，k和p均为正整数。 A first count value of the counter of the first subsystem may be acquired, and the local time of the first subsystem may be determined based on the first count value. The counter of the first subsystem may count according to a fixed time interval, for example, every time a transition edge (rising edge or falling edge) of a target signal is detected, a count is performed. The local time may be determined according to the above-mentioned first count value and the counted time interval. For example, assuming that the local time when the first count value is k is t _k , then the local time when the first count value is k+p is t _k +p*t0, where t0 represents the counting time interval, k and p All are positive integers.

同理，可以获取所述第二子***的计数器的第二计数值，基于所述第二计数值确定所述第二子***的本地时间。具体过程可参见确定第一子***本地时间的方式，此处不再赘述。Similarly, a second count value of the counter of the second subsystem may be acquired, and the local time of the second subsystem may be determined based on the second count value. For the specific process, reference may be made to the manner of determining the local time of the first subsystem, which will not be repeated here.

进一步地，用于产生子***的本地时钟的晶振所产生的时钟频率与期望产生的标准时钟频率之间可能存在差异，例如，第二子***期望产生的时钟频率可能是60.00Hz，但是实际产生的时钟频率为59.99Hz。这种情况会进一步导致时钟同步的误差。为了解决上述问题，在确定时间差时，可以获取所述第一子***的时钟频率与所述第二子***的时钟频率的频率差，并基于所述频率差对所述时间差进行修正。Further, there may be a difference between the clock frequency generated by the crystal oscillator used to generate the local clock of the subsystem and the standard clock frequency expected to be generated. For example, the clock frequency expected to be generated by the second subsystem may be 60.00Hz, but the actual The clock frequency is 59.99Hz. This situation can further lead to errors in clock synchronization. In order to solve the above problem, when the time difference is determined, the frequency difference between the clock frequency of the first subsystem and the clock frequency of the second subsystem may be acquired, and the time difference is corrected based on the frequency difference.

在一些实施例中，为了方便进行数据交互，第一子***可以从第二子***接收数据集，所述数据集中可以包括所述UTC时间和所述第二子***的本地时间。进一步地，所述数据集中还可以包括所述UTC时间的索引和/或校验信息。一些实施例的数据集可记为{index,counter,utc_time,crc}，在其他实施例中，数据集中各数据项的顺序也可以采用其他顺序，本公开对此不做限制。其中，index表示索引，由于卫星接收***每秒会向第二子***发送一个PPS信号，因此，可以将第二子***接收到的PPS信号的个数作为该索引。例如，第二子***接收到第m个PPS信号时，对应数据集的索引记为m。counter表示第二子***的第二计数值，utc_time表示第二子***的UTC时间，crc表示循环冗余校验码(Cyclic Redundancy Check，CRC)。当然，此处除了CRC校验码之外，还可以采用其他类型的校验信息，此处不再赘述。In some embodiments, in order to facilitate data interaction, the first subsystem may receive a data set from the second subsystem, and the data set may include the UTC time and the local time of the second subsystem. Further, the data set may also include the index and/or verification information of the UTC time. The data set in some embodiments may be recorded as {index, counter, utc_time, crc}. In other embodiments, the order of each data item in the data set may also be in other order, which is not limited in the present disclosure. The index represents an index. Since the satellite receiving system sends one PPS signal to the second subsystem every second, the number of PPS signals received by the second subsystem can be used as the index. For example, when the second subsystem receives the mth PPS signal, the index of the corresponding data set is denoted as m. counter represents the second count value of the second subsystem, utc_time represents the UTC time of the second subsystem, and crc represents a Cyclic Redundancy Check (CRC). Of course, in addition to the CRC check code, other types of check information can also be used here, and details are not described here.

第一子***在接收到数据集之后，可以基于数据集中的索引，对所述数据集进行缓存。在一些实施例中，可以将接收到的各个数据集顺序缓存到缓存中的各个地址下。在缓存未存满之前，每接收到一个数据集，就将该数据集缓存到缓存中的一个空闲的地址下；在缓存存满的情况下，每接收到一个数据集，可以将该数据集缓存到用于缓存包括最小索引的数据集的目标地址下。例如，在缓存已存满的情况下，假设缓存中的地址1中的数据集包括的索引为1，地址2中的数据集包括的索引为2，以此类 推，则地址1中的数据集包括的索引最小，从而将地址1确定为目标地址，并将接收到的数据集缓存到地址1中以覆盖地址1中原有的数据集。After receiving the data set, the first subsystem may cache the data set based on the index in the data set. In some embodiments, each received data set may be sequentially cached under each address in the cache. Before the cache is not full, each time a data set is received, the data set is cached to an idle address in the cache; when the cache is full, each time a data set is received, the data set can be stored in the cache. Cached under the target address used to cache the dataset including the smallest index. For example, in the case where the cache is full, assuming that the data set in address 1 in the cache includes an index of 1, the data set in address 2 includes an index of 2, and so on, the data set in address 1 includes an index of 2. The smallest index is included, so address 1 is determined as the target address, and the received data set is buffered in address 1 to overwrite the original data set in address 1.

在需要进行时钟同步时，第一子***可以从缓存中读取数据集，并从中读取所需的信息。具体来说，可以从缓存中读取包括最大索引的数据集。例如，假设缓存中的地址1中的数据集包括的索引为1，地址2中的数据集包括的索引为2，以此类推，缓存中的地址5中的数据集包括的索引为5，且该索引为最大索引，则可以从地址5中读取数据集。When clock synchronization is required, the first subsystem can read the data set from the cache and read the required information therefrom. Specifically, the dataset that includes the largest index can be read from the cache. For example, assuming that the data set at address 1 in the cache includes index 1, the data set at address 2 includes index 2, and so on, the data set at address 5 in the cache includes index 5, and If this index is the largest index, the data set can be read from address 5.

为了便于操作，可记录缓存中各个数据集的起始索引start_index和结束索引end_index。其中，start_index用于记录数据集中的最小索引的索引值，end_index用于记录数据集中的最大索引的索引值，start_index和end_index可以是32位无符号整数。可以对start_index和end_index进行缓存，并在需要时直接从缓存中读取。每缓存一个数据集，可以对start_index和end_index进行更新。例如，在缓存未存满的情况下，每缓存一个数据集，可以对end_index进行更新，即将end_index的值加1。在缓存存满的情况下，每缓存一个数据集，可以对start_index和end_index均进行更新。假设当前的start_index和end_index分别为s和e，则在接收到下一个数据集的情况下，可以将该数据集覆盖到包括索引s的数据集所在的地址，将end_index更新为e+1，并将start_index更新为s+1。其中，s和e均为正整数。For the convenience of operation, the start index start_index and end index end_index of each data set in the cache may be recorded. Wherein, start_index is used to record the index value of the smallest index in the data set, end_index is used to record the index value of the largest index in the data set, and start_index and end_index may be 32-bit unsigned integers. The start_index and end_index can be cached and read directly from the cache when needed. Each time a dataset is cached, start_index and end_index can be updated. For example, when the cache is not full, each time a data set is cached, the end_index can be updated, that is, the value of the end_index is increased by 1. When the cache is full, both start_index and end_index can be updated for each data set cached. Assuming that the current start_index and end_index are s and e respectively, when the next data set is received, the data set can be overwritten to the address of the data set including the index s, the end_index is updated to e+1, and Update start_index to s+1. where s and e are both positive integers.

如图4A和图4B所示，假设缓存中最多能够缓存3600个数据集。则在缓存未存满的情况下，将各个数据集按照索引的大小依次缓存到缓存中的各个地址下。在缓存刚好存满时，如图4A所示，此时的start_index和end_index分别为0和3600。假设又接收到一个数据集，如图4B所示，此时将覆盖索引为0的数据集所在的地址，从而start_index和end_index分别为1和3601。As shown in Figures 4A and 4B, it is assumed that a maximum of 3600 datasets can be cached in the cache. Then, when the cache is not full, each data set is sequentially cached to each address in the cache according to the size of the index. When the cache is just full, as shown in FIG. 4A , the start_index and end_index at this time are 0 and 3600, respectively. Assuming that another data set is received, as shown in FIG. 4B , the address where the data set with index 0 is located will be overwritten at this time, so that start_index and end_index are 1 and 3601, respectively.

进一步地，在进行时钟同步之前，还可以基于校验信息对数据集进行完整性校验。可选地，在数据集中包括一项数据时，可以将该项数据对应的第一校验信息记为1；在数据集中某项数据缺失时，可以将该项数据对应的第一校验信息记为0。例如，对于数据集{index,counter,utc_time,crc}，在该数据集中包括index的情况下，index数据项对应的第一校验信息记为1，否则记为0。从而可以对各数据项的第一校验信息进行与运算，得到所述校验信息crc。如果crc为1，则表示数据集完整，否则表示数据集不完整。在数据集不完整的情况下，可以丢弃该数据集。Further, before the clock synchronization is performed, the integrity check of the data set may also be performed based on the check information. Optionally, when an item of data is included in the dataset, the first verification information corresponding to the item of data can be marked as 1; when a certain item of data in the dataset is missing, the first verification information corresponding to the item of data can be marked as 1. Record it as 0. For example, for the data set {index, counter, utc_time, crc}, if the data set includes index, the first verification information corresponding to the index data item is recorded as 1, otherwise it is recorded as 0. Therefore, the AND operation can be performed on the first check information of each data item to obtain the check information crc. If crc is 1, the dataset is complete, otherwise the dataset is incomplete. In the case of an incomplete dataset, the dataset can be discarded.

如图5所示，本公开实施例还提供一种时钟同步方法，应用于芯片***中的第二子***，所述方法包括：As shown in FIG. 5 , an embodiment of the present disclosure further provides a clock synchronization method, which is applied to a second subsystem in a chip system, and the method includes:

501：接收卫星接收***发送的UTC时间；501: Receive the UTC time sent by the satellite receiving system;

502：将所述UTC时间和所述第二子***的本地时间发送至所述芯片***中的第一子***，以使所述第一子***基于所述第一子***的本地时间与所述第二子***的本地时间之间的时间差，对所述第一子***的本地时间与所述UTC时间进行时钟同步；其中，所述第二子***获取所述UTC时间的时延小于所述第一子***获取UTC时间的时延。502: Send the UTC time and the local time of the second subsystem to the first subsystem in the chip system, so that the first subsystem is based on the local time of the first subsystem and The time difference between the local times of the second subsystem, and the clock synchronization is performed on the local time of the first subsystem and the UTC time; wherein, the delay of the second subsystem acquiring the UTC time is less than all the Describe the delay of obtaining the UTC time by the first subsystem.

在一些实施例中，所示第二子***还可以将所述第二子***的时钟频率发送至所述第一子***，以使所述第一子***基于所述第一子***的时钟频率与所述第二子***的时钟频率的频率差，对所述时间差进行修正。In some embodiments, the second subsystem shown may also send the clock frequency of the second subsystem to the first subsystem so that the first subsystem is based on the clock of the first subsystem A frequency difference between the frequency and the clock frequency of the second subsystem, and the time difference is corrected.

在一些实施例中，所述第二子***可以将包括所述UTC时间和所述第二子***的本地时间的数据集发送至所述第一子***。In some embodiments, the second subsystem may send a data set including the UTC time and the local time of the second subsystem to the first subsystem.

在一些实施例中，所述数据集中还包括所述UTC时间的索引，所述索引用于所述第一子***对所述数据集进行缓存，以及从所述缓存中读取对应的数据集。In some embodiments, the data set further includes an index of the UTC time, and the index is used by the first subsystem to cache the data set and read the corresponding data set from the cache .

在一些实施例中，所述数据集中还包括校验信息，所述校验信息用于所述第一子***对所述数据集的完整性进行校验。In some embodiments, the data set further includes verification information, and the verification information is used by the first subsystem to verify the integrity of the data set.

在一些实施例中，所述第一子***与所述第二子***通过硬件方式连接。在一些实施例中，所述第二子***与所述卫星接收***通过硬件方式连接。In some embodiments, the first subsystem and the second subsystem are connected by means of hardware. In some embodiments, the second subsystem is hardware-connected to the satellite reception system.

在一些实施例中，所述第一子***为Linux***，第二子***为RTOS***。In some embodiments, the first subsystem is a Linux system, and the second subsystem is an RTOS system.

本实施例的技术细节详见前述应用于第一子***的时钟同步方法的实施例，此处不再赘述。For the technical details of this embodiment, refer to the foregoing embodiment of the clock synchronization method applied to the first subsystem, which will not be repeated here.

下面以一个具体实施例为例，并结合图6，对本公开的技术方案进行说明。本公开实施例的芯片***可以是多核芯片***，多核芯片***中的每个内核可以是一个子***，所述芯片***可以是***级芯片(System on Chip，SoC)。这里以两核的芯片***为例，对本公开实施例的方案进行说明，其中，第一子***为A核，第二子***为B核。本公开实施例中包括卫星接收***和多核芯片***，卫星接收***和SoC通过通信链路连接，同时卫星接收***PPS引入SoC外部中断。SoC会以中断的形式 响应卫星接收***输出秒脉冲这一事件，同时通过通信链路接收PPS信号的上升沿这一时刻的UTC时间。B核来处理PPS信号，同时A核和B核都在接收UTC时间。The technical solution of the present disclosure will be described below by taking a specific embodiment as an example and in conjunction with FIG. 6 . The chip system in the embodiment of the present disclosure may be a multi-core chip system, each core in the multi-core chip system may be a subsystem, and the chip system may be a system on chip (System on Chip, SoC). Here, a two-core chip system is taken as an example to describe the solution of the embodiment of the present disclosure, wherein the first subsystem is the A core, and the second subsystem is the B core. The embodiment of the present disclosure includes a satellite receiving system and a multi-core chip system, the satellite receiving system and the SoC are connected through a communication link, and at the same time, the satellite receiving system PPS introduces an external interrupt of the SoC. The SoC will respond to the event of the satellite receiving system outputting the pulse of seconds in the form of an interrupt, and at the same time receive the UTC time of the rising edge of the PPS signal through the communication link. The B core processes the PPS signal, and both the A core and the B core are receiving UTC time.

在601中，卫星接收***向B核发送PPS信号和UTC时间。UTC时间与PPS信号可以通过不同的链路同步发送。In 601, the satellite receiving system sends the PPS signal and the UTC time to the B core. UTC time and PPS signals can be sent synchronously through different links.

在602和603中，B核可以在接收到PPS信号之后，从中断程序中读取接收到该PPS信号的UTC时间，B核还可以从中断程序中读取计数器的第二计数值counter。然后，将PPS信号的索引(即当前接收到的PPS信号的个数)、第二计数值、UTC时间以及校验信息crc打包生成数据集发送至A核。In 602 and 603, after receiving the PPS signal, the B core can read the UTC time of receiving the PPS signal from the interrupt program, and the B core can also read the second count value counter of the counter from the interrupt program. Then, the index of the PPS signal (ie, the number of currently received PPS signals), the second count value, the UTC time, and the verification information crc are packaged to generate a data set and sent to the A core.

在604至606中，A核可以先缓存所述数据集。在A核上的应用程序需要获取当前时间时，A核可以从缓存中读取数据集，并读取A核的计数器的第一计数值，从而根据第一计数值和第二计数值计算出A核的本地时间与B核的本地时间之间的时间间隔delta，进而计算出当前的UTC时间，即utc_time_now＝utc_time+delta。In 604 to 606, the A core may cache the data set first. When the application on the A core needs to obtain the current time, the A core can read the data set from the cache and read the first count value of the counter of the A core, so as to calculate the value according to the first count value and the second count value. The time interval delta between the local time of the A core and the local time of the B core, and then the current UTC time is calculated, that is, utc_time_now=utc_time+delta.

经实际测试，本发明所描述的时钟同步方案，可以保证本地时间与UTC时间的误差在±2微秒以内，达到了较高的精度水平。本公开的时钟同步方案避免了Linux等子***中断响应时间长的弊端，充分利用了RTOS等***中断响应快的优势，达到本地计时和累积误差消除，从而提高时钟同步精度。After actual testing, the clock synchronization scheme described in the present invention can ensure that the error between the local time and the UTC time is within ±2 microseconds, and achieves a high level of precision. The clock synchronization scheme of the present disclosure avoids the disadvantage of long interrupt response time of subsystems such as Linux, and makes full use of the advantages of fast response of systems such as RTOS, so as to achieve local timing and elimination of accumulated errors, thereby improving clock synchronization accuracy.

本公开实施例还提供一种一种时钟同步装置，包括第一处理器和第一通信接口，所述第一通信接口用于接收芯片***中第二子***发送的UTC时间和所述第二子***的本地时间；所述第一处理器用于基于所述第一子***的本地时间与所述第二子***的本地时间之间的时间差，对所述第一子***的本地时间与所述UTC时间进行时钟同步；其中，所述第二子***获取所述UTC时间的时延小于所述第一子***获取UTC时间的时延。An embodiment of the present disclosure further provides a clock synchronization apparatus, including a first processor and a first communication interface, where the first communication interface is configured to receive the UTC time sent by the second subsystem in the chip system and the second communication interface. the local time of the subsystem; the first processor is configured to, based on the time difference between the local time of the first subsystem and the local time of the second subsystem, compare the local time of the first subsystem with the local time of the second subsystem The UTC time is used for clock synchronization; wherein, the delay in acquiring the UTC time by the second subsystem is smaller than the delay in acquiring the UTC time by the first subsystem.

在一些实施例中，所述第一处理器用于：将所述第一子***的本地时间与所述UTC时间和所述时间差之和对应的时间进行时钟同步。In some embodiments, the first processor is configured to: synchronize the local time of the first subsystem with a time corresponding to the sum of the UTC time and the time difference.

在一些实施例中，所述第一处理器还用于：获取所述第一子***的时钟频率与所述第二子***的时钟频率的频率差；基于所述频率差，对所述时间差进行修正。In some embodiments, the first processor is further configured to: obtain a frequency difference between the clock frequency of the first subsystem and the clock frequency of the second subsystem; Make corrections.

在一些实施例中，所述第一处理器还用于：获取所述第一子***的计数器的第一计数值；基于所述第一计数值确定所述第一子***的本地时间。In some embodiments, the first processor is further configured to: obtain a first count value of a counter of the first subsystem; and determine the local time of the first subsystem based on the first count value.

在一些实施例中，所述第一通信接口用于：接收所述第二子***发送的数据集，所述数据集中包括所述UTC时间和所述第二子***的本地时间。In some embodiments, the first communication interface is configured to: receive a data set sent by the second subsystem, where the data set includes the UTC time and the local time of the second subsystem.

在一些实施例中，所述数据集中还包括所述UTC时间的索引，所述第一处理器还用于：基于所述索引，对所述数据集进行缓存；以及基于所述索引，从所述缓存中读取对应的数据集。应当说明的是，缓存的数据集并不一定要立刻读出，第一处理器可以在需要时从缓存中读取数据集，例如，在第一子***中的应用程序需要获取时间的时候才从缓存中读取数据集。In some embodiments, the data set further includes an index of the UTC time, and the first processor is further configured to: cache the data set based on the index; Read the corresponding dataset from the cache. It should be noted that the cached data set does not have to be read out immediately, the first processor can read the data set from the cache when needed, for example, only when the application in the first subsystem needs to obtain the time. Read the dataset from the cache.

在一些实施例中，所述第一处理器用于：从所述缓存中读取包括最大索引的数据集。In some embodiments, the first processor is configured to: read the data set including the largest index from the cache.

在一些实施例中，所述第一处理器用于：在缓存空间已存满的情况下，将所述数据集缓存到目标地址下，所述目标地址用于缓存包括最小索引的数据集。In some embodiments, the first processor is configured to: when the cache space is full, cache the data set to a target address, where the target address is used to cache the data set including the smallest index.

在一些实施例中，所述数据集中还包括校验信息；所述第一处理器还用于：基于所述校验信息对所述数据集的完整性进行校验。In some embodiments, the data set further includes verification information; the first processor is further configured to: verify the integrity of the data set based on the verification information.

在一些实施例中，所述第一子***与所述第二子***通过硬件方式连接。In some embodiments, the first subsystem and the second subsystem are connected by means of hardware.

在一些实施例中，所述第一子***为Linux***，第二子***为RTOS***。In some embodiments, the first subsystem is a Linux system, and the second subsystem is an RTOS system.

本公开实施例还提供一种时钟同步装置，包括第二处理器和第二通信接口，所述第二通信接口用于接收卫星接收***发送的UTC时间；所述第二处理器用于将所述UTC时间和所述第二子***的本地时间发送至所述芯片***中的第一子***，以使所述第一子***基于所述第一子***的本地时间与所述第二子***的本地时间之间的时间差，对所述第一子***的本地时间与所述UTC时间进行时钟同步；其中，所述第二子***获取所述UTC时间的时延小于所述第一子***获取UTC时间的时延。An embodiment of the present disclosure further provides a clock synchronization apparatus, including a second processor and a second communication interface, where the second communication interface is configured to receive the UTC time sent by a satellite receiving system; the second processor is configured to The UTC time and the local time of the second subsystem are sent to the first subsystem in the chip system, so that the first subsystem communicates with the second subsystem based on the local time of the first subsystem The time difference between the local time and the local time of the first subsystem is synchronized with the UTC time; wherein, the delay of the second subsystem acquiring the UTC time is less than that of the first subsystem Get the delay in UTC time.

在一些实施例中，所述第二处理器还用于：将所述第二子***的时钟频率发送至所述第一子***，以使所述第一子***基于所述第一子***的时钟频率与所述第二子***的时钟频率的频率差，对所述时间差进行修正。In some embodiments, the second processor is further configured to: send the clock frequency of the second subsystem to the first subsystem, so that the first subsystem is based on the first subsystem The frequency difference between the clock frequency of the second subsystem and the clock frequency of the second subsystem, and the time difference is corrected.

在一些实施例中，所述第二处理器用于：将包括所述UTC时间和所述第二子***的本地时间的数据集发送至所述第一子***。In some embodiments, the second processor is configured to: send a data set including the UTC time and the local time of the second subsystem to the first subsystem.

在一些实施例中，所述数据集中还包括所述UTC时间的索引，所述索引用于所述第一子***对所述数据集进行缓存，以及从所述缓存中读取对应的数据集。In some embodiments, the data set further includes an index of the UTC time, and the index is used by the first subsystem to cache the data set and read the corresponding data set from the cache .

在一些实施例中，所述数据集中还包括校验信息，所述校验信息用于所述第一子***对所述数据集的完整性进行校验。In some embodiments, the data set further includes verification information, and the verification information is used by the first subsystem to verify the integrity of the data set.

在一些实施例中，所述第一子***与所述第二子***通过硬件方式连接；和/或所述第二子***与所述卫星接收***通过硬件方式连接。In some embodiments, the first subsystem and the second subsystem are connected by hardware; and/or the second subsystem and the satellite receiving system are connected by hardware.

在一些实施例中，所述第一子***为Linux***，第二子***为RTOS***。In some embodiments, the first subsystem is a Linux system, and the second subsystem is an RTOS system.

在一些实施例中，所述第二处理器还用于：获取所述第二子***的计数器的第二计数值；基于所述第二计数值确定所述第二子***的本地时间。In some embodiments, the second processor is further configured to: obtain a second count value of a counter of the second subsystem; and determine the local time of the second subsystem based on the second count value.

图7示出了本说明书实施例所提供的一种更为具体的时钟同步装置的硬件结构示意图，该设备可以包括：处理器701、存储器702、输入/输出接口703、通信接口704和总线705。其中处理器701、存储器702、输入/输出接口703和通信接口704通过总线705实现彼此之间在设备内部的通信连接。在所述时钟同步装置用于执行上述应用于第一子***的方法时，所述处理器701为第一处理器，所述通信接口704为第一通信接口。在所述时钟同步装置用于执行上述应用于第二子***的方法时，所述处理器701为第二处理器，所述通信接口704为第二通信接口。FIG. 7 shows a schematic diagram of the hardware structure of a more specific clock synchronization apparatus provided by an embodiment of the present specification. The device may include: a processor 701 , a memory 702 , an input/output interface 703 , a communication interface 704 and a bus 705 . The processor 701 , the memory 702 , the input/output interface 703 and the communication interface 704 realize the communication connection among each other within the device through the bus 705 . When the clock synchronization apparatus is used to execute the above method applied to the first subsystem, the processor 701 is the first processor, and the communication interface 704 is the first communication interface. When the clock synchronization apparatus is used to execute the above method applied to the second subsystem, the processor 701 is a second processor, and the communication interface 704 is a second communication interface.

处理器701可以采用通用的CPU(Central Processing Unit，中央处理器)、微处理器、应用专用集成电路(Application Specific Integrated Circuit，ASIC)、或者一个或多个集成电路等方式实现，用于执行相关程序，以实现本说明书实施例所提供的技术方案。The processor 701 can be implemented by a general-purpose CPU (Central Processing Unit, central processing unit), a microprocessor, an application specific integrated circuit (Application Specific Integrated Circuit, ASIC), or one or more integrated circuits, etc. program to implement the technical solutions provided by the embodiments of this specification.

存储器702可以采用ROM(Read Only Memory，只读存储器)、RAM(Random Access Memory，随机存取存储器)、静态存储设备，动态存储设备等形式实现。存储器702可以存储操作***和其他应用程序，在通过软件或者固件来实现本说明书实施例所提供的技术方案时，相关的程序代码保存在存储器702中，并由处理器701来调用执行。The memory 702 can be implemented in the form of a ROM (Read Only Memory, read-only memory), a RAM (Random Access Memory, random access memory), a static storage device, a dynamic storage device, and the like. The memory 702 may store an operating system and other application programs. When implementing the technical solutions provided by the embodiments of this specification through software or firmware, the relevant program codes are stored in the memory 702 and invoked by the processor 701 for execution.

输入/输出接口703用于连接输入/输出模块，以实现信息输入及输出。输入输出/模块可以作为组件配置在设备中(图中未示出)，也可以外接于设备以提供相应功能。其中输入设备可以包括键盘、鼠标、触摸屏、麦克风、各类传感器等，输出设备可以包括显示器、扬声器、振动器、指示灯等。The input/output interface 703 is used to connect the input/output module to realize the input and output of information. The input/output/module can be configured in the device as a component (not shown in the figure), or can be externally connected to the device to provide corresponding functions. The input device may include a keyboard, a mouse, a touch screen, a microphone, various sensors, etc., and the output device may include a display, a speaker, a vibrator, an indicator light, and the like.

通信接口704用于连接通信模块(图中未示出)，以实现本设备与其他设备的通信交互。其中通信模块可以通过有线方式(例如USB、网线等)实现通信，也可以 通过无线方式(例如移动网络、WIFI、蓝牙等)实现通信。The communication interface 704 is used to connect a communication module (not shown in the figure), so as to realize the communication interaction between the device and other devices. The communication module may implement communication through wired means (such as USB, network cable, etc.), or may implement communication through wireless means (such as mobile network, WIFI, Bluetooth, etc.).

总线705包括一通路，在设备的各个组件(例如处理器701、存储器702、输入/输出接口703和通信接口704)之间传输信息。 Bus 705 includes a path to transfer information between the various components of the device (eg, processor 701, memory 702, input/output interface 703, and communication interface 704).

需要说明的是，尽管上述设备仅示出了处理器701、存储器702、输入/输出接口703、通信接口704以及总线705，但是在具体实施过程中，该设备还可以包括实现正常运行所必需的其他组件。此外，本领域的技术人员可以理解的是，上述设备中也可以仅包含实现本说明书实施例方案所必需的组件，而不必包含图中所示的全部组件。It should be noted that although the above-mentioned device only shows the processor 701, the memory 702, the input/output interface 703, the communication interface 704 and the bus 705, in the specific implementation process, the device may also include necessary components for normal operation. other components. In addition, those skilled in the art can understand that, the above-mentioned device may only include components necessary to implement the solutions of the embodiments of the present specification, rather than all the components shown in the figures.

如图8所示，本公开实施例还提供一种芯片***800，包括第一子***801和第二子***802；所述第二子***802用于接收卫星接收***发送的UTC时间，并将所述UTC时间和所述第二子***802的本地时间发送至所述芯片***中的第一子***801；所述第一子***801用于基于所述第一子***801的本地时间与所述第二子***802的本地时间之间的时间差，对所述第一子***801的本地时间与所述UTC时间进行时钟同步；其中，所述第二子***802获取所述UTC时间的时延小于所述第一子***801获取UTC时间的时延。As shown in FIG. 8, an embodiment of the present disclosure further provides a chip system 800, including a first subsystem 801 and a second subsystem 802; the second subsystem 802 is configured to receive the UTC time sent by the satellite receiving system, and Send the UTC time and the local time of the second subsystem 802 to the first subsystem 801 in the chip system; the first subsystem 801 is configured to be based on the local time of the first subsystem 801 The time difference between the local time of the second subsystem 802 and the local time of the first subsystem 801 is synchronized with the UTC time; wherein, the second subsystem 802 obtains the UTC time The delay is smaller than the delay for the first subsystem 801 to obtain the UTC time.

在一些实施例中，所述第一子***801用于：将所述第一子***的本地时间与所述UTC时间和所述时间差之和对应的时间进行时钟同步。In some embodiments, the first subsystem 801 is configured to: synchronize the local time of the first subsystem with the time corresponding to the sum of the UTC time and the time difference.

在一些实施例中，所述第一子***801还用于：获取所述第一子***801的时钟频率与所述第二子***802的时钟频率的频率差；基于所述频率差，对所述时间差进行修正。In some embodiments, the first subsystem 801 is further configured to: obtain a frequency difference between the clock frequency of the first subsystem 801 and the clock frequency of the second subsystem 802; The time difference is corrected.

在一些实施例中，所述第一子***801还用于：获取所述第一子***801的计数器的第一计数值；基于所述第一计数值确定所述第一子***801的本地时间。In some embodiments, the first subsystem 801 is further configured to: acquire a first count value of a counter of the first subsystem 801; determine the local count value of the first subsystem 801 based on the first count value time.

在一些实施例中，所述第二子***802还用于：获取所述第二子***802的计数器的第二计数值；基于所述第二计数值确定所述第二子***802的本地时间。In some embodiments, the second subsystem 802 is further configured to: obtain a second count value of the counter of the second subsystem 802; and determine the local count value of the second subsystem 802 based on the second count value time.

在一些实施例中，所述第二子***802用于：将包括所述UTC时间和所述第二子***802的本地时间的数据集发送至所述第一子***801。In some embodiments, the second subsystem 802 is configured to: send a data set including the UTC time and the local time of the second subsystem 802 to the first subsystem 801 .

在一些实施例中，所述数据集中还包括所述UTC时间的索引，所述第一子***801还用于：基于所述索引，对所述数据集进行缓存；以及基于所述索引，从所述缓存中读取对应的数据集。In some embodiments, the data set further includes an index of the UTC time, and the first subsystem 801 is further configured to: based on the index, cache the data set; and based on the index, from The corresponding data set is read from the cache.

在一些实施例中，所述第一子***801用于：从所述缓存中读取包括最大索引的数据集。In some embodiments, the first subsystem 801 is configured to: read the data set including the largest index from the cache.

在一些实施例中，所述第一子***801用于：在缓存空间已存满的情况下，将所述数据集缓存到目标地址下，所述目标地址用于缓存包括最小索引的数据集。In some embodiments, the first subsystem 801 is configured to: when the cache space is full, cache the data set to a target address, where the target address is used to cache the data set including the smallest index .

在一些实施例中，所述数据集中还包括校验信息；所述第一子***801用于：基于所述校验信息对所述数据集的完整性进行校验。In some embodiments, the data set further includes verification information; the first subsystem 801 is configured to: verify the integrity of the data set based on the verification information.

在一些实施例中，所述第一子***801与所述第二子***802通过硬件方式连接；和/或所述第二子***802与所述卫星接收***通过硬件方式连接。In some embodiments, the first subsystem 801 and the second subsystem 802 are connected through hardware; and/or the second subsystem 802 and the satellite receiving system are connected through hardware.

在一些实施例中，所述第一子***801为Linux***，第二子***802为RTOS***。In some embodiments, the first subsystem 801 is a Linux system, and the second subsystem 802 is an RTOS system.

本实施例中第一子***801的具体实施例详见上述应用于第一子***的方法实施例，本实施例中第二子***802的具体实施例详见上述应用于第二子***的方法实施例，此处不再赘述。For the specific embodiment of the first subsystem 801 in this embodiment, please refer to the above-mentioned method embodiment applied to the first subsystem, and for the specific embodiment of the second subsystem 802 in this embodiment, please refer to the above-mentioned method applied to the second subsystem. The method embodiments are not repeated here.

如图9所示，本公开实施例还提供一种无人机900，包括上述任一实施例所述的芯片***800，以及卫星接收***901，用于将UTC时间发送至所述芯片***中的第二子***。As shown in FIG. 9 , an embodiment of the present disclosure further provides an unmanned aerial vehicle 900, including the chip system 800 described in any of the above embodiments, and a satellite receiving system 901, configured to send UTC time to the chip system the second subsystem.

进一步地，所述无人机900还包括机体902和动力***903，所述芯片***800、卫星接收***901和动力***903均设于所述机体902内，且所述动力***903用于为所述无人机提供动力。所述芯片***800可包括在无人机900的飞行控制***中，用于控制无人机900飞行。Further, the UAV 900 further includes a body 902 and a power system 903, the chip system 800, the satellite receiving system 901 and the power system 903 are all arranged in the body 902, and the power system 903 is used for The drone provides power. The chip system 800 may be included in the flight control system of the drone 900 for controlling the flight of the drone 900 .

如图10所示，本公开实施例还提供一种终端1000，包括上述任一实施例所述的芯片***800，以及通信***1001，用于基于同步后的所述第一子***801的本地时间，控制无人机的状态。所述终端可以是手机、平板电脑等设备，也可以是无人机专用的遥控器等设备。芯片***800可以安装在终端1000中，终端1000可以基于芯片***800的时钟同步结果，通过通信***1001向无人机发送控制指令，以控制无人机飞行(例如，起飞、返航或者执行特定任务)。As shown in FIG. 10 , an embodiment of the present disclosure further provides a terminal 1000 , including the chip system 800 described in any of the foregoing embodiments, and a communication system 1001 for local time, control the state of the drone. The terminal may be a device such as a mobile phone, a tablet computer, or the like, or a device such as a remote controller dedicated to drones. The chip system 800 can be installed in the terminal 1000, and the terminal 1000 can send control instructions to the UAV through the communication system 1001 based on the clock synchronization result of the chip system 800 to control the UAV to fly (for example, take off, return to home, or perform a specific task). ).

本公开实施例还提供一种计算机可读存储介质，包括指令，当其在计算机上运行时，使得所述计算机执行前述任一实施例所述的方法。Embodiments of the present disclosure also provide a computer-readable storage medium, including instructions, which, when executed on a computer, cause the computer to perform the method described in any of the foregoing embodiments.

计算机可读介质包括永久性和非永久性、可移动和非可移动媒体可以由任何方法或技术来实现信息存储。信息可以是计算机可读指令、数据结构、程序的模块或其他数据。计算机的存储介质的例子包括，但不限于相变内存(PRAM)、静态随机存取存储器(SRAM)、动态随机存取存储器(DRAM)、其他类型的随机存取存储器(RAM)、只读存储器(ROM)、电可擦除可编程只读存储器(EEPROM)、快闪记忆体或其他内存技术、只读光盘只读存储器(CD-ROM)、数字多功能光盘(DVD)或其他光学存储、磁盒式磁带，磁带磁磁盘存储或其他磁性存储设备或任何其他非传输介质，可用于存储可以被计算设备访问的信息。按照本文中的界定，计算机可读介质不包括暂存电脑可读媒体(transitory media)，如调制的数据信号和载波。Computer-readable media includes both persistent and non-permanent, removable and non-removable media, and storage of information may be implemented by any method or technology. Information may be computer readable instructions, data structures, modules of programs, or other data. Examples of computer storage media include, but are not limited to, phase-change memory (PRAM), static random access memory (SRAM), dynamic random access memory (DRAM), other types of random access memory (RAM), read only memory (ROM), Electrically Erasable Programmable Read Only Memory (EEPROM), Flash Memory or other memory technology, Compact Disc Read Only Memory (CD-ROM), Digital Versatile Disc (DVD) or other optical storage, Magnetic tape cassettes, magnetic tape magnetic disk storage or other magnetic storage devices or any other non-transmission medium that can be used to store information that can be accessed by a computing device. As defined herein, computer-readable media does not include transitory computer-readable media, such as modulated data signals and carrier waves.

通过以上的实施方式的描述可知，本领域的技术人员可以清楚地了解到本说明书实施例可借助软件加必需的通用硬件平台的方式来实现。基于这样的理解，本说明书实施例的技术方案本质上或者说对现有技术做出贡献的部分可以以软件产品的形式体现出来，该计算机软件产品可以存储在存储介质中，如ROM/RAM、磁碟、光盘等，包括若干指令用以使得一台计算机设备(可以是个人计算机，服务器，或者网络设备等)执行本说明书实施例各个实施例或者实施例的某些部分所述的方法。From the description of the above embodiments, those skilled in the art can clearly understand that the embodiments of the present specification can be implemented by means of software plus a necessary general hardware platform. Based on this understanding, the technical solutions of the embodiments of this specification or the parts that make contributions to the prior art may be embodied in the form of software products, and the computer software products may be stored in storage media, such as ROM/RAM, A magnetic disk, an optical disk, etc., includes several instructions for causing a computer device (which may be a personal computer, a server, or a network device, etc.) to execute the methods described in various embodiments or some parts of the embodiments in this specification.

上述实施例阐明的***、装置、模块或单元，具体可以由计算机芯片或实体实现，或者由具有某种功能的产品来实现。一种典型的实现设备为计算机，计算机的具体形式可以是个人计算机、膝上型计算机、蜂窝电话、相机电话、智能电话、个人数字助理、媒体播放器、导航设备、电子邮件收发设备、游戏控制台、平板计算机、可穿戴设备或者这些设备中的任意几种设备的组合。The systems, devices, modules or units described in the above embodiments may be specifically implemented by computer chips or entities, or by products with certain functions. A typical implementation device is a computer, which may be in the form of a personal computer, laptop computer, cellular phone, camera phone, smart phone, personal digital assistant, media player, navigation device, e-mail device, game control desktop, tablet, wearable device, or a combination of any of these devices.

以上实施例中的各种技术特征可以任意进行组合，只要特征之间的组合不存在冲突或矛盾，但是限于篇幅，未进行一一描述，因此上述实施方式中的各种技术特征的任意进行组合也属于本公开的范围。Various technical features in the above embodiments can be combined arbitrarily, as long as there is no conflict or contradiction between the combinations of features, but due to space limitations, they are not described one by one, so the various technical features in the above embodiments can be combined arbitrarily It is also within the scope of this disclosure.

本领域技术人员在考虑公开及实践这里公开的说明书后，将容易想到本公开的其它实施方案。本公开旨在涵盖本公开的任何变型、用途或者适应性变化，这些变型、用途或者适应性变化遵循本公开的一般性原理并包括本公开未公开的本技术领域中的公知常识或惯用技术手段。说明书和实施例仅被视为示例性的，本公开的真正范围和精神由下面的权利要求指出。Other embodiments of the present disclosure will readily occur to those skilled in the art upon consideration of the disclosure and practice of the specification disclosed herein. This disclosure is intended to cover any variations, uses, or adaptations of this disclosure that follow the general principles of this disclosure and include common general knowledge or techniques in the technical field not disclosed by this disclosure . The specification and examples are to be regarded as exemplary only, with the true scope and spirit of the disclosure being indicated by the following claims.

应当理解的是，本公开并不局限于上面已经描述并在附图中示出的精确结构， 并且可以在不脱离其范围进行各种修改和改变。本公开的范围仅由所附的权利要求来限制。It is to be understood that the present disclosure is not limited to the precise structures described above and illustrated in the accompanying drawings, and that various modifications and changes may be made without departing from the scope thereof. The scope of the present disclosure is limited only by the appended claims.

以上所述仅为本公开的较佳实施例而已，并不用以限制本公开，凡在本公开的精神和原则之内，所做的任何修改、等同替换、改进等，均应包含在本公开保护的范围之内。The above descriptions are only preferred embodiments of the present disclosure, and are not intended to limit the present disclosure. Any modifications, equivalent replacements, improvements, etc. made within the spirit and principles of the present disclosure shall be included in the present disclosure. within the scope of protection.

Claims (53)

1. 一种时钟同步方法，其特征在于，应用于芯片***中的第一子***，所述方法包括：A clock synchronization method, characterized in that it is applied to a first subsystem in a chip system, the method comprising:

   接收所述芯片***中第二子***发送的UTC时间和所述第二子***的本地时间；receiving the UTC time sent by the second subsystem in the chip system and the local time of the second subsystem;

   基于所述第一子***的本地时间与所述第二子***的本地时间之间的时间差，对所述第一子***的本地时间与所述UTC时间进行时钟同步；clock synchronization between the local time of the first subsystem and the UTC time based on the time difference between the local time of the first subsystem and the local time of the second subsystem;

   其中，所述第二子***获取所述UTC时间的时延小于所述第一子***获取UTC时间的时延。Wherein, the delay of acquiring the UTC time by the second subsystem is smaller than the delay of acquiring the UTC time by the first subsystem.
2. 根据权利要求1所述的方法，其特征在于，所述基于所述第一子***的本地时间与所述第二子***的本地时间之间的时间差，对所述第一子***的本地时间与所述UTC时间进行时钟同步，包括：The method according to claim 1, wherein the local time of the first subsystem is determined based on a time difference between the local time of the first subsystem and the local time of the second subsystem. Clock synchronization with the UTC time, including:

   将所述第一子***的本地时间与所述UTC时间和所述时间差之和对应的时间进行时钟同步。Clock synchronization is performed between the local time of the first subsystem and the time corresponding to the sum of the UTC time and the time difference.
3. 根据权利要求1所述的方法，其特征在于，所述方法还包括：The method according to claim 1, wherein the method further comprises:

   获取所述第一子***的时钟频率与所述第二子***的时钟频率的频率差；obtaining the frequency difference between the clock frequency of the first subsystem and the clock frequency of the second subsystem;

   基于所述频率差，对所述时间差进行修正。Based on the frequency difference, the time difference is corrected.
4. 根据权利要求1所述的方法，其特征在于，所述方法还包括：The method according to claim 1, wherein the method further comprises:

   获取所述第一子***的计数器的第一计数值；obtaining the first count value of the counter of the first subsystem;

   基于所述第一计数值确定所述第一子***的本地时间。The local time of the first subsystem is determined based on the first count value.
5. 根据权利要求1所述的方法，其特征在于，所述接收所述芯片***中第二子***发送的UTC时间和所述第二子***的本地时间，包括：The method according to claim 1, wherein the receiving the UTC time sent by the second subsystem in the chip system and the local time of the second subsystem comprises:

   接收所述第二子***发送的数据集，所述数据集中包括所述UTC时间和所述第二子***的本地时间。A data set sent by the second subsystem is received, and the data set includes the UTC time and the local time of the second subsystem.
6. 根据权利要求5所述的方法，其特征在于，所述数据集中还包括所述UTC时间的索引，所述方法还包括：The method according to claim 5, wherein the data set further includes an index of the UTC time, the method further comprising:

   基于所述索引，对所述数据集进行缓存；以及caching the dataset based on the index; and

   基于所述索引，从所述缓存中读取对应的数据集。Based on the index, the corresponding dataset is read from the cache.
7. 根据权利要求6所述的方法，其特征在于，所述基于所述索引，从所述缓存中读取对应的数据集，包括：The method according to claim 6, wherein the reading the corresponding data set from the cache based on the index comprises:

   从所述缓存中读取包括最大索引的数据集。The dataset including the largest index is read from the cache.
8. 根据权利要求6所述的方法，其特征在于，所述基于所述索引，对所述数据集进行缓存，包括：The method according to claim 6, wherein the caching of the data set based on the index comprises:

   在缓存空间已存满的情况下，将所述数据集缓存到目标地址下，所述目标地址用于缓存包括最小索引的数据集。When the cache space is full, the data set is cached under a target address, where the target address is used to cache the data set including the smallest index.
9. 根据权利要求6所述的方法，其特征在于，所述数据集中还包括校验信息；所述方法还包括：The method according to claim 6, wherein the data set further includes verification information; the method further comprises:

   基于所述校验信息对所述数据集的完整性进行校验。The integrity of the data set is verified based on the verification information.
10. 根据权利要求1所述的方法，其特征在于，所述第一子***与所述第二子***通过硬件方式连接。The method according to claim 1, wherein the first subsystem and the second subsystem are connected by means of hardware.
11. 根据权利要求1所述的方法，其特征在于，所述第一子***为Linux***，第二子***为RTOS***。The method according to claim 1, wherein the first subsystem is a Linux system, and the second subsystem is an RTOS system.
12. 一种时钟同步方法，其特征在于，应用于芯片***中的第二子***，所述方法包括：A clock synchronization method, characterized in that it is applied to a second subsystem in a chip system, the method comprising:

    接收卫星接收***发送的UTC时间；Receive the UTC time sent by the satellite receiving system;

    将所述UTC时间和所述第二子***的本地时间发送至所述芯片***中的第一子***，以使所述第一子***基于所述第一子***的本地时间与所述第二子***的本地时间之间的时间差，对所述第一子***的本地时间与所述UTC时间进行时钟同步；Send the UTC time and the local time of the second subsystem to the first subsystem in the chip system, so that the first subsystem and the first subsystem are based on the local time of the first subsystem and the first subsystem. The time difference between the local times of the two subsystems, the clock synchronization is performed on the local time of the first subsystem and the UTC time;

    其中，所述第二子***获取所述UTC时间的时延小于所述第一子***获取UTC时间的时延。Wherein, the delay of acquiring the UTC time by the second subsystem is smaller than the delay of acquiring the UTC time by the first subsystem.
13. 根据权利要求12所述的方法，其特征在于，所述方法还包括：The method of claim 12, wherein the method further comprises:

    将所述第二子***的时钟频率发送至所述第一子***，以使所述第一子***基于所述第一子***的时钟频率与所述第二子***的时钟频率的频率差，对所述时间差进行修正。sending the clock frequency of the second subsystem to the first subsystem such that the first subsystem is based on a frequency difference between the clock frequency of the first subsystem and the clock frequency of the second subsystem , to correct the time difference.
14. 根据权利要求12所述的方法，其特征在于，所述将所述UTC时间和所述第二子***的本地时间发送至所述芯片***中的第一子***，包括：The method according to claim 12, wherein the sending the UTC time and the local time of the second subsystem to the first subsystem in the chip system comprises:

    将包括所述UTC时间和所述第二子***的本地时间的数据集发送至所述第一子***。A data set including the UTC time and the local time of the second subsystem is sent to the first subsystem.
15. 根据权利要求14所述的方法，其特征在于，所述数据集中还包括所述UTC时间的索引，所述索引用于所述第一子***对所述数据集进行缓存，以及从所述缓存中读取对应的数据集。The method according to claim 14, wherein the data set further includes an index of the UTC time, and the index is used for the first subsystem to cache the data set and to retrieve the data from the cache. Read the corresponding dataset from .
16. 根据权利要求14所述的方法，其特征在于，所述数据集中还包括校验信息， 所述校验信息用于所述第一子***对所述数据集的完整性进行校验。The method according to claim 14, wherein the data set further includes verification information, and the verification information is used by the first subsystem to verify the integrity of the data set.
17. 根据权利要求12所述的方法，其特征在于，所述第一子***与所述第二子***通过硬件方式连接；和/或The method according to claim 12, wherein the first subsystem and the second subsystem are connected by hardware; and/or

    所述第二子***与所述卫星接收***通过硬件方式连接。The second subsystem is connected with the satellite receiving system through hardware.
18. 根据权利要求12所述的方法，其特征在于，所述第一子***为Linux***，第二子***为RTOS***。The method according to claim 12, wherein the first subsystem is a Linux system, and the second subsystem is an RTOS system.
19. 根据权利要求12所述的方法，其特征在于，所述方法还包括：The method of claim 12, wherein the method further comprises:

    获取所述第二子***的计数器的第二计数值；obtaining the second count value of the counter of the second subsystem;

    基于所述第二计数值确定所述第二子***的本地时间。The local time of the second subsystem is determined based on the second count value.
20. 一种时钟同步装置，其特征在于，包括第一处理器和第一通信接口，A clock synchronization device, characterized in that it comprises a first processor and a first communication interface,

    所述第一通信接口用于接收芯片***中第二子***发送的UTC时间和所述第二子***的本地时间；The first communication interface is used to receive the UTC time sent by the second subsystem in the chip system and the local time of the second subsystem;

    所述第一处理器用于基于所述第一子***的本地时间与所述第二子***的本地时间之间的时间差，对所述第一子***的本地时间与所述UTC时间进行时钟同步；The first processor is configured to perform clock synchronization between the local time of the first subsystem and the UTC time based on the time difference between the local time of the first subsystem and the local time of the second subsystem ;

    其中，所述第二子***获取所述UTC时间的时延小于所述第一子***获取UTC时间的时延。Wherein, the delay of acquiring the UTC time by the second subsystem is smaller than the delay of acquiring the UTC time by the first subsystem.
21. 根据权利要求20所述的装置，其特征在于，所述第一处理器用于：The apparatus of claim 20, wherein the first processor is configured to:

    将所述第一子***的本地时间与所述UTC时间和所述时间差之和对应的时间进行时钟同步。Clock synchronization is performed between the local time of the first subsystem and the time corresponding to the sum of the UTC time and the time difference.
22. 根据权利要求20所述的装置，其特征在于，所述第一处理器还用于：The apparatus of claim 20, wherein the first processor is further configured to:

    获取所述第一子***的时钟频率与所述第二子***的时钟频率的频率差；obtaining the frequency difference between the clock frequency of the first subsystem and the clock frequency of the second subsystem;

    基于所述频率差，对所述时间差进行修正。Based on the frequency difference, the time difference is corrected.
23. 根据权利要求20所述的装置，其特征在于，所述第一处理器还用于：The apparatus of claim 20, wherein the first processor is further configured to:

    获取所述第一子***的计数器的第一计数值；obtaining the first count value of the counter of the first subsystem;

    基于所述第一计数值确定所述第一子***的本地时间。The local time of the first subsystem is determined based on the first count value.
24. 根据权利要求20所述的装置，其特征在于，所述第一通信接口用于：The apparatus according to claim 20, wherein the first communication interface is used for:

    接收所述第二子***发送的数据集，所述数据集中包括所述UTC时间和所述第二子***的本地时间。A data set sent by the second subsystem is received, and the data set includes the UTC time and the local time of the second subsystem.
25. 根据权利要求24所述的装置，其特征在于，所述数据集中还包括所述UTC时间的索引，所述第一处理器还用于：The apparatus according to claim 24, wherein the data set further includes an index of the UTC time, and the first processor is further configured to:

    基于所述索引，对所述数据集进行缓存；以及caching the dataset based on the index; and

    基于所述索引，从所述缓存中读取对应的数据集。Based on the index, the corresponding dataset is read from the cache.
26. 根据权利要求25所述的装置，其特征在于，所述第一处理器用于：The apparatus of claim 25, wherein the first processor is configured to:

    从所述缓存中读取包括最大索引的数据集。The dataset including the largest index is read from the cache.
27. 根据权利要求25所述的装置，其特征在于，所述第一处理器用于：The apparatus of claim 25, wherein the first processor is configured to:

    在缓存空间已存满的情况下，将所述数据集缓存到目标地址下，所述目标地址用于缓存包括最小索引的数据集。When the cache space is full, the data set is cached under a target address, where the target address is used to cache the data set including the smallest index.
28. 根据权利要求25所述的装置，其特征在于，所述数据集中还包括校验信息；所述第一处理器还用于：The apparatus according to claim 25, wherein the data set further includes verification information; the first processor is further configured to:

    基于所述校验信息对所述数据集的完整性进行校验。The integrity of the data set is verified based on the verification information.
29. 根据权利要求20所述的装置，其特征在于，所述第一子***与所述第二子***通过硬件方式连接。The apparatus according to claim 20, wherein the first subsystem and the second subsystem are connected by means of hardware.
30. 根据权利要求20所述的装置，其特征在于，所述第一子***为Linux***，第二子***为RTOS***。The apparatus according to claim 20, wherein the first subsystem is a Linux system, and the second subsystem is an RTOS system.
31. 一种时钟同步装置，其特征在于，包括第二处理器和第二通信接口，A clock synchronization device, characterized in that it comprises a second processor and a second communication interface,

    所述第二通信接口用于接收卫星接收***发送的UTC时间；The second communication interface is used to receive the UTC time sent by the satellite receiving system;

    所述第二处理器用于将所述UTC时间和所述第二子***的本地时间发送至所述芯片***中的第一子***，以使所述第一子***基于所述第一子***的本地时间与所述第二子***的本地时间之间的时间差，对所述第一子***的本地时间与所述UTC时间进行时钟同步；the second processor is configured to send the UTC time and the local time of the second subsystem to the first subsystem in the chip system, so that the first subsystem is based on the first subsystem The time difference between the local time of the second subsystem and the local time of the second subsystem, the local time of the first subsystem and the UTC time are clocked;

    其中，所述第二子***获取所述UTC时间的时延小于所述第一子***获取UTC时间的时延。Wherein, the delay of acquiring the UTC time by the second subsystem is smaller than the delay of acquiring the UTC time by the first subsystem.
32. 根据权利要求31所述的装置，其特征在于，所述第二处理器还用于：The apparatus of claim 31, wherein the second processor is further configured to:

    将所述第二子***的时钟频率发送至所述第一子***，以使所述第一子***基于所述第一子***的时钟频率与所述第二子***的时钟频率的频率差，对所述时间差进行修正。sending the clock frequency of the second subsystem to the first subsystem such that the first subsystem is based on a frequency difference between the clock frequency of the first subsystem and the clock frequency of the second subsystem , to correct the time difference.
33. 根据权利要求31所述的装置，其特征在于，所述第二处理器用于：The apparatus of claim 31, wherein the second processor is configured to:

    将包括所述UTC时间和所述第二子***的本地时间的数据集发送至所述第一子***。A data set including the UTC time and the local time of the second subsystem is sent to the first subsystem.
34. 根据权利要求33所述的装置，其特征在于，所述数据集中还包括所述UTC时间的索引，所述索引用于所述第一子***对所述数据集进行缓存，以及从所述缓存中读取对应的数据集。The apparatus according to claim 33, wherein the data set further includes an index of the UTC time, and the index is used for the first subsystem to cache the data set and to retrieve the data from the cache. Read the corresponding dataset from .
35. 根据权利要求33所述的装置，其特征在于，所述数据集中还包括校验信息，所述校验信息用于所述第一子***对所述数据集的完整性进行校验。The apparatus according to claim 33, wherein the data set further includes check information, and the check information is used for the first subsystem to check the integrity of the data set.
36. 根据权利要求31所述的装置，其特征在于，所述第一子***与所述第二子***通过硬件方式连接；和/或The apparatus according to claim 31, wherein the first subsystem and the second subsystem are connected by hardware; and/or

    所述第二子***与所述卫星接收***通过硬件方式连接。The second subsystem is connected with the satellite receiving system through hardware.
37. 根据权利要求31所述的装置，其特征在于，所述第一子***为Linux***，第二子***为RTOS***。The apparatus according to claim 31, wherein the first subsystem is a Linux system, and the second subsystem is an RTOS system.
38. 根据权利要求31所述的装置，其特征在于，所述第二处理器还用于：The apparatus of claim 31, wherein the second processor is further configured to:

    获取所述第二子***的计数器的第二计数值；obtaining the second count value of the counter of the second subsystem;

    基于所述第二计数值确定所述第二子***的本地时间。The local time of the second subsystem is determined based on the second count value.
39. 一种芯片***，其特征在于，包括：A chip system, characterized in that it includes:

    第一子***和第二子***；a first subsystem and a second subsystem;

    所述第二子***用于接收卫星接收***发送的UTC时间，并将所述UTC时间和所述第二子***的本地时间发送至所述芯片***中的第一子***；The second subsystem is configured to receive the UTC time sent by the satellite receiving system, and send the UTC time and the local time of the second subsystem to the first subsystem in the chip system;

    所述第一子***用于基于所述第一子***的本地时间与所述第二子***的本地时间之间的时间差，对所述第一子***的本地时间与所述UTC时间进行时钟同步；The first subsystem is configured to clock the local time of the first subsystem and the UTC time based on the time difference between the local time of the first subsystem and the local time of the second subsystem. Synchronize;

    其中，所述第二子***获取所述UTC时间的时延小于所述第一子***获取UTC时间的时延。Wherein, the delay of acquiring the UTC time by the second subsystem is smaller than the delay of acquiring the UTC time by the first subsystem.
40. 根据权利要求39所述的芯片***，其特征在于，所述第一子***用于：The chip system according to claim 39, wherein the first subsystem is used for:

    将所述第一子***的本地时间与所述UTC时间和所述时间差之和对应的时间进行时钟同步。Clock synchronization is performed between the local time of the first subsystem and the time corresponding to the sum of the UTC time and the time difference.
41. 根据权利要求39所述的芯片***，其特征在于，所述第一子***还用于：The chip system according to claim 39, wherein the first subsystem is further configured to:

    获取所述第一子***的时钟频率与所述第二子***的时钟频率的频率差；obtaining the frequency difference between the clock frequency of the first subsystem and the clock frequency of the second subsystem;

    基于所述频率差，对所述时间差进行修正。Based on the frequency difference, the time difference is corrected.
42. 根据权利要求39所述的芯片***，其特征在于，所述第一子***还用于：The chip system according to claim 39, wherein the first subsystem is further configured to:

    获取所述第一子***的计数器的第一计数值；obtaining the first count value of the counter of the first subsystem;

    基于所述第一计数值确定所述第一子***的本地时间。The local time of the first subsystem is determined based on the first count value.
43. 根据权利要求39所述的芯片***，其特征在于，所述第二子***还用于：The chip system according to claim 39, wherein the second subsystem is further configured to:

    获取所述第二子***的计数器的第二计数值；obtaining the second count value of the counter of the second subsystem;

    基于所述第二计数值确定所述第二子***的本地时间。The local time of the second subsystem is determined based on the second count value.
44. 根据权利要求39所述的芯片***，其特征在于，所述第二子***用于：The chip system according to claim 39, wherein the second subsystem is used for:

    将包括所述UTC时间和所述第二子***的本地时间的数据集发送至所述第一子***。A data set including the UTC time and the local time of the second subsystem is sent to the first subsystem.
45. 根据权利要求44所述的芯片***，其特征在于，所述数据集中还包括所述UTC时间的索引，所述第一子***还用于：The chip system according to claim 44, wherein the data set further includes an index of the UTC time, and the first subsystem is further configured to:

    基于所述索引，对所述数据集进行缓存；以及caching the dataset based on the index; and

    基于所述索引，从所述缓存中读取对应的数据集。Based on the index, the corresponding dataset is read from the cache.
46. 根据权利要求45所述的芯片***，其特征在于，所述第一子***用于：The chip system according to claim 45, wherein the first subsystem is used for:

    从所述缓存中读取包括最大索引的数据集。The dataset including the largest index is read from the cache.
47. 根据权利要求45所述的芯片***，其特征在于，所述第一子***用于：The chip system according to claim 45, wherein the first subsystem is used for:

    在缓存空间已存满的情况下，将所述数据集缓存到目标地址下，所述目标地址用于缓存包括最小索引的数据集。When the cache space is full, the data set is cached under a target address, where the target address is used to cache the data set including the smallest index.
48. 根据权利要求45所述的芯片***，其特征在于，所述数据集中还包括校验信息；所述第一子***用于：The chip system according to claim 45, wherein the data set further includes verification information; the first subsystem is used for:

    基于所述校验信息对所述数据集的完整性进行校验。The integrity of the data set is verified based on the verification information.
49. 根据权利要求39所述的芯片***，其特征在于，所述第一子***与所述第二子***通过硬件方式连接；和/或The chip system according to claim 39, wherein the first subsystem and the second subsystem are connected by hardware; and/or

    所述第二子***与所述卫星接收***通过硬件方式连接。The second subsystem is connected with the satellite receiving system through hardware.
50. 根据权利要求39所述的芯片***，其特征在于，所述第一子***为Linux***，第二子***为RTOS***。The chip system according to claim 39, wherein the first subsystem is a Linux system, and the second subsystem is an RTOS system.
51. 一种无人机，其特征在于，包括：An unmanned aerial vehicle, characterized in that it includes:

    权利要求39至50任意一项所述的芯片***；以及The system-on-a-chip of any one of claims 39 to 50; and

    卫星接收***，用于将UTC时间发送至所述芯片***中的第二子***。The satellite receiving system is used for sending the UTC time to the second subsystem in the chip system.
52. 一种终端，其特征在于，包括：A terminal, characterized in that it includes:

    权利要求39至50任意一项所述的芯片***；以及The system-on-a-chip of any one of claims 39 to 50; and

    通信***，用于基于同步后的所述第一子***的本地时间，控制无人机进行飞行。The communication system is used for controlling the UAV to fly based on the synchronized local time of the first subsystem.
53. 一种计算机可读存储介质，其特征在于，包括指令，当其在计算机上运行时，使得所述计算机执行如权利要求1至19任意一项所述的方法。A computer-readable storage medium, characterized by comprising instructions that, when executed on a computer, cause the computer to perform the method of any one of claims 1 to 19.

Images