WO2022032462A1 - Sensor circuit, pixel circuit, and method for controlling pixel circuit - Google Patents
Sensor circuit, pixel circuit, and method for controlling pixel circuit Download PDFInfo
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- WO2022032462A1 WO2022032462A1 PCT/CN2020/108321 CN2020108321W WO2022032462A1 WO 2022032462 A1 WO2022032462 A1 WO 2022032462A1 CN 2020108321 W CN2020108321 W CN 2020108321W WO 2022032462 A1 WO2022032462 A1 WO 2022032462A1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
- H01L27/144—Devices controlled by radiation
- H01L27/146—Imager structures
- H01L27/14601—Structural or functional details thereof
- H01L27/14609—Pixel-elements with integrated switching, control, storage or amplification elements
- H01L27/14612—Pixel-elements with integrated switching, control, storage or amplification elements involving a transistor
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N25/00—Circuitry of solid-state image sensors [SSIS]; Control thereof
- H04N25/47—Image sensors with pixel address output; Event-driven image sensors; Selection of pixels to be read out based on image data
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N25/00—Circuitry of solid-state image sensors [SSIS]; Control thereof
- H04N25/70—SSIS architectures; Circuits associated therewith
- H04N25/76—Addressed sensors, e.g. MOS or CMOS sensors
- H04N25/77—Pixel circuitry, e.g. memories, A/D converters, pixel amplifiers, shared circuits or shared components
Definitions
- the present disclosure relates to a sensor circuit, a pixel circuit, and a method for controlling the pixel circuit, and more particularly, a sensor circuit having a logarithmic-conversion output, a pixel circuit functioning as an event sensor, and a method for controlling the pixel circuit.
- An event based sensor also referred to a Dynamic Vision Sensor (DVS)
- the event based sensor is a sensor which captures a luminance change in each pixel as an “event” , and outputs information thereof, and having advantages in low latency, low power consumption, and a high dynamic range.
- a detection characteristic is required in characteristic point extraction for the Simultaneous Localization and Mapping (SLAM) technology which is applied to robots that autonomously travel.
- SLAM Simultaneous Localization and Mapping
- the detection characteristic is required for such as detecting a high-speed moving object for high-speed images, reconstructing of high-resolution images, compensating for a motion blur, and interpolating a frame.
- response-waiting time of the event sensor is depending on the luminance, the time accuracy of the event detection deteriorates as the luminance reduces
- An object in the present disclosure is to provide a sensor circuit and a pixel circuit which can reduce a response time of an event sensor, and reduce false detection of the event sensor.
- a first embodiment of the present disclosure provides a sensor circuit having a connection point between a source terminal of a MOS transistor and a light receiving element, and a first inverted amplifier having an input connected to the connection point for outputting a voltage depending on a logarithm of a photocurrent of the light receiving element, wherein an output of the first inverted amplifier is connected to a gate terminal of the MOS transistor and the gate terminal is adjusted to a voltage depending on the logarithm of the photocurrent.
- the sensor circuit further includes a second inverted amplifier having an input connected to the output of the first inverted amplifier, and an output connected to the connection point via a capacitance.
- using an existing inverted amplifier can form negative capacitance while suppressing the expansion of a circuit scale.
- a second embodiment of the present disclosure provides a sensor circuit having a connection point between a source terminal of a MOS transistor and a light receiving element, and an amplifier having an input connected to the connection point for outputting a voltage depending on a logarithm of a photocurrent of the light receiving element, wherein an output of the amplifier is connected to a gate terminal of the MOS transistor and the gate terminal is adjusted to a voltage depending on the logarithm of the photocurrent, wherein the amplifier is a differential amplifier, and has an inverted input terminal connected to the connection point, a non-inverted output terminal connected to the gate terminal and an inverted output terminal connected to the connection point via a capacitance.
- a third embodiment of the present disclosure provides a pixel circuit including; a sensor circuit having a connection point between a source terminal of a MOS transistor and a light receiving element, and a first inverted amplifier having an input connected to the connection point for outputting a voltage depending on a logarithm of a photocurrent of the light receiving element, wherein an output of the first inverted amplifier is connected to a gate terminal of the MOS transistor and the gate terminal is adjusted to a voltage depending on the logarithm of the photocurrent; and a second inverted amplifier connected to an output of the sensor circuit and for working as a sample-and-hold circuit to hold an input voltage and amplifies an amount of change of the output of the sensor circuit.
- the pixel circuit further includes a capacitance inserted between an output of the second inverted amplifier and the connection point.
- a negative capacitance generation circuit may be configured of without adding a non-inverted amplifier.
- a buffer amplifier can be inserted in front of the second inverted amplifier.
- the buffer amplifier can, for instance, adjust a signal band and an operating point.
- a fourth embodiment of the present disclosure provides a method for controlling a pixel circuit including; a sensor circuit having a connection point between a source terminal of a MOS transistor and a light receiving element, and a first inverted amplifier having an input connected to the connection point for outputting a voltage depending on a logarithm of a photocurrent of the light receiving element, wherein an output of the first inverted amplifier is connected to a gate terminal of the MOS transistor and the gate terminal is adjusted to a voltage depending on the logarithm of the photocurrent; and a second inverted amplifier connected to an output of the sensor circuit and for working as a sample-and-hold circuit to hold an input voltage and amplifies an amount of change of the output of the sensor circuit, the method executed by an initial procedure circuit of the pixel circuit including the step of: in a case where difference between the output of the sensor circuit and a hold value of the sample-and-hold circuit exceeds a given threshold voltage, sensing a reset signal for resetting the hold value of the sample-and-hold circuit and sending
- a kickback voltage at the reset is small, thus the input of the photocurrent will not be affected.
- Fig. 1A is a diagram illustrating a conventional sensor circuit having a logarithmic-conversion output
- FIG. 1B is a diagram illustrating a conventional sensor circuit having a logarithmic-conversion output
- Fig. 2 is a diagram illustrating a pixel circuit according to the first embodiment in the present disclosure
- FIG. 3A is a diagram illustrating an operation sequence of a conventional pixel circuit
- Fig. 3B is a diagram illustrating an operation sequence of the pixel circuit in the first embodiment
- Fig. 4 is a pattern diagram illustrating a pixel circuit according to a second embodiment in the present disclosure
- Fig. 5 is a diagram illustrating a modification of the pixel circuit according to the second embodiment
- Fig. 6A is a diagram illustrating an inverted amplifier of the pixel circuit according to the second embodiment
- Fig. 6B is a diagram illustrating a differential amplifier of the pixel circuit according to the second embodiment
- Fig. 7 is a diagram illustrating a pixel circuit according to a third embodiment in the present disclosure.
- Fig. 8A is a diagram illustrating a capacitance structure of a negative capacitance generation circuit according to a fourth embodiment in the present disclosure
- Fig. 8B is a diagram illustrating another structure of the capacitance of the negative capacitance generation circuit according to the fourth embodiment.
- Fig. 9 is a diagram illustrating a variable capacitance structure of the negative capacitance generation circuit according to the fourth embodiment.
- Fig. 1A illustrates a conventional sensor circuit having a logarithmic-conversion output.
- a source terminal of a MOS transistor Tr is connected to a cathode terminal of a photodiode PD, which is a light receiving element.
- the connection point is a logarithmic-conversion output LOG-OUT which provides an output depending on the logarithm of a photocurrent.
- the gate-source voltage V gs is logarithmically proportional to the photocurrent as follows.
- I ph is a drain current corresponding to the photocurrent
- I 0 is a saturation current
- V th is a threshold voltage
- kT/q is a thermal voltage
- n is a constant determined by a structure of the MOS transistor.
- the photodiode PD and the MOS transistor Tr are configured of a source follower biased by the photocurrent flowing through the photodiode PD, response time of the sensor circuit is dominated in settling time of the source follower, and depends on the photocurrent.
- the settling time of the source follower is determined by parasitic capacitance (C g ) between the gate and source of the MOS transistor Tr, and parasitic capacitance (C P ) of the photodiode PD as a load.
- the feedback control amplifier 11 is an inverted amplifier that receives the logarithmic-conversion output as a photocurrent input, and applies a feedback control to the gate terminal of the MOS transistor Tr. Where gain of the amplifier 11 is -A, voltage amplitude of the photodiode PD is suppressed by 1/ (1+A) , so that the effective load capacitance is also suppressed to 1/ (1+A) .
- NCG Negative Capacitance Generator
- the effective load capacitance can be reduced by connecting the NCG to the logarithmic-conversion output (photocurrent input) of the pixel circuit. Such a method can shorten the settling time of the source follower.
- the former feedback control has a limit in reducing the effective load capacitance for the following reason.
- the gain is limited to about 50 times.
- the parasitic capacitance (C g ) of the gate terminal of the MOS transistor Tr cannot be substantially reduced.
- a slew rate of the source follower limits a voltage change in the photodiode PD. Thus, there is a limit to shorten the response time of an event sensor.
- a new NCG is implemented in the pixel circuit.
- Fig. 2 illustrates a pixel circuit according to a first embodiment in the present disclosure.
- a source terminal of a MOS transistor Tr is connected to a cathode terminal of a photodiode PD, which is a light receiving element.
- the connection point is as a logarithmic-conversion output LOG-OUT that provides an output depending on the logarithm of a photocurrent of a light receiving element.
- the amplifier 21 having an input connected to the connection point, outputs a voltage (V log ) depending on the logarithm of the photocurrent which varies based on the incident light intensity into the photodiode PD. Also, an output of the amplifier 21 is connected to a gate terminal of the MOS transistor Tr, and the gate terminal is adjusted to a voltage depending on the logarithm of the photocurrent.
- An inverted amplifier including capacitances C1, C2 and an amplifier 22 is connected to the output of the sensor circuit.
- a switch SW which short-circuits an input and an output is connected to the amplifier 22, and operates as a sample-and-hold circuit with the capacitance C1 to sample the output of the sensor circuit.
- One sampling period starts at the timing that the switch SW has been turned off.
- the amplifier 22 amplifies and outputs an amount of change of the output of the sensor circuit. That is, an input at the timing that the switch SW has been turned off is the reference level and the inverted amplifier amplifies the voltage change of the logarithmic-conversion output as a voltage (V diff ) representing a luminance change.
- An output of the inverted amplifier is connected to detectors 23 and 24.
- the detector 23 outputs an event detection signal (ON event ) once an output terminal voltage (V diff ) , which is a difference between the output of the sensor circuit and a hold value of the sample-and-hold circuit, exceeds a given threshold voltage.
- the detector 24 outputs an event detection signal (OFF event ) once the output terminal voltage (V diff ) goes below a given threshold voltage. Accordingly, the detectors 23 and 24 can detect positive and negative luminance changes, respectively.
- the initial procedure circuit 25 detects that the output of the sample-and-hold circuit exceeds a given threshold value, the initial procedure circuit 25 controls to turn on the switch SW to reset a reference value for detecting the luminance change. Also, when receiving the event detection signal, the initial procedure circuit 25 outputs event signals used for post-processing of a peripheral circuit.
- capacitance C F for feedback is further inserted between the output of the amplifier 22 and the cathode terminal of the photodiode PD. That is, between the input and output of two cascade-connected amplifiers 21 and 22, in other words, a positive feedback via the capacitance C F is applied between the photocurrent input of the amplifier 21 and the luminance change output of the amplifier 22.
- the configuration corresponds to connecting the NCG to the logarithmic-conversion output (photocurrent input) of the pixel circuit.
- the input capacitance C NEG of the photocurrent input is expressed by equation 3 when the gain of the amplifier 21 is A 1 .
- the NCG can be configured without adding a non-inverted amplifier.
- the negative capacitance by the NCG can be reduced in effective load capacitance. That is, effective load capacitance at the photodiode PD including the parasitic capacitance (C g ) of the gate terminal of the MOS transistor Tr. can be reduced with the reduction in the effective load capacitance by the feedback control illustrated in Fig. 1B. Accordingly, the response time of the event sensor can be further reduced.
- Fig. 3A illustrates an operation sequence of a conventional pixel circuit.
- a conventional sequence executed by the initial procedure circuit 25 is illustrated.
- V diff output terminal voltage
- the pixel circuit outputs event signals used for post-processing of the peripheral circuit.
- a two-dimensional encoder which is also called as an arbiter circuit is connected.
- the initial procedure circuit 25 of the fired pixel circuit transmits a REQ_R signal to the Y-axis address encoder and receives an ACK_R signal as a response. Furthermore, the fired initial procedure circuit 25 transmits a REQ_C signal to the X-axis address encoder, and receives an ACK_C signal as a response.
- the initial procedure circuit 25 transmits an event transfer signal (Evt. Trans. ) to indicate that the series of event signal exchanges with the peripheral circuits has been completed.
- the initial procedure circuit 25 transmits the event transfer signal (Evt. Trans. ) , simultaneously transmits a reset signal to the sample-and-hold circuit, and turns ON the switch SW. Accordingly, the electric charge held in the capacitance C1 is discharged, a reference level of an input of the inverted amplifier is updated, and the next event detection cycle starts. That is, a hold value of the sample-and-hold circuit is reset and the next sampling period starts.
- a kickback voltage at the timing of reset is large, it may be a factor of a sampling error of the input for the reference of the input, and leading erroneous detection of the detector.
- Fig. 3B illustrates an operation sequence of the pixel circuit of the first embodiment.
- capacitance C F is inserted between the input and output of two cascade-connected amplifiers 21 and 22, which is configured of the NCG.
- the initial procedure circuit 25 transmits a reset signal to the sample-and-hold circuit to reset a reference value for detecting the luminance change without waiting the completion of the series of event signal exchanges.
- the kickback voltage at the timing of reset is small, and will not affect the photocurrent input.
- the kickback voltage is alleviated for an established time described as below, detection accuracy of the detector can be improved.
- the establishment time can be used as a preparation period for the next event detection, as compared with that of the prior art, so that the detection accuracy of the detector can be improved.
- Fig. 4 illustrates a pixel circuit according to a second embodiment in the present disclosure.
- the difference with the first embodiment is in the arrangement of the capacitance C F of the NCG for feedback.
- a source terminal of a MOS transistor Tr is connected to a cathode terminal of a photodiode PD, which is a light receiving element.
- the amplifier 31 having the connection point as an input, outputs a voltage (V log ) depending on the logarithm of the photocurrent which varies based on the incident light intensity into the photodiode PD.
- An inverted amplifier including capacitances C1, C2 and an amplifier 32 is connected to the output of the sensor circuit.
- An output of the amplifier 32 is connected to detectors 33 and 34, which can detect positive and negative luminance changes, respectively.
- An initial procedure circuit 25 controls to turn on a switch SW, and outputs event signals used for post-processing of a peripheral circuit.
- an inverted amplifier 36 is connected to the output of the amplifier 31, and the output is connected to the logarithmic-conversion output LOG-OUT via the capacitance C F .
- negative capacitance can be formed while suppressing the expansion of a circuit scale. Accordingly, effective load capacitance in the photodiode PD including parasitic capacitance (Cg) of a gate terminal of the MOS transistor Tr can be further reduced.
- Fig. 5 illustrates a modification of the pixel circuit according to the second embodiment.
- the configuration in which the amplifier 31 and the inverted amplifier 36 in the second embodiment described above are implemented by one differential amplifier.
- a source terminal of a MOS transistor Tr and a cathode terminal of a photodiode PD are connected.
- the logarithmic-conversion output LOG-OUT which is the connection point, is connected to an inverted input terminal of a differential amplifier 41, and a non-inverted output terminal is connected to a gate terminal of the MOS transistor Tr and capacitance C1. Applying a reference potential to a non-inverted input terminal of the differential amplifier 41, the differential amplifier 41 operates as an inverted amplifier for a feedback control.
- the non-inverted output terminal of the differential amplifier 41 is connected to a sample-and-hold circuit including an inverted amplifier which is configured of capacitance C1 and C2, and an amplifier 42.
- the output of the amplifier 42 is connected to the detectors 43 and 44 which output event signals, and the initial procedure circuit 45 outputs the event signals used for post-processing of the peripheral circuit from the event signals.
- the inverted output terminal of the differential amplifier 41 is connected to the logarithmic-conversion output LOG-OUT via the capacitance C F . Since the differential amplifier 41 operates as an inverted amplifier having a Gain-A1, adding an inverted amplifier in the modification is not necessary.
- FIG. 6A A circuit diagram of the inverted amplifier 36 of the pixel circuit according to the second embodiment is illustrated in Fig. 6A. Also, a circuit diagram of the differential amplifier 41 of the pixel circuit according to the second embodiment is illustrated in Fig. 6B. The differential amplifier is shown parallel with the inverted amplifier, which is commonly used for the pixel circuit.
- Fig. 7 illustrates a pixel circuit according to a third embodiment in the present disclosure.
- the difference with the first embodiment is that a buffer amplifier 56 is inserted between an output of an amplifier 51 and capacitance C1.
- the buffer amplifier 56 can, for instance, adjust a signal band, and an operating point.
- feedback capacitance C F of a negative capacitance generation circuit (NCG) used in a pixel circuit is described in detail.
- FIG. 8A illustrates a structure of the capacitance C F of the NCG according to the fourth embodiment of the present disclosure.
- An inter-layer capacitor is provided in the four metal wiring layers 61 to 64 of a substrate which is configured of the pixel circuit. Electrodes 65a and 65b of the capacitance C F are provided in layers 62 and 63, and metal films 66a to 66f for shielding are provided around thereof. According to such a configuration, the capacitance C F of NGC can be provided in the substrate which is configured of the pixel circuit.
- FIG. 8B illustrates another structure of the capacitance of the NCG in the fourth embodiment.
- An in-layer capacitor is provided in three metal wiring layers 71 to 73 of a substrate which is configured of the pixel circuit. Electrodes 74a and 74b of the capacitance C F are provided in the layer 72, and metal films 75a to 75d for shielding are provided around thereof. According to such a configuration as well, NCG capacitance C F may be provided in the substrate which is configured of the pixel circuit.
- Fig. 9 illustrates a structure of variable capacitance of the NCG in the fourth embodiment.
- a plurality of capacitance taps 81 0 to 81 n in which capacitance elements CAP_0 to CAP_N, fuses FUSE_0 to FUSE_n, and test switches TEST_0 to TEST_n are connected in parallel are connected in series.
- the capacitance tap 81 0 is connected to a power supply and a ground via a surge switch ROW_SEL
- the capacitance tap 81 n is connected to the power supply and the ground via a surge switch COL_SEL, respectively.
- the capacitance tap is selected in order to the total capacitance value of the selected capacitance elements meet the required capacitance value.
- the test switch of the selected capacitance tap is opened, and the test switch of the non-selected capacitance tap is short-circuited.
- the surge switches ROW_SEL and COL_SEL are short-circuited, and the fuse of the selected capacitance tap is disconnected.
- a capacitance element of the capacitance value necessary for the capacitance C F is connected in series between terminals 82 and 83.
- the NCG can be configured of not necessary for externally attaching a capacitance element to a conventional pixel circuit.
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Abstract
A sensor circuit and a pixel circuit which may reduce response time of an event sensor and reduce false detection are provided. A sensor circuit has a connection point between a source terminal of a MOS transistor and a light receiving element, and an amplifier having an input connected to the connection point for outputting a voltage depending on a logarithm of a photocurrent of the light receiving element, wherein an output of the amplifier is connected to a gate terminal of the MOS transistor and the gate terminal is adjusted to a voltage depending on the logarithm of the photocurrent. The sensor circuit further includes a capacitance for a Negative Capacitance Generator (NCG).
Description
The present disclosure relates to a sensor circuit, a pixel circuit, and a method for controlling the pixel circuit, and more particularly, a sensor circuit having a logarithmic-conversion output, a pixel circuit functioning as an event sensor, and a method for controlling the pixel circuit.
Background Art
An event based sensor, also referred to a Dynamic Vision Sensor (DVS) , is focused on as a new imaging device for mobile terminals. The event based sensor is a sensor which captures a luminance change in each pixel as an “event” , and outputs information thereof, and having advantages in low latency, low power consumption, and a high dynamic range. Such a detection characteristic is required in characteristic point extraction for the Simultaneous Localization and Mapping (SLAM) technology which is applied to robots that autonomously travel. Also, the detection characteristic is required for such as detecting a high-speed moving object for high-speed images, reconstructing of high-resolution images, compensating for a motion blur, and interpolating a frame. However, since response-waiting time of the event sensor is depending on the luminance, the time accuracy of the event detection deteriorates as the luminance reduces
Summary
An object in the present disclosure is to provide a sensor circuit and a pixel circuit which can reduce a response time of an event sensor, and reduce false detection of the event sensor.
A first embodiment of the present disclosure provides a sensor circuit having a connection point between a source terminal of a MOS transistor and a light receiving element, and a first inverted amplifier having an input connected to the connection point for outputting a voltage depending on a logarithm of a photocurrent of the light receiving element, wherein an output of the first inverted amplifier is connected to a gate terminal of the MOS transistor and the gate terminal is adjusted to a voltage depending on the logarithm of the photocurrent. The sensor circuit further includes a second inverted amplifier having an input connected to the output of the first inverted amplifier, and an output connected to the connection point via a capacitance.
According to the first embodiment, using an existing inverted amplifier can form negative capacitance while suppressing the expansion of a circuit scale.
A second embodiment of the present disclosure provides a sensor circuit having a connection point between a source terminal of a MOS transistor and a light receiving element, and an amplifier having an input connected to the connection point for outputting a voltage depending on a logarithm of a photocurrent of the light receiving element, wherein an output of the amplifier is connected to a gate terminal of the MOS transistor and the gate terminal is adjusted to a voltage depending on the logarithm of the photocurrent, wherein the amplifier is a differential amplifier, and has an inverted input terminal connected to the connection point, a non-inverted output terminal connected to the gate terminal and an inverted output terminal connected to the connection point via a capacitance.
According to the second embodiment, it is not necessary to add the second inverted amplifier in the first embodiment.
A third embodiment of the present disclosure provides a pixel circuit including; a sensor circuit having a connection point between a source terminal of a MOS transistor and a light receiving element, and a first inverted amplifier having an input connected to the connection point for outputting a voltage depending on a logarithm of a photocurrent of the light receiving element, wherein an output of the first inverted amplifier is connected to a gate terminal of the MOS transistor and the gate terminal is adjusted to a voltage depending on the logarithm of the photocurrent; and a second inverted amplifier connected to an output of the sensor circuit and for working as a sample-and-hold circuit to hold an input voltage and amplifies an amount of change of the output of the sensor circuit. The pixel circuit further includes a capacitance inserted between an output of the second inverted amplifier and the connection point.
According to the third embodiment, a negative capacitance generation circuit (NCG) may be configured of without adding a non-inverted amplifier.
In the third embodiment, a buffer amplifier can be inserted in front of the second inverted amplifier. The buffer amplifier can, for instance, adjust a signal band and an operating point.
A fourth embodiment of the present disclosure provides a method for controlling a pixel circuit including; a sensor circuit having a connection point between a source terminal of a MOS transistor and a light receiving element, and a first inverted amplifier having an input connected to the connection point for outputting a voltage depending on a logarithm of a photocurrent of the light receiving element, wherein an output of the first inverted amplifier is connected to a gate terminal of the MOS transistor and the gate terminal is adjusted to a voltage depending on the logarithm of the photocurrent; and a second inverted amplifier connected to an output of the sensor circuit and for working as a sample-and-hold circuit to hold an input voltage and amplifies an amount of change of the output of the sensor circuit, the method executed by an initial procedure circuit of the pixel circuit including the step of: in a case where difference between the output of the sensor circuit and a hold value of the sample-and-hold circuit exceeds a given threshold voltage, sensing a reset signal for resetting the hold value of the sample-and-hold circuit and sending a event signal to an arbiter circuit; and in a case where communication with the arbiter circuit is completed, releasing the reset signal.
According to the fourth embodiment, a kickback voltage at the reset is small, thus the input of the photocurrent will not be affected.
Brief Description of Drawings
[Fig. 1A] Fig. 1A is a diagram illustrating a conventional sensor circuit having a logarithmic-conversion output;
[Fig. 1B] FIG. 1B is a diagram illustrating a conventional sensor circuit having a logarithmic-conversion output;
[Fig. 2] Fig. 2 is a diagram illustrating a pixel circuit according to the first embodiment in the present disclosure;
[Fig. 3A] Fig. 3A is a diagram illustrating an operation sequence of a conventional pixel circuit;
[Fig. 3B] Fig. 3B is a diagram illustrating an operation sequence of the pixel circuit in the first embodiment;
[Fig. 4] Fig. 4 is a pattern diagram illustrating a pixel circuit according to a second embodiment in the present disclosure;
[Fig. 5] Fig. 5 is a diagram illustrating a modification of the pixel circuit according to the second embodiment;
[Fig. 6A] Fig. 6A is a diagram illustrating an inverted amplifier of the pixel circuit according to the second embodiment;
[Fig. 6B] Fig. 6B is a diagram illustrating a differential amplifier of the pixel circuit according to the second embodiment;
[Fig. 7] Fig. 7 is a diagram illustrating a pixel circuit according to a third embodiment in the present disclosure;
[Fig. 8A] Fig. 8A is a diagram illustrating a capacitance structure of a negative capacitance generation circuit according to a fourth embodiment in the present disclosure;
[Fig. 8B] Fig. 8B is a diagram illustrating another structure of the capacitance of the negative capacitance generation circuit according to the fourth embodiment; and
[Fig. 9] Fig. 9 is a diagram illustrating a variable capacitance structure of the negative capacitance generation circuit according to the fourth embodiment.
Description of Embodiments
Embodiments in the present disclosure are described in detail with reference to the drawings as follows.
Fig. 1A illustrates a conventional sensor circuit having a logarithmic-conversion output. A source terminal of a MOS transistor Tr is connected to a cathode terminal of a photodiode PD, which is a light receiving element. The connection point is a logarithmic-conversion output LOG-OUT which provides an output depending on the logarithm of a photocurrent. When the MOS transistor Tr operates in a subthreshold region, the gate-source voltage V
gs is logarithmically proportional to the photocurrent as follows.
[Eq. 1]
Where, I
ph is a drain current corresponding to the photocurrent, I
0 is a saturation current, V
th is a threshold voltage, kT/q is a thermal voltage, and n is a constant determined by a structure of the MOS transistor. Thus, as illustrated in Fig. 1A, while the gate voltage is a constant value, the voltage at the connection point becomes a voltage depending on the logarithm of the photocurrent, which is a logarithmic-conversion output LOG-OUT.
As illustrated in Fig. 1A, since the photodiode PD and the MOS transistor Tr are configured of a source follower biased by the photocurrent flowing through the photodiode PD, response time of the sensor circuit is dominated in settling time of the source follower, and depends on the photocurrent. Here, the settling time of the source follower is determined by parasitic capacitance (C
g) between the gate and source of the MOS transistor Tr, and parasitic capacitance (C
P) of the photodiode PD as a load. Thus, when the illuminance is low, since the photocurrent of the photodiode PD is small, the response time is more deteriorated.
Hence, as illustrated in Fig. 1B, it is known that a feedback control for reducing the effective load capacitance (C
P) by the photo diode PD. The feedback control amplifier 11 is an inverted amplifier that receives the logarithmic-conversion output as a photocurrent input, and applies a feedback control to the gate terminal of the MOS transistor Tr. Where gain of the amplifier 11 is -A, voltage amplitude of the photodiode PD is suppressed by 1/ (1+A) , so that the effective load capacitance is also suppressed to 1/ (1+A) .
It is also known that a negative capacitance generation circuit (Negative Capacitance Generator: NCG) is used as a method of reducing the effective load capacitance (refer to, for instance, Patent Document 1) . The NCG is a non-inverted amplifier which applies a positive feedback via the capacitance C
pF. Where gain of the amplifier is A, the input capacitance C
NEG is expressed by the equation 2, and when the gain A>1, the input capacitance becomes a negative capacitance.
[Eq. 2]
C
NEG=C
p (1-A) (2)
Similar to the Active Matrix Sensor of Patent Document 1, the effective load capacitance can be reduced by connecting the NCG to the logarithmic-conversion output (photocurrent input) of the pixel circuit. Such a method can shorten the settling time of the source follower.
However, the former feedback control has a limit in reducing the effective load capacitance for the following reason. First, when the feedback amplifier is configured of a common-source amplifier, the gain is limited to about 50 times. Second, the parasitic capacitance (C
g) of the gate terminal of the MOS transistor Tr cannot be substantially reduced. Third, a slew rate of the source follower limits a voltage change in the photodiode PD. Thus, there is a limit to shorten the response time of an event sensor.
Furthermore, when the latter NCG is applied to the pixel circuit illustrated in Fig. 1, there is a problem for increasing power consumption and a circuit scale of the pixel circuit due to implementation of the non-inverted amplifier.
Hence, in the present embodiment, a new NCG is implemented in the pixel circuit.
First Embodiment
Fig. 2 illustrates a pixel circuit according to a first embodiment in the present disclosure. A source terminal of a MOS transistor Tr is connected to a cathode terminal of a photodiode PD, which is a light receiving element. The connection point is as a logarithmic-conversion output LOG-OUT that provides an output depending on the logarithm of a photocurrent of a light receiving element. The amplifier 21 having an input connected to the connection point, outputs a voltage (V
log) depending on the logarithm of the photocurrent which varies based on the incident light intensity into the photodiode PD. Also, an output of the amplifier 21 is connected to a gate terminal of the MOS transistor Tr, and the gate terminal is adjusted to a voltage depending on the logarithm of the photocurrent.
An inverted amplifier including capacitances C1, C2 and an amplifier 22 is connected to the output of the sensor circuit. A switch SW which short-circuits an input and an output is connected to the amplifier 22, and operates as a sample-and-hold circuit with the capacitance C1 to sample the output of the sensor circuit. One sampling period starts at the timing that the switch SW has been turned off. As the output of the sensor circuit at the foregoing timing is a reference level, the amplifier 22 amplifies and outputs an amount of change of the output of the sensor circuit. That is, an input at the timing that the switch SW has been turned off is the reference level and the inverted amplifier amplifies the voltage change of the logarithmic-conversion output as a voltage (V
diff) representing a luminance change.
An output of the inverted amplifier is connected to detectors 23 and 24. The detector 23 outputs an event detection signal (ON
event) once an output terminal voltage (V
diff) , which is a difference between the output of the sensor circuit and a hold value of the sample-and-hold circuit, exceeds a given threshold voltage. Similarly, the detector 24 outputs an event detection signal (OFF
event) once the output terminal voltage (V
diff) goes below a given threshold voltage. Accordingly, the detectors 23 and 24 can detect positive and negative luminance changes, respectively. Once the initial procedure circuit 25 detects that the output of the sample-and-hold circuit exceeds a given threshold value, the initial procedure circuit 25 controls to turn on the switch SW to reset a reference value for detecting the luminance change. Also, when receiving the event detection signal, the initial procedure circuit 25 outputs event signals used for post-processing of a peripheral circuit.
In the pixel circuit of the present embodiment, capacitance C
F for feedback is further inserted between the output of the amplifier 22 and the cathode terminal of the photodiode PD. That is, between the input and output of two cascade-connected amplifiers 21 and 22, in other words, a positive feedback via the capacitance C
F is applied between the photocurrent input of the amplifier 21 and the luminance change output of the amplifier 22. The configuration corresponds to connecting the NCG to the logarithmic-conversion output (photocurrent input) of the pixel circuit. Where, the input capacitance C
NEG of the photocurrent input is expressed by equation 3 when the gain of the amplifier 21 is A
1.
[Eq. 3]
Thus, the NCG can be configured without adding a non-inverted amplifier. The negative capacitance by the NCG can be reduced in effective load capacitance. That is, effective load capacitance at the photodiode PD including the parasitic capacitance (C
g) of the gate terminal of the MOS transistor Tr. can be reduced with the reduction in the effective load capacitance by the feedback control illustrated in Fig. 1B. Accordingly, the response time of the event sensor can be further reduced.
Fig. 3A illustrates an operation sequence of a conventional pixel circuit. For comparison, a conventional sequence executed by the initial procedure circuit 25 is illustrated. Once the output terminal voltage (V
diff) which is a luminance change output exceeds a predetermined threshold voltage, it is detected as a "firing" event, and the pixel circuit outputs event signals used for post-processing of the peripheral circuit.
Specifically, as the peripheral circuit, a two-dimensional encoder which is also called as an arbiter circuit is connected. The initial procedure circuit 25 of the fired pixel circuit transmits a REQ_R signal to the Y-axis address encoder and receives an ACK_R signal as a response. Furthermore, the fired initial procedure circuit 25 transmits a REQ_C signal to the X-axis address encoder, and receives an ACK_C signal as a response. Once the initial procedure circuit 25 receives the ACK_C signal from the arbiter circuit, the initial procedure circuit 25 transmits an event transfer signal (Evt. Trans. ) to indicate that the series of event signal exchanges with the peripheral circuits has been completed.
Also, the initial procedure circuit 25 transmits the event transfer signal (Evt. Trans. ) , simultaneously transmits a reset signal to the sample-and-hold circuit, and turns ON the switch SW. Accordingly, the electric charge held in the capacitance C1 is discharged, a reference level of an input of the inverted amplifier is updated, and the next event detection cycle starts. That is, a hold value of the sample-and-hold circuit is reset and the next sampling period starts. However, when a kickback voltage at the timing of reset is large, it may be a factor of a sampling error of the input for the reference of the input, and leading erroneous detection of the detector.
Fig. 3B illustrates an operation sequence of the pixel circuit of the first embodiment. In the pixel circuit of the present embodiment, as illustrated in Fig. 2, capacitance C
F is inserted between the input and output of two cascade-connected amplifiers 21 and 22, which is configured of the NCG. Furthermore, in the pixel circuit of the present embodiment, when the output terminal voltage (V
diff) of the inverted amplifier exceeds a predetermined threshold voltage, and it is detected as a firing event, the initial procedure circuit 25 transmits a reset signal to the sample-and-hold circuit to reset a reference value for detecting the luminance change without waiting the completion of the series of event signal exchanges. Thus, the kickback voltage at the timing of reset is small, and will not affect the photocurrent input. In addition, since the kickback voltage is alleviated for an established time described as below, detection accuracy of the detector can be improved.
After detecting the fire of the output terminal voltage (V
diff) , transmitting the reset signal, the completion of the series of event signal exchanges with the peripheral circuits, and the reset signal is released, until the next event detection cycle begins is called established time. In the present embodiment, the establishment time can be used as a preparation period for the next event detection, as compared with that of the prior art, so that the detection accuracy of the detector can be improved.
Second Embodiment
Fig. 4 illustrates a pixel circuit according to a second embodiment in the present disclosure. The difference with the first embodiment is in the arrangement of the capacitance C
F of the NCG for feedback. A source terminal of a MOS transistor Tr is connected to a cathode terminal of a photodiode PD, which is a light receiving element. The amplifier 31 having the connection point as an input, outputs a voltage (V
log) depending on the logarithm of the photocurrent which varies based on the incident light intensity into the photodiode PD. An inverted amplifier including capacitances C1, C2 and an amplifier 32 is connected to the output of the sensor circuit. An output of the amplifier 32 is connected to detectors 33 and 34, which can detect positive and negative luminance changes, respectively. An initial procedure circuit 25 controls to turn on a switch SW, and outputs event signals used for post-processing of a peripheral circuit. In the second embodiment, an inverted amplifier 36 is connected to the output of the amplifier 31, and the output is connected to the logarithmic-conversion output LOG-OUT via the capacitance C
F.
[Eq. 3]
C
NEG = C
F (1-A
1A
3) (4)
According to the second embodiment, by using an existing inverted amplifier, negative capacitance can be formed while suppressing the expansion of a circuit scale. Accordingly, effective load capacitance in the photodiode PD including parasitic capacitance (Cg) of a gate terminal of the MOS transistor Tr can be further reduced.
Fig. 5 illustrates a modification of the pixel circuit according to the second embodiment. The configuration in which the amplifier 31 and the inverted amplifier 36 in the second embodiment described above are implemented by one differential amplifier. A source terminal of a MOS transistor Tr and a cathode terminal of a photodiode PD are connected. The logarithmic-conversion output LOG-OUT, which is the connection point, is connected to an inverted input terminal of a differential amplifier 41, and a non-inverted output terminal is connected to a gate terminal of the MOS transistor Tr and capacitance C1. Applying a reference potential to a non-inverted input terminal of the differential amplifier 41, the differential amplifier 41 operates as an inverted amplifier for a feedback control. The non-inverted output terminal of the differential amplifier 41 is connected to a sample-and-hold circuit including an inverted amplifier which is configured of capacitance C1 and C2, and an amplifier 42. The output of the amplifier 42 is connected to the detectors 43 and 44 which output event signals, and the initial procedure circuit 45 outputs the event signals used for post-processing of the peripheral circuit from the event signals.
In the modification, the inverted output terminal of the differential amplifier 41 is connected to the logarithmic-conversion output LOG-OUT via the capacitance C
F. Since the differential amplifier 41 operates as an inverted amplifier having a Gain-A1, adding an inverted amplifier in the modification is not necessary.
A circuit diagram of the inverted amplifier 36 of the pixel circuit according to the second embodiment is illustrated in Fig. 6A. Also, a circuit diagram of the differential amplifier 41 of the pixel circuit according to the second embodiment is illustrated in Fig. 6B. The differential amplifier is shown parallel with the inverted amplifier, which is commonly used for the pixel circuit.
Third Embodiment
Fig. 7 illustrates a pixel circuit according to a third embodiment in the present disclosure. The difference with the first embodiment is that a buffer amplifier 56 is inserted between an output of an amplifier 51 and capacitance C1. The buffer amplifier 56 can, for instance, adjust a signal band, and an operating point.
Fourth Embodiment
In a fourth embodiment, as an example, feedback capacitance C
F of a negative capacitance generation circuit (NCG) used in a pixel circuit is described in detail.
FIG. 8A illustrates a structure of the capacitance C
F of the NCG according to the fourth embodiment of the present disclosure. An inter-layer capacitor is provided in the four metal wiring layers 61 to 64 of a substrate which is configured of the pixel circuit. Electrodes 65a and 65b of the capacitance C
F are provided in layers 62 and 63, and metal films 66a to 66f for shielding are provided around thereof. According to such a configuration, the capacitance C
F of NGC can be provided in the substrate which is configured of the pixel circuit.
FIG. 8B illustrates another structure of the capacitance of the NCG in the fourth embodiment. An in-layer capacitor is provided in three metal wiring layers 71 to 73 of a substrate which is configured of the pixel circuit. Electrodes 74a and 74b of the capacitance C
F are provided in the layer 72, and metal films 75a to 75d for shielding are provided around thereof. According to such a configuration as well, NCG capacitance C
F may be provided in the substrate which is configured of the pixel circuit.
Fig. 9 illustrates a structure of variable capacitance of the NCG in the fourth embodiment. In a variable capacitance circuit, a plurality of capacitance taps 81
0 to 81
n in which capacitance elements CAP_0 to CAP_N, fuses FUSE_0 to FUSE_n, and test switches TEST_0 to TEST_n are connected in parallel, are connected in series. The capacitance tap 81
0 is connected to a power supply and a ground via a surge switch ROW_SEL, and the capacitance tap 81
n is connected to the power supply and the ground via a surge switch COL_SEL, respectively.
Once the capacitance value required for the feedback capacitance C
F of the pixel circuit is determined, the capacitance tap is selected in order to the total capacitance value of the selected capacitance elements meet the required capacitance value. The test switch of the selected capacitance tap is opened, and the test switch of the non-selected capacitance tap is short-circuited. Next, the surge switches ROW_SEL and COL_SEL are short-circuited, and the fuse of the selected capacitance tap is disconnected. Once all of the test switches and the surge switches are opened, a capacitance element of the capacitance value necessary for the capacitance C
F is connected in series between terminals 82 and 83.
According to the present embodiment, by arranging the feedback capacitance CF in the metal wiring layer, the NCG can be configured of not necessary for externally attaching a capacitance element to a conventional pixel circuit.
Claims (9)
- A sensor circuit having a connection point between a source terminal of a MOS transistor and a light receiving element, and a first inverted amplifier having an input connected to the connection point for outputting a voltage depending on a logarithm of a photocurrent of the light receiving element, wherein an output of the first inverted amplifier is connected to a gate terminal of the MOS transistor and the gate terminal is adjusted to a voltage depending on the logarithm of the photocurrent, comprising:a second inverted amplifier having an input connected to the output of the first inverted amplifier, and an output connected to the connection point via a capacitance.
- A sensor circuit having a connection point between a source terminal of a MOS transistor and a light receiving element, and an amplifier having an input connected to the connection point for outputting a voltage depending on a logarithm of a photocurrent of the light receiving element, wherein an output of the amplifier is connected to a gate terminal of the MOS transistor and the gate terminal is adjusted to a voltage depending on the logarithm of the photocurrent, whereinthe amplifier is a differential amplifier, and has an inverted input terminal connected to the connection point, a non-inverted output terminal connected to the gate terminal and an inverted output terminal connected to the connection point via a capacitance.
- The sensor circuit according to claim 1 or 2, wherein the capacitance is formed in a metal wiring layer.
- A pixel circuit comprising:a sensor circuit according to claim 1 or 2;a sample-and-hold circuit connected to an output of the sensor circuit; anda reset circuit for resetting a hold value of the sample-and-hold circuit in a case where difference between the output of the sensor circuit and the hold value of the sample-and-hold circuit exceeds a given threshold voltage.
- A pixel circuit including; a sensor circuit having a connection point between a source terminal of a MOS transistor and a light receiving element, and a first inverted amplifier having an input connected to the connection point for outputting a voltage depending on a logarithm of a photocurrent of the light receiving element, wherein an output of the first inverted amplifier is connected to a gate terminal of the MOS transistor and the gate terminal is adjusted to a voltage depending on the logarithm of the photocurrent; and a second inverted amplifier connected to an output of the sensor circuit and for working as a sample-and-hold circuit to hold an input voltage and amplifies an amount of change of the output of the sensor circuit, comprising:a capacitance inserted between an output of the second inverted amplifier and the connection point.
- The pixel circuit a pixel circuit according to claim 5, further comprising:a reset circuit for resetting a hold value of the sample-and-hold circuit in a case where difference between the output of the sensor circuit and the hold value of the sample-and-hold circuit exceeds a given threshold voltage.
- The pixel circuit according to claims 4, 5 and 6, further comprising:a buffer amplifier inserted in front of the second inverted amplifier.
- The pixel circuit according to any one of claims 4 to 7, wherein the capacitance is capacitance formed in a metal wiring layer.
- A method for controlling a pixel circuit including; a sensor circuit having a connection point between a source terminal of a MOS transistor and a light receiving element, and a first inverted amplifier having an input connected to the connection point for outputting a voltage depending on a logarithm of a photocurrent of the light receiving element, wherein an output of the first inverted amplifier is connected to a gate terminal of the MOS transistor and the gate terminal is adjusted to a voltage depending on the logarithm of the photocurrent; and a second inverted amplifier connected to an output of the sensor circuit and for working as a sample-and-hold circuit to hold an input voltage and amplifies an amount of change of the output of the sensor circuit, the method executed by an initial procedure circuit of the pixel circuit comprising the step of:in a case where difference between the output of the sensor circuit and a hold value of the sample-and-hold circuit exceeds a given threshold voltage, sensing a reset signal for resetting the hold value of the sample-and-hold circuit and sending a event signal to an arbiter circuit; andin a case where communication with the arbiter circuit is completed, releasing the reset signal.
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PCT/CN2020/108321 WO2022032462A1 (en) | 2020-08-11 | 2020-08-11 | Sensor circuit, pixel circuit, and method for controlling pixel circuit |
CN202080104539.5A CN116249957A (en) | 2020-08-11 | 2020-08-11 | Sensor circuit, pixel circuit and method for controlling pixel circuit |
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Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
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US6388519B1 (en) * | 1998-11-19 | 2002-05-14 | Sony Corporation | Multi-input differential amplifier circuit |
CN103148779A (en) * | 2013-01-30 | 2013-06-12 | 中国科学院长春光学精密机械与物理研究所 | Adjusting device of light source in position measurement equipment |
US20140292687A1 (en) * | 2013-03-29 | 2014-10-02 | Japan Display Inc. | Electronic apparatus and method of controlling the same |
WO2019211317A1 (en) * | 2018-04-30 | 2019-11-07 | Prophesee | Systems and methods for asynchronous, time-based image sensing |
US20200169675A1 (en) * | 2018-11-26 | 2020-05-28 | Bae Systems Information And Electronic Systems Integration Inc. | Bdi based pixel for synchronous frame-based & asynchronous event-driven readouts |
-
2020
- 2020-08-11 WO PCT/CN2020/108321 patent/WO2022032462A1/en active Application Filing
- 2020-08-11 CN CN202080104539.5A patent/CN116249957A/en active Pending
Patent Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
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US6388519B1 (en) * | 1998-11-19 | 2002-05-14 | Sony Corporation | Multi-input differential amplifier circuit |
CN103148779A (en) * | 2013-01-30 | 2013-06-12 | 中国科学院长春光学精密机械与物理研究所 | Adjusting device of light source in position measurement equipment |
US20140292687A1 (en) * | 2013-03-29 | 2014-10-02 | Japan Display Inc. | Electronic apparatus and method of controlling the same |
WO2019211317A1 (en) * | 2018-04-30 | 2019-11-07 | Prophesee | Systems and methods for asynchronous, time-based image sensing |
US20200169675A1 (en) * | 2018-11-26 | 2020-05-28 | Bae Systems Information And Electronic Systems Integration Inc. | Bdi based pixel for synchronous frame-based & asynchronous event-driven readouts |
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