WO2021217817A1 - 薄膜晶体管阵列基板及触控显示面板 - Google Patents

薄膜晶体管阵列基板及触控显示面板 Download PDF

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Publication number
WO2021217817A1
WO2021217817A1 PCT/CN2020/096641 CN2020096641W WO2021217817A1 WO 2021217817 A1 WO2021217817 A1 WO 2021217817A1 CN 2020096641 W CN2020096641 W CN 2020096641W WO 2021217817 A1 WO2021217817 A1 WO 2021217817A1
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Prior art keywords
touch
electrically connected
touch electrode
electrode
traces
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PCT/CN2020/096641
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English (en)
French (fr)
Inventor
赵莽
李彦阳
田勇
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武汉华星光电技术有限公司
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Priority to US17/260,154 priority Critical patent/US11531421B2/en
Publication of WO2021217817A1 publication Critical patent/WO2021217817A1/zh

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    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/01—Input arrangements or combined input and output arrangements for interaction between user and computer
    • G06F3/03—Arrangements for converting the position or the displacement of a member into a coded form
    • G06F3/041—Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means
    • G06F3/0416—Control or interface arrangements specially adapted for digitisers
    • G06F3/04164—Connections between sensors and controllers, e.g. routing lines between electrodes and connection pads
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G02F1/13338—Input devices, e.g. touch panels
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G02F1/1343—Electrodes
    • G02F1/134309—Electrodes characterised by their geometrical arrangement
    • G02F1/134336—Matrix
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G02F1/136227—Through-hole connection of the pixel electrode to the active element through an insulation layer
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G02F1/136286—Wiring, e.g. gate line, drain line
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G02F1/1368—Active matrix addressed cells in which the switching element is a three-electrode device
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/01—Input arrangements or combined input and output arrangements for interaction between user and computer
    • G06F3/03—Arrangements for converting the position or the displacement of a member into a coded form
    • G06F3/041—Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means
    • G06F3/0412—Digitisers structurally integrated in a display
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/01—Input arrangements or combined input and output arrangements for interaction between user and computer
    • G06F3/03—Arrangements for converting the position or the displacement of a member into a coded form
    • G06F3/041—Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means
    • G06F3/044—Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means by capacitive means
    • G06F3/0443—Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means by capacitive means using a single layer of sensing electrodes
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/01—Input arrangements or combined input and output arrangements for interaction between user and computer
    • G06F3/03—Arrangements for converting the position or the displacement of a member into a coded form
    • G06F3/041—Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means
    • G06F3/044—Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means by capacitive means
    • G06F3/0446—Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means by capacitive means using a grid-like structure of electrodes in at least two directions, e.g. using row and column electrodes
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G02F1/1335—Structural association of cells with optical devices, e.g. polarisers or reflectors
    • G02F1/133509—Filters, e.g. light shielding masks
    • G02F1/133514—Colour filters
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/01—Input arrangements or combined input and output arrangements for interaction between user and computer
    • G06F3/03—Arrangements for converting the position or the displacement of a member into a coded form
    • G06F3/041—Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means
    • G06F3/0416—Control or interface arrangements specially adapted for digitisers

Definitions

  • This application relates to the field of display technology, and in particular to a thin film transistor array substrate and a touch display panel.
  • in-cell touch display panels are increasingly applied to electronic display devices such as mobile phones. Because the in-cell touch display panel integrates the touch function and the display function, the touch circuit and the display circuit are both built on the thin film transistor array substrate (Thin Film Transistor Array Substrate, TFT Array Substrate), which is conducive to the improvement of penetration, and can make electronic display devices such as mobile phones thinner and lighter.
  • Thifilm Transistor Array Substrate Thin Film Transistor Array Substrate, TFT Array Substrate
  • the touch function of the in-cell touch display panel is completed by the touch electrodes integrated in the thin film transistor array substrate and the touch traces and driving chips electrically connected to the touch electrodes.
  • the touch electrode is electrically connected to the common electrode in the thin film transistor array substrate. Therefore, the voltage change of the touch electrode will directly affect the voltage state of the common electrode, thereby affecting the display function of the display panel.
  • the common power line and the driving chip are respectively electrically connected to the touch electrodes through the touch wires, so as to realize the voltage transmission and signal collection of the touch electrodes.
  • the number of touch traces connected to the touch electrode has a direct impact on the voltage state of the touch electrode and the common electrode connected to the touch electrode.
  • the number of touch traces connected to different touch electrodes The large difference between the two will have an adverse effect on the uniformity of the voltage distribution on the common electrode, and will easily cause the display panel to have problems such as upper and lower split screens and uneven display.
  • the application provides a thin film transistor array substrate, including:
  • Base substrate with non-display area
  • the thin film transistor array layer is arranged on the base substrate.
  • the touch function layer is disposed in the thin film transistor array layer, and includes a plurality of touch electrodes, and each of the touch electrodes is electrically connected to the first common power line and the driving chip through a touch trace;
  • the plurality of touch electrodes includes a first touch electrode, a second touch electrode, and a third touch electrode arranged in a first direction, and the second touch electrode is electrically connected to the driving chip
  • the number of the touch wires is greater than or equal to the number of the touch wires that are electrically connected between the first touch electrode and the drive chip, and the second touch electrode is connected to the The number of the touch wires electrically connected between the driving chips is less than the number of the touch wires electrically connected between the third touch electrode and the driving chip;
  • the number of the touch traces electrically connected between the second touch electrode and the driving chip is less than the number of the touch traces electrically connected between the first touch electrode and the driving chip.
  • the number of control traces, and the number of the touch traces electrically connected between the second touch electrode and the driving chip is greater than or equal to that between the third touch electrode and the driving chip The number of the touch wires that are electrically connected.
  • the number of the touch traces electrically connected between the second touch electrode and the first common power line is greater than that of the first touch electrode and the first common power line.
  • the number of the touch traces electrically connected between the first common power line, and the number of the touch traces electrically connected between the second touch electrode and the first common power line Less than or equal to the number of the touch traces electrically connected between the third touch electrode and the first common power line;
  • the number of the touch traces electrically connected between the second touch electrode and the first common power line is less than or equal to that of the first touch electrode and the first common power line
  • the number of the touch traces electrically connected to each other, and the number of the touch traces electrically connected between the second touch electrode and the first common power line is greater than that of the third touch
  • the number of the touch traces electrically connected between the second touch electrode and the driving chip is greater than or equal to the first touch electrode and the driving chip.
  • the number of the touch traces electrically connected between the chips, and the number of the touch traces electrically connected between the second touch electrode and the driving chip is less than the third touch.
  • the number of the touch traces electrically connected between the second touch electrode and the first common power line is less than or equal to the electrical connection between the third touch electrode and the first common power line
  • the number of the touch wires that are electrically connected, and the number of the touch wires that are electrically connected between the second touch electrode and the first common power line is greater than that of the first touch electrode
  • the first touch electrode and the second touch electrode are arranged adjacently along the first direction, and the second touch electrode is electrically connected to the driving chip.
  • the number of the touch wires that are electrically connected is equal to the number of the touch wires that are electrically connected between the first touch electrode and the drive chip, and the second touch electrode and the The number of the touch traces electrically connected between the first common power line is greater than the number of the touch traces electrically connected between the first touch electrode and the first common power line.
  • the second touch electrode and the third touch electrode are arranged adjacently along the first direction, and the second touch electrode is electrically connected to the driving chip.
  • the number of the touch traces that are electrically connected is smaller than the number of the touch traces that are electrically connected between the third touch electrode and the drive chip, and the second touch electrode is connected to the
  • the number of the touch traces electrically connected between the first common power line is equal to the number of the touch traces electrically connected between the third touch electrode and the first common power line.
  • the first touch electrode, the second touch electrode, and the third touch electrode are arranged adjacent to each other in order along the first direction;
  • the number of the touch traces electrically connected between the second touch electrode and the drive chip is equal to the touch traces electrically connected between the first touch electrode and the drive chip
  • the number of lines, the number of touch traces electrically connected between the second touch electrode and the first common power line is greater than the number of the first touch electrode and the first common power line
  • the number of the touch traces electrically connected between the second touch electrode and the drive chip is less than the number of touch traces electrically connected between the third touch electrode and the drive chip
  • the number of lines, the number of touch traces electrically connected between the second touch electrode and the first common power line is equal to the number of the third touch electrode and the first common power line
  • the number of the touch traces electrically connected between the second touch electrode and the driving chip is greater than or equal to the third touch electrode and the driving chip.
  • the number of the touch traces electrically connected between the chips, and the number of the touch traces electrically connected between the second touch electrode and the driving chip is less than the number of the first touch.
  • the number of the touch traces electrically connected between the second touch electrode and the first common power line is less than or equal to the electrical connection between the first touch electrode and the first common power line
  • the number of the touch wires that are electrically connected, and the number of the touch wires that are electrically connected between the second touch electrode and the first common power line is greater than that of the third touch electrode
  • the first touch electrode and the second touch electrode are arranged adjacently along the first direction, and the second touch electrode is electrically connected to the driving chip.
  • the number of the touch wires that are electrically connected is smaller than the number of the touch wires that are electrically connected between the first touch electrode and the drive chip, and the second touch electrode is connected to the
  • the number of the touch traces electrically connected between the first common power line is equal to the number of the touch traces electrically connected between the first touch electrode and the first common power line.
  • the second touch electrode and the third touch electrode are arranged adjacently along the first direction, and the second touch electrode is electrically connected to the driving chip.
  • the number of the touch traces that are electrically connected is equal to the number of the touch traces that are electrically connected between the third touch electrode and the driving chip, and the second touch electrode and the The number of the touch traces electrically connected between the first common power line is greater than the number of the touch traces electrically connected between the third touch electrode and the first common power line.
  • the first touch electrode, the second touch electrode, and the third touch electrode are arranged adjacent to each other in order along the first direction;
  • the number of the touch traces electrically connected between the second touch electrode and the drive chip is less than the number of touch traces electrically connected between the first touch electrode and the drive chip
  • the number of lines, the number of touch traces electrically connected between the second touch electrode and the first common power line is equal to the number of the first touch electrode and the first common power line
  • the number of the touch traces electrically connected between the second touch electrode and the drive chip is equal to the touch traces electrically connected between the third touch electrode and the drive chip
  • the number of lines, the number of touch traces electrically connected between the second touch electrode and the first common power line is greater than the number of the third touch electrode and the first common power line
  • the touch electrode further includes a fourth touch electrode disposed between the second touch electrode and the driving chip along the first direction, and the fourth touch electrode A virtual wire is provided on the touch electrode, and the virtual wire is electrically connected to the fourth touch electrode.
  • the number of the dummy traces provided on the fourth touch electrode and the second touch electrode are electrically connected to the touch traces of the driving chip
  • the sum of the number is greater than the number of the touch traces of the first touch electrode electrically connected to the driving chip, and is less than or equal to the number of the third touch electrode electrically connected to the touch of the driving chip Control the number of wires; or
  • the sum of the number of the dummy traces provided on the fourth touch electrode and the number of the touch traces of the second touch electrode electrically connected to the driving chip is less than or equal to the first
  • a touch electrode is electrically connected to the number of touch traces of the driving chip, and is greater than the number of touch traces of the third touch electrode electrically connected to the driving chip.
  • a dummy wire is provided between the second touch electrode and the driving chip, and one end of the dummy wire is electrically connected to the second touch electrode;
  • the sum of the number of the dummy traces and the number of the touch traces where the second touch electrode is electrically connected to the driving chip is greater than the sum of the number of the first touch electrodes electrically connected to the driving chip.
  • the number of touch wires is less than or equal to the number of touch wires where the third touch electrode is electrically connected to the driving chip; or
  • the sum of the number of the dummy wiring and the number of the touch wiring where the second touch electrode is electrically connected to the driving chip is less than or equal to the first touch electrode electrically connected to the driving chip
  • the number of the touch traces is greater than the number of the touch traces that the third touch electrode is electrically connected to the driving chip.
  • the thin film transistor array layer includes an active layer provided on the base substrate, a gate insulating layer provided on the active layer, and a gate insulating layer provided on the gate.
  • a first insulating layer is arranged on the source and drain electrodes, a common electrode is arranged on the first insulating layer, a second insulating layer is arranged on the common electrode, and a pixel electrode is arranged on the second insulating layer;
  • the common electrode is electrically connected to the touch electrode through the via hole on the first insulating layer
  • the pixel electrode is electrically connected to the touch electrode through the via hole on the first insulating layer and the second insulating layer.
  • the source and drain are electrically connected.
  • the first common power line and the driving chip are both disposed in the non-display area, and disposed at opposite ends of the touch function layer along the first direction .
  • a second common power line is also provided on the same side of the driving chip, which is electrically connected to the touch electrodes and the touch traces of the driving chip at the same time.
  • the second common power line is also provided on the same side of the driving chip, which is electrically connected to the touch electrodes and the touch traces of the driving chip at the same time.
  • the touch trace connecting the touch electrode and the first common power line is provided with a first switch transistor, which connects the touch electrode and the second common power source
  • a second switch transistor is provided on the touch trace of the wire.
  • the present application also provides a touch display panel, including a thin film transistor array substrate, and the thin film transistor array substrate includes:
  • Base substrate with non-display area
  • the thin film transistor array layer is arranged on the base substrate.
  • the touch function layer is disposed in the thin film transistor array layer, and includes a plurality of touch electrodes, and each of the touch electrodes is electrically connected to the first common power line and the driving chip through a touch trace;
  • the plurality of touch electrodes includes a first touch electrode, a second touch electrode, and a third touch electrode arranged in a first direction, and the second touch electrode is electrically connected to the driving chip
  • the number of the touch wires is greater than or equal to the number of the touch wires that are electrically connected between the first touch electrode and the drive chip, and the second touch electrode is connected to the The number of the touch wires electrically connected between the driving chips is less than the number of the touch wires electrically connected between the third touch electrode and the driving chip;
  • the number of the touch traces electrically connected between the second touch electrode and the driving chip is less than the number of the touch traces electrically connected between the first touch electrode and the driving chip.
  • the number of control traces, and the number of the touch traces electrically connected between the second touch electrode and the driving chip is greater than or equal to that between the third touch electrode and the driving chip The number of the touch wires that are electrically connected.
  • the touch display panel further includes a color filter substrate disposed opposite to the thin film transistor array substrate, and a color filter substrate disposed between the thin film transistor array substrate and the color filter substrate. liquid crystal.
  • the present application also provides a touch display panel, including: a thin film transistor array substrate, a color filter substrate disposed opposite to the thin film transistor array substrate, and a color filter substrate disposed between the thin film transistor array substrate and the color filter substrate liquid crystal;
  • the thin film transistor array substrate includes:
  • Base substrate with non-display area
  • the thin film transistor array layer is arranged on the base substrate.
  • the touch function layer is disposed in the thin film transistor array layer, and includes a plurality of touch electrodes, and each of the touch electrodes is electrically connected to the first common power line and the driving chip through a touch trace;
  • the plurality of touch electrodes includes a first touch electrode, a second touch electrode, and a third touch electrode arranged along a first direction; wherein,
  • the number of the touch traces that are electrically connected between the second touch electrode and the drive chip is greater than or equal to the number of touches that are electrically connected between the first touch electrode and the drive chip.
  • the number of control traces, and the number of the touch traces electrically connected between the second touch electrode and the drive chip is less than the number of electrical connections between the third touch electrode and the drive chip.
  • the number of the touch traces connected; and the number of the touch traces electrically connected between the second touch electrode and the first common power line is less than or equal to the third touch
  • the number of the touch control traces electrically connected between the electrode and the first common power line, and the touch control trace electrically connected between the second touch electrode and the first common power line The number of traces is greater than the number of touch traces electrically connected between the first touch electrode and the first common power line; or
  • the number of the touch traces that are electrically connected between the second touch electrode and the drive chip is greater than or equal to the number of touches that are electrically connected between the third touch electrode and the drive chip.
  • the number of control traces, and the number of the touch traces electrically connected between the second touch electrode and the driving chip is less than the number of electrical connections between the first touch electrode and the driving chip.
  • the number of the touch traces connected; and the number of the touch traces electrically connected between the second touch electrode and the first common power line is less than or equal to the first touch
  • the number of the touch control traces electrically connected between the electrode and the first common power line, and the touch control trace electrically connected between the second touch electrode and the first common power line The number of traces is greater than the number of touch traces electrically connected between the third touch electrode and the first common power line.
  • This application rationally configures the number of touch traces that are electrically connected between the touch electrode and the first common power line and the driving chip to eliminate or reduce the number of touch electrodes connected to the first common power line and the driving chip.
  • the voltage abrupt change caused by the difference in the number of touch wires of the chip makes the voltage distribution on the touch electrode and the common electrode in the thin film transistor array substrate tend to be consistent, thereby improving the display quality of the display panel.
  • FIG. 1 is a schematic partial cross-sectional view of a thin film transistor array substrate provided by an embodiment of the present application
  • FIG. 2 is a top view of a thin film transistor array substrate provided by an embodiment of the present application.
  • FIG. 3 is a schematic diagram of a first wiring manner of touch traces that are electrically connected between touch electrodes, a first common power line, and a driving chip provided by an embodiment of the present application;
  • FIG. 4 is a schematic diagram of a second wiring manner of touch traces that are electrically connected between the touch electrodes and the first common power line and the driving chip according to an embodiment of the present application;
  • 5a is a schematic diagram of a first wiring method of a first embodiment of a touch trace electrically connected between a second touch electrode, a first common power line and a driving chip;
  • 5b is a schematic diagram of a second wiring method of the first embodiment of the touch trace electrically connected between the second touch electrode and the first common power line and the driving chip;
  • 5c is a schematic diagram of a third wiring method of the first embodiment of the touch trace electrically connected between the second touch electrode and the first common power line and the driving chip;
  • 5d is a schematic diagram of a fourth wiring manner of the first embodiment of the touch trace electrically connected between the second touch electrode, the first common power line and the driving chip;
  • 5e is a schematic diagram of a fifth wiring method of the first embodiment of the touch trace electrically connected between the second touch electrode and the first common power line and the driving chip;
  • FIG. 5f is a schematic diagram of a sixth wiring manner of the first embodiment of the touch trace electrically connected between the second touch electrode and the first common power line and the driving chip;
  • 6a is a schematic diagram of a first wiring method of a second embodiment of a touch trace electrically connected between a second touch electrode, a first common power line and a driving chip;
  • FIG. 6b is a schematic diagram of a second wiring method of the second embodiment of the touch trace electrically connected between the second touch electrode and the first common power line and the driving chip;
  • 6c is a schematic diagram of a third wiring method of the second embodiment of the touch trace electrically connected between the second touch electrode and the first common power line and the driving chip;
  • 6d is a schematic diagram of a fourth wiring manner of the second embodiment of the touch trace electrically connected between the second touch electrode and the first common power line and the driving chip;
  • FIG. 6e is a schematic diagram of a fifth wiring method of the second embodiment of the touch trace electrically connected between the second touch electrode and the first common power line and the driving chip;
  • 6f is a schematic diagram of a sixth wiring manner of the second embodiment of the touch trace electrically connected between the second touch electrode and the first common power line and the driving chip;
  • FIG. 7a is a schematic diagram of a first wiring manner of a third embodiment of a touch trace electrically connected between the second touch electrode and the first common power line and the driving chip;
  • FIG. 7b is a schematic diagram of a second wiring method of a third embodiment of the touch trace electrically connected between the second touch electrode and the first common power line and the driving chip;
  • FIG. 7c is a schematic diagram of a third wiring method of a third embodiment of the touch trace electrically connected between the second touch electrode and the first common power line and the driving chip;
  • FIG. 7d is a schematic diagram of a fourth wiring manner of a third embodiment of the touch trace electrically connected between the second touch electrode and the first common power line and the driving chip;
  • FIG. 7e is a schematic diagram of a fifth wiring method of a third embodiment of the touch trace electrically connected between the second touch electrode and the first common power line and the driving chip;
  • FIG. 7f is a schematic diagram of a sixth wiring manner of the third embodiment of the touch trace electrically connected between the second touch electrode and the first common power line and the driving chip;
  • FIG. 8 is a schematic diagram of a third wiring method of the touch trace electrically connected between the touch electrode and the first common power line and the driving chip provided by an embodiment of the present application;
  • FIG. 9 is a schematic diagram of a fourth wiring manner of touch traces that are electrically connected between the touch electrodes and the first common power line and the driving chip according to an embodiment of the present application.
  • FIG. 10 is a schematic diagram of a wiring method of touch traces electrically connecting the touch electrodes with the first common power line, the second common power line, and the driving chip provided by an embodiment of the present application.
  • the embodiment of the application provides a thin film transistor array substrate, including a plurality of touch electrodes, and each of the touch electrodes is electrically connected to a first common power line and a driving chip through a touch trace.
  • the embodiment of the application passes Reasonably configure the number of touch traces that are electrically connected between the touch electrode and the driving chip, and eliminate or reduce the difference in the number of touch traces connected to the first common power line and the driving chip on different touch electrodes.
  • the sudden change in voltage makes the voltage on the touch electrode and the common electrode in the thin film transistor array substrate tend to be the same, which improves the quality of the display screen.
  • Fig. 1 is a schematic partial cross-sectional view of a thin film transistor array substrate provided by an embodiment of the present application
  • Fig. 2 is a top view of a thin film transistor array substrate provided by an embodiment of the present application.
  • the thin film transistor array substrate includes a base substrate 01, a thin film transistor array layer 02 disposed on the base substrate 01, and a common electrode 04 and a pixel electrode 05 disposed on the thin film transistor array layer 02
  • the thin film transistor array substrate further includes a touch function layer 03 disposed in the thin film transistor array layer 02, and the touch function layer 03 is used to realize the touch function of the thin film transistor array substrate.
  • the thin film transistor array layer 02 includes an active layer 021 disposed on the base substrate 01, a gate insulating layer 022 disposed on the active layer, and the gate insulating layer
  • the gate electrode 023 on the 022, the interlayer insulating layer 024 arranged on the gate electrode 023, and the source and drain electrodes 025 arranged on the interlayer insulating layer 024, the touch electrode 10 and the source and drain Pole 025 is set on the same floor.
  • a first insulating layer 06 is provided between the thin film transistor array layer 02 and the common electrode 04, and a second insulating layer 07 is provided between the common electrode 04 and the pixel electrode 05; the pixel electrode 05 passes
  • the via holes on the first insulating layer 06 and the second insulating layer 07 are electrically connected to the source and drain electrodes 025, so as to realize signal transmission from the thin film transistor layer 02 to the pixel electrode 05;
  • the common electrode 04 is electrically connected to the touch electrode 10 through the via hole on the first insulating layer 06.
  • the touch function layer 03 includes a plurality of touch electrodes 10.
  • the base substrate 01 has a display area AA and a non-display area NA, and a position corresponding to the non-display area NA is provided with a first common power line COM1 and a driving chip IC; each of the touch electrodes 10 is connected to The first common power line COM1 and the driver chip IC are electrically connected through a touch trace 20, wherein the first common power line COM1 is used to provide a common voltage signal to the touch electrode 10.
  • the driving chip IC is used to provide voltage signals to the touch electrodes 10 and perform signal collection and analysis.
  • the first common power line COM1 and the driving chip IC are respectively disposed at opposite ends of the touch function layer 03, so that voltage signals are simultaneously provided to the touch electrode 10 from both ends.
  • FIGS. 3, 4, 5a to 5f, 6a to 6f, and 7a to 7f wherein, FIG. 3 is a touch electrode, a first common power line, and a driving chip provided by an embodiment of the present application
  • FIG. 3 is a touch electrode, a first common power line, and a driving chip provided by an embodiment of the present application
  • FIG. 4 is a diagram of the touch traces electrically connected between the touch electrode and the first common power line and the driving chip provided in an embodiment of the present application.
  • FIGS. 5a to 5f are six alternatives of the first embodiment of the touch trace electrically connected between the second touch electrode and the first common power line and the driving chip. Schematic diagrams of wiring methods.
  • FIGS. 3 is a touch electrode, a first common power line, and a driving chip provided by an embodiment of the present application
  • FIG. 4 is a diagram of the touch traces electrically connected between the touch electrode and the first common power line and the driving chip provided in an embodiment of the present
  • 6a to 6f are schematic diagrams of six alternative wiring methods of the second embodiment of the touch trace electrically connected between the second touch electrode and the first common power line and the driving chip.
  • 7a to 7f are schematic diagrams of six alternative wiring modes of the third embodiment of the touch trace electrically connected between the second touch electrode and the first common power line and the driving chip.
  • the touch trace 20 is electrically connected to the first common power line COM1 and the touch electrode 10 through a first switch transistor SW1, and the first switch transistor SW1 is used to control the first The electrical conduction state between the common power line COM1 and the touch electrode 10.
  • the plurality of touch electrodes 10 includes a first touch electrode 11, a second touch electrode 12, and a third touch electrode 13 arranged along the first direction Y.
  • the second touch electrode 12 is electrically connected to the driving chip IC
  • the number of the touch wires 20 is greater than or equal to the number of the touch wires 20 electrically connected between the first touch electrode 11 and the driving chip IC, and the second touch
  • the number of the touch traces 20 electrically connected between the electrode 12 and the drive chip IC is less than the number of touch traces electrically connected between the third touch electrode 13 and the drive chip IC The number of 20.
  • the driver chip IC transmits voltage signals to the touch electrode 10 through the touch trace 20 and performs signal collection and analysis, and the electrical connection between the touch electrode 10 and the driver chip IC is The number of the touch wires 20 connected directly affects the voltage state on the touch electrode 10. In actual production, considering the number of channels of the driver chip IC and the resolution rate of the display panel, different touch electrodes are connected. There will be differences in the number of touch traces. In this embodiment, the first touch electrode 11 and the second touch electrode 12 are realized by performing the above-mentioned reasonable configuration on the number of touch traces connecting the touch electrodes and the driving chip.
  • this embodiment is beneficial to promote the voltage distribution on the touch electrode and the common electrode in the thin film transistor array substrate to be consistent.
  • the number of the touch traces 20 electrically connected between the second touch electrode 12 and the first common power line COM1 is greater than that of the first touch electrode 11 and the first common power line COM1.
  • the number of the touch traces 20 electrically connected between the power lines COM1, and the touch traces 20 electrically connected between the second touch electrode 12 and the first common power line COM1 The number of is less than or equal to the number of the touch traces 20 electrically connected between the third touch electrode 13 and the first common power line COM1. It should be noted that the number of touch traces 20 electrically connected between the touch electrode 10 and the first common power line COM1 directly affects the voltage state on the touch electrode 10.
  • the touch control circuit is electrically connected.
  • the wiring method of the line 20 This embodiment provides six different wiring methods of the first embodiment shown in FIGS. 5a to 5f, and six different wiring methods of the second embodiment shown in FIGS. 6a to 6f. Different wiring methods, as well as the six different wiring methods of the third embodiment as shown in FIG. 7a to FIG. 7f, in the application, you can choose one of the eighteen different wiring methods in the three embodiments. One or more for flexible application.
  • the second touch electrode 12 is connected to the first common power line COM1
  • the number of the touch traces 20 electrically connected to each other is two, and the number of the touch traces 20 electrically connected between the second touch electrode 12 and the driving chip IC is one;
  • the second wiring method TP12 shown in FIG. 5b the number of the touch wires 20 electrically connected between the second touch electrode 12 and the first common power line COM1 is 3, and the second The number of the touch traces 20 that are electrically connected between the touch electrodes 12 and the drive chip IC is 1.
  • the second touch electrodes 12 and The number of the touch traces 20 electrically connected between the first common power line COM1 is 3, and the touch traces electrically connected between the second touch electrode 12 and the driving chip IC
  • the number of 20 is 2.
  • the number of the touch traces 20 electrically connected between the second touch electrode 12 and the first common power line COM1 is 4.
  • the number of the touch traces 20 electrically connected between the second touch electrode 12 and the drive chip IC is 1; in the fifth wiring method TP15 shown in FIG. 5e, the first The number of the touch traces 20 electrically connected between the two touch electrodes 12 and the first common power line COM1 is 4, and the second touch electrode 12 is electrically connected to the driving chip IC.
  • the number of the touch control traces 20 is 2.
  • the touch control electrode 12 is electrically connected to the first common power line COM1
  • the number of traces 20 is four, and the number of touch traces 20 electrically connected between the second touch electrode 12 and the driving chip IC is three.
  • the second touch electrode 12 and the first common power line COM1, and the second touch electrode 12 and the driving chip IC are electrically connected to each other.
  • the wiring manners of the first embodiment of the wiring 20 are not limited to the above six types, and can be adaptively expanded based on the same technical concept in practical applications.
  • a dummy wiring 201 is provided between the second touch electrode 12 and the driving chip IC.
  • One end is electrically connected to the second touch electrode 12.
  • the sum of the number of the dummy traces 201 and the number of the touch traces 20 of the second touch electrode 12 electrically connected to the driving chip IC is greater than that of the first touch electrode 11 electrically.
  • the number of the touch wires 20 that are electrically connected to the driver chip IC is less than or equal to the number of the touch wires 20 that the third touch electrode 13 is electrically connected to the driver chip IC.
  • the dummy trace 201 is formed by disconnecting the touch trace provided between the second touch electrode 12 and the driving chip IC on the side close to the IC; relative to FIG. 5a
  • this embodiment is beneficial to simplify the manufacturing process of the touch wiring.
  • the number of the touch traces 20 electrically connected between the second touch electrode 12 and the first common power line COM1 is 2, and the second The number of the touch traces 20 electrically connected between the touch electrode 12 and the drive chip IC is 1, and the number of the dummy traces 201 is 1.
  • the second wiring mode TP22 shown in FIG. 6b Wherein, the number of the touch traces 20 electrically connected between the second touch electrode 12 and the first common power line COM1 is 3, and the second touch electrode 12 and the driving chip IC The number of the touch traces 20 electrically connected between each other is 1, and the number of the dummy traces 201 is 2.
  • the second touch electrodes 12 and The number of the touch traces 20 electrically connected between the first common power line COM1 is 3, and the touch traces electrically connected between the second touch electrode 12 and the driving chip IC
  • the number of 20 is 2, and the number of the dummy wiring 201 is 1.
  • the second touch electrode 12 is electrically connected to the first common power line COM1
  • the number of the touch wires 20 is 4, the number of the touch wires 20 electrically connected between the second touch electrode 12 and the driving chip IC is 1, and the virtual wires
  • the number of 201 is 3; in the fifth wiring method TP25 shown in FIG.
  • the number of the touch traces 20 electrically connected between the second touch electrode 12 and the first common power line COM1 is 4.
  • the number of the touch traces 20 electrically connected between the second touch electrode 12 and the driver chip IC is two, and the number of the dummy traces 201 is two; as shown in FIG. 6f
  • the number of the touch traces 20 electrically connected between the second touch electrode 12 and the first common power line COM1 is 4, and the second touch electrode 12 is
  • the number of the touch wires 20 electrically connected between the driving chip ICs is 3, and the number of the dummy wires 201 is one.
  • the second touch electrode 12 and the first common power line COM1, and the second touch electrode 12 and the driving chip IC are electrically connected to each other.
  • the wiring manner of the second embodiment of the wiring 20 is not limited to the above six types, and can be adaptively expanded based on the same technical concept in practical applications.
  • the touch electrode 20 further includes the second touch electrode 12 and the second touch electrode 12 along the first direction Y.
  • the fourth touch electrode 14 between the driving chip ICs is provided with a dummy wire 202 on the fourth touch electrode 14, and the dummy wire 202 is electrically connected to the fourth touch electrode 14.
  • the sum of the number of the virtual wiring 202 and the number of the touch wiring 20 of the second touch electrode 12 electrically connected to the driving chip IC is greater than that of the first touch electrode 11.
  • the number of the touch wires 20 that are electrically connected to the driver chip IC is less than or equal to the number of the touch wires 20 that the third touch electrode 13 is electrically connected to the driver chip IC.
  • the dummy trace 202 is arranged in a line segment on the fourth touch electrode 14 and is not connected to the adjacent touch electrode 20. It should be noted that the dummy wiring 202 is made by disconnecting and welding the touch wiring provided between the second touch electrode 12 and the driving chip IC.
  • the number of the touch traces 20 electrically connected between the second touch electrode 12 and the first common power line COM1 is 2, and the second The number of the touch wires 20 electrically connected between the touch electrode 12 and the driver chip IC is 1, and the number of the dummy wires 202 is 1; in the second wiring mode TP32 shown in FIG. 7b Wherein, the number of the touch traces 20 electrically connected between the second touch electrode 12 and the first common power line COM1 is 3, and the second touch electrode 12 and the driving chip IC The number of the touch wires 20 electrically connected between each other is 1, and the number of the dummy wires 202 is 2.
  • the second touch electrodes 12 are The number of the touch traces 20 electrically connected between the first common power line COM1 is 3, and the touch traces electrically connected between the second touch electrode 12 and the driving chip IC The number of 20 is 2, and the number of the dummy wiring 202 is 1.
  • the second touch electrode 12 is electrically connected to the first common power line COM1
  • the number of the touch wires 20 is 4, the number of the touch wires 20 electrically connected between the second touch electrode 12 and the driving chip IC is 1, and the virtual wires
  • the number of 202 is 3; in the fifth wiring method TP55 shown in FIG.
  • the number of the touch traces 20 electrically connected between the second touch electrode 12 and the first common power line COM1 is 4.
  • the number of the touch traces 20 electrically connected between the second touch electrode 12 and the driving chip IC is 2, and the number of the dummy traces 202 is 2; as shown in FIG. 7f
  • the number of the touch traces 20 electrically connected between the second touch electrode 12 and the first common power line COM1 is 4, and the second touch electrode 12 is
  • the number of the touch traces 20 electrically connected between the driving chip ICs is three, and the number of the dummy traces 202 is one.
  • the second touch electrode 12 and the first common power line COM1, and the second touch electrode 12 and the driving chip IC are electrically connected to each other.
  • the wiring method of the third embodiment of the wiring 20 is not limited to the above six types, and can be adaptively expanded based on the same technical concept in practical applications.
  • the first touch electrode 11 and the second touch electrode 12 are along the first The direction Y is arranged next to each other.
  • the number of the touch traces 20 electrically connected between the second touch electrode 12 and the drive chip IC is equal to the number of electrical connections between the first touch electrode 11 and the drive chip IC
  • the number of the touch wires 20, and the number of the touch wires 20 electrically connected between the second touch electrode 12 and the first common power line COM1 is greater than that of the first touch wires.
  • the second touch electrode 12 and the third touch electrode 13 are arranged adjacently along the first direction Y.
  • the number of the touch traces 20 electrically connected between the second touch electrode 12 and the drive chip IC is less than that between the third touch electrode 13 and the drive chip IC.
  • the number of the touch wires 20, and the number of the touch wires 20 electrically connected between the second touch electrode 12 and the first common power line COM1 is equal to the third touch wires
  • the first touch electrode 11, the second touch electrode 12, and the third touch electrode 13 are arranged adjacent to each other in the first direction Y in order.
  • the number of the touch traces 20 electrically connected between the second touch electrode 12 and the drive chip IC is equal to the number of electrical connections between the first touch electrode 11 and the drive chip IC
  • the number of the touch wires 20, the number of the touch wires 20 electrically connected between the second touch electrode 12 and the first common power line COM1 is greater than the number of the first touch electrodes 11
  • the number of control traces 20 is smaller than the number of touch traces 20 electrically connected between the third touch electrode 13 and the driving chip IC, and the second touch electrode 12 is connected to the first
  • the number of the touch traces 20 electrically connected between a common power line COM1 is equal to the touch traces electrically connected between the third touch electrode 13 and
  • the number of the touch traces 20 electrically connected between the second touch electrode 12 and the first common power line COM1 is two, and the number of the touch traces 20 electrically connected to the driver chip IC
  • the number of the touch wires 20 that are electrically connected is one; and the number of the touch wires 20 that are electrically connected between the first touch electrode 11 and the first common power line COM1, and The number of the touch wires 20 electrically connected to the driving chip IC is 1; and all the touch wires 20 electrically connected between the third touch electrode 13 and the first common power line COM1
  • the number of the touch wires 20 and the number of the touch wires 20 electrically connected to the driving chip IC are both two.
  • the wiring arrangement feature of the touch trace 20 of this embodiment realizes the touch trace 20 connected to the first touch electrode 11, the second touch electrode 12, and the third touch electrode 13.
  • the sequential increase of the number causes the voltage on the first touch electrode 11, the second touch electrode 12, and the third touch electrode 13 to gradually increase, which effectively avoids a large sudden change in voltage and makes the voltage distribution tend to be uniform.
  • the number of the touch traces 20 electrically connected between the second touch electrode 12 and the first common power line COM1 is 4, and the number of the touch traces 20 electrically connected to the driving chip IC
  • the number of the touch wires 20 that are electrically connected is 2; and the number of the touch wires 20 that are electrically connected between the first touch electrode 11 and the first common power line COM1, and The number of the touch wires 20 electrically connected to the driving chip IC is 2; and all the touch wires 20 electrically connected between the third touch electrode 13 and the first common power line COM1
  • the number of the touch wires 20 and the number of the touch wires 20 electrically connected to the driving chip IC are both 4.
  • the wiring arrangement feature of the touch trace 20 of this embodiment realizes the touch trace 20 connected to the first touch electrode 11, the second touch electrode 12, and the third touch electrode 13.
  • the sequential increase of the number causes the voltage on the first touch electrode 11, the second touch electrode 12, and the third touch electrode 13 to gradually increase, which effectively avoids a large sudden change in voltage and makes the voltage distribution tend to be uniform.
  • the second touch electrode 12 is electrically connected to the driving chip IC
  • the number of the touch wires 20 is less than the number of the touch wires 20 electrically connected between the first touch electrode 11 and the driving chip IC, and the second touch electrode 12
  • the number of the touch traces 20 electrically connected to the driver chip IC is greater than or equal to the touch traces electrically connected between the third touch electrode 13 and the driver chip IC The number of 20.
  • the driver chip IC transmits voltage signals to the touch electrode 10 through the touch trace 20 and performs signal collection and analysis, and the electrical connection between the touch electrode 10 and the driver chip IC is The number of the touch wires 20 connected directly affects the voltage state on the touch electrode 10. In actual production, considering the number of channels of the driver chip IC and the resolution rate of the display panel, different touch electrodes are connected. There will be differences in the number of touch traces. In this embodiment, the first touch electrode 11 and the second touch electrode 12 are realized by performing the above-mentioned reasonable configuration on the number of touch traces connecting the touch electrodes and the driving chip.
  • this embodiment is beneficial to promote the voltage distribution on the touch electrode and the common electrode in the thin film transistor array substrate to be consistent.
  • the number of the touch traces 20 electrically connected between the second touch electrode 12 and the first common power line COM1 is less than or equal to the first touch electrode 11 and the first common power line COM1.
  • the number of the touch traces 20 electrically connected between a common power line COM1, and the touch traces electrically connected between the second touch electrode 12 and the first common power line COM1 The number of wires 20 is greater than the number of touch wires 20 electrically connected between the third touch electrode 13 and the first common power line COM1. It should be noted that the number of touch traces 20 electrically connected between the touch electrode 10 and the first common power line COM1 directly affects the voltage state on the touch electrode 10.
  • the touch control circuit is electrically connected.
  • the wiring method of the line 20 This embodiment provides six different wiring methods of the first embodiment shown in FIGS. 5a to 5f, and six different wiring methods of the second embodiment shown in FIGS. 6a to 6f. Different wiring methods, as well as the six different wiring methods of the third embodiment as shown in FIG. 7a to FIG. 7f, in the application, you can choose one of the eighteen different wiring methods in the three embodiments. One or more for flexible application.
  • the characteristics of the touch wiring wiring method of each embodiment have been introduced in the above-mentioned embodiments, and the repetitive parts will not be repeated here, and only the differences will be described as follows:
  • the number of the dummy wiring 201 and the second touch electrode 12 are electrically connected to the driving chip IC.
  • the sum of the number of touch wires 20 is less than or equal to the number of the touch wires 20 of the first touch electrode 11 that are electrically connected to the driving chip IC, and is greater than the electrical property of the third touch electrode 13
  • the number of touch wires 20 connected to the driver chip IC is greater than the electrical property of the third touch electrode 13
  • the number of touch wires 20 connected to the driver chip IC are electrically connected to the driving chip IC.
  • the sum of the number of touch wires 20 is less than or equal to the number of the touch wires 20 of the first touch electrode 11 that are electrically connected to the driving chip IC, and is greater than the electrical property of the third touch electrode 13 The number of touch wires 20 connected to the driver chip IC.
  • the second touch electrode 12 is electrically connected to the first common power line COM1, and the second touch electrode 12 is electrically connected to the driving chip IC.
  • the wiring method of the touch wiring 20 is not limited to the above-mentioned eighteen kinds, and can be adaptively expanded based on the same technical concept in practical applications.
  • the first touch electrode 11 and the second touch electrode 12 are along the first The direction Y is arranged next to each other.
  • the number of the touch traces 20 electrically connected between the second touch electrode 12 and the drive chip IC is less than that between the first touch electrode 11 and the drive chip IC.
  • the number of the touch wires 20, and the number of the touch wires 20 electrically connected between the second touch electrode 12 and the first common power line COM1 is equal to the number of the first touch wires.
  • the second touch electrode 12 and the third touch electrode 13 are arranged adjacently along the first direction Y.
  • the number of the touch traces 20 that are electrically connected between the second touch electrode 12 and the drive chip IC is equal to the number of electrical connections between the third touch electrode 13 and the drive chip IC
  • the number of the touch wires 20, and the number of the touch wires 20 electrically connected between the second touch electrode 12 and the first common power line COM1 is greater than that of the third touch wires
  • the first touch electrode 11, the second touch electrode 12, and the third touch electrode 13 are arranged adjacent to each other in the first direction Y in order.
  • the number of the touch traces 20 electrically connected between the second touch electrode 12 and the drive chip IC is less than that between the first touch electrode 11 and the drive chip IC.
  • the number of the touch wires 20, the number of the touch wires 20 electrically connected between the second touch electrode 12 and the first common power line COM1 is equal to the number of the first touch electrodes 11
  • the number of control traces 20 is equal to the number of touch traces 20 electrically connected between the third touch electrode 13 and the drive chip IC, and the second touch electrode 12 is connected to the first
  • the number of the touch traces 20 electrically connected between the common power line COM1 is greater than the number of the touch traces 20 electrically connected between the third touch electrode 13 and the first common power line COM1 quantity.
  • the number of the touch traces 20 electrically connected between the second touch electrode 12 and the first common power line COM1 is two, and the number of the touch traces 20 electrically connected to the driver chip IC
  • the number of the touch wires 20 that are electrically connected is one; and the number of the touch wires 20 that are electrically connected between the first touch electrode 11 and the first common power line COM1, and The number of the touch wires 20 electrically connected to the driving chip IC is 2; and all the touch wires 20 electrically connected between the third touch electrode 13 and the first common power line COM1
  • the number of the touch wires 20 and the number of the touch wires 20 electrically connected to the driving chip IC are both one.
  • the wiring arrangement feature of the touch trace 20 of this embodiment realizes the touch trace 20 connected to the first touch electrode 11, the second touch electrode 12, and the third touch electrode 13.
  • the successive decrease in the number makes the voltage on the first touch electrode 11, the second touch electrode 12, and the third touch electrode 13 gradually decrease, which effectively avoids a large sudden change in voltage and makes the voltage distribution tend to be uniform.
  • the touch electrodes side by side with the first touch electrodes 11 constitute a first matrix 101
  • the second touch electrodes 12 The touch electrodes arranged side by side constitute the second matrix 102
  • the touch electrodes arranged side by side with the third touch electrodes 13 constitute the third matrix 103; wherein, at least part of the touch electrodes in the first matrix 101 and the first matrix 101
  • a touch electrode 11 has the same touch wiring and wiring characteristics
  • at least part of the touch electrodes in the second matrix 102 and the second touch electrode 12 have the same touch wiring and wiring characteristics
  • At least part of the touch electrodes in the three matrix 103 have the same touch wiring characteristics as the third touch electrodes 13.
  • the touch wiring and wiring characteristics of the touch electrodes in each matrix reference may be made to the above-mentioned embodiments, which will not be repeated here.
  • the electrical connection between the second touch electrode 12 and the first common power line COM1 The number of the touch wires 20 connected is 4, and the number of the touch wires 20 electrically connected to the driving chip IC is 2; and the first touch electrode 11 is The number of the touch wires 20 that are electrically connected between the first common power line COM1 and the number of the touch wires 20 that are electrically connected to the driver chip IC are both 4; and The number of the touch wires 20 electrically connected between the third touch electrode 13 and the first common power line COM1, and the number of touch wires electrically connected between the third touch electrode 13 and the first common power line COM1 The number of traces 20 is 2.
  • the wiring arrangement feature of the touch trace 20 of this embodiment realizes the touch trace 20 connected to the first touch electrode 11, the second touch electrode 12, and the third touch electrode 13.
  • the successive decrease of the number causes the voltage on the first touch electrode 11, the second touch electrode 12, and the third touch electrode 13 to gradually decrease, which effectively avoids a large sudden change in voltage and makes the voltage distribution tend to be uniform.
  • the touch electrodes side by side with the first touch electrodes 11 constitute a first matrix 101
  • the second touch electrodes 12 The touch electrodes arranged side by side constitute the second matrix 102
  • the touch electrodes arranged side by side with the third touch electrodes 13 constitute the third matrix 103; wherein, at least part of the touch electrodes in the first matrix 101 and the first matrix 101
  • a touch electrode 11 has the same touch wiring and wiring characteristics
  • at least part of the touch electrodes in the second matrix 102 and the second touch electrode 12 have the same touch wiring and wiring characteristics
  • At least part of the touch electrodes in the three matrix 103 have the same touch wiring characteristics as the third touch electrodes 13.
  • the touch wiring and wiring characteristics of the touch electrodes in each matrix reference may be made to the above-mentioned embodiments, which will not be repeated here.
  • the first common power line COM1 and the driver chip IC are respectively disposed corresponding to the non-display area NA, and are disposed in the contact area along the first direction Y. Control the opposite ends of the functional layer 03. Further, a second common power line COM2 is also provided on the same side of the driver chip IC, and the second common power line COM2 is electrically connected to the touch electrode 10 through the touch wire 20, In addition, the second common power line COM2 and the driving chip IC are connected to the same touch trace 20.
  • the touch trace 20 is electrically connected to the second common power line COM2 and the touch electrode 10 through a second switch transistor SW2, and the second switch transistor SW2 is used to control the second The electrical conduction state between the common power line COM2 and the touch electrode 10.
  • the first common power line COM1 and the second common power line COM2 respectively provide voltages to the touch electrodes 10 from both ends of the touch function layer 03, which can promote different touch electrodes. The voltage on 10 is equalized.
  • the thin film transistor array substrate provided by the embodiments of the present application includes a plurality of touch electrodes, and each of the touch electrodes is electrically connected to the first common power line and the driving chip through the touch traces.
  • the number of touch traces that are electrically connected between the touch electrode and the driving chip is reasonably configured to eliminate or reduce the difference in the number of touch traces connected to the first common power line and the driving chip on different touch electrodes.
  • the generated voltage mutation makes the voltage on the touch electrode and the common electrode in the thin film transistor array substrate tend to be the same, thereby improving the quality of the display screen.
  • the embodiments of the present application also provide a touch display panel, which includes the thin film transistor array substrate provided in the above embodiments.
  • the touch display panel may be a liquid crystal display panel, and further includes a color filter substrate disposed opposite to the thin film transistor array substrate, and liquid crystals disposed between the thin film transistor array substrate and the color filter substrate.
  • the touch display panel solves the problem of poor voltage uniformity of the common electrode caused by the sudden change in the number of touch wires connected to different touch electrodes, and can realize high-quality and balanced display.

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Abstract

一种薄膜晶体管阵列基板及触控显示面板，包括多个触控电极（10），所述触控电极（10）包括沿第一方向（Y）排列的第一触控电极（11）、第二触控电极（12）和第三触控电极（13）；第二触控电极（12）与驱动芯片（IC）之间电性连接的触控走线（20）数量大于或等于第一触控电极（11）与驱动芯片（IC）之间电性连接的触控走线（20）数量，且小于第三触控电极（13）与驱动芯片（IC）之间电性连接的触控走线（20）数量。

Description

薄膜晶体管阵列基板及触控显示面板
本申请要求于2020年04月30日提交中国专利局、申请号为202010364438.3、发明名称为“薄膜晶体管阵列基板及触控显示面板”的中国专利申请的优先权，其全部内容通过引用结合在本申请中。
技术领域
本申请涉及显示技术领域，尤其涉及一种薄膜晶体管阵列基板及触控显示面板。
 背景技术
随着触控显示技术的发展，内嵌式触控（In-cell Touch）显示面板越来越多地应用到手机等电子显示设备中。因内嵌式触控显示面板将触控功能与显示功能集成在一起，即将触控电路与显示电路均做在薄膜晶体管阵列基板（Thin Film Transistor Array Substrate, TFT Array Substrate）上，有利于穿透度的提升，且可以使手机等电子显示设备做得更加轻薄。
内嵌式触控显示面板的触控功能通过集成于薄膜晶体管阵列基板中触控电极及电连接触控电极的触控走线和驱动芯片来完成。其中，触控电极与薄膜晶体管阵列基板中的公共电极电性连接，因此，触控电极的电压变化将直接影响公共电极的电压状态，进而影响显示面板的显示功能。公共电源线和驱动芯片分别通过触控走线电性连接触控电极，从而实现对触控电极的电压传输和信号采集。但是，考虑到驱动芯片中用于连接触控走线的通道数目有限，以及触控走线数目对面板解析率的影响，实际生产中通常无法保证每一个触控电极均连接相同数目的触控走线，连接触控电极的触控走线数目对该触控电极上电压状态有直接影响，进而影响公共电极上的电压分布的均一性，造成显示面板出现上下分屏、显示不均的问题。
 技术问题
在薄膜晶体管阵列基板中，连接触控电极的触控走线数目对该触控电极和连接该触控电极的公共电极上的电压状态有直接影响，不同触控电极上连接触控走线数目的较大差异会对公共电极上的电压分布均一性产生不利影响，容易引起显示面板出现上下分屏、显示不均的问题。
 技术解决方案
为了解决上述技术问题，本申请提供的解决方案如下：
本申请提供一种薄膜晶体管阵列基板，包括：
衬底基板，具非显示区；
薄膜晶体管阵列层，设置于所述衬底基板上；以及
触控功能层，设置于所述薄膜晶体管阵列层中，包括多个触控电极，每个所述触控电极分别与第一公共电源线和驱动芯片均通过触控走线电性连接；
多个所述触控电极包括沿第一方向排列的第一触控电极、第二触控电极、以及第三触控电极，所述第二触控电极与所述驱动芯片之间电性连接的所述触控走线的数量大于或等于所述第一触控电极与所述驱动芯片之间电性连接的所述触控走线的数量，且所述第二触控电极与所述驱动芯片之间电性连接的所述触控走线的数量小于所述第三触控电极与所述驱动芯片之间电性连接的所述触控走线的数量；
或者，所述第二触控电极与所述驱动芯片之间电性连接的所述触控走线的数量小于所述第一触控电极与所述驱动芯片之间电性连接的所述触控走线的数量，且所述第二触控电极与所述驱动芯片之间电性连接的所述触控走线的数量大于或等于所述第三触控电极与所述驱动芯片之间电性连接的所述触控走线的数量。
在本申请的薄膜晶体管阵列基板中，所述第二触控电极与所述第一公共电源线之间电性连接的所述触控走线的数量大于所述第一触控电极与所述第一公共电源线之间电性连接的所述触控走线的数量，且所述第二触控电极与所述第一公共电源线之间电性连接的所述触控走线的数量小于或等于所述第三触控电极与所述第一公共电源线之间电性连接的所述触控走线的数量；
或者，所述第二触控电极与所述第一公共电源线之间电性连接的所述触控走线的数量小于或等于所述第一触控电极与所述第一公共电源线之间电性连接的所述触控走线的数量，且所述第二触控电极与所述第一公共电源线之间电性连接的所述触控走线的数量大于所述第三触控电极与所述第一公共电源线之间电性连接的所述触控走线的数量。
在本申请的薄膜晶体管阵列基板中，所述第二触控电极与所述驱动芯片之间电性连接的所述触控走线的数量大于或等于所述第一触控电极与所述驱动芯片之间电性连接的所述触控走线的数量，且所述第二触控电极与所述驱动芯片之间电性连接的所述触控走线的数量小于所述第三触控电极与所述驱动芯片之间电性连接的所述触控走线的数量；且
所述第二触控电极与所述第一公共电源线之间电性连接的所述触控走线的数量小于或等于所述第三触控电极与所述第一公共电源线之间电性连接的所述触控走线的数量，且所述第二触控电极与所述第一公共电源线之间电性连接的所述触控走线的数量大于所述第一触控电极与所述第一公共电源线之间电性连接的所述触控走线的数量。
在本申请的薄膜晶体管阵列基板中，所述第一触控电极与所述第二触控电极沿所述第一方向相邻排列，所述第二触控电极与所述驱动芯片之间电性连接的所述触控走线的数量等于所述第一触控电极与所述驱动芯片之间电性连接的所述触控走线的数量，且所述第二触控电极与所述第一公共电源线之间电性连接的所述触控走线的数量大于所述第一触控电极与所述第一公共电源线之间电性连接的所述触控走线的数量。
在本申请的薄膜晶体管阵列基板中，所述第二触控电极与所述第三触控电极沿所述第一方向相邻排列，所述第二触控电极与所述驱动芯片之间电性连接的所述触控走线的数量小于所述第三触控电极与所述驱动芯片之间电性连接的所述触控走线的数量，且所述第二触控电极与所述第一公共电源线之间电性连接的所述触控走线的数量等于所述第三触控电极与所述第一公共电源线之间电性连接的所述触控走线的数量。
在本申请的薄膜晶体管阵列基板中，所述第一触控电极、所述第二触控电极及所述第三触控电极沿所述第一方向依次相邻排列；
所述第二触控电极与所述驱动芯片之间电性连接的所述触控走线的数量等于所述第一触控电极与所述驱动芯片之间电性连接的所述触控走线的数量，所述第二触控电极与所述第一公共电源线之间电性连接的所述触控走线的数量大于所述第一触控电极与所述第一公共电源线之间电性连接的所述触控走线的数量；且
所述第二触控电极与所述驱动芯片之间电性连接的所述触控走线的数量小于所述第三触控电极与所述驱动芯片之间电性连接的所述触控走线的数量，所述第二触控电极与所述第一公共电源线之间电性连接的所述触控走线的数量等于所述第三触控电极与所述第一公共电源线之间电性连接的所述触控走线的数量。
在本申请的薄膜晶体管阵列基板中，所述第二触控电极与所述驱动芯片之间电性连接的所述触控走线的数量大于或等于所述第三触控电极与所述驱动芯片之间电性连接的所述触控走线的数量，且所述第二触控电极与所述驱动芯片之间电性连接的所述触控走线的数量小于所述第一触控电极与所述驱动芯片之间电性连接的所述触控走线的数量；且
所述第二触控电极与所述第一公共电源线之间电性连接的所述触控走线的数量小于或等于所述第一触控电极与所述第一公共电源线之间电性连接的所述触控走线的数量，且所述第二触控电极与所述第一公共电源线之间电性连接的所述触控走线的数量大于所述第三触控电极与所述第一公共电源线之间电性连接的所述触控走线的数量。
在本申请的薄膜晶体管阵列基板中，所述第一触控电极与所述第二触控电极沿所述第一方向相邻排列，所述第二触控电极与所述驱动芯片之间电性连接的所述触控走线的数量小于所述第一触控电极与所述驱动芯片之间电性连接的所述触控走线的数量，且所述第二触控电极与所述第一公共电源线之间电性连接的所述触控走线的数量等于所述第一触控电极与所述第一公共电源线之间电性连接的所述触控走线的数量。
在本申请的薄膜晶体管阵列基板中，所述第二触控电极与所述第三触控电极沿所述第一方向相邻排列，所述第二触控电极与所述驱动芯片之间电性连接的所述触控走线的数量等于所述第三触控电极与所述驱动芯片之间电性连接的所述触控走线的数量，且所述第二触控电极与所述第一公共电源线之间电性连接的所述触控走线的数量大于所述第三触控电极与所述第一公共电源线之间电性连接的所述触控走线的数量。
在本申请的薄膜晶体管阵列基板中，所述第一触控电极、所述第二触控电极及所述第三触控电极沿所述第一方向依次相邻排列；
所述第二触控电极与所述驱动芯片之间电性连接的所述触控走线的数量小于所述第一触控电极与所述驱动芯片之间电性连接的所述触控走线的数量，所述第二触控电极与所述第一公共电源线之间电性连接的所述触控走线的数量等于所述第一触控电极与所述第一公共电源线之间电性连接的所述触控走线的数量；且
所述第二触控电极与所述驱动芯片之间电性连接的所述触控走线的数量等于所述第三触控电极与所述驱动芯片之间电性连接的所述触控走线的数量，所述第二触控电极与所述第一公共电源线之间电性连接的所述触控走线的数量大于所述第三触控电极与所述第一公共电源线之间电性连接的所述触控走线的数量。
在本申请的薄膜晶体管阵列基板中，所述触控电极还包括沿所述第一方向设置于所述第二触控电极和所述驱动芯片之间的第四触控电极，所述第四触控电极上设置有虚拟走线，所述虚拟走线与所述第四触控电极电性连接。
在本申请的薄膜晶体管阵列基板中，设置于所述第四触控电极上的所述虚拟走线的数量与所述第二触控电极电性连接所述驱动芯片的所述触控走线的数量之和大于所述第一触控电极电性连接所述驱动芯片的所述触控走线数量，且小于或等于所述第三触控电极电性连接所述驱动芯片的所述触控走线数量；或
设置于所述第四触控电极上的所述虚拟走线的数量与所述第二触控电极电性连接所述驱动芯片的所述触控走线的数量之和小于或等于所述第一触控电极电性连接所述驱动芯片的所述触控走线数量，且大于所述第三触控电极电性连接所述驱动芯片的所述触控走线数量。
在本申请的薄膜晶体管阵列基板中，所述第二触控电极与驱动芯片之间设置有虚拟走线，所述虚拟走线的一端电性连接所述第二触控电极；
所述虚拟走线的数量与所述第二触控电极电性连接所述驱动芯片的所述触控走线的数量之和大于所述第一触控电极电性连接所述驱动芯片的所述触控走线数量，且小于或等于所述第三触控电极电性连接所述驱动芯片的所述触控走线数量；或
所述虚拟走线的数量与所述第二触控电极电性连接所述驱动芯片的所述触控走线的数量之和小于或等于所述第一触控电极电性连接所述驱动芯片的所述触控走线数量，且大于所述第三触控电极电性连接所述驱动芯片的所述触控走线数量。
在本申请的薄膜晶体管阵列基板中，所述薄膜晶体管阵列层包括设置于所述衬底基板上的有源层、设置于所述有源层上的栅极绝缘层、设置于所述栅极绝缘层上的栅极、设置于所述栅极上的层间绝缘层、以及设置于所述层间绝缘层上的源漏极；
所述源漏极上设置有第一绝缘层，所述第一绝缘层上设置有公共电极，所述公共电极上设置有第二绝缘层，所述第二绝缘层上设置有像素电极；
所述公共电极通过所述第一绝缘层上的过孔与所述触控电极电性连接，所述像素电极通过所述第一绝缘层和所述第二绝缘层上的过孔与所述源漏极电性连接。
在本申请的薄膜晶体管阵列基板中，所述第一公共电源线和所述驱动芯片均设置于所述非显示区，且沿所述第一方向设置于所述触控功能层的相对两端。
在本申请的薄膜晶体管阵列基板中，所述驱动芯片的同侧还设置有第二公共电源线，电性连接所述触控电极和所述驱动芯片的所述触控走线同时电性连接所述第二公共电源线。
在本申请的薄膜晶体管阵列基板中，连接所述触控电极与所述第一公共电源线的触控走线上设置有第一开关晶体管，连接所述触控电极与所述第二公共电源线的触控走线上设置有第二开关晶体管。
本申请还提供一种触控显示面板，包括薄膜晶体管阵列基板，所述薄膜晶体管阵列基板包括：
衬底基板，具非显示区；
薄膜晶体管阵列层，设置于所述衬底基板上；以及
触控功能层，设置于所述薄膜晶体管阵列层中，包括多个触控电极，每个所述触控电极分别与第一公共电源线和驱动芯片均通过触控走线电性连接；
多个所述触控电极包括沿第一方向排列的第一触控电极、第二触控电极、以及第三触控电极，所述第二触控电极与所述驱动芯片之间电性连接的所述触控走线的数量大于或等于所述第一触控电极与所述驱动芯片之间电性连接的所述触控走线的数量，且所述第二触控电极与所述驱动芯片之间电性连接的所述触控走线的数量小于所述第三触控电极与所述驱动芯片之间电性连接的所述触控走线的数量；
或者，所述第二触控电极与所述驱动芯片之间电性连接的所述触控走线的数量小于所述第一触控电极与所述驱动芯片之间电性连接的所述触控走线的数量，且所述第二触控电极与所述驱动芯片之间电性连接的所述触控走线的数量大于或等于所述第三触控电极与所述驱动芯片之间电性连接的所述触控走线的数量。
在本申请的触控显示面板中，所述触控显示面板还包括与所述薄膜晶体管阵列基板相对设置的彩膜基板，以及设置于所述薄膜晶体管阵列基板与所述彩膜基板之间的液晶。
本申请还提供一种触控显示面板，包括：薄膜晶体管阵列基板，与所述薄膜晶体管阵列基板相对设置的彩膜基板，以及设置于所述薄膜晶体管阵列基板与所述彩膜基板之间的液晶；
所述薄膜晶体管阵列基板，包括：
衬底基板，具非显示区；
薄膜晶体管阵列层，设置于所述衬底基板上；以及
触控功能层，设置于所述薄膜晶体管阵列层中，包括多个触控电极，每个所述触控电极分别与第一公共电源线和驱动芯片均通过触控走线电性连接；
多个所述触控电极包括沿第一方向排列的第一触控电极、第二触控电极、以及第三触控电极；其中，
所述第二触控电极与所述驱动芯片之间电性连接的所述触控走线的数量大于或等于所述第一触控电极与所述驱动芯片之间电性连接的所述触控走线的数量，且所述第二触控电极与所述驱动芯片之间电性连接的所述触控走线的数量小于所述第三触控电极与所述驱动芯片之间电性连接的所述触控走线的数量；且所述第二触控电极与所述第一公共电源线之间电性连接的所述触控走线的数量小于或等于所述第三触控电极与所述第一公共电源线之间电性连接的所述触控走线的数量，且所述第二触控电极与所述第一公共电源线之间电性连接的所述触控走线的数量大于所述第一触控电极与所述第一公共电源线之间电性连接的所述触控走线的数量；或
所述第二触控电极与所述驱动芯片之间电性连接的所述触控走线的数量大于或等于所述第三触控电极与所述驱动芯片之间电性连接的所述触控走线的数量，且所述第二触控电极与所述驱动芯片之间电性连接的所述触控走线的数量小于所述第一触控电极与所述驱动芯片之间电性连接的所述触控走线的数量；且所述第二触控电极与所述第一公共电源线之间电性连接的所述触控走线的数量小于或等于所述第一触控电极与所述第一公共电源线之间电性连接的所述触控走线的数量，且所述第二触控电极与所述第一公共电源线之间电性连接的所述触控走线的数量大于所述第三触控电极与所述第一公共电源线之间电性连接的所述触控走线的数量。
 有益效果
本申请通过对触控电极与第一公共电源线和驱动芯片之间电性连接的触控走线的数量进行合理配置，消除或减弱了不同触控电极上因连接第一公共电源线和驱动芯片的触控走线数量的差异而产生的电压突变，使薄膜晶体管阵列基板中的触控电极和公共电极上电压分布趋于一致，进而提升显示面板的显示品质。
 附图说明
为了更清楚地说明实施例或现有技术中的技术方案，下面将对实施例或现有技术描述中所需要使用的附图作简单介绍，显而易见地，下面描述中的附图仅仅是申请的一些实施例，对于本领域普通技术人员来讲，在不付出创造性劳动的前提下，还可以根据这些附图获得其他的附图。
图1是本申请实施例提供的薄膜晶体管阵列基板的局部截面示意图；
图2是本申请实施例提供的薄膜晶体管阵列基板的俯视图；
图3是本申请实施例提供的触控电极与第一公共电源线和驱动芯片之间电性连接的触控走线的第一种布线方式示意图；
图4是本申请实施例提供的触控电极与第一公共电源线和驱动芯片之间电性连接的触控走线的第二种布线方式示意图；
图5a是第二触控电极与第一公共电源线和驱动芯片之间电性连接的触控走线的第一种实施方式的第一布线方式示意图；
图5b是第二触控电极与第一公共电源线和驱动芯片之间电性连接的触控走线的第一种实施方式的第二布线方式示意图；
图5c是第二触控电极与第一公共电源线和驱动芯片之间电性连接的触控走线的第一种实施方式的第三布线方式示意图；
图5d是第二触控电极与第一公共电源线和驱动芯片之间电性连接的触控走线的第一种实施方式的第四布线方式示意图；
图5e是第二触控电极与第一公共电源线和驱动芯片之间电性连接的触控走线的第一种实施方式的第五布线方式示意图；
图5f是第二触控电极与第一公共电源线和驱动芯片之间电性连接的触控走线的第一种实施方式的第六布线方式示意图；
图6a是第二触控电极与第一公共电源线和驱动芯片之间电性连接的触控走线的第二种实施方式的第一布线方式示意图；
图6b是第二触控电极与第一公共电源线和驱动芯片之间电性连接的触控走线的第二种实施方式的第二布线方式示意图；
图6c是第二触控电极与第一公共电源线和驱动芯片之间电性连接的触控走线的第二种实施方式的第三布线方式示意图；
图6d是第二触控电极与第一公共电源线和驱动芯片之间电性连接的触控走线的第二种实施方式的第四布线方式示意图；
图6e是第二触控电极与第一公共电源线和驱动芯片之间电性连接的触控走线的第二种实施方式的第五布线方式示意图；
图6f是第二触控电极与第一公共电源线和驱动芯片之间电性连接的触控走线的第二种实施方式的第六布线方式示意图；
图7a是第二触控电极与第一公共电源线和驱动芯片之间电性连接的触控走线的第三种实施方式的第一布线方式示意图；
图7b是第二触控电极与第一公共电源线和驱动芯片之间电性连接的触控走线的第三种实施方式的第二布线方式示意图；
图7c是第二触控电极与第一公共电源线和驱动芯片之间电性连接的触控走线的第三种实施方式的第三布线方式示意图；
图7d是第二触控电极与第一公共电源线和驱动芯片之间电性连接的触控走线的第三种实施方式的第四布线方式示意图；
图7e是第二触控电极与第一公共电源线和驱动芯片之间电性连接的触控走线的第三种实施方式的第五布线方式示意图；
图7f是第二触控电极与第一公共电源线和驱动芯片之间电性连接的触控走线的第三种实施方式的第六布线方式示意图；
图8是本申请实施例提供的触控电极与第一公共电源线和驱动芯片之间电性连接的触控走线的第三种布线方式示意图；
图9是本申请实施例提供的触控电极与第一公共电源线和驱动芯片之间电性连接的触控走线的第四种布线方式示意图；
图10是本申请实施例提供的触控电极与第一公共电源线、第二公共电源线及驱动芯片电性连接的触控走线的布线方式示意图。
 本发明的实施方式
以下各实施例的说明是参考附加的图示，用以例示本申请可用以实施的特定实施例。本申请所提到的方向用语，例如[上]、[下]、[前]、[后]、[左]、[右]、[内]、[外]、[侧面]等，仅是参考附加图式的方向。因此，使用的方向用语是用以说明及理解本申请，而非用以限制本申请。在图中，结构相似的单元是用以相同标号表示。
本申请实施例提供一种薄膜晶体管阵列基板，包括多个触控电极，每个所述触控电极分别通过触控走线与第一公共电源线和驱动芯片电性连接，本申请实施例通过合理配置触控电极与驱动芯片之间电性连接的触控走线的数量，消除或减弱不同触控电极上因连接第一公共电源线和驱动芯片的触控走线数量的差异而产生的电压突变，使薄膜晶体管阵列基板中的触控电极和公共电极上电压趋于一致，提升显示画面的品质。
如图1和图2所示，其中，图1是本申请实施例提供的薄膜晶体管阵列基板的局部截面示意图，图2是本申请实施例提供的薄膜晶体管阵列基板的俯视图。所述薄膜晶体管阵列基板包括衬底基板01、设置于所述衬底基板01上的薄膜晶体管阵列层02、以及设置于所述薄膜晶体管阵列层02之上的公共电极04和像素电极05；所述薄膜晶体管阵列基板还包括设置于所述薄膜晶体管阵列层02中的触控功能层03，所述触控功能层03用于实现所述薄膜晶体管阵列基板的触控功能。
可选地，所述薄膜晶体管阵列层02包括设置于所述衬底基板01上的有源层021、设置于所述有源层上的栅极绝缘层022、设置于所述栅极绝缘层022上的栅极023、设置于所述栅极023上的层间绝缘层024、以及设置于所述层间绝缘层024上的源漏极025，所述触控电极10与所述源漏极025同层设置。所述薄膜晶体管阵列层02与所述公共电极04之间设置有第一绝缘层06，所述公共电极04与所述像素电极05之间设置有第二绝缘层07；所述像素电极05通过所述第一绝缘层06和所述第二绝缘层07上的过孔与所述源漏极025电性连接，从而实现由所述薄膜晶体管层02向所述像素电极05的信号传递；所述公共电极04通过所述第一绝缘层06上的过孔与所述触控电极10电性连接。
进一步地，所述触控功能层03包括多个触控电极10。所述衬底基板01具有显示区AA和非显示区NA，与所述非显示区NA相对应的位置设置有第一公共电源线COM1和驱动芯片IC；每个所述触控电极10分别与所述第一公共电源线COM1和所述驱动芯片IC均通过触控走线20电性连接，其中所述第一公共电源线COM1用于向所述触控电极10提供的公共电压信号，所述驱动芯片IC用于向所述触控电极10提供电压信号和进行信号采集分析。可选地，所述第一公共电源线COM1和所述驱动芯片IC分别设置于所述触控功能层03的相对两端，从而从两端同时向所述触控电极10提供电压信号。
如图3、图4、图5a至图5f、图6a至图6f、图7a至图7f所示，其中，图3是本申请实施例提供的触控电极与第一公共电源线和驱动芯片之间电性连接的触控走线的第一种布线方式示意图，图4是本申请实施例提供的触控电极与第一公共电源线和驱动芯片之间电性连接的触控走线的第二种布线方式示意图，图5a至图5f是第二触控电极与第一公共电源线和驱动芯片之间电性连接的触控走线的第一种实施方式的六种可供选择的布线方式示意图，图6a至图6f是第二触控电极与第一公共电源线和驱动芯片之间电性连接的触控走线的第二种实施方式的六种可供选择的布线方式示意图，图7a至图7f是第二触控电极与第一公共电源线和驱动芯片之间电性连接的触控走线的第三种实施方式的六种可供选择的布线方式示意图。
可选地，所述触控走线20通过第一开关晶体管SW1电性连接所述第一公共电源线COM1和所述触控电极10，所述第一开关晶体管SW1用于控制所述第一公共电源线COM1和所述触控电极10之间的电性导通状态。
多个所述触控电极10包括沿第一方向Y排列的第一触控电极11、第二触控电极12、以及第三触控电极13。
根据本申请一实施例，参考图3、图5a至图5f、图6a至图6f、图7a至图7f所示，所述第二触控电极12与所述驱动芯片IC之间电性连接的所述触控走线20的数量大于或等于所述第一触控电极11与所述驱动芯片IC之间电性连接的所述触控走线20的数量，且所述第二触控电极12与所述驱动芯片IC之间电性连接的所述触控走线20的数量小于所述第三触控电极13与所述驱动芯片IC之间电性连接的所述触控走线20的数量。需要说明的是，所述驱动芯片IC通过所述触控走线20向所述触控电极10传递电压信号和进行信号采集分析，所述触控电极10与所述驱动芯片IC之间电性连接的所述触控走线20的数量直接影响该触控电极10上的电压状态，而在实际生产中，考虑到驱动芯片IC的通道数目和显示面板解析率的因素，连接不同触控电极的触控走线的数量会有差异，本实施例通过将连接触控电极和驱动芯片的触控走线的数量进行上述合理配置，实现了第一触控电极11、第二触控电极12、及第三触控电极13上连接的触控走线20数量的阶梯性变化，避免了连接不同触控电极的触控走线数量的突变，该数量的突变会严重破坏触控电极和公共电极上电压分布的均匀性，本实施例有利于促使薄膜晶体管阵列基板中的触控电极和公共电极上电压分布趋于一致。
进一步地，所述第二触控电极12与所述第一公共电源线COM1之间电性连接的所述触控走线20的数量大于所述第一触控电极11与所述第一公共电源线COM1之间电性连接的所述触控走线20的数量，且所述第二触控电极12与所述第一公共电源线COM1之间电性连接的所述触控走线20的数量小于或等于所述第三触控电极13与所述第一公共电源线COM1之间电性连接的所述触控走线20的数量。需要说明的是，所述触控电极10与所述第一公共电源线COM1之间电性连接的所述触控走线20的数量直接影响该触控电极10上的电压状态，本实施例通过对连接触控电极和第一公共电源线的触控走线的数量进行上述合理配置，实现了第一触控电极11、第二触控电极12、及第三触控电极13上连接的触控走线20数量的阶梯性变化，避免了连接不同触控电极的触控走线数量的突变，使薄膜晶体管阵列基板中的触控电极和公共电极上电压分布趋于一致。
需要说明的是，关于所述第二触控电极12与所述第一公共电源线COM1、及所述第二触控电极12与所述驱动芯片IC之间电性连接的所述触控走线20的布线方式，本实施例提供了如图5a至图5f所示的第一种实施方式的六种不同布线方式、及如图6a至图6f所示的第二种实施方式的六种不同布线方式、以及如图7a至图7f所示的第三种实施方式的六种不同布线方式，在应用时，可任选该三种实施方式中的共十八中不同布线方式中的一种或多种进行灵活应用。
对于如图5a至图5f所示的第一种实施方式的六种不同布线方式，在图5a所示的第一布线方式TP11中，所述第二触控电极12与第一公共电源线COM1之间电性连接的所述触控走线20的数量为2，所述第二触控电极12与所述驱动芯片IC之间电性连接的所述触控走线20的数量为1；在图5b所示的第二布线方式TP12中，所述第二触控电极12与第一公共电源线COM1之间电性连接的所述触控走线20的数量为3，所述第二触控电极12与所述驱动芯片IC之间电性连接的所述触控走线20的数量为1；在图5c所示的第三布线方式TP13中，所述第二触控电极12与第一公共电源线COM1之间电性连接的所述触控走线20的数量为3，所述第二触控电极12与所述驱动芯片IC之间电性连接的所述触控走线20的数量为2；在图5d所示的第四布线方式TP14中，所述第二触控电极12与第一公共电源线COM1之间电性连接的所述触控走线20的数量为4，所述第二触控电极12与所述驱动芯片IC之间电性连接的所述触控走线20的数量为1；在图5e所示的第五布线方式TP15中，所述第二触控电极12与第一公共电源线COM1之间电性连接的所述触控走线20的数量为4，所述第二触控电极12与所述驱动芯片IC之间电性连接的所述触控走线20的数量为2；在图5f所示的第六布线方式TP16中，所述第二触控电极12与第一公共电源线COM1之间电性连接的所述触控走线20的数量为4，所述第二触控电极12与所述驱动芯片IC之间电性连接的所述触控走线20的数量为3。此外，需要说明的是，所述第二触控电极12与所述第一公共电源线COM1，及所述第二触控电极12与所述驱动芯片IC之间电性连接的所述触控走线20的第一种实施方式的布线方式不仅限于上述六种，在实际应用中可以基于相同的技术构思进行适应性扩展。
对于如图6a至图6f所示的第二种实施方式的六种不同布线方式，所述第二触控电极12与驱动芯片IC之间设置有虚拟走线201，所述虚拟走线201的一端电性连接所述第二触控电极12。具体地，所述虚拟走线201的数量与所述第二触控电极12电性连接所述驱动芯片IC的所述触控走线20的数量之和大于所述第一触控电极11电性连接所述驱动芯片IC的所述触控走线20数量，且小于或等于所述第三触控电极13电性连接所述驱动芯片IC的所述触控走线20数量。需要说明的是，所述虚拟走线201是通过将设置于所述第二触控电极12与所述驱动芯片IC之间的触控走线在靠近IC侧断开形成的；相对于图5a至图5f所示的第一种实施方式，本实施方式有利于简化触控走线的制作工艺。
在图6a所示的第一布线方式TP21中，所述第二触控电极12与第一公共电源线COM1之间电性连接的所述触控走线20的数量为2，所述第二触控电极12与所述驱动芯片IC之间电性连接的所述触控走线20的数量为1，所述虚拟走线201的数量为1；在图6b所示的第二布线方式TP22中，所述第二触控电极12与第一公共电源线COM1之间电性连接的所述触控走线20的数量为3，所述第二触控电极12与所述驱动芯片IC之间电性连接的所述触控走线20的数量为1，所述虚拟走线201的数量为2；在图6c所示的第三布线方式TP23中，所述第二触控电极12与第一公共电源线COM1之间电性连接的所述触控走线20的数量为3，所述第二触控电极12与所述驱动芯片IC之间电性连接的所述触控走线20的数量为2，所述虚拟走线201的数量为1；在图6d所示的第四布线方式TP24中，所述第二触控电极12与第一公共电源线COM1之间电性连接的所述触控走线20的数量为4，所述第二触控电极12与所述驱动芯片IC之间电性连接的所述触控走线20的数量为1，所述虚拟走线201的数量为3；在图6e所示的第五布线方式TP25中，所述第二触控电极12与第一公共电源线COM1之间电性连接的所述触控走线20的数量为4，所述第二触控电极12与所述驱动芯片IC之间电性连接的所述触控走线20的数量为2，所述虚拟走线201的数量为2；在图6f所示的第六布线方式TP26中，所述第二触控电极12与第一公共电源线COM1之间电性连接的所述触控走线20的数量为4，所述第二触控电极12与所述驱动芯片IC之间电性连接的所述触控走线20的数量为3，所述虚拟走线201的数量为1。此外，需要说明的是，所述第二触控电极12与所述第一公共电源线COM1，及所述第二触控电极12与所述驱动芯片IC之间电性连接的所述触控走线20的第二种实施方式的布线方式不仅限于上述六种，在实际应用中可以基于相同的技术构思进行适应性扩展。
对于如图7a至图7f所示的第三种实施方式的六种不同布线方式，所述触控电极20还包括沿所述第一方向Y设置于所述第二触控电极12和所述驱动芯片IC之间的第四触控电极14，所述第四触控电极14上设置有虚拟走线202，所述虚拟走线202与所述第四触控电极14电性连接。具体地，所述虚拟走线202的数量与所述第二触控电极12电性连接所述驱动芯片IC的所述触控走线20的数量之和大于所述第一触控电极11电性连接所述驱动芯片IC的所述触控走线20数量，且小于或等于所述第三触控电极13电性连接所述驱动芯片IC的所述触控走线20数量。进一步地，所述虚拟走线202在所述第四触控电极14上呈线段状设置，而不连接相邻的所述触控电极20。需要说明的是，所述虚拟走线202是通过将设置于所述第二触控电极12与所述驱动芯片IC之间的触控走线经过断开和焊接工艺制作而成。
在图7a所示的第一布线方式TP31中，所述第二触控电极12与第一公共电源线COM1之间电性连接的所述触控走线20的数量为2，所述第二触控电极12与所述驱动芯片IC之间电性连接的所述触控走线20的数量为1，所述虚拟走线202的数量为1；在图7b所示的第二布线方式TP32中，所述第二触控电极12与第一公共电源线COM1之间电性连接的所述触控走线20的数量为3，所述第二触控电极12与所述驱动芯片IC之间电性连接的所述触控走线20的数量为1，所述虚拟走线202的数量为2；在图7c所示的第三布线方式TP33中，所述第二触控电极12与第一公共电源线COM1之间电性连接的所述触控走线20的数量为3，所述第二触控电极12与所述驱动芯片IC之间电性连接的所述触控走线20的数量为2，所述虚拟走线202的数量为1；在图7d所示的第四布线方式TP34中，所述第二触控电极12与第一公共电源线COM1之间电性连接的所述触控走线20的数量为4，所述第二触控电极12与所述驱动芯片IC之间电性连接的所述触控走线20的数量为1，所述虚拟走线202的数量为3；在图7e所示的第五布线方式TP55中，所述第二触控电极12与第一公共电源线COM1之间电性连接的所述触控走线20的数量为4，所述第二触控电极12与所述驱动芯片IC之间电性连接的所述触控走线20的数量为2，所述虚拟走线202的数量为2；在图7f所示的第六布线方式TP66中，所述第二触控电极12与第一公共电源线COM1之间电性连接的所述触控走线20的数量为4，所述第二触控电极12与所述驱动芯片IC之间电性连接的所述触控走线20的数量为3，所述虚拟走线202的数量为1。此外，需要说明的是，所述第二触控电极12与所述第一公共电源线COM1，及所述第二触控电极12与所述驱动芯片IC之间电性连接的所述触控走线20的第三种实施方式的布线方式不仅限于上述六种，在实际应用中可以基于相同的技术构思进行适应性扩展。
可选地，参考图3、图5a至图5f、图6a至图6f、图7a至图7f所示，所述第一触控电极11与所述第二触控电极12沿所述第一方向Y相邻排列。所述第二触控电极12与所述驱动芯片IC之间电性连接的所述触控走线20的数量等于所述第一触控电极11与所述驱动芯片IC之间电性连接的所述触控走线20的数量，且所述第二触控电极12与所述第一公共电源线COM1之间电性连接的所述触控走线20的数量大于所述第一触控电极11与所述第一公共电源线COM1之间电性连接的所述触控走线20的数量。通过上述设置可实现相邻的所述第一触控电极11和所述第二触控电极12上连接的触控走线20数量的阶梯性变化，有利于所述第一触控电极11和所述第二触控电极12上电压分布趋于一致，有效避免了电压较大幅度突变。
可选地，所述第二触控电极12与所述第三触控电极13沿所述第一方向Y相邻排列。所述第二触控电极12与所述驱动芯片IC之间电性连接的所述触控走线20的数量小于所述第三触控电极13与所述驱动芯片IC之间电性连接的所述触控走线20的数量，且所述第二触控电极12与所述第一公共电源线COM1之间电性连接的所述触控走线20的数量等于所述第三触控电极13与所述第一公共电源线COM1之间电性连接的所述触控走线20的数量。通过上述设置可实现相邻的所述第二触控电极12和所述第三触控电极13上连接的触控走线20数量的阶梯性变化，有利于所述第二触控电极12和所述第三触控电极13上电压分布趋于一致，有效避免了电压较大幅度突变。
可选地，所述第一触控电极11、所述第二触控电极12及所述第三触控电极13沿所述第一方向Y依次相邻排列。所述第二触控电极12与所述驱动芯片IC之间电性连接的所述触控走线20的数量等于所述第一触控电极11与所述驱动芯片IC之间电性连接的所述触控走线20的数量，所述第二触控电极12与所述第一公共电源线COM1之间电性连接的所述触控走线20的数量大于所述第一触控电极11与所述第一公共电源线COM1之间电性连接的所述触控走线20的数量；且所述第二触控电极12与所述驱动芯片IC之间电性连接的所述触控走线20的数量小于所述第三触控电极13与所述驱动芯片IC之间电性连接的所述触控走线20的数量，且所述第二触控电极12与所述第一公共电源线COM1之间电性连接的所述触控走线20的数量等于所述第三触控电极13与所述第一公共电源线COM1之间电性连接的所述触控走线20的数量。通过上述设置可实现相邻的所述第一触控电极11、所述第二触控电极12和所述第三触控电极13上连接的触控走线20数量的阶梯性变化，有利于所述第一触控电极11、所述第二触控电极12和所述第三触控电极13上电压分布趋于一致，有效避免了电压较大幅度突变。
进一步可选地，所述第二触控电极12与所述第一公共电源线COM1之间电性连接的所述触控走线20的数量为2，而与所述驱动芯片IC之间电性连接的所述触控走线20的数量为1；且所述第一触控电极11与所述第一公共电源线COM1之间电性连接的所述触控走线20的数量，以及与所述驱动芯片IC之间电性连接的所述触控走线20的数量均为1；且所述第三触控电极13与所述第一公共电源线COM1之间电性连接的所述触控走线20的数量，以及与所述驱动芯片IC之间电性连接的所述触控走线20的数量均为2。应当理解的是，本实施例的触控走线20的布线设置特征，实现了第一触控电极11、第二触控电极12、及第三触控电极13上连接的触控走线20数量的依次递增，使第一触控电极11、第二触控电极12、及第三触控电极13上电压的逐步递增，有效避免了电压较大幅度突变，使电压分布趋于一致。
进一步可选地，所述第二触控电极12与所述第一公共电源线COM1之间电性连接的所述触控走线20的数量为4，而与所述驱动芯片IC之间电性连接的所述触控走线20的数量为2；且所述第一触控电极11与所述第一公共电源线COM1之间电性连接的所述触控走线20的数量，以及与所述驱动芯片IC之间电性连接的所述触控走线20的数量均为2；且所述第三触控电极13与所述第一公共电源线COM1之间电性连接的所述触控走线20的数量，以及与所述驱动芯片IC之间电性连接的所述触控走线20的数量均为4。应当理解的是，本实施例的触控走线20的布线设置特征，实现了第一触控电极11、第二触控电极12、及第三触控电极13上连接的触控走线20数量的依次递增，使第一触控电极11、第二触控电极12、及第三触控电极13上电压的逐步递增，有效避免了电压较大幅度突变，使电压分布趋于一致。
根据本申请一实施例，参考图4、图5a至图5f、图6a至图6f、图7a至图7f所示，所述第二触控电极12与所述驱动芯片IC之间电性连接的所述触控走线20的数量小于所述第一触控电极11与所述驱动芯片IC之间电性连接的所述触控走线20的数量，且所述第二触控电极12与所述驱动芯片IC之间电性连接的所述触控走线20的数量大于或等于所述第三触控电极13与所述驱动芯片IC之间电性连接的所述触控走线20的数量。需要说明的是，所述驱动芯片IC通过所述触控走线20向所述触控电极10传递电压信号和进行信号采集分析，所述触控电极10与所述驱动芯片IC之间电性连接的所述触控走线20的数量直接影响该触控电极10上的电压状态，而在实际生产中，考虑到驱动芯片IC的通道数目和显示面板解析率的因素，连接不同触控电极的触控走线的数量会有差异，本实施例通过将连接触控电极和驱动芯片的触控走线的数量进行上述合理配置，实现了第一触控电极11、第二触控电极12、及第三触控电极13上连接的触控走线20数量的阶梯性变化，避免了连接不同触控电极的触控走线数量的突变，该数量的突变会严重破坏触控电极和公共电极上电压分布的均匀性，本实施例有利于促使薄膜晶体管阵列基板中的触控电极和公共电极上电压分布趋于一致。
进一步地，所述第二触控电极12与所述第一公共电源线COM1之间电性连接的所述触控走线20的数量小于或等于所述第一触控电极11与所述第一公共电源线COM1之间电性连接的所述触控走线20的数量，且所述第二触控电极12与所述第一公共电源线COM1之间电性连接的所述触控走线20的数量大于所述第三触控电极13与所述第一公共电源线COM1之间电性连接的所述触控走线20的数量。需要说明的是，所述触控电极10与所述第一公共电源线COM1之间电性连接的所述触控走线20的数量直接影响该触控电极10上的电压状态，本实施例通过对连接触控电极和第一公共电源线的触控走线的数量进行上述合理配置，实现了第一触控电极11、第二触控电极12、及第三触控电极13上连接的触控走线20数量的阶梯性变化，避免了连接不同触控电极的触控走线数量的突变，使薄膜晶体管阵列基板中的触控电极和公共电极上电压分布趋于一致。
需要说明的是，关于所述第二触控电极12与所述第一公共电源线COM1、及所述第二触控电极12与所述驱动芯片IC之间电性连接的所述触控走线20的布线方式，本实施例提供了如图5a至图5f所示的第一种实施方式的六种不同布线方式、及如图6a至图6f所示的第二种实施方式的六种不同布线方式、以及如图7a至图7f所示的第三种实施方式的六种不同布线方式，在应用时，可任选该三种实施方式中的共十八中不同布线方式中的一种或多种进行灵活应用。关于各个实施方式的触控走线布线方式特征在上述实施例中已经介绍，此处针对重复部分不再赘述，仅针对其差异部分进行如下叙述：
对于如图6a至图6f所示的第二种实施方式的六种不同布线方式，所述虚拟走线201的数量与所述第二触控电极12电性连接所述驱动芯片IC的所述触控走线20的数量之和小于或等于所述第一触控电极11电性连接所述驱动芯片IC的所述触控走线20数量，且大于所述第三触控电极13电性连接所述驱动芯片IC的所述触控走线20数量。对于如图7a至图7f所示的第三种实施方式的六种不同布线方式，所述虚拟走线202的数量与所述第二触控电极12电性连接所述驱动芯片IC的所述触控走线20的数量之和小于或等于所述第一触控电极11电性连接所述驱动芯片IC的所述触控走线20数量，且大于所述第三触控电极13电性连接所述驱动芯片IC的所述触控走线20数量。
需要说明的是，本实施例中所述第二触控电极12与所述第一公共电源线COM1、及所述第二触控电极12与所述驱动芯片IC之间电性连接的所述触控走线20的布线方式不仅限于上述十八种，在实际应用中可以基于相同的技术构思进行适应性扩展。
可选地，参考图4、图5a至图5f、图6a至图6f、图7a至图7f所示，所述第一触控电极11与所述第二触控电极12沿所述第一方向Y相邻排列。所述第二触控电极12与所述驱动芯片IC之间电性连接的所述触控走线20的数量小于所述第一触控电极11与所述驱动芯片IC之间电性连接的所述触控走线20的数量，且所述第二触控电极12与所述第一公共电源线COM1之间电性连接的所述触控走线20的数量等于所述第一触控电极11与所述第一公共电源线COM1之间电性连接的所述触控走线20的数量。通过上述设置可实现相邻的所述第一触控电极11和所述第二触控电极12上连接的触控走线20数量的阶梯性变化，有利于所述第一触控电极11和所述第二触控电极12上电压分布趋于一致，有效避免了电压较大幅度突变。
可选地，所述第二触控电极12与所述第三触控电极13沿所述第一方向Y相邻排列。所述第二触控电极12与所述驱动芯片IC之间电性连接的所述触控走线20的数量等于所述第三触控电极13与所述驱动芯片IC之间电性连接的所述触控走线20的数量，且所述第二触控电极12与所述第一公共电源线COM1之间电性连接的所述触控走线20的数量大于所述第三触控电极13与所述第一公共电源线COM1之间电性连接的所述触控走线20的数量。通过上述设置可实现相邻的所述第二触控电极12和所述第三触控电极13上连接的触控走线20数量的阶梯性变化，有利于所述第二触控电极12和所述第三触控电极13上电压分布趋于一致，有效避免了电压较大幅度突变。
可选地，所述第一触控电极11、所述第二触控电极12及所述第三触控电极13沿所述第一方向Y依次相邻排列。所述第二触控电极12与所述驱动芯片IC之间电性连接的所述触控走线20的数量小于所述第一触控电极11与所述驱动芯片IC之间电性连接的所述触控走线20的数量，所述第二触控电极12与所述第一公共电源线COM1之间电性连接的所述触控走线20的数量等于所述第一触控电极11与所述第一公共电源线COM1之间电性连接的所述触控走线20的数量；且所述第二触控电极12与所述驱动芯片IC之间电性连接的所述触控走线20的数量等于所述第三触控电极13与所述驱动芯片IC之间电性连接的所述触控走线20的数量，所述第二触控电极12与所述第一公共电源线COM1之间电性连接的所述触控走线20的数量大于所述第三触控电极13与所述第一公共电源线COM1之间电性连接的所述触控走线20的数量。通过上述设置可实现相邻的所述第一触控电极11、所述第二触控电极12和所述第三触控电极13上连接的触控走线20数量的阶梯性变化，有利于所述第一触控电极11、所述第二触控电极12和所述第三触控电极13上电压分布趋于一致，有效避免了电压较大幅度突变。
进一步可选地，所述第二触控电极12与所述第一公共电源线COM1之间电性连接的所述触控走线20的数量为2，而与所述驱动芯片IC之间电性连接的所述触控走线20的数量为1；且所述第一触控电极11与所述第一公共电源线COM1之间电性连接的所述触控走线20的数量，以及与所述驱动芯片IC之间电性连接的所述触控走线20的数量均为2；且所述第三触控电极13与所述第一公共电源线COM1之间电性连接的所述触控走线20的数量，以及与所述驱动芯片IC之间电性连接的所述触控走线20的数量均为1。应当理解的是，本实施例的触控走线20的布线设置特征，实现了第一触控电极11、第二触控电极12、及第三触控电极13上连接的触控走线20数量的依次递减，使第一触控电极11、第二触控电极12、及第三触控电极13上电压的逐步递减，有效避免了电压较大幅度突变，使电压分布趋于一致。
进一步地，参考图4及图8所示，定义：在第二方向X上，与所述第一触控电极11并排的触控电极构成第一矩阵101，与所述第二触控电极12并排的触控电极构成第二矩阵102，与所述第三触控电极13并排的触控电极构成第三矩阵103；其中，所述第一矩阵101内的至少部分触控电极与所述第一触控电极11具有相同的触控走线布线特征；所述第二矩阵102内的至少部分触控电极与所述第二触控电极12具有相同的触控走线布线特征；所述第三矩阵103内的至少部分触控电极与所述第三触控电极13具有相同的触控走线布线特征。关于各个矩阵内的触控电极的触控走线布线特征可以参考上述实施例，此处不再赘述。
进一步可选地，参考图4、图5a至图5f、图6a至图6f、图7a至图7f所示，所述第二触控电极12与所述第一公共电源线COM1之间电性连接的所述触控走线20的数量为4，而与所述驱动芯片IC之间电性连接的所述触控走线20的数量为2；且所述第一触控电极11与所述第一公共电源线COM1之间电性连接的所述触控走线20的数量，以及与所述驱动芯片IC之间电性连接的所述触控走线20的数量均为4；且所述第三触控电极13与所述第一公共电源线COM1之间电性连接的所述触控走线20的数量，以及与所述驱动芯片IC之间电性连接的所述触控走线20的数量均为2。应当理解的是，本实施例的触控走线20的布线设置特征，实现了第一触控电极11、第二触控电极12、及第三触控电极13上连接的触控走线20数量的依次递减，使第一触控电极11、第二触控电极12、及第三触控电极13上电压的逐步递减，有效避免了电压较大幅度突变，使电压分布趋于一致。
进一步地，参考图4及图9所示，定义：在第二方向X上，与所述第一触控电极11并排的触控电极构成第一矩阵101，与所述第二触控电极12并排的触控电极构成第二矩阵102，与所述第三触控电极13并排的触控电极构成第三矩阵103；其中，所述第一矩阵101内的至少部分触控电极与所述第一触控电极11具有相同的触控走线布线特征；所述第二矩阵102内的至少部分触控电极与所述第二触控电极12具有相同的触控走线布线特征；所述第三矩阵103内的至少部分触控电极与所述第三触控电极13具有相同的触控走线布线特征。关于各个矩阵内的触控电极的触控走线布线特征可以参考上述实施例，此处不再赘述。
可选地，如图2及图10所示，所述第一公共电源线COM1和所述驱动芯片IC分别对应所述非显示区NA设置，且沿所述第一方向Y设置于所述触控功能层03的相对两端。进一步地，所述驱动芯片IC的同侧还设置有第二公共电源线COM2，所述第二公共电源线COM2与所述触控电极10之间通过所述触控走线20电性连接，且所述第二公共电源线COM2与所述驱动芯片IC连接相同的所述触控走线20。可选地，所述触控走线20通过第二开关晶体管SW2电性连接所述第二公共电源线COM2和所述触控电极10，所述第二开关晶体管SW2用于控制所述第二公共电源线COM2和所述触控电极10之间的电性导通状态。需要说明的是，所述第一公共电源线COM1和所述第二公共电源线COM2分别从所述触控功能层03的两端向所述触控电极10提供电压，可促进不同触控电极10上的电压均衡。
综上所述，本申请实施例提供的薄膜晶体管阵列基板包括多个触控电极，每个所述触控电极分别通过触控走线与第一公共电源线和驱动芯片电性连接，通过对触控电极与驱动芯片之间电性连接的触控走线的数量进行合理配置，消除或减弱了不同触控电极上因连接第一公共电源线和驱动芯片的触控走线数量的差异而产生的电压突变，使薄膜晶体管阵列基板中的触控电极和公共电极上电压趋于一致，进而提升显示画面的品质。
本申请实施例还提供一种触控显示面板，该触控显示面板包括上述实施例所提供的薄膜晶体管阵列基板。该触控显示面板可以是液晶显示面板，从而进一步包括与所述薄膜晶体管阵列基板相对设置的彩膜基板，以及设置于所述薄膜晶体管阵列基板与所述彩膜基板之间的液晶。该触控显示面板解决了因连接不同触控电极的触控走线数量突变而引起的公共电极的电压均一性差的问题，可实现高品质、均衡显示。
需要说明的是，虽然本申请以具体实施例揭露如上，但上述实施例并非用以限制本申请，本领域的普通技术人员，在不脱离本申请的精神和范围内，均可作各种更动与润饰，因此本申请的保护范围以权利要求界定的范围为准。

Claims (20)

  1. 一种薄膜晶体管阵列基板，其包括：
    衬底基板，具非显示区；
    薄膜晶体管阵列层，设置于所述衬底基板上；以及
    触控功能层，设置于所述薄膜晶体管阵列层中，包括多个触控电极，每个所述触控电极分别与第一公共电源线和驱动芯片均通过触控走线电性连接；
    多个所述触控电极包括沿第一方向排列的第一触控电极、第二触控电极、以及第三触控电极，所述第二触控电极与所述驱动芯片之间电性连接的所述触控走线的数量大于或等于所述第一触控电极与所述驱动芯片之间电性连接的所述触控走线的数量，且所述第二触控电极与所述驱动芯片之间电性连接的所述触控走线的数量小于所述第三触控电极与所述驱动芯片之间电性连接的所述触控走线的数量；
    或者，所述第二触控电极与所述驱动芯片之间电性连接的所述触控走线的数量小于所述第一触控电极与所述驱动芯片之间电性连接的所述触控走线的数量，且所述第二触控电极与所述驱动芯片之间电性连接的所述触控走线的数量大于或等于所述第三触控电极与所述驱动芯片之间电性连接的所述触控走线的数量。
  2. 根据权利要求1所述的薄膜晶体管阵列基板，其中，
    所述第二触控电极与所述第一公共电源线之间电性连接的所述触控走线的数量大于所述第一触控电极与所述第一公共电源线之间电性连接的所述触控走线的数量，且所述第二触控电极与所述第一公共电源线之间电性连接的所述触控走线的数量小于或等于所述第三触控电极与所述第一公共电源线之间电性连接的所述触控走线的数量；
    或者，所述第二触控电极与所述第一公共电源线之间电性连接的所述触控走线的数量小于或等于所述第一触控电极与所述第一公共电源线之间电性连接的所述触控走线的数量，且所述第二触控电极与所述第一公共电源线之间电性连接的所述触控走线的数量大于所述第三触控电极与所述第一公共电源线之间电性连接的所述触控走线的数量。
  3. 根据权利要求2所述的薄膜晶体管阵列基板，其中，所述第二触控电极与所述驱动芯片之间电性连接的所述触控走线的数量大于或等于所述第一触控电极与所述驱动芯片之间电性连接的所述触控走线的数量，且所述第二触控电极与所述驱动芯片之间电性连接的所述触控走线的数量小于所述第三触控电极与所述驱动芯片之间电性连接的所述触控走线的数量；且
    所述第二触控电极与所述第一公共电源线之间电性连接的所述触控走线的数量小于或等于所述第三触控电极与所述第一公共电源线之间电性连接的所述触控走线的数量，且所述第二触控电极与所述第一公共电源线之间电性连接的所述触控走线的数量大于所述第一触控电极与所述第一公共电源线之间电性连接的所述触控走线的数量。
  4. 根据权利要求3所述的薄膜晶体管阵列基板，其中，所述第一触控电极与所述第二触控电极沿所述第一方向相邻排列，所述第二触控电极与所述驱动芯片之间电性连接的所述触控走线的数量等于所述第一触控电极与所述驱动芯片之间电性连接的所述触控走线的数量，且所述第二触控电极与所述第一公共电源线之间电性连接的所述触控走线的数量大于所述第一触控电极与所述第一公共电源线之间电性连接的所述触控走线的数量。
  5. 根据权利要求3所述的薄膜晶体管阵列基板，其中，所述第二触控电极与所述第三触控电极沿所述第一方向相邻排列，所述第二触控电极与所述驱动芯片之间电性连接的所述触控走线的数量小于所述第三触控电极与所述驱动芯片之间电性连接的所述触控走线的数量，且所述第二触控电极与所述第一公共电源线之间电性连接的所述触控走线的数量等于所述第三触控电极与所述第一公共电源线之间电性连接的所述触控走线的数量。
  6. 根据权利要求3所述的薄膜晶体管阵列基板，其中，所述第一触控电极、所述第二触控电极及所述第三触控电极沿所述第一方向依次相邻排列；
    所述第二触控电极与所述驱动芯片之间电性连接的所述触控走线的数量等于所述第一触控电极与所述驱动芯片之间电性连接的所述触控走线的数量，所述第二触控电极与所述第一公共电源线之间电性连接的所述触控走线的数量大于所述第一触控电极与所述第一公共电源线之间电性连接的所述触控走线的数量；且
    所述第二触控电极与所述驱动芯片之间电性连接的所述触控走线的数量小于所述第三触控电极与所述驱动芯片之间电性连接的所述触控走线的数量，所述第二触控电极与所述第一公共电源线之间电性连接的所述触控走线的数量等于所述第三触控电极与所述第一公共电源线之间电性连接的所述触控走线的数量。
  7. 根据权利要求2所述的薄膜晶体管阵列基板，其中，所述第二触控电极与所述驱动芯片之间电性连接的所述触控走线的数量大于或等于所述第三触控电极与所述驱动芯片之间电性连接的所述触控走线的数量，且所述第二触控电极与所述驱动芯片之间电性连接的所述触控走线的数量小于所述第一触控电极与所述驱动芯片之间电性连接的所述触控走线的数量；且
    所述第二触控电极与所述第一公共电源线之间电性连接的所述触控走线的数量小于或等于所述第一触控电极与所述第一公共电源线之间电性连接的所述触控走线的数量，且所述第二触控电极与所述第一公共电源线之间电性连接的所述触控走线的数量大于所述第三触控电极与所述第一公共电源线之间电性连接的所述触控走线的数量。
  8. 根据权利要求7所述的薄膜晶体管阵列基板，其中，所述第一触控电极与所述第二触控电极沿所述第一方向相邻排列，所述第二触控电极与所述驱动芯片之间电性连接的所述触控走线的数量小于所述第一触控电极与所述驱动芯片之间电性连接的所述触控走线的数量，且所述第二触控电极与所述第一公共电源线之间电性连接的所述触控走线的数量等于所述第一触控电极与所述第一公共电源线之间电性连接的所述触控走线的数量。
  9. 根据权利要求7所述的薄膜晶体管阵列基板，其中，所述第二触控电极与所述第三触控电极沿所述第一方向相邻排列，所述第二触控电极与所述驱动芯片之间电性连接的所述触控走线的数量等于所述第三触控电极与所述驱动芯片之间电性连接的所述触控走线的数量，且所述第二触控电极与所述第一公共电源线之间电性连接的所述触控走线的数量大于所述第三触控电极与所述第一公共电源线之间电性连接的所述触控走线的数量。
  10. 根据权利要求7所述的薄膜晶体管阵列基板，其中，所述第一触控电极、所述第二触控电极及所述第三触控电极沿所述第一方向依次相邻排列；
    所述第二触控电极与所述驱动芯片之间电性连接的所述触控走线的数量小于所述第一触控电极与所述驱动芯片之间电性连接的所述触控走线的数量，所述第二触控电极与所述第一公共电源线之间电性连接的所述触控走线的数量等于所述第一触控电极与所述第一公共电源线之间电性连接的所述触控走线的数量；且
    所述第二触控电极与所述驱动芯片之间电性连接的所述触控走线的数量等于所述第三触控电极与所述驱动芯片之间电性连接的所述触控走线的数量，所述第二触控电极与所述第一公共电源线之间电性连接的所述触控走线的数量大于所述第三触控电极与所述第一公共电源线之间电性连接的所述触控走线的数量。
  11. 根据权利要求1所述的薄膜晶体管阵列基板，其中，所述触控电极还包括沿所述第一方向设置于所述第二触控电极和所述驱动芯片之间的第四触控电极，所述第四触控电极上设置有虚拟走线，所述虚拟走线与所述第四触控电极电性连接。
  12. 根据权利要求11所述的薄膜晶体管阵列基板，其中，设置于所述第四触控电极上的所述虚拟走线的数量与所述第二触控电极电性连接所述驱动芯片的所述触控走线的数量之和大于所述第一触控电极电性连接所述驱动芯片的所述触控走线数量，且小于或等于所述第三触控电极电性连接所述驱动芯片的所述触控走线数量；或
    设置于所述第四触控电极上的所述虚拟走线的数量与所述第二触控电极电性连接所述驱动芯片的所述触控走线的数量之和小于或等于所述第一触控电极电性连接所述驱动芯片的所述触控走线数量，且大于所述第三触控电极电性连接所述驱动芯片的所述触控走线数量。
  13. 根据权利要求1所述的薄膜晶体管阵列基板，其中，所述第二触控电极与驱动芯片之间设置有虚拟走线，所述虚拟走线的一端电性连接所述第二触控电极；
    所述虚拟走线的数量与所述第二触控电极电性连接所述驱动芯片的所述触控走线的数量之和大于所述第一触控电极电性连接所述驱动芯片的所述触控走线数量，且小于或等于所述第三触控电极电性连接所述驱动芯片的所述触控走线数量；或
    所述虚拟走线的数量与所述第二触控电极电性连接所述驱动芯片的所述触控走线的数量之和小于或等于所述第一触控电极电性连接所述驱动芯片的所述触控走线数量，且大于所述第三触控电极电性连接所述驱动芯片的所述触控走线数量。
  14. 根据权利要求1所述的薄膜晶体管阵列基板，其中，所述薄膜晶体管阵列层包括设置于所述衬底基板上的有源层、设置于所述有源层上的栅极绝缘层、设置于所述栅极绝缘层上的栅极、设置于所述栅极上的层间绝缘层、以及设置于所述层间绝缘层上的源漏极；
    所述源漏极上设置有第一绝缘层，所述第一绝缘层上设置有公共电极，所述公共电极上设置有第二绝缘层，所述第二绝缘层上设置有像素电极；
    所述公共电极通过所述第一绝缘层上的过孔与所述触控电极电性连接，所述像素电极通过所述第一绝缘层和所述第二绝缘层上的过孔与所述源漏极电性连接。
  15. 根据权利要求1所述的薄膜晶体管阵列基板，其中，所述第一公共电源线和所述驱动芯片均设置于所述非显示区，且沿所述第一方向设置于所述触控功能层的相对两端。
  16. 根据权利要求15所述的薄膜晶体管阵列基板，其中，所述驱动芯片的同侧还设置有第二公共电源线，电性连接所述触控电极和所述驱动芯片的所述触控走线同时电性连接所述第二公共电源线。
  17. 根据权利要求16所述的薄膜晶体管阵列基板，其中，连接所述触控电极与所述第一公共电源线的触控走线上设置有第一开关晶体管，连接所述触控电极与所述第二公共电源线的触控走线上设置有第二开关晶体管。
  18. 一种触控显示面板，其包括薄膜晶体管阵列基板，所述薄膜晶体管阵列基板包括：
    衬底基板，具非显示区；
    薄膜晶体管阵列层，设置于所述衬底基板上；以及
    触控功能层，设置于所述薄膜晶体管阵列层中，包括多个触控电极，每个所述触控电极分别与第一公共电源线和驱动芯片均通过触控走线电性连接；
    多个所述触控电极包括沿第一方向排列的第一触控电极、第二触控电极、以及第三触控电极，所述第二触控电极与所述驱动芯片之间电性连接的所述触控走线的数量大于或等于所述第一触控电极与所述驱动芯片之间电性连接的所述触控走线的数量，且所述第二触控电极与所述驱动芯片之间电性连接的所述触控走线的数量小于所述第三触控电极与所述驱动芯片之间电性连接的所述触控走线的数量；
    或者，所述第二触控电极与所述驱动芯片之间电性连接的所述触控走线的数量小于所述第一触控电极与所述驱动芯片之间电性连接的所述触控走线的数量，且所述第二触控电极与所述驱动芯片之间电性连接的所述触控走线的数量大于或等于所述第三触控电极与所述驱动芯片之间电性连接的所述触控走线的数量。
  19. 根据权利要求18所述的触控显示面板，其中，还包括与所述薄膜晶体管阵列基板相对设置的彩膜基板，以及设置于所述薄膜晶体管阵列基板与所述彩膜基板之间的液晶。
  20. 一种触控显示面板，其包括：薄膜晶体管阵列基板，与所述薄膜晶体管阵列基板相对设置的彩膜基板，以及设置于所述薄膜晶体管阵列基板与所述彩膜基板之间的液晶；
    所述薄膜晶体管阵列基板，包括：
    衬底基板，具非显示区；
    薄膜晶体管阵列层，设置于所述衬底基板上；以及
    触控功能层，设置于所述薄膜晶体管阵列层中，包括多个触控电极，每个所述触控电极分别与第一公共电源线和驱动芯片均通过触控走线电性连接；
    多个所述触控电极包括沿第一方向排列的第一触控电极、第二触控电极、以及第三触控电极；其中，
    所述第二触控电极与所述驱动芯片之间电性连接的所述触控走线的数量大于或等于所述第一触控电极与所述驱动芯片之间电性连接的所述触控走线的数量，且所述第二触控电极与所述驱动芯片之间电性连接的所述触控走线的数量小于所述第三触控电极与所述驱动芯片之间电性连接的所述触控走线的数量；且所述第二触控电极与所述第一公共电源线之间电性连接的所述触控走线的数量小于或等于所述第三触控电极与所述第一公共电源线之间电性连接的所述触控走线的数量，且所述第二触控电极与所述第一公共电源线之间电性连接的所述触控走线的数量大于所述第一触控电极与所述第一公共电源线之间电性连接的所述触控走线的数量；或
    所述第二触控电极与所述驱动芯片之间电性连接的所述触控走线的数量大于或等于所述第三触控电极与所述驱动芯片之间电性连接的所述触控走线的数量，且所述第二触控电极与所述驱动芯片之间电性连接的所述触控走线的数量小于所述第一触控电极与所述驱动芯片之间电性连接的所述触控走线的数量；且所述第二触控电极与所述第一公共电源线之间电性连接的所述触控走线的数量小于或等于所述第一触控电极与所述第一公共电源线之间电性连接的所述触控走线的数量，且所述第二触控电极与所述第一公共电源线之间电性连接的所述触控走线的数量大于所述第三触控电极与所述第一公共电源线之间电性连接的所述触控走线的数量。
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