WO2021203470A1 - 电路驱动***、驱动芯片及显示装置 - Google Patents

电路驱动***、驱动芯片及显示装置 Download PDF

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Publication number
WO2021203470A1
WO2021203470A1 PCT/CN2020/085794 CN2020085794W WO2021203470A1 WO 2021203470 A1 WO2021203470 A1 WO 2021203470A1 CN 2020085794 W CN2020085794 W CN 2020085794W WO 2021203470 A1 WO2021203470 A1 WO 2021203470A1
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WIPO (PCT)
Prior art keywords
unit
driving
control unit
time
signal
Prior art date
Application number
PCT/CN2020/085794
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English (en)
French (fr)
Inventor
方晓莉
肖光星
Original Assignee
Tcl华星光电技术有限公司
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Publication date
Application filed by Tcl华星光电技术有限公司 filed Critical Tcl华星光电技术有限公司
Priority to US16/758,407 priority Critical patent/US11670214B2/en
Publication of WO2021203470A1 publication Critical patent/WO2021203470A1/zh

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Classifications

    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/2092—Details of a display terminals using a flat panel, the details relating to the control arrangement of the display terminal and to the interfaces thereto
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
    • G09G2310/0264—Details of driving circuits
    • G09G2310/0286—Details of a shift registers arranged for use in a driving circuit
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/08—Details of timing specific for flat panels, other than clock recovery
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2330/00—Aspects of power supply; Aspects of display protection and defect management
    • G09G2330/02—Details of power systems and of start or stop of display operation
    • G09G2330/026—Arrangements or methods related to booting a display

Definitions

  • This application relates to the field of display technology, and in particular to a circuit driving system, a driving chip and a display device.
  • the circuit drive system of the display panel is used to drive the display panel for screen display.
  • the power provided by the external power supply will wake up multiple functional modules of the circuit drive system at the same time.
  • the power provided by the external power supply usually has a constant power.
  • the process of waking up each functional module A relatively large current will be generated during the process, which will result in a significant decrease in the voltage applied to each functional module by the external power supply. That is, the voltage V applied to the circuit drive system during the turn-on phase of the display panel as shown in FIG. 1 will appear to be large. The issue of amplitude fluctuations.
  • the abnormal fluctuation of the voltage will further cause the initial value of some sensitive registers in the circuit driving system to be changed, resulting in abnormal output of the circuit driving system and abnormal display of the display panel.
  • the prior art adopts the method of adding a voltage stabilizing capacitor inside or outside the circuit drive system to prevent the initial value of the register from being changed, but this method cannot fundamentally prevent the occurrence of the above problems, and will greatly increase the complexity and manufacturing of the circuit. cost.
  • the present application provides a circuit driving system, which is applied to display driving of a display panel, and includes a timing control unit, a driving unit, and a time-sharing switch unit;
  • the timing control unit is used to generate a clock signal to control the working timing of the driving unit
  • the driving unit is used to provide a driving signal to the display unit of the display panel to control the display function of the display panel;
  • the time-sharing switch unit is used to turn on or off the timing control unit and the driving unit in time intervals under external input or internal program control.
  • the driving signal provided by the driving unit is a gate driving signal that acts on the gate of the switching transistor of the display unit.
  • the driving signal provided by the driving unit is a data signal acting on the source of the switching transistor of the display unit.
  • the time-sharing switch unit controls the timing control unit to be turned on in preference to the driving unit.
  • the opening time of the timing control unit is 50 microseconds earlier than the opening time of the driving unit To 200 microseconds.
  • the opening time of the timing control unit is 100 microseconds earlier than the opening time of the driving unit .
  • the clock signal generated by the timing control unit is a square wave signal, and the driving unit captures the rising edge of the clock signal as a valid trigger signal.
  • the time-sharing switch unit controls the timing control unit to turn on or off by transmitting a first switch signal to the timing control unit.
  • the time-sharing switch unit controls the driving unit to be turned on or off by transmitting a second switch signal to the driving unit.
  • the driving unit includes a shift register, a logic control unit, and an output unit;
  • the shift register is electrically connected to the time-sharing switch unit, and the time-sharing switch unit controls the on or off of the shift register.
  • the shift register is used to receive and store a start signal, and The start signal is transmitted to the logic control unit;
  • the logic control unit is electrically connected to the timing control unit, and the logic control unit performs logic operations on the clock signal provided by the timing control unit and the start signal transmitted by the shift register, and provides the output unit with output signal;
  • the output unit outputs the driving signal according to the output signal provided by the logic control unit.
  • the present application also provides a driving chip, which is applied to display driving of a display panel, and the driving chip includes:
  • a driving unit for providing a driving signal to the display unit of the display panel to control the display function of the display panel
  • the time-sharing switch unit is used to open or close the drive unit under external input or internal program control.
  • the driving unit includes:
  • Shift register used to receive and store the start signal
  • a logic control unit electrically connected to the shift register, the logic control unit receives a clock signal, and performs logic operations on the clock signal and the start signal to generate an output signal;
  • the output unit is electrically connected to the logic control unit, and is configured to output the driving signal according to the output signal provided by the logic control unit.
  • the time-sharing switch unit is electrically connected to the shift register, and the time-sharing switch unit controls the on/off state of the shift register to turn on or off the drive unit.
  • the time for the time-sharing switch unit to turn on the driving unit is delayed by 50 microseconds to 200 microseconds from the time when the logic control unit first receives the clock signal.
  • the time for the time-sharing switch unit to turn on the driving unit is delayed by 100 microseconds from the time when the logic control unit first receives the clock signal.
  • the present application also provides a display device, including a display panel, and the display device further includes: the circuit driving system as described above, and the circuit driving system is used to drive the display panel for display.
  • the opening time of the timing control unit is 50 microseconds earlier than the opening time of the driving unit. 200 microseconds.
  • the driving unit includes a shift register, a logic control unit, and an output unit;
  • the shift register is electrically connected to the time-sharing switch unit, and the time-sharing switch unit controls the on or off of the shift register.
  • the shift register is used to receive and store a start signal, and The start signal is transmitted to the logic control unit;
  • the logic control unit is electrically connected to the timing control unit, and the logic control unit performs logic operations on the clock signal provided by the timing control unit and the start signal transmitted by the shift register, and provides the output unit with output signal;
  • the output unit outputs the driving signal according to the output signal provided by the logic control unit.
  • Another display device of the present application includes a display panel, the display device further includes a drive chip, the drive chip is used to drive the display panel to display; the drive chip includes:
  • a driving unit for providing a driving signal to the display unit of the display panel to control the display function of the display panel
  • the time-sharing switch unit is used to open or close the drive unit under external input or internal program control.
  • the driving unit includes:
  • Shift register used to receive and store the start signal
  • a logic control unit electrically connected to the shift register, the logic control unit receives a clock signal, and performs logic operations on the clock signal and the start signal to generate an output signal;
  • An output unit electrically connected to the logic control unit, and configured to output the driving signal according to the output signal provided by the logic control unit;
  • the time-sharing switch unit is electrically connected to the shift register, and the time-sharing switch unit controls the on/off state of the shift register to turn on or off the driving unit.
  • a time-sharing switch unit is provided in the circuit drive system and the drive chip, and the time-sharing switch unit is used to control the on-off state of the drive unit, so as to realize that the timing control unit and the drive unit in the circuit drive system are turned on step by step, thereby avoiding the display panel
  • the abnormal output of the driving unit caused by the unstable voltage signal at the initial stage of startup is beneficial to the high-quality display of the display panel.
  • FIG. 1 is a schematic diagram of a large fluctuation of the voltage applied to the circuit driving system during the turn-on phase of the display panel in the prior art
  • FIG. 2 is a structural diagram of a circuit driving system provided by an embodiment of the present application.
  • 3 is a timing diagram of the input and output of each unit in the opening phase of the circuit drive system provided by the embodiment of the present application;
  • FIG. 4 is a structural diagram of a driving unit provided by an embodiment of the present application.
  • FIG. 5 is a structural diagram of a driving chip connected to a timing control unit provided by an embodiment of the present application.
  • the embodiment of the application provides a circuit drive system.
  • the time-sharing switch unit is used to control the switching state of the drive unit, thereby realizing the timing control unit and the drive unit separation in the circuit drive system. Step-on, avoiding the abnormal output of the driving unit caused by the unstable voltage signal in the initial stage of the display panel startup, which is conducive to the high-quality display of the display panel.
  • the circuit driving system includes a timing control unit 10, a driving unit 20 and a time-sharing switch unit 30. It should be noted that the circuit driving system is applied to the display driving of the display panel, wherein the driving signal 201 output by the driving unit 20 acts on the display unit of the display panel.
  • the driving signal 201 may be It is a gate drive signal acting on the gate of the corresponding switch transistor of the display unit to control the on state of the switch transistor; the drive signal 201 can also be the source of the corresponding switch transistor acting on the display unit
  • the data signal on the pole is used to provide display data information for the display unit.
  • the timing control unit 10 is used to generate a clock signal 101, and the clock signal 101 is used to control the working timing of the driving unit 20.
  • the clock signal 101 may be a square wave signal
  • the driving unit 20 captures the rising edge of the clock signal 101 as a valid trigger signal, and performs logical calculations on the captured clock signal 101 to output The driving signal 201.
  • the driving unit 20 is used to provide the driving signal 201 to the display unit of the display panel, and the driving signal 201 directly acts on the display panel or the display unit of the display panel, thereby controlling the display The display function of the panel.
  • the driving signal 201 may be a gate driving signal acting on the gate of the corresponding switching transistor of the display unit to control the on state of the switching transistor; the driving signal 201 may also be acting on The data signal on the source of the corresponding switch transistor of the display unit is used to provide display data information for the display unit.
  • the time-sharing switch unit 30 is used to turn on or off the timing control unit 10 and the driving unit 20 in time intervals under external input or internal program control. Specifically, the time-sharing switch unit 30 is electrically connected to the timing control unit 10 and the driving unit 20, respectively; the time-sharing switch unit 30 transmits a first switch signal 301 to the timing control unit 10 The timing control unit 10 is controlled to turn on or off; the time-sharing switch unit 30 transmits a second switch signal 302 to the drive unit 20 to control the drive unit 20 to turn on or off. It should be understood that by setting the time-sharing switch unit 30, the timing control unit 10 and the driving unit 20 can be turned on or off in a period of time, thereby avoiding the initial stage of display panel startup. The timing control unit 10 and the driving unit 20 are turned on at the same time, causing the problem of large voltage fluctuations in the system, and the phenomenon that the driving unit 20 abnormally outputs the driving signal 201 due to voltage fluctuations.
  • the time-sharing switch unit 30 controls the timing control unit 10 to be turned on in preference to the driving unit 20.
  • the opening stage of the circuit drive system refers to the stage when the external power supply system of the display panel starts to supply power to the circuit drive system.
  • the so-called voltage fluctuations in the system also occur at this stage.
  • Each functional element in the circuit drive system consumes current at the same time, and the power of the external power supply is constant, which in turn causes the voltage to drop in a short time.
  • the driving unit 20 is turned on later than the timing control unit 10, on the one hand, it can avoid the large current consumption caused by the driving unit 20 and the timing control unit 10 being turned on at the same time, and on the other hand, it can also avoid the large current consumption.
  • the driving unit 20 abnormally outputs a driving signal during the above-mentioned voltage fluctuation phase, which is beneficial to improve the display quality of the display panel.
  • the opening time of the timing control unit 10 is 50 microseconds to 200 microseconds earlier than the opening time of the driving unit 20. Microseconds. It should be noted that by monitoring the voltage fluctuation state during the opening phase of the circuit drive system for many times, it is found that the voltage fluctuation is mainly concentrated within the first 100 microseconds, and the voltage fluctuation within the first 50 microseconds is the most severe; Therefore, the influence of the voltage fluctuation on the driving signal output by the driving unit 20 can be minimized by the above-mentioned arrangement.
  • the opening time of the timing control unit 10 is ahead of the opening time of the driving unit 20 by 100 microseconds. It should be noted that by monitoring the voltage fluctuation state during the opening phase of the circuit drive system for many times, it is found that the voltage fluctuation is mainly concentrated within the first 100 microseconds, and the voltage fluctuation within the first 50 microseconds is the most severe; Therefore, the influence of voltage fluctuation on the driving signal output by the driving unit 20 can be avoided by the above arrangement.
  • FIG. 3 is a timing diagram of the input and output of each unit in the circuit driving system during the opening phase.
  • an external power supply supplies power to the timing control unit 10, the driving unit 20, and the time-sharing switch unit 30 respectively; the time-sharing switch unit 30 supplies power to the timing control unit 10
  • the timing control unit 10 When the rising edge of the output first switch signal 301 arrives, the timing control unit 10 is turned on and outputs the clock signal 101 to the driving unit 20. At this time, the time-sharing switch unit 30 outputs the clock signal 101 to the driving unit 20.
  • the second switch signal 302 remains at a low level, and the drive unit 20 remains in the off state; after the time T has elapsed, the rising edge of the second switch signal 302 output by the time-sharing switch unit 30 to the drive unit 20 arrives, so The driving unit 20 turns on and outputs the driving signal 201, so that the driving unit 20 is turned on later than the timing control unit 10 to avoid the influence of voltage fluctuations on the driving signal output by the driving unit 20.
  • the time T can be set by inputting from an external input device, or can be set automatically by an internal program.
  • FIG. 4 is a structural diagram of a driving unit provided in an embodiment of the present application.
  • the driving unit 20 includes a shift register 21, a logic control unit 22 and an output unit 23.
  • the shift register 21 is electrically connected to the time-sharing switch unit 30, and the time-sharing switch unit 30 controls the on or off of the shift register 21, thereby realizing the on-off state of the driving unit Control;
  • the shift register 21 is used to receive and store the start signal ST, and transmit the start signal ST to the logic control unit 22.
  • the start signal ST is a digital and analog signal input to the shift register 21.
  • the shift register 21 When the shift register 21 is turned on, the signal is input through an external input terminal or an internal program and stored in the shift register 21.
  • the signal is finally transferred to the logic control unit 22 to participate in logic operations, and finally affect the drive signal 201; in the turn-on phase of the circuit drive system, the second switch signal 302 controls all
  • the shift register 21 is kept in the closed state, so as to prevent the abnormal signal generated by the voltage fluctuation at this stage from being mistakenly recognized as the start signal ST and registered in the shift register 21.
  • the logic control unit 22 is electrically connected to the timing control unit 10, and the logic control unit 22 performs logic operations on the clock signal 101 provided by the timing control unit 10 and the start signal ST transmitted by the shift register 21 , To provide an output signal RE to the output unit 23.
  • the output unit 23 outputs the driving signal 201 according to the output signal RE provided by the logic control unit 22.
  • the circuit driving system includes a timing control unit, a driving unit, and a time-sharing switch unit.
  • the circuit driving system is The timing control unit and the driving unit are turned on step by step, which avoids the abnormal output of the driving unit caused by the unstable voltage signal in the initial stage of the display panel startup, which is conducive to the high-quality display of the display panel.
  • the embodiment of the present application also provides a driving chip 50.
  • the driving unit 52 is used to provide a driving signal to the display unit of the display panel to control the display function of the display panel.
  • the time-sharing switch unit 51 is used to turn on or turn off the driving unit 52 under external input or internal program control.
  • the driving chip 50 provided in this embodiment realizes independent control of the switching state of the driving unit 52 by setting the time-sharing switch unit 51; when the driving chip 50 is used in a display panel, In the initial stage of the start of the display panel, the driving unit 52 is turned off by the time-sharing switch unit 51, so as to avoid abnormal output of the driving unit 52 caused by voltage fluctuations in the circuit system at this stage.
  • the driving unit 52 includes a shift register 521, a logic control unit 522, and an output unit 523.
  • the shift register 521 is used to receive and store a start signal;
  • the logic control unit 522 is electrically connected to the shift register 521, and the logic control unit 522 receives a clock signal, and compares the clock signal and the The start signal performs a logic operation to generate an output signal;
  • the output unit 523 is electrically connected to the logic control unit 522, and is configured to output the driving signal according to the output signal provided by the logic control unit 522.
  • the start signal is a digital analog signal input to the shift register 521.
  • the shift register 521 When the shift register 521 is open, the signal is input through an external input terminal or an internal program and stored in the shift register 521. In the bit register 521, the signal is finally transferred to the logic control unit 522 to participate in logic operations, and finally affect the driving signal.
  • time-sharing switch unit 51 is electrically connected to the shift register 521, and the time-sharing switch unit 51 controls the on/off state of the shift register 521 to turn on or off the driving unit. 52. It should be noted that when the driver chip 50 is applied to a display panel, in the initial stage of the display panel startup, the shift register 521 is turned off by the time-sharing switch unit 51, thereby avoiding voltage fluctuations at this stage. The generated abnormal signal is mistakenly recognized as the start signal and is stored in the shift register 521, which in turn causes a display abnormality.
  • the logic control unit 522 is electrically connected to an external timing control unit 60, and the timing control unit 60 is used to output a clock signal to the logic control unit 522 and participate in the logic operation of the logic control unit 522 .
  • the time for the time-sharing switch unit 51 to turn on the driving unit 52 is delayed by 50 microseconds to 200 microseconds from the time when the logic control unit 522 first receives the clock signal. It should be noted that by monitoring the voltage fluctuation state of the initial stage of the display panel for many times, it is found that the voltage fluctuation is mainly concentrated within the first 100 microseconds, especially the voltage fluctuation within the first 50 microseconds is the most severe; therefore, Through the above arrangement, the influence of the voltage fluctuation on the driving signal output by the driving unit 52 can be minimized.
  • the driving chip provided by this embodiment includes a driving unit and a time-sharing switch unit, and the time-sharing switch unit is used to realize independent control of the switching state of the driving unit; the driving chip is applied to a display panel.
  • the drive unit is turned off by the time-sharing switch unit, so as to avoid abnormal output of the drive unit caused by voltage fluctuations in the circuit system at this stage, which is beneficial to the display panel. High-quality display.
  • An embodiment of the present application also provides a display device, which includes a display panel, and the circuit driving system provided in the foregoing embodiment of the present application, or the driving chip provided in the foregoing embodiment of the present application.
  • the circuit driving system and the driving chip are used to drive the display panel for display.
  • the display device provided in this embodiment can use the time-sharing switch unit to realize independent control of the on-off state of the driving unit. In the initial stage of the display device startup, the time-sharing switch unit is used to turn off the driving unit. Therefore, the abnormal output of the driving unit caused by the voltage fluctuation in the circuit system in the initial stage is avoided, which is beneficial to improve the display quality of the display device.

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Control Of Indicators Other Than Cathode Ray Tubes (AREA)

Abstract

提供一种电路驱动***、驱动芯片及显示装置，该电路驱动***和该驱动芯片应用于显示面板的显示驱动中，该电路驱动***包括时序控制单元（10）、驱动单元（20）和分时开关单元（30），利用该分时开关单元（30）控制该驱动单元（20）的开关状态，从而实现电路驱动***中的该时序控制单元（10）和该驱动单元（20）的分步开启。

Description

电路驱动***、驱动芯片及显示装置    技术领域
本申请涉及显示技术领域，尤其涉及一种电路驱动***、驱动芯片及显示装置。
 背景技术
显示面板的电路驱动***用于驱动显示面板进行画面显示。在显示面板接通外部电源开始显示画面的阶段，外部电源提供的电能会同时唤醒电路驱动***的多个功能模块，但是，外部电源提供的电能通常具有恒定的功率，在唤醒各功能模块的过程中会产生较大的电流，进而导致该外部电源施加到各功能模块上的电压出现明显降低的现象，即：出现如图1所示的显示面板开启阶段作用于电路驱动***的电压V出现大幅度波动的问题。而该电压的异常波动会进一步导致电路驱动***中的某些敏感寄存器的初始值被改变，造成电路驱动***的异常输出和显示面板的异常显示。现有技术采用在电路驱动***内部或外部增设稳压电容的做法来防止寄存器的初始值被改变，但这种做法不能从根本上杜绝上述问题的发生，且会大大增加电路的复杂性和制造成本。
 技术问题
现有技术中，显示面板开启阶段，其内部的电路驱动***各模块接收到的电压信号会出现较大波动，该电压波动会导致一些寄存器的初始值被改变，造成电路驱动***输出异常信号。
 技术解决方案
为了解决上述技术问题，本申请提供的解决方案如下：
本申请提供一种电路驱动***，应用于显示面板的显示驱动中，包括时序控制单元、驱动单元和分时开关单元；
所述时序控制单元用于产生时钟信号，以控制所述驱动单元的工作时序；
所述驱动单元用于向所述显示面板的显示单元提供驱动信号，以控制所述显示面板的显示功能；
所述分时开关单元用于在外部输入或内部程序控制下分时段打开或关闭所述时序控制单元和所述驱动单元。
在本申请的电路驱动***中，由所述驱动单元提供的所述驱动信号是作用于所述显示单元的开关晶体管的栅极上的栅极驱动信号。
在本申请的电路驱动***中，由所述驱动单元提供的所述驱动信号是作用于所述显示单元的开关晶体管的源极上的数据信号。
在本申请的电路驱动***中，在所述电路驱动***的打开阶段，所述分时开关单元控制所述时序控制单元优先于所述驱动单元打开。
在本申请的电路驱动***中，在所述电路驱动***的打开阶段，在所述分时开关单元的控制下，所述时序控制单元的打开时间比所述驱动单元的打开时间提前50微秒至200微秒。
在本申请的电路驱动***中，在所述电路驱动***的打开阶段，在所述分时开关单元的控制下，所述时序控制单元的打开时间比所述驱动单元的打开时间提前100微秒。
在本申请的电路驱动***中，由所述时序控制单元产生的时钟信号为方波型信号，所述驱动单元捕捉所述时钟信号的上升沿为有效触发信号。
在本申请的电路驱动***中，所述分时开关单元通过向所述时序控制单元传输第一开关信号来控制所述时序控制单元开启或关闭。
在本申请的电路驱动***中，所述分时开关单元通过向所述驱动单元传输第二开关信号来控制所述驱动单元开启或关闭。
在本申请的电路驱动***中，所述驱动单元包括移位寄存器、逻辑控制单元和输出单元；
所述移位寄存器与所述分时开关单元电性连接，所述分时开关单元控制所述移位寄存器的开启或关闭，所述移位寄存器用于接收和储存启动信号，并将所述启动信号传输至所述逻辑控制单元；
所述逻辑控制单元与所述时序控制单元电性连接，所述逻辑控制单元对所述时序控制单元提供的时钟信号和所述移位寄存器传输的启动信号进行逻辑运算，向所述输出单元提供输出信号；
所述输出单元根据所述逻辑控制单元提供的输出信号而输出所述驱动信号。
本申请还提供一种驱动芯片，应用于显示面板的显示驱动中，所述驱动芯片包括：
驱动单元，用于向所述显示面板的显示单元提供驱动信号，以控制所述显示面板的显示功能；
分时开关单元，用于在外部输入或内部程序控制下打开或关闭所述驱动单元。
在本申请的驱动芯片中，所述驱动单元包括：
移位寄存器，用于接收和储存启动信号；
逻辑控制单元，与所述移位寄存器电性连接，所述逻辑控制单元接收时钟信号，并对所述时钟信号和所述启动信号进行逻辑运算，以产生输出信号；
输出单元，与所述逻辑控制单元电性连接，用于根据所述逻辑控制单元提供的输出信号而输出所述驱动信号。
在本申请的驱动芯片中，所述分时开关单元与所述移位寄存器电性连接，所述分时开关单元通过控制所述移位寄存器的开/关状态来实现打开或关闭所述驱动单元。
在本申请的驱动芯片中，所述分时开关单元打开所述驱动单元的时间比所述逻辑控制单元首次接收到所述时钟信号的时间延后50微秒至200微秒。
在本申请的驱动芯片中，所述分时开关单元打开所述驱动单元的时间比所述逻辑控制单元首次接收到所述时钟信号的时间延后100微秒。
本申请还提供一种显示装置，包括显示面板，所述显示装置还包括：如上所述的电路驱动***，所述电路驱动***用于驱动所述显示面板进行显示。
在本申请的显示装置中，在所述电路驱动***的打开阶段，在所述分时开关单元的控制下，所述时序控制单元的打开时间比所述驱动单元的打开时间提前50微秒至200微秒。
在本申请的显示装置中，所述驱动单元包括移位寄存器、逻辑控制单元和输出单元；
所述移位寄存器与所述分时开关单元电性连接，所述分时开关单元控制所述移位寄存器的开启或关闭，所述移位寄存器用于接收和储存启动信号，并将所述启动信号传输至所述逻辑控制单元；
所述逻辑控制单元与所述时序控制单元电性连接，所述逻辑控制单元对所述时序控制单元提供的时钟信号和所述移位寄存器传输的启动信号进行逻辑运算，向所述输出单元提供输出信号；
所述输出单元根据所述逻辑控制单元提供的输出信号而输出所述驱动信号。
本申请又一种显示装置，包括显示面板，所述显示装置还包括驱动芯片，所述驱动芯片用于驱动所述显示面板进行显示；所述驱动芯片包括：
驱动单元，用于向所述显示面板的显示单元提供驱动信号，以控制所述显示面板的显示功能；
分时开关单元，用于在外部输入或内部程序控制下打开或关闭所述驱动单元。
在本申请的显示装置中，所述驱动单元包括：
移位寄存器，用于接收和储存启动信号；
逻辑控制单元，与所述移位寄存器电性连接，所述逻辑控制单元接收时钟信号，并对所述时钟信号和所述启动信号进行逻辑运算，以产生输出信号；
输出单元，与所述逻辑控制单元电性连接，用于根据所述逻辑控制单元提供的输出信号而输出所述驱动信号；
所述分时开关单元与所述移位寄存器电性连接，所述分时开关单元通过控制所述移位寄存器的开/关状态来实现打开或关闭所述驱动单元。
 有益效果
本申请通过在电路驱动***及驱动芯片中设置分时开关单元，利用分时开关单元控制驱动单元的开关状态，从而实现电路驱动***中的时序控制单元和驱动单元分步开启，避免了显示面板启动初始阶段因电压信号不稳定造成的驱动单元的异常输出，有利于显示面板的高品质显示。
 附图说明
为了更清楚地说明实施例或现有技术中的技术方案，下面将对实施例或现有技术描述中所需要使用的附图作简单介绍，显而易见地，下面描述中的附图仅仅是申请的一些实施例，对于本领域普通技术人员来讲，在不付出创造性劳动的前提下，还可以根据这些附图获得其他的附图。
图1是现有技术中显示面板开启阶段作用于电路驱动***的电压出现大幅度波动的示意图；
图2是本申请实施例提供的电路驱动***的架构图；
图3是本申请实施例提供的电路驱动***中各单元在打开阶段的输入输出时序图；
图4是本申请实施例提供的驱动单元的架构图；
图5是本申请实施例提供的驱动芯片连接时序控制单元的架构图。
 本发明的实施方式
以下各实施例的说明是参考附加的图示，用以例示本申请可用以实施的特定实施例。本申请所提到的方向用语，例如[上]、[下]、[前]、[后]、[左]、[右]、[内]、[外]、[侧面]等，仅是参考附加图式的方向。因此，使用的方向用语是用以说明及理解本申请，而非用以限制本申请。在图中，结构相似的单元是用以相同标号表示。
本申请实施例提供一种电路驱动***，通过在该电路驱动***中设置分时开关单元，利用分时开关单元控制驱动单元的开关状态，从而实现电路驱动***中的时序控制单元和驱动单元分步开启，避免了显示面板启动初始阶段因电压信号不稳定造成的驱动单元异常输出，有利于显示面板的高品质显示。
如图2所示，是本申请实施例提供的电路驱动***的架构图。所述电路驱动***包括时序控制单元10、驱动单元20和分时开关单元30。需要说明的是，所述电路驱动***应用于显示面板的显示驱动中，其中由所述驱动单元20输出的驱动信号201作用于所述显示面板的显示单元上，例如：所述驱动信号201可以是作用于所述显示单元的相应开关晶体管的栅极上的栅极驱动信号，以控制该开关晶体管的开启状态；所述驱动信号201也可以是作用于所述显示单元的相应开关晶体管的源极上的数据信号，用于为所述显示单元提供显示数据信息。
所述时序控制单元10用于产生时钟信号101，所述时钟信号101用于控制所述驱动单元20的工作时序。可选地，所述时钟信号101可以是方波型信号，所述驱动单元20捕捉所述时钟信号101的上升沿为有效触发信号，通过对捕捉到的所述时钟信号101进行逻辑计算，输出所述驱动信号201。
所述驱动单元20用于向所述显示面板的显示单元提供所述驱动信号201，所述驱动信号201直接作用于所述显示面板中或所述显示面板的显示单元中，进而控制所述显示面板的显示功能。可选地，所述驱动信号201可以是作用于所述显示单元的相应开关晶体管的栅极上的栅极驱动信号，以控制该开关晶体管的开启状态；所述驱动信号201还可以是作用于所述显示单元的相应开关晶体管的源极上的数据信号，用于为所述显示单元提供显示数据信息。
所述分时开关单元30用于在外部输入或内部程序控制下分时段打开或关闭所述时序控制单元10和所述驱动单元20。具体地，所述分时开关单元30分别与所述时序控制单元10和所述驱动单元20电性连接；所述分时开关单元30通过向所述时序控制单元10传输第一开关信号301来控制所述时序控制单元10开启或关闭；所述分时开关单元30通过向所述驱动单元20传输第二开关信号302来控制所述驱动单元20开启或关闭。应当理解的是，通过设置所述分时开关单元30，可以实现所述时序控制单元10和所述驱动单元20的分时段开启或关闭，从而避免了在显示面板启动的初始阶段，因所述时序控制单元10和所述驱动单元20同时开启而造成***中电压大幅度波动的问题，以及因电压波动而导致的所述驱动单元20异常输出驱动信号201的现象。
进一步地，在所述电路驱动***的打开阶段，所述分时开关单元30控制所述时序控制单元10优先于所述驱动单元20打开。需要说明的是，所述电路驱动***的打开阶段是指：显示面板的外部电源***开始向所述电路驱动***供电的阶段，所谓***中电压波动也发生在这一阶段，主要原因是所述电路驱动***中的各功能元件同时消耗电流，而外部电源的功率恒定，进而导致的电压短时间内下降。此外，所述驱动单元20相对于所述时序控制单元10延后开启，一方面可以避免所述驱动单元20与所述时序控制单元10同时开启而产生的大电流消耗，另一方面也避免了所述驱动单元20在上述电压波动阶段异常输出驱动信号，有利于提高显示面板的显示品质。
可选地，在所述电路驱动***的打开阶段，在所述分时开关单元30的控制下，所述时序控制单元10的打开时间比所述驱动单元20的打开时间提前50微秒至200微秒。需要说明的是，通过多次对所述电路驱动***的打开阶段的电压波动状态进行监控，得出电压波动主要集中在前100微秒以内，尤其是前50微秒以内的电压波动最为剧烈；因此，通过上述设置可以最小化电压波动对所述驱动单元20输出的驱动信号的影响。
进一步地，在所述电路驱动***的打开阶段，在所述分时开关单元30的控制下，所述时序控制单元10的打开时间比所述驱动单元20的打开时间提前100微秒。需要说明的是，通过多次对所述电路驱动***的打开阶段的电压波动状态进行监控，得出电压波动主要集中在前100微秒以内，尤其是前50微秒以内的电压波动最为剧烈；因此，通过上述设置可以避免电压波动对所述驱动单元20输出的驱动信号的影响。
具体地，参考图2和图3所示，其中图3是所述电路驱动***中各单元在打开阶段的输入输出时序图。在所述电路驱动***的打开阶段，外部电源分别向所述时序控制单元10、所述驱动单元20和所述分时开关单元30供电；所述分时开关单元30向所述时序控制单元10输出的第一开关信号301的上升沿到来时，所述时序控制单元10打开，并向所述驱动单元20输出时钟信号101，此时所述分时开关单元30向所述驱动单元20输出的第二开关信号302保持低电平，所述驱动单元20保持关闭状态；经过时间T之后，所述分时开关单元30向所述驱动单元20输出的第二开关信号302的上升沿到来，所述驱动单元20打开并输出所述驱动信号201，从而实现所述驱动单元20相对于所述时序控制单元10延后开启，以避免电压波动对所述驱动单元20输出的驱动信号的影响。需要说明的是，所述时间T可以通过外部输入设备输入而进行设置，也可以通过内部程序而自动设置。
可选地，如图2和图4所示，其中，图4是本申请实施例提供的驱动单元的架构图。所述驱动单元20包括移位寄存器21、逻辑控制单元22和输出单元23。其中，所述移位寄存器21与所述分时开关单元30电性连接，所述分时开关单元30控制所述移位寄存器21的开启或关闭，进而实现对所述驱动单元的开关状态的控制；所述移位寄存器21用于接收和储存启动信号ST，并将所述启动信号ST传输至所述逻辑控制单元22。需要说明的是，所述启动信号ST是输入到所述移位寄存器21的数字模拟信号，在所述移位寄存器21打开状态下，该信号通过外部输入端或内部程序输入并储存于所述移位寄存器21中，该信号最终转移至所述逻辑控制单元22中参与逻辑运算，进而最终影响所述驱动信号201；在所述电路驱动***的打开阶段，所述第二开关信号302控制所述移位寄存器21保持关闭状态，从而避免了因该阶段电压波动而产生的异常信号被误识别为启动信号ST而寄存于所述移位寄存器21中。
所述逻辑控制单元22与所述时序控制单元10电性连接，所述逻辑控制单元22对所述时序控制单元10提供的时钟信号101和所述移位寄存器21传输的启动信号ST进行逻辑运算，向所述输出单元23提供输出信号RE。所述输出单元23根据所述逻辑控制单元22提供的输出信号RE而输出所述驱动信号201。
综上所述，本实施例提供的电路驱动***包括时序控制单元、驱动单元和分时开关单元，通过利用所述分时开关单元控制所述驱动单元的开关状态，从而实现电路驱动***中的时序控制单元和驱动单元分步开启，避免了显示面板启动初始阶段因电压信号不稳定造成的驱动单元异常输出，有利于显示面板的高品质显示。
本申请实施例还提供了一种驱动芯片50，如图5所示，所述驱动芯片50应用于显示面板的显示驱动中，所述驱动芯片50包括分时开关单元51和驱动单元52。所述驱动单元52用于向所述显示面板的显示单元提供驱动信号，以控制所述显示面板的显示功能。所述分时开关单元51用于在外部输入或内部程序控制下打开或关闭所述驱动单元52。
需要说明的是，本实施例提供的驱动芯片50，通过设置所述分时开关单元51实现对所述驱动单元52的开关状态的独立控制；该驱动芯片50应用于显示面板中时，在所述显示面板启动的初始阶段，通过所述分时开关单元51关闭所述驱动单元52，从而避免该阶段电路***中的电压波动而引发的所述驱动单元52的异常输出。
可选地，所述驱动单元52包括移位寄存器521、逻辑控制单元522和输出单元523。所述移位寄存器521用于接收和储存启动信号；所述逻辑控制单元522与所述移位寄存器521电性连接，所述逻辑控制单元522接收时钟信号，并对所述时钟信号和所述启动信号进行逻辑运算，以产生输出信号；所述输出单元523与所述逻辑控制单元522电性连接，用于根据所述逻辑控制单元522提供的输出信号而输出所述驱动信号。需要说明的是，所述启动信号是输入到所述移位寄存器521的数字模拟信号，在所述移位寄存器521打开状态下，该信号通过外部输入端或内部程序输入并储存于所述移位寄存器521中，该信号最终转移至所述逻辑控制单元522中参与逻辑运算，进而最终影响所述驱动信号。
进一步地，所述分时开关单元51与所述移位寄存器521电性连接，所述分时开关单元51通过控制所述移位寄存器521的开/关状态来实现打开或关闭所述驱动单元52。需要说明的是，该驱动芯片50应用于显示面板中时，在所述显示面板启动的初始阶段，通过所述分时开关单元51关闭所述移位寄存器521，从而避免了因该阶段电压波动而产生的异常信号被误识别为所述启动信号而寄存于所述移位寄存器521中，并进而导致的显示异常。
进一步地，所述逻辑控制单元522电性连接外部时序控制单元60，所述时序控制单元60用于向所述逻辑控制单元522输出时钟信号，并参与到所述逻辑控制单元522的逻辑运算中。所述分时开关单元51打开所述驱动单元52的时间比所述逻辑控制单元522首次接收到所述时钟信号的时间延后50微秒至200微秒。需要说明的是，通过多次对显示面板启动的初始阶段的电压波动状态进行监控，得出电压波动主要集中在前100微秒以内，尤其是前50微秒以内的电压波动最为剧烈；因此，通过上述设置可以最小化电压波动对所述驱动单元52输出的驱动信号的影响。
综上所述，本实施例提供的驱动芯片包括驱动单元和分时开关单元，利用所述分时开关单元实现对所述驱动单元的开关状态的独立控制；该驱动芯片应用于显示面板中时，在所述显示面板启动的初始阶段，通过所述分时开关单元关闭所述驱动单元，从而避免该阶段电路***中的电压波动而引发的所述驱动单元的异常输出，有利于显示面板的高品质显示。
本申请实施例还提供一种显示装置，所述显示装置包括显示面板，以及本申请上述实施例所提供的电路驱动***，或本申请上述实施例所提供的驱动芯片。其中，所述电路驱动***和所述驱动芯片用于驱动所述显示面板进行显示。本实施例提供的显示装置可以利用所述分时开关单元实现对所述驱动单元的开关状态的独立控制，在所述显示装置启动的初始阶段，通过所述分时开关单元关闭所述驱动单元，从而避免该初始阶段电路***中的电压波动而引发的驱动单元的异常输出，有利于提高所述显示装置的显示品质。
需要说明的是，虽然本申请以具体实施例揭露如上，但上述实施例并非用以限制本申请，本领域的普通技术人员，在不脱离本申请的精神和范围内，均可作各种更动与润饰，因此本申请的保护范围以权利要求界定的范围为准。

Claims (20)

  1. 一种电路驱动***，应用于显示面板的显示驱动中，其包括时序控制单元、驱动单元和分时开关单元；
    所述时序控制单元用于产生时钟信号，以控制所述驱动单元的工作时序；
    所述驱动单元用于向所述显示面板的显示单元提供驱动信号，以控制所述显示面板的显示功能；
    所述分时开关单元用于在外部输入或内部程序控制下分时段打开或关闭所述时序控制单元和所述驱动单元。
  2. 根据权利要求1所述的电路驱动***，其中，由所述驱动单元提供的所述驱动信号是作用于所述显示单元的开关晶体管的栅极上的栅极驱动信号。
  3. 根据权利要求1所述的电路驱动***，其中，由所述驱动单元提供的所述驱动信号是作用于所述显示单元的开关晶体管的源极上的数据信号。
  4. 根据权利要求1所述的电路驱动***，其中，在所述电路驱动***的打开阶段，所述分时开关单元控制所述时序控制单元优先于所述驱动单元打开。
  5. 根据权利要求4所述的电路驱动***，其中，在所述电路驱动***的打开阶段，在所述分时开关单元的控制下，所述时序控制单元的打开时间比所述驱动单元的打开时间提前50微秒至200微秒。
  6. 根据权利要求5所述的电路驱动***，其中，在所述电路驱动***的打开阶段，在所述分时开关单元的控制下，所述时序控制单元的打开时间比所述驱动单元的打开时间提前100微秒。
  7. 根据权利要求1所述的电路驱动***，其中，由所述时序控制单元产生的时钟信号为方波型信号，所述驱动单元捕捉所述时钟信号的上升沿为有效触发信号。
  8. 根据权利要求1所述的电路驱动***，其中，所述分时开关单元通过向所述时序控制单元传输第一开关信号来控制所述时序控制单元开启或关闭。
  9. 根据权利要求8所述的电路驱动***，其中，所述分时开关单元通过向所述驱动单元传输第二开关信号来控制所述驱动单元开启或关闭。
  10. 根据权利要求1所述的电路驱动***，其中，所述驱动单元包括移位寄存器、逻辑控制单元和输出单元；
    所述移位寄存器与所述分时开关单元电性连接，所述分时开关单元控制所述移位寄存器的开启或关闭，所述移位寄存器用于接收和储存启动信号，并将所述启动信号传输至所述逻辑控制单元；
    所述逻辑控制单元与所述时序控制单元电性连接，所述逻辑控制单元对所述时序控制单元提供的时钟信号和所述移位寄存器传输的启动信号进行逻辑运算，向所述输出单元提供输出信号；
    所述输出单元根据所述逻辑控制单元提供的输出信号而输出所述驱动信号。
  11. 一种驱动芯片，应用于显示面板的显示驱动中，其包括：
    驱动单元，用于向所述显示面板的显示单元提供驱动信号，以控制所述显示面板的显示功能；
    分时开关单元，用于在外部输入或内部程序控制下打开或关闭所述驱动单元。
  12. 根据权利要求11所述的驱动芯片，其中，所述驱动单元包括：
    移位寄存器，用于接收和储存启动信号；
    逻辑控制单元，与所述移位寄存器电性连接，所述逻辑控制单元接收时钟信号，并对所述时钟信号和所述启动信号进行逻辑运算，以产生输出信号；
    输出单元，与所述逻辑控制单元电性连接，用于根据所述逻辑控制单元提供的输出信号而输出所述驱动信号。
  13. 根据权利要求12所述的驱动芯片，其中，所述分时开关单元与所述移位寄存器电性连接，所述分时开关单元通过控制所述移位寄存器的开/关状态来实现打开或关闭所述驱动单元。
  14. 根据权利要求13所述的驱动芯片，其中，所述分时开关单元打开所述驱动单元的时间比所述逻辑控制单元首次接收到所述时钟信号的时间延后50微秒至200微秒。
  15. 根据权利要求14所述的驱动芯片，其中，所述分时开关单元打开所述驱动单元的时间比所述逻辑控制单元首次接收到所述时钟信号的时间延后100微秒。
  16. 一种显示装置，包括显示面板，所述显示装置还包括：
    权利要求1所述的电路驱动***，所述电路驱动***用于驱动所述显示面板进行显示。
  17. 根据权利要求16所述的显示装置，其中，在所述电路驱动***的打开阶段，在所述分时开关单元的控制下，所述时序控制单元的打开时间比所述驱动单元的打开时间提前50微秒至200微秒。
  18. 根据权利要求16所述的显示装置，其中，所述驱动单元包括移位寄存器、逻辑控制单元和输出单元；
    所述移位寄存器与所述分时开关单元电性连接，所述分时开关单元控制所述移位寄存器的开启或关闭，所述移位寄存器用于接收和储存启动信号，并将所述启动信号传输至所述逻辑控制单元；
    所述逻辑控制单元与所述时序控制单元电性连接，所述逻辑控制单元对所述时序控制单元提供的时钟信号和所述移位寄存器传输的启动信号进行逻辑运算，向所述输出单元提供输出信号；
    所述输出单元根据所述逻辑控制单元提供的输出信号而输出所述驱动信号。
  19. 一种显示装置，包括显示面板，所述显示装置还包括驱动芯片，所述驱动芯片用于驱动所述显示面板进行显示；所述驱动芯片包括：
    驱动单元，用于向所述显示面板的显示单元提供驱动信号，以控制所述显示面板的显示功能；
    分时开关单元，用于在外部输入或内部程序控制下打开或关闭所述驱动单元。
  20. 根据权利要求19所述的显示装置，其中，所述驱动单元包括：
    移位寄存器，用于接收和储存启动信号；
    逻辑控制单元，与所述移位寄存器电性连接，所述逻辑控制单元接收时钟信号，并对所述时钟信号和所述启动信号进行逻辑运算，以产生输出信号；
    输出单元，与所述逻辑控制单元电性连接，用于根据所述逻辑控制单元提供的输出信号而输出所述驱动信号；
    所述分时开关单元与所述移位寄存器电性连接，所述分时开关单元通过控制所述移位寄存器的开/关状态来实现打开或关闭所述驱动单元。
PCT/CN2020/085794 2020-04-09 2020-04-21 电路驱动***、驱动芯片及显示装置 WO2021203470A1 (zh)

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