WO2021088472A1 - 显示基板、显示面板及显示装置 - Google Patents

显示基板、显示面板及显示装置 Download PDF

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Publication number
WO2021088472A1
WO2021088472A1 PCT/CN2020/110848 CN2020110848W WO2021088472A1 WO 2021088472 A1 WO2021088472 A1 WO 2021088472A1 CN 2020110848 W CN2020110848 W CN 2020110848W WO 2021088472 A1 WO2021088472 A1 WO 2021088472A1
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Prior art keywords
display area
sub
pixel circuit
display
pixel
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PCT/CN2020/110848
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English (en)
French (fr)
Inventor
刘如胜
李俊峰
邢汝博
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昆山国显光电有限公司
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Publication of WO2021088472A1 publication Critical patent/WO2021088472A1/zh
Priority to US17/541,814 priority Critical patent/US20220093699A1/en

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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/121—Active-matrix OLED [AMOLED] displays characterised by the geometry or disposition of pixel elements
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G09G3/3225—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/121—Active-matrix OLED [AMOLED] displays characterised by the geometry or disposition of pixel elements
    • H10K59/1213—Active-matrix OLED [AMOLED] displays characterised by the geometry or disposition of pixel elements the pixel elements being TFTs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/121—Active-matrix OLED [AMOLED] displays characterised by the geometry or disposition of pixel elements
    • H10K59/1216—Active-matrix OLED [AMOLED] displays characterised by the geometry or disposition of pixel elements the pixel elements being capacitors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/60—OLEDs integrated with inorganic light-sensitive elements, e.g. with inorganic solar cells or inorganic photodiodes
    • H10K59/65—OLEDs integrated with inorganic image sensors
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00—Control of display operating conditions
    • G09G2320/02—Improving the quality of display appearance
    • G09G2320/0233—Improving the luminance or brightness uniformity across the screen
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/1222—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or crystalline structure of the active layer
    • H01L27/1225—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or crystalline structure of the active layer with semiconductor materials not belonging to the group IV of the periodic table, e.g. InGaZnO
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/1251—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs comprising TFTs having a different architecture, e.g. top- and bottom gate TFTs
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
    • H01L29/78651—Silicon transistors
    • H01L29/7866—Non-monocrystalline silicon transistors
    • H01L29/78672—Polycrystalline or microcrystalline silicon transistor
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
    • H01L29/7869—Thin film transistors, i.e. transistors with a channel being at least partly a thin film having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/80—Constructional details
    • H10K59/805—Electrodes
    • H10K59/8051—Anodes
    • H10K59/80515—Anodes characterised by their shape

Definitions

  • This application relates to the technical field of OLED display devices, and in particular to a display substrate, a display panel and a display device.
  • the present application provides a display substrate, a display panel, and a display device to solve the deficiencies in the related art.
  • a display substrate including: a first display area, a second display area, and a third display area; the second display area is located between the first display area and the second display area. Between the three display areas; the light transmittance of the first display area is greater than the light transmittance of the third display area; the first display area includes first pixel circuits arranged in an array, and the third display The area includes a second pixel circuit arranged in an array, the second display area includes the first pixel circuit and the second pixel circuit arranged in an array; the first pixel circuit and the second pixel circuit The circuit is different.
  • the second display area includes N sub-display areas arranged in sequence in a first direction in which the first display area points to the third display area, and each of the sub-display areas includes an array
  • the first pixel circuit and the second pixel circuit are arranged in a manner, and along the first direction, the proportion of the first pixel circuit in the sub-display area decreases sequentially, and the second pixel circuit
  • the proportion of pixel circuits increases sequentially; N is a positive integer.
  • each sub-display area includes the first pixel circuit and the second pixel circuit arranged in an array , And along the first direction, the proportion occupied by the first pixel circuit in the N sub-display areas is successively decreased, and the proportion occupied by the second pixel circuit is successively increased. In this way, the display brightness of the first display area can be changed to the third display.
  • the display brightness of the area gradually transitions, avoiding the large difference in the display brightness of two adjacent display areas from appearing a clear dividing line, and improving the display effect.
  • a display panel including the above-mentioned display substrate and an encapsulation layer, and the encapsulation layer is encapsulated on the display substrate.
  • a display device including: a device body having a device area; the display panel as described above, the display panel covering the device body; wherein, the device area It is located below the first display area, and the device area includes electronic devices.
  • the third display area includes the array arranged The second pixel circuit, the second display area includes the first pixel circuit and the second pixel circuit arranged in an array, wherein the first pixel circuit and the second pixel circuit are different, so that the display brightness of the second display area can be adjusted between the display brightness of the first display area and the display brightness of the third display area, the display brightness difference of adjacent display areas is prevented from appearing a clear dividing line, and the display effect is improved.
  • Fig. 1 is a schematic structural diagram of a full-scale screen exemplarily shown
  • FIG. 2 is a schematic structural diagram of a display substrate shown in an embodiment of the present application.
  • FIG. 3 is a schematic structural diagram of the sub-pixel arrangement of the display substrate shown in FIG. 2;
  • FIG. 4 is a schematic diagram of another structure of the sub-pixel arrangement of the display substrate shown in FIG. 2.
  • photosensitive elements such as a camera, a distance sensor, etc. may be arranged under the transparent display area 11, and of course other electronic elements, such as a speaker, a flashlight, etc., may also be arranged. Since the pixel circuits of the pixels in the transparent display area 11 are different from the pixel circuits of the pixels in the non-transparent display area 12, the display brightness of the transparent display area 11 and the non-transparent display area 12 are quite different, which leads to the transparent display area. There is a clear dividing line with the non-transparent display area, which affects the user experience.
  • the embodiments of the present application provide a display substrate, a display panel, and a display device, which can gradually transition the display brightness of the display substrate, avoid the obvious dividing line between adjacent display areas, and can improve the display quality. .
  • the display substrate 2 includes: a first display area 21, a second display area 22 and a third display area 23.
  • the second display area 22 is located between the first display area 21 and the third display area 23.
  • the light transmittance of the first display area 21 is greater than the light transmittance of the third display area 23.
  • the first display area 21 includes first sub-pixels and a first pixel circuit 26 arranged in an array, and the first sub-pixels are connected to the first pixel circuit 26.
  • the third display area 23 includes second sub-pixels and a second pixel circuit 27 arranged in an array, and the second sub-pixels are connected to the second pixel circuit 27.
  • the second display area 22 includes first sub-pixels and second sub-pixels arranged in an array, the first pixel circuit 26 and the second pixel circuit 27, and the first pixel circuit 26 and the second pixel circuit 27 are different.
  • the third display area 23 Includes a second pixel circuit 27 arranged in an array
  • the second display area 22 includes a first pixel circuit 26 and a second pixel circuit 27 arranged in an array, wherein the first pixel circuit 26 is different from the second pixel circuit 27,
  • the display brightness of the second display area 22 can be made between the display brightness of the first display area 21 and the display brightness of the third display area 23, so that the display brightness of the display substrate 2 can gradually transition, avoiding adjacent displays.
  • the display brightness difference between the areas is large, and there is a clear dividing line, which improves the display effect.
  • the first display area 21 includes the first sub-pixels 24 arranged in an array
  • the third display area 23 includes the second sub-pixels 25 arranged in an array
  • the second display area 22 includes the array arranged
  • the first sub-pixel 24 and the second sub-pixel 25 are connected, wherein a first sub-pixel 24 is connected to a first pixel circuit, and a second sub-pixel 25 is connected to a second pixel circuit.
  • the first display area 21 includes first sub-pixels 24 arranged in an array, and one first sub-pixel 24 is connected to one first pixel circuit 26.
  • the first sub-pixel 24 can be located in the first pixel circuit 26. Glows when driven.
  • the third display area 23 includes second sub-pixels 25 arranged in an array, one second sub-pixel 25 is connected to one second pixel circuit 27, and the second sub-pixel 25 can emit light under the driving of the second pixel circuit 27.
  • the second display area 22 includes first sub-pixels 24 and second sub-pixels 25 arranged in an array.
  • One first sub-pixel 24 is connected to one first pixel circuit 26.
  • the first sub-pixel 24 can be located in the first pixel circuit 26.
  • a second sub-pixel 25 is connected to a second pixel circuit 27, and the second sub-pixel 25 can emit light under the driving of the second pixel circuit 27.
  • the first sub-pixels 24 and the second sub-pixels 25 can be distributed alternately, and the first sub-pixels 24 and the second sub-pixels 25 can be evenly distributed, respectively, and the first sub-pixels 24 are in the second
  • the density in the display area 22 and the density of the second sub-pixels 25 in the second display area 22 may be substantially the same. Since the first sub-pixel 24 and the second sub-pixel 25 are mixed in the second display area 22, the display brightness of the second display area 22 can be better between the display brightness of the first display area 21 and that of the third display area 23. Between the display brightness, the display brightness of the display substrate can be gradually changed, which avoids a large difference in display brightness between adjacent display areas from appearing an obvious dividing line, and improves the display effect.
  • the light transmittance of the first display area 21 is greater than the light transmittance of the second display area 22, and the light transmittance of the second display area 22 is greater than the light transmittance 23 of the third display area.
  • the light transmittance of the first display area is greater than the light transmittance of the second display area
  • the light transmittance of the second display area is greater than the light transmittance of the third display area, that is, the light transmittance of the first display area is higher than that of the third display area.
  • the light transmittance of the area gradually transitions, and since the light transmittance can affect the display brightness, this is beneficial to gradually transition the display brightness of the first display area to the display brightness of the third display area.
  • the aforementioned first sub-pixel and second sub-pixel may be sub-pixels of any color.
  • the first sub-pixel may be a red sub-pixel, a blue sub-pixel, or a green sub-pixel.
  • One first pixel may include adjacent first sub-pixels of different colors, and similarly, one second pixel may also include adjacent second sub-pixels of different colors.
  • the second display area 22 includes N sub-display areas arranged in sequence in the first direction F1 in which the first display area 21 points to the third display area 23, such as three sub-display areas 221. , 222, 223, each sub-display area includes the first sub-pixel 24, the second sub-pixel 25, the first pixel circuit and the second pixel circuit arranged in an array, and along the first direction F1, the first sub-display area
  • N is a positive integer.
  • N can be 1, 2, 3, 4, and other positive integers.
  • N can be 3.
  • the second display area 22 includes three sub-display areas 221, 222, and 223 arranged in sequence in the first direction F1.
  • Each sub-display area includes first sub-pixels 24 and second sub-pixels 25 arranged in an array, one first sub-pixel 24 is connected to one first pixel circuit 26, and one second sub-pixel 25 and one second pixel circuit are connected. 27 Connected.
  • the first sub-pixels 24 and the second sub-pixels 25 are evenly distributed in each sub-display area.
  • the density of the first sub-pixel 24 in the sub-display area 221 is greater than the density of the first sub-pixel 24 in the sub-display area 222, and the density of the first sub-pixel 24 in the sub-display area 222 is greater than that of the first sub-pixel 24 in the sub-display area.
  • the density of the second sub-pixel 25 in the sub-display area 221 is less than the density of the second sub-pixel 25 in the sub-display area 222, and the density of the second sub-pixel 25 in the sub-display area 222 is less than the density of the second sub-pixel 25 in the sub-display area 222.
  • the density of the first pixel circuit 26 in the sub-display area 221 is greater than the density of the first pixel circuit 26 in the sub-display area 222, and the density of the first pixel circuit 26 in the sub-display area 222 is greater than that of the first pixel circuit 26.
  • the density of the second pixel circuit 27 in the sub-display area 221 is smaller than the density of the second pixel circuit 27 in the sub-display area 222, and the density of the second pixel circuit 27 in the sub-display area 222 It is smaller than the density of the second pixel circuit 27 in the sub-display area 223.
  • the proportion of the first sub-pixel 24 in the sub-display area 221 may be 75%
  • the proportion of the first sub-pixel 24 in the sub-display area 222 may be 50%
  • the proportion of the sub-pixels 24 in the sub-display area 223 may be 25%.
  • the proportion of the second sub-pixel 25 in the sub-display area 221 may be 25%
  • the proportion of the second sub-pixel 25 in the sub-display area 222 may be 50%
  • the second sub-pixel 25 in the sub-display area 223 The proportion in can be 75%.
  • the proportion of the first pixel circuit 26 in the sub-display area 221 may be 75%
  • the proportion of the first pixel circuit 26 in the sub-display area 222 may be 50%
  • the first pixel circuit 26 in the sub-display area 222 may be 50%
  • the proportion in the display area 223 may be 25%.
  • the proportion of the second pixel circuit 27 in the sub-display area 221 may be 25%
  • the proportion of the second pixel circuit 27 in the sub-display area 222 may be 50%
  • the second pixel circuit 27 in the sub-display area 223 The proportion in can be 75%.
  • each sub-display area includes the first sub-pixels and the second sub-pixels arranged in an array.
  • the first pixel circuit and the second pixel circuit, and along the first direction, the proportions of the first sub-pixel and the first pixel circuit in the N sub-display areas decrease sequentially, and the second sub-pixel and the second pixel circuit occupy In this way, the display brightness of the first display area can be gradually transitioned to the display brightness of the third display area, avoiding the large difference in display brightness of two adjacent display areas and the obvious dividing line, which improves display effect.
  • the first sub-pixel is different from the second sub-pixel.
  • the first sub-pixel may be a transparent sub-pixel
  • the second sub-pixel may be an opaque sub-pixel.
  • the light transmittance of the first sub-pixel is greater than the light transmittance of the second sub-pixel.
  • the first sub-pixel 24 may include a first electrode, a first organic light-emitting layer, and a second electrode.
  • the first organic light-emitting layer is located on the first electrode
  • the second electrode is located on the first organic light-emitting layer.
  • the first electrode may be a transparent anode.
  • the material of the first electrode may be transparent ITO (Indium Tin Oxide), Graphene, IZO (Indium Zinc Oxide) or ITZO (Indium Tin Zinc Oxide), but is not limited thereto.
  • the second sub-pixel 25 may include a third electrode, a second organic light emitting layer, and a fourth electrode.
  • the second organic light emitting layer is located on the third electrode, and the fourth electrode is located on the second organic light emitting layer.
  • the third electrode may be a reflective anode.
  • the third electrode may include a first transparent conductive layer, a metal layer, and a second transparent conductive layer.
  • the material of the first transparent conductive layer and the second transparent conductive layer may be ITO, and the material of the metal layer may be Ag (silver), but not Limited to this.
  • the first electrode may include f electrode blocks, and the first organic light-emitting layer may include f light-emitting structures corresponding to the f electrode blocks one-to-one, that is, one light-emitting structure is provided on one electrode block.
  • f is a positive integer.
  • f can be 1, 2, 3, or other positive integers.
  • f is greater than 1
  • multiple light-emitting structures in the same first sub-pixel 24 can be driven to emit light through the same first pixel circuit 26, the number of pixel circuits in the first display area 21 can be reduced, and the graininess of the display can be weakened. , Is conducive to improving the display effect.
  • the projection of the first electrode on the plane where the display substrate is located includes one graphic unit or more than two graphic units, and the graphic units can be circular, elliptical, dumbbell-shaped, gourd-shaped or rectangular.
  • the graphic unit is circular, elliptical, dumbbell or gourd-shaped, the periodic structure that produces diffraction can be changed, that is, the distribution of the diffraction field is changed, thereby reducing the diffraction phenomenon.
  • a pixel camera image sensor
  • the number of components of the first pixel circuit 26 is less than or equal to the number of components of the second pixel circuit 27.
  • the first pixel circuit 26 is an nTmC pixel circuit
  • the second pixel circuit 27 is a jTkC pixel circuit, where n+m ⁇ j+k, where T represents a transistor, C represents a capacitor, n is a positive integer, and m is a natural number, j is a positive integer, and k is a natural number.
  • n is 1, 2, 3, 4, 5, 6, or 7, but it is not limited thereto.
  • m can be 0, 1, or 2, but is not limited thereto.
  • j is 1, 2, 3, 4, 5, 6, or 7, but is not limited thereto.
  • k can be 0, 1, or 2, but is not limited thereto. That is, the sum of the number of transistors and the number of capacitors in the first pixel circuit 26 is less than or equal to the sum of the number of transistors and the number of capacitors in the second pixel circuit 27. When the sum of the number of transistors and the number of capacitors in the first pixel circuit 26 is less than the sum of the number of transistors and the number of capacitors in the second pixel circuit 27, the light transmittance of the first pixel circuit 26 is greater than that of the second pixel circuit 27. The light transmittance is beneficial to increase the light transmittance of the first display area 21.
  • the aforementioned nTmC pixel circuit may be a 1T pixel circuit, a 2T1C pixel circuit, a 3T1C pixel circuit, a 4T1C pixel circuit, a 5T1C pixel circuit, a 6T1C pixel circuit, or a 7T1C pixel circuit.
  • the aforementioned jTkC pixel circuit may be a 1T pixel circuit, a 2T1C pixel circuit, a 3T1C pixel circuit, a 4T1C pixel circuit, a 5T1C pixel circuit, a 6T1C pixel circuit, or a 7T1C pixel circuit.
  • the nTmC pixel circuit refers to a pixel circuit including n transistors and m capacitors.
  • a 2T1C pixel circuit refers to a pixel circuit including 2 transistors and 1 capacitor.
  • the jTkC pixel circuit refers to a pixel circuit including j transistors and k capacitors.
  • the first pixel circuit 26 is a 2T1C pixel circuit
  • the second pixel circuit 27 is a 7T1C pixel circuit.
  • the area occupied by the 2T1C pixel circuit may be smaller than the area occupied by the 7T1C pixel circuit
  • the opening area of the first sub-pixel 24 may be smaller than the opening area of the second sub-pixel 25.
  • the display brightness of the first display area 21 is higher than that of the second sub-pixel 25.
  • the display brightness of the third display area 23 is small.
  • the luminous intensity of the first pixel in the first display area 21 can be appropriately increased.
  • the luminous intensity of the first pixel in the second display area 22 may also be appropriately higher than the luminous intensity of the second pixel.
  • the transistor in the first pixel circuit 26 is a low temperature polysilicon (LTPS) transistor, and the transistor in the second pixel circuit 27 is a low temperature poly oxide (LTPO) transistor.
  • LTPS low temperature polysilicon
  • LTPO low temperature poly oxide
  • low-temperature polycrystalline oxide transistors Since the electron mobility of low-temperature polycrystalline oxide transistors is higher than that of low-temperature polysilicon transistors, low-temperature polycrystalline oxide transistors are more stable than low-temperature polysilicon transistors, and low-temperature polycrystalline oxide transistors consume less power than low-temperature polysilicon transistors. The power consumption is lower.
  • the transistors in the first pixel circuit 26 and the second pixel circuit 27 are low-temperature polysilicon transistors, when the number of transistors in the first pixel circuit 26 is equal to that in the second pixel circuit 27
  • the number of capacitors in the first pixel circuit 26 is the same as the number of capacitors in the second pixel circuit 27, the transistors in the first pixel circuit 26 are low-temperature polysilicon transistors, and the transistors in the second pixel circuit 27 are low-temperature transistors.
  • polycrystalline oxide transistors it is convenient to increase the resolution and refresh rate of the third display area 23, and reduce the power consumption of the third display area 23.
  • the transistors in the first pixel circuit 26 may be low-temperature polysilicon transistors
  • the transistors in the second pixel circuit 27 may be low-temperature polysilicon transistors.
  • the first pixel circuit when the number of transistors in the first pixel circuit 26 is the same as the number of transistors in the second pixel circuit 27, the first pixel circuit
  • the number of capacitors in the second pixel circuit 27 is the same as the number of capacitors in the second pixel circuit 27, and the transistors in the first pixel circuit 26 are low-temperature polysilicon transistors, and the transistors in the second pixel circuit 27 are low-temperature polysilicon transistors, it is convenient to The resolution and refresh rate of the first display area 21 are improved, and the power consumption of the first display area 21 is reduced.
  • the number of first sub-pixels 24 per unit area in the first display area 21 is smaller than the sum of the number of first sub-pixels 24 and the number of second sub-pixels 25 per unit area in the second display area 22,
  • the number of first sub-pixels 24 per unit area in the first display area 21 is smaller than the number of second sub-pixels 25 per unit area in the third display area 23. Since the number of first sub-pixels 24 per unit area in the first display area 21 is smaller than the sum of the number of first sub-pixels 24 and the number of second sub-pixels 25 per unit area in the second display area 22, the The light transmittance of one display area 21 is greater than the light transmittance of the second display area 22.
  • the light transmittance of the first display area 21 can be greater than that of the third display area. The light transmittance of the display area 23.
  • the number of first sub-pixels 24 per unit area in the first display area 21 can also be equal to the sum of the number of first sub-pixels 24 and the number of second sub-pixels 25 per unit area in the second display area 22.
  • the number of first sub-pixels 24 in a unit area in the display area 21 may also be equal to the number of second sub-pixels 25 in a unit area in the third display area 23. Since the number of first sub-pixels 24 per unit area in the first display area 21 is equal to the sum of the number of first sub-pixels 24 and the number of second sub-pixels 25 per unit area in the second display area 22, the number of first sub-pixels 24 can be reduced.
  • the difference between the display brightness of the display area 21 and the second display area 22 avoids the large difference in display brightness of the adjacent first display area 21 and the second display area 22 from appearing a clear dividing line. Since the number of first sub-pixels 24 per unit area in the first display area 21 is equal to the number of second sub-pixels 25 per unit area in the third display area 23, the first display area 21 and the third display area 23 can be reduced. The difference in display brightness.
  • the shape of the first display area 21 may be a rectangle, a circle, or an ellipse, but it is not limited thereto.
  • the first display area 21 may be completely surrounded by the second display area 22 and the third display area 23, or may be partially surrounded by the second display area 22 and the third display area 23.
  • An embodiment of the present application also proposes a display panel, which includes the display substrate described in any of the above-mentioned embodiments, and an encapsulation layer.
  • the encapsulation layer is encapsulated on the display substrate.
  • the third display area 23 It includes a second pixel circuit 27 arranged in an array.
  • the second display area 22 includes a first pixel circuit 26 and a second pixel circuit 27 arranged in an array.
  • the first pixel circuit 26 and the second pixel circuit 27 are different, so ,
  • the display brightness of the second display area 22 can be made to be between the display brightness of the first display area 21 and the display brightness of the third display area 23, avoiding a large difference in display brightness of adjacent display areas and a clear dividing line. Improved the display effect.
  • the embodiment of the application also proposes a display device.
  • the display device includes: a device body and the display panel described in any of the above embodiments.
  • the device body has a device area, the display panel covers the device body, the device area is located below the first display area, and the device area includes electronic devices.
  • the above-mentioned electronic device may include at least one of a distance sensor, a microphone, a speaker, a flash, a pixel camera, an infrared lens, a flood light sensor, an ambient light sensor, and a dot projector.
  • the display device in this embodiment may be any product or component with display function, such as electronic paper, mobile phone, tablet computer, television, notebook computer, digital photo frame, navigator, etc.

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Abstract

本申请涉及一种显示基板、显示面板及显示装置。所述显示基板包括：第一显示区、第二显示区与第三显示区。第二显示区位于第一显示区与第三显示区之间。第一显示区的透光率大于第三显示区的透光率。第一显示区中包括阵列排布的第一像素电路，第三显示区中包括阵列排布的第二像素电路，第二显示区中包括阵列排布的第一像素电路与第二像素电路；第一像素电路与第二像素电路不同。

Description

显示基板、显示面板及显示装置 技术领域
本申请涉及OLED显示设备技术领域，尤其涉及一种显示基板、显示面板及显示装置。
背景技术
随着显示装置的快速发展，用户对屏幕占比的要求越来越高。由于屏幕顶部需要安装摄像头、传感器、听筒等元件，因此，相关技术中屏幕顶部通常会预留一部分区域用于安装上述元件，例如，苹果手机iphoneX的“刘海”区域，影响了屏幕的整体一致性。目前，全面屏显示受到业界越来越多的关注。
发明内容
本申请提供一种显示基板、显示面板及显示装置，以解决相关技术中的不足。
根据本申请实施例的第一方面，提供一种显示基板，包括：第一显示区、第二显示区与第三显示区；所述第二显示区位于所述第一显示区与所述第三显示区之间；所述第一显示区的透光率大于所述第三显示区的透光率；所述第一显示区中包括阵列排布的第一像素电路，所述第三显示区中包括阵列排布的第二像素电路，所述第二显示区中包括阵列排布的所述第一像素电路与所述第二像素电路；所述第一像素电路与所述第二像素电路不同。
在一个实施例中，所述第二显示区在所述第一显示区指向所述第三显示区的第一方向上包括依次排列的N个子显示区，每个所述子显示区中包括阵列式排布的所述第一像素电路与所述第二像素电路，且沿所述第一方向，所述子显示区中所述第一像素电路所占的比例依次减小，所述第二像素电路所占的比例依次增加；N为正整数。
由于在第一显示区指向第三显示区的第一方向上第二显示区包括依次排列的N个子显示区，每个子显示区中均包括阵列式排布的第一像素电路与第二像素电路，且沿第一方向，N个子显示区中第一像素电路所占的比例依次减小，第二像素电路所占的比例依次增加，这样，可以使第一显示区的显示亮度向第三显示区的显示亮度逐渐过渡，避免相邻的两个显示区的显示亮度差异较大出现明显的分界线，改善了显示效果。
根据本申请实施例的第二方面，提供一种显示面板，包括上述的显示基板与封装层，所述封装层封装于所述显示基板上。
根据本申请实施例的第三方面，提供一种显示装置，包括：设备本体，具有器件区；如上所述的显示面板，所述显示面板覆盖在所述设备本体上；其中，所述器件区位于所述第一显示区的下方，且所述器件区包括电子器件。
根据上述实施例可知，由于第二显示区位于第一显示区与第三显示区之间，且第一显示区中包括阵列排布的第一像素电路，第三显示区中包括阵列排布的第二像素电路，第二显示区中包括阵列排布的第一像素电路与第二像素电路，其中，第一像素电路与第二像素电路不同，这样，可以使第二显示区的显示亮度介于第一显示区的显示亮度与第三显示区的显示亮度之间，避免相邻显示区的显示亮度差异较大出现明显的分界线，改善了显示效果。
附图说明
图1是示例性地示出的一种全面屏的结构示意图；
图2是本申请实施例示出的一种显示基板的结构示意图；
图3是图2所示的显示基板的子像素排布的结构示意图；
图4是图2所示的显示基板的子像素排布的另一种结构示意图。
具体实施方式
这里将详细地对示例性实施例进行说明，其示例表示在附图中。下面的描述涉及附图时，除非另有表示，不同附图中的相同数字表示相同或相似的要素。以下示例性实施例中所描述的实施方式并不代表与本申请相一致的所有实施方式。相反，它们仅是与如所附权利要求书中所详述的、本申请的一些方面相一致的装置和方法的例子。
如图1所示，一种包括透明显示区11与非透明显示区12的全面屏1，透明显示区11既可以实现透光功能，也可以实现显示功能。其中，透明显示区11的下方可设置有摄像头、距离传感器等感光元件，当然也可以设置其他电子元件，例如，扬声器、闪光灯等。由于透明显示区11中的像素的像素电路与非透明显示区12中的像素的像素电路不同，因此，透明显示区11与非透明显示区12的显示亮度存在较大差异，进而导致透明显示区与非透明显示区之间存在明显的分界线，影响用户体验。
针对上述的技术问题，本申请实施例提供一种显示基板、显示面板及显示装置，可以使显示基板的显示亮度逐渐过渡，避免了相邻显示区之间存在明显的分界线，可以提高显示品质。
本申请的一个实施例提供一种显示基板。如图2所示，该显示基板2包括：第一显示区21、第二显示区22与第三显示区23。第二显示区22位于第一显示区21与第三显示区23之间。第一显示区21的透光率大于第三显示区23的透光率。
在本实施例中，如图3所示，第一显示区21中包括阵列排布的第一子像素和第一像素电路26，第一子像素与第一像素电路26连接。第三显示区23中包括阵列排布的第二子像素和第二像素电路27，第二子像素与第二像素电路27连接。第二显示区22中包括阵列排布的第一子像素和第二子像素，第一像素电路26与第二像素电路27，第一像素电路26与第二像素电路27不同。
在本实施例中，由于第二显示区22位于第一显示区21与第三显示区23之间，且第一显示区21中包括阵列排布的第一像素电路26，第三显示区23中包括阵列排布的第二像素电路27，第二显示区22中包括阵列排布的第一像素电路26与第二像素电路27，其中，第一像素电路26与第二像素电路27不同，这样，可以使第二显示区22的显示亮度介于第一显示区21的显示亮度与第三显示区23的显示亮度之间，使显示基板2的显示亮度可以逐渐过渡，避免了相邻显示区之间的显示亮度差异较大出现明显的分界线，改善了显示效果。
本申请的另一个实施例提供一种显示基板的子像素排布的结构。如图4所示，第一显示区21中包括阵列排布的第一子像素24，第三显示区23中包括阵列排布的第二子像素25，第二显示区22中包括阵列排布的第一子像素24与第二子像素25，其中，一个第一子像素24与一个第一像素电路连接，一个第二子像素25与一个第二像素电路连接。
具体地，在第一显示区21中包括阵列排布的第一子像素24，且一个第一子像素24与一个第一像素电路26连接，第一子像素24可在第一像素电路26的驱动下发光。在第三显示区23中包括阵列排布的第二子像素25，一个第二子像素25与一个第二像素电路27连接，第二子像素25可在第二像素电路27的驱动下发光。第二显示区22中包括阵列排布的第一子像素24与第二子像素25，一个第一子像素24与一个第一像素电路26连接，第一子像素24可在第一像素电路26的驱动下发光，一个第二子像素25与一个第二像素电路27连接，第二子像素25可在第二像素电路27的驱动下发光。其中，在第二显示区22中，第一子像素24与第二子像素25可相间分布，且第一子像素24、 第二子像素25可分别均匀分布，第一子像素24在第二显示区22中的密度与第二子像素25在第二显示区22中的密度可基本相同。由于第二显示区22中混合设置第一子像素24与第二子像素25，可以使第二显示区22显示亮度更好地介于第一显示区21的显示亮度与第三显示区23的显示亮度之间，使显示基板的显示亮度可以逐渐变化，避免相邻显示区之间的显示亮度差异较大出现明显的分界线，改善了显示效果。
在本实施例中，第一显示区21的透光率大于第二显示区22的透光率，第二显示区22的透光率大于第三显示区的透光率23。
由于第一显示区的透光率大于第二显示区的透光率，第二显示区的透光率大于第三显示区的透光率，即第一显示区的透光率向第三显示区的透光率逐渐过渡，又由于透光率可以影响显示亮度，这样有利于使第一显示区的显示亮度向第三显示区的显示亮度逐渐过渡。
上述的第一子像素、第二子像素可以是任意一种颜色的子像素，例如，第一子像素可以是红色子像素、蓝色子像素或绿色子像素。一个第一像素可以包括相邻的不同颜色的第一子像素，相似地，一个第二像素也可以包括相邻的不同颜色的第二子像素。
如图4所示，在本实施例中，第二显示区22在第一显示区21指向第三显示区23的第一方向F1上包括依次排列的N个子显示区，例如三个子显示区221、222、223，每个子显示区中包括阵列式排布的第一子像素24、第二子像素25、第一像素电路与第二像素电路，且沿第一方向F1，子显示区中第一子像素24、第一像素电路所占的比例依次减小，第二子像素25、第二像素电路所占的比例依次增加，其中，N为正整数。例如，N可以为1、2、3、4，以及其他正整数。
例如，如图4所示，N可以为3。第二显示区22在第一方向F1上包括依次排列的3个子显示区221、222、223。每个子显示区中包括阵列式排布的第一子像素24与第二子像素25，一个第一子像素24与一个第一像素电路26连接，一个第二子像素25与一个第二像素电路27连接。第一子像素24、第二子像素25在每个子显示区中均匀分布。第一子像素24在子显示区221中的密度大于第一子像素24在子显示区222中的密度，第一子像素24在子显示区222中的密度大于第一子像素24在子显示区223中的密度，第二子像素25在子显示区221中的密度小于第二子像素25在子显示区222中的密度，第二子像素25在子显示区222中的密度小于第二子像素25在子显示区223中的密度。
同样地，第一像素电路26在子显示区221中的密度大于第一像素电路26在子显示 区222中的密度，第一像素电路26在子显示区222中的密度大于第一像素电路26在子显示区223中的密度，第二像素电路27在子显示区221中的密度小于第二像素电路27在子显示区222中的密度，第二像素电路27在子显示区222中的密度小于第二像素电路27在子显示区223中的密度。
例如，当N为3时，第一子像素24在子显示区221中所占的比例可以为75％，第一子像素24在子显示区222中所占的比例可以为50％，第一子像素24在子显示区223中所占的比例可以为25％。第二子像素25在子显示区221中所占的比例可以为25％，第二子像素25在子显示区222中所占的比例可以为50％，第二子像素25在子显示区223中所占的比例可以为75％。同样地，第一像素电路26在子显示区221中所占的比例可以为75％，第一像素电路26在子显示区222中所占的比例可以为50％，第一像素电路26在子显示区223中所占的比例可以为25％。第二像素电路27在子显示区221中所占的比例可以为25％，第二像素电路27在子显示区222中所占的比例可以为50％，第二像素电路27在子显示区223中所占的比例可以为75％。
由于在第一显示区指向第三显示区的第一方向上第二显示区包括依次排列的N个子显示区，每个子显示区中均包括阵列式排布的第一子像素、第二子像素、第一像素电路与第二像素电路，且沿第一方向，N个子显示区中第一子像素、第一像素电路所占的比例依次减小，第二子像素、第二像素电路所占的比例依次增加，这样，可以使第一显示区的显示亮度向第三显示区的显示亮度逐渐过渡，避免相邻的两个显示区的显示亮度差异较大而出现明显的分界线，改善了显示效果。
在本实施例中，第一子像素与第二子像素不同。具体地，第一子像素可以是透明子像素，第二子像素可以是不透明子像素。或者说，第一子像素的透光率大于第二子像素的透光率。例如，在本实施例中，第一子像素24可包括第一电极、第一有机发光层与第二电极，第一有机发光层位于第一电极上，第二电极位于第一有机发光层上。第一电极可以是透明阳极。第一电极的材料可以是透明的ITO(氧化铟锡)、石墨烯、IZO(氧化铟锌)或ITZO(氧化铟锡锌)，但不限于此。第二子像素25可包括第三电极、第二有机发光层与第四电极，第二有机发光层位于第三电极上，第四电极位于第二有机发光层上。第三电极可以是反射阳极。第三电极可以包括第一透明导电层、金属层与第二透明导电层，第一透明导电层、第二透明导电层的材料可以是ITO，金属层的材料可以是Ag(银)，但不限于此。
在本实施例中，第一电极可包括f个电极块，第一有机发光层可包括与f个电极块 一一对应的f个发光结构，即一个电极块上设置有一个发光结构。f为正整数。例如，f可以为1、2、3或其他正整数。当f大于1时，可以通过同一个第一像素电路26驱动同一第一子像素24中的多个发光结构发光，可以减少第一显示区21的像素电路的数目，并可以削弱显示的颗粒感，有利于改善显示效果。
在本实施例中，第一电极在显示基板所在平面的投影包括一个图形单元或者两个以上的图形单元，图形单元可为圆形、椭圆形、哑铃形、葫芦形或矩形。当图形单元为圆形、椭圆形、哑铃形或葫芦形时，可以改变产生衍射的周期性结构，即改变了衍射场的分布，从而可以减弱衍射现象。进一步地，当第一显示区21下方设置像素摄像头(图像传感器)时，可以确保第一显示区21下方设置的像素摄像头拍照得到的图像具有较高的清晰度。
在本实施例中，第一像素电路26的元器件的数目小于或者等于第二像素电路27的元器件的数目。具体地，第一像素电路26为nTmC像素电路，第二像素电路27为jTkC像素电路，n+m≤j+k，其中，T表示晶体管，C表示电容器，n为正整数，m为自然数，j为正整数，k为自然数。例如，n为1、2、3、4、5、6或7，但不限于此。m可为0、1或2，但不限于此。j为1、2、3、4、5、6或7，但不限于此。k可为0、1或2，但不限于此。即，第一像素电路26中晶体管的数目与电容器的数目的和小于或者等于第二像素电路27中晶体管的数目与电容器的数目的和。当第一像素电路26中晶体管的数目与电容器的数目的和小于第二像素电路27中晶体管的数目与电容器的数目的和时，第一像素电路26的透光率大于第二像素电路27的透光率，有利于提高第一显示区21的透光率。
例如，上述的nTmC像素电路可以为1T像素电路、2T1C像素电路、3T1C像素电路、4T1C像素电路、5T1C像素电路、6T1C像素电路或者7T1C像素电路。上述的jTkC像素电路可以为1T像素电路、2T1C像素电路、3T1C像素电路、4T1C像素电路、5T1C像素电路、6T1C像素电路或者7T1C像素电路。这里，nTmC像素电路指的是包括n个晶体管和m个电容器的像素电路，例如2T1C像素电路指的是，包括2个晶体管和1个电容器的像素电路。相似地，jTkC像素电路指的是包括j个晶体管和k个电容器的像素电路。
例如，在一个实施例中，第一像素电路26为2T1C像素电路，第二像素电路27为7T1C像素电路。2T1C像素电路所占的面积可以比7T1C像素电路所占的面积小，而第一子像素24的开口面积可以小于第二子像素25的开口面积。当第一子像素24的开口 面积小于第二子像素25的开口面积时，且第一子像素24的发光强度等于第二子像素25的发光强度时，第一显示区21的显示亮度比第三显示区23的显示亮度小，为了缩小第一显示区21的显示亮度与第三显示区23的显示亮度之间的差值，可以适当提高第一显示区21中的第一像素的发光强度。当然，第二显示区22中的第一像素的发光强度也可以适当高于第二像素的发光强度。
再如，在另一个实施例中，第一像素电路26中晶体管的数目可以等于第二像素电路27中晶体管的数目，第一像素电路26中电容器的数目可以等于第二像素电路27中电容器的数目。具体地，n＝j且m＝k。第一像素电路26中的晶体管为低温多晶硅(LTPS)晶体管，第二像素电路27中的晶体管为低温多晶氧化物(LTPO)晶体管。由于低温多晶氧化物晶体管的电子迁移率比低温多晶硅晶体管的电子迁移率更高，低温多晶氧化物晶体管比低温多晶硅晶体管更稳定，以及低温多晶氧化物晶体管的功耗比低温多晶硅晶体管的功耗更低，因此，相比于第一像素电路26和第二像素电路27中的晶体管均为低温多晶硅晶体管，当第一像素电路26中的晶体管的数目与第二像素电路27中的晶体管的数目相同、第一像素电路26中的电容器的数目与第二像素电路27中的电容器的数目相同且第一像素电路26中的晶体管为低温多晶硅晶体管、第二像素电路27中的晶体管为低温多晶氧化物晶体管时，便于提高第三显示区23的分辨率和刷新率，且降低第三显示区23的功耗。
当然，在另一个实施例中，当n＝j且m＝k时，第一像素电路26中的晶体管可以为低温多晶氧化物晶体管，第二像素电路27中的晶体管可以为低温多晶硅晶体管。相比于第一像素电路26和第二像素电路27的晶体管均为低温多晶硅晶体管，当第一像素电路26中的晶体管的数目与第二像素电路27中的晶体管的数目相同、第一像素电路26中的电容器的数目与第二像素电路27中的电容器的数目相同且第一像素电路26中的晶体管为低温多晶氧化物晶体管、第二像素电路27中的晶体管为低温多晶硅晶体管时，便于提高第一显示区21的分辨率和刷新率，且降低第一显示区21的功耗。
在本实施例中，第一显示区21中单位面积内第一子像素24的数目小于第二显示区22中单位面积内第一子像素24的数目与第二子像素25的数目的和，第一显示区21中单位面积内第一子像素24的数目小于第三显示区23中单位面积内第二子像素25的数目。由于第一显示区21中单位面积内第一子像素24的数目小于第二显示区22中单位面积内第一子像素24的数目与第二子像素25的数目的和，因此，可以使第一显示区21的透光率大于第二显示区22的透光率。由于第一显示区21中单位面积内第一子像素24 的数目小于第三显示区23中单位面积内第二子像素25的数目时，可以使第一显示区21的透光率大于第三显示区23的透光率。
当然，第一显示区21中单位面积内第一子像素24的数目也可以等于第二显示区22中单位面积内第一子像素24的数目与第二子像素25的数目的和，第一显示区21中单位面积内第一子像素24的数目也可以等于第三显示区23中单位面积内第二子像素25的数目。由于第一显示区21中单位面积内第一子像素24的数目等于第二显示区22中单位面积内第一子像素24的数目与第二子像素25的数目的和，可以减小第一显示区21与第二显示区22的显示亮度的差异，避免相邻的第一显示区21与第二显示区22的显示亮度差异较大出现明显的分界线。由于第一显示区21中单位面积内第一子像素24的数目等于第三显示区23中单位面积内第二子像素25的数目时，可以减小第一显示区21与第三显示区23的显示亮度的差异。
在本实施例中，第一显示区21的形状可以是矩形，也可以是圆形、椭圆形，但不限于此。第一显示区21可以被第二显示区22、第三显示区23完全包围，也可以被第二显示区22、第三显示区23部分包围。
本申请的实施例还提出了一种显示面板，该显示面板包括上述任一实施例所述的显示基板、与封装层。封装层封装于显示基板上。
本实施例中，由于第二显示区22位于第一显示区21与第三显示区23之间，且第一显示区21中包括阵列排布的第一像素电路26，第三显示区23中包括阵列排布的第二像素电路27，第二显示区22中包括阵列排布的第一像素电路26与第二像素电路27，其中，第一像素电路26与第二像素电路27不同，这样，可以使第二显示区22的显示亮度介于第一显示区21的显示亮度与第三显示区23的显示亮度之间，避免相邻显示区的显示亮度差异较大出现明显的分界线，改善了显示效果。
本申请的实施例还提出了一种显示装置。该显示装置包括：设备本体、以及上述任一实施例所述的显示面板。
其中，设备本体具有器件区，显示面板覆盖在设备本体上，器件区位于第一显示区的下方，且器件区包括电子器件。
在本实施例中，上述的电子器件可包括距离传感器、麦克风、扬声器、闪光灯、像素摄像头、红外镜头、泛光感应元件、环境光传感器、点阵投影器中的至少一种。
本实施例中的显示装置可以为：电子纸、手机、平板电脑、电视机、笔记本电脑、 数码相框、导航仪等任何具有显示功能的产品或部件。
在附图中，为了图示的清晰可能夸大了层和区域的尺寸。而且可以理解，当元件或层被称为在另一元件或层“上”时，它可以直接在其他元件上，或者可以存在中间的层。另外，可以理解，当元件或层被称为在另一元件或层“下”时，它可以直接在其他元件下，或者可以存在一个以上的中间的层或元件。另外，还可以理解，当层或元件被称为在两层或两个元件“之间”时，它可以为两层或两个元件之间唯一的层，或还可以存在一个以上的中间层或元件。通篇相似的参考标记指示相似的元件。
在本申请中，术语“第一”、“第二”仅用于描述目的，而不能理解为指示或暗示相对重要性。术语“多个”指两个或两个以上，除非另有明确的限定。
本领域技术人员在考虑说明书及实践这里公开的公开后，将容易想到本申请的其它实施方案。本申请旨在涵盖本申请的任何变型、用途或者适应性变化，这些变型、用途或者适应性变化遵循本申请的一般性原理并包括本申请未公开的本技术领域中的公知常识或惯用技术手段。说明书和实施例仅被视为示例性的，本申请的真正范围和精神由下面的权利要求指出。

Claims (17)

  1. 一种显示基板，包括：
    第一显示区，包括阵列排布的第一像素电路；
    第二显示区；以及
    第三显示区，包括阵列排布的第二像素电路，所述第二显示区位于所述第一显示区与所述第三显示区之间，所述第一显示区的透光率大于所述第三显示区的透光率；
    其中，所述第二显示区中包括阵列排布的所述第一像素电路与所述第二像素电路；所述第一像素电路与所述第二像素电路不同。
  2. 根据权利要求1所述的显示基板，其中，所述第二显示区在所述第一显示区指向所述第三显示区的第一方向上包括依次排列的N个子显示区，每个所述子显示区中包括阵列式排布的所述第一像素电路与所述第二像素电路，且沿所述第一方向，所述子显示区中所述第一像素电路所占的比例依次减小，所述第二像素电路所占的比例依次增加；N为正整数。
  3. 根据权利要求1所述的显示基板，其中，所述第一像素电路为nTmC像素电路，所述第二像素电路为jTkC像素电路，其中，n+m≤j+k，n为正整数，m为自然数，j为正整数，k为自然数。
  4. 根据权利要求3所述的显示基板，其中，所述nTmC像素电路为1T像素电路、2T1C像素电路、3T1C像素电路、4T1C像素电路、5T1C像素电路、6T1C像素电路或者7T1C像素电路；
    所述jTkC像素电路为1T像素电路、2T1C像素电路、3T1C像素电路、4T1C像素电路、5T1C像素电路、6T1C像素电路或者7T1C像素电路。
  5. 根据权利要求3所述的显示基板，其中，当n＝j且m＝k时，所述第一像素电路中的晶体管为低温多晶硅晶体管，所述第二像素电路中的晶体管为低温多晶氧化物晶体管；或者
    所述第一像素电路中的晶体管为低温多晶氧化物晶体管，所述第二像素电路中的晶体管为低温多晶硅晶体管。
  6. 根据权利要求1所述的显示基板，其中，所述第一显示区的透光率大于所述第二显示区的透光率，所述第二显示区的透光率大于所述第三显示区的透光率。
  7. 根据权利要求1所述的显示基板，其中，所述第一显示区还包括阵列排布且与第一像素电路连接的第一子像素，所述第二显示区还包括阵列排布且与第二像素电路连接的第二子像素。
  8. 根据权利要求7所述的显示基板，其中，在所述第二显示区中，所述第一子像素和所述第二子像素相间分布，所述第一子像素和所述第二子像素分别均匀分布，且所述第一子像素的密度与所述第二子像素的密度基本相等。
  9. 根据权利要求7所述的显示基板，其中，
    所述第一显示区中单位面积内第一子像素的数目小于或者等于所述第二显示区中单位面积内第一子像素的数目与第二子像素的数目的和，所述第一显示区中单位面积内第一子像素的数目小于或者等于所述第三显示区中单位面积内第二子像素的数目。
  10. 根据权利要求7所述的显示基板，其中
    所述第一子像素与所述第二子像素不同。
  11. 根据权利要求10所述的显示基板，其中
    所述第一子像素的透光率大于所述第二子像素的透光率。
  12. 根据权利要求7所述的显示基板，其中
    所述第一子像素的开口面积小于所述第二子像素的开口面积，且所述第一子像素的发光强度高于所述第二子像素的发光强度。
  13. 根据权利要求7所述的显示基板，其中，每个所述第一子像素包括：
    第一电极，包括f个电极块；
    第一有机发光层，位于所述第一电极上，所述第一有机发光层包括分别设置在所述f个电极块上而与所述f个电极块一一对应的f个发光结构；以及
    第二电极，位于所述第一有机发光层上；
    f为正整数。
  14. 根据权利要求13所述的显示基板，其中
    所述第一电极在所述显示基板所在平面的投影包括一个图形单元或者两个以上的图形单元；所述图形单元为圆形、椭圆形、哑铃形、葫芦形或矩形。
  15. 根据权利要求1至14中任一项所述的显示基板，其中
    所述第一显示区至少部分地被所述第二显示区和所述第三显示区包围。
  16. 一种显示面板，包括：
    如权利要求1-15任一项所述的显示基板；以及
    封装层，所述封装层封装于所述显示基板上。
  17. 一种显示装置，包括：
    设备本体，具有器件区；以及
    如权利要求16所述的显示面板，所述显示面板覆盖在所述设备本体上；
    其中，所述器件区位于所述第一显示区的下方，且所述器件区包括电子器件。
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