WO2021062982A1 - 管理hmb内存的方法、装置、计算机设备及存储介质 - Google Patents

管理hmb内存的方法、装置、计算机设备及存储介质 Download PDF

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WO2021062982A1
WO2021062982A1 PCT/CN2020/076957 CN2020076957W WO2021062982A1 WO 2021062982 A1 WO2021062982 A1 WO 2021062982A1 CN 2020076957 W CN2020076957 W CN 2020076957W WO 2021062982 A1 WO2021062982 A1 WO 2021062982A1
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unit
management
mapping
hmb
mapping unit
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PCT/CN2020/076957
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French (fr)
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吴娴
韩道静
王庆
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深圳忆联信息***有限公司
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    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02Addressing or allocation; Relocation
    • G06F12/0223User address space allocation, e.g. contiguous or non contiguous base addressing
    • G06F12/023Free address space management
    • G06F12/0238Memory management in non-volatile memory, e.g. resistive RAM or ferroelectric memory
    • G06F12/0246Memory management in non-volatile memory, e.g. resistive RAM or ferroelectric memory in block erasable memory, e.g. flash memory
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02Addressing or allocation; Relocation
    • G06F12/08Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/0802Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
    • G06F12/0866Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches for peripheral storage systems, e.g. disk cache
    • G06F12/0868Data transfer between cache memory and other subsystems, e.g. storage devices or host systems
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02Addressing or allocation; Relocation
    • G06F12/08Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/0802Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
    • G06F12/0866Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches for peripheral storage systems, e.g. disk cache
    • G06F12/0873Mapping of cache memory to specific storage devices or parts thereof

Definitions

  • This application relates to the technical field of solid-state hard disks, and in particular to a method, device, computer equipment, and storage medium for managing HMB memory.
  • the NVMe (Non Volatile Memory Express) protocol defines the HMB (Host Memory Buffer, host memory buffer) function, which means that the solid state drive (SSD) that supports the NVMe protocol can use the host memory (DRAM) specially allocated to the solid state drive by the host. Solid-state hard drives do not need to be equipped with DRAM, which can greatly reduce cost and power consumption.
  • HMB High Memory Buffer, host memory buffer
  • the solid-state drive master control that supports the HMB function can obtain the right to use part of the host memory.
  • the size of the host’s memory is negotiated between the host and the solid-state drive according to their respective capabilities, and is not fixed.
  • the HMB size is 256MB, which is used to cache the temporary mapping table.
  • this part of the memory can only cache part of the mapping table.
  • the complete mapping table still needs to be stored in the flash memory, and the SSD master is responsible for management.
  • the temporary mapping table in the HMB, and the solid-state drive firmware is responsible for managing the complete mapping table in the flash memory.
  • the master When the host initiates a read command, the master first judges whether the mapping information of each LBA is in the HMB according to the management information. If so, it reads the mapping information (data) from the HMB to the SSD master through the PCIe bus.
  • the third-generation PCIe bus can provide a bus bandwidth of 1GB/s. It only takes 4us to transfer 4KB of data. The speed is quite fast. If the mapping information is not in the HMB, the SSD master can only read the mapping information from the SSD flash memory, and read a physical The page time is about 80us, which is relatively slow. After that, the mapping information needs to be cached in the HMB because it is Hot (frequently updated data).
  • the existing master control design has proposed a method to manage the HMB memory.
  • n complete mapping table size/HMB size
  • the master cache SRAM allocates management information for each 4KB memory in HMB.
  • Those 4KB mapping units with the same offset in different segments in the complete mapping table compete for the management unit with offset of offset in master SRAM and 4KB with offset of offset in HMB.
  • Memory and the implementation of the competition principle of new data overwriting old data.
  • the maximum offset is 3(0 ⁇ 3).
  • the controller stores the segment_idx and offset_idx of the 4KB mapping unit provided by the firmware in the management information with an offset equal to offset_idx, and transfers the 4KB mapping unit data to the offset in the HMB 4KB of host memory for offset_idx, and then set the valid position as valid.
  • the prior art method for managing HMB memory allows the mapping units of the same offset in all segments to compete for a management unit in the master control (corresponding to the 4KB memory space in a HMB), which is easy to lose heat. data.
  • the five hot data written [segment0, offset0], [segment0, offset2], [segment1, offset0], [segment2, offset0], [segment1, offset2], finally cached in the HMB only [segment2, offset0] With [segment1, offset2], the other three pieces of data are lost, and the utilization rate of HMB is low, which causes a waste of HMB resources.
  • One of the objectives of the embodiments of the present application is to provide a method, device, computer equipment, and storage medium for managing HMB memory, so as to solve the problem of low utilization rate of HMB.
  • a method for managing HMB memory including:
  • mapping unit Acquiring the mapping unit to be written in the complete mapping table to obtain attribute information of the mapping unit
  • the management unit with the largest Age value is acquired as the target management unit;
  • the mapping unit is written into the segmented memory space with the same offset in the HMB.
  • a device for managing HMB memory including:
  • the attribute obtaining unit is used to obtain the mapping unit to be written in the complete mapping table to obtain the attribute information of the mapping unit;
  • the idle judging unit is used to judge whether there are idle management units in the initial set. If there are idle management units, select the idle management units to obtain the target management unit. If there are no idle management units, get the maximum Age value The management unit as the target management unit;
  • the information writing unit is used to write the attribute information of the mapping unit into the target management unit to form management information
  • the assignment unit is used to set the Valid value of the target management unit to 1, and the Age value to 0, and to set the Age value of other management units in the initial set except the target management unit plus 1;
  • the mapping writing unit is used to write the mapping unit into the segmented memory space with the same offset in the HMB according to the management information.
  • a computer device including a memory, a processor, and a computer program stored in the memory and capable of running on the processor.
  • the processor implements the management HMB described in the first aspect when the processor executes the computer program. The steps of the memory method.
  • a computer-readable storage medium on which a computer program is stored, and when the computer program is executed by a processor, it implements the steps of the method for managing HMB memory in the first aspect.
  • this application divides the HMB into multiple segments, corresponding to the mapping unit storing the same offset, greatly increasing the HMB Hot data hit rate, thereby increasing the utilization rate of HMB; mapping the management unit with the same offset in the main control to the continuous physical address segment of SRAM, with the parallel implementation of the hardware circuit, shortening the query time and improving the efficiency of data query.
  • Figure 1 is an application schematic diagram of the existing method for managing HMB memory
  • FIG. 2 is a schematic flowchart of a method for managing HMB memory provided by an embodiment of the application
  • FIG. 3 is a schematic diagram of the HMB setting sub-flow of a method for managing HMB memory provided by an embodiment of the application;
  • mapping unit reading sub-process of a method for managing HMB memory provided by an embodiment of the application
  • FIG. 5 is a schematic flowchart of a method for managing HMB memory according to another embodiment of the application.
  • FIG. 6 is an application principle diagram of a method for managing HMB memory provided by an embodiment of the application.
  • FIG. 7 is an application principle diagram of a method for managing HMB memory provided by an embodiment of the application.
  • FIG. 8 is a schematic block diagram of a device for managing HMB memory provided by an embodiment of the application.
  • FIG. 9 is a schematic block diagram of an HMB setting unit of an apparatus for managing HMB memory provided by an embodiment of the application.
  • FIG. 10 is a schematic block diagram of a device for managing HMB memory provided by another embodiment of this application.
  • FIG. 11 is a schematic block diagram of a data reading unit of a device for managing HMB memory provided by another embodiment of the application.
  • FIG. 12 is a schematic block diagram of a computer device provided by an embodiment of this application.
  • FIG. 2 is a schematic flowchart of a method for managing HMB memory provided by an embodiment of the application.
  • the method for managing HMB memory is applied to SSD, and the SSD performs data interaction with the host.
  • FIG. 2 is a schematic flowchart of a method for managing HMB memory provided by an embodiment of the present application. As shown in Figure 2, the method includes the following steps S110 to S180.
  • the complete mapping table can be divided into multiple mapping units.
  • Each mapping unit has a size of KB, and each mapping unit is written with corresponding attribute information.
  • the attribute information includes offset information and subdivision information.
  • the mapping unit [segment_x, offset_y] represents the offset information as offset_y, and the subordinate segment information is segment_x.
  • the attribute information of the mapping unit includes offset information offset_y and subordinate segment information as segment_x.
  • FIG. 3 is a schematic flowchart of the HMB setting sub-process.
  • a method for managing HMB memory in this embodiment further includes an HMB setting process before step S110, and the HMB setting process includes steps S210-S250.
  • the SSD initially applies for a part of the memory space from the host to be used as HMB (Host Memory Buffer), so that the SSD (Solid State Drive) that supports the NVMe protocol can use the host memory (DRAM) requested from the host.
  • Solid-state hard drives do not need to be equipped with DRAM by themselves, which can greatly reduce cost and power consumption.
  • S220 Divide the HMB into N segments to obtain the segment size.
  • the complete mapping table in the flash memory is equally divided into M segments, and the sizes of the segments and the segments are equal.
  • the segment is divided into S segmented memory spaces, and the segment is divided into S mapping units, and the size of the segmented memory space and the mapping unit are equal.
  • This application first divides the entire HMB into N segments (SET), and then divides the complete mapping table according to the segment size to obtain M segments, and further divides the segments into S segments.
  • the memory space is divided into S mapping units.
  • the segmented memory space and the mapping unit have the same size. In this embodiment, the segmented memory space and the mapping unit are both 4KB in size.
  • the SRAM of the SSD master control has 6 management units corresponding to the associated management of 6 segmented memory spaces.
  • the management unit is used to store the attribute information of the mapping unit written into the segmented memory space as Management information, including segment value and offset value.
  • mapping unit is stored in the segmented memory space with the same offset, and the attribute information of the mapping unit is stored as management information in the target management unit with the same offset.
  • the size of the mapping unit and the segmented memory space are both 4KB, and this application defines that mapping units with the same offset can be stored in the segmented memory space with the same offset.
  • This solution can store multiple mapping units with the same offset at the same time, making better use of HMB memory space and improving the hit rate of HMB usage.
  • the aforementioned N, M, and S all represent natural numbers greater than zero.
  • the offset information in the attribute information is obtained, all management units with the same offset are filtered out according to the offset information, and all the management units are used as the initial set for further checking
  • the management unit in the initial set judges and determines the target management unit for writing management information.
  • S140 If there are idle management units, select the idle management units to obtain the target management unit.
  • the initial set contains management units with the same offset attribute.
  • the mapping unit Before the mapping unit writes the segmented memory space corresponding to the offset according to the offset, it needs to determine whether there is free segmented memory space. It is available for writing, so it is necessary to determine whether there is an idle management unit in the initial set. There are two situations at this time. One is that there is an idle management unit, which means there is a segmented memory space that has not been written into the mapping unit. The mapping unit can be directly written into the corresponding segmented memory space, and the idle management unit needs to be further selected to obtain Target management unit; the other is that there is no idle management unit, and a segmented memory space that has been written with a mapping unit needs to be eliminated and written into a new mapping unit. At this time, the management unit with the largest Age value needs to be obtained as the target Management unit.
  • this application adopts the LRU (Least Recently Used) algorithm to introduce the Age value in the management unit, and the Age value represents the new and old data in the corresponding segmented memory space, and the value is 0, 1...N -1, the smaller the value, the newer the data.
  • Each management unit carries the Age value.
  • the management unit with the largest Age value (N-1) in the initial set is the oldest management unit, which is used as The target management unit eliminates data and writes it into a new mapping unit.
  • the attribute information is written into the target management unit to form management information, which is used to subsequently query the corresponding mapping unit according to the attribute information and download the corresponding mapping data.
  • S170 Set the Valid value of the target management unit to 1, and the Age value to 0, and set the Age value of other management units in the initial set except the target management unit plus 1.
  • Valid indicates whether the management information is valid, a Valid value of 1 represents that the management information of the management unit is valid, a Valid value of 0 represents that the management information of the management unit is invalid, and the Valid value of the target management unit is set to 1. It means that the management information in the management unit is effective.
  • the Age value in the eliminated management unit is correspondingly increased by 1, ensuring that the Age value corresponding to the management unit corresponding to the mapping unit written first is always greater than the Age value corresponding to the management unit corresponding to the mapping unit written later, so that the Age value can be passed To filter out the oldest management unit and eliminate it.
  • the firmware writes [segment0, offset0], [segment0, offset1], [segment1, offset0], [segment2, offset0], [segment1, offset1] five mapping units, according to the above write and elimination rules, finally
  • the management unit #1 will be eliminated according to the elimination rule, as shown in Figure 6.
  • mapping unit into the segmented memory space with the same offset in the HMB according to the management information.
  • step S190 is further included after step S180.
  • S190 Store the management units belonging to the same initial collection in an SRAM segment with consecutive physical addresses.
  • the main control needs to query multiple SRAM address segments when querying the management unit, which will slightly increase the query time.
  • this application stores the management units belonging to the same initial collection in the SRAM segment with continuous physical addresses.
  • the SRAM query can be started only once (start address Add the query length), which can effectively shorten the query time and improve the query efficiency.
  • Figure 4 is a schematic flow chart of the mapping unit reading sub-process, referring to Figure 4, a method for managing HMB memory in this embodiment, after step S180, also includes a mapping information (data) reading process, mapping information (data) reading
  • the fetching process includes steps S310-S340.
  • S330 Query the management unit according to the attribute information to obtain management units with the same attribute information.
  • S340 Read the mapping unit data of the corresponding position on the HMB according to the management information of the management unit.
  • mapping unit read command when reading the mapping unit data, the mapping unit read command is obtained, the mapping unit read command is parsed to obtain the attribute information of the mapping unit to be read, and the management unit is queried according to the attribute information to obtain The management unit with the same attribute information reads the mapping unit data of the corresponding position on the HMB according to the management information of the management unit.
  • FIG. 8 is a schematic block diagram of a device for managing HMB memory provided by an embodiment of the present application. As shown in FIG. 8, corresponding to the above method for managing HMB memory, this application also provides a device for managing HMB memory.
  • the device for managing HMB memory includes a unit for executing the above method for managing HMB memory, and the device can be configured in a desktop computer, a tablet computer, a laptop computer, and other terminals.
  • the device for managing HMB memory includes an attribute acquisition unit 10, a screening collection unit 20, an idle determination unit 30, an information writing unit 40, an assignment unit 50, a mapping writing unit 60, and an HMB setting unit 70.
  • the attribute obtaining unit 10 is used to obtain the mapping unit to be written in the complete mapping table to obtain the attribute information of the mapping unit.
  • the screening collection unit 20 screens management units with the same offset as the mapping unit according to the attribute information to obtain the initial collection.
  • the idle judging unit 30 is used to judge whether there are idle management units in the initial set. If there are idle management units, select the idle management units to obtain the target management unit; if there are no idle management units, obtain the Age value The largest management unit is used as the target management unit.
  • the information writing unit 40 is used to write the attribute information of the mapping unit into the target management unit to form management information.
  • the assignment unit 50 is used to set the Valid value of the target management unit to 1, and the Age value to 0, and to set the Age value of other management units in the initial set except the target management unit plus 1.
  • the mapping writing unit 60 is configured to write the mapping unit into the segmented memory space with the same offset in the HMB according to the management information.
  • an apparatus for managing HMB memory of the present application further includes an HMB setting unit 70.
  • the HMB setting unit 70 includes a memory application subunit 71, a segmentation subunit 72, a segmentation subunit 73, and a switch.
  • the molecular unit 74 and the definition subunit 75 are included in an apparatus for managing HMB memory of the present application.
  • the memory application subunit 71 is used to apply to the host to allocate a memory space as an HMB for storing the mapping unit.
  • the segmentation subunit 72 is used to divide the HMB into N segments to obtain the segment size.
  • the division subunit 73 is configured to divide the complete mapping table in the flash memory into M divisions according to the size of the division, and the divisions and divisions have the same size.
  • the molecular cutting unit 74 divides the segment into S segmented memory spaces, and divides the segment into S mapping units, and the size of the segmented memory space and the mapping unit are equal.
  • the definition subunit 75 is used to define that the mapping unit is stored in the segmented memory space with the same offset, and the attribute information of the mapping unit is stored as management information in the target management unit with the same offset.
  • N, M, and S all represent natural numbers greater than zero.
  • FIG. 10 is a schematic block diagram of a device for managing HMB memory provided by another embodiment of the present application. As shown in FIG. 10, the device for managing HMB memory in this embodiment is based on the above embodiment with an address adjustment unit 80 and a data reading unit 90 added.
  • the address adjustment unit 80 is used to store the management units belonging to the same initial collection in an SRAM segment with consecutive physical addresses.
  • the data reading unit 90 includes a command acquisition subunit 91, an attribute analysis subunit 92, an attribute query subunit 93 and a data reading subunit 94.
  • the command obtaining subunit 91 is used to obtain a reading command of the mapping unit.
  • the attribute analysis subunit 92 is used to parse the mapping unit read command to obtain the attribute information of the mapping unit to be read.
  • the attribute query subunit 93 is used to query the management units according to the attribute information to obtain management units with the same attribute information.
  • the data reading subunit 94 is used to read the mapping unit data of the corresponding position on the HMB according to the management information of the management unit.
  • the computer device 500 may be a terminal or a server, where the terminal may be an electronic device with communication functions such as a smart phone, a tablet computer, a notebook computer, a desktop computer, a personal digital assistant, and a wearable device.
  • the server can be an independent server or a server cluster composed of multiple servers.
  • the computer device 500 includes a processor 502, a memory, and a network interface 505 connected through a system bus 501, where the memory may include a non-volatile storage medium 503 and an internal memory 504.
  • the non-volatile storage medium 503 can store an operating system 5031 and a computer program 5032.
  • the computer program 5032 includes program instructions.
  • the processor 502 can execute a method for managing HMB memory.
  • the processor 502 is used to provide calculation and control capabilities to support the operation of the entire computer device 500.
  • the internal memory 504 provides an environment for the operation of the computer program 5032 in the non-volatile storage medium 503.
  • the processor 502 can execute a method for managing HMB memory.
  • the network interface 505 is used for network communication with other devices.
  • the specific computer device 500 may include more or fewer components than shown in the figure, or combine certain components, or have a different component arrangement.
  • the processor 502 is configured to run a computer program 5032 stored in the memory.
  • the processor 502 may be a central processing unit (Central Processing Unit, CPU), and the processor 502 may also be other general-purpose processors, digital signal processors (Digital Signal Processors, DSPs), Application Specific Integrated Circuit (ASIC), Field-Programmable Gate Array (FPGA) or other programmable logic devices, discrete gates or transistor logic devices, discrete hardware components, etc.
  • the general-purpose processor may be a microprocessor or the processor may also be any conventional processor.
  • the computer program includes program instructions, and the computer program can be stored in a storage medium, which is a computer-readable storage medium.
  • the program instructions are executed by at least one processor in the computer system to implement the process steps of the foregoing method embodiments.
  • the storage medium may be a computer-readable storage medium.
  • the storage medium may be a U disk, a mobile hard disk, a read-only memory (Read-Only Memory, ROM), a magnetic disk or an optical disk, and other computer-readable storage media that can store program codes.

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Abstract

一种管理HMB内存的方法、装置、计算机设备及存储介质,方法包括:获取完整映射表中待写入的映射单元,以得到该映射单元的属性信息(S110);根据属性信息,筛选与该映射单元具有相同偏移量的管理单元,以得到初始集合(S120);判断初始集合是否存在空闲的管理单元(S130);若存在,则挑选出空闲的管理单元,以得到目标管理单元(S140);若不存在,则获取Age值最大的管理单元作为目标管理单元(S150);将映射单元的属性信息写入目标管理单元,以形成管理信息(S160);根据管理信息将映射单元写入HMB中具有相同偏移量的分段内存空间(S180)。通过将HMB切分成多个段,对应存储相同偏移量的映射单元,大大增加HMB的热数据命中率,进而提高了HMB的使用率。

Description

管理HMB内存的方法、装置、计算机设备及存储介质
本申请要求于2019年9月30日在中国专利局提交的、申请号为201910947374.7、发明名称为“管理HMB内存的方法、装置、计算机设备及存储介质”的中国专利申请的优先权,其全部内容通过引用结合在本申请中。
技术领域
本申请涉及固态硬盘技术领域,具体涉及一种管理HMB内存的方法、装置、计算机设备及存储介质。
背景技术
NVMe(Non Volatile Memory Express)协议定义了HMB(Host Memory Buffer,主机内存缓)功能,意思是支持NVMe协议的固态硬盘(SSD)可以使用主机特意分配给固态硬盘使用的主机内存(DRAM),这样固态硬盘就不需要自己配备DRAM,能大大降低成本和功耗。
支持了HMB功能的固态硬盘主控能够获得一部分主机内存的使用权,主机内存的大小是主机和固态硬盘按照各自的能力磋商出来的,非固定。这里我们假设HMB大小为256MB,用于缓存临时映射表,对于1TG容量的固态硬盘来讲这部分内存只能缓存部分映射表,完整的映射表依然需要存储在闪存中,固态硬盘主控负责管理HMB中的临时映射表,固态硬盘固件负责管理闪存中的完整映射表。
当主机发起一个读命令时,主控首先根据管理信息判断各LBA的映射信息是否在HMB中,如果在,则通过PCIe总线将映射信息(数据)从HMB中读到SSD主控,主流的第三代PCIe总线能够提供1GB/s的总线带宽,传输4KB的数据只需要4us,速度相当快,如果映射信息不在HMB,则SSD主控只能从SSD的闪存中去读映射信息,读一个物理页的时间大概为80us,比较慢,之后还需要将该映射信息缓存到HMB中,因为它是Hot(频繁更新的数据)的。
现有的主控设计已经提出了一种管理HMB内存的方法,根据HMB大小将SSD中完整映射表分成n个部分(segment),n=完整映射表大小/HMB大小,主控的 高速缓存(SRAM)为HMB中每个4KB内存分配管理信息,完整映射表中不同segment中offset相同的那些4KB映射单元竞争主控SRAM中偏移量为offset的管理单元以及HMB中偏移量为offset的4KB内存,以及实行新数据覆盖旧数据的竞争原则。如图1所示,该示例中n=3,可以看出每个segment的大小等于HMB大小,我们为segment中每个4KB颗粒定义偏移量(offset),该示例中最大offset为3(0~3)。
当有新的4KB映射单元需要存入HMB中,控制器将固件提供的4KB映射单元的segment_idx和offset_idx存入偏移量等于offset_idx的管理信息中,将4KB映射单元数据传输至HMB中偏移量为offset_idx的4KB主机内存,然后将valid位置为有效。
现有技术的管理HMB内存的方法为了追求极致的查询效率,让所有segment中相同offset的映射单元竞争一个主控中的管理单元(对应于一个HMB中的4KB内存空间),这样很容易丢掉热数据。例如写入的五个热数据[segment0,offset0],[segment0,offset2],[segment1,offset0],[segment2,offset0],[segment1,offset2],最终缓存在HMB中的只有[segment2,offset0]和[segment1,offset2],另外三笔数据都丢掉了,HMB的使用率低,造成HMB的资源浪费。
发明概述
技术问题
本申请实施例的目的之一在于:提供一种管理HMB内存的方法、装置、计算机设备及存储介质,旨在解决HMB的使用率低的问题。
问题的解决方案
技术解决方案
为解决上述技术问题,本申请实施例采用的技术方案是:
第一方面,提供了一种管理HMB内存的方法,包括:
获取完整映射表中待写入的映射单元,以得到该映射单元的属性信息;
根据属性信息,筛选与该映射单元具有相同偏移量的管理单元,以得到初始集合;
判断初始集合是否存在空闲的管理单元;
若存在空闲的管理单元,则挑选出空闲的管理单元,以得到目标管理单元;
若不存在空闲的管理单元,则获取Age值最大的管理单元作为目标管理单元;
将映射单元的属性信息写入目标管理单元,以形成管理信息;
设置所述目标管理单元的Valid值为1,Age值为0,并设置初始集合中除了目标管理单元外的其他管理单元的Age值加1;
根据管理信息将映射单元写入HMB中具有相同偏移量的分段内存空间。
第二方面,提供了一种管理HMB内存的装置,包括:
属性获取单元,用于获取完整映射表中待写入的映射单元,以得到该映射单元的属性信息;
筛选集合单元,根据属性信息,筛选与该映射单元具有相同偏移量的管理单元,以得到初始集合;
空闲判断单元,用于判断初始集合是否存在空闲的管理单元,若存在空闲的管理单元,则挑选出空闲的管理单元,以得到目标管理单元,若不存在空闲的管理单元,则获取Age值最大的管理单元作为目标管理单元;
信息写入单元,用于将映射单元的属性信息写入目标管理单元,以形成管理信息;
赋值单元,用于设置所述目标管理单元的Valid值为1,Age值为0,并设置初始集合中除了目标管理单元外的其他管理单元的Age值加1;
映射写入单元,用于根据管理信息将映射单元写入HMB中具有相同偏移量的分段内存空间。
第三方面,提供一种计算机设备,包括存储器、处理器及存储在存储器上并可在处理器上运行的计算机程序,所述处理器执行所述计算机程序时实现第一方面所述的管理HMB内存的方法的步骤。
第四方面,提供一种计算机可读存储介质,其上存储有计算机程序,所述计算机程序被处理器执行时实现第一方面所述的管理HMB内存的方法的步骤。
本申请实施例提供的管理HMB内存的方法、装置、计算机设备及存储介质的有益效果在于:本申请通过将HMB切分成多个分段,对应存储相同偏移量的映射单元,大大增加HMB的热数据命中率,进而提高了HMB的使用率;将主控中 具有相同偏移量的管理单元映射到SRAM的连续物理地址段,配合硬件电路的并行实现,缩短查询时间,提高数据查询效率。
发明的有益效果
对附图的简要说明
附图说明
图1为现有管理HMB内存的方法的应用原理图;
图2为本申请实施例提供的一种管理HMB内存的方法的流程示意图;
图3为本申请实施例提供的一种管理HMB内存的方法的HMB设定子流程示意图;
图4为本申请实施例提供的一种管理HMB内存的方法的映射单元读取子流程示意图;
图5为本申请另一实施例提供的一种管理HMB内存的方法的流程示意图;
图6为本申请实施例提供的一种管理HMB内存的方法的应用原理图;
图7为本申请实施例提供的一种管理HMB内存的方法的应用原理图;
图8为本申请实施例提供的一种管理HMB内存的装置的示意性框图;
图9为本申请一实施例提供的一种管理HMB内存的装置的HMB设定单元的示意性框图;
图10为本申请另一实施例提供的一种管理HMB内存的装置的示意性框图;
图11为本申请另一实施例提供的一种管理HMB内存的装置的数据读取单元的示意性框图;
图12为本申请实施例提供的计算机设备的示意性框图。
发明实施例
本发明的实施方式
图2为本申请实施例提供的一种管理HMB内存的方法的示意性流程图。该一种管理HMB内存的方法应用于SSD中,该SSD与主机进行数据交互。
图2是本申请实施例提供的管理HMB内存的方法的流程示意图。如图2所示,该方法包括以下步骤S110至S180。
S110、获取完整映射表中待写入的映射单元,以得到该映射单元的属性信息。
在本实施例中,完整映射表可以切分成多个映射单元,每个映射单元的大小KB,每个映射单元写到有对应的属性信息,属性信息包括偏移量信息和所属分部信息。举例说明,映射单元[segment_x,offset_y],代表偏移量信息为offset_y,所属分部信息为segment_x,该映射单元的属性信息就包括偏移量信息offset_y和所属分部信息为segment_x。
图3为HMB设定子流程的流程示意图,参阅图3,本实施例的一种管理HMB内存的方法,在步骤S110之前还包括HMB设定流程,HMB设定流程包括步骤S210-S250。
S210、向主机申请分配一个内存空间作为HMB,以用于存放映射单元。
在本实施例中,SSD在一开始向主机申请一部分内存空间,用于作为HMB(Host Memory Buffer),这样支持NVMe协议的SSD(固态硬盘)可以使用从主机申请的主机内存(DRAM),这样固态硬盘就不需要自己配备DRAM,能大大降低成本和功耗。
S220、将HMB均分成N个分段,以得到分段大小。
S230、根据分段大小,将闪存中完整映射表均分为M个分部,分段和分部的大小相等。
S240、将分段切分成S个分段内存空间,将分部切分成S个映射单元,分段内存空间和映射单元的大小相等。
在本实施例中,对于步骤S220-S240,区别于现有根据整个HMB大小将闪存上完整映射表切割成n个分部(segment),n=完整映射表大小/HMB大小。本申请先将整个HMB切分成N个分段(SET),再根据分段大小对完整映射表进行切分,以得到M个分部(segment),并进一步将分段切分成S个分段内存空间,将分部切分成S个映射单元,分段内存空间和映射单元的大小相等,在本实施例中,分段内存空间和映射单元的大小均为4KB。
如图6所示,本示例中HMB的大小为24KB,N=3,HMB切分成3个分段,每个分段大小为8KB,每个分段包含有2个4KB的分段内存空间,HMB一共包括6个分段内存空间;完整映射表的大小为48KB,按照分段大小8KB切分成6个分部, M=6,每个分部为8KB,每个分部包括有2个4KB的映射单元,一共是12个映射单元,SSD主控的SRAM有6个管理单元对应关联管理6个分段内存空间,管理单元用于对应存储写入分段内存空间的映射单元的属性信息作为管理信息,包括segment值和offset值。
S250、定义将映射单元存放于相同偏移量的分段内存空间,映射单元的属性信息作为管理信息存放于具有相同偏移量的目标管理单元中。
在本实施例中,映射单元和分段内存空间大小均为4KB,本申请定义偏移量(offset)相同的映射单元即可存储于相同offset的分段内存空间上。具体的,完整映射表中M个offset=x的映射单元即可共同竞争并最终存储于N个offset=x的分段内存空间中,相比于现有技术方案中多个offset=x的映射单元竞争一个offset=x的分段内存空间,本方案能够同时存入多个相同offset的映射单元,更好的利用HMB的内存空间,提高HMB的使用命中率。
如图6所示,完整映射表分割而成的6个segment中offset=x的映射单元竞争HMB中3个SET中offset=x的内存空间,在这里上述的x取值为0或1,如此,HMB就能存储N(3)个相同offset=x的映射单元了。具体的,上述的N、M和S,均代表大于0的自然数。
S120、根据属性信息,筛选与该映射单元具有相同偏移量的管理单元,以得到初始集合。
在本实施例中,根据得到的属性信息,获取属性信息中的偏移量信息,根据偏移量信息筛选出offset相同的所有管理单元,并将所有的管理单元作为初始集合,用于进一步对初始集合内的管理单元进行判断,确定用于写入管理信息的目标管理单元。
S130、判断初始集合是否存在空闲的管理单元。
S140、若存在空闲的管理单元,则挑选出空闲的管理单元,以得到目标管理单元。
S150、若不存在空闲的管理单元,则获取Age值最大的管理单元作为目标管理单元。
在本实施例中,初始集合中包含具有同一偏移量属性的管理单元,映射单元根 据偏移量写入对应偏移量的分段内存空间之前,需要先确定是否有空闲的分段内存空间可供写入,因此需要判断初始集合是否存在空闲的管理单元,此时存在两种情况。一种是存在空闲的管理单元,则代表存在未写入映射单元的分段内存空间,可以将映射单元直接写入到对应的分段内存空间内,需要进一步挑选出空闲的管理单元,以得到目标管理单元;另外一种是不存在空闲的管理单元,需要将一个已经写有映射单元的分段内存空间淘汰后写入新的映射单元,此时需要获取到Age值最大的管理单元作为目标管理单元。
具体的,本申请采用LRU(Least Recent Used,最近最少使用)算法,在管理单元中引入Age值,通过Age值表示对应分段内存空间中数据的新旧,取值为0,1...N-1,值越小表示数据越新,每个管理单元中均携带有Age值,通过初始集合中Age值最大(N-1)的那个管理单元,即为最旧的管理单元,用于作为目标管理单元,进行数据淘汰,并写入新的映射单元。
S160、将映射单元的属性信息写入目标管理单元,以形成管理信息。
在本实施例中,将属性信息写入目标管理单元形成管理信息,用于后续根据属性信息查询对应的映射单元,并下载对应的映射数据。
S170、设置所述目标管理单元的Valid值为1,Age值为0,并设置初始集合中除了目标管理单元外的其他管理单元的Age值加1。
在本实施例中,Valid表示该管理信息是否有效,Valid值为1代表该管理单元的管理信息有效,Valid值为0代表该管理单元的管理信息无效,设置目标管理单元的Valid值为1,则代表设置该管理单元内的管理信息有效。将新写入映射单元的Age值设置为0,并将初始集合中除了目标管理单元外的其他管理单元的Age值加1,也就是每次写入一个新的映射单元时,将其余没有被淘汰的管理单元内的Age值对应加1,保证了先写入的映射单元对应的管理单元对应的Age值一直大于后写入的映射单元对应的管理单元对应的Age值,使得可以通过Age值来筛选出最旧的管理单元并淘汰。
举例说明,固件写入[segment0,offset0],[segment0,offset1],[segment1,offset0],[segment2,offset0],[segment1,offset1]五个映射单元,根据上述的写入和淘汰规则,最终offset=0的三笔热数据都被缓存在了HMB中。假设后续固件又写入映射 单元[segment5,offset0],则更具淘汰规则#1号管理单元将被淘汰,最终如图6所示。
S180、根据管理信息将映射单元写入HMB中具有相同偏移量的分段内存空间。
在本实施例中,根据管理信息中的偏移量信息,将映射单元写入HMB中具有相同偏移量的分段内存空间,例如所有offset=0的映射单元对应写入在offset=0的分段内存空间内,以保证能够存入多个相同offset的映射单元,更好的利用HMB的内存空间,提高HMB的使用命中率。
参考图5,在一实施例中,步骤S180之后还包括步骤S190。
S190、将属于同一个初始合集的管理单元存放于物理地址连续的SRAM段。
在一实施例中,由于将HMB切分成多个分段,因此主控在查询管理单元时需要查询多个SRAM的地址段,会略微增加查询时间。如图7所示,本申请通过将属于同一个初始合集的管理单元存放于物理地址连续的SRAM段,主控查询算法的硬件电路实现时,可以做到只启动一次SRAM的查询(起始地址加查询长度),可以有效缩短查询时间,提高查询效率。
图4为映射单元读取子流程的流程示意图,参阅图4,本实施例的一种管理HMB内存的方法,在步骤S180之后还包括映射信息(数据)读取流程,映射信息(数据)读取流程包括步骤S310-S340。
S310、获取映射单元读取命令。
S320、解析映射单元读取命令,以得到待读取的映射单元的属性信息。
S330、根据属性信息查询管理单元,以得到具有相同属性信息的管理单元。
S340、根据管理单元的管理信息读取HMB上对应位置的映射单元数据。
在一实施例中,在读取映射单元数据时,获取映射单元读取命令,解析映射单元读取命令,以得到待读取的映射单元的属性信息,根据属性信息查询管理单元,以得到具有相同属性信息的管理单元,根据管理单元的管理信息读取HMB上对应位置的映射单元数据。
举例说明,查询映射单元[segment1,offset0]是否在HMB中,则主控直接查询offset=0的管理单元中是否存在segment= segment1的单元,如果存在则命中,将对应的HMB数据传给固件,否则未命中,本示例中结果为命中#3号HMB内存,本申请能大大提升HMB的命中率。
图8是本申请实施例提供的一种管理HMB内存的装置的示意性框图。如图8所示,对应于以上管理HMB内存的方法,本申请还提供一种管理HMB内存的装置。该管理HMB内存的装置包括用于执行上述管理HMB内存的方法的单元,该装置可以被配置于台式电脑、平板电脑、手提电脑、等终端中。具体地,请参阅图8,该管理HMB内存的装置包括属性获取单元10、筛选集合单元20、空闲判断单元30、信息写入单元40、赋值单元50、映射写入单元60以及HMB设定单元70。
属性获取单元10,用于获取完整映射表中待写入的映射单元,以得到该映射单元的属性信息。
筛选集合单元20,根据属性信息,筛选与该映射单元具有相同偏移量的管理单元,以得到初始集合。
空闲判断单元30,用于判断初始集合是否存在空闲的管理单元,若存在空闲的管理单元,则挑选出空闲的管理单元,以得到目标管理单元,若不存在空闲的管理单元,则获取Age值最大的管理单元作为目标管理单元。
信息写入单元40,用于将映射单元的属性信息写入目标管理单元,以形成管理信息。
赋值单元50,用于设置所述目标管理单元的Valid值为1,Age值为0,并设置初始集合中除了目标管理单元外的其他管理单元的Age值加1。
映射写入单元60,用于根据管理信息将映射单元写入HMB中具有相同偏移量的分段内存空间。
参考图9,本实施例中,本申请一种管理HMB内存的装置还包括HMB设定单元70,HMB设定单元70包括内存申请子单元71、分段子单元72、分部子单元73、切分子单元74和定义子单元75。
内存申请子单元71,用于向主机申请分配一个内存空间作为HMB,以用于存放映射单元。
分段子单元72,用于将HMB均分成N个分段,以得到分段大小。
分部子单元73,用于根据分段大小,将闪存中完整映射表均分为M个分部,分段和分部的大小相等。
切分子单元74,将分段切分成S个分段内存空间,将分部切分成S个映射单元,分段内存空间和映射单元的大小相等。
定义子单元75,用于定义将映射单元存放于相同偏移量的分段内存空间,映射单元的属性信息作为管理信息存放于具有相同偏移量的目标管理单元中。
具体的,上述的N、M和S,均代表大于0的自然数。
图10是本申请另一实施例提供的一种管理HMB内存的装置的示意性框图。如图10所示,本实施例的管理HMB内存的装置是上述实施例的基础上增加了地址调整单元80和数据读取单元90。
地址调整单元80,用于将属于同一个初始合集的管理单元存放于物理地址连续的SRAM段。
如图11所示,数据读取单元90包括命令获取子单元91、属性解析子单元92、属性查询子单元93和数据读取子单元94。
命令获取子单元91,用于获取映射单元读取命令。
属性解析子单元92,用于解析映射单元读取命令,以得到待读取的映射单元的属性信息。
属性查询子单元93,用于根据属性信息查询管理单元,以得到具有相同属性信息的管理单元。
数据读取子单元94,用于根据管理单元的管理信息读取HMB上对应位置的映射单元数据。
需要说明的是,上述管理HMB内存的装置和各单元的具体实现过程,可以参考前述方法实施例中的相应描述,在此不再赘述。
请参阅图12,图12是本申请实施例提供的一种计算机设备的示意性框图。该计算机设备500可以是终端,也可以是服务器,其中,终端可以是智能手机、平板电脑、笔记本电脑、台式电脑、个人数字助理和穿戴式设备等具有通信功能的电子设备。服务器可以是独立的服务器,也可以是多个服务器组成的服务器集群。
参阅图12,该计算机设备500包括通过***总线501连接的处理器502、存储器和网络接口505,其中,存储器可以包括非易失性存储介质503和内存储器504。
该非易失性存储介质503可存储操作***5031和计算机程序5032。该计算机程序5032包括程序指令,该程序指令被执行时,可使得处理器502执行一种管理HMB内存的方法。该处理器502用于提供计算和控制能力,以支撑整个计算机设备500的运行。该内存储器504为非易失性存储介质503中的计算机程序5032的运行提供环境,该计算机程序5032被处理器502执行时,可使得处理器502执行一种管理HMB内存的方法。该网络接口505用于与其他设备进行网络通信。本领域技术人员可以理解,图12中示出的结构,仅仅是与本申请方案相关的部分结构的框图,并不构成对本申请方案所应用于其上的计算机设备500的限定,具体的计算机设备500可以包括比图中所示更多或更少的部件,或者组合某些部件,或者具有不同的部件布置。
其中,所述处理器502用于运行存储在存储器中的计算机程序5032。
应当理解,在本申请实施例中,处理器502可以是中央处理单元(Central Processing Unit,CPU),该处理器502还可以是其他通用处理器、数字信号处理器(Digital Signal Processor,DSP)、专用集成电路(Application Specific Integrated Circuit,ASIC)、现成可编程门阵列(Field-Programmable Gate Array,FPGA)或者其他可编程逻辑器件、分立门或者晶体管逻辑器件、分立硬件组件等。其中,通用处理器可以是微处理器或者该处理器也可以是任何常规的处理器等。
本领域普通技术人员可以理解的是实现上述实施例的方法中的全部或部分流程,是可以通过计算机程序来指令相关的硬件来完成。该计算机程序包括程序指令,计算机程序可存储于一存储介质中,该存储介质为计算机可读存储介质。该程序指令被该计算机***中的至少一个处理器执行,以实现上述方法的实施例的流程步骤。
因此,本申请还提供一种存储介质。该存储介质可以为计算机可读存储介质。所述存储介质可以是U盘、移动硬盘、只读存储器(Read-Only Memory,ROM)、磁碟或者光盘等各种可以存储程序代码的计算机可读存储介质。
本领域普通技术人员可以意识到,结合本文中所公开的实施例描述的各示例的 单元及算法步骤,能够以电子硬件、计算机软件或者二者的结合来实现,为了清楚地说明硬件和软件的可互换性,在上述说明中已经按照功能一般性地描述了各示例的组成及步骤。这些功能究竟以硬件还是软件方式来执行,取决于技术方案的特定应用和设计约束条件。专业技术人员可以对每个特定的应用来使用不同方法来实现所描述的功能,但是这种实现不应认为超出本申请的范围。
以上所述,仅为本申请的具体实施方式,但本申请的保护范围并不局限于此,任何熟悉本技术领域的技术人员在本申请揭露的技术范围内,可轻易想到各种等效的修改或替换,这些修改或替换都应涵盖在本申请的保护范围之内。因此,本申请的保护范围应以权利要求的保护范围为准。

Claims (16)

  1. 一种管理HMB内存的方法,其特征在于,包括:
    获取完整映射表中待写入的映射单元,以得到该映射单元的属性信息;
    根据属性信息,筛选与该映射单元具有相同偏移量的管理单元,以得到初始集合;
    判断初始集合是否存在空闲的管理单元;
    若存在空闲的管理单元,则挑选出空闲的管理单元,以得到目标管理单元;
    若不存在空闲的管理单元,则获取Age值最大的管理单元作为目标管理单元;
    将映射单元的属性信息写入目标管理单元,以形成管理信息;
    设置所述目标管理单元的Valid值为1,Age值为0,并设置初始集合中除了目标管理单元外的其他管理单元的Age值加1;
    根据管理信息将映射单元写入HMB中具有相同偏移量的分段内存空间。
  2. 根据权利要求1所述的管理HMB内存的方法,其特征在于,所述获取完整映射表中待写入的映射单元,以得到该映射单元的属性信息的步骤之前,还包括:
    向主机申请分配一个内存空间作为HMB,以用于存放映射单元;将HMB均分成N个分段,以得到分段大小;
    根据分段大小,将闪存中完整映射表均分为M个分部,分段和分部的大小相等;
    将分段切分成S个分段内存空间,将分部切分成S个映射单元,分段内存空间和映射单元的大小相等;
    定义将映射单元存放于相同偏移量的分段内存空间,映射单元的属性信息作为管理信息存放于具有相同偏移量的目标管理单元中;
    N、M和S,均代表大于0的自然数。
  3. 根据权利要求1所述的管理HMB内存的方法,其特征在于,所述根据管理信息将映射单元写入HMB中具有相同偏移量的分段内存空间的步骤之后,还包括:
    获取映射单元读取命令;
    解析映射单元读取命令,以得到待读取的映射单元的属性信息;
    根据属性信息查询管理单元,以得到具有相同属性信息的管理单元;
    根据管理单元的管理信息读取HMB上对应位置的映射单元数据。
  4. 根据权利要求1所述的管理HMB内存的方法,其特征在于,所述根据管理信息将映射单元写入HMB中具有相同偏移量的分段内存空间的步骤之后,包括:
    将属于同一个初始合集的管理单元存放于物理地址连续的SRAM段。
  5. 一种管理HMB内存的装置,其特征在于,包括:
    属性获取单元,用于获取完整映射表中待写入的映射单元,以得到该映射单元的属性信息;
    筛选集合单元,根据属性信息,筛选与该映射单元具有相同偏移量的管理单元,以得到初始集合;
    空闲判断单元,用于判断初始集合是否存在空闲的管理单元,若存在空闲的管理单元,则挑选出空闲的管理单元,以得到目标管理单元,若不存在空闲的管理单元,则获取Age值最大的管理单元作为目标管理单元;
    信息写入单元,用于将映射单元的属性信息写入目标管理单元,以形成管理信息;
    赋值单元,用于设置所述目标管理单元的Valid值为1,Age值为0,并设置初始集合中除了目标管理单元外的其他管理单元的Age值加1;
    映射写入单元,用于根据管理信息将映射单元写入HMB中具有相同偏移量的分段内存空间。
  6. 根据权利要求5所述的管理HMB内存的装置,其特征在于,还包括HMB设定单元,所述HMB设定单元包括内存申请子单元、分段子单元、分部子单元、切分子单元和定义子单元;
    所述内存申请子单元,用于向主机申请分配一个内存空间作为HMB,以用于存放映射单元;
    所述分段子单元,用于将HMB均分成N个分段,以得到分段大小;
    所述分部子单元,用于根据分段大小,将闪存中完整映射表均分为M个分部,分段和分部的大小相等;
    所述切分子单元,将分段切分成S个分段内存空间,将分部切分成S个映射单元,分段内存空间和映射单元的大小相等;
    所述定义子单元,用于定义将映射单元存放于相同偏移量的分段内存空间,映射单元的属性信息作为管理信息存放于具有相同偏移量的目标管理单元中;N、M和S,均代表大于0的自然数。
  7. 根据权利要求5所述的管理HMB内存的装置,其特征在于,还包括数据读取单元,所述数据读取单元包括命令获取子单元、属性解析子单元、属性查询子单元和数据读取子单元;
    所述命令获取子单元,用于获取映射单元读取命令;
    所述属性解析子单元,用于解析映射单元读取命令,以得到待读取的映射单元的属性信息;
    所述属性查询子单元,用于根据属性信息查询管理单元,以得到具有相同属性信息的管理单元;
    所述数据读取子单元,用于根据管理单元的管理信息读取HMB上对应位置的映射单元数据。
  8. 根据权利要求5所述的管理HMB内存的装置,其特征在于,还包括地址调整单元,用于将属于同一个初始合集的管理单元存放于物 理地址连续的SRAM段。
  9. 一种计算机设备,包括存储器、处理器及存储在存储器上并可在处理器上运行的计算机程序,其特征在于,所述处理器执行所述计算机程序时实现如下步骤:
    获取完整映射表中待写入的映射单元,以得到该映射单元的属性信息;
    根据属性信息,筛选与该映射单元具有相同偏移量的管理单元,以得到初始集合;
    判断初始集合是否存在空闲的管理单元;
    若存在空闲的管理单元,则挑选出空闲的管理单元,以得到目标管理单元;
    若不存在空闲的管理单元,则获取Age值最大的管理单元作为目标管理单元;
    将映射单元的属性信息写入目标管理单元,以形成管理信息;
    设置所述目标管理单元的Valid值为1,Age值为0,并设置初始集合中除了目标管理单元外的其他管理单元的Age值加1;
    根据管理信息将映射单元写入HMB中具有相同偏移量的分段内存空间。
  10. 根据权利要求9所述的计算机设备,其特征在于,所述处理器执行所述计算机程序时还实现如下步骤:
    向主机申请分配一个内存空间作为HMB,以用于存放映射单元;
    将HMB均分成N个分段,以得到分段大小;
    根据分段大小,将闪存中完整映射表均分为M个分部,分段和分部的大小相等;
    将分段切分成S个分段内存空间,将分部切分成S个映射单元,分段内存空间和映射单元的大小相等;
    定义将映射单元存放于相同偏移量的分段内存空间,映射单元的属性信息作为管理信息存放于具有相同偏移量的目标管理单元中 ;N、M和S,均代表大于0的自然数。
  11. 根据权利要求9所述的计算机设备,其特征在于,所述处理器执行所述计算机程序时还实现如下步骤:
    获取映射单元读取命令;
    解析映射单元读取命令,以得到待读取的映射单元的属性信息;
    根据属性信息查询管理单元,以得到具有相同属性信息的管理单元;
    根据管理单元的管理信息读取HMB上对应位置的映射单元数据。
  12. 根据权利要求9所述的计算机设备,其特征在于,所述处理器执行所述计算机程序时还实现如下步骤:
    将属于同一个初始合集的管理单元存放于物理地址连续的SRAM段。
  13. 一种计算机可读存储介质,其上存储有计算机程序,其特征在于,所述计算机程序被处理器执行时实现如下步骤:
    获取完整映射表中待写入的映射单元,以得到该映射单元的属性信息;
    根据属性信息,筛选与该映射单元具有相同偏移量的管理单元,以得到初始集合;
    判断初始集合是否存在空闲的管理单元;
    若存在空闲的管理单元,则挑选出空闲的管理单元,以得到目标管理单元;
    若不存在空闲的管理单元,则获取Age值最大的管理单元作为目标管理单元;
    将映射单元的属性信息写入目标管理单元,以形成管理信息;
    设置所述目标管理单元的Valid值为1,Age值为0,并设置初始集合中除了目标管理单元外的其他管理单元的Age值加1;
    根据管理信息将映射单元写入HMB中具有相同偏移量的分段内存空间。
  14. 根据权利要求13所述的计算机可读存储介质,其特征在于,所述计算机程序被处理器执行时还实现如下步骤:
    向主机申请分配一个内存空间作为HMB,以用于存放映射单元;
    将HMB均分成N个分段,以得到分段大小;
    根据分段大小,将闪存中完整映射表均分为M个分部,分段和分部的大小相等;
    将分段切分成S个分段内存空间,将分部切分成S个映射单元,分段内存空间和映射单元的大小相等;
    定义将映射单元存放于相同偏移量的分段内存空间,映射单元的属性信息作为管理信息存放于具有相同偏移量的目标管理单元中;N、M和S,均代表大于0的自然数。
  15. 根据权利要求13所述的计算机可读存储介质,其特征在于,所述计算机程序被处理器执行时还实现如下步骤:
    获取映射单元读取命令;
    解析映射单元读取命令,以得到待读取的映射单元的属性信息;
    根据属性信息查询管理单元,以得到具有相同属性信息的管理单元;
    根据管理单元的管理信息读取HMB上对应位置的映射单元数据。
  16. 根据权利要求13所述的计算机可读存储介质,其特征在于,所述计算机程序被处理器执行时还实现如下步骤:
    将属于同一个初始合集的管理单元存放于物理地址连续的SRAM段。
PCT/CN2020/076957 2019-09-30 2020-02-27 管理hmb内存的方法、装置、计算机设备及存储介质 WO2021062982A1 (zh)

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