WO2021039498A1 - Ringing suppression circuit - Google Patents

Ringing suppression circuit Download PDF

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Publication number
WO2021039498A1
WO2021039498A1 PCT/JP2020/031113 JP2020031113W WO2021039498A1 WO 2021039498 A1 WO2021039498 A1 WO 2021039498A1 JP 2020031113 W JP2020031113 W JP 2020031113W WO 2021039498 A1 WO2021039498 A1 WO 2021039498A1
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WIPO (PCT)
Prior art keywords
suppression
period
ringing
impedance
control unit
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PCT/JP2020/031113
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French (fr)
Japanese (ja)
Inventor
修一 中村
岸上　友久
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株式会社デンソー
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Publication of WO2021039498A1 publication Critical patent/WO2021039498A1/en

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    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
    • H03K17/16—Modifications for eliminating interference voltages or currents
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
    • H03K17/51—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used
    • H03K17/56—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices
    • H03K17/687—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices the devices being field-effect transistors
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00—Baseband systems
    • H04L25/02—Details ; arrangements for supplying electrical power along data transmission lines

Definitions

  • the present disclosure relates to a ringing suppression circuit that suppresses ringing that occurs due to transmission of a differential signal via a pair of communication lines.
  • the impedance between communication buses is set to a constant relatively low impedance (for example, equivalent to 120 ⁇ ) throughout the suppression period in which the suppression operation for suppressing ringing is executed.
  • the magnitude of ringing tends to be greatest immediately after the level of the differential signal changes.
  • the size of ringing changes according to various conditions such as the form of the bus network, the length of the wiring connecting the nodes, and the number of nodes.
  • the conventional ringing suppression circuit could not completely suppress the largest ringing depending on various conditions, and as a result, there was a possibility that the distortion of the waveform did not converge by the sampling timing. Further, with the recent trend of increasing the communication speed such as CAN communication, the time constraint required for ringing suppression has become stricter, and a technique for more effectively suppressing ringing is required.
  • An object of the present disclosure is to provide a ringing suppression circuit capable of suppressing ringing more effectively.
  • the ringing suppression circuit is provided in a node provided with a communication circuit that communicates with another node by transmitting a differential signal via a pair of communication lines, and suppresses the ringing. It is provided with a unit and an operation control unit. By connecting an impedance element between the pair of communication lines, the suppression unit can perform a suppression operation that suppresses ringing that occurs with the transmission of the differential signal.
  • the operation control unit controls the operation of the suppression unit, and when it detects that the signal level of the differential signal has changed recessively, the suppression operation by the suppression unit is started.
  • the operation control unit sets the impedance value of the impedance element to the first set value in the first period including the start time of the suppression operation in the suppression period in which the suppression operation is executed, and in the second period after the first period. Switch so that the second set value is higher than the first set value.
  • the magnitude of ringing generated by the transmission of the differential signal tends to be the largest immediately after the level of the differential signal changes to recessive, in other words, immediately after the suppression operation is started.
  • the impedance value of the impedance element is switched to a relatively low first set value in the first period including the start time of the suppression operation among the suppression periods in which the suppression operation is executed, so that it can be the largest. Sexual ringing is effectively suppressed.
  • the size of ringing gradually decreases. If the impedance value of the impedance element is made too low during the period in which ringing is reduced in this way, the effect of suppressing ringing due to secondary and tertiary reflected waves may be reduced.
  • the impedance value of the impedance element is switched to a relatively high second set value in the second period, ringing in such a second period is also effectively suppressed. As described above, according to the above configuration, an excellent effect that ringing can be suppressed more effectively can be obtained as compared with the conventional configuration.
  • FIG. 1 is a diagram schematically showing a configuration of a communication network according to the first embodiment.
  • FIG. 2 is a diagram schematically showing a configuration of a transceiver including a ringing suppression circuit according to the first embodiment.
  • FIG. 3 is a diagram showing a specific first configuration example of the suppression unit according to the first embodiment.
  • FIG. 4 is a diagram showing a specific second configuration example of the suppression unit according to the first embodiment.
  • FIG. 5 is a timing chart for explaining the suppression operation by the suppression unit according to the first embodiment, and is a diagram schematically showing waveforms of differential voltage and line impedance.
  • FIG. 1 is a diagram schematically showing a configuration of a communication network according to the first embodiment.
  • FIG. 2 is a diagram schematically showing a configuration of a transceiver including a ringing suppression circuit according to the first embodiment.
  • FIG. 3 is a diagram showing a specific first configuration example of the suppression unit according to the first embodiment.
  • FIG. 4 is a diagram
  • FIG. 6 is a diagram showing the result of simulating the operation according to the configuration of the first comparative example.
  • FIG. 7 is a diagram showing the results of simulating the operation of the ringing suppression circuit according to the second comparative example and the first embodiment.
  • FIG. 8 is a diagram schematically showing the configuration of the ringing suppression circuit according to the second embodiment.
  • FIG. 9 is a timing chart for explaining the suppression operation by the suppression unit according to the second embodiment, and is a diagram schematically showing the state of each switch and the waveform of the line impedance.
  • FIG. 10 is a diagram showing the results of simulating the operation of the ringing suppression circuit according to the second comparative example and the second embodiment.
  • FIG. 11 is a diagram schematically showing the configuration of the ringing suppression circuit according to the third embodiment.
  • FIG. 12 is a timing chart for explaining the suppression operation by the suppression unit according to the third embodiment, and is a diagram schematically showing the state of each MOS transistor, the waveform of the gate voltage, and the waveform of the line impedance.
  • FIG. 13 is a diagram schematically showing the configuration of the ringing suppression circuit according to the fourth embodiment.
  • FIG. 14 is a diagram schematically showing the relationship between the voltage and the on-resistance of each part according to the fourth embodiment.
  • FIG. 15 is a timing chart for explaining the suppression operation by the suppression unit according to the fourth embodiment, and is a diagram schematically showing the state of the switch, the state of the OP amplifier, and the waveform of the line impedance.
  • FIG. 12 is a timing chart for explaining the suppression operation by the suppression unit according to the third embodiment, and is a diagram schematically showing the state of each MOS transistor, the waveform of the gate voltage, and the waveform of the line impedance.
  • FIG. 13 is a diagram schematically showing the configuration of the
  • FIG. 16 is a diagram schematically showing a configuration of a transceiver including a ringing suppression circuit according to a fifth embodiment.
  • FIG. 17 is a diagram showing a result of simulating the operation of the ringing suppression circuit according to the fifth embodiment, and is a diagram showing waveforms of differential voltage at the time of transmission of the own node and the time of transmission of another node.
  • the communication network 1 shown in FIG. 1 is a network in which the nodes 2 are connected via a transmission line 3 composed of twisted pair lines for control communication between a plurality of nodes 2 mounted on the vehicle.
  • Each node 2 is an electronic control device that controls an actuator based on sensors for detecting the state of the vehicle and information from the sensors.
  • Each node 2 is provided with a communication circuit (not shown), which converts transmission data and reception data into communication signals according to a communication protocol on the transmission line 3, for example, the CAN protocol, and communicates with other nodes 2. That is, data is transmitted and received.
  • a branch connector 4 for branching the transmission line 3 is appropriately provided in the middle of the transmission line 3, that is, the communication bus.
  • the node 2 described as “T” in the rectangle indicates a node having a terminating resistor outside the node 2.
  • the node 2 represented by a simple rectangular symbol indicates a node having no terminating resistor. In this case, the resistance value of the terminating resistor is, for example, 120 ⁇ .
  • the transceiver 5 shown in FIG. 2 is configured as a semiconductor integrated circuit, that is, an IC, and is provided at the node 2 shown in FIG.
  • the transceiver 5 includes a communication circuit 6 for transmitting and receiving data and a ringing suppression circuit 7.
  • the communication circuit 6 generates a communication signal based on the transmission data TXD given from a control device (not shown) also provided in the node 2, and transmits the communication signal to the transmission line 3. Further, the communication circuit 6 receives the communication signal transmitted via the transmission line 3 and transmits it to the control device as received data RXD.
  • the ringing suppression circuit 7 includes a suppression unit 8 and an operation control unit 9.
  • the suppression unit 8 performs a suppression operation of suppressing ringing that occurs with the transmission of the differential signal by lowering the impedance of the transmission line 3 including the high potential side signal line 3P and the low potential side signal line 3N.
  • the high-potential side signal line 3P and the low-potential side signal line 3N correspond to a pair of communication lines, and may be abbreviated as simply the signal line 3P and the signal line 3N below.
  • the signal of the signal line 3P is referred to as CAN_H
  • the signal of the signal line 3N is referred to as CAN_L.
  • the suppression unit 8 includes a switch 10 and an impedance element 11.
  • the switch 10 and the impedance element 11 are connected in series between the signal lines 3P and 3N.
  • the switch 10 is controlled by the operation control unit 9, and is turned on when the suppression operation is executed and turned off when the suppression operation is not executed.
  • the switch 10 is turned on, the impedance element 11 is connected between the signal lines 3P and 3N, and the impedance between the signal lines 3P and 3N is lowered. In this way, the suppression unit 8 can perform a suppression operation for suppressing ringing by connecting the impedance element 11 between the signal lines 3P and 3N.
  • the impedance element 11 has a configuration in which the impedance value can be switched.
  • the switching of the impedance value is controlled by the operation control unit 9.
  • the impedance between the signal lines 3P and 3N that is, the line impedance
  • the impedance between the signal lines 3P and 3N is a very high value of, for example, about 100 k ⁇ when the switch 10 is off, that is, during the period when the suppression operation is not executed.
  • it is on that is, during the suppression period during which the suppression operation is executed, it is set to a low value in the range of, for example, about 30 ⁇ to about 120 ⁇ .
  • the impedance value of the impedance element 11 is set to, for example, about 30 ⁇ at the start of the suppression period, and then switched so as to continuously increase.
  • the impedance value of the impedance element 11 is, for example, about 120 ⁇ at the end of the suppression period.
  • the impedance value of the impedance element 11 becomes the first set value in the first period, which is the period including the start time of the suppression period, and the first set value in the second period, which is a period after the first period. It can be switched to a higher second setting value.
  • the operation control unit 9 controls the operation of the suppression unit 8, and includes a change detection unit 12 and a switching control unit 13.
  • the change detection unit 12 detects a change in the signal level of the differential signal based on the potential between the signal lines 3P and 3N, and outputs a detection signal Sa representing the detection result to the switching control unit 13.
  • the switching control unit 13 controls the on / off of the switch 10 of the suppression unit 8 and outputs a control signal Sb for controlling the switching of the impedance value of the impedance element 11 of the suppression unit 8 to the suppression unit 8.
  • the operation control unit 9 When the operation control unit 9 having the above configuration detects that the signal level of the differential signal has changed to a level representing the recessive signal, the operation control unit 9 turns on the switch 10 of the suppression unit 8. That is, when the operation control unit 9 detects that the signal level of the differential signal has changed to a level representing the recessive, the impedance element 11 is connected between the signal lines 3P and 3N to start the suppression operation by the suppression unit 8. .. Further, the motion control unit 9 switches the impedance value of the impedance element 11 as described above during the suppression period in which the suppression operation is executed.
  • the suppression unit 8 of the first configuration example includes an N-channel type MOS transistor Q1 and a resistance element R1.
  • the drain of the MOS transistor Q1 is connected to the signal line 3P via the resistance element R1, and its source is connected to the signal line 3N.
  • the MOS transistor Q1 is connected between the signal lines 3P and 3N via the resistance element R1.
  • the connection positions of the MOS transistor Q1 and the resistance element R1 can be exchanged.
  • a control signal Sb output from the switching control unit 13 is given to the gate of the MOS transistor Q1. Therefore, the drive of the MOS transistor Q1 is controlled by the switching control unit 13 of the operation control unit 9 that outputs the control signal Sb.
  • the suppression unit 8 performs a suppression operation by driving the MOS transistor Q1 on.
  • the switching operation by the MOS transistor Q1 functions as the switch 10. Further, in the first configuration example, the on-resistance of the MOS transistor Q1 and the resistance element R1 function as the impedance element 11. That is, in this case, the impedance element 11 includes the on-resistance of the MOS transistor Q1.
  • the on-resistance of the MOS transistor Q1 changes according to its gate voltage. In the above configuration, the gate voltage of the MOS transistor Q1 can be controlled by changing the voltage level of the control signal Sb.
  • the switching control unit 13 of the operation control unit 9 switches the impedance value of the impedance element 11 by controlling the gate voltage of the MOS transistor Q1 by the control signal Sb.
  • the MOS transistor Q1 and the resistance element R1 those having an on-resistance and a resistance value capable of switching the impedance value of the impedance element 11 within the range as described above are used.
  • the suppression unit 8 of the second configuration example differs from the suppression unit 8 of the first configuration example shown in FIG. 3 in that the resistance element R1 is omitted.
  • the drain of the MOS transistor Q1 is connected to the signal line 3P, and its source is connected to the signal line 3N. That is, the MOS transistor Q1 is connected between the signal lines 3P and 3N.
  • the suppression unit 8 is configured to perform the suppression operation by driving the MOS transistor Q1 on.
  • the on-resistance of the MOS transistor Q1 functions as the impedance element 11. That is, also in this case, the impedance element 11 includes the on-resistance of the MOS transistor Q1.
  • the MOS transistor Q1 a transistor having an on-resistance capable of switching the impedance value of the impedance element 11 within the range as described above is used.
  • the impedance element 11 is configured by the on-resistance of the MOS transistor Q1 and the resistance element R1.
  • a resistance element has a higher accuracy of resistance value than the on-resistance of a MOS transistor, and can have good various characteristics such as temperature characteristics.
  • the impedance value of the impedance element 11 can be easily adjusted as compared with the second configuration example in which the impedance element 11 is configured only by the on-resistance of the MOS transistor Q1. ..
  • the suppression unit 8 can be configured only by the MOS transistor Q1. It can be simplified. Therefore, according to the second configuration example, there is an advantage that the circuit area of the ringing suppression circuit 7 can be suppressed to be smaller than that of the first configuration example.
  • the transmission line 3 transmits high-level and low-level binary signals as differential signals.
  • the signal lines 3P and 3N are all set to 2.5V, which is an intermediate potential in the non-drive state, the differential voltage is 0V, and the differential signal has a low level representing recessive.
  • the transmission circuit (not shown) of the communication circuit 6 drives the transmission line 3
  • the signal line 3P is driven to, for example, 3.5 V or more
  • the signal line 3N is driven to, for example, 1.5 V or less
  • the differential voltage is 2 V or more.
  • the differential signal becomes a high level representing the dominant.
  • both ends of the signal lines 3P and 3N are terminated by a terminating resistor of 120 ⁇ .
  • the transmission line 3 when the signal level of the differential signal changes from a high level to a low level, the transmission line 3 is in a non-drive state and the impedance of the transmission line 3 becomes high. Ringing occurs in the differential signal waveform.
  • the period in which the differential signal represents the dominant is referred to as Ta
  • the period in which the differential signal represents the recessive is referred to as Tb.
  • the ideal waveform of the differential signal is shown by a alternate long and short dash line.
  • an suppression operation for suppressing such ringing is performed as follows. That is, the change detection unit 12 detects that the signal level of the differential signal has changed to a level representing the recessive at the time t1 when the signal level of the differential signal changes from the high level to the low level. Then, the switching control unit 13 turns on the switch 10, and the suppression operation by the suppression unit 8 is started by this. Then, at the time t1 when the suppression operation is started, the line impedance changes from 100 k ⁇ to 30 ⁇ .
  • the switching control unit 13 keeps the switch 10 on, that is, the suppression operation until the time point t2.
  • the period Tc from the time points t1 to t2 corresponds to the suppression period in which the suppression operation is performed.
  • the switching control unit 13 gradually lowers the voltage level of the control signal Sb, that is, the gate voltage of the MOS transistor Q1 from the time point t1 at the start time of the suppression period to the time point t2 at the end time. There is. As a result, the line impedance gradually increases from the time point t1 to the time point t2, and becomes 120 ⁇ at the time point t2.
  • the switching control unit 13 turns off the switch 10 at the time point t2, whereby the suppression operation by the suppression unit 8 is stopped. Then, at the time t2 when the suppression operation is stopped, the line impedance changes from 120 ⁇ to 100k ⁇ .
  • the magnitude of ringing that occurs with the transmission of the differential signal tends to be greatest immediately after the level of the differential signal changes recessively, in other words, immediately after the suppression operation by the suppression unit 8 is started.
  • the impedance value of the impedance element 11 is about 30 ⁇ , which is the lowest at the start time t1 of the suppression period Tc in which the suppression operation is executed, and is then switched to gradually increase. Therefore, according to the present embodiment, ringing immediately after the recessive transition, which may be the largest, can be effectively suppressed by lowering the line impedance.
  • the magnitude of ringing gradually decreases after the level of the differential signal changes recessively. If the line impedance is made too low during the period in which ringing is reduced in this way, the effect of suppressing ringing due to secondary and tertiary reflected waves may be reduced.
  • the impedance value of the impedance element 11 is switched so as to gradually increase with the passage of time during the suppression period Tc. Therefore, according to the above configuration, even such gradually decreasing ringing can be effectively suppressed by not making the line impedance too low.
  • an excellent effect that ringing can be suppressed more effectively can be obtained as compared with the conventional configuration.
  • the above-mentioned effect obtained by the present embodiment is the first comparative example in which the ringing suppression circuit is not provided, and the suppression operation in which the line impedance is set to a constant low impedance (for example, about 120 ⁇ ) throughout the suppression period.
  • a constant low impedance for example, about 120 ⁇
  • the largest ringing that occurs immediately after the level of the differential signal changes to a level representing the recessive is not sufficiently suppressed as compared with the present embodiment described later, and as a result, the ringing converges.
  • the time until is longer than that of the present embodiment described later. Therefore, according to the second comparative example, there is a possibility that the distortion of the waveform does not converge by the sampling timing.
  • the largest ringing that occurs immediately after the level of the differential signal changes to the level representing the recessive is effectively suppressed so as to be smaller than that in the second comparative example. ing.
  • the line impedance is switched so as to gradually increase with the passage of time during the suppression period Tc, and becomes 120 ⁇ corresponding to the characteristic impedance of the transmission line 3 at the end of the suppression period Tc. Therefore, in the present embodiment, ringing due to secondary and tertiary reflected waves generated in the latter half of the suppression period Tc is effectively suppressed by impedance matching.
  • the time until the ringing converges is shorter than that in the second comparative example, and the possibility that the waveform distortion does not converge by the sampling timing is suppressed. be able to.
  • the impedance value of the impedance element 11 can be continuously switched during the suppression period Tc. Therefore, the differential voltage does not change sharply with the switching of the impedance value, in other words, there is no step in the waveform of the differential voltage. Therefore, according to the present embodiment, another problem such as an increase in radiation noise due to switching the impedance value does not occur.
  • the second embodiment will be described with reference to FIGS. 8 to 10.
  • the ringing suppression circuit 21 of the present embodiment is provided with the suppression unit 22 instead of the suppression unit 8 with respect to the ringing suppression circuit 7 of the first embodiment, instead of the operation control unit 9.
  • the difference is that the operation control unit 23 is provided.
  • the suppression unit 22 includes switches 24 and 25 and resistance elements 26 and 27.
  • the switch 24 and the resistance element 26 are connected in series, and the series circuit thereof is connected between the communication lines 3P and 3N.
  • the switch 25 and the resistance element 27 are connected in series, and the series circuit thereof is connected between the communication lines 3P and 3N.
  • the suppression unit 22 has a configuration including two series circuits of a resistance element and a switch connected between the communication lines 3P and 3N.
  • the suppression unit 22 may be configured to include three or more series circuits of resistance elements and switches connected between the communication lines 3P and 3N.
  • the operation control unit 23 is different from the operation control unit 9 in that it includes a switching control unit 28 instead of the switching control unit 13.
  • the switches 24 and 25 of the suppression unit 22 are controlled by the switching control unit 28 of the operation control unit 23, and at least one of them is turned on when the suppression operation is executed, and both are turned on when the suppression operation is not executed. It is turned off.
  • at least one of the switches 24 and 25 is turned on, at least one of the resistance elements 26 and 27 is connected between the signal lines 3P and 3N, and the line impedance is lowered.
  • the resistance elements 26 and 27 function as the impedance elements 29. That is, in this case, the impedance element 29 includes the resistance elements 26 and 27.
  • the resistance value of the resistance element 26 is about 120 ⁇ .
  • the resistance value of the resistance element 27 is a value (for example, about 4 ⁇ ) such that the parallel combined resistance value of the resistance elements 26 and 27 is about 30 ⁇ .
  • the switching control unit 28 of the operation control unit 23 outputs a control signal Sc for individually turning on / off the switches 24 and 25 of the suppression unit 22 to the suppression unit 22.
  • the operation control unit 23 detects that the signal level of the differential signal has changed to a level indicating impedance, it turns on both of the two switches 24 and 25 of the suppression unit 22 and between the signal lines 3P and 3N.
  • the suppression operation by the suppression unit 22 is started.
  • the operation control unit 23 switches the impedance value of the impedance element 29 as follows during the suppression period for executing the suppression operation. That is, the operation control unit 23 changes the impedance value of the impedance element 29 stepwise by turning off the turned-on switches 24 and 25 stepwise during the suppression period. Specifically, the motion control unit 23 keeps both the switches 24 and 25 turned on in the first period, which is the first half period including the start time of the suppression period.
  • the impedance value of the impedance element 29 becomes about 30 ⁇ , which corresponds to the first set value.
  • the operation control unit 23 turns off the switch 25 in the period after the first period, that is, in the latter half of the suppression period.
  • the impedance value of the impedance element 29 becomes about 120 ⁇ , which corresponds to the second set value higher than the first set value. In this way, the operation control unit 23 switches the impedance value of the impedance element 29 step by step.
  • the suppression operation is performed as follows. That is, as shown in FIG. 9, at the time t11 when the change detection unit 12 detects that the signal level of the differential signal has changed to a level representing the recessive, the switching control unit 28 turns on the switches 24 and 25. As a result, the suppression operation by the suppression unit 22 is started. Then, at the time t11 when the suppression operation is started, the line impedance changes from 100 k ⁇ to 30 ⁇ .
  • the switching control unit 28 continues the state in which the switch 24 is turned on until the time point t13.
  • the period Tc from the time points t11 to t13 corresponds to the suppression period in which the suppression operation is performed.
  • the switching control unit 28 maintains the switches 24 and 25 turned on during the first half period including the time point t11, which is the start time of the suppression period, that is, the first period T1 which is the period from the time points t11 to t12.
  • the line impedance is kept constant at 30 ⁇ .
  • the switching control unit 28 turns off the switch 25 at the time point t12. As a result, at time point t12, the line impedance changes from 30 ⁇ to 120 ⁇ .
  • the switching control unit 28 keeps the switch 24 on and the switch 25 off during the latter half of the suppression period Tc, that is, the second period T2 which is the period from the time points t12 to t13. As a result, in the second period T2, which is the latter half of the suppression period Tc, the line impedance is kept constant at 120 ⁇ .
  • the switching control unit 28 turns off the switch 25, whereby the suppression operation by the suppression unit 22 is stopped. Then, at the time t13 when the suppression operation is stopped, the line impedance changes from 120 ⁇ to 100k ⁇ .
  • the impedance value of the impedance element 29 is about 30 ⁇ in the first period T1 including the start time t11 of the suppression period Tc, and is the second after the first period T1. In T2 for 2 periods, it is switched so as to be about 120 ⁇ . Therefore, the present embodiment also has the same effect as that of the first embodiment, that is, an excellent effect that ringing can be suppressed more effectively as compared with the conventional configuration.
  • the second comparative example and the present embodiment will be referred to with reference to FIG. 10 showing the waveform of the differential voltage corresponding to the simulation result of the circuit operation in each of the second comparative example and the present embodiment described in the first embodiment.
  • the effect obtained by this embodiment will be described while comparing with.
  • the waveform of the differential voltage corresponding to the second comparative example is shown by a thin solid line
  • the waveform of the differential voltage corresponding to the present embodiment is shown by a thick solid line.
  • the largest ringing that occurs immediately after the level of the differential signal changes to the level representing the recessive is effectively reduced as compared with the second comparative example. It is suppressed.
  • the line impedance is set to 120 ⁇ , which corresponds to the characteristic impedance of the transmission line 3 in the second period T2, which is the latter half of the suppression period Tc. Therefore, in the present embodiment, ringing due to secondary and tertiary reflected waves generated in the latter half of the suppression period Tc is effectively suppressed by impedance matching.
  • the time until the ringing converges is shorter than that in the second comparative example, and the possibility that the waveform distortion does not converge by the sampling timing is suppressed. be able to.
  • the impedance value of the impedance element 29 can be switched stepwise during the suppression period Tc. Therefore, the differential voltage may change sharply with the switching of the impedance value, in other words, a step may be formed in the waveform of the differential voltage.
  • the present embodiment there is a possibility that a problem that does not occur in the first embodiment, that is, a problem that radiation noise increases as the impedance value is switched may occur.
  • the ringing suppression circuit 31 of the present embodiment is different from the ringing suppression circuit 7 of the first embodiment in that it includes an operation control unit 32 instead of the operation control unit 9.
  • the first configuration example shown in FIG. 3 is adopted as the suppression unit 8.
  • the operation control unit 32 is different from the operation control unit 9 in that the switching control unit 33 is provided in place of the switching control unit 13.
  • the switching control unit 33 includes a buffer 34, a resistor R31, a capacitor C31, a P-channel type MOS transistor Q31, and an N-channel type MOS transistor Q32.
  • a constant voltage Vref is input to the input terminal of the buffer 34.
  • the voltage Vref is a voltage higher than the gate threshold voltage of the MOS transistor Q1.
  • the output terminal of the buffer 34 is connected to the gate of the MOS transistor Q1 via the resistor R31 and is connected to the ground to which the reference potential of the circuit is given via the capacitor C31.
  • the source of the MOS transistor Q31 is connected to the power supply line L31 to which the power supply voltage VDD is supplied, and the drain thereof is connected to the gate of the MOS transistor Q1.
  • the power supply voltage VDD is higher than the voltage Vref.
  • the source of the MOS transistor Q32 is connected to the ground, and its drain is connected to the gate of the MOS transistor Q1.
  • Drive signals SWP and SWN are given to the gates of the MOS transistors Q31 and Q32, respectively.
  • the MOS transistor Q31 is turned off when the drive signal SWP is high level and turned on when the drive signal SWP is low level.
  • the MOS transistor Q32 is turned on when the drive signal SWN is at a high level and turned off when the drive signal SWN is at a low level.
  • the generation of drive signals SWP and SWN, and the control of driving the MOS transistors Q31 and Q32, etc., are performed by a control circuit (not shown) provided in the switching control unit 33.
  • the MOS transistor Q1 and the resistance element R1 those having an on-resistance and a resistance value that can satisfy the following conditions are used.
  • the first condition is that the impedance value of the impedance element 11 during the period when the voltage Vref is applied to the gate of the MOS transistor Q1 is about 120 ⁇ .
  • the second condition is that the impedance value of the impedance element 11 during the period when the power supply voltage VDD is applied to the gate of the MOS transistor Q1 is about 30 ⁇ .
  • the suppression operation is performed as follows. That is, as shown in FIG. 12, in the period before the time point t31 or the period after the time point t33, the MOS transistor Q31 is turned off and the MOS transistor Q32 is turned on, so that the MOS transistor Q1 is turned off and the suppression operation is performed. I can't.
  • the MOS transistor Q31 is turned on and the MOS transistor Q32 is turned off, which is caused by the suppression unit 8.
  • the suppression operation is started. This suppression operation is continued until the time point t33. Therefore, in this case, the period from the time points t31 to t33 corresponds to the suppression period Tc.
  • the gate voltage of the MOS transistor Q31 becomes the power supply voltage VDD, so that the line impedance changes from 100 k ⁇ to 30 ⁇ .
  • the state in which the MOS transistor Q31 is turned on continues until the time point t32. Therefore, during the period from time point t31 to t32, the gate voltage of the MOS transistor Q1 is maintained at the power supply voltage VDD, and the line impedance becomes constant at 30 ⁇ . At time point t32, the MOS transistor Q31 turns off. As a result, the gate voltage of the MOS transistor Q1 drops from the power supply voltage VDD toward the voltage Vref. The slope of the decrease in the gate voltage at this time is the slope according to the time constant due to the resistor R31 and the capacitor C31. As the gate voltage of the MOS transistor Q1 decreases with a predetermined slope in this way, the line impedance rises from 30 ⁇ with the same slope, and eventually becomes constant at 120 ⁇ .
  • the energy of the waveform distortion generated during the falling period when the signal level of the differential signal changes from the high level to the low level is consumed by the impedance element 11, and ringing is suppressed.
  • the MOS transistor Q32 is turned on, so that the suppression operation by the suppression unit 8 is stopped.
  • the line impedance changes from 120 ⁇ to 100k ⁇ .
  • the impedance value of the impedance element 11 is the start time of the suppression period Tc in which the suppression operation is executed, as in the ringing suppression circuit 7 of the first embodiment. It is continuously switched so that it becomes the lowest about 30 ⁇ at the time point t31 and about 120 ⁇ at the time point t33 at the end point, that is, the impedance value gradually increases. Therefore, the same effect as that of the first embodiment can be obtained by this embodiment as well.
  • the fourth embodiment will be described with reference to FIGS. 13 to 15.
  • the ringing suppression circuit 41 of the present embodiment includes a suppression unit 42 instead of the suppression unit 8 with respect to the ringing suppression circuit 7 of the first embodiment, instead of the operation control unit 9.
  • the difference is that the operation control unit 43 is provided.
  • the suppression unit 42 includes a switch 44, a resistance element 45, an N-channel type MOS transistor Q41, and an OP amplifier 46.
  • the switch 44 and the resistance element 45 are connected in series, and the series circuit thereof is connected between the communication lines 3P and 3N.
  • the switch 44 is controlled by the operation control unit 43, and is turned on when the suppression operation is executed and turned off when the suppression operation is not executed.
  • the drain of the MOS transistor Q41 is connected to the communication line 3P, and its source is connected to the communication line 3N.
  • the output voltage Vout of the OP amplifier 46 is given to the gate of the MOS transistor Q41.
  • the OP amplifier 46 is provided with an enable terminal, and has a configuration capable of switching between an operating state and a non-operating state according to the signal ENB input to the enable terminal.
  • the OP amplifier 46 goes into an operating state when the signal ENB is at a high level, and goes into a non-operating state when the signal ENB is at a low level.
  • the non-inverting input terminal of the OP amplifier 46 is connected to the communication line 3P, and the inverting input terminal is connected to the communication line 3N. That is, the differential voltage Vdiff between the communication lines 3P and 3N is input to the OP amplifier 44.
  • the relationship between the output voltage Vout of the OP amplifier 46 and the differential voltage Vdiff, and the relationship between the on-resistance RON of the MOS transistor Q41 and the differential voltage Vdiff are as shown in FIG. That is, the output voltage Vout of the OP amplifier 46 and the differential voltage Vdiff are in a proportional relationship. Further, the on-resistance RON and the differential voltage Vdiff have an inversely proportional relationship.
  • the gate threshold voltage of the MOS transistor Q41 is shown as a voltage Vt.
  • the operation control unit 43 is different from the operation control unit 9 in that it includes a switching control unit 47 instead of the switching control unit 13.
  • the switching control unit 47 controls the on / off of the switch 44 as described above. Further, the switching control unit 47 has a function of generating a signal ENB. Therefore, the operating state of the OP amplifier 46 is controlled by the switching control unit 47.
  • the switch 44 when the switch 44 is turned on, the resistance element 45 is connected between the signal lines 3P and 3N, and the line impedance is lowered.
  • the MOS transistor Q41 is driven on according to the differential voltage Vdiff, and the line impedance is lowered.
  • the on-resistance of the resistance element 45 and the MOS transistor Q41 functions as the impedance element 48.
  • the resistance value of the resistance element 45 is about 120 ⁇ .
  • the MOS transistor Q41 has a characteristic that the parallel combined resistance value of the resistance element 45 and the on-resistance of the MOS transistor Q41 is about 30 ⁇ in the so-called full-on state. In other words, the MOS transistor Q41 is used in which the minimum value of its on-resistance is, for example, about 4 ⁇ .
  • the suppression operation is performed as follows. That is, as shown in FIG. 15, at the time t41 when the change detection unit 12 detects that the signal level of the differential signal has changed to a level representing the recessive, the switching control unit 47 turns on the switch 44 and OPs. The amplifier 46 is switched to the operating state, and the suppression operation by the suppression unit 42 is started by this. Then, at the time t41 when the suppression operation is started, the line impedance changes from 100 k ⁇ to 30 ⁇ .
  • the switching control unit 47 continues the state in which the switch 44 is turned on until the time point t43.
  • the period Tc from the time point t41 to t43 corresponds to the suppression period in which the suppression operation is performed.
  • the switching control unit 47 maintains the OP amplifier 46 in the operating state in the first half period including the time point t41, which is the start time of the suppression period Tc, that is, in the first period T1 which is the period from the time points t41 to t42.
  • the line impedance changes between 30 ⁇ and 120 ⁇ .
  • the line impedance in the first period T1 changes from 30 ⁇ to 120 ⁇ with a predetermined inclination. This is because the change in the on-resistance RON of the MOS transistor Q41 does not follow the change in the differential voltage Vdiff according to the ringing due to the responsiveness of the OP amplifier 46 and the like.
  • the switching control unit 47 switches the OP amplifier 46 to the non-operating state at the time point t42. As a result, at the time point t42, the line impedance becomes 120 ⁇ .
  • the switching control unit 47 switches the OP amplifier 46 to the non-operating state and maintains the switch 44 on during the latter half of the suppression period Tc, that is, the second period T2 which is the period from the time points t42 to t43. As a result, in the second period T2, which is the latter half of the suppression period Tc, the line impedance is kept constant at 120 ⁇ .
  • the switching control unit 47 turns off the switch 44 at the time point t43, whereby the suppression operation by the suppression unit 42 is stopped. Then, at the time t43 when the suppression operation is stopped, the line impedance changes from 120 ⁇ to 100k ⁇ .
  • the impedance value of the impedance element 48 is set to t41 at the start of the suppression period Tc in which the suppression operation is executed, as in the ringing suppression circuit 7 of the first embodiment. Is continuously switched so as to be about 30 ⁇ , which is the lowest, and about 120 ⁇ at the end point t43, that is, so that the impedance value gradually increases. Therefore, the same effect as that of the first embodiment can be obtained by this embodiment as well.
  • the ringing suppression circuit 41 of the present embodiment has a configuration in which the on-resistance of the MOS transistor Q41 short-circuiting between the communication lines 3P and 3N decreases as the differential voltage Vdiff increases, that is, the line impedance decreases. .. Therefore, according to the ringing suppression circuit 41 of the present embodiment, when the ringing becomes severe, for example, immediately after the level of the differential signal changes to recessive, the line impedance can be effectively suppressed by lowering the line impedance. it can.
  • the ringing suppression circuit 52 included in the transceiver 51 of the present embodiment includes an operation control unit 53 instead of the operation control unit 9 with respect to the ringing suppression circuit 7 of the first embodiment. Is different.
  • the operation control unit 53 is different from the operation control unit 9 in that a determination unit 54 is added and a switching control unit 55 is provided in place of the switching control unit 13.
  • the determination unit 54 determines whether or not the own node 2 is executing the transmission operation. Specifically, the determination unit 54 determines whether or not the communication circuit 6 is executing the transmission operation based on the signal Sd given from the communication circuit 6 of the node 2 in which the transceiver 51 is provided.
  • the signal Sd can be generated by monitoring the transmission data TXD or the like.
  • the determination unit 54 gives a signal Se representing the result of such determination to the switching control unit 55.
  • the switching control unit 55 can switch the impedance value of the impedance element 11 in the same manner as the switching control unit 13. Further, the switching control unit 55 can fix the impedance value of the impedance element 11 to a constant value (for example, about 120 ⁇ ). When the determination unit 54 determines that the own node 2 is executing the transmission operation, the switching control unit 55 switches the impedance value of the impedance element 11 in the same manner as the switching control unit 13.
  • the switching control unit 55 sets the impedance value of the impedance element 11 to the first period including the start time of the suppression period. Then, it is switched so that it becomes the first set value (for example, about 30 ⁇ ) and becomes the second set value (for example, about 120 ⁇ ) in the second period after the first period. Further, when the determination unit 54 determines that the own node 2 is not executing the transmission operation, the switching control unit 55 fixes the impedance value of the impedance element 11 to the above-mentioned second set value throughout the suppression period.
  • the following effects can be obtained.
  • ringing is compared with the case where the own node 2 is not performing the transmission operation, that is, when the other node 2 is executing the transmission operation. Tends to increase. Therefore, in the present embodiment, when the own node 2 is executing the transmission operation, the same suppression operation as in the first embodiment is executed to effectively suppress the ringing that becomes relatively large.
  • the suppression operation similar to that in the second comparative example in which the line impedance is 120 ⁇ throughout the suppression period is executed to be relatively small. Effectively suppresses ringing.
  • the suppression operation is appropriately switched according to the magnitude of the ringing that occurs, the ringing can be suppressed more effectively.
  • the suppression unit is not limited to the one illustrated in each of the above embodiments, and by connecting an impedance element between a pair of communication lines, a suppression operation that suppresses ringing that occurs due to transmission of a differential signal can be performed. Any configuration can be used, and the specific configuration can be changed as appropriate.

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Abstract

A ringing suppression circuit is provided to a node (2) equipped with a communication circuit (6) that communicates with another node by transmitting a differential signal through a pair of communication lines (3P, 3N). The ringing suppression circuit comprises: a suppression unit (8, 22, 42) in which an impedance element (11, 29, 48) is connected between the pair of communication lines, allowing the suppression unit (8, 22, 42) to perform a suppression operation of suppressing ringing produced when the differential signal is transmitted; and an operation control unit (9, 23, 32, 43, 53) for controlling the operation of the suppression unit, the operation control unit starting the suppression operation performed by the suppression unit once it has been detected that the signal level of the differential signal has changed to recessive. The operation control unit switches the impedance value of the impedance element to a first set value during a first period, which includes the start time of the suppression operation from among a suppression period in which the suppression operation is carried out, and to a second set value higher than the first set value during a second period, which follows the first period.

Description

リンギング抑制回路Ringing suppression circuit 関連出願の相互参照Cross-reference of related applications
　本出願は、２０１９年８月２６日に出願された日本出願番号２０１９－１５３７２２号に基づくもので、ここにその記載内容を援用する。 This application is based on Japanese Application No. 2019-153722, which was filed on August 26, 2019, and the contents of the description are incorporated herein by reference.
　本開示は、一対の通信線を介した差動信号の伝送に伴い発生するリンギングを抑制するリンギング抑制回路に関する。 The present disclosure relates to a ringing suppression circuit that suppresses ringing that occurs due to transmission of a differential signal via a pair of communication lines.
　一対の通信線からなる伝送線路を介してデジタル信号を伝送する場合、受信側においては、信号レベルが変化するタイミングで信号エネルギーの一部が反射することで、オーバーシュートやアンダーシュートのような波形の歪み、すなわちリンギングが生じる問題がある。従来、このような波形歪みを抑制するため、様々な技術が提案されている。例えば、特許文献１には、通信バス間にスイッチング素子を設け、差動信号のレベルが変化したことを検出すると上記スイッチング素子を一定期間オンさせるといった簡単な構成のリンギング抑制回路でリンギングを抑制して通信の信頼性を高める技術が開示されている。 When a digital signal is transmitted via a transmission line consisting of a pair of communication lines, a part of the signal energy is reflected at the timing when the signal level changes on the receiving side, resulting in waveforms such as overshoot and undershoot. There is a problem that distortion, that is, ringing occurs. Conventionally, various techniques have been proposed in order to suppress such waveform distortion. For example, in Patent Document 1, ringing is suppressed by a ringing suppression circuit having a simple configuration in which a switching element is provided between communication buses and the switching element is turned on for a certain period of time when a change in the level of a differential signal is detected. The technology for improving the reliability of communication is disclosed.
特許第５４９８５２７号公報Japanese Patent No. 5498527
　上記した従来のリンギング抑制回路では、リンギングを抑制する抑制動作が実行される抑制期間を通じて通信バス間を一定の比較的低いインピーダンス（例えば１２０Ω相当）とするようになっている。リンギングの大きさは、差動信号のレベルが変化した直後が最も大きくなる傾向がある。また、リンギングの大きさは、バスネットワークの形態、ノード同士などを接続する配線の長さ、ノードの数などの各種条件に応じて変化する。 In the conventional ringing suppression circuit described above, the impedance between communication buses is set to a constant relatively low impedance (for example, equivalent to 120Ω) throughout the suppression period in which the suppression operation for suppressing ringing is executed. The magnitude of ringing tends to be greatest immediately after the level of the differential signal changes. Further, the size of ringing changes according to various conditions such as the form of the bus network, the length of the wiring connecting the nodes, and the number of nodes.
　従来のリンギング抑制回路では、各種条件によっては、最も大きくなるリンギングを抑制しきれず、その結果、波形の歪みがサンプリングタイミングまでに収束しないケースが発生するおそれがあった。さらに、近年のＣＡＮ通信などの通信速度の高速化トレンドに伴い、リンギング抑制に求められる時間的制約は厳しくなっており、より効果的にリンギングを抑制する技術が求められている。 The conventional ringing suppression circuit could not completely suppress the largest ringing depending on various conditions, and as a result, there was a possibility that the distortion of the waveform did not converge by the sampling timing. Further, with the recent trend of increasing the communication speed such as CAN communication, the time constraint required for ringing suppression has become stricter, and a technique for more effectively suppressing ringing is required.
　本開示の目的は、リンギングを一層効果的に抑制することができるリンギング抑制回路を提供することにある。 An object of the present disclosure is to provide a ringing suppression circuit capable of suppressing ringing more effectively.
　本開示の一態様において、リンギング抑制回路は、一対の通信線を介して差動信号を伝送することで他のノードとの通信を行う通信回路を備えたノードに設けられたものであり、抑制部および動作制御部を備える。抑制部は、一対の通信線間にインピーダンス素子を接続することにより差動信号の伝送に伴い発生するリンギングを抑制する抑制動作を行うことができる。動作制御部は、抑制部の動作を制御するもので、差動信号の信号レベルがレセッシブに変化したことを検出すると抑制部による抑制動作を開始する。動作制御部は、インピーダンス素子のインピーダンス値を、抑制動作が実行される抑制期間のうち抑制動作の開始時点を含む第１期間では第１設定値になるとともに第１期間より後の第２期間では第１設定値より高い第２設定値になるように切り替える。 In one aspect of the present disclosure, the ringing suppression circuit is provided in a node provided with a communication circuit that communicates with another node by transmitting a differential signal via a pair of communication lines, and suppresses the ringing. It is provided with a unit and an operation control unit. By connecting an impedance element between the pair of communication lines, the suppression unit can perform a suppression operation that suppresses ringing that occurs with the transmission of the differential signal. The operation control unit controls the operation of the suppression unit, and when it detects that the signal level of the differential signal has changed recessively, the suppression operation by the suppression unit is started. The operation control unit sets the impedance value of the impedance element to the first set value in the first period including the start time of the suppression operation in the suppression period in which the suppression operation is executed, and in the second period after the first period. Switch so that the second set value is higher than the first set value.
　前述したように、差動信号の伝送に伴い発生するリンギングの大きさは、差動信号のレベルがレセッシブに変化した直後、言い換えると、抑制動作が開始された直後が最も大きくなる傾向がある。上記構成では、抑制動作が実行される抑制期間のうち抑制動作の開始時点を含む第１期間ではインピーダンス素子のインピーダンス値が比較的低い第１設定値になるように切り替えられるため、最も大きくなる可能性があるリンギングが効果的に抑制される。 As described above, the magnitude of ringing generated by the transmission of the differential signal tends to be the largest immediately after the level of the differential signal changes to recessive, in other words, immediately after the suppression operation is started. In the above configuration, the impedance value of the impedance element is switched to a relatively low first set value in the first period including the start time of the suppression operation among the suppression periods in which the suppression operation is executed, so that it can be the largest. Sexual ringing is effectively suppressed.
　そして、このような第１期間の後の第２期間では、リンギングの大きさは次第に小さくなる。このようにリンギングが小さくなる期間において、インピーダンス素子のインピーダンス値を低くし過ぎると、二次、三次の反射波などによるリンギングを抑制する効果が逆に低下する可能性がある。上記構成では、第２期間ではインピーダンス素子のインピーダンス値が比較的高い第２設定値になるように切り替えられるため、このような第２期間におけるリンギングについても効果的に抑制される。このように、上記構成によれば、従来の構成に比べ、リンギングを一層効果的に抑制することができるという優れた効果が得られる。 And, in the second period after such a first period, the size of ringing gradually decreases. If the impedance value of the impedance element is made too low during the period in which ringing is reduced in this way, the effect of suppressing ringing due to secondary and tertiary reflected waves may be reduced. In the above configuration, since the impedance value of the impedance element is switched to a relatively high second set value in the second period, ringing in such a second period is also effectively suppressed. As described above, according to the above configuration, an excellent effect that ringing can be suppressed more effectively can be obtained as compared with the conventional configuration.
　本開示についての上記目的およびその他の目的、特徴や利点は、添付の図面を参照しながら下記の詳細な記述により、より明確になる。その図面は、
図１は、第１実施形態に係る通信ネットワークの構成を模式的に示す図であり、 図２は、第１実施形態に係るリンギング抑制回路を含むトランシーバの構成を模式的に示す図であり、 図３は、第１実施形態に係る抑制部の具体的な第１構成例を示す図であり、 図４は、第１実施形態に係る抑制部の具体的な第２構成例を示す図であり、 図５は、第１実施形態に係る抑制部による抑制動作を説明するためのタイミングチャートであり、差動電圧および線間インピーダンスの波形を模式的に示す図であり、 図６は、第１比較例の構成による動作をシミュレーションした結果を示す図であり、 図７は、第２比較例および第１実施形態に係るリンギング抑制回路による動作をシミュレーションした結果を示す図であり、 図８は、第２実施形態に係るリンギング抑制回路の構成を模式的に示す図であり、 図９は、第２実施形態に係る抑制部による抑制動作を説明するためのタイミングチャートであり、各スイッチの状態および線間インピーダンスの波形を模式的に示す図であり、 図１０は、第２比較例および第２実施形態に係るリンギング抑制回路による動作をシミュレーションした結果を示す図であり、 図１１は、第３実施形態に係るリンギング抑制回路の構成を模式的に示す図であり、 図１２は、第３実施形態に係る抑制部による抑制動作を説明するためのタイミングチャートであり、各ＭＯＳトランジスタの状態、ゲート電圧の波形および線間インピーダンスの波形を模式的に示す図であり、 図１３は、第４実施形態に係るリンギング抑制回路の構成を模式的に示す図であり、 図１４は、第４実施形態に係る各部の電圧およびオン抵抗の関係を模式的に示す図であり、 図１５は、第４実施形態に係る抑制部による抑制動作を説明するためのタイミングチャートであり、スイッチの状態、ＯＰアンプの状態および線間インピーダンスの波形を模式的に示す図であり、 図１６は、第５実施形態に係るリンギング抑制回路を含むトランシーバの構成を模式的に示す図であり、 図１７は、第５実施形態に係るリンギング抑制回路による動作をシミュレーションした結果を示す図であり、自ノード送信時および他ノード送信時における差動電圧の波形を示す図である。 The above objectives and other objectives, features and advantages of the present disclosure will be clarified by the following detailed description with reference to the accompanying drawings. The drawing is
FIG. 1 is a diagram schematically showing a configuration of a communication network according to the first embodiment. FIG. 2 is a diagram schematically showing a configuration of a transceiver including a ringing suppression circuit according to the first embodiment. FIG. 3 is a diagram showing a specific first configuration example of the suppression unit according to the first embodiment. FIG. 4 is a diagram showing a specific second configuration example of the suppression unit according to the first embodiment. FIG. 5 is a timing chart for explaining the suppression operation by the suppression unit according to the first embodiment, and is a diagram schematically showing waveforms of differential voltage and line impedance. FIG. 6 is a diagram showing the result of simulating the operation according to the configuration of the first comparative example. FIG. 7 is a diagram showing the results of simulating the operation of the ringing suppression circuit according to the second comparative example and the first embodiment. FIG. 8 is a diagram schematically showing the configuration of the ringing suppression circuit according to the second embodiment. FIG. 9 is a timing chart for explaining the suppression operation by the suppression unit according to the second embodiment, and is a diagram schematically showing the state of each switch and the waveform of the line impedance. FIG. 10 is a diagram showing the results of simulating the operation of the ringing suppression circuit according to the second comparative example and the second embodiment. FIG. 11 is a diagram schematically showing the configuration of the ringing suppression circuit according to the third embodiment. FIG. 12 is a timing chart for explaining the suppression operation by the suppression unit according to the third embodiment, and is a diagram schematically showing the state of each MOS transistor, the waveform of the gate voltage, and the waveform of the line impedance. FIG. 13 is a diagram schematically showing the configuration of the ringing suppression circuit according to the fourth embodiment. FIG. 14 is a diagram schematically showing the relationship between the voltage and the on-resistance of each part according to the fourth embodiment. FIG. 15 is a timing chart for explaining the suppression operation by the suppression unit according to the fourth embodiment, and is a diagram schematically showing the state of the switch, the state of the OP amplifier, and the waveform of the line impedance. FIG. 16 is a diagram schematically showing a configuration of a transceiver including a ringing suppression circuit according to a fifth embodiment. FIG. 17 is a diagram showing a result of simulating the operation of the ringing suppression circuit according to the fifth embodiment, and is a diagram showing waveforms of differential voltage at the time of transmission of the own node and the time of transmission of another node.
　以下、複数の実施形態について図面を参照して説明する。なお、各実施形態において実質的に同一の構成には同一の符号を付して説明を省略する。
　　　（第１実施形態）
　以下、第１実施形態について図１～図７を参照して説明する。 Hereinafter, a plurality of embodiments will be described with reference to the drawings. In each embodiment, substantially the same configuration is designated by the same reference numerals and the description thereof will be omitted.
(First Embodiment)
Hereinafter, the first embodiment will be described with reference to FIGS. 1 to 7.
　　＜通信ネットワークの構成＞
　図１に示す通信ネットワーク１は、車両に搭載される複数のノード２間の制御通信のために、それらのノード２がツイストペア線で構成される伝送線路３を介して接続されたネットワークである。各ノード２は、それぞれ車両の状態を検出するためのセンサ類やセンサからの情報に基づいてアクチュエータをコントロールする電子制御装置である。 <Communication network configuration>
The communication network 1 shown in FIG. 1 is a network in which the nodes 2 are connected via a transmission line 3 composed of twisted pair lines for control communication between a plurality of nodes 2 mounted on the vehicle. Each node 2 is an electronic control device that controls an actuator based on sensors for detecting the state of the vehicle and information from the sensors.
　各ノード２には、それぞれ図示しない通信回路が設けられており、伝送線路３での通信プロトコル、例えばＣＡＮプロトコルに従って送信データや受信データを通信信号に変換し、他のノード２との間で通信、つまりデータの送受信を行う。伝送線路３、つまり通信バスの途中には、適宜、伝送線路３を分岐するための分岐コネクタ４が設けられている。なお、図１に示したノード２のうち、長方形内に「Ｔ」と記載したノード２は、その外部に終端抵抗を持つノードを示している。また、図１に示したノード２のうち、単なる長方形のシンボルで表したノード２は終端抵抗を備えていないノードを示している。この場合、終端抵抗の抵抗値は、例えば１２０Ωとなっている。 Each node 2 is provided with a communication circuit (not shown), which converts transmission data and reception data into communication signals according to a communication protocol on the transmission line 3, for example, the CAN protocol, and communicates with other nodes 2. That is, data is transmitted and received. A branch connector 4 for branching the transmission line 3 is appropriately provided in the middle of the transmission line 3, that is, the communication bus. Of the nodes 2 shown in FIG. 1, the node 2 described as “T” in the rectangle indicates a node having a terminating resistor outside the node 2. Further, among the nodes 2 shown in FIG. 1, the node 2 represented by a simple rectangular symbol indicates a node having no terminating resistor. In this case, the resistance value of the terminating resistor is, for example, 120Ω.
　　＜リンギング抑制回路の構成＞
　図２に示すトランシーバ５は、半導体集積回路、つまりＩＣとして構成されたものであり、図１に示したノード２に設けられる。トランシーバ５は、データの送信および受信を行う通信回路６およびリンギング抑制回路７を備えている。通信回路６は、同じくノード２に設けられる図示しない制御装置から与えられる送信データＴＸＤに基づいた通信信号を生成し、その通信信号を伝送線路３に送信する。また、通信回路６は、伝送線路３を介して送信された通信信号を受信し、受信データＲＸＤとして上記制御装置に送信する。 <Structure of ringing suppression circuit>
The transceiver 5 shown in FIG. 2 is configured as a semiconductor integrated circuit, that is, an IC, and is provided at the node 2 shown in FIG. The transceiver 5 includes a communication circuit 6 for transmitting and receiving data and a ringing suppression circuit 7. The communication circuit 6 generates a communication signal based on the transmission data TXD given from a control device (not shown) also provided in the node 2, and transmits the communication signal to the transmission line 3. Further, the communication circuit 6 receives the communication signal transmitted via the transmission line 3 and transmits it to the control device as received data RXD.
　リンギング抑制回路７は、抑制部８および動作制御部９を備える。抑制部８は、高電位側信号線３Ｐおよび低電位側信号線３Ｎからなる伝送線路３のインピーダンスを低下させることにより、差動信号の伝送に伴い発生するリンギングを抑制する抑制動作を行う。なお、高電位側信号線３Ｐおよび低電位側信号線３Ｎは、一対の通信線に相当するものであり、以下、単に信号線３Ｐおよび信号線３Ｎと省略することもある。また、図２などでは、信号線３Ｐの信号をＣＡＮ＿Ｈと称するとともに、信号線３Ｎの信号をＣＡＮ＿Ｌと称する。 The ringing suppression circuit 7 includes a suppression unit 8 and an operation control unit 9. The suppression unit 8 performs a suppression operation of suppressing ringing that occurs with the transmission of the differential signal by lowering the impedance of the transmission line 3 including the high potential side signal line 3P and the low potential side signal line 3N. The high-potential side signal line 3P and the low-potential side signal line 3N correspond to a pair of communication lines, and may be abbreviated as simply the signal line 3P and the signal line 3N below. Further, in FIG. 2 and the like, the signal of the signal line 3P is referred to as CAN_H, and the signal of the signal line 3N is referred to as CAN_L.
　抑制部８は、スイッチ１０およびインピーダンス素子１１を備えている。スイッチ１０およびインピーダンス素子１１は、信号線３Ｐ、３Ｎ間に直列接続されている。スイッチ１０は、動作制御部９により制御されるもので、抑制動作が実行されるときにはオンされるとともに、抑制動作が実行されないときにはオフされる。スイッチ１０がオンされることにより、信号線３Ｐ、３Ｎ間にインピーダンス素子１１が接続され、信号線３Ｐ、３Ｎ間のインピーダンスが低下する。このように、抑制部８は、信号線３Ｐ、３Ｎ間にインピーダンス素子１１を接続することによりリンギングを抑制する抑制動作を行うことができる。 The suppression unit 8 includes a switch 10 and an impedance element 11. The switch 10 and the impedance element 11 are connected in series between the signal lines 3P and 3N. The switch 10 is controlled by the operation control unit 9, and is turned on when the suppression operation is executed and turned off when the suppression operation is not executed. When the switch 10 is turned on, the impedance element 11 is connected between the signal lines 3P and 3N, and the impedance between the signal lines 3P and 3N is lowered. In this way, the suppression unit 8 can perform a suppression operation for suppressing ringing by connecting the impedance element 11 between the signal lines 3P and 3N.
　インピーダンス素子１１は、そのインピーダンス値を切り替えることができる構成となっている。インピーダンス値の切り替えは、動作制御部９により制御される。この場合、信号線３Ｐ、３Ｎ間のインピーダンス、つまり線間インピーダンスは、スイッチ１０がオフのとき、つまり抑制動作が実行されない期間には例えば１００ｋΩ程度の非常に高い値であるものが、スイッチ１０がオンのとき、つまり抑制動作が実行される抑制期間には例えば３０Ω程度から例えば１２０Ω程度の範囲の低い値とされる。 The impedance element 11 has a configuration in which the impedance value can be switched. The switching of the impedance value is controlled by the operation control unit 9. In this case, the impedance between the signal lines 3P and 3N, that is, the line impedance, is a very high value of, for example, about 100 kΩ when the switch 10 is off, that is, during the period when the suppression operation is not executed. When it is on, that is, during the suppression period during which the suppression operation is executed, it is set to a low value in the range of, for example, about 30Ω to about 120Ω.
　本実施形態では、インピーダンス素子１１のインピーダンス値は、抑制期間の開始時点では例えば３０Ω程度とされ、その後、連続的に上昇するように切り替えられる。そして、インピーダンス素子１１のインピーダンス値は、抑制期間の終了時点では、例えば１２０Ω程度とされる。言い換えると、インピーダンス素子１１のインピーダンス値は、抑制期間の開始時点を含む期間である第１期間では第１設定値になるとともに、第１期間より後の期間である第２期間では第１設定値より高い第２設定値となるように切り替えられるようになっている。 In the present embodiment, the impedance value of the impedance element 11 is set to, for example, about 30Ω at the start of the suppression period, and then switched so as to continuously increase. The impedance value of the impedance element 11 is, for example, about 120Ω at the end of the suppression period. In other words, the impedance value of the impedance element 11 becomes the first set value in the first period, which is the period including the start time of the suppression period, and the first set value in the second period, which is a period after the first period. It can be switched to a higher second setting value.
　動作制御部９は、抑制部８の動作を制御するものであり、変化検出部１２および切替制御部１３を備えている。変化検出部１２は、信号線３Ｐ、３Ｎ間の電位に基づいて差動信号の信号レベルの変化を検出し、その検出結果を表す検出信号Ｓａを切替制御部１３へと出力する。切替制御部１３は、抑制部８のスイッチ１０のオンオフを制御するとともに、抑制部８のインピーダンス素子１１のインピーダンス値の切り替えを制御するための制御信号Ｓｂを抑制部８へと出力する。 The operation control unit 9 controls the operation of the suppression unit 8, and includes a change detection unit 12 and a switching control unit 13. The change detection unit 12 detects a change in the signal level of the differential signal based on the potential between the signal lines 3P and 3N, and outputs a detection signal Sa representing the detection result to the switching control unit 13. The switching control unit 13 controls the on / off of the switch 10 of the suppression unit 8 and outputs a control signal Sb for controlling the switching of the impedance value of the impedance element 11 of the suppression unit 8 to the suppression unit 8.
　上記したような構成の動作制御部９は、差動信号の信号レベルがレセッシブを表すレベルに変化したことを検出すると、抑制部８のスイッチ１０をオンする。つまり、動作制御部９は、差動信号の信号レベルがレセッシブを表すレベルに変化したことを検出すると、信号線３Ｐ、３Ｎ間にインピーダンス素子１１を接続して抑制部８による抑制動作を開始させる。また、動作制御部９は、抑制動作を実行する抑制期間において、インピーダンス素子１１のインピーダンス値を、前述したように切り替える。 When the operation control unit 9 having the above configuration detects that the signal level of the differential signal has changed to a level representing the recessive signal, the operation control unit 9 turns on the switch 10 of the suppression unit 8. That is, when the operation control unit 9 detects that the signal level of the differential signal has changed to a level representing the recessive, the impedance element 11 is connected between the signal lines 3P and 3N to start the suppression operation by the suppression unit 8. .. Further, the motion control unit 9 switches the impedance value of the impedance element 11 as described above during the suppression period in which the suppression operation is executed.
　抑制部８の具体的な構成としては、例えば図３に示すような第１構成例または図４に示すような第２構成例を採用することができる。図３に示すように、第１構成例の抑制部８は、Ｎチャネル型のＭＯＳトランジスタＱ１および抵抗素子Ｒ１を備えている。ＭＯＳトランジスタＱ１のドレインは抵抗素子Ｒ１を介して信号線３Ｐに接続され、そのソースは信号線３Ｎに接続されている。 As a specific configuration of the suppression unit 8, for example, a first configuration example as shown in FIG. 3 or a second configuration example as shown in FIG. 4 can be adopted. As shown in FIG. 3, the suppression unit 8 of the first configuration example includes an N-channel type MOS transistor Q1 and a resistance element R1. The drain of the MOS transistor Q1 is connected to the signal line 3P via the resistance element R1, and its source is connected to the signal line 3N.
　つまり、ＭＯＳトランジスタＱ１は、信号線３Ｐ、３Ｎ間に抵抗素子Ｒ１を介して接続されている。なお、ＭＯＳトランジスタＱ１および抵抗素子Ｒ１の接続位置は入れ替えることができる。ＭＯＳトランジスタＱ１のゲートには、切替制御部１３から出力される制御信号Ｓｂが与えられている。そのため、ＭＯＳトランジスタＱ１の駆動は、制御信号Ｓｂを出力する動作制御部９の切替制御部１３により制御される。抑制部８は、ＭＯＳトランジスタＱ１をオン駆動することにより抑制動作を行うようになっている。 That is, the MOS transistor Q1 is connected between the signal lines 3P and 3N via the resistance element R1. The connection positions of the MOS transistor Q1 and the resistance element R1 can be exchanged. A control signal Sb output from the switching control unit 13 is given to the gate of the MOS transistor Q1. Therefore, the drive of the MOS transistor Q1 is controlled by the switching control unit 13 of the operation control unit 9 that outputs the control signal Sb. The suppression unit 8 performs a suppression operation by driving the MOS transistor Q1 on.
　第１構成例では、ＭＯＳトランジスタＱ１によるスイッチング動作がスイッチ１０として機能する。また、第１構成例では、ＭＯＳトランジスタＱ１のオン抵抗および抵抗素子Ｒ１がインピーダンス素子１１として機能する。つまり、この場合、インピーダンス素子１１は、ＭＯＳトランジスタＱ１のオン抵抗を含む。ＭＯＳトランジスタＱ１のオン抵抗は、そのゲート電圧に応じて変化する。上記構成では、ＭＯＳトランジスタＱ１のゲート電圧は、制御信号Ｓｂの電圧レベルを変化させることで制御することができる。 In the first configuration example, the switching operation by the MOS transistor Q1 functions as the switch 10. Further, in the first configuration example, the on-resistance of the MOS transistor Q1 and the resistance element R1 function as the impedance element 11. That is, in this case, the impedance element 11 includes the on-resistance of the MOS transistor Q1. The on-resistance of the MOS transistor Q1 changes according to its gate voltage. In the above configuration, the gate voltage of the MOS transistor Q1 can be controlled by changing the voltage level of the control signal Sb.
　第１構成例では、動作制御部９の切替制御部１３は、制御信号ＳｂによってＭＯＳトランジスタＱ１のゲート電圧を制御することによりインピーダンス素子１１のインピーダンス値を切り替えるようになっている。なお、この場合、ＭＯＳトランジスタＱ１および抵抗素子Ｒ１としては、前述したような範囲でインピーダンス素子１１のインピーダンス値を切り替えることができるようなオン抵抗および抵抗値を有するものが用いられる。 In the first configuration example, the switching control unit 13 of the operation control unit 9 switches the impedance value of the impedance element 11 by controlling the gate voltage of the MOS transistor Q1 by the control signal Sb. In this case, as the MOS transistor Q1 and the resistance element R1, those having an on-resistance and a resistance value capable of switching the impedance value of the impedance element 11 within the range as described above are used.
　図４に示すように、第２構成例の抑制部８は、図３に示した第１構成例の抑制部８に対し、抵抗素子Ｒ１が省かれている点などが異なる。この場合、ＭＯＳトランジスタＱ１のドレインは信号線３Ｐに接続され、そのソースは信号線３Ｎに接続されている。つまり、ＭＯＳトランジスタＱ１は、信号線３Ｐ、３Ｎ間に接続されている。この場合も、抑制部８は、ＭＯＳトランジスタＱ１をオン駆動することにより抑制動作を行うようになっている。 As shown in FIG. 4, the suppression unit 8 of the second configuration example differs from the suppression unit 8 of the first configuration example shown in FIG. 3 in that the resistance element R1 is omitted. In this case, the drain of the MOS transistor Q1 is connected to the signal line 3P, and its source is connected to the signal line 3N. That is, the MOS transistor Q1 is connected between the signal lines 3P and 3N. Also in this case, the suppression unit 8 is configured to perform the suppression operation by driving the MOS transistor Q1 on.
　第２構成例では、ＭＯＳトランジスタＱ１のオン抵抗がインピーダンス素子１１として機能する。つまり、この場合も、インピーダンス素子１１は、ＭＯＳトランジスタＱ１のオン抵抗を含む。なお、この場合、ＭＯＳトランジスタＱ１としては、前述したような範囲でインピーダンス素子１１のインピーダンス値を切り替えることができるようなオン抵抗を有するものが用いられる。 In the second configuration example, the on-resistance of the MOS transistor Q1 functions as the impedance element 11. That is, also in this case, the impedance element 11 includes the on-resistance of the MOS transistor Q1. In this case, as the MOS transistor Q1, a transistor having an on-resistance capable of switching the impedance value of the impedance element 11 within the range as described above is used.
　上記した抑制部８の第１構成例および第２構成例には、それぞれにメリットがある。まず、第１構成例によれば、ＭＯＳトランジスタＱ１のオン抵抗と抵抗素子Ｒ１とによりインピーダンス素子１１が構成されることになる。一般に、抵抗素子は、ＭＯＳトランジスタのオン抵抗に比べ、その抵抗値の精度は高く、また、温度特性などの各種特性も良好なものとすることができる。 Each of the first configuration example and the second configuration example of the suppression unit 8 described above has merits. First, according to the first configuration example, the impedance element 11 is configured by the on-resistance of the MOS transistor Q1 and the resistance element R1. In general, a resistance element has a higher accuracy of resistance value than the on-resistance of a MOS transistor, and can have good various characteristics such as temperature characteristics.
　そのため、第１構成例によれば、ＭＯＳトランジスタＱ１のオン抵抗だけによりインピーダンス素子１１が構成される第２構成例に比べ、インピーダンス素子１１のインピーダンス値の合わせ込みが容易になるというメリットが得られる。一方、第２構成例によれば、第１構成例に比べ、インピーダンス値の合わせ込みがし難くなるものの、ＭＯＳトランジスタＱ１だけで抑制部８を構成することが可能となることから、その構成を簡素化することができる。したがって、第２構成例によれば、第１構成例に比べ、リンギング抑制回路７の回路面積を小さく抑えることができるというメリットが得られる。 Therefore, according to the first configuration example, there is an advantage that the impedance value of the impedance element 11 can be easily adjusted as compared with the second configuration example in which the impedance element 11 is configured only by the on-resistance of the MOS transistor Q1. .. On the other hand, according to the second configuration example, although it is more difficult to adjust the impedance value than in the first configuration example, the suppression unit 8 can be configured only by the MOS transistor Q1. It can be simplified. Therefore, according to the second configuration example, there is an advantage that the circuit area of the ringing suppression circuit 7 can be suppressed to be smaller than that of the first configuration example.
　次に、上記構成の作用について説明する。
　この場合、伝送線路３は、ハイレベル、ロウレベルの２値信号を差動信号として伝送する。例えば、電源電圧が５Ｖの場合、信号線３Ｐ、３Ｎは、非ドライブ状態においていずれも中間電位である２．５Ｖに設定され、差動電圧は０Ｖであり、差動信号はレセッシブを表すロウレベルとなる。そして、通信回路６の送信回路（図示略）が伝送線路３をドライブすると、信号線３Ｐは例えば３．５Ｖ以上に、信号線３Ｎは例えば１．５Ｖ以下にドライブされ、差動電圧は２Ｖ以上となり、差動信号はドミナントを表すハイレベルとなる。また、図示しないが、信号線３Ｐ、３Ｎの両端は１２０Ωの終端抵抗により終端されている。 Next, the operation of the above configuration will be described.
In this case, the transmission line 3 transmits high-level and low-level binary signals as differential signals. For example, when the power supply voltage is 5V, the signal lines 3P and 3N are all set to 2.5V, which is an intermediate potential in the non-drive state, the differential voltage is 0V, and the differential signal has a low level representing recessive. Become. When the transmission circuit (not shown) of the communication circuit 6 drives the transmission line 3, the signal line 3P is driven to, for example, 3.5 V or more, the signal line 3N is driven to, for example, 1.5 V or less, and the differential voltage is 2 V or more. And the differential signal becomes a high level representing the dominant. Although not shown, both ends of the signal lines 3P and 3N are terminated by a terminating resistor of 120Ω.
　このようなことから、図５に示すように、差動信号の信号レベルがハイレベルからロウレベルに変化する際には、伝送線路３が非ドライブ状態となり伝送線路３のインピーダンスが高くなることから、差動信号波形にリンギングが発生する。なお、図５などでは、差動信号がドミナントを表す期間をＴａと称するとともに差動信号がレセッシブを表す期間をＴｂと称する。また、図５では、差動信号の理想的な波形を一点鎖線で示している。 Therefore, as shown in FIG. 5, when the signal level of the differential signal changes from a high level to a low level, the transmission line 3 is in a non-drive state and the impedance of the transmission line 3 becomes high. Ringing occurs in the differential signal waveform. In FIG. 5 and the like, the period in which the differential signal represents the dominant is referred to as Ta, and the period in which the differential signal represents the recessive is referred to as Tb. Further, in FIG. 5, the ideal waveform of the differential signal is shown by a alternate long and short dash line.
　そこで、リンギング抑制回路７では、次のようにして、このようなリンギングを抑制するための抑制動作が行われる。すなわち、変化検出部１２は、差動信号の信号レベルがハイレベルからロウレベルに変化した時点ｔ１において、差動信号の信号レベルがレセッシブを表すレベルに変化したことを検出する。すると、切替制御部１３は、スイッチ１０をオンさせ、これにより抑制部８による抑制動作が開始される。そして、抑制動作が開始された時点ｔ１において、線間インピーダンスが１００ｋΩから３０Ωへと変化する。 Therefore, in the ringing suppression circuit 7, an suppression operation for suppressing such ringing is performed as follows. That is, the change detection unit 12 detects that the signal level of the differential signal has changed to a level representing the recessive at the time t1 when the signal level of the differential signal changes from the high level to the low level. Then, the switching control unit 13 turns on the switch 10, and the suppression operation by the suppression unit 8 is started by this. Then, at the time t1 when the suppression operation is started, the line impedance changes from 100 kΩ to 30 Ω.
　切替制御部１３は、このようなスイッチ１０のオン、つまり抑制動作を時点ｔ２まで継続する。この場合、時点ｔ１～ｔ２の期間Ｔｃが、抑制動作が行われる抑制期間に相当する。切替制御部１３は、抑制期間の開始時点である時点ｔ１から終了時点である時点ｔ２までの間、制御信号Ｓｂの電圧レベル、つまりＭＯＳトランジスタＱ１のゲート電圧を、徐々に低下させるようになっている。これにより、線間インピーダンスは、時点ｔ１から時点ｔ２に向けて徐々に高くなっていき、時点ｔ２において１２０Ωとなる。 The switching control unit 13 keeps the switch 10 on, that is, the suppression operation until the time point t2. In this case, the period Tc from the time points t1 to t2 corresponds to the suppression period in which the suppression operation is performed. The switching control unit 13 gradually lowers the voltage level of the control signal Sb, that is, the gate voltage of the MOS transistor Q1 from the time point t1 at the start time of the suppression period to the time point t2 at the end time. There is. As a result, the line impedance gradually increases from the time point t1 to the time point t2, and becomes 120Ω at the time point t2.
　このような抑制動作により、差動信号の信号レベルがハイレベルからロウレベルに変化する立ち下がり期間に発生する波形歪みのエネルギーがインピーダンス素子１１により消費され、リンギングが抑制される。切替制御部１３は、時点ｔ２において、スイッチ１０をオフさせ、これにより抑制部８による抑制動作が停止される。そして、抑制動作が停止された時点ｔ２において、線間インピーダンスが１２０Ωから１００ｋΩへと変化する。 By such a suppression operation, the energy of the waveform distortion generated during the falling period when the signal level of the differential signal changes from the high level to the low level is consumed by the impedance element 11, and ringing is suppressed. The switching control unit 13 turns off the switch 10 at the time point t2, whereby the suppression operation by the suppression unit 8 is stopped. Then, at the time t2 when the suppression operation is stopped, the line impedance changes from 120Ω to 100kΩ.
　以上説明した本実施形態によれば、次のような効果が得られる。
　差動信号の伝送に伴い発生するリンギングの大きさは、差動信号のレベルがレセッシブに変化した直後、言い換えると、抑制部８による抑制動作が開始された直後が最も大きくなる傾向がある。本実施形態のリンギング抑制回路７では、インピーダンス素子１１のインピーダンス値は、抑制動作が実行される抑制期間Ｔｃの開始時点ｔ１には最も低い３０Ω程度となり、その後、徐々に高くなるように切り替えられる。したがって、本実施形態によれば、最も大きくなる可能性があるレセッシブ遷移直後のリンギングを、線間インピーダンスをより低くすることによって効果的に抑制することができる。 According to the present embodiment described above, the following effects can be obtained.
The magnitude of ringing that occurs with the transmission of the differential signal tends to be greatest immediately after the level of the differential signal changes recessively, in other words, immediately after the suppression operation by the suppression unit 8 is started. In the ringing suppression circuit 7 of the present embodiment, the impedance value of the impedance element 11 is about 30Ω, which is the lowest at the start time t1 of the suppression period Tc in which the suppression operation is executed, and is then switched to gradually increase. Therefore, according to the present embodiment, ringing immediately after the recessive transition, which may be the largest, can be effectively suppressed by lowering the line impedance.
　リンギングの大きさは、差動信号のレベルがレセッシブに変化した後は、次第に小さくなっていく。このようにリンギングが小さくなる期間において、線間インピーダンスを低くし過ぎると、二次、三次の反射波などによるリンギングを抑制する効果が逆に低下する可能性がある。上記構成では、インピーダンス素子１１のインピーダンス値は、抑制期間Ｔｃ中、時間の経過とともに次第に高くなるように切り替えられる。そのため、上記構成によれば、このような次第に小さくなるリンギングについても、線間インピーダンスを低くし過ぎないことによって効果的に抑制することができる。このように、本実施形態によれば、従来の構成に比べ、リンギングを一層効果的に抑制することができるという優れた効果が得られる。 The magnitude of ringing gradually decreases after the level of the differential signal changes recessively. If the line impedance is made too low during the period in which ringing is reduced in this way, the effect of suppressing ringing due to secondary and tertiary reflected waves may be reduced. In the above configuration, the impedance value of the impedance element 11 is switched so as to gradually increase with the passage of time during the suppression period Tc. Therefore, according to the above configuration, even such gradually decreasing ringing can be effectively suppressed by not making the line impedance too low. As described above, according to the present embodiment, an excellent effect that ringing can be suppressed more effectively can be obtained as compared with the conventional configuration.
　本実施形態により得られる上述したような効果は、リンギング抑制回路が設けられていない構成である第１比較例および抑制期間を通じて線間インピーダンスを一定の低いインピーダンス（例えば１２０Ω程度）とする抑制動作を行う従来のリンギング抑制回路が設けられた構成である第２比較例と比較することで一層明確になる。そこで、以下では、各比較例および本実施形態のそれぞれにおける回路動作のシミュレーション結果に相当する差動電圧の波形を表す図６および図７を参照しながら、各比較例と本実施形態とを比較しつつ本実施形態により得られる効果を説明する。 The above-mentioned effect obtained by the present embodiment is the first comparative example in which the ringing suppression circuit is not provided, and the suppression operation in which the line impedance is set to a constant low impedance (for example, about 120Ω) throughout the suppression period. It becomes clearer by comparing with the second comparative example which is a configuration provided with the conventional ringing suppression circuit to be performed. Therefore, in the following, each comparative example and the present embodiment will be compared with reference to FIGS. 6 and 7 showing waveforms of differential voltages corresponding to simulation results of circuit operations in each comparative example and the present embodiment. However, the effects obtained by this embodiment will be described.
　　［１］第１比較例
　第１比較例の場合、ノード２にリンギング抑制回路が設けられていない。そのため、図６に示すように、差動信号のレベルがドミナントを表すレベルからレセッシブを表すレベルに変化した後に比較的大きなリンギングが発生し、その後、そのリンギングが収束するまでに比較的長い時間を要している。したがって、第１比較例の場合、例えば誤サンプリングによる誤ったデータの受信など、通信に致命的な障害が生じるおそれがある。 [1] First Comparative Example In the case of the first comparative example, the ringing suppression circuit is not provided in the node 2. Therefore, as shown in FIG. 6, relatively large ringing occurs after the level of the differential signal changes from the level representing dominant to the level representing recessive, and then it takes a relatively long time for the ringing to converge. I need it. Therefore, in the case of the first comparative example, there is a possibility that a fatal failure may occur in communication such as reception of erroneous data due to erroneous sampling.
　　［２］第２比較例
　第２比較例の場合、差動信号のレベルがドミナントを表すレベルからレセッシブを表すレベルに変化した後、抑制期間Ｔｃを通じて線間インピーダンスを１２０Ωとする抑制動作が行われる。そのため、図７に細い実線で示すように、第１比較例に比べリンギングが小さく抑えられている。 [2] Second Comparative Example In the case of the second comparative example, after the level of the differential signal changes from the level representing dominant to the level representing recessive, the suppression operation of setting the line impedance to 120Ω is performed throughout the suppression period Tc. .. Therefore, as shown by a thin solid line in FIG. 7, ringing is suppressed to be smaller than that of the first comparative example.
　しかし、この場合、差動信号のレベルがレセッシブを表すレベルに変化した直後に発生する最も大きくなるリンギングが後述する本実施形態に比べて十分に抑制されておらず、その結果、リンギングが収束するまでの時間が後述する本実施形態に比べて長くなっている。したがって、第２比較例によれば、波形の歪みがサンプリングタイミングまでに収束しないケースが発生するおそれがある。 However, in this case, the largest ringing that occurs immediately after the level of the differential signal changes to a level representing the recessive is not sufficiently suppressed as compared with the present embodiment described later, and as a result, the ringing converges. The time until is longer than that of the present embodiment described later. Therefore, according to the second comparative example, there is a possibility that the distortion of the waveform does not converge by the sampling timing.
　　［３］本実施形態
　本実施形態の場合、差動信号のレベルがドミナントを表すレベルからレセッシブを表すレベルに変化した後、前述したような抑制動作が行われる。そのため、線間インピーダンスは、差動信号のレベルがレセッシブを表すレベルに変化した直後、つまり抑制期間Ｔｃの開始時点では第２比較例における１２０Ωよりも一層低い３０Ωとなり、その後、徐々に高くなるように切り替えられる。 [3] Embodiment In the present embodiment, after the level of the differential signal changes from the level representing dominant to the level representing recessive, the suppression operation as described above is performed. Therefore, the line impedance becomes 30Ω, which is lower than 120Ω in the second comparative example, immediately after the level of the differential signal changes to a level representing recessive, that is, at the start of the suppression period Tc, and then gradually increases. Can be switched to.
　そのため、図７に太い実線で示すように、差動信号のレベルがレセッシブを表すレベルに変化した直後に発生する最も大きくなるリンギングが、第２比較例よりも小さくなるように効果的に抑制されている。また、この場合、線間インピーダンスは、抑制期間Ｔｃ中、時間の経過とともに次第に高くなるように切り替えられ、抑制期間Ｔｃの終了時点では伝送線路３の特性インピーダンスに相当する１２０Ωとなる。そのため、本実施形態では、抑制期間Ｔｃの後半に発生する二次、三次の反射波などによるリンギングが、インピーダンスマッチングにより、効果的に抑制されている。 Therefore, as shown by the thick solid line in FIG. 7, the largest ringing that occurs immediately after the level of the differential signal changes to the level representing the recessive is effectively suppressed so as to be smaller than that in the second comparative example. ing. Further, in this case, the line impedance is switched so as to gradually increase with the passage of time during the suppression period Tc, and becomes 120Ω corresponding to the characteristic impedance of the transmission line 3 at the end of the suppression period Tc. Therefore, in the present embodiment, ringing due to secondary and tertiary reflected waves generated in the latter half of the suppression period Tc is effectively suppressed by impedance matching.
　このようなことから、本実施形態では、リンギングが収束するまでの時間が第２比較例に比べて短くなっており、波形の歪みがサンプリングタイミングまでに収束しないケースが発生する可能性を低く抑えることができる。また、本実施形態では、インピーダンス素子１１のインピーダンス値は、抑制期間Ｔｃ中、連続的に切り替えられるようになっている。そのため、インピーダンス値の切り替えに伴い、差動電圧が急峻に変化すること、言い換えると差動電圧の波形に段差ができることがない。したがって、本実施形態によれば、インピーダンス値を切り替えることに伴って放射ノイズが増加する、といった別の問題が生じることがない。 For this reason, in the present embodiment, the time until the ringing converges is shorter than that in the second comparative example, and the possibility that the waveform distortion does not converge by the sampling timing is suppressed. be able to. Further, in the present embodiment, the impedance value of the impedance element 11 can be continuously switched during the suppression period Tc. Therefore, the differential voltage does not change sharply with the switching of the impedance value, in other words, there is no step in the waveform of the differential voltage. Therefore, according to the present embodiment, another problem such as an increase in radiation noise due to switching the impedance value does not occur.
　　　（第２実施形態）
　以下、第２実施形態について図８～図１０を参照して説明する。
　図８に示すように、本実施形態のリンギング抑制回路２１は、第１実施形態のリンギング抑制回路７に対し、抑制部８に代えて抑制部２２を備えている点、動作制御部９に代えて動作制御部２３を備えている点などが異なる。 (Second Embodiment)
Hereinafter, the second embodiment will be described with reference to FIGS. 8 to 10.
As shown in FIG. 8, the ringing suppression circuit 21 of the present embodiment is provided with the suppression unit 22 instead of the suppression unit 8 with respect to the ringing suppression circuit 7 of the first embodiment, instead of the operation control unit 9. The difference is that the operation control unit 23 is provided.
　抑制部２２は、スイッチ２４、２５および抵抗素子２６、２７を備えている。スイッチ２４および抵抗素子２６は、直列接続されており、その直列回路は、通信線３Ｐ、３Ｎ間に接続されている。スイッチ２５および抵抗素子２７は、直列接続されており、その直列回路は、通信線３Ｐ、３Ｎ間に接続されている。このように、抑制部２２は、通信線３Ｐ、３Ｎ間に接続された抵抗素子およびスイッチの直列回路を２つ備えた構成となっている。なお、抑制部２２は、通信線３Ｐ、３Ｎ間に接続された抵抗素子およびスイッチの直列回路を３つ以上備えた構成とすることもできる。 The suppression unit 22 includes switches 24 and 25 and resistance elements 26 and 27. The switch 24 and the resistance element 26 are connected in series, and the series circuit thereof is connected between the communication lines 3P and 3N. The switch 25 and the resistance element 27 are connected in series, and the series circuit thereof is connected between the communication lines 3P and 3N. As described above, the suppression unit 22 has a configuration including two series circuits of a resistance element and a switch connected between the communication lines 3P and 3N. The suppression unit 22 may be configured to include three or more series circuits of resistance elements and switches connected between the communication lines 3P and 3N.
　動作制御部２３は、動作制御部９に対し、切替制御部１３に代えて切替制御部２８を備えている点などが異なる。抑制部２２のスイッチ２４、２５は、動作制御部２３の切替制御部２８により制御されるものであり、抑制動作が実行されるときには少なくとも一方がオンされるとともに、抑制動作が実行されないときには双方がオフされる。スイッチ２４、２５の少なくとも一方がオンされることにより、信号線３Ｐ、３Ｎ間に抵抗素子２６、２７の少なくとも一方が接続され、線間インピーダンスが低下する。 The operation control unit 23 is different from the operation control unit 9 in that it includes a switching control unit 28 instead of the switching control unit 13. The switches 24 and 25 of the suppression unit 22 are controlled by the switching control unit 28 of the operation control unit 23, and at least one of them is turned on when the suppression operation is executed, and both are turned on when the suppression operation is not executed. It is turned off. When at least one of the switches 24 and 25 is turned on, at least one of the resistance elements 26 and 27 is connected between the signal lines 3P and 3N, and the line impedance is lowered.
　このように、本実施形態では、抵抗素子２６、２７がインピーダンス素子２９として機能する。つまり、この場合、インピーダンス素子２９は、抵抗素子２６、２７を含む。本実施形態では、抵抗素子２６の抵抗値は１２０Ω程度となっている。また、抵抗素子２７の抵抗値は、抵抗素子２６、２７の並列合成抵抗値が３０Ω程度となるような値（例えば４Ω程度）となっている。 As described above, in the present embodiment, the resistance elements 26 and 27 function as the impedance elements 29. That is, in this case, the impedance element 29 includes the resistance elements 26 and 27. In this embodiment, the resistance value of the resistance element 26 is about 120Ω. Further, the resistance value of the resistance element 27 is a value (for example, about 4Ω) such that the parallel combined resistance value of the resistance elements 26 and 27 is about 30Ω.
　動作制御部２３の切替制御部２８は、抑制部２２のスイッチ２４、２５を個別にオンオフするための制御信号Ｓｃを抑制部２２へと出力する。この場合、動作制御部２３は、差動信号の信号レベルがレセッシブを表すレベルに変化したことを検出すると、抑制部２２の２つのスイッチ２４、２５の双方をオンして信号線３Ｐ、３Ｎ間にインピーダンス素子２９として機能する２つの抵抗素子２６、２７を接続することにより、抑制部２２による抑制動作を開始させる。 The switching control unit 28 of the operation control unit 23 outputs a control signal Sc for individually turning on / off the switches 24 and 25 of the suppression unit 22 to the suppression unit 22. In this case, when the operation control unit 23 detects that the signal level of the differential signal has changed to a level indicating impedance, it turns on both of the two switches 24 and 25 of the suppression unit 22 and between the signal lines 3P and 3N. By connecting the two resistance elements 26 and 27 that function as the impedance elements 29, the suppression operation by the suppression unit 22 is started.
　動作制御部２３は、抑制動作を実行する抑制期間において、インピーダンス素子２９のインピーダンス値を、次のように切り替える。すなわち、動作制御部２３は、抑制期間中、オンされたスイッチ２４、２５を段階的にオフすることによりインピーダンス素子２９のインピーダンス値を段階的に切り替える。具体的には、動作制御部２３は、抑制期間の開始時点を含む前半の期間である第１期間では、スイッチ２４、２５の双方をオンした状態を維持する。 The operation control unit 23 switches the impedance value of the impedance element 29 as follows during the suppression period for executing the suppression operation. That is, the operation control unit 23 changes the impedance value of the impedance element 29 stepwise by turning off the turned-on switches 24 and 25 stepwise during the suppression period. Specifically, the motion control unit 23 keeps both the switches 24 and 25 turned on in the first period, which is the first half period including the start time of the suppression period.
　これにより、第１期間では、インピーダンス素子２９のインピーダンス値は、第１設定値に相当する３０Ω程度となる。動作制御部２３は、第１期間より後の期間、つまり抑制期間の後半の期間では、スイッチ２５をオフする。これにより、第２期間では、インピーダンス素子２９のインピーダンス値は、第１設定値より高い第２設定値に相当する１２０Ω程度となる。このように、動作制御部２３は、インピーダンス素子２９のインピーダンス値を段階的に切り替えるようになっている。 As a result, in the first period, the impedance value of the impedance element 29 becomes about 30Ω, which corresponds to the first set value. The operation control unit 23 turns off the switch 25 in the period after the first period, that is, in the latter half of the suppression period. As a result, in the second period, the impedance value of the impedance element 29 becomes about 120Ω, which corresponds to the second set value higher than the first set value. In this way, the operation control unit 23 switches the impedance value of the impedance element 29 step by step.
　次に、上記構成の作用について説明する。
　リンギング抑制回路２１では、次のように抑制動作が行われる。すなわち、図９に示すように、変化検出部１２により差動信号の信号レベルがレセッシブを表すレベルに変化したことが検出された時点ｔ１１において、切替制御部２８は、スイッチ２４、２５をオンさせ、これにより抑制部２２による抑制動作が開始される。そして、抑制動作が開始された時点ｔ１１において、線間インピーダンスが１００ｋΩから３０Ωへと変化する。 Next, the operation of the above configuration will be described.
In the ringing suppression circuit 21, the suppression operation is performed as follows. That is, as shown in FIG. 9, at the time t11 when the change detection unit 12 detects that the signal level of the differential signal has changed to a level representing the recessive, the switching control unit 28 turns on the switches 24 and 25. As a result, the suppression operation by the suppression unit 22 is started. Then, at the time t11 when the suppression operation is started, the line impedance changes from 100 kΩ to 30 Ω.
　切替制御部２８は、スイッチ２４をオンさせた状態を時点ｔ１３まで継続する。この場合、時点ｔ１１～ｔ１３の期間Ｔｃが、抑制動作が行われる抑制期間に相当する。切替制御部２８は、抑制期間の開始時点である時点ｔ１１を含む前半の期間、つまり時点ｔ１１～ｔ１２の期間である第１期間Ｔ１では、スイッチ２４、２５をオンさせた状態を維持する。これにより、抑制期間Ｔｃの前半の期間である第１期間Ｔ１では、線間インピーダンスが３０Ωで一定とされる。 The switching control unit 28 continues the state in which the switch 24 is turned on until the time point t13. In this case, the period Tc from the time points t11 to t13 corresponds to the suppression period in which the suppression operation is performed. The switching control unit 28 maintains the switches 24 and 25 turned on during the first half period including the time point t11, which is the start time of the suppression period, that is, the first period T1 which is the period from the time points t11 to t12. As a result, in the first period T1, which is the first half of the suppression period Tc, the line impedance is kept constant at 30Ω.
　切替制御部２８は、時点ｔ１２において、スイッチ２５をオフさせる。これにより、時点ｔ１２において、線間インピーダンスが３０Ωから１２０Ωへと変化する。切替制御部２８は、抑制期間Ｔｃの後半の期間、つまり時点ｔ１２～ｔ１３の期間である第２期間Ｔ２では、スイッチ２４をオンさせるとともにスイッチ２５をオフさせた状態を維持する。これにより、抑制期間Ｔｃの後半の期間である第２期間Ｔ２では、線間インピーダンスが１２０Ωで一定とされる。 The switching control unit 28 turns off the switch 25 at the time point t12. As a result, at time point t12, the line impedance changes from 30Ω to 120Ω. The switching control unit 28 keeps the switch 24 on and the switch 25 off during the latter half of the suppression period Tc, that is, the second period T2 which is the period from the time points t12 to t13. As a result, in the second period T2, which is the latter half of the suppression period Tc, the line impedance is kept constant at 120Ω.
　このような抑制動作により、差動信号の信号レベルがハイレベルからロウレベルに変化する立ち下がり期間に発生する波形歪みのエネルギーがインピーダンス素子２９により消費され、リンギングが抑制される。切替制御部２８は、時点ｔ１３において、スイッチ２５をオフさせ、これにより抑制部２２による抑制動作が停止される。そして、抑制動作が停止された時点ｔ１３において、線間インピーダンスが１２０Ωから１００ｋΩへと変化する。 By such a suppression operation, the energy of the waveform distortion generated during the falling period when the signal level of the differential signal changes from the high level to the low level is consumed by the impedance element 29, and ringing is suppressed. At the time point t13, the switching control unit 28 turns off the switch 25, whereby the suppression operation by the suppression unit 22 is stopped. Then, at the time t13 when the suppression operation is stopped, the line impedance changes from 120Ω to 100kΩ.
　以上説明したように、本実施形態のリンギング抑制回路２１では、インピーダンス素子２９のインピーダンス値は、抑制期間Ｔｃの開始時点ｔ１１を含む第１期間Ｔ１では３０Ω程度となり、第１期間Ｔ１より後の第２期間Ｔ２では１２０Ω程度となるように切り替えられる。したがって、本実施形態によっても、第１実施形態と同様の効果、つまり従来の構成に比べ、リンギングを一層効果的に抑制することができるという優れた効果が得られる。 As described above, in the ringing suppression circuit 21 of the present embodiment, the impedance value of the impedance element 29 is about 30Ω in the first period T1 including the start time t11 of the suppression period Tc, and is the second after the first period T1. In T2 for 2 periods, it is switched so as to be about 120Ω. Therefore, the present embodiment also has the same effect as that of the first embodiment, that is, an excellent effect that ringing can be suppressed more effectively as compared with the conventional configuration.
　以下、第１実施形態で説明した第２比較例および本実施形態のそれぞれにおける回路動作のシミュレーション結果に相当する差動電圧の波形を表す図１０を参照しながら、第２比較例と本実施形態とを比較しつつ本実施形態により得られる効果を説明する。なお、図１０では、第２比較例に対応する差動電圧の波形を細い実線で示し、本実施形態に対応する差動電圧の波形を太い実線で示している。 Hereinafter, the second comparative example and the present embodiment will be referred to with reference to FIG. 10 showing the waveform of the differential voltage corresponding to the simulation result of the circuit operation in each of the second comparative example and the present embodiment described in the first embodiment. The effect obtained by this embodiment will be described while comparing with. In FIG. 10, the waveform of the differential voltage corresponding to the second comparative example is shown by a thin solid line, and the waveform of the differential voltage corresponding to the present embodiment is shown by a thick solid line.
　図１０に示すように、本実施形態によれば、差動信号のレベルがレセッシブを表すレベルに変化した直後に発生する最も大きくなるリンギングが、第２比較例よりも小さくなるように効果的に抑制されている。また、この場合、線間インピーダンスは、抑制期間Ｔｃの後半の期間である第２期間Ｔ２では、伝送線路３の特性インピーダンスに相当する１２０Ωとされる。そのため、本実施形態では、抑制期間Ｔｃの後半に発生する二次、三次の反射波などによるリンギングが、インピーダンスマッチングにより、効果的に抑制されている。 As shown in FIG. 10, according to the present embodiment, the largest ringing that occurs immediately after the level of the differential signal changes to the level representing the recessive is effectively reduced as compared with the second comparative example. It is suppressed. Further, in this case, the line impedance is set to 120Ω, which corresponds to the characteristic impedance of the transmission line 3 in the second period T2, which is the latter half of the suppression period Tc. Therefore, in the present embodiment, ringing due to secondary and tertiary reflected waves generated in the latter half of the suppression period Tc is effectively suppressed by impedance matching.
　このようなことから、本実施形態では、リンギングが収束するまでの時間が第２比較例に比べて短くなっており、波形の歪みがサンプリングタイミングまでに収束しないケースが発生する可能性を低く抑えることができる。なお、本実施形態では、インピーダンス素子２９のインピーダンス値は、抑制期間Ｔｃ中、段階的に切り替えられるようになっている。そのため、インピーダンス値の切り替えに伴い、差動電圧が急峻に変化すること、言い換えると差動電圧の波形に段差ができることがある。 For this reason, in the present embodiment, the time until the ringing converges is shorter than that in the second comparative example, and the possibility that the waveform distortion does not converge by the sampling timing is suppressed. be able to. In the present embodiment, the impedance value of the impedance element 29 can be switched stepwise during the suppression period Tc. Therefore, the differential voltage may change sharply with the switching of the impedance value, in other words, a step may be formed in the waveform of the differential voltage.
　そのため、本実施形態では、第１実施形態では発生する可能性がない問題、つまりインピーダンス値を切り替えることに伴って放射ノイズが増加する問題が生じる可能性がある。ただし、本実施形態によれば、抑制期間Ｔｃ中、第１実施形態のようにインピーダンス値を連続的に変化させるための制御を行う必要がなく、スイッチ２４、２５を段階的に切り替えるようにオンオフ制御すればよいだけであることから、動作制御部２３の切替制御部２８における制御を簡素化することができるというメリットがある。 Therefore, in the present embodiment, there is a possibility that a problem that does not occur in the first embodiment, that is, a problem that radiation noise increases as the impedance value is switched may occur. However, according to the present embodiment, it is not necessary to perform control for continuously changing the impedance value during the suppression period Tc as in the first embodiment, and the switches 24 and 25 are turned on and off so as to be switched in stages. Since it is only necessary to control, there is an advantage that the control in the switching control unit 28 of the operation control unit 23 can be simplified.
　　　（第３実施形態）
　以下、第３実施形態について図１１および図１２を参照して説明する。
　図１１に示すように、本実施形態のリンギング抑制回路３１は、第１実施形態のリンギング抑制回路７に対し、動作制御部９に代えて動作制御部３２を備えている点などが異なる。なお、この場合、抑制部８としては、図３に示した第１構成例が採用されている。動作制御部３２は、動作制御部９に対し、切替制御部１３に代えて切替制御部３３を備えている点などが異なる。 (Third Embodiment)
Hereinafter, the third embodiment will be described with reference to FIGS. 11 and 12.
As shown in FIG. 11, the ringing suppression circuit 31 of the present embodiment is different from the ringing suppression circuit 7 of the first embodiment in that it includes an operation control unit 32 instead of the operation control unit 9. In this case, the first configuration example shown in FIG. 3 is adopted as the suppression unit 8. The operation control unit 32 is different from the operation control unit 9 in that the switching control unit 33 is provided in place of the switching control unit 13.
　切替制御部３３は、バッファ３４、抵抗Ｒ３１、コンデンサＣ３１、Ｐチャネル型のＭＯＳトランジスタＱ３１およびＮチャネル型のＭＯＳトランジスタＱ３２を備えている。バッファ３４の入力端子には、一定の電圧Ｖｒｅｆが入力される。電圧Ｖｒｅｆは、ＭＯＳトランジスタＱ１のゲート閾値電圧よりも高い電圧である。バッファ３４の出力端子は、抵抗Ｒ３１を介してＭＯＳトランジスタＱ１のゲートに接続されるとともに、コンデンサＣ３１を介して回路の基準電位が与えられるグランドに接続される。 The switching control unit 33 includes a buffer 34, a resistor R31, a capacitor C31, a P-channel type MOS transistor Q31, and an N-channel type MOS transistor Q32. A constant voltage Vref is input to the input terminal of the buffer 34. The voltage Vref is a voltage higher than the gate threshold voltage of the MOS transistor Q1. The output terminal of the buffer 34 is connected to the gate of the MOS transistor Q1 via the resistor R31 and is connected to the ground to which the reference potential of the circuit is given via the capacitor C31.
　ＭＯＳトランジスタＱ３１のソースは、電源電圧ＶＤＤが供給される電源線Ｌ３１に接続され、そのドレインはＭＯＳトランジスタＱ１のゲートに接続される。電源電圧ＶＤＤは、電圧Ｖｒｅｆよりも高い電圧となっている。ＭＯＳトランジスタＱ３２のソースはグランドに接続され、そのドレインはＭＯＳトランジスタＱ１のゲートに接続される。ＭＯＳトランジスタＱ３１、Ｑ３２の各ゲートには、駆動信号ＳＷＰ、ＳＷＮがそれぞれ与えられている。 The source of the MOS transistor Q31 is connected to the power supply line L31 to which the power supply voltage VDD is supplied, and the drain thereof is connected to the gate of the MOS transistor Q1. The power supply voltage VDD is higher than the voltage Vref. The source of the MOS transistor Q32 is connected to the ground, and its drain is connected to the gate of the MOS transistor Q1. Drive signals SWP and SWN are given to the gates of the MOS transistors Q31 and Q32, respectively.
　ＭＯＳトランジスタＱ３１は、駆動信号ＳＷＰがハイレベルのときにオフされるとともにロウレベルのときにオンされる。ＭＯＳトランジスタＱ３２は、駆動信号ＳＷＮがハイレベルのときにオンされるとともにロウレベルのときにオフされる。駆動信号ＳＷＰ、ＳＷＮの生成、ひいてはＭＯＳトランジスタＱ３１、Ｑ３２の駆動の制御などは、切替制御部３３に設けられた図示しない制御回路により行われる。 The MOS transistor Q31 is turned off when the drive signal SWP is high level and turned on when the drive signal SWP is low level. The MOS transistor Q32 is turned on when the drive signal SWN is at a high level and turned off when the drive signal SWN is at a low level. The generation of drive signals SWP and SWN, and the control of driving the MOS transistors Q31 and Q32, etc., are performed by a control circuit (not shown) provided in the switching control unit 33.
　この場合、ＭＯＳトランジスタＱ１および抵抗素子Ｒ１としては、次のような条件を満たすことができるオン抵抗および抵抗値を有するものが用いられる。第１の条件は、ＭＯＳトランジスタＱ１のゲートに対して電圧Ｖｒｅｆが与えられることでオンされる期間におけるインピーダンス素子１１のインピーダンス値が１２０Ω程度になるという条件である。第２の条件は、ＭＯＳトランジスタＱ１のゲートに対して電源電圧ＶＤＤが与えられることでオンされる期間におけるインピーダンス素子１１のインピーダンス値が３０Ω程度になるという条件である。 In this case, as the MOS transistor Q1 and the resistance element R1, those having an on-resistance and a resistance value that can satisfy the following conditions are used. The first condition is that the impedance value of the impedance element 11 during the period when the voltage Vref is applied to the gate of the MOS transistor Q1 is about 120Ω. The second condition is that the impedance value of the impedance element 11 during the period when the power supply voltage VDD is applied to the gate of the MOS transistor Q1 is about 30Ω.
　次に、上記構成の作用について説明する。
　リンギング抑制回路３１では、次のように抑制動作が行われる。すなわち、図１２に示すように、時点ｔ３１以前の期間または時点ｔ３３以降の期間では、ＭＯＳトランジスタＱ３１がオフされるとともにＭＯＳトランジスタＱ３２がオンされるため、ＭＯＳトランジスタＱ１がオフされて抑制動作が行われない。 Next, the operation of the above configuration will be described.
In the ringing suppression circuit 31, the suppression operation is performed as follows. That is, as shown in FIG. 12, in the period before the time point t31 or the period after the time point t33, the MOS transistor Q31 is turned off and the MOS transistor Q32 is turned on, so that the MOS transistor Q1 is turned off and the suppression operation is performed. I can't.
　変化検出部１２により差動信号の信号レベルがレセッシブを表すレベルに変化したことが検出された時点ｔ３１において、ＭＯＳトランジスタＱ３１がオンに転じるとともにＭＯＳトランジスタＱ３２がオフに転じ、これにより抑制部８による抑制動作が開始される。この抑制動作は、時点ｔ３３まで継続される。したがって、この場合、時点ｔ３１～ｔ３３の期間が抑制期間Ｔｃに相当する。そして、抑制動作が開始された時点ｔ３１において、ＭＯＳトランジスタＱ３１のゲート電圧が電源電圧ＶＤＤとなることから線間インピーダンスが１００ｋΩから３０Ωへと変化する。 At the time t31 when the change detection unit 12 detects that the signal level of the differential signal has changed to a level representing the recessive, the MOS transistor Q31 is turned on and the MOS transistor Q32 is turned off, which is caused by the suppression unit 8. The suppression operation is started. This suppression operation is continued until the time point t33. Therefore, in this case, the period from the time points t31 to t33 corresponds to the suppression period Tc. Then, at the time t31 when the suppression operation is started, the gate voltage of the MOS transistor Q31 becomes the power supply voltage VDD, so that the line impedance changes from 100 kΩ to 30 Ω.
　ＭＯＳトランジスタＱ３１がオンされる状態は、時点ｔ３２まで継続される。そのため、時点ｔ３１～ｔ３２の期間では、ＭＯＳトランジスタＱ１のゲート電圧が電源電圧ＶＤＤに維持され、線間インピーダンスが３０Ωで一定となる。時点ｔ３２において、ＭＯＳトランジスタＱ３１がオフに転じる。これにより、ＭＯＳトランジスタＱ１のゲート電圧は、電源電圧ＶＤＤから電圧Ｖｒｅｆに向けて低下する。このときのゲート電圧の低下の傾きは、抵抗Ｒ３１およびコンデンサＣ３１による時定数に応じた傾きとなる。このようにＭＯＳトランジスタＱ１のゲート電圧が所定の傾きで低下することにより、線間インピーダンスは、３０Ωから同様の傾きで上昇し、やがては１２０Ωで一定となる。 The state in which the MOS transistor Q31 is turned on continues until the time point t32. Therefore, during the period from time point t31 to t32, the gate voltage of the MOS transistor Q1 is maintained at the power supply voltage VDD, and the line impedance becomes constant at 30Ω. At time point t32, the MOS transistor Q31 turns off. As a result, the gate voltage of the MOS transistor Q1 drops from the power supply voltage VDD toward the voltage Vref. The slope of the decrease in the gate voltage at this time is the slope according to the time constant due to the resistor R31 and the capacitor C31. As the gate voltage of the MOS transistor Q1 decreases with a predetermined slope in this way, the line impedance rises from 30 Ω with the same slope, and eventually becomes constant at 120 Ω.
　このような抑制動作により、差動信号の信号レベルがハイレベルからロウレベルに変化する立ち下がり期間に発生する波形歪みのエネルギーがインピーダンス素子１１により消費され、リンギングが抑制される。この場合、時点ｔ３３において、ＭＯＳトランジスタＱ３２がオンに転じることで、抑制部８による抑制動作が停止される。そして、抑制動作が停止された時点ｔ３３において、線間インピーダンスが１２０Ωから１００ｋΩへと変化する。 By such a suppression operation, the energy of the waveform distortion generated during the falling period when the signal level of the differential signal changes from the high level to the low level is consumed by the impedance element 11, and ringing is suppressed. In this case, at the time point t33, the MOS transistor Q32 is turned on, so that the suppression operation by the suppression unit 8 is stopped. Then, at the time t33 when the suppression operation is stopped, the line impedance changes from 120Ω to 100kΩ.
　以上説明した本実施形態のリンギング抑制回路３１によれば、第１実施形態のリンギング抑制回路７と同様に、インピーダンス素子１１のインピーダンス値が、抑制動作が実行される抑制期間Ｔｃの開始時点である時点ｔ３１には最も低い３０Ω程度になるとともに終了時点である時点ｔ３３には１２０Ω程度になるように、つまりインピーダンス値が徐々に高くなるように連続的に切り替えられるようになっている。したがって、本実施形態によっても、第１実施形態と同様の効果が得られる。 According to the ringing suppression circuit 31 of the present embodiment described above, the impedance value of the impedance element 11 is the start time of the suppression period Tc in which the suppression operation is executed, as in the ringing suppression circuit 7 of the first embodiment. It is continuously switched so that it becomes the lowest about 30Ω at the time point t31 and about 120Ω at the time point t33 at the end point, that is, the impedance value gradually increases. Therefore, the same effect as that of the first embodiment can be obtained by this embodiment as well.
　　　（第４実施形態）
　以下、第４実施形態について図１３～図１５を参照して説明する。
　図１３に示すように、本実施形態のリンギング抑制回路４１は、第１実施形態のリンギング抑制回路７に対し、抑制部８に代えて抑制部４２を備えている点、動作制御部９に代えて動作制御部４３を備えている点などが異なる。 (Fourth Embodiment)
Hereinafter, the fourth embodiment will be described with reference to FIGS. 13 to 15.
As shown in FIG. 13, the ringing suppression circuit 41 of the present embodiment includes a suppression unit 42 instead of the suppression unit 8 with respect to the ringing suppression circuit 7 of the first embodiment, instead of the operation control unit 9. The difference is that the operation control unit 43 is provided.
　抑制部４２は、スイッチ４４、抵抗素子４５、Ｎチャネル型のＭＯＳトランジスタＱ４１およびＯＰアンプ４６を備えている。スイッチ４４および抵抗素子４５は、直列接続されており、その直列回路は、通信線３Ｐ、３Ｎ間に接続されている。スイッチ４４は、動作制御部４３により制御されるものであり、抑制動作が実行されるときにはオンされるとともに、抑制動作が実行されないときにはオフされる。 The suppression unit 42 includes a switch 44, a resistance element 45, an N-channel type MOS transistor Q41, and an OP amplifier 46. The switch 44 and the resistance element 45 are connected in series, and the series circuit thereof is connected between the communication lines 3P and 3N. The switch 44 is controlled by the operation control unit 43, and is turned on when the suppression operation is executed and turned off when the suppression operation is not executed.
　ＭＯＳトランジスタＱ４１のドレインは通信線３Ｐに接続され、そのソースは通信線３Ｎに接続されている。ＭＯＳトランジスタＱ４１のゲートには、ＯＰアンプ４６の出力電圧Ｖｏｕｔが与えられている。ＯＰアンプ４６は、イネーブル端子を備えており、そのイネーブル端子に入力される信号ＥＮＢに応じて動作状態と非動作状態とに切り替えが可能な構成となっている。 The drain of the MOS transistor Q41 is connected to the communication line 3P, and its source is connected to the communication line 3N. The output voltage Vout of the OP amplifier 46 is given to the gate of the MOS transistor Q41. The OP amplifier 46 is provided with an enable terminal, and has a configuration capable of switching between an operating state and a non-operating state according to the signal ENB input to the enable terminal.
　具体的には、ＯＰアンプ４６は、信号ＥＮＢがハイレベルのときに動作状態となり、信号ＥＮＢがロウレベルのときに非動作状態となる。ＯＰアンプ４６の非反転入力端子は通信線３Ｐに接続され、その反転入力端子は通信線３Ｎに接続されている。つまり、ＯＰアンプ４４には、通信線３Ｐ、３Ｎ間の差動電圧Ｖｄｉｆｆが入力されるようになっている。 Specifically, the OP amplifier 46 goes into an operating state when the signal ENB is at a high level, and goes into a non-operating state when the signal ENB is at a low level. The non-inverting input terminal of the OP amplifier 46 is connected to the communication line 3P, and the inverting input terminal is connected to the communication line 3N. That is, the differential voltage Vdiff between the communication lines 3P and 3N is input to the OP amplifier 44.
　この場合、ＯＰアンプ４６の出力電圧Ｖｏｕｔと差動電圧Ｖｄｉｆｆとの関係、ＭＯＳトランジスタＱ４１のオン抵抗ＲＯＮと差動電圧Ｖｄｉｆｆとの関係は、図１４に示すような特性となっている。すなわち、ＯＰアンプ４６の出力電圧Ｖｏｕｔと差動電圧Ｖｄｉｆｆとは比例の関係となっている。また、オン抵抗ＲＯＮと差動電圧Ｖｄｉｆｆとは反比例の関係となっている。なお、図１４では、ＭＯＳトランジスタＱ４１のゲート閾値電圧を電圧Ｖｔとして示している。 In this case, the relationship between the output voltage Vout of the OP amplifier 46 and the differential voltage Vdiff, and the relationship between the on-resistance RON of the MOS transistor Q41 and the differential voltage Vdiff are as shown in FIG. That is, the output voltage Vout of the OP amplifier 46 and the differential voltage Vdiff are in a proportional relationship. Further, the on-resistance RON and the differential voltage Vdiff have an inversely proportional relationship. In FIG. 14, the gate threshold voltage of the MOS transistor Q41 is shown as a voltage Vt.
　動作制御部４３は、動作制御部９に対し、切替制御部１３に代えて切替制御部４７を備えている点などが異なる。切替制御部４７は、スイッチ４４のオンオフを前述したように制御する。また、切替制御部４７は、信号ＥＮＢを生成する機能を有する。したがって、ＯＰアンプ４６の動作状態は、切替制御部４７により制御される。上記構成では、スイッチ４４がオンされることにより信号線３Ｐ、３Ｎ間に抵抗素子４５が接続され、線間インピーダンスが低下する。また、上記構成では、ＯＰアンプ４６が動作状態になると、差動電圧Ｖｄｉｆｆに応じてＭＯＳトランジスタＱ４１がオン駆動されて線間インピーダンスが低下する。 The operation control unit 43 is different from the operation control unit 9 in that it includes a switching control unit 47 instead of the switching control unit 13. The switching control unit 47 controls the on / off of the switch 44 as described above. Further, the switching control unit 47 has a function of generating a signal ENB. Therefore, the operating state of the OP amplifier 46 is controlled by the switching control unit 47. In the above configuration, when the switch 44 is turned on, the resistance element 45 is connected between the signal lines 3P and 3N, and the line impedance is lowered. Further, in the above configuration, when the OP amplifier 46 is in the operating state, the MOS transistor Q41 is driven on according to the differential voltage Vdiff, and the line impedance is lowered.
　このようなことから、本実施形態では、抵抗素子４５およびＭＯＳトランジスタＱ４１のオン抵抗がインピーダンス素子４８として機能する。本実施形態では、抵抗素子４５の抵抗値は１２０Ω程度となっている。また、本実施形態では、ＭＯＳトランジスタＱ４１は、いわゆるフルオンの状態において、抵抗素子４５とＭＯＳトランジスタＱ４１のオン抵抗との並列合成抵抗値が３０Ω程度となるような特性となっている。言い換えると、ＭＯＳトランジスタＱ４１は、そのオン抵抗の最小値が例えば４Ω程度となるものが用いられる。 For this reason, in the present embodiment, the on-resistance of the resistance element 45 and the MOS transistor Q41 functions as the impedance element 48. In this embodiment, the resistance value of the resistance element 45 is about 120Ω. Further, in the present embodiment, the MOS transistor Q41 has a characteristic that the parallel combined resistance value of the resistance element 45 and the on-resistance of the MOS transistor Q41 is about 30Ω in the so-called full-on state. In other words, the MOS transistor Q41 is used in which the minimum value of its on-resistance is, for example, about 4Ω.
　次に、上記構成の作用について説明する。
　リンギング抑制回路４１では、次のように抑制動作が行われる。すなわち、図１５に示すように、変化検出部１２により差動信号の信号レベルがレセッシブを表すレベルに変化したことが検出された時点ｔ４１において、切替制御部４７は、スイッチ４４をオンするとともにＯＰアンプ４６を動作状態に切り替え、これにより抑制部４２による抑制動作が開始される。そして、抑制動作が開始された時点ｔ４１において、線間インピーダンスが１００ｋΩから３０Ωへと変化する。 Next, the operation of the above configuration will be described.
In the ringing suppression circuit 41, the suppression operation is performed as follows. That is, as shown in FIG. 15, at the time t41 when the change detection unit 12 detects that the signal level of the differential signal has changed to a level representing the recessive, the switching control unit 47 turns on the switch 44 and OPs. The amplifier 46 is switched to the operating state, and the suppression operation by the suppression unit 42 is started by this. Then, at the time t41 when the suppression operation is started, the line impedance changes from 100 kΩ to 30 Ω.
　切替制御部４７は、スイッチ４４をオンさせた状態を時点ｔ４３まで継続する。この場合、時点ｔ４１～ｔ４３の期間Ｔｃが、抑制動作が行われる抑制期間に相当する。切替制御部４７は、抑制期間Ｔｃの開始時点である時点ｔ４１を含む前半の期間、つまり時点ｔ４１～ｔ４２の期間である第１期間Ｔ１では、ＯＰアンプ４６を動作状態に維持する。これにより、抑制期間Ｔｃの前半の期間である第１期間Ｔ１では、線間インピーダンスが３０Ωから１２０Ωの間で変化する。 The switching control unit 47 continues the state in which the switch 44 is turned on until the time point t43. In this case, the period Tc from the time point t41 to t43 corresponds to the suppression period in which the suppression operation is performed. The switching control unit 47 maintains the OP amplifier 46 in the operating state in the first half period including the time point t41, which is the start time of the suppression period Tc, that is, in the first period T1 which is the period from the time points t41 to t42. As a result, in the first period T1, which is the first half of the suppression period Tc, the line impedance changes between 30Ω and 120Ω.
　具体的には、第１期間Ｔ１では、差動電圧Ｖｄｉｆｆが高くなるほどＭＯＳトランジスタＱ４１のオン抵抗ＲＯＮが低下することから、差動電圧Ｖｄｉｆｆが高いとき、つまりリンギングが大きいときほど、線間インピーダンスが低下する。なお、図１５では、第１期間Ｔ１における線間インピーダンスは３０Ωから１２０Ωへと所定の傾きで変化するようになっている。これは、ＯＰアンプ４６の応答性などに起因して、ＭＯＳトランジスタＱ４１のオン抵抗ＲＯＮの変化がリンギングに応じた差動電圧Ｖｄｉｆｆの変化に追従していないためである。 Specifically, in the first period T1, the higher the differential voltage Vdiff, the lower the on-resistance RON of the MOS transistor Q41. Therefore, the higher the differential voltage Vdiff, that is, the larger the ringing, the higher the line impedance. descend. In FIG. 15, the line impedance in the first period T1 changes from 30 Ω to 120 Ω with a predetermined inclination. This is because the change in the on-resistance RON of the MOS transistor Q41 does not follow the change in the differential voltage Vdiff according to the ringing due to the responsiveness of the OP amplifier 46 and the like.
　切替制御部４７は、時点ｔ４２において、ＯＰアンプ４６を非動作状態に切り替える。これにより、時点ｔ４２において、線間インピーダンスが１２０Ωとなる。切替制御部４７は、抑制期間Ｔｃの後半の期間、つまり時点ｔ４２～ｔ４３の期間である第２期間Ｔ２では、ＯＰアンプ４６を非動作状態に切り替えるとともにスイッチ４４をオンさせた状態を維持する。これにより、抑制期間Ｔｃの後半の期間である第２期間Ｔ２では、線間インピーダンスが１２０Ωで一定とされる。 The switching control unit 47 switches the OP amplifier 46 to the non-operating state at the time point t42. As a result, at the time point t42, the line impedance becomes 120Ω. The switching control unit 47 switches the OP amplifier 46 to the non-operating state and maintains the switch 44 on during the latter half of the suppression period Tc, that is, the second period T2 which is the period from the time points t42 to t43. As a result, in the second period T2, which is the latter half of the suppression period Tc, the line impedance is kept constant at 120Ω.
　このような抑制動作により、差動信号の信号レベルがハイレベルからロウレベルに変化する立ち下がり期間に発生する波形歪みのエネルギーがインピーダンス素子４８により消費され、リンギングが抑制される。切替制御部４７は、時点ｔ４３において、スイッチ４４をオフさせ、これにより抑制部４２による抑制動作が停止される。そして、抑制動作が停止された時点ｔ４３において、線間インピーダンスが１２０Ωから１００ｋΩへと変化する。 By such a suppression operation, the energy of the waveform distortion generated during the falling period when the signal level of the differential signal changes from the high level to the low level is consumed by the impedance element 48, and ringing is suppressed. The switching control unit 47 turns off the switch 44 at the time point t43, whereby the suppression operation by the suppression unit 42 is stopped. Then, at the time t43 when the suppression operation is stopped, the line impedance changes from 120Ω to 100kΩ.
　以上説明した本実施形態のリンギング抑制回路４１によれば、第１実施形態のリンギング抑制回路７と同様に、インピーダンス素子４８のインピーダンス値が、抑制動作が実行される抑制期間Ｔｃの開始時点ｔ４１には最も低い３０Ω程度になるとともに終了時点ｔ４３には１２０Ω程度になるように、つまりインピーダンス値が徐々に高くなるように連続的に切り替えられるようになっている。したがって、本実施形態によっても、第１実施形態と同様の効果が得られる。 According to the ringing suppression circuit 41 of the present embodiment described above, the impedance value of the impedance element 48 is set to t41 at the start of the suppression period Tc in which the suppression operation is executed, as in the ringing suppression circuit 7 of the first embodiment. Is continuously switched so as to be about 30Ω, which is the lowest, and about 120Ω at the end point t43, that is, so that the impedance value gradually increases. Therefore, the same effect as that of the first embodiment can be obtained by this embodiment as well.
　さらに、本実施形態のリンギング抑制回路４１は、差動電圧Ｖｄｉｆｆが高くなるほど通信線３Ｐ、３Ｎ間を短絡するＭＯＳトランジスタＱ４１のオン抵抗が低くなる、つまり線間インピーダンスが低下する構成となっている。そのため、本実施形態のリンギング抑制回路４１によれば、例えば差動信号のレベルがレセッシブに変化した直後など、リンギングが激しくなるときには、線間インピーダンスをより低くすることによって効果的に抑制することができる。 Further, the ringing suppression circuit 41 of the present embodiment has a configuration in which the on-resistance of the MOS transistor Q41 short-circuiting between the communication lines 3P and 3N decreases as the differential voltage Vdiff increases, that is, the line impedance decreases. .. Therefore, according to the ringing suppression circuit 41 of the present embodiment, when the ringing becomes severe, for example, immediately after the level of the differential signal changes to recessive, the line impedance can be effectively suppressed by lowering the line impedance. it can.
　　　（第５実施形態）
　以下、第５実施形態について図１６および図１７を参照して説明する。
　図１６に示すように、本実施形態のトランシーバ５１が備えるリンギング抑制回路５２は、第１実施形態のリンギング抑制回路７に対し、動作制御部９に代えて動作制御部５３を備えている点などが異なる。動作制御部５３は、動作制御部９に対し、判断部５４が追加されている点、切替制御部１３に代えて切替制御部５５を備えている点などが異なる。 (Fifth Embodiment)
Hereinafter, the fifth embodiment will be described with reference to FIGS. 16 and 17.
As shown in FIG. 16, the ringing suppression circuit 52 included in the transceiver 51 of the present embodiment includes an operation control unit 53 instead of the operation control unit 9 with respect to the ringing suppression circuit 7 of the first embodiment. Is different. The operation control unit 53 is different from the operation control unit 9 in that a determination unit 54 is added and a switching control unit 55 is provided in place of the switching control unit 13.
　判断部５４は、自ノード２が送信動作を実行しているか否かを判断する。具体的には、判断部５４は、このトランシーバ５１が設けられるノード２の通信回路６から与えられる信号Ｓｄに基づいて、その通信回路６が送信動作を実行しているか否かを判断する。なお、信号Ｓｄは、送信データＴＸＤをモニタするなどして生成することができる。判断部５４は、このような判断の結果を表す信号Ｓｅを切替制御部５５に与える。 The determination unit 54 determines whether or not the own node 2 is executing the transmission operation. Specifically, the determination unit 54 determines whether or not the communication circuit 6 is executing the transmission operation based on the signal Sd given from the communication circuit 6 of the node 2 in which the transceiver 51 is provided. The signal Sd can be generated by monitoring the transmission data TXD or the like. The determination unit 54 gives a signal Se representing the result of such determination to the switching control unit 55.
　切替制御部５５は、切替制御部１３と同様にインピーダンス素子１１のインピーダンス値を切り替えることができる。また、切替制御部５５は、インピーダンス素子１１のインピーダンス値を一定の値（例えば１２０Ω程度）に固定することができる。切替制御部５５は、判断部５４により自ノード２が送信動作を実行していると判断される場合、インピーダンス素子１１のインピーダンス値を切替制御部１３と同様に切り替える。 The switching control unit 55 can switch the impedance value of the impedance element 11 in the same manner as the switching control unit 13. Further, the switching control unit 55 can fix the impedance value of the impedance element 11 to a constant value (for example, about 120Ω). When the determination unit 54 determines that the own node 2 is executing the transmission operation, the switching control unit 55 switches the impedance value of the impedance element 11 in the same manner as the switching control unit 13.
　具体的には、切替制御部５５は、判断部５４により自ノード２が送信動作を実行していると判断される場合、インピーダンス素子１１のインピーダンス値を、抑制期間の開始時点を含む第１期間では第１設定値（例えば３０Ω程度）になるとともに、第１期間より後の第２期間では第２設定値（例えば１２０Ω程度）になるように切り替える。また、切替制御部５５は、判断部５４により自ノード２が送信動作を実行していないと判断される場合、インピーダンス素子１１のインピーダンス値を、抑制期間を通じて上記した第２設定値に固定する。 Specifically, when the determination unit 54 determines that the own node 2 is executing the transmission operation, the switching control unit 55 sets the impedance value of the impedance element 11 to the first period including the start time of the suppression period. Then, it is switched so that it becomes the first set value (for example, about 30 Ω) and becomes the second set value (for example, about 120 Ω) in the second period after the first period. Further, when the determination unit 54 determines that the own node 2 is not executing the transmission operation, the switching control unit 55 fixes the impedance value of the impedance element 11 to the above-mentioned second set value throughout the suppression period.
　以上説明した本実施形態によれば、次のような効果が得られる。
　図１７に示すように、自ノード２が送信動作を実行しているときには、自ノード２が送信動作をしていないとき、つまり他のノード２が送信動作を実行しているときに比べ、リンギングが大きくなる傾向がある。そこで、本実施形態では、自ノード２が送信動作を実行している自ノード送信時には、第１実施形態などと同様の抑制動作を実行して比較的大きくなるリンギングを効果的に抑制する。 According to the present embodiment described above, the following effects can be obtained.
As shown in FIG. 17, when the own node 2 is executing the transmission operation, ringing is compared with the case where the own node 2 is not performing the transmission operation, that is, when the other node 2 is executing the transmission operation. Tends to increase. Therefore, in the present embodiment, when the own node 2 is executing the transmission operation, the same suppression operation as in the first embodiment is executed to effectively suppress the ringing that becomes relatively large.
　また、本実施形態では、他のノード２が送信動作を実行している他ノード送信時には、抑制期間を通じて線間インピーダンスを１２０Ωとする第２比較例と同様の抑制動作を実行して比較的小さくなるリンギングを効果的に抑制する。このように、本実施形態によれば、発生するリンギングの大きさに応じて抑制動作が適切に切り替えられるため、そのリンギングをより効果的に抑制することができる。 Further, in the present embodiment, when transmitting to another node in which the other node 2 is executing the transmission operation, the suppression operation similar to that in the second comparative example in which the line impedance is 120Ω throughout the suppression period is executed to be relatively small. Effectively suppresses ringing. As described above, according to the present embodiment, since the suppression operation is appropriately switched according to the magnitude of the ringing that occurs, the ringing can be suppressed more effectively.
　　　（その他の実施形態）
　なお、本開示は上記し且つ図面に記載した各実施形態に限定されるものではなく、その要旨を逸脱しない範囲で任意に変形、組み合わせ、あるいは拡張することができる。
　上記各実施形態で示した数値などは例示であり、それに限定されるものではない。
　通信プロトコルはＣＡＮに限ることなく、一対の通信線を介して差動信号を伝送する通信プロトコルであれば適用が可能である。 (Other embodiments)
It should be noted that the present disclosure is not limited to each of the embodiments described above and in the drawings, and can be arbitrarily modified, combined, or extended without departing from the gist thereof.
The numerical values and the like shown in each of the above embodiments are examples, and are not limited thereto.
The communication protocol is not limited to CAN, and any communication protocol that transmits a differential signal via a pair of communication lines can be applied.
　抑制部としては、上記各実施形態にて例示したものに限らず、一対の通信線間にインピーダンス素子を接続することにより差動信号の伝送に伴い発生するリンギングを抑制する抑制動作を行うことができる構成であればよく、その具体的な構成は適宜変更することができる。 The suppression unit is not limited to the one illustrated in each of the above embodiments, and by connecting an impedance element between a pair of communication lines, a suppression operation that suppresses ringing that occurs due to transmission of a differential signal can be performed. Any configuration can be used, and the specific configuration can be changed as appropriate.
　本開示は、実施例に準拠して記述されたが、本開示は当該実施例や構造に限定されるものではないと理解される。本開示は、様々な変形例や均等範囲内の変形をも包含する。加えて、様々な組み合わせや形態、さらには、それらに一要素のみ、それ以上、あるいはそれ以下、を含む他の組み合わせや形態をも、本開示の範疇や思想範囲に入るものである。 Although this disclosure has been described in accordance with the examples, it is understood that the disclosure is not limited to the examples and structures. The present disclosure also includes various modifications and modifications within an equal range. In addition, various combinations and forms, as well as other combinations and forms that include only one element, more, or less, are also within the scope of the present disclosure.

Claims (6)

  1. 　一対の通信線（３Ｐ、３Ｎ）を介して差動信号を伝送することで他のノードとの通信を行う通信回路（６）を備えたノード（２）に設けられたリンギング抑制回路であって、
    　前記一対の通信線間にインピーダンス素子（１１、２９、４８）を接続することにより前記差動信号の伝送に伴い発生するリンギングを抑制する抑制動作を行うことができる抑制部（８、２２、４２）と、
    　前記抑制部の動作を制御するもので、前記差動信号の信号レベルがレセッシブに変化したことを検出すると前記抑制部による抑制動作を開始する動作制御部（９、２３、３２、４３、５３）と、
    　を備え、
    　前記動作制御部は、
    　前記インピーダンス素子のインピーダンス値を、前記抑制動作が実行される抑制期間のうち抑制動作の開始時点を含む第１期間では第１設定値になるとともに前記第１期間より後の第２期間では前記第１設定値より高い第２設定値になるように切り替えるリンギング抑制回路。     A ringing suppression circuit provided in a node (2) provided with a communication circuit (6) that communicates with another node by transmitting a differential signal via a pair of communication lines (3P, 3N). ,
    By connecting an impedance element (11, 29, 48) between the pair of communication lines, a suppression unit (8, 22, 42) capable of suppressing ringing generated by transmission of the differential signal can be performed. )When,
    An operation control unit (9, 23, 32, 43, 53) that controls the operation of the suppression unit and starts a suppression operation by the suppression unit when it detects that the signal level of the differential signal has changed recessively. When,
    With
    The motion control unit
    The impedance value of the impedance element is set to the first set value in the first period including the start time of the suppression operation in the suppression period in which the suppression operation is executed, and the second period after the first period is the first. A ringing suppression circuit that switches so that the second set value is higher than the first set value.
  2. 　前記動作制御部（５３）は、
    　自ノードが送信動作を実行しているか否かを判断する判断部（５４）を備え、
    　前記判断部により自ノードが送信動作を実行していると判断される場合、前記インピーダンス素子のインピーダンス値を、前記第１期間では前記第１設定値になるとともに前記第２期間では前記第２設定値になるように切り替え、
    　前記判断部により自ノードが送信動作を実行していないと判断される場合、前記インピーダンス素子のインピーダンス値を、前記抑制動作が実行される抑制期間を通じて前記第２設定値とする請求項１に記載のリンギング抑制回路。     The motion control unit (53)
    It is equipped with a determination unit (54) that determines whether or not the local node is executing the transmission operation.
    When it is determined by the determination unit that the own node is executing the transmission operation, the impedance value of the impedance element is set to the first set value in the first period and the second setting in the second period. Switch to the value,
    The first aspect of the present invention, wherein when the determination unit determines that the own node is not executing the transmission operation, the impedance value of the impedance element is set to the second set value throughout the suppression period in which the suppression operation is executed. Ringing suppression circuit.
  3. 　前記動作制御部（９、３２）は、前記インピーダンス素子（１１、４８）のインピーダンス値を連続的に切り替えるようになっている請求項１または２に記載のリンギング抑制回路。 The ringing suppression circuit according to claim 1 or 2, wherein the operation control unit (9, 32) continuously switches the impedance value of the impedance element (11, 48).
  4. 　前記動作制御部（２３）は、前記インピーダンス素子（２９）のインピーダンス値を段階的に切り替えるようになっている請求項１または２に記載のリンギング抑制回路。 The ringing suppression circuit according to claim 1 or 2, wherein the operation control unit (23) switches the impedance value of the impedance element (29) stepwise.
  5. 　前記抑制部（８、４２）は、前記一対の通信線間に接続されたＭＯＳトランジスタ（Ｑ１、Ｑ４１）を備え、
    　前記インピーダンス素子は、前記ＭＯＳトランジスタのオン抵抗を含み、
    　前記抑制部は、前記ＭＯＳトランジスタをオン駆動することにより前記抑制動作を行うようになっており、
    　前記動作制御部は、前記ＭＯＳトランジスタのゲート電圧を制御することにより前記インピーダンス値を切り替えるようになっている請求項３に記載のリンギング抑制回路。     The suppression unit (8, 42) includes MOS transistors (Q1, Q41) connected between the pair of communication lines.
    The impedance element includes the on-resistance of the MOS transistor.
    The suppression unit performs the suppression operation by driving the MOS transistor on.
    The ringing suppression circuit according to claim 3, wherein the operation control unit switches the impedance value by controlling the gate voltage of the MOS transistor.
  6. 　前記抑制部（２２）は、前記一対の通信線間に接続された抵抗素子（２６、２７）およびスイッチ（２４、２５）の直列回路を複数備え、
    　前記インピーダンス素子は、前記抵抗素子を含み、
    　前記抑制部は、複数の前記スイッチをオンすることにより前記抑制動作を開始するようになっており、
    　前記動作制御部（２３）は、前記抑制部によりオンされた複数の前記スイッチを段階的にオフすることにより前記インピーダンス値を段階的に切り替えるようになっている請求項４に記載のリンギング抑制回路。     The suppression unit (22) includes a plurality of series circuits of a resistance element (26, 27) and a switch (24, 25) connected between the pair of communication lines.
    The impedance element includes the resistance element.
    The suppression unit starts the suppression operation by turning on a plurality of the switches.
    The ringing suppression circuit according to claim 4, wherein the operation control unit (23) switches the impedance value stepwise by turning off a plurality of the switches turned on by the suppression section stepwise. ..
PCT/JP2020/031113 2019-08-26 2020-08-18 Ringing suppression circuit WO2021039498A1 (en)

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Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2000353945A (en) * 1999-04-08 2000-12-19 Mitsubishi Electric Corp Digital signal output circuit
JP2009296568A (en) * 2008-05-08 2009-12-17 Nippon Soken Inc Signal transmission circuit
JP2012257205A (en) * 2011-05-16 2012-12-27 Nippon Soken Inc Ringing suppression circuit
JP2016034080A (en) * 2014-07-31 2016-03-10 株式会社日本自動車部品総合研究所 Signal transmission circuit
JP2016123054A (en) * 2014-12-25 2016-07-07 国立大学法人京都工芸繊維大学 Communication system, communication device and communication method

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2000353945A (en) * 1999-04-08 2000-12-19 Mitsubishi Electric Corp Digital signal output circuit
JP2009296568A (en) * 2008-05-08 2009-12-17 Nippon Soken Inc Signal transmission circuit
JP2012257205A (en) * 2011-05-16 2012-12-27 Nippon Soken Inc Ringing suppression circuit
JP2016034080A (en) * 2014-07-31 2016-03-10 株式会社日本自動車部品総合研究所 Signal transmission circuit
JP2016123054A (en) * 2014-12-25 2016-07-07 国立大学法人京都工芸繊維大学 Communication system, communication device and communication method

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