WO2021022441A1 - Procédé et dispositif de transmission de données, dispositif électronique et support d'enregistrement lisible - Google Patents

Procédé et dispositif de transmission de données, dispositif électronique et support d'enregistrement lisible Download PDF

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Publication number
WO2021022441A1
WO2021022441A1 PCT/CN2019/099262 CN2019099262W WO2021022441A1 WO 2021022441 A1 WO2021022441 A1 WO 2021022441A1 CN 2019099262 W CN2019099262 W CN 2019099262W WO 2021022441 A1 WO2021022441 A1 WO 2021022441A1
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Prior art keywords
data
transmission
network
address
transmitted
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PCT/CN2019/099262
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English (en)
Chinese (zh)
Inventor
何雷骏
董镇江
屠嘉晋
李震桁
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华为技术有限公司
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Priority to CN201980098672.1A priority Critical patent/CN114144793A/zh
Priority to PCT/CN2019/099262 priority patent/WO2021022441A1/fr
Publication of WO2021022441A1 publication Critical patent/WO2021022441A1/fr

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    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06N—COMPUTING ARRANGEMENTS BASED ON SPECIFIC COMPUTATIONAL MODELS
    • G06N3/00—Computing arrangements based on biological models
    • G06N3/02—Neural networks
    • G06N3/04—Architecture, e.g. interconnection topology

Definitions

  • the embodiments of the present application relate to computer technology, and in particular, to a data transmission method, device, electronic device, and readable storage medium.
  • data may have the characteristics of sparseness.
  • a neural network involving data calculation and processing as an example.
  • a neural network generally has a sparse ratio in its feature maps and parameters. Among them, the feature map may have a sparse ratio of 20% to 80%, and the parameter may have a sparse ratio of 50% to 90%. The higher the sparsity ratio, the more zero-value data in the data, and these zero-value data do not contribute to the final calculation result. Therefore, the transmission and calculation of these zero-valued data are invalid operations.
  • data can be stored in a storage medium. When data calculation processing is required, the data needs to be transmitted from the storage medium to the calculation module of the processor for calculation processing.
  • the zero-value data needs to be transferred from the storage medium to the calculation module, and the calculation module needs to perform calculation processing on the zero-value data, which will cause a lot of Transmission overhead and computational overhead.
  • the embodiments of the present application provide a data transmission method, device, electronic device, and readable storage medium, which are used to reduce the data transmission overhead and calculation overhead of the electronic device.
  • an embodiment of the present application provides a data transmission method.
  • the method at least one piece of data to be transmitted is first obtained from a storage unit.
  • the storage unit is provided with N source addresses, and the data to be transmitted is stored dispersedly in the storage unit.
  • the N source addresses furthermore, based on the first preset relationship between the source address and the target address, the first transmission subnet is used to store the waiting addresses from the first source address to the N/2th source address.
  • the transmission data is transmitted to the corresponding destination address.
  • the first preset relationship includes: when the source address is K, the corresponding target address is one of 0 to K starting from 0.
  • the above-mentioned first transmission sub-network includes multiple layers, each layer includes at least one switching node, and there is no switching node from the 2 ⁇ (Y-1)+1 position to the 2 ⁇ Y position of layer Y, Moreover, when there is at least one switching node from the first position to the 2 ⁇ Yth position in the layer Y, each switching node in the at least one switching node does not include an uplink connection line.
  • a transmission network for transmitting data between the source address and the target address is proposed.
  • the first transmission sub-network of the transmission network There is no switching node from the 2 ⁇ (Y–1)+1 position to the 2 ⁇ Y position of layer Y, and there is at least one from the first position to the 2 ⁇ Y position in layer Y
  • each of the at least one switching node does not include an uplink connection line, and when data is transmitted through the transmission network, collisions will not occur.
  • the transmission network has significantly reduced the number of switching nodes and the complexity of the transmission network. Therefore, the transmission network has the advantages of fast transmission speed and less transmission resource occupation.
  • the above method further includes:
  • the second transmission subnet is used to transfer the data to be transmitted stored in the N/2+1th source address to the Nth source address to the corresponding target address.
  • the second preset relationship includes: when the source address is L, the corresponding target address is one of M-1 to M-1-[L%(N/2)] starting from M-1, M Is the number of target addresses, M is less than N.
  • the second transmission sub-network includes multiple layers, each layer includes at least one switching node, there is no switching node from the 2 ⁇ (S-1)+1 position to the 2 ⁇ S position of layer S, and When there is at least one switching node from the first position to the 2 ⁇ S position in the layer S, each switching node in the at least one switching node does not include an uplink connection line.
  • a transmission network for transmitting data between the source address and the target address is proposed.
  • the layer There is no exchange node from the 2 ⁇ (S-1)+1 position to the 2 ⁇ S position of S, and there is at least one exchange from the first position to the 2 ⁇ S position in the layer S
  • each of the at least one switching node does not include an uplink connection line.
  • the transmission network has significantly reduced the number of switching nodes and the complexity of the transmission network. Therefore, the transmission network has the advantages of fast transmission speed and less transmission resource occupation.
  • the number of layers of the first transmission sub-network is log 2 (N)+1, and/or the number of layers of the second transmission sub-network is log 2 (N)+1.
  • the storage when using the first transmission subnet to transmit the data to be transmitted stored in the first source address to the N/2th source address to the corresponding destination address, the storage may be obtained first The destination address corresponding to the data transmission to be transmitted from the first source address to the N/2th source address.
  • the destination address is represented by a binary value, and then, starting from the LSB of the destination address, according to each bit in the destination address The value of determines the transmission path of the data to be transmitted in the first transmission sub-network, and the data to be transmitted is transmitted to the target address through the transmission path in the first transmission sub-network.
  • the second transmission sub-network when using the second transmission sub-network to transmit the data to be transmitted stored in the N/2+1th source address to the Nth source address to the corresponding destination address, you can first Obtain the target address corresponding to the data to be transmitted stored in the N/2+1th source address to the Nth source address.
  • the target address is represented by a binary value, and then, starting from the LSB of the target address, according to each target address The value on the bit determines the transmission path of the data to be transmitted in the second transmission sub-network, and the data to be transmitted is transmitted to the target address through the transmission path in the second transmission sub-network.
  • the transmission network is used to route the data to be transmitted to the target address according to the LSB, which can further increase the data transmission speed.
  • the aforementioned target address is an address in a calculation module, and the calculation module includes at least M addresses.
  • the first transmission subnet is used, and the storage is stored in the first source address to the N/2th source address Before the data to be transmitted is transmitted to the corresponding target address, it can be first judged whether the number of data to be transmitted is greater than M. If the number of data to be transmitted is greater than M, then at least one data to be transmitted is divided into multiple groups of sub-data, each group of sub-data Transfer under a transfer clock.
  • the data to be transmitted is divided into multiple groups of sub-data, and each group of sub-data is transmitted under different clocks, thereby avoiding conflicts in data transmission and calculations , To ensure the correctness of data transmission and calculation.
  • N 8 and M is 4.
  • an embodiment of the present application provides a data transmission device, which includes a storage unit, a target module, a transmission network, and a control module.
  • N source addresses are set in the storage unit, and multiple target addresses are set in the target module.
  • the transmission network is respectively connected with the storage unit and the target module.
  • the transmission network includes a first transmission sub-network, the first transmission sub-network includes a plurality of layers, each layer includes at least one switching node, the 2 ⁇ (Y-1)+1 position to the 2 ⁇ Yth position of layer Y There is no switching node in the position, and when there is at least one switching node in the first position to the 2 ⁇ Yth position in layer Y, each switching node in the at least one switching node does not include an uplink connection line .
  • the control module is used to obtain at least one piece of data to be transmitted from the storage unit, the data to be transmitted is stored in the above N source addresses, and based on the first preset relationship between the source address and the target address, using the first
  • the transmission sub-network transmits the data to be transmitted stored in the first source address to the N/2th source address to the corresponding destination address, where the first preset relationship includes: when the source address is K, the corresponding The target address is one from 0 to K starting from 0.
  • the transmission network further includes a second transmission sub-network.
  • the second transmission sub-network includes multiple layers, and each layer includes at least one switching node. There is no switching node from the 2 ⁇ (S-1)+1 position to the 2 ⁇ S position of layer S, and when When there is at least one switching node from the first position to the 2 ⁇ S position in the layer S, each of the at least one switching node does not include an uplink connection line.
  • the control module is also configured to use the second transmission sub-network based on the second preset relationship between the source address and the target address to store the data to be transmitted from the N/2+1th source address to the Nth source address To the corresponding destination address, where the second preset relationship includes: when the source address is L, the corresponding destination address is M-1 to M-1-[L%(N/2 )], M is the number of target addresses, M is less than N.
  • the number of layers of the first transmission sub-network is log 2 (N)+1, and/or the number of layers of the second transmission sub-network is log 2 (N)+1.
  • control module is specifically used for:
  • control module is specifically used for:
  • the target address corresponding to the data to be transmitted stored in the N/2+1th source address to the Nth source address
  • the target address is represented by a binary value; and, starting from the LSB of the target address, according to each target address
  • the value on the bit determines the transmission path of the data to be transmitted in the second transmission sub-network, and the data to be transmitted is transmitted to the target address through the transmission path in the second transmission sub-network.
  • the target module is a calculation module, and the calculation module includes at least M addresses.
  • control module is also used to:
  • At least one data to be transmitted is divided into multiple groups of sub-data, and each group of sub-data is transmitted under one transmission clock.
  • N 8 and M is 4.
  • an embodiment of the present application provides an electronic device, including: a memory and a processor.
  • the processor is configured to be coupled with the memory, read and execute instructions in the memory, so as to implement the method steps described in the first aspect.
  • an embodiment of the present application provides a computer program product, characterized in that the computer program product includes computer program code, and when the computer program code is executed by a computer, the computer is caused to execute the above-mentioned first aspect. The method described.
  • an embodiment of the present application provides a computer-readable storage medium, wherein the computer storage medium stores computer instructions, and when the computer instructions are executed by a computer, the computer executes the first aspect described above. Instructions for the described method.
  • an embodiment of the present application provides a chip, which is connected to a memory, and is used to read and execute a software program stored in the memory to implement the method provided in the first aspect.
  • Figure 1 is an example diagram of the process of convolution operation on a section of parameter (weight) and a section of feature map (feather map) in a certain neural network;
  • FIG. 2 is a schematic flowchart of a data transmission method provided by an embodiment of the application.
  • Figure 3 is a schematic diagram of the structure of a traditional butterfly network
  • Figure 4 is a schematic diagram of the structure of the reverse butterfly network
  • Figure 5(a) shows the evolution of the first half of the sub-network
  • Figure 5(b) is the structure diagram of the transmission network after the evolution
  • Figure 6(a) shows the evolution of the second half of the sub-network
  • Figure 6(b) is the network structure diagram after the evolution
  • Figure 7 is a schematic diagram of a network structure obtained by simultaneously using the two-part sub-network evolution method shown in the previous section;
  • FIG. 8 is a schematic flowchart of a data transmission method provided by an embodiment of the application.
  • FIG. 9 is a module structure diagram of a data transmission device provided by an embodiment of the application.
  • FIG. 10 is a schematic structural diagram of an electronic device provided by an embodiment of the application.
  • Figure 1 is an example diagram of the process of performing convolution operations on a section of parameter (weight) and a section of feature map (feather map) in a certain neural network.
  • the neural network includes a section of parameters and a section of feature map.
  • This segment of parameter is composed of multiple data, and some of the multiple data are 0.
  • This piece of feature map is composed of multiple data, and some of the multiple data are zero.
  • data is first stored in a storage medium before the calculation, and further, when performing arithmetic processing, it needs to be sent to a calculation module for calculation. After the calculation module performs calculation processing, it may also need to send the calculation result to the next calculation module, and so on.
  • the address where the data before the operation is stored is called the source address
  • the address of the data in the calculation module during the operation processing is called the target address. Data needs to be transferred from the source address to the destination address and processed.
  • the source address may refer to an address in a storage medium, such as an address in a storage medium such as static RAM (SRAM) and dynamic RAM (DRAM), etc.
  • the source address may also refer to the address in the calculation module.
  • the target address can refer to the address in the calculation module.
  • data refers to data that can be used for calculations such as half-precision floating-point numbers, full-precision floating-point numbers, integers, etc.
  • data can be expressed in decimal or binary.
  • the implementation of this application The example does not specifically limit the specific representation of data. Taking the parameter shown in Figure 1 as an example, a segment of parameter is composed of 8 data of 0, 0, 1, 0, 0, 0, 0, -1, and each data is an integer and expressed in decimal.
  • a section of parameter and a section of characteristic diagram can be respectively referred to as a data sequence.
  • the data sequence is uniformly transmitted from the source address to the target address. Specifically, one piece of data in the data sequence is stored in one source address, one source address corresponds to one target address, and the data in each source address is respectively transmitted to the corresponding target address.
  • the valid data in the data sequence is first filtered out before the data sequence is transmitted from the source address to the target address.
  • the valid data can refer to the data in the data sequence that contributes to the operation result.
  • the valid data is transmitted through the transmission network between the source module where the source address is located and the target module where the target address is located.
  • the source module includes multiple addresses
  • the target module also includes multiple addresses. The data saved in each address of the source module is transmitted to each address of the target module through the transmission network between the source module and the target module.
  • the source module is SRAM
  • the target module is a certain calculation module A
  • the data stored in the 8 addresses in SRAM can be passed
  • the transmission network between SRAM and calculation module A is transmitted to the 4 addresses of calculation module A.
  • the transmission overhead and calculation overhead of sparse data can be greatly reduced.
  • the following embodiments of the present application aim to provide a data transmission method based on a transmission network with fast transmission speed and less transmission resource occupancy, so that when data with sparseness is transmitted based on the network, transmission overhead and calculation overhead can be greatly reduced.
  • the method can be applied to any electronic device including a storage medium and a computing module.
  • the electronic device may be a communication device such as a terminal device and a network device, or the electronic device may also be a server or the like.
  • the terminal device may also be called a terminal, user equipment (UE), mobile station (MS), mobile terminal (MT), and so on.
  • the terminal device can be a mobile phone (mobile phone), a tablet computer (pad), a computer with wireless transceiver function, virtual reality (VR) terminal equipment, augmented reality (AR) terminal equipment, industrial control (industrial control) Control), wireless terminals in self-driving (self-driving), wireless terminals in remote medical surgery, wireless terminals in smart grid (smart grid), transportation safety (transportation safety) Wireless terminal, wireless terminal in smart city, wireless terminal in smart home, etc.
  • the network device may be a base station, for example, it may be a base station in the global system for mobile communication (GSM) or code division multiple access (CDMA).
  • Transceiver station, BTS can also be a base station (NodeB) in wideband code division multiple access (WCDMA), or an evolved base station (eNB or e-NodeB, evolutional Node B) in LTE , Or gNB in NR, etc.
  • NodeB base station
  • WCDMA wideband code division multiple access
  • eNB or e-NodeB, evolutional Node B evolutional Node B
  • the base station can also be a wireless controller in a cloud radio access network (cloud radio access network, CRAN) scenario, or can be a relay station, access point, in-vehicle equipment, wearable equipment, and network equipment in 5G networks or future evolution Network equipment in the PLMN network, etc.
  • cloud radio access network cloud radio access network, CRAN
  • CRAN cloud radio access network
  • FIG. 2 is a schematic flowchart of a data transmission method provided by an embodiment of the application. As shown in FIG. 2, the method may include:
  • the above at least one data to be transmitted may be data in a data sequence
  • the data sequence may be any data sequence in the electronic device that needs to be transmitted to the calculation module for calculation processing, for example, it may be a section of parameters illustrated in Figure 1 above. Or a piece of feature map, etc.
  • the calculation module may also be referred to as a calculation unit.
  • the above-mentioned storage unit may be SRAM, DRAM, etc.
  • the storage unit includes multiple source addresses, and each source address may store one piece of data to be transmitted.
  • the aforementioned data to be transmitted may be valid data in a data sequence.
  • the electronic device may pre-mark valid data in the data sequence.
  • the electronic device may determine the data sequence and the valid data in the other data according to another data sequence that is operated on with the data sequence and the operation method of the data sequence and the other data sequence, and mark the valid data . Taking the data sequence as a section of the aforementioned neural network in Fig. 1 with a parameter containing 0, and another data sequence as the aforementioned section of the neural network in Fig.
  • the electronic device first reads the A segment of parameter and a segment of feature map that needs to be calculated with the segment of parameter, and know that the segment of parameter and the segment of feature map need to be multiplied, and then the electronic device multiplies the segment of parameter with the segment of feature map, the result is not 0
  • the data is marked as valid data. Specifically, the data corresponding to subscripts 2 and 7 in Fig. 1 are marked as valid data, that is, in a section of the parameters of the neural network illustrated in Fig. 1, the valid data are 1 and -1. At the same time, the neural network illustrated in Fig. 1 In a piece of data, valid data are 3 and 5. After the valid data is marked, the valid data is scattered and stored in the N source addresses of the storage unit.
  • the foregoing N source addresses may be all addresses in the module storing the data to be transmitted, or the foregoing N source addresses may also be part of the addresses in the module storing the data to be transmitted, which is not discussed in this embodiment of the application. Specific restrictions.
  • the above N is an even number.
  • a segment of parameters includes 8 data, respectively 0, 0, 1, 0, 0, 0, 0, -1, and the 8 data are respectively stored in 8 source addresses of the storage unit.
  • N is 8.
  • the aforementioned at least one data to be transmitted is respectively transmitted to a target address in the calculation module.
  • the calculation module where the target address is located may include at least M addresses.
  • the data in the N source addresses are transferred to the M addresses of the calculation module.
  • M is less than N, that is, the number of data calculated in a single calculation by the calculation module is less than the number of data stored in the module where the source address is located, so as to align the valid data.
  • the first source address among the N source addresses and the target address corresponding to the first source address satisfy the first preset relationship
  • the The first preset relationship includes: when the source address is K, the target address is one of 0 to K starting from 0. Among them, K is a number greater than or equal to zero.
  • the above-mentioned first source address is any source address from the first source address to the N/2th source address.
  • the mapping relationship between the source address and the destination address can be expressed in an entry management manner.
  • the mapping relationship between the source address and the destination address is a fully connected relationship, that is, for a source address
  • the stored data may be transmitted to any target address, and in the embodiment of the present application, for a source address K from the first source address to the N/2th source address, the corresponding target address is not Then there is any target address, but one from 0 to K.
  • Such a design can simplify the complexity of the transmission network under the premise of ensuring the normal transmission of data.
  • the source address and the target address are numbered starting from 0. Therefore, one of 0 to K represents the first target address to the K+1th target address.
  • the target address is the address in the calculation module, and the calculation module includes M addresses. The M addresses are numbered starting from 0. Therefore, the target address 0 represents the first target address in the calculation module, and the target address M-1 Represents the M-th target address in the calculation module.
  • the data stored in these addresses is transmitted to the computing module from The address starts with 0, and the destination address to which the data in the source address K is transferred is one of 0 to K.
  • the corresponding destination address is the forward arrangement.
  • the module where the source address is located and the calculation module are transmitted through a specific transmission network.
  • the above-mentioned transmission network includes a first transmission sub-network, and the first transmission sub-network is used to transmit the data to be transmitted stored in the first source address to the N/2-th source address.
  • the transmission sub-network includes multiple layers, and each layer includes at least one switching node. There is no switching node from the 2 ⁇ (Y-1)+1 position to the 2 ⁇ Y position of layer Y, and when layer Y When there is at least one switching node in the first position to the 2 ⁇ Y position in, each of the at least one switching node does not include an uplink connection line.
  • the symbol " ⁇ " represents a power operation, for example, 2 ⁇ Y represents the Y power of 2, and will not be explained separately below.
  • the switching node may be a logic device implemented by circuit logic.
  • the switching node may be a 2-2 multiplexer (MUX) or the like.
  • the first transmission sub-network is used to transmit the data to be transmitted stored in the first source address to the N/2th source address, that is, the first transmission sub-network is used to transmit the data in the first half of the source address Data to be transmitted.
  • the number of layers of the transmission network can be flexibly set.
  • the number of layers of the transmission network may be determined according to the number of source addresses. When the number of source addresses is the aforementioned N, the number of layers of the transmission network can be the result of log 2 (N)+1 rounded up.
  • the transmission network of the embodiment of the present application can be evolved on the basis of the traditional transmission network.
  • the following uses a traditional butterfly network as an example to illustrate the characteristics of the transmission network in the embodiment of the present application.
  • FIG 3 is a schematic diagram of the structure of a traditional butterfly network.
  • the butterfly network is responsible for transmitting data from 8 source addresses to 4 destination addresses. Data in different source addresses may need to use the same transmission line. Transmission, which may cause collisions. For example, the data stored in source address 0 and the data stored in address 4 may need to be transmitted using the transmission line between node 1 and node 2 at the same time, thereby causing a collision.
  • Figure 4 is a schematic diagram of the reverse butterfly network structure.
  • the network includes two transmissions.
  • Sub-network one transmission sub-network (the first half of the transmission sub-network) is responsible for transmitting the data in the first half of the source address to the destination address
  • the other transmission sub-network (the second half of the transmission sub-network) is responsible for the second half of the source address
  • the data is transferred to the destination address.
  • the first half of the source address and the second half of the source address respectively refer to: assuming that the network includes N source addresses, the first half of the source addresses refer to source addresses 0 to N/2-1, and the second half of source addresses refer to N/2 to N- 1.
  • Both transmission sub-networks include multiple layers, and each layer includes multiple switching nodes. Each node in the first layer of each transmission sub-network is connected to each source address, and each node in the last layer of each transmission sub-network is connected to each target address. It is worth noting that in the network structure shown in FIG. 4, for the switching node A, the switching node B, the switching node C, and the switching node D connected to the target address, they belong to two transmission sub-networks at the same time.
  • the first half of the transmission sub-network can be evolved to obtain the transmission network described in step S202.
  • Figure 5(a) is the evolution process of the first half of the sub-network
  • Figure 5(b) is the structure diagram of the transmission network after the evolution.
  • the transmission network includes a first transmission sub-network and a second transmission sub-network.
  • the first transmission subnet is responsible for transmitting the data in the first half of the source address to the target address
  • the second transmission subnet is responsible for transmitting the data in the second half of the source address to the target address.
  • Both sub-networks include multiple layers, and each layer includes multiple switching nodes.
  • Each node in the first layer of each transmission sub-network is connected to each source address, and each node in the last layer of each sub-network is connected to each target address. It is worth noting that in the network structure shown in Figure 5(b), for the switching node connected to the target address, it belongs to two sub-networks at the same time. At the same time, based on the aforementioned first preset relationship, the first half of the sub-networks in the reverse butterfly network shown in FIG. 4 can be evolved.
  • the evolution is as follows, where Y is greater than or equal to 0 and less than or equal to the difference of the number of layers of the transmission network minus 1.
  • the number of layers of the first transmission sub-network can be log 2 (N)+1 when the result is rounded up, the value of Y is: greater than or equal to 0, and less than or equal to the result of log(N) rounded up.
  • the number of layers of the first transmission sub-network and the number of layers of the second transmission sub-network are respectively the same as the number of layers of the transmission network.
  • the switching nodes in each layer of the first transmission sub-network may be numbered as follows:
  • switching node 0 represents the first switching node
  • switching node 2 ⁇ Y-1 represents the 2 ⁇ Y switching node.
  • the switch node connected to the smallest source address has the smallest number, and so on.
  • the switching node in layer 0 connected to source address 0 is switching node 0
  • the switching node in layer 0 connected to source address 1 is switching node 1. ,And so on.
  • the numbers of each switching node are respectively consistent with the numbers of the switching nodes in the first layer with the same positions as the switching nodes.
  • there are 4 switching nodes in layer 1 and the lowest switching node is in the same position as switching node 0 in layer 0, that is, it belongs to the lowest switching node in the layer, then the lowest switching node in layer 1
  • the switching node is switching node 0.
  • a switching node at the lower level is at the same position as switching node 1 in layer 0, that is, both belong to a switching node at the lower level. Therefore, the switching node at the lower level in layer 1 is switching node 1.
  • the number of each switching node in the other layers except for layer 0 and the last layer of the first transmission sub-network can be obtained.
  • the switching node connected to the smallest target address has the smallest number, and so on.
  • the switching node in layer 3 connected to the target address 0 is switching node 0
  • the switching node in layer 3 connected to the target address 1 is switching node 1. And so on.
  • sequence numbers of the source address and the target address are also numbered starting from 0.
  • source address 0 represents the first source address, and so on.
  • upward transmission refers to the switching node with a smaller number transmitting data to a switching node with a larger number.
  • Figure 5(a) when the switching node 0 of layer 1 transmits data to the switching node 2 of layer 2, That is, upward transmission.
  • the uplink connection line refers to the connection between the switching node with the smaller number in the lower-numbered layer and the switching node with the larger number in the higher-numbered layer.
  • layer 1 is the lower numbered layer
  • layer 2 is the higher numbered layer.
  • switching node 0 in layer 1 and switching node 2 in layer 2 switching node 0 in layer 1 is a switching node with a smaller number
  • switching node 2 in layer 2 is a switching node with a larger number.
  • the connection between switching node 0 in 1 to switching node 2 in layer 2 is an uplink connection line.
  • the layer Y is a layer other than the first layer and the last layer in the first transmission sub-network.
  • the switching nodes deleted in this step include 2*2 switching nodes and 2*1 switching nodes.
  • a 2*2 switching node refers to a node including 2 input connections and 2 output connections
  • a 2*1 switching node refers to a node including 2 input connections and 1 output connection.
  • switching node 1 in layer 1 is only used to connect switching node 1 and layer 0
  • the switching node 1 of layer 2 therefore, after the switching node 1 of layer 1 is deleted, the switching node 1 of layer 0 is directly connected to the switching node 1 of layer 2, and the normal transmission of data in the source address will not be affected.
  • the switching node 2 and switching node 3 of layer 2 are also deleted, and the switching node 3 of layer 1 is directly connected to the switching node 3 of layer 3; the switching node 2 of layer 1 and the switching node 2 of layer 3 are directly connected. even.
  • this step can be performed independently of the above (1) and (2), or, if the above (1) and (2) are performed, the result of this step can be satisfied.
  • the Y layer of the resulting transmission network meets the following conditions:
  • each of the at least one switching node does not include an uplink connection line.
  • the transmission network in Figure 5(b) is used to transmit data in 8 source addresses to 4 destination addresses
  • the first transmission subnet in the transmission network is used to transmit data in source addresses 0 to 3.
  • the first transmission sub-network includes 4 layers, which are layer 0, layer 1, layer 2, and layer 3.
  • Layer 0 includes 4 switching nodes, which are switching node 0, switching node 1, switching node 2, and switching node 3 .
  • Layer 1 includes 3 switching nodes, namely node 0, node 2 and node 3.
  • Layer 2 includes two switching nodes, namely node 0 and node 1.
  • Layer 3 includes 4 switching nodes. For the connection mode of each switching node in each layer, refer to Figure 5(b), which will not be described here.
  • the source address and the destination address meet the above-mentioned first preset relationship, when the data in the first half of the source address is transmitted through the first transmission sub-network shown in FIG. 5(b), it will not In the event of a collision, at the same time, the first transmission sub-network shown in Figure 5(b) above is compared with the traditional transmission network that does not collide, such as a crossbar network (Crossbar network).
  • the number of switching nodes in the transmission network is This has significantly reduced the complexity of the transmission network.
  • a transmission network for transmitting data between the source address and the target address is proposed.
  • the first transmission sub-network of the transmission network There is no switching node from the 2 ⁇ (Y–1)+1 position to the 2 ⁇ Y position of layer Y, and there is at least one from the first position to the 2 ⁇ Y position in layer Y
  • each of the at least one switching node does not include an uplink connection line, and when data is transmitted through the transmission network, collisions will not occur.
  • the transmission network has significantly reduced the number of switching nodes and the complexity of the transmission network. Therefore, the transmission network has the advantages of fast transmission speed and less transmission resource occupation.
  • the second source address and the target address corresponding to the second source address satisfy a second preset relationship
  • the second preset relationship includes:
  • the source address is L
  • the destination address is one of M-1 to M-1-[L%(N/2)] starting from M-1, where the second source address is N/2+1 Any one of the source addresses to the Nth source address.
  • L is a number greater than zero.
  • the data stored in these addresses is transmitted to The address starting from M-1 in the module is calculated, and the destination address to which the data in the source address L is transferred is one of M-1 to M-1-[L%(N/2)].
  • the corresponding destination address is arranged in a reverse direction.
  • the above-mentioned transmission network further includes a second transmission sub-network, and the second transmission sub-network is used to transmit the data to be transmitted stored in the N/2+1 source addresses to the Nth source address.
  • the second transmission sub-network includes multiple layers, and each layer includes at least one switching node. There is no switching node from the 2 ⁇ (S-1)+1 position to the 2 ⁇ S position of layer S, and when When there is at least one switching node from the first position to the 2 ⁇ S position in the layer S, each of the at least one switching node does not include an uplink connection line.
  • the aforementioned second transmission sub-network can be used to transmit the data to be transmitted stored in the N/2+1th source address to the Nth source address to the corresponding destination address.
  • the foregoing evolution process may be used to evolve the second transmission sub-network in the transmission network.
  • Figure 6(a) is the evolution process of the second half of the sub-network
  • Figure 6(b) is the network structure diagram after the evolution.
  • the following evolution process is performed on the second half of the sub-network of the reverse butterfly network shown in FIG. 4. It is worth noting that in Figures 6(a) and 6(b), the second transmission sub-network is first connected according to the above-mentioned reverse arrangement. Specifically, node 0 of layer 2 is connected to node 3 of layer 3. Node 1 of 2 is connected to node 2 of layer 3, and so on.
  • the evolution is as follows, where S is greater than or equal to 0 and less than or equal to the difference of the number of layers of the second transmission sub-network minus 1.
  • the number of layers of the second transmission sub-network can be When it is the result of log 2 (N)+1 rounded up, the value of S is: greater than or equal to 0, and less than or equal to the result of log 2 (N) rounded up.
  • layer S the uplink connection from switching node 0 to switching node 2 ⁇ S-1 is omitted.
  • the switching nodes in each layer of the second transmission sub-network may be numbered as follows:
  • switching node 0 represents the first switching node
  • switching node 2 ⁇ Y-1 represents the 2 ⁇ Yth switching node.
  • the switch node connected to the smallest source address has the smallest number, and so on.
  • the switching node in layer 0 connected to source address 0 is switching node 0
  • the switching node in layer 0 connected to source address 1 is switching node 1. ,And so on.
  • the numbers of each switching node are respectively consistent with the numbers of the switching nodes in the first layer with the same positions as the switching nodes.
  • the lowest switching node is in the same position as switching node 0 in layer 0, that is, it belongs to the lowest switching node in the layer, then the lowest switching node in layer 1
  • the switching node is switching node 0.
  • a switching node at the lower level is at the same position as switching node 1 in layer 0, that is, both belong to a switching node at the lower level. Therefore, the switching node at the lower level in layer 1 is switching node 1.
  • the number of each switching node in the other layers except for layer 0 and the last layer of the second transmission sub-network can be obtained.
  • the switching node connected to the smallest target address has the smallest number, and so on.
  • the switching node in layer 3 connected to target address 0 is switching node 0
  • the switching node in layer 3 connected to target address 1 is switching node 1. ,And so on.
  • the layer S is a layer other than the first layer and the last layer in the second transmission sub-network.
  • the switching nodes deleted in this step include 2*2 switching nodes and 2*1 switching nodes.
  • this step can be performed independently of the above (1) and (2), or, if the above (1) and (2) are performed, the result of this step can be satisfied.
  • the S layer of the resulting transmission network satisfies the following conditions:
  • each of the at least one switching node does not include an uplink connection line.
  • the transmission network in Figure 6(b) is used to transmit data in 8 source addresses to 4 destination addresses
  • the second transmission sub-network in the transmission network is used to transmit data in source addresses 4 to 7
  • the second transmission sub-network includes 4 layers, namely layer 0, layer 1, layer 2, and layer 3, and layer 0 includes 4 switching nodes, namely switching node 0, switching node 1, switching node 2, and switching node 3 .
  • Layer 1 includes 3 switching nodes, namely node 0, node 2 and node 3.
  • Layer 2 includes two switching nodes, namely node 0 and node 1.
  • Layer 3 includes 4 switching nodes.
  • the connection mode of each switching node in each layer can be referred to Figure 6(b), which will not be described here.
  • the source address and the target address satisfy the above-mentioned second preset relationship, when the data in the second half of the source address is transmitted through the second transmission sub-network shown in FIG. 6(b), it is not Collision will occur.
  • the second transmission sub-network shown in Figure 6(b) above has a significant reduction in the number of switching nodes in the transmission network compared to the traditional non-collision transmission network, such as the Crossbar network. The complexity of the transmission network has dropped significantly.
  • a transmission network for transmitting data between the source address and the target address is proposed.
  • the second transmission sub-network of the transmission network There is no switching node from the 2 ⁇ (S-1)+1 position to the 2 ⁇ S position of layer S, and there is at least one from the first position to the 2 ⁇ S position in layer S
  • each of the at least one switching node does not include an uplink connection line.
  • the transmission network has significantly reduced the number of switching nodes and the complexity of the transmission network. Therefore, the transmission network has the advantages of fast transmission speed and less transmission resource occupation.
  • the transmission network can use the structure shown in Figure 5(b) above, that is, only the first transmission sub-network uses the evolved network structure, or the transmission network can use the structure shown in Figure 6(b) above.
  • the structure shown, that is, only the second transmission sub-network uses the evolved network structure.
  • the transmission network can also use the structure shown in Figure 7 below.
  • Figure 7 is a schematic diagram of the network structure obtained by simultaneously using the two-part sub-network evolution method shown in the preceding paragraph.
  • the structure of the first transmission sub-network is It is the same as the first transmission sub-network in Fig. 5(b), and the structure of the second transmission sub-network is the same as that of the first transmission sub-network in Fig. 6(b), which will not be repeated here.
  • Table 1 is an example of comparing the above-mentioned Figure 5(b) and the above-mentioned Figure 7 with the conventional transmission network.
  • the above-mentioned Figure 5(b) and the above-mentioned Figure 7 greatly save the number of 2*2 switching nodes and connecting lines compared to the traditional Crossbar network. At the same time, compared to the traditional butterfly network, it can Avoid collisions.
  • step S202 The following describes the specific process of data transmission in step S202 based on the above-mentioned transmission network.
  • FIG. 8 is a schematic flowchart of a data transmission method provided by an embodiment of the application. As shown in FIG. 8, the process of using the above-mentioned first transmission sub-network to transmit data to be transmitted to a target address includes:
  • the target address of the data to be transmitted may be obtained according to a preset correspondence between the number of the data to be transmitted and the target address.
  • the target address of the data to be transmitted is address 0
  • the destination address of the second data to be transmitted is address 1.
  • This section of the characteristic diagram includes two valid data, and the two valid data are to be transmitted. data.
  • This section of the feature map is stored in the eight source addresses shown in FIG. 7, where the data 5 is stored in the source address 0, and so on, stored in sequence. From the foregoing description, it can be seen that the valid data in this section of the characteristic diagram are 5 and 3, and the data 3 is stored in the source address 5. Therefore, the data 3 can be transmitted using the second transmission sub-network. At the same time, according to the above second preset relationship, the data 3 can be transmitted to the target address 2.
  • the binary value of destination address 1 is 001.
  • data 3 is routed on the second transmission subnet. Specifically, if the LSB of 001 is 1, data 3 is routed from layer 0 switching node 1 to layer 2 switching node 1, and from layer 2 switching node 1 to layer 3 switching node 2 directly, and then transmitted to the destination Address 2.
  • the above-mentioned transmission network is used to route the data to be transmitted to the target address according to the LSB, which can further increase the data transmission speed.
  • the destination address corresponding to the data to be transmitted stored in the N/2+1th source address to the Nth source address can be obtained first .
  • the target address is represented by a binary value, and further, starting from the LSB of the target address, the transmission path of the data to be transmitted in the second transmission sub-network is determined according to the value of each bit in the target address, and the transmission path of the data to be transmitted in the second transmission sub-network is determined by The transmission path transmits the data to be transmitted to the target address.
  • the specific execution process is the same as the processing process of the first transmission sub-network in FIG. 8, and will not be repeated here.
  • the number M of target addresses is less than the number N of source addresses.
  • M may be 4 and N may be 8.
  • the data to be transmitted can be divided into multiple groups of sub-data, and under one transmission clock, the aforementioned transmission network is used to divide a group of sub-data. The data is transferred to the corresponding destination address.
  • the data to be transmitted can be divided according to the source address.
  • the number of source addresses is 8 and the number of target addresses is 4, the data in source address 0 to source address 3 is taken as the first group of sub-data, and the data in source address 4 to source address 7 is taken as the second group. Group sub-data.
  • the data to be transmitted in the first group of sub-data is transmitted to the target address through the transmission network under one clock for calculation, and the data to be transmitted in the second group of sub-data is transmitted to the target address through the transmission network under another clock.
  • the target address is calculated.
  • the data to be transmitted is divided into multiple groups of sub-data, and each group of sub-data is transmitted under different clocks, thereby avoiding conflicts in data transmission and calculations. , To ensure the correctness of data transmission and calculation.
  • FIG. 9 is a module structure diagram of a data transmission device provided by an embodiment of the application.
  • the device may be the electronic device described in the foregoing embodiment, or may be a device in the electronic device that can implement the functions in the method provided by the embodiment of the application
  • the device may be a device or a chip system in an electronic device.
  • the device includes:
  • N source addresses are set in the storage unit 901, and multiple target addresses are set in the target module 902.
  • the transmission network 903 is connected to the storage unit 901 and the target module 902 respectively.
  • the transmission network 903 includes a first transmission sub-network, and the first transmission sub-network includes a plurality of layers, and each layer includes at least one switching node, from the 2 ⁇ (Y-1)+1 position to the 2 ⁇ Y of layer Y There is no switching node in each position, and when there is at least one switching node in the first position to the 2 ⁇ Y position in layer Y, each switching node in the at least one switching node does not include an uplink connection line.
  • the control module 904 may be connected to the storage unit 901, the target module 902, and the transmission network 903 respectively.
  • the control module 904 is configured to obtain at least one to-be-transmitted data from the storage unit 901, the to-be-transmitted data is stored in the aforementioned N source addresses, and, based on the first preset relationship between the source address and the target address, use
  • the first transmission sub-network transmits the data to be transmitted stored in the first source address to the N/2th source address to the corresponding destination address, where the first preset relationship includes: when the source address is K , The corresponding target address is one of 0 to K starting from 0.
  • the transmission network 903 further includes a second transmission sub-network.
  • the above-mentioned second transmission sub-network includes multiple layers, each layer includes at least one switching node, and there is no switching node at the 2 ⁇ (S-1)+1 position to the 2 ⁇ S position of layer S, and, When there is at least one switching node from the first position to the 2 ⁇ S position in layer S, each switching node in the at least one switching node does not include an uplink connection line;
  • the control module 904 is further configured to use the second transmission sub-network based on the second preset relationship between the source address and the target address to transfer the data stored in the N/2+1th source address to the Nth source address to be transmitted
  • the data is transmitted to the corresponding target address, where the second preset relationship includes: when the source address is L, the corresponding target address is M-1 to M-1-[L%(N/ 2)], M is the number of target addresses, M is less than N.
  • the number of layers of the first transmission sub-network is log 2 (N)+1, and/or the number of layers of the second transmission sub-network is log 2 (N)+1.
  • control module 904 is specifically configured to:
  • the destination address corresponding to the data transmission to be transmitted stored in the first source address to the N/2th source address
  • the destination address is represented by a binary value; and, starting from the LSB of the destination address, according to each bit in the destination address The value on the bit determines the transmission path of the data to be transmitted in the first transmission sub-network, and the data to be transmitted is transmitted to the target address through the transmission path in the first transmission sub-network.
  • control module 904 is specifically configured to:
  • the target address corresponding to the data to be transmitted stored in the N/2+1th source address to the Nth source address
  • the target address is represented by a binary value; and, starting from the LSB of the target address, according to each target address
  • the value on the bit determines the transmission path of the data to be transmitted in the second transmission sub-network, and the data to be transmitted is transmitted to the target address through the transmission path in the second transmission sub-network.
  • the target module 902 may be a calculation module, and the calculation module includes at least M addresses.
  • control module 904 is further configured to divide the at least one data to be transmitted into multiple groups of sub-data, and each group of sub-data is transmitted under one transmission clock.
  • the data transmission device provided in the embodiment of the present application can execute the method steps in the above method embodiment, and its implementation principles and technical effects are similar, and will not be repeated here.
  • the division of the various modules of the above device is only a division of logical functions, and may be fully or partially integrated into a physical entity in actual implementation, or may be physically separated.
  • these modules can all be implemented in the form of software called by processing elements; they can also be implemented in the form of hardware; some modules can be implemented in the form of calling software by processing elements, and some of the modules can be implemented in the form of hardware.
  • the determining module may be a separately established processing element, or it may be integrated into a certain chip of the above-mentioned device for implementation.
  • each step of the above method or each of the above modules can be completed by hardware integrated logic circuits in the processor element or instructions in the form of software.
  • the above modules may be one or more integrated circuits configured to implement the above methods, such as one or more application specific integrated circuit (ASIC), or one or more microprocessors (digital signal processor, DSP), or, one or more field programmable gate arrays (FPGA), etc.
  • ASIC application specific integrated circuit
  • DSP digital signal processor
  • FPGA field programmable gate arrays
  • the processing element may be a general-purpose processor, such as a central processing unit (CPU) or other processors that can call program codes.
  • CPU central processing unit
  • these modules can be integrated together and implemented in the form of a system-on-a-chip (SOC).
  • SOC system-on-a-chip
  • the above embodiments it may be implemented in whole or in part by software, hardware, firmware or any combination thereof.
  • software it can be implemented in the form of a computer program product in whole or in part.
  • the computer program product includes one or more computer instructions.
  • the processes or functions described in the embodiments of the present application are generated in whole or in part.
  • the above-mentioned computer may be a general-purpose computer, a special-purpose computer, a computer network, or other programmable devices.
  • the above-mentioned computer instructions can be stored in a computer-readable storage medium, or transmitted from one computer-readable storage medium to another computer-readable storage medium.
  • the above-mentioned computer instructions can be transmitted from a website, computer, server, or data center through a cable (Such as coaxial cable, optical fiber, digital subscriber line (DSL)) or wireless (such as infrared, wireless, microwave, etc.) to another website site, computer, server or data center.
  • a cable such as coaxial cable, optical fiber, digital subscriber line (DSL)
  • wireless such as infrared, wireless, microwave, etc.
  • the foregoing computer-readable storage medium may be any available medium that can be accessed by a computer or a data storage device such as a server or data center integrated with one or more available media.
  • the above-mentioned usable medium may be a magnetic medium (for example, a floppy disk, a hard disk, and a magnetic tape), an optical medium (for example, a DVD), or a semiconductor medium (for example, a solid state disk (SSD)).
  • a magnetic medium for example, a floppy disk, a hard disk, and a magnetic tape
  • an optical medium for example, a DVD
  • a semiconductor medium for example, a solid state disk (SSD)
  • FIG. 10 is a schematic structural diagram of an electronic device provided by an embodiment of the application.
  • the electronic device 1000 may include: a processor 101 (for example, a CPU), a memory 102, and a transceiver 103; the transceiver 103 is coupled to the processor 101, and the processor 101 controls the transceiver 103 to send and receive actions.
  • Various instructions may be stored in the memory 102 to complete various processing functions and implement method steps executed by the electronic device in the embodiments of the present application.
  • the electronic device involved in the embodiment of the present application may further include: a power supply 104, a system bus 105, and a communication port 106.
  • the transceiver 103 may be integrated in the transceiver of the electronic device, or may be an independent transceiver antenna on the electronic device.
  • the system bus 105 is used to implement communication connections between components.
  • the aforementioned communication port 106 is used to implement connection and communication between the electronic device and other peripherals.
  • the above-mentioned processor 101 is configured to be coupled with the memory 102 to read and execute instructions in the memory 102 to implement the method steps performed by the electronic device in the above-mentioned method embodiment. Its implementation principle and technical effect are similar, so it will not be repeated here.
  • the system bus mentioned in FIG. 10 may be a peripheral component interconnect standard (PCI) bus or an extended industry standard architecture (EISA) bus, etc.
  • PCI peripheral component interconnect standard
  • EISA extended industry standard architecture
  • the system bus can be divided into address bus, data bus, control bus, etc. For ease of representation, only one thick line is used in the figure, but it does not mean that there is only one bus or one type of bus.
  • the communication interface is used to realize the communication between the database access device and other devices (such as client, read-write library and read-only library).
  • the memory may include random access memory (RAM), and may also include non-volatile memory (non-volatile memory), such as at least one disk memory.
  • the above-mentioned processor can be a general-purpose processor, including a central processing unit CPU, a network processor (NP), etc.; it can also be a digital signal processor DSP, an application specific integrated circuit ASIC, a field programmable gate array FPGA or other Programming logic devices, discrete gates or transistor logic devices, discrete hardware components.
  • a general-purpose processor including a central processing unit CPU, a network processor (NP), etc.; it can also be a digital signal processor DSP, an application specific integrated circuit ASIC, a field programmable gate array FPGA or other Programming logic devices, discrete gates or transistor logic devices, discrete hardware components.
  • an embodiment of the present application further provides a computer-readable storage medium, where instructions are stored in the storage medium, which when run on a computer, cause the computer to execute the processing procedure of the electronic device in the foregoing embodiment.
  • an embodiment of the present application further provides a chip for executing instructions, and the chip is used to execute the processing procedure of the electronic device in the foregoing embodiment.
  • the embodiment of the present application also provides a program product, the program product includes a computer program, the computer program is stored in a storage medium, at least one processor can read the computer program from the storage medium, and the at least one processor executes the above implementation The processing process of the electronic device in the example.
  • At least one refers to one or more, and “multiple” refers to two or more.
  • “And/or” describes the association relationship of the associated objects, indicating that there can be three relationships, for example, A and/or B, which can mean: A alone exists, both A and B exist, and B exists alone, where A, B can be singular or plural.
  • the character “/” generally indicates that the associated objects before and after are in an “or” relationship; in the formula, the character “/” indicates that the associated objects before and after are in a “division” relationship.
  • “The following at least one item (a)” or similar expressions refers to any combination of these items, including any combination of a single item (a) or plural items (a).
  • at least one of a, b, or c can mean: a, b, c, ab, ac, bc, or abc, where a, b, and c can be single or multiple One.
  • the size of the sequence numbers of the foregoing processes does not mean the order of execution.
  • the execution order of each process should be determined by its function and internal logic, and should not be implemented in this application.
  • the implementation process of the example constitutes any limitation

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Abstract

Un mode de réalisation de la présente invention concerne un procédé et un dispositif de transmission de données, un dispositif électronique et un support d'enregistrement lisible, dans le procédé, au moins un élément de données à transmettre est acquis à partir d'une unité de stockage, N adresses sources sont disposées dans l'unité de stockage, les données à transmettre sont dispersées dans les N adresses sources, et sur la base d'une première relation prédéfinie entre les adresses sources et les adresses cibles, les données à transmettre stockées à partir de la première adresse source vers la N/2ème adresse source sont transmises aux adresses cibles correspondantes à l'aide d'un premier sous-réseau de transmission. La première relation prédéfinie comprend les étapes suivantes : lorsque l'adresse source est K, l'adresse cible correspondante est l'une de 0 à K en partant de 0. Le premier sous-réseau de transmission comprend une pluralité de couches, il n'y a aucun nœud de commutation à partir de la position 2 ^ (Y–1) +1 à la position 2 ^ Y de la couche Y, et, lorsqu'il y a au moins un nœud de commutation de la première position vers la position 2 ^ Y dans la couche Y, chaque nœud parmi ledit/lesdits nœud(s) de commutation ne comprend pas de liaison de connexion de liaison montante. Le procédé peut réduire considérablement le surdébit de transmission et le surdébit de calcul, et peut améliorer considérablement l'efficacité de traitement de données fragmentées.
PCT/CN2019/099262 2019-08-05 2019-08-05 Procédé et dispositif de transmission de données, dispositif électronique et support d'enregistrement lisible WO2021022441A1 (fr)

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